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cmsis/BUILD/mbed/TARGET_DISCO_L496AG/TOOLCHAIN_ARM_STD/stm32l4xx_hal_irda.h@189:f392fc9709a3, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 22:31:08 2019 +0000
- Revision:
- 189:f392fc9709a3
mbed library release version 165
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 189:f392fc9709a3 | 1 | /** |
| AnnaBridge | 189:f392fc9709a3 | 2 | ****************************************************************************** |
| AnnaBridge | 189:f392fc9709a3 | 3 | * @file stm32l4xx_hal_irda.h |
| AnnaBridge | 189:f392fc9709a3 | 4 | * @author MCD Application Team |
| AnnaBridge | 189:f392fc9709a3 | 5 | * @brief Header file of IRDA HAL module. |
| AnnaBridge | 189:f392fc9709a3 | 6 | ****************************************************************************** |
| AnnaBridge | 189:f392fc9709a3 | 7 | * @attention |
| AnnaBridge | 189:f392fc9709a3 | 8 | * |
| AnnaBridge | 189:f392fc9709a3 | 9 | * <h2><center>© COPYRIGHT(c) 2017 STMicroelectronics</center></h2> |
| AnnaBridge | 189:f392fc9709a3 | 10 | * |
| AnnaBridge | 189:f392fc9709a3 | 11 | * Redistribution and use in source and binary forms, with or without modification, |
| AnnaBridge | 189:f392fc9709a3 | 12 | * are permitted provided that the following conditions are met: |
| AnnaBridge | 189:f392fc9709a3 | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
| AnnaBridge | 189:f392fc9709a3 | 14 | * this list of conditions and the following disclaimer. |
| AnnaBridge | 189:f392fc9709a3 | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| AnnaBridge | 189:f392fc9709a3 | 16 | * this list of conditions and the following disclaimer in the documentation |
| AnnaBridge | 189:f392fc9709a3 | 17 | * and/or other materials provided with the distribution. |
| AnnaBridge | 189:f392fc9709a3 | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| AnnaBridge | 189:f392fc9709a3 | 19 | * may be used to endorse or promote products derived from this software |
| AnnaBridge | 189:f392fc9709a3 | 20 | * without specific prior written permission. |
| AnnaBridge | 189:f392fc9709a3 | 21 | * |
| AnnaBridge | 189:f392fc9709a3 | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| AnnaBridge | 189:f392fc9709a3 | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| AnnaBridge | 189:f392fc9709a3 | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| AnnaBridge | 189:f392fc9709a3 | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| AnnaBridge | 189:f392fc9709a3 | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| AnnaBridge | 189:f392fc9709a3 | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| AnnaBridge | 189:f392fc9709a3 | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| AnnaBridge | 189:f392fc9709a3 | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| AnnaBridge | 189:f392fc9709a3 | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| AnnaBridge | 189:f392fc9709a3 | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| AnnaBridge | 189:f392fc9709a3 | 32 | * |
| AnnaBridge | 189:f392fc9709a3 | 33 | ****************************************************************************** |
| AnnaBridge | 189:f392fc9709a3 | 34 | */ |
| AnnaBridge | 189:f392fc9709a3 | 35 | |
| AnnaBridge | 189:f392fc9709a3 | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 37 | #ifndef __STM32L4xx_HAL_IRDA_H |
| AnnaBridge | 189:f392fc9709a3 | 38 | #define __STM32L4xx_HAL_IRDA_H |
| AnnaBridge | 189:f392fc9709a3 | 39 | |
| AnnaBridge | 189:f392fc9709a3 | 40 | #ifdef __cplusplus |
| AnnaBridge | 189:f392fc9709a3 | 41 | extern "C" { |
| AnnaBridge | 189:f392fc9709a3 | 42 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 43 | |
| AnnaBridge | 189:f392fc9709a3 | 44 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 45 | #include "stm32l4xx_hal_def.h" |
| AnnaBridge | 189:f392fc9709a3 | 46 | |
| AnnaBridge | 189:f392fc9709a3 | 47 | /** @addtogroup STM32L4xx_HAL_Driver |
| AnnaBridge | 189:f392fc9709a3 | 48 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 49 | */ |
| AnnaBridge | 189:f392fc9709a3 | 50 | |
| AnnaBridge | 189:f392fc9709a3 | 51 | /** @addtogroup IRDA |
| AnnaBridge | 189:f392fc9709a3 | 52 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 53 | */ |
| AnnaBridge | 189:f392fc9709a3 | 54 | |
| AnnaBridge | 189:f392fc9709a3 | 55 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 56 | /** @defgroup IRDA_Exported_Types IRDA Exported Types |
| AnnaBridge | 189:f392fc9709a3 | 57 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 58 | */ |
| AnnaBridge | 189:f392fc9709a3 | 59 | |
| AnnaBridge | 189:f392fc9709a3 | 60 | /** |
| AnnaBridge | 189:f392fc9709a3 | 61 | * @brief IRDA Init Structure definition |
| AnnaBridge | 189:f392fc9709a3 | 62 | */ |
| AnnaBridge | 189:f392fc9709a3 | 63 | typedef struct |
| AnnaBridge | 189:f392fc9709a3 | 64 | { |
| AnnaBridge | 189:f392fc9709a3 | 65 | uint32_t BaudRate; /*!< This member configures the IRDA communication baud rate. |
| AnnaBridge | 189:f392fc9709a3 | 66 | The baud rate register is computed using the following formula: |
| AnnaBridge | 189:f392fc9709a3 | 67 | Baud Rate Register = ((usart_ker_ckpres) / ((hirda->Init.BaudRate))) |
| AnnaBridge | 189:f392fc9709a3 | 68 | where usart_ker_ckpres is the IRDA input clock divided by a prescaler */ |
| AnnaBridge | 189:f392fc9709a3 | 69 | |
| AnnaBridge | 189:f392fc9709a3 | 70 | uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame. |
| AnnaBridge | 189:f392fc9709a3 | 71 | This parameter can be a value of @ref IRDA_Word_Length */ |
| AnnaBridge | 189:f392fc9709a3 | 72 | |
| AnnaBridge | 189:f392fc9709a3 | 73 | uint32_t Parity; /*!< Specifies the parity mode. |
| AnnaBridge | 189:f392fc9709a3 | 74 | This parameter can be a value of @ref IRDA_Parity |
| AnnaBridge | 189:f392fc9709a3 | 75 | @note When parity is enabled, the computed parity is inserted |
| AnnaBridge | 189:f392fc9709a3 | 76 | at the MSB position of the transmitted data (9th bit when |
| AnnaBridge | 189:f392fc9709a3 | 77 | the word length is set to 9 data bits; 8th bit when the |
| AnnaBridge | 189:f392fc9709a3 | 78 | word length is set to 8 data bits). */ |
| AnnaBridge | 189:f392fc9709a3 | 79 | |
| AnnaBridge | 189:f392fc9709a3 | 80 | uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled. |
| AnnaBridge | 189:f392fc9709a3 | 81 | This parameter can be a value of @ref IRDA_Transfer_Mode */ |
| AnnaBridge | 189:f392fc9709a3 | 82 | |
| AnnaBridge | 189:f392fc9709a3 | 83 | uint8_t Prescaler; /*!< Specifies the Prescaler value for dividing the UART/USART source clock |
| AnnaBridge | 189:f392fc9709a3 | 84 | to achieve low-power frequency. |
| AnnaBridge | 189:f392fc9709a3 | 85 | @note Prescaler value 0 is forbidden */ |
| AnnaBridge | 189:f392fc9709a3 | 86 | |
| AnnaBridge | 189:f392fc9709a3 | 87 | uint16_t PowerMode; /*!< Specifies the IRDA power mode. |
| AnnaBridge | 189:f392fc9709a3 | 88 | This parameter can be a value of @ref IRDA_Low_Power */ |
| AnnaBridge | 189:f392fc9709a3 | 89 | |
| AnnaBridge | 189:f392fc9709a3 | 90 | #if defined(USART_PRESC_PRESCALER) |
| AnnaBridge | 189:f392fc9709a3 | 91 | uint32_t ClockPrescaler; /*!< Specifies the prescaler value used to divide the IRDA clock source. |
| AnnaBridge | 189:f392fc9709a3 | 92 | This parameter can be a value of @ref IRDA_ClockPrescaler. */ |
| AnnaBridge | 189:f392fc9709a3 | 93 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 94 | |
| AnnaBridge | 189:f392fc9709a3 | 95 | }IRDA_InitTypeDef; |
| AnnaBridge | 189:f392fc9709a3 | 96 | |
| AnnaBridge | 189:f392fc9709a3 | 97 | /** |
| AnnaBridge | 189:f392fc9709a3 | 98 | * @brief HAL IRDA State structures definition |
| AnnaBridge | 189:f392fc9709a3 | 99 | * @note HAL IRDA State value is a combination of 2 different substates: gState and RxState. |
| AnnaBridge | 189:f392fc9709a3 | 100 | * - gState contains IRDA state information related to global Handle management |
| AnnaBridge | 189:f392fc9709a3 | 101 | * and also information related to Tx operations. |
| AnnaBridge | 189:f392fc9709a3 | 102 | * gState value coding follow below described bitmap : |
| AnnaBridge | 189:f392fc9709a3 | 103 | * b7-b6 Error information |
| AnnaBridge | 189:f392fc9709a3 | 104 | * 00 : No Error |
| AnnaBridge | 189:f392fc9709a3 | 105 | * 01 : (Not Used) |
| AnnaBridge | 189:f392fc9709a3 | 106 | * 10 : Timeout |
| AnnaBridge | 189:f392fc9709a3 | 107 | * 11 : Error |
| AnnaBridge | 189:f392fc9709a3 | 108 | * b5 IP initilisation status |
| AnnaBridge | 189:f392fc9709a3 | 109 | * 0 : Reset (IP not initialized) |
| AnnaBridge | 189:f392fc9709a3 | 110 | * 1 : Init done (IP not initialized. HAL IRDA Init function already called) |
| AnnaBridge | 189:f392fc9709a3 | 111 | * b4-b3 (not used) |
| AnnaBridge | 189:f392fc9709a3 | 112 | * xx : Should be set to 00 |
| AnnaBridge | 189:f392fc9709a3 | 113 | * b2 Intrinsic process state |
| AnnaBridge | 189:f392fc9709a3 | 114 | * 0 : Ready |
| AnnaBridge | 189:f392fc9709a3 | 115 | * 1 : Busy (IP busy with some configuration or internal operations) |
| AnnaBridge | 189:f392fc9709a3 | 116 | * b1 (not used) |
| AnnaBridge | 189:f392fc9709a3 | 117 | * x : Should be set to 0 |
| AnnaBridge | 189:f392fc9709a3 | 118 | * b0 Tx state |
| AnnaBridge | 189:f392fc9709a3 | 119 | * 0 : Ready (no Tx operation ongoing) |
| AnnaBridge | 189:f392fc9709a3 | 120 | * 1 : Busy (Tx operation ongoing) |
| AnnaBridge | 189:f392fc9709a3 | 121 | * - RxState contains information related to Rx operations. |
| AnnaBridge | 189:f392fc9709a3 | 122 | * RxState value coding follow below described bitmap : |
| AnnaBridge | 189:f392fc9709a3 | 123 | * b7-b6 (not used) |
| AnnaBridge | 189:f392fc9709a3 | 124 | * xx : Should be set to 00 |
| AnnaBridge | 189:f392fc9709a3 | 125 | * b5 IP initilisation status |
| AnnaBridge | 189:f392fc9709a3 | 126 | * 0 : Reset (IP not initialized) |
| AnnaBridge | 189:f392fc9709a3 | 127 | * 1 : Init done (IP not initialized) |
| AnnaBridge | 189:f392fc9709a3 | 128 | * b4-b2 (not used) |
| AnnaBridge | 189:f392fc9709a3 | 129 | * xxx : Should be set to 000 |
| AnnaBridge | 189:f392fc9709a3 | 130 | * b1 Rx state |
| AnnaBridge | 189:f392fc9709a3 | 131 | * 0 : Ready (no Rx operation ongoing) |
| AnnaBridge | 189:f392fc9709a3 | 132 | * 1 : Busy (Rx operation ongoing) |
| AnnaBridge | 189:f392fc9709a3 | 133 | * b0 (not used) |
| AnnaBridge | 189:f392fc9709a3 | 134 | * x : Should be set to 0. |
| AnnaBridge | 189:f392fc9709a3 | 135 | */ |
| AnnaBridge | 189:f392fc9709a3 | 136 | typedef enum |
| AnnaBridge | 189:f392fc9709a3 | 137 | { |
| AnnaBridge | 189:f392fc9709a3 | 138 | HAL_IRDA_STATE_RESET = 0x00U, /*!< Peripheral is not initialized |
| AnnaBridge | 189:f392fc9709a3 | 139 | Value is allowed for gState and RxState */ |
| AnnaBridge | 189:f392fc9709a3 | 140 | HAL_IRDA_STATE_READY = 0x20U, /*!< Peripheral Initialized and ready for use |
| AnnaBridge | 189:f392fc9709a3 | 141 | Value is allowed for gState and RxState */ |
| AnnaBridge | 189:f392fc9709a3 | 142 | HAL_IRDA_STATE_BUSY = 0x24U, /*!< an internal process is ongoing |
| AnnaBridge | 189:f392fc9709a3 | 143 | Value is allowed for gState only */ |
| AnnaBridge | 189:f392fc9709a3 | 144 | HAL_IRDA_STATE_BUSY_TX = 0x21U, /*!< Data Transmission process is ongoing |
| AnnaBridge | 189:f392fc9709a3 | 145 | Value is allowed for gState only */ |
| AnnaBridge | 189:f392fc9709a3 | 146 | HAL_IRDA_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing |
| AnnaBridge | 189:f392fc9709a3 | 147 | Value is allowed for RxState only */ |
| AnnaBridge | 189:f392fc9709a3 | 148 | HAL_IRDA_STATE_BUSY_TX_RX = 0x23U, /*!< Data Transmission and Reception process is ongoing |
| AnnaBridge | 189:f392fc9709a3 | 149 | Not to be used for neither gState nor RxState. |
| AnnaBridge | 189:f392fc9709a3 | 150 | Value is result of combination (Or) between gState and RxState values */ |
| AnnaBridge | 189:f392fc9709a3 | 151 | HAL_IRDA_STATE_TIMEOUT = 0xA0U, /*!< Timeout state |
| AnnaBridge | 189:f392fc9709a3 | 152 | Value is allowed for gState only */ |
| AnnaBridge | 189:f392fc9709a3 | 153 | HAL_IRDA_STATE_ERROR = 0xE0U /*!< Error |
| AnnaBridge | 189:f392fc9709a3 | 154 | Value is allowed for gState only */ |
| AnnaBridge | 189:f392fc9709a3 | 155 | }HAL_IRDA_StateTypeDef; |
| AnnaBridge | 189:f392fc9709a3 | 156 | |
| AnnaBridge | 189:f392fc9709a3 | 157 | /** |
| AnnaBridge | 189:f392fc9709a3 | 158 | * @brief HAL IRDA Error Code structure definition |
| AnnaBridge | 189:f392fc9709a3 | 159 | */ |
| AnnaBridge | 189:f392fc9709a3 | 160 | typedef enum |
| AnnaBridge | 189:f392fc9709a3 | 161 | { |
| AnnaBridge | 189:f392fc9709a3 | 162 | HAL_IRDA_ERROR_NONE = 0x00U, /*!< No error */ |
| AnnaBridge | 189:f392fc9709a3 | 163 | HAL_IRDA_ERROR_PE = 0x01U, /*!< Parity error */ |
| AnnaBridge | 189:f392fc9709a3 | 164 | HAL_IRDA_ERROR_NE = 0x02U, /*!< Noise error */ |
| AnnaBridge | 189:f392fc9709a3 | 165 | HAL_IRDA_ERROR_FE = 0x04U, /*!< frame error */ |
| AnnaBridge | 189:f392fc9709a3 | 166 | HAL_IRDA_ERROR_ORE = 0x08U, /*!< Overrun error */ |
| AnnaBridge | 189:f392fc9709a3 | 167 | HAL_IRDA_ERROR_DMA = 0x10U, /*!< DMA transfer error */ |
| AnnaBridge | 189:f392fc9709a3 | 168 | HAL_IRDA_ERROR_BUSY = 0x20U /*!< Busy Error */ |
| AnnaBridge | 189:f392fc9709a3 | 169 | }HAL_IRDA_ErrorTypeDef; |
| AnnaBridge | 189:f392fc9709a3 | 170 | |
| AnnaBridge | 189:f392fc9709a3 | 171 | /** |
| AnnaBridge | 189:f392fc9709a3 | 172 | * @brief IRDA clock sources definition |
| AnnaBridge | 189:f392fc9709a3 | 173 | */ |
| AnnaBridge | 189:f392fc9709a3 | 174 | typedef enum |
| AnnaBridge | 189:f392fc9709a3 | 175 | { |
| AnnaBridge | 189:f392fc9709a3 | 176 | IRDA_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */ |
| AnnaBridge | 189:f392fc9709a3 | 177 | IRDA_CLOCKSOURCE_PCLK2 = 0x01U, /*!< PCLK2 clock source */ |
| AnnaBridge | 189:f392fc9709a3 | 178 | IRDA_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */ |
| AnnaBridge | 189:f392fc9709a3 | 179 | IRDA_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */ |
| AnnaBridge | 189:f392fc9709a3 | 180 | IRDA_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */ |
| AnnaBridge | 189:f392fc9709a3 | 181 | IRDA_CLOCKSOURCE_UNDEFINED = 0x10U /*!< Undefined clock source */ |
| AnnaBridge | 189:f392fc9709a3 | 182 | }IRDA_ClockSourceTypeDef; |
| AnnaBridge | 189:f392fc9709a3 | 183 | |
| AnnaBridge | 189:f392fc9709a3 | 184 | /** |
| AnnaBridge | 189:f392fc9709a3 | 185 | * @brief IRDA handle Structure definition |
| AnnaBridge | 189:f392fc9709a3 | 186 | */ |
| AnnaBridge | 189:f392fc9709a3 | 187 | typedef struct |
| AnnaBridge | 189:f392fc9709a3 | 188 | { |
| AnnaBridge | 189:f392fc9709a3 | 189 | USART_TypeDef *Instance; /*!< USART registers base address */ |
| AnnaBridge | 189:f392fc9709a3 | 190 | |
| AnnaBridge | 189:f392fc9709a3 | 191 | IRDA_InitTypeDef Init; /*!< IRDA communication parameters */ |
| AnnaBridge | 189:f392fc9709a3 | 192 | |
| AnnaBridge | 189:f392fc9709a3 | 193 | uint8_t *pTxBuffPtr; /*!< Pointer to IRDA Tx transfer Buffer */ |
| AnnaBridge | 189:f392fc9709a3 | 194 | |
| AnnaBridge | 189:f392fc9709a3 | 195 | uint16_t TxXferSize; /*!< IRDA Tx Transfer size */ |
| AnnaBridge | 189:f392fc9709a3 | 196 | |
| AnnaBridge | 189:f392fc9709a3 | 197 | __IO uint16_t TxXferCount; /*!< IRDA Tx Transfer Counter */ |
| AnnaBridge | 189:f392fc9709a3 | 198 | |
| AnnaBridge | 189:f392fc9709a3 | 199 | uint8_t *pRxBuffPtr; /*!< Pointer to IRDA Rx transfer Buffer */ |
| AnnaBridge | 189:f392fc9709a3 | 200 | |
| AnnaBridge | 189:f392fc9709a3 | 201 | uint16_t RxXferSize; /*!< IRDA Rx Transfer size */ |
| AnnaBridge | 189:f392fc9709a3 | 202 | |
| AnnaBridge | 189:f392fc9709a3 | 203 | __IO uint16_t RxXferCount; /*!< IRDA Rx Transfer Counter */ |
| AnnaBridge | 189:f392fc9709a3 | 204 | |
| AnnaBridge | 189:f392fc9709a3 | 205 | uint16_t Mask; /*!< USART RX RDR register mask */ |
| AnnaBridge | 189:f392fc9709a3 | 206 | |
| AnnaBridge | 189:f392fc9709a3 | 207 | DMA_HandleTypeDef *hdmatx; /*!< IRDA Tx DMA Handle parameters */ |
| AnnaBridge | 189:f392fc9709a3 | 208 | |
| AnnaBridge | 189:f392fc9709a3 | 209 | DMA_HandleTypeDef *hdmarx; /*!< IRDA Rx DMA Handle parameters */ |
| AnnaBridge | 189:f392fc9709a3 | 210 | |
| AnnaBridge | 189:f392fc9709a3 | 211 | HAL_LockTypeDef Lock; /*!< Locking object */ |
| AnnaBridge | 189:f392fc9709a3 | 212 | |
| AnnaBridge | 189:f392fc9709a3 | 213 | __IO HAL_IRDA_StateTypeDef gState; /*!< IRDA state information related to global Handle management |
| AnnaBridge | 189:f392fc9709a3 | 214 | and also related to Tx operations. |
| AnnaBridge | 189:f392fc9709a3 | 215 | This parameter can be a value of @ref HAL_IRDA_StateTypeDef */ |
| AnnaBridge | 189:f392fc9709a3 | 216 | |
| AnnaBridge | 189:f392fc9709a3 | 217 | __IO HAL_IRDA_StateTypeDef RxState; /*!< IRDA state information related to Rx operations. |
| AnnaBridge | 189:f392fc9709a3 | 218 | This parameter can be a value of @ref HAL_IRDA_StateTypeDef */ |
| AnnaBridge | 189:f392fc9709a3 | 219 | |
| AnnaBridge | 189:f392fc9709a3 | 220 | uint32_t ErrorCode; /*!< IRDA Error code */ |
| AnnaBridge | 189:f392fc9709a3 | 221 | |
| AnnaBridge | 189:f392fc9709a3 | 222 | }IRDA_HandleTypeDef; |
| AnnaBridge | 189:f392fc9709a3 | 223 | |
| AnnaBridge | 189:f392fc9709a3 | 224 | /** |
| AnnaBridge | 189:f392fc9709a3 | 225 | * @brief IRDA Configuration enumeration values definition |
| AnnaBridge | 189:f392fc9709a3 | 226 | */ |
| AnnaBridge | 189:f392fc9709a3 | 227 | typedef enum |
| AnnaBridge | 189:f392fc9709a3 | 228 | { |
| AnnaBridge | 189:f392fc9709a3 | 229 | IRDA_BAUDRATE = 0x00U, /*!< IRDA Baud rate */ |
| AnnaBridge | 189:f392fc9709a3 | 230 | IRDA_PARITY = 0x01U, /*!< IRDA frame parity */ |
| AnnaBridge | 189:f392fc9709a3 | 231 | IRDA_WORDLENGTH = 0x02U, /*!< IRDA frame length */ |
| AnnaBridge | 189:f392fc9709a3 | 232 | IRDA_MODE = 0x03U, /*!< IRDA communication mode */ |
| AnnaBridge | 189:f392fc9709a3 | 233 | IRDA_PRESCALER = 0x04U, /*!< IRDA prescaling */ |
| AnnaBridge | 189:f392fc9709a3 | 234 | IRDA_POWERMODE = 0x05U /*!< IRDA power mode */ |
| AnnaBridge | 189:f392fc9709a3 | 235 | }IRDA_ControlTypeDef; |
| AnnaBridge | 189:f392fc9709a3 | 236 | |
| AnnaBridge | 189:f392fc9709a3 | 237 | /** |
| AnnaBridge | 189:f392fc9709a3 | 238 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 239 | */ |
| AnnaBridge | 189:f392fc9709a3 | 240 | |
| AnnaBridge | 189:f392fc9709a3 | 241 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 242 | /** @defgroup IRDA_Exported_Constants IRDA Exported Constants |
| AnnaBridge | 189:f392fc9709a3 | 243 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 244 | */ |
| AnnaBridge | 189:f392fc9709a3 | 245 | |
| AnnaBridge | 189:f392fc9709a3 | 246 | /** @defgroup IRDA_Word_Length IRDA Word Length |
| AnnaBridge | 189:f392fc9709a3 | 247 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 248 | */ |
| AnnaBridge | 189:f392fc9709a3 | 249 | #define IRDA_WORDLENGTH_7B USART_CR1_M1 /*!< 7-bit long frame */ |
| AnnaBridge | 189:f392fc9709a3 | 250 | #define IRDA_WORDLENGTH_8B 0x00000000U /*!< 8-bit long frame */ |
| AnnaBridge | 189:f392fc9709a3 | 251 | #define IRDA_WORDLENGTH_9B USART_CR1_M0 /*!< 9-bit long frame */ |
| AnnaBridge | 189:f392fc9709a3 | 252 | /** |
| AnnaBridge | 189:f392fc9709a3 | 253 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 254 | */ |
| AnnaBridge | 189:f392fc9709a3 | 255 | |
| AnnaBridge | 189:f392fc9709a3 | 256 | /** @defgroup IRDA_Parity IRDA Parity |
| AnnaBridge | 189:f392fc9709a3 | 257 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 258 | */ |
| AnnaBridge | 189:f392fc9709a3 | 259 | #define IRDA_PARITY_NONE 0x00000000U /*!< No parity */ |
| AnnaBridge | 189:f392fc9709a3 | 260 | #define IRDA_PARITY_EVEN USART_CR1_PCE /*!< Even parity */ |
| AnnaBridge | 189:f392fc9709a3 | 261 | #define IRDA_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */ |
| AnnaBridge | 189:f392fc9709a3 | 262 | /** |
| AnnaBridge | 189:f392fc9709a3 | 263 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 264 | */ |
| AnnaBridge | 189:f392fc9709a3 | 265 | |
| AnnaBridge | 189:f392fc9709a3 | 266 | /** @defgroup IRDA_Transfer_Mode IRDA Transfer Mode |
| AnnaBridge | 189:f392fc9709a3 | 267 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 268 | */ |
| AnnaBridge | 189:f392fc9709a3 | 269 | #define IRDA_MODE_RX USART_CR1_RE /*!< RX mode */ |
| AnnaBridge | 189:f392fc9709a3 | 270 | #define IRDA_MODE_TX USART_CR1_TE /*!< TX mode */ |
| AnnaBridge | 189:f392fc9709a3 | 271 | #define IRDA_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */ |
| AnnaBridge | 189:f392fc9709a3 | 272 | /** |
| AnnaBridge | 189:f392fc9709a3 | 273 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 274 | */ |
| AnnaBridge | 189:f392fc9709a3 | 275 | |
| AnnaBridge | 189:f392fc9709a3 | 276 | /** @defgroup IRDA_Low_Power IRDA Low Power |
| AnnaBridge | 189:f392fc9709a3 | 277 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 278 | */ |
| AnnaBridge | 189:f392fc9709a3 | 279 | #define IRDA_POWERMODE_NORMAL 0x00000000U /*!< IRDA normal power mode */ |
| AnnaBridge | 189:f392fc9709a3 | 280 | #define IRDA_POWERMODE_LOWPOWER USART_CR3_IRLP /*!< IRDA low power mode */ |
| AnnaBridge | 189:f392fc9709a3 | 281 | /** |
| AnnaBridge | 189:f392fc9709a3 | 282 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 283 | */ |
| AnnaBridge | 189:f392fc9709a3 | 284 | |
| AnnaBridge | 189:f392fc9709a3 | 285 | #if defined(USART_PRESC_PRESCALER) |
| AnnaBridge | 189:f392fc9709a3 | 286 | /** @defgroup IRDA_ClockPrescaler Clock Prescaler |
| AnnaBridge | 189:f392fc9709a3 | 287 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 288 | */ |
| AnnaBridge | 189:f392fc9709a3 | 289 | #define IRDA_PRESCALER_DIV1 0x00000000U /*!< fclk_pres = fclk */ |
| AnnaBridge | 189:f392fc9709a3 | 290 | #define IRDA_PRESCALER_DIV2 0x00000001U /*!< fclk_pres = fclk/2 */ |
| AnnaBridge | 189:f392fc9709a3 | 291 | #define IRDA_PRESCALER_DIV4 0x00000002U /*!< fclk_pres = fclk/4 */ |
| AnnaBridge | 189:f392fc9709a3 | 292 | #define IRDA_PRESCALER_DIV6 0x00000003U /*!< fclk_pres = fclk/6 */ |
| AnnaBridge | 189:f392fc9709a3 | 293 | #define IRDA_PRESCALER_DIV8 0x00000004U /*!< fclk_pres = fclk/8 */ |
| AnnaBridge | 189:f392fc9709a3 | 294 | #define IRDA_PRESCALER_DIV10 0x00000005U /*!< fclk_pres = fclk/10 */ |
| AnnaBridge | 189:f392fc9709a3 | 295 | #define IRDA_PRESCALER_DIV12 0x00000006U /*!< fclk_pres = fclk/12 */ |
| AnnaBridge | 189:f392fc9709a3 | 296 | #define IRDA_PRESCALER_DIV16 0x00000007U /*!< fclk_pres = fclk/16 */ |
| AnnaBridge | 189:f392fc9709a3 | 297 | #define IRDA_PRESCALER_DIV32 0x00000008U /*!< fclk_pres = fclk/32 */ |
| AnnaBridge | 189:f392fc9709a3 | 298 | #define IRDA_PRESCALER_DIV64 0x00000009U /*!< fclk_pres = fclk/64 */ |
| AnnaBridge | 189:f392fc9709a3 | 299 | #define IRDA_PRESCALER_DIV128 0x0000000AU /*!< fclk_pres = fclk/128 */ |
| AnnaBridge | 189:f392fc9709a3 | 300 | #define IRDA_PRESCALER_DIV256 0x0000000BU /*!< fclk_pres = fclk/256 */ |
| AnnaBridge | 189:f392fc9709a3 | 301 | /** |
| AnnaBridge | 189:f392fc9709a3 | 302 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 303 | */ |
| AnnaBridge | 189:f392fc9709a3 | 304 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 305 | |
| AnnaBridge | 189:f392fc9709a3 | 306 | /** @defgroup IRDA_State IRDA State |
| AnnaBridge | 189:f392fc9709a3 | 307 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 308 | */ |
| AnnaBridge | 189:f392fc9709a3 | 309 | #define IRDA_STATE_DISABLE 0x00000000U /*!< IRDA disabled */ |
| AnnaBridge | 189:f392fc9709a3 | 310 | #define IRDA_STATE_ENABLE USART_CR1_UE /*!< IRDA enabled */ |
| AnnaBridge | 189:f392fc9709a3 | 311 | /** |
| AnnaBridge | 189:f392fc9709a3 | 312 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 313 | */ |
| AnnaBridge | 189:f392fc9709a3 | 314 | |
| AnnaBridge | 189:f392fc9709a3 | 315 | /** @defgroup IRDA_Mode IRDA Mode |
| AnnaBridge | 189:f392fc9709a3 | 316 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 317 | */ |
| AnnaBridge | 189:f392fc9709a3 | 318 | #define IRDA_MODE_DISABLE 0x00000000U /*!< Associated UART disabled in IRDA mode */ |
| AnnaBridge | 189:f392fc9709a3 | 319 | #define IRDA_MODE_ENABLE USART_CR3_IREN /*!< Associated UART enabled in IRDA mode */ |
| AnnaBridge | 189:f392fc9709a3 | 320 | /** |
| AnnaBridge | 189:f392fc9709a3 | 321 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 322 | */ |
| AnnaBridge | 189:f392fc9709a3 | 323 | |
| AnnaBridge | 189:f392fc9709a3 | 324 | /** @defgroup IRDA_One_Bit IRDA One Bit Sampling |
| AnnaBridge | 189:f392fc9709a3 | 325 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 326 | */ |
| AnnaBridge | 189:f392fc9709a3 | 327 | #define IRDA_ONE_BIT_SAMPLE_DISABLE 0x00000000U /*!< One-bit sampling disabled */ |
| AnnaBridge | 189:f392fc9709a3 | 328 | #define IRDA_ONE_BIT_SAMPLE_ENABLE USART_CR3_ONEBIT /*!< One-bit sampling enabled */ |
| AnnaBridge | 189:f392fc9709a3 | 329 | /** |
| AnnaBridge | 189:f392fc9709a3 | 330 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 331 | */ |
| AnnaBridge | 189:f392fc9709a3 | 332 | |
| AnnaBridge | 189:f392fc9709a3 | 333 | /** @defgroup IRDA_DMA_Tx IRDA DMA Tx |
| AnnaBridge | 189:f392fc9709a3 | 334 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 335 | */ |
| AnnaBridge | 189:f392fc9709a3 | 336 | #define IRDA_DMA_TX_DISABLE 0x00000000U /*!< IRDA DMA TX disabled */ |
| AnnaBridge | 189:f392fc9709a3 | 337 | #define IRDA_DMA_TX_ENABLE USART_CR3_DMAT /*!< IRDA DMA TX enabled */ |
| AnnaBridge | 189:f392fc9709a3 | 338 | /** |
| AnnaBridge | 189:f392fc9709a3 | 339 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 340 | */ |
| AnnaBridge | 189:f392fc9709a3 | 341 | |
| AnnaBridge | 189:f392fc9709a3 | 342 | /** @defgroup IRDA_DMA_Rx IRDA DMA Rx |
| AnnaBridge | 189:f392fc9709a3 | 343 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 344 | */ |
| AnnaBridge | 189:f392fc9709a3 | 345 | #define IRDA_DMA_RX_DISABLE 0x00000000U /*!< IRDA DMA RX disabled */ |
| AnnaBridge | 189:f392fc9709a3 | 346 | #define IRDA_DMA_RX_ENABLE USART_CR3_DMAR /*!< IRDA DMA RX enabled */ |
| AnnaBridge | 189:f392fc9709a3 | 347 | /** |
| AnnaBridge | 189:f392fc9709a3 | 348 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 349 | */ |
| AnnaBridge | 189:f392fc9709a3 | 350 | |
| AnnaBridge | 189:f392fc9709a3 | 351 | /** @defgroup IRDA_Request_Parameters IRDA Request Parameters |
| AnnaBridge | 189:f392fc9709a3 | 352 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 353 | */ |
| AnnaBridge | 189:f392fc9709a3 | 354 | #define IRDA_AUTOBAUD_REQUEST USART_RQR_ABRRQ /*!< Auto-Baud Rate Request */ |
| AnnaBridge | 189:f392fc9709a3 | 355 | #define IRDA_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */ |
| AnnaBridge | 189:f392fc9709a3 | 356 | #define IRDA_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */ |
| AnnaBridge | 189:f392fc9709a3 | 357 | /** |
| AnnaBridge | 189:f392fc9709a3 | 358 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 359 | */ |
| AnnaBridge | 189:f392fc9709a3 | 360 | |
| AnnaBridge | 189:f392fc9709a3 | 361 | /** @defgroup IRDA_Flags IRDA Flags |
| AnnaBridge | 189:f392fc9709a3 | 362 | * Elements values convention: 0xXXXX |
| AnnaBridge | 189:f392fc9709a3 | 363 | * - 0xXXXX : Flag mask in the ISR register |
| AnnaBridge | 189:f392fc9709a3 | 364 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 365 | */ |
| AnnaBridge | 189:f392fc9709a3 | 366 | #define IRDA_FLAG_REACK USART_ISR_REACK /*!< IRDA receive enable acknowledge flag */ |
| AnnaBridge | 189:f392fc9709a3 | 367 | #define IRDA_FLAG_TEACK USART_ISR_TEACK /*!< IRDA transmit enable acknowledge flag */ |
| AnnaBridge | 189:f392fc9709a3 | 368 | #define IRDA_FLAG_BUSY USART_ISR_BUSY /*!< IRDA busy flag */ |
| AnnaBridge | 189:f392fc9709a3 | 369 | #define IRDA_FLAG_ABRF USART_ISR_ABRF /*!< IRDA auto Baud rate flag */ |
| AnnaBridge | 189:f392fc9709a3 | 370 | #define IRDA_FLAG_ABRE USART_ISR_ABRE /*!< IRDA auto Baud rate error */ |
| AnnaBridge | 189:f392fc9709a3 | 371 | #if defined(USART_CR1_FIFOEN) |
| AnnaBridge | 189:f392fc9709a3 | 372 | #define IRDA_FLAG_TXE USART_ISR_TXE_TXFNF /*!< IRDA transmit data register empty */ |
| AnnaBridge | 189:f392fc9709a3 | 373 | #else |
| AnnaBridge | 189:f392fc9709a3 | 374 | #define IRDA_FLAG_TXE USART_ISR_TXE /*!< IRDA transmit data register empty */ |
| AnnaBridge | 189:f392fc9709a3 | 375 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 376 | #define IRDA_FLAG_TC USART_ISR_TC /*!< IRDA transmission complete */ |
| AnnaBridge | 189:f392fc9709a3 | 377 | #if defined(USART_CR1_FIFOEN) |
| AnnaBridge | 189:f392fc9709a3 | 378 | #define IRDA_FLAG_RXNE USART_ISR_RXNE_RXFNE /*!< IRDA read data register not empty */ |
| AnnaBridge | 189:f392fc9709a3 | 379 | #else |
| AnnaBridge | 189:f392fc9709a3 | 380 | #define IRDA_FLAG_RXNE USART_ISR_RXNE /*!< IRDA read data register not empty */ |
| AnnaBridge | 189:f392fc9709a3 | 381 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 382 | #define IRDA_FLAG_ORE USART_ISR_ORE /*!< IRDA overrun error */ |
| AnnaBridge | 189:f392fc9709a3 | 383 | #define IRDA_FLAG_NE USART_ISR_NE /*!< IRDA noise error */ |
| AnnaBridge | 189:f392fc9709a3 | 384 | #define IRDA_FLAG_FE USART_ISR_FE /*!< IRDA frame error */ |
| AnnaBridge | 189:f392fc9709a3 | 385 | #define IRDA_FLAG_PE USART_ISR_PE /*!< IRDA parity error */ |
| AnnaBridge | 189:f392fc9709a3 | 386 | /** |
| AnnaBridge | 189:f392fc9709a3 | 387 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 388 | */ |
| AnnaBridge | 189:f392fc9709a3 | 389 | |
| AnnaBridge | 189:f392fc9709a3 | 390 | /** @defgroup IRDA_Interrupt_definition IRDA Interrupts Definition |
| AnnaBridge | 189:f392fc9709a3 | 391 | * Elements values convention: 0000ZZZZ0XXYYYYYb |
| AnnaBridge | 189:f392fc9709a3 | 392 | * - YYYYY : Interrupt source position in the XX register (5bits) |
| AnnaBridge | 189:f392fc9709a3 | 393 | * - XX : Interrupt source register (2bits) |
| AnnaBridge | 189:f392fc9709a3 | 394 | * - 01: CR1 register |
| AnnaBridge | 189:f392fc9709a3 | 395 | * - 10: CR2 register |
| AnnaBridge | 189:f392fc9709a3 | 396 | * - 11: CR3 register |
| AnnaBridge | 189:f392fc9709a3 | 397 | * - ZZZZ : Flag position in the ISR register(4bits) |
| AnnaBridge | 189:f392fc9709a3 | 398 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 399 | */ |
| AnnaBridge | 189:f392fc9709a3 | 400 | #define IRDA_IT_PE 0x0028U /*!< IRDA Parity error interruption */ |
| AnnaBridge | 189:f392fc9709a3 | 401 | #define IRDA_IT_TXE 0x0727U /*!< IRDA Transmit data register empty interruption */ |
| AnnaBridge | 189:f392fc9709a3 | 402 | #define IRDA_IT_TC 0x0626U /*!< IRDA Transmission complete interruption */ |
| AnnaBridge | 189:f392fc9709a3 | 403 | #define IRDA_IT_RXNE 0x0525U /*!< IRDA Read data register not empty interruption */ |
| AnnaBridge | 189:f392fc9709a3 | 404 | #define IRDA_IT_IDLE 0x0424U /*!< IRDA Idle interruption */ |
| AnnaBridge | 189:f392fc9709a3 | 405 | |
| AnnaBridge | 189:f392fc9709a3 | 406 | /* Elements values convention: 000000000XXYYYYYb |
| AnnaBridge | 189:f392fc9709a3 | 407 | - YYYYY : Interrupt source position in the XX register (5bits) |
| AnnaBridge | 189:f392fc9709a3 | 408 | - XX : Interrupt source register (2bits) |
| AnnaBridge | 189:f392fc9709a3 | 409 | - 01: CR1 register |
| AnnaBridge | 189:f392fc9709a3 | 410 | - 10: CR2 register |
| AnnaBridge | 189:f392fc9709a3 | 411 | - 11: CR3 register */ |
| AnnaBridge | 189:f392fc9709a3 | 412 | #define IRDA_IT_ERR 0x0060U /*!< IRDA Error interruption */ |
| AnnaBridge | 189:f392fc9709a3 | 413 | |
| AnnaBridge | 189:f392fc9709a3 | 414 | /* Elements values convention: 0000ZZZZ00000000b |
| AnnaBridge | 189:f392fc9709a3 | 415 | - ZZZZ : Flag position in the ISR register(4bits) */ |
| AnnaBridge | 189:f392fc9709a3 | 416 | #define IRDA_IT_ORE 0x0300U /*!< IRDA Overrun error interruption */ |
| AnnaBridge | 189:f392fc9709a3 | 417 | #define IRDA_IT_NE 0x0200U /*!< IRDA Noise error interruption */ |
| AnnaBridge | 189:f392fc9709a3 | 418 | #define IRDA_IT_FE 0x0100U /*!< IRDA Frame error interruption */ |
| AnnaBridge | 189:f392fc9709a3 | 419 | /** |
| AnnaBridge | 189:f392fc9709a3 | 420 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 421 | */ |
| AnnaBridge | 189:f392fc9709a3 | 422 | |
| AnnaBridge | 189:f392fc9709a3 | 423 | /** @defgroup IRDA_IT_CLEAR_Flags IRDA Interruption Clear Flags |
| AnnaBridge | 189:f392fc9709a3 | 424 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 425 | */ |
| AnnaBridge | 189:f392fc9709a3 | 426 | #define IRDA_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */ |
| AnnaBridge | 189:f392fc9709a3 | 427 | #define IRDA_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */ |
| AnnaBridge | 189:f392fc9709a3 | 428 | #define IRDA_CLEAR_NEF USART_ICR_NECF /*!< Noise detected Clear Flag */ |
| AnnaBridge | 189:f392fc9709a3 | 429 | #define IRDA_CLEAR_OREF USART_ICR_ORECF /*!< OverRun Error Clear Flag */ |
| AnnaBridge | 189:f392fc9709a3 | 430 | #define IRDA_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */ |
| AnnaBridge | 189:f392fc9709a3 | 431 | #define IRDA_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */ |
| AnnaBridge | 189:f392fc9709a3 | 432 | /** |
| AnnaBridge | 189:f392fc9709a3 | 433 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 434 | */ |
| AnnaBridge | 189:f392fc9709a3 | 435 | |
| AnnaBridge | 189:f392fc9709a3 | 436 | /** @defgroup IRDA_Interruption_Mask IRDA interruptions flags mask |
| AnnaBridge | 189:f392fc9709a3 | 437 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 438 | */ |
| AnnaBridge | 189:f392fc9709a3 | 439 | #define IRDA_IT_MASK 0x001FU /*!< IRDA Interruptions flags mask */ |
| AnnaBridge | 189:f392fc9709a3 | 440 | /** |
| AnnaBridge | 189:f392fc9709a3 | 441 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 442 | */ |
| AnnaBridge | 189:f392fc9709a3 | 443 | |
| AnnaBridge | 189:f392fc9709a3 | 444 | /** |
| AnnaBridge | 189:f392fc9709a3 | 445 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 446 | */ |
| AnnaBridge | 189:f392fc9709a3 | 447 | |
| AnnaBridge | 189:f392fc9709a3 | 448 | |
| AnnaBridge | 189:f392fc9709a3 | 449 | /* Exported macros -----------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 450 | /** @defgroup IRDA_Exported_Macros IRDA Exported Macros |
| AnnaBridge | 189:f392fc9709a3 | 451 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 452 | */ |
| AnnaBridge | 189:f392fc9709a3 | 453 | |
| AnnaBridge | 189:f392fc9709a3 | 454 | /** @brief Reset IRDA handle state. |
| AnnaBridge | 189:f392fc9709a3 | 455 | * @param __HANDLE__ IRDA handle. |
| AnnaBridge | 189:f392fc9709a3 | 456 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 457 | */ |
| AnnaBridge | 189:f392fc9709a3 | 458 | #define __HAL_IRDA_RESET_HANDLE_STATE(__HANDLE__) do{ \ |
| AnnaBridge | 189:f392fc9709a3 | 459 | (__HANDLE__)->gState = HAL_IRDA_STATE_RESET; \ |
| AnnaBridge | 189:f392fc9709a3 | 460 | (__HANDLE__)->RxState = HAL_IRDA_STATE_RESET; \ |
| AnnaBridge | 189:f392fc9709a3 | 461 | } while(0) |
| AnnaBridge | 189:f392fc9709a3 | 462 | |
| AnnaBridge | 189:f392fc9709a3 | 463 | /** @brief Flush the IRDA DR register. |
| AnnaBridge | 189:f392fc9709a3 | 464 | * @param __HANDLE__ specifies the IRDA Handle. |
| AnnaBridge | 189:f392fc9709a3 | 465 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 466 | */ |
| AnnaBridge | 189:f392fc9709a3 | 467 | #define __HAL_IRDA_FLUSH_DRREGISTER(__HANDLE__) \ |
| AnnaBridge | 189:f392fc9709a3 | 468 | do{ \ |
| AnnaBridge | 189:f392fc9709a3 | 469 | SET_BIT((__HANDLE__)->Instance->RQR, IRDA_RXDATA_FLUSH_REQUEST); \ |
| AnnaBridge | 189:f392fc9709a3 | 470 | SET_BIT((__HANDLE__)->Instance->RQR, IRDA_TXDATA_FLUSH_REQUEST); \ |
| AnnaBridge | 189:f392fc9709a3 | 471 | } while(0) |
| AnnaBridge | 189:f392fc9709a3 | 472 | |
| AnnaBridge | 189:f392fc9709a3 | 473 | /** @brief Clear the specified IRDA pending flag. |
| AnnaBridge | 189:f392fc9709a3 | 474 | * @param __HANDLE__ specifies the IRDA Handle. |
| AnnaBridge | 189:f392fc9709a3 | 475 | * @param __FLAG__ specifies the flag to check. |
| AnnaBridge | 189:f392fc9709a3 | 476 | * This parameter can be any combination of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 477 | * @arg @ref IRDA_CLEAR_PEF |
| AnnaBridge | 189:f392fc9709a3 | 478 | * @arg @ref IRDA_CLEAR_FEF |
| AnnaBridge | 189:f392fc9709a3 | 479 | * @arg @ref IRDA_CLEAR_NEF |
| AnnaBridge | 189:f392fc9709a3 | 480 | * @arg @ref IRDA_CLEAR_OREF |
| AnnaBridge | 189:f392fc9709a3 | 481 | * @arg @ref IRDA_CLEAR_TCF |
| AnnaBridge | 189:f392fc9709a3 | 482 | * @arg @ref IRDA_CLEAR_IDLEF |
| AnnaBridge | 189:f392fc9709a3 | 483 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 484 | */ |
| AnnaBridge | 189:f392fc9709a3 | 485 | #define __HAL_IRDA_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__)) |
| AnnaBridge | 189:f392fc9709a3 | 486 | |
| AnnaBridge | 189:f392fc9709a3 | 487 | /** @brief Clear the IRDA PE pending flag. |
| AnnaBridge | 189:f392fc9709a3 | 488 | * @param __HANDLE__ specifies the IRDA Handle. |
| AnnaBridge | 189:f392fc9709a3 | 489 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 490 | */ |
| AnnaBridge | 189:f392fc9709a3 | 491 | #define __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_PEF) |
| AnnaBridge | 189:f392fc9709a3 | 492 | |
| AnnaBridge | 189:f392fc9709a3 | 493 | |
| AnnaBridge | 189:f392fc9709a3 | 494 | /** @brief Clear the IRDA FE pending flag. |
| AnnaBridge | 189:f392fc9709a3 | 495 | * @param __HANDLE__ specifies the IRDA Handle. |
| AnnaBridge | 189:f392fc9709a3 | 496 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 497 | */ |
| AnnaBridge | 189:f392fc9709a3 | 498 | #define __HAL_IRDA_CLEAR_FEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_FEF) |
| AnnaBridge | 189:f392fc9709a3 | 499 | |
| AnnaBridge | 189:f392fc9709a3 | 500 | /** @brief Clear the IRDA NE pending flag. |
| AnnaBridge | 189:f392fc9709a3 | 501 | * @param __HANDLE__ specifies the IRDA Handle. |
| AnnaBridge | 189:f392fc9709a3 | 502 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 503 | */ |
| AnnaBridge | 189:f392fc9709a3 | 504 | #define __HAL_IRDA_CLEAR_NEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_NEF) |
| AnnaBridge | 189:f392fc9709a3 | 505 | |
| AnnaBridge | 189:f392fc9709a3 | 506 | /** @brief Clear the IRDA ORE pending flag. |
| AnnaBridge | 189:f392fc9709a3 | 507 | * @param __HANDLE__ specifies the IRDA Handle. |
| AnnaBridge | 189:f392fc9709a3 | 508 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 509 | */ |
| AnnaBridge | 189:f392fc9709a3 | 510 | #define __HAL_IRDA_CLEAR_OREFLAG(__HANDLE__) __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_OREF) |
| AnnaBridge | 189:f392fc9709a3 | 511 | |
| AnnaBridge | 189:f392fc9709a3 | 512 | /** @brief Clear the IRDA IDLE pending flag. |
| AnnaBridge | 189:f392fc9709a3 | 513 | * @param __HANDLE__ specifies the IRDA Handle. |
| AnnaBridge | 189:f392fc9709a3 | 514 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 515 | */ |
| AnnaBridge | 189:f392fc9709a3 | 516 | #define __HAL_IRDA_CLEAR_IDLEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_FLAG((__HANDLE__), IRDA_CLEAR_IDLEF) |
| AnnaBridge | 189:f392fc9709a3 | 517 | |
| AnnaBridge | 189:f392fc9709a3 | 518 | /** @brief Check whether the specified IRDA flag is set or not. |
| AnnaBridge | 189:f392fc9709a3 | 519 | * @param __HANDLE__ specifies the IRDA Handle. |
| AnnaBridge | 189:f392fc9709a3 | 520 | * @param __FLAG__ specifies the flag to check. |
| AnnaBridge | 189:f392fc9709a3 | 521 | * This parameter can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 522 | * @arg @ref IRDA_FLAG_REACK Receive enable acknowledge flag |
| AnnaBridge | 189:f392fc9709a3 | 523 | * @arg @ref IRDA_FLAG_TEACK Transmit enable acknowledge flag |
| AnnaBridge | 189:f392fc9709a3 | 524 | * @arg @ref IRDA_FLAG_BUSY Busy flag |
| AnnaBridge | 189:f392fc9709a3 | 525 | * @arg @ref IRDA_FLAG_ABRF Auto Baud rate detection flag |
| AnnaBridge | 189:f392fc9709a3 | 526 | * @arg @ref IRDA_FLAG_ABRE Auto Baud rate detection error flag |
| AnnaBridge | 189:f392fc9709a3 | 527 | * @arg @ref IRDA_FLAG_TXE Transmit data register empty flag |
| AnnaBridge | 189:f392fc9709a3 | 528 | * @arg @ref IRDA_FLAG_TC Transmission Complete flag |
| AnnaBridge | 189:f392fc9709a3 | 529 | * @arg @ref IRDA_FLAG_RXNE Receive data register not empty flag |
| AnnaBridge | 189:f392fc9709a3 | 530 | * @arg @ref IRDA_FLAG_ORE OverRun Error flag |
| AnnaBridge | 189:f392fc9709a3 | 531 | * @arg @ref IRDA_FLAG_NE Noise Error flag |
| AnnaBridge | 189:f392fc9709a3 | 532 | * @arg @ref IRDA_FLAG_FE Framing Error flag |
| AnnaBridge | 189:f392fc9709a3 | 533 | * @arg @ref IRDA_FLAG_PE Parity Error flag |
| AnnaBridge | 189:f392fc9709a3 | 534 | * @retval The new state of __FLAG__ (TRUE or FALSE). |
| AnnaBridge | 189:f392fc9709a3 | 535 | */ |
| AnnaBridge | 189:f392fc9709a3 | 536 | #define __HAL_IRDA_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__)) |
| AnnaBridge | 189:f392fc9709a3 | 537 | |
| AnnaBridge | 189:f392fc9709a3 | 538 | |
| AnnaBridge | 189:f392fc9709a3 | 539 | /** @brief Enable the specified IRDA interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 540 | * @param __HANDLE__ specifies the IRDA Handle. |
| AnnaBridge | 189:f392fc9709a3 | 541 | * @param __INTERRUPT__ specifies the IRDA interrupt source to enable. |
| AnnaBridge | 189:f392fc9709a3 | 542 | * This parameter can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 543 | * @arg @ref IRDA_IT_TXE Transmit Data Register empty interrupt |
| AnnaBridge | 189:f392fc9709a3 | 544 | * @arg @ref IRDA_IT_TC Transmission complete interrupt |
| AnnaBridge | 189:f392fc9709a3 | 545 | * @arg @ref IRDA_IT_RXNE Receive Data register not empty interrupt |
| AnnaBridge | 189:f392fc9709a3 | 546 | * @arg @ref IRDA_IT_IDLE Idle line detection interrupt |
| AnnaBridge | 189:f392fc9709a3 | 547 | * @arg @ref IRDA_IT_PE Parity Error interrupt |
| AnnaBridge | 189:f392fc9709a3 | 548 | * @arg @ref IRDA_IT_ERR Error interrupt(Frame error, noise error, overrun error) |
| AnnaBridge | 189:f392fc9709a3 | 549 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 550 | */ |
| AnnaBridge | 189:f392fc9709a3 | 551 | #define __HAL_IRDA_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & IRDA_IT_MASK))): \ |
| AnnaBridge | 189:f392fc9709a3 | 552 | ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & IRDA_IT_MASK))): \ |
| AnnaBridge | 189:f392fc9709a3 | 553 | ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & IRDA_IT_MASK)))) |
| AnnaBridge | 189:f392fc9709a3 | 554 | |
| AnnaBridge | 189:f392fc9709a3 | 555 | /** @brief Disable the specified IRDA interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 556 | * @param __HANDLE__ specifies the IRDA Handle. |
| AnnaBridge | 189:f392fc9709a3 | 557 | * @param __INTERRUPT__ specifies the IRDA interrupt source to disable. |
| AnnaBridge | 189:f392fc9709a3 | 558 | * This parameter can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 559 | * @arg @ref IRDA_IT_TXE Transmit Data Register empty interrupt |
| AnnaBridge | 189:f392fc9709a3 | 560 | * @arg @ref IRDA_IT_TC Transmission complete interrupt |
| AnnaBridge | 189:f392fc9709a3 | 561 | * @arg @ref IRDA_IT_RXNE Receive Data register not empty interrupt |
| AnnaBridge | 189:f392fc9709a3 | 562 | * @arg @ref IRDA_IT_IDLE Idle line detection interrupt |
| AnnaBridge | 189:f392fc9709a3 | 563 | * @arg @ref IRDA_IT_PE Parity Error interrupt |
| AnnaBridge | 189:f392fc9709a3 | 564 | * @arg @ref IRDA_IT_ERR Error interrupt(Frame error, noise error, overrun error) |
| AnnaBridge | 189:f392fc9709a3 | 565 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 566 | */ |
| AnnaBridge | 189:f392fc9709a3 | 567 | #define __HAL_IRDA_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & IRDA_IT_MASK))): \ |
| AnnaBridge | 189:f392fc9709a3 | 568 | ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & IRDA_IT_MASK))): \ |
| AnnaBridge | 189:f392fc9709a3 | 569 | ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & IRDA_IT_MASK)))) |
| AnnaBridge | 189:f392fc9709a3 | 570 | |
| AnnaBridge | 189:f392fc9709a3 | 571 | |
| AnnaBridge | 189:f392fc9709a3 | 572 | /** @brief Check whether the specified IRDA interrupt has occurred or not. |
| AnnaBridge | 189:f392fc9709a3 | 573 | * @param __HANDLE__ specifies the IRDA Handle. |
| AnnaBridge | 189:f392fc9709a3 | 574 | * @param __INTERRUPT__ specifies the IRDA interrupt source to check. |
| AnnaBridge | 189:f392fc9709a3 | 575 | * This parameter can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 576 | * @arg @ref IRDA_IT_TXE Transmit Data Register empty interrupt |
| AnnaBridge | 189:f392fc9709a3 | 577 | * @arg @ref IRDA_IT_TC Transmission complete interrupt |
| AnnaBridge | 189:f392fc9709a3 | 578 | * @arg @ref IRDA_IT_RXNE Receive Data register not empty interrupt |
| AnnaBridge | 189:f392fc9709a3 | 579 | * @arg @ref IRDA_IT_IDLE Idle line detection interrupt |
| AnnaBridge | 189:f392fc9709a3 | 580 | * @arg @ref IRDA_IT_ORE OverRun Error interrupt |
| AnnaBridge | 189:f392fc9709a3 | 581 | * @arg @ref IRDA_IT_NE Noise Error interrupt |
| AnnaBridge | 189:f392fc9709a3 | 582 | * @arg @ref IRDA_IT_FE Framing Error interrupt |
| AnnaBridge | 189:f392fc9709a3 | 583 | * @arg @ref IRDA_IT_PE Parity Error interrupt |
| AnnaBridge | 189:f392fc9709a3 | 584 | * @retval The new state of __IT__ (SET or RESET). |
| AnnaBridge | 189:f392fc9709a3 | 585 | */ |
| AnnaBridge | 189:f392fc9709a3 | 586 | #define __HAL_IRDA_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR & (0x01U << ((__INTERRUPT__)>> 0x08U))) != RESET) ? SET : RESET) |
| AnnaBridge | 189:f392fc9709a3 | 587 | |
| AnnaBridge | 189:f392fc9709a3 | 588 | /** @brief Check whether the specified IRDA interrupt source is enabled or not. |
| AnnaBridge | 189:f392fc9709a3 | 589 | * @param __HANDLE__ specifies the IRDA Handle. |
| AnnaBridge | 189:f392fc9709a3 | 590 | * @param __INTERRUPT__ specifies the IRDA interrupt source to check. |
| AnnaBridge | 189:f392fc9709a3 | 591 | * This parameter can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 592 | * @arg @ref IRDA_IT_TXE Transmit Data Register empty interrupt |
| AnnaBridge | 189:f392fc9709a3 | 593 | * @arg @ref IRDA_IT_TC Transmission complete interrupt |
| AnnaBridge | 189:f392fc9709a3 | 594 | * @arg @ref IRDA_IT_RXNE Receive Data register not empty interrupt |
| AnnaBridge | 189:f392fc9709a3 | 595 | * @arg @ref IRDA_IT_IDLE Idle line detection interrupt |
| AnnaBridge | 189:f392fc9709a3 | 596 | * @arg @ref IRDA_IT_ERR Framing, overrun or noise error interrupt |
| AnnaBridge | 189:f392fc9709a3 | 597 | * @arg @ref IRDA_IT_PE Parity Error interrupt |
| AnnaBridge | 189:f392fc9709a3 | 598 | * @retval The new state of __IT__ (SET or RESET). |
| AnnaBridge | 189:f392fc9709a3 | 599 | */ |
| AnnaBridge | 189:f392fc9709a3 | 600 | #define __HAL_IRDA_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 0x05U) == 0x01U)? (__HANDLE__)->Instance->CR1 : \ |
| AnnaBridge | 189:f392fc9709a3 | 601 | (((((uint8_t)(__INTERRUPT__)) >> 0x05U) == 0x02U)? (__HANDLE__)->Instance->CR2 : \ |
| AnnaBridge | 189:f392fc9709a3 | 602 | (__HANDLE__)->Instance->CR3)) & (0x01U << (((uint16_t)(__INTERRUPT__)) & IRDA_IT_MASK))) != RESET) ? SET : RESET) |
| AnnaBridge | 189:f392fc9709a3 | 603 | |
| AnnaBridge | 189:f392fc9709a3 | 604 | /** @brief Clear the specified IRDA ISR flag, in setting the proper ICR register flag. |
| AnnaBridge | 189:f392fc9709a3 | 605 | * @param __HANDLE__ specifies the IRDA Handle. |
| AnnaBridge | 189:f392fc9709a3 | 606 | * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set |
| AnnaBridge | 189:f392fc9709a3 | 607 | * to clear the corresponding interrupt |
| AnnaBridge | 189:f392fc9709a3 | 608 | * This parameter can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 609 | * @arg @ref IRDA_CLEAR_PEF Parity Error Clear Flag |
| AnnaBridge | 189:f392fc9709a3 | 610 | * @arg @ref IRDA_CLEAR_FEF Framing Error Clear Flag |
| AnnaBridge | 189:f392fc9709a3 | 611 | * @arg @ref IRDA_CLEAR_NEF Noise detected Clear Flag |
| AnnaBridge | 189:f392fc9709a3 | 612 | * @arg @ref IRDA_CLEAR_OREF OverRun Error Clear Flag |
| AnnaBridge | 189:f392fc9709a3 | 613 | * @arg @ref IRDA_CLEAR_TCF Transmission Complete Clear Flag |
| AnnaBridge | 189:f392fc9709a3 | 614 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 615 | */ |
| AnnaBridge | 189:f392fc9709a3 | 616 | #define __HAL_IRDA_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__)) |
| AnnaBridge | 189:f392fc9709a3 | 617 | |
| AnnaBridge | 189:f392fc9709a3 | 618 | |
| AnnaBridge | 189:f392fc9709a3 | 619 | /** @brief Set a specific IRDA request flag. |
| AnnaBridge | 189:f392fc9709a3 | 620 | * @param __HANDLE__ specifies the IRDA Handle. |
| AnnaBridge | 189:f392fc9709a3 | 621 | * @param __REQ__ specifies the request flag to set |
| AnnaBridge | 189:f392fc9709a3 | 622 | * This parameter can be one of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 623 | * @arg @ref IRDA_AUTOBAUD_REQUEST Auto-Baud Rate Request |
| AnnaBridge | 189:f392fc9709a3 | 624 | * @arg @ref IRDA_RXDATA_FLUSH_REQUEST Receive Data flush Request |
| AnnaBridge | 189:f392fc9709a3 | 625 | * @arg @ref IRDA_TXDATA_FLUSH_REQUEST Transmit data flush Request |
| AnnaBridge | 189:f392fc9709a3 | 626 | * |
| AnnaBridge | 189:f392fc9709a3 | 627 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 628 | */ |
| AnnaBridge | 189:f392fc9709a3 | 629 | #define __HAL_IRDA_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__)) |
| AnnaBridge | 189:f392fc9709a3 | 630 | |
| AnnaBridge | 189:f392fc9709a3 | 631 | /** @brief Enable the IRDA one bit sample method. |
| AnnaBridge | 189:f392fc9709a3 | 632 | * @param __HANDLE__ specifies the IRDA Handle. |
| AnnaBridge | 189:f392fc9709a3 | 633 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 634 | */ |
| AnnaBridge | 189:f392fc9709a3 | 635 | #define __HAL_IRDA_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT) |
| AnnaBridge | 189:f392fc9709a3 | 636 | |
| AnnaBridge | 189:f392fc9709a3 | 637 | /** @brief Disable the IRDA one bit sample method. |
| AnnaBridge | 189:f392fc9709a3 | 638 | * @param __HANDLE__ specifies the IRDA Handle. |
| AnnaBridge | 189:f392fc9709a3 | 639 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 640 | */ |
| AnnaBridge | 189:f392fc9709a3 | 641 | #define __HAL_IRDA_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_ONEBIT)) |
| AnnaBridge | 189:f392fc9709a3 | 642 | |
| AnnaBridge | 189:f392fc9709a3 | 643 | /** @brief Enable UART/USART associated to IRDA Handle. |
| AnnaBridge | 189:f392fc9709a3 | 644 | * @param __HANDLE__ specifies the IRDA Handle. |
| AnnaBridge | 189:f392fc9709a3 | 645 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 646 | */ |
| AnnaBridge | 189:f392fc9709a3 | 647 | #define __HAL_IRDA_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE) |
| AnnaBridge | 189:f392fc9709a3 | 648 | |
| AnnaBridge | 189:f392fc9709a3 | 649 | /** @brief Disable UART/USART associated to IRDA Handle. |
| AnnaBridge | 189:f392fc9709a3 | 650 | * @param __HANDLE__ specifies the IRDA Handle. |
| AnnaBridge | 189:f392fc9709a3 | 651 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 652 | */ |
| AnnaBridge | 189:f392fc9709a3 | 653 | #define __HAL_IRDA_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE) |
| AnnaBridge | 189:f392fc9709a3 | 654 | |
| AnnaBridge | 189:f392fc9709a3 | 655 | /** |
| AnnaBridge | 189:f392fc9709a3 | 656 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 657 | */ |
| AnnaBridge | 189:f392fc9709a3 | 658 | |
| AnnaBridge | 189:f392fc9709a3 | 659 | /* Private macros --------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 660 | /** @defgroup IRDA_Private_Macros IRDA Private Macros |
| AnnaBridge | 189:f392fc9709a3 | 661 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 662 | */ |
| AnnaBridge | 189:f392fc9709a3 | 663 | |
| AnnaBridge | 189:f392fc9709a3 | 664 | /** @brief Compute the mask to apply to retrieve the received data |
| AnnaBridge | 189:f392fc9709a3 | 665 | * according to the word length and to the parity bits activation. |
| AnnaBridge | 189:f392fc9709a3 | 666 | * @param __HANDLE__ specifies the IRDA Handle. |
| AnnaBridge | 189:f392fc9709a3 | 667 | * @retval None, the mask to apply to the associated UART RDR register is stored in (__HANDLE__)->Mask field. |
| AnnaBridge | 189:f392fc9709a3 | 668 | */ |
| AnnaBridge | 189:f392fc9709a3 | 669 | #define IRDA_MASK_COMPUTATION(__HANDLE__) \ |
| AnnaBridge | 189:f392fc9709a3 | 670 | do { \ |
| AnnaBridge | 189:f392fc9709a3 | 671 | if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_9B) \ |
| AnnaBridge | 189:f392fc9709a3 | 672 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 673 | if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE) \ |
| AnnaBridge | 189:f392fc9709a3 | 674 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 675 | (__HANDLE__)->Mask = 0x01FF ; \ |
| AnnaBridge | 189:f392fc9709a3 | 676 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 677 | else \ |
| AnnaBridge | 189:f392fc9709a3 | 678 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 679 | (__HANDLE__)->Mask = 0x00FF ; \ |
| AnnaBridge | 189:f392fc9709a3 | 680 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 681 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 682 | else if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_8B) \ |
| AnnaBridge | 189:f392fc9709a3 | 683 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 684 | if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE) \ |
| AnnaBridge | 189:f392fc9709a3 | 685 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 686 | (__HANDLE__)->Mask = 0x00FF ; \ |
| AnnaBridge | 189:f392fc9709a3 | 687 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 688 | else \ |
| AnnaBridge | 189:f392fc9709a3 | 689 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 690 | (__HANDLE__)->Mask = 0x007F ; \ |
| AnnaBridge | 189:f392fc9709a3 | 691 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 692 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 693 | else if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_7B) \ |
| AnnaBridge | 189:f392fc9709a3 | 694 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 695 | if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE) \ |
| AnnaBridge | 189:f392fc9709a3 | 696 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 697 | (__HANDLE__)->Mask = 0x007F ; \ |
| AnnaBridge | 189:f392fc9709a3 | 698 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 699 | else \ |
| AnnaBridge | 189:f392fc9709a3 | 700 | { \ |
| AnnaBridge | 189:f392fc9709a3 | 701 | (__HANDLE__)->Mask = 0x003F ; \ |
| AnnaBridge | 189:f392fc9709a3 | 702 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 703 | } \ |
| AnnaBridge | 189:f392fc9709a3 | 704 | } while(0) |
| AnnaBridge | 189:f392fc9709a3 | 705 | |
| AnnaBridge | 189:f392fc9709a3 | 706 | /** @brief Ensure that IRDA Baud rate is less or equal to maximum value. |
| AnnaBridge | 189:f392fc9709a3 | 707 | * @param __BAUDRATE__ specifies the IRDA Baudrate set by the user. |
| AnnaBridge | 189:f392fc9709a3 | 708 | * @retval True or False |
| AnnaBridge | 189:f392fc9709a3 | 709 | */ |
| AnnaBridge | 189:f392fc9709a3 | 710 | #define IS_IRDA_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 115201) |
| AnnaBridge | 189:f392fc9709a3 | 711 | |
| AnnaBridge | 189:f392fc9709a3 | 712 | /** @brief Ensure that IRDA prescaler value is strictly larger than 0. |
| AnnaBridge | 189:f392fc9709a3 | 713 | * @param __PRESCALER__ specifies the IRDA prescaler value set by the user. |
| AnnaBridge | 189:f392fc9709a3 | 714 | * @retval True or False |
| AnnaBridge | 189:f392fc9709a3 | 715 | */ |
| AnnaBridge | 189:f392fc9709a3 | 716 | #define IS_IRDA_PRESCALER(__PRESCALER__) ((__PRESCALER__) > 0) |
| AnnaBridge | 189:f392fc9709a3 | 717 | |
| AnnaBridge | 189:f392fc9709a3 | 718 | /** |
| AnnaBridge | 189:f392fc9709a3 | 719 | * @brief Ensure that IRDA frame length is valid. |
| AnnaBridge | 189:f392fc9709a3 | 720 | * @param __LENGTH__ IRDA frame length. |
| AnnaBridge | 189:f392fc9709a3 | 721 | * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) |
| AnnaBridge | 189:f392fc9709a3 | 722 | */ |
| AnnaBridge | 189:f392fc9709a3 | 723 | #define IS_IRDA_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == IRDA_WORDLENGTH_7B) || \ |
| AnnaBridge | 189:f392fc9709a3 | 724 | ((__LENGTH__) == IRDA_WORDLENGTH_8B) || \ |
| AnnaBridge | 189:f392fc9709a3 | 725 | ((__LENGTH__) == IRDA_WORDLENGTH_9B)) |
| AnnaBridge | 189:f392fc9709a3 | 726 | |
| AnnaBridge | 189:f392fc9709a3 | 727 | /** |
| AnnaBridge | 189:f392fc9709a3 | 728 | * @brief Ensure that IRDA frame parity is valid. |
| AnnaBridge | 189:f392fc9709a3 | 729 | * @param __PARITY__ IRDA frame parity. |
| AnnaBridge | 189:f392fc9709a3 | 730 | * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid) |
| AnnaBridge | 189:f392fc9709a3 | 731 | */ |
| AnnaBridge | 189:f392fc9709a3 | 732 | #define IS_IRDA_PARITY(__PARITY__) (((__PARITY__) == IRDA_PARITY_NONE) || \ |
| AnnaBridge | 189:f392fc9709a3 | 733 | ((__PARITY__) == IRDA_PARITY_EVEN) || \ |
| AnnaBridge | 189:f392fc9709a3 | 734 | ((__PARITY__) == IRDA_PARITY_ODD)) |
| AnnaBridge | 189:f392fc9709a3 | 735 | |
| AnnaBridge | 189:f392fc9709a3 | 736 | /** |
| AnnaBridge | 189:f392fc9709a3 | 737 | * @brief Ensure that IRDA communication mode is valid. |
| AnnaBridge | 189:f392fc9709a3 | 738 | * @param __MODE__ IRDA communication mode. |
| AnnaBridge | 189:f392fc9709a3 | 739 | * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) |
| AnnaBridge | 189:f392fc9709a3 | 740 | */ |
| AnnaBridge | 189:f392fc9709a3 | 741 | #define IS_IRDA_TX_RX_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(IRDA_MODE_TX_RX)))) == (uint32_t)0x00) && ((__MODE__) != (uint32_t)0x00)) |
| AnnaBridge | 189:f392fc9709a3 | 742 | |
| AnnaBridge | 189:f392fc9709a3 | 743 | /** |
| AnnaBridge | 189:f392fc9709a3 | 744 | * @brief Ensure that IRDA power mode is valid. |
| AnnaBridge | 189:f392fc9709a3 | 745 | * @param __MODE__ IRDA power mode. |
| AnnaBridge | 189:f392fc9709a3 | 746 | * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) |
| AnnaBridge | 189:f392fc9709a3 | 747 | */ |
| AnnaBridge | 189:f392fc9709a3 | 748 | #define IS_IRDA_POWERMODE(__MODE__) (((__MODE__) == IRDA_POWERMODE_LOWPOWER) || \ |
| AnnaBridge | 189:f392fc9709a3 | 749 | ((__MODE__) == IRDA_POWERMODE_NORMAL)) |
| AnnaBridge | 189:f392fc9709a3 | 750 | |
| AnnaBridge | 189:f392fc9709a3 | 751 | #if defined(USART_PRESC_PRESCALER) |
| AnnaBridge | 189:f392fc9709a3 | 752 | /** |
| AnnaBridge | 189:f392fc9709a3 | 753 | * @brief Ensure that IRDA clock Prescaler is valid. |
| AnnaBridge | 189:f392fc9709a3 | 754 | * @param __CLOCKPRESCALER__ IRDA clock Prescaler value. |
| AnnaBridge | 189:f392fc9709a3 | 755 | * @retval SET (__CLOCKPRESCALER__ is valid) or RESET (__CLOCKPRESCALER__ is invalid) |
| AnnaBridge | 189:f392fc9709a3 | 756 | */ |
| AnnaBridge | 189:f392fc9709a3 | 757 | #define IS_IRDA_CLOCKPRESCALER(__CLOCKPRESCALER__) (((__CLOCKPRESCALER__) == IRDA_PRESCALER_DIV1) || \ |
| AnnaBridge | 189:f392fc9709a3 | 758 | ((__CLOCKPRESCALER__) == IRDA_PRESCALER_DIV2) || \ |
| AnnaBridge | 189:f392fc9709a3 | 759 | ((__CLOCKPRESCALER__) == IRDA_PRESCALER_DIV4) || \ |
| AnnaBridge | 189:f392fc9709a3 | 760 | ((__CLOCKPRESCALER__) == IRDA_PRESCALER_DIV6) || \ |
| AnnaBridge | 189:f392fc9709a3 | 761 | ((__CLOCKPRESCALER__) == IRDA_PRESCALER_DIV8) || \ |
| AnnaBridge | 189:f392fc9709a3 | 762 | ((__CLOCKPRESCALER__) == IRDA_PRESCALER_DIV10) || \ |
| AnnaBridge | 189:f392fc9709a3 | 763 | ((__CLOCKPRESCALER__) == IRDA_PRESCALER_DIV12) || \ |
| AnnaBridge | 189:f392fc9709a3 | 764 | ((__CLOCKPRESCALER__) == IRDA_PRESCALER_DIV16) || \ |
| AnnaBridge | 189:f392fc9709a3 | 765 | ((__CLOCKPRESCALER__) == IRDA_PRESCALER_DIV32) || \ |
| AnnaBridge | 189:f392fc9709a3 | 766 | ((__CLOCKPRESCALER__) == IRDA_PRESCALER_DIV64) || \ |
| AnnaBridge | 189:f392fc9709a3 | 767 | ((__CLOCKPRESCALER__) == IRDA_PRESCALER_DIV128) || \ |
| AnnaBridge | 189:f392fc9709a3 | 768 | ((__CLOCKPRESCALER__) == IRDA_PRESCALER_DIV256)) |
| AnnaBridge | 189:f392fc9709a3 | 769 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 770 | |
| AnnaBridge | 189:f392fc9709a3 | 771 | /** |
| AnnaBridge | 189:f392fc9709a3 | 772 | * @brief Ensure that IRDA state is valid. |
| AnnaBridge | 189:f392fc9709a3 | 773 | * @param __STATE__ IRDA state mode. |
| AnnaBridge | 189:f392fc9709a3 | 774 | * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid) |
| AnnaBridge | 189:f392fc9709a3 | 775 | */ |
| AnnaBridge | 189:f392fc9709a3 | 776 | #define IS_IRDA_STATE(__STATE__) (((__STATE__) == IRDA_STATE_DISABLE) || \ |
| AnnaBridge | 189:f392fc9709a3 | 777 | ((__STATE__) == IRDA_STATE_ENABLE)) |
| AnnaBridge | 189:f392fc9709a3 | 778 | |
| AnnaBridge | 189:f392fc9709a3 | 779 | /** |
| AnnaBridge | 189:f392fc9709a3 | 780 | * @brief Ensure that IRDA associated UART/USART mode is valid. |
| AnnaBridge | 189:f392fc9709a3 | 781 | * @param __MODE__: IRDA associated UART/USART mode. |
| AnnaBridge | 189:f392fc9709a3 | 782 | * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) |
| AnnaBridge | 189:f392fc9709a3 | 783 | */ |
| AnnaBridge | 189:f392fc9709a3 | 784 | #define IS_IRDA_MODE(__MODE__) (((__MODE__) == IRDA_MODE_DISABLE) || \ |
| AnnaBridge | 189:f392fc9709a3 | 785 | ((__MODE__) == IRDA_MODE_ENABLE)) |
| AnnaBridge | 189:f392fc9709a3 | 786 | |
| AnnaBridge | 189:f392fc9709a3 | 787 | /** |
| AnnaBridge | 189:f392fc9709a3 | 788 | * @brief Ensure that IRDA sampling rate is valid. |
| AnnaBridge | 189:f392fc9709a3 | 789 | * @param __ONEBIT__ IRDA sampling rate. |
| AnnaBridge | 189:f392fc9709a3 | 790 | * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid) |
| AnnaBridge | 189:f392fc9709a3 | 791 | */ |
| AnnaBridge | 189:f392fc9709a3 | 792 | #define IS_IRDA_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == IRDA_ONE_BIT_SAMPLE_DISABLE) || \ |
| AnnaBridge | 189:f392fc9709a3 | 793 | ((__ONEBIT__) == IRDA_ONE_BIT_SAMPLE_ENABLE)) |
| AnnaBridge | 189:f392fc9709a3 | 794 | |
| AnnaBridge | 189:f392fc9709a3 | 795 | /** |
| AnnaBridge | 189:f392fc9709a3 | 796 | * @brief Ensure that IRDA DMA TX mode is valid. |
| AnnaBridge | 189:f392fc9709a3 | 797 | * @param __DMATX__ IRDA DMA TX mode. |
| AnnaBridge | 189:f392fc9709a3 | 798 | * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid) |
| AnnaBridge | 189:f392fc9709a3 | 799 | */ |
| AnnaBridge | 189:f392fc9709a3 | 800 | #define IS_IRDA_DMA_TX(__DMATX__) (((__DMATX__) == IRDA_DMA_TX_DISABLE) || \ |
| AnnaBridge | 189:f392fc9709a3 | 801 | ((__DMATX__) == IRDA_DMA_TX_ENABLE)) |
| AnnaBridge | 189:f392fc9709a3 | 802 | |
| AnnaBridge | 189:f392fc9709a3 | 803 | /** |
| AnnaBridge | 189:f392fc9709a3 | 804 | * @brief Ensure that IRDA DMA RX mode is valid. |
| AnnaBridge | 189:f392fc9709a3 | 805 | * @param __DMARX__ IRDA DMA RX mode. |
| AnnaBridge | 189:f392fc9709a3 | 806 | * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid) |
| AnnaBridge | 189:f392fc9709a3 | 807 | */ |
| AnnaBridge | 189:f392fc9709a3 | 808 | #define IS_IRDA_DMA_RX(__DMARX__) (((__DMARX__) == IRDA_DMA_RX_DISABLE) || \ |
| AnnaBridge | 189:f392fc9709a3 | 809 | ((__DMARX__) == IRDA_DMA_RX_ENABLE)) |
| AnnaBridge | 189:f392fc9709a3 | 810 | |
| AnnaBridge | 189:f392fc9709a3 | 811 | /** |
| AnnaBridge | 189:f392fc9709a3 | 812 | * @brief Ensure that IRDA request is valid. |
| AnnaBridge | 189:f392fc9709a3 | 813 | * @param __PARAM__ IRDA request. |
| AnnaBridge | 189:f392fc9709a3 | 814 | * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid) |
| AnnaBridge | 189:f392fc9709a3 | 815 | */ |
| AnnaBridge | 189:f392fc9709a3 | 816 | #define IS_IRDA_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == IRDA_AUTOBAUD_REQUEST) || \ |
| AnnaBridge | 189:f392fc9709a3 | 817 | ((__PARAM__) == IRDA_RXDATA_FLUSH_REQUEST) || \ |
| AnnaBridge | 189:f392fc9709a3 | 818 | ((__PARAM__) == IRDA_TXDATA_FLUSH_REQUEST)) |
| AnnaBridge | 189:f392fc9709a3 | 819 | /** |
| AnnaBridge | 189:f392fc9709a3 | 820 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 821 | */ |
| AnnaBridge | 189:f392fc9709a3 | 822 | |
| AnnaBridge | 189:f392fc9709a3 | 823 | /* Include IRDA HAL Extended module */ |
| AnnaBridge | 189:f392fc9709a3 | 824 | #include "stm32l4xx_hal_irda_ex.h" |
| AnnaBridge | 189:f392fc9709a3 | 825 | |
| AnnaBridge | 189:f392fc9709a3 | 826 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 827 | /** @addtogroup IRDA_Exported_Functions IRDA Exported Functions |
| AnnaBridge | 189:f392fc9709a3 | 828 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 829 | */ |
| AnnaBridge | 189:f392fc9709a3 | 830 | |
| AnnaBridge | 189:f392fc9709a3 | 831 | /** @addtogroup IRDA_Exported_Functions_Group1 Initialization and de-initialization functions |
| AnnaBridge | 189:f392fc9709a3 | 832 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 833 | */ |
| AnnaBridge | 189:f392fc9709a3 | 834 | |
| AnnaBridge | 189:f392fc9709a3 | 835 | /* Initialization and de-initialization functions ****************************/ |
| AnnaBridge | 189:f392fc9709a3 | 836 | HAL_StatusTypeDef HAL_IRDA_Init(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 189:f392fc9709a3 | 837 | HAL_StatusTypeDef HAL_IRDA_DeInit(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 189:f392fc9709a3 | 838 | void HAL_IRDA_MspInit(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 189:f392fc9709a3 | 839 | void HAL_IRDA_MspDeInit(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 189:f392fc9709a3 | 840 | |
| AnnaBridge | 189:f392fc9709a3 | 841 | /** |
| AnnaBridge | 189:f392fc9709a3 | 842 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 843 | */ |
| AnnaBridge | 189:f392fc9709a3 | 844 | |
| AnnaBridge | 189:f392fc9709a3 | 845 | /** @addtogroup IRDA_Exported_Functions_Group2 IO operation functions |
| AnnaBridge | 189:f392fc9709a3 | 846 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 847 | */ |
| AnnaBridge | 189:f392fc9709a3 | 848 | |
| AnnaBridge | 189:f392fc9709a3 | 849 | /* IO operation functions *****************************************************/ |
| AnnaBridge | 189:f392fc9709a3 | 850 | HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
| AnnaBridge | 189:f392fc9709a3 | 851 | HAL_StatusTypeDef HAL_IRDA_Receive(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout); |
| AnnaBridge | 189:f392fc9709a3 | 852 | HAL_StatusTypeDef HAL_IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size); |
| AnnaBridge | 189:f392fc9709a3 | 853 | HAL_StatusTypeDef HAL_IRDA_Receive_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size); |
| AnnaBridge | 189:f392fc9709a3 | 854 | HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size); |
| AnnaBridge | 189:f392fc9709a3 | 855 | HAL_StatusTypeDef HAL_IRDA_Receive_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size); |
| AnnaBridge | 189:f392fc9709a3 | 856 | HAL_StatusTypeDef HAL_IRDA_DMAPause(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 189:f392fc9709a3 | 857 | HAL_StatusTypeDef HAL_IRDA_DMAResume(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 189:f392fc9709a3 | 858 | HAL_StatusTypeDef HAL_IRDA_DMAStop(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 189:f392fc9709a3 | 859 | /* Transfer Abort functions */ |
| AnnaBridge | 189:f392fc9709a3 | 860 | HAL_StatusTypeDef HAL_IRDA_Abort(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 189:f392fc9709a3 | 861 | HAL_StatusTypeDef HAL_IRDA_AbortTransmit(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 189:f392fc9709a3 | 862 | HAL_StatusTypeDef HAL_IRDA_AbortReceive(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 189:f392fc9709a3 | 863 | HAL_StatusTypeDef HAL_IRDA_Abort_IT(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 189:f392fc9709a3 | 864 | HAL_StatusTypeDef HAL_IRDA_AbortTransmit_IT(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 189:f392fc9709a3 | 865 | HAL_StatusTypeDef HAL_IRDA_AbortReceive_IT(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 189:f392fc9709a3 | 866 | |
| AnnaBridge | 189:f392fc9709a3 | 867 | void HAL_IRDA_IRQHandler(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 189:f392fc9709a3 | 868 | void HAL_IRDA_TxCpltCallback(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 189:f392fc9709a3 | 869 | void HAL_IRDA_RxCpltCallback(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 189:f392fc9709a3 | 870 | void HAL_IRDA_TxHalfCpltCallback(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 189:f392fc9709a3 | 871 | void HAL_IRDA_RxHalfCpltCallback(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 189:f392fc9709a3 | 872 | void HAL_IRDA_ErrorCallback(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 189:f392fc9709a3 | 873 | void HAL_IRDA_AbortCpltCallback (IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 189:f392fc9709a3 | 874 | void HAL_IRDA_AbortTransmitCpltCallback (IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 189:f392fc9709a3 | 875 | void HAL_IRDA_AbortReceiveCpltCallback (IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 189:f392fc9709a3 | 876 | |
| AnnaBridge | 189:f392fc9709a3 | 877 | /** |
| AnnaBridge | 189:f392fc9709a3 | 878 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 879 | */ |
| AnnaBridge | 189:f392fc9709a3 | 880 | |
| AnnaBridge | 189:f392fc9709a3 | 881 | /* Peripheral Control functions ************************************************/ |
| AnnaBridge | 189:f392fc9709a3 | 882 | |
| AnnaBridge | 189:f392fc9709a3 | 883 | /** @addtogroup IRDA_Exported_Functions_Group4 Peripheral State and Error functions |
| AnnaBridge | 189:f392fc9709a3 | 884 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 885 | */ |
| AnnaBridge | 189:f392fc9709a3 | 886 | |
| AnnaBridge | 189:f392fc9709a3 | 887 | /* Peripheral State and Error functions ***************************************/ |
| AnnaBridge | 189:f392fc9709a3 | 888 | HAL_IRDA_StateTypeDef HAL_IRDA_GetState(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 189:f392fc9709a3 | 889 | uint32_t HAL_IRDA_GetError(IRDA_HandleTypeDef *hirda); |
| AnnaBridge | 189:f392fc9709a3 | 890 | |
| AnnaBridge | 189:f392fc9709a3 | 891 | /** |
| AnnaBridge | 189:f392fc9709a3 | 892 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 893 | */ |
| AnnaBridge | 189:f392fc9709a3 | 894 | |
| AnnaBridge | 189:f392fc9709a3 | 895 | /** |
| AnnaBridge | 189:f392fc9709a3 | 896 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 897 | */ |
| AnnaBridge | 189:f392fc9709a3 | 898 | |
| AnnaBridge | 189:f392fc9709a3 | 899 | /** |
| AnnaBridge | 189:f392fc9709a3 | 900 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 901 | */ |
| AnnaBridge | 189:f392fc9709a3 | 902 | |
| AnnaBridge | 189:f392fc9709a3 | 903 | /** |
| AnnaBridge | 189:f392fc9709a3 | 904 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 905 | */ |
| AnnaBridge | 189:f392fc9709a3 | 906 | |
| AnnaBridge | 189:f392fc9709a3 | 907 | #ifdef __cplusplus |
| AnnaBridge | 189:f392fc9709a3 | 908 | } |
| AnnaBridge | 189:f392fc9709a3 | 909 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 910 | |
| AnnaBridge | 189:f392fc9709a3 | 911 | #endif /* __STM32L4xx_HAL_IRDA_H */ |
| AnnaBridge | 189:f392fc9709a3 | 912 | |
| AnnaBridge | 189:f392fc9709a3 | 913 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
