mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

cmsis/BUILD/mbed/TARGET_DISCO_L072CZ_LRWAN1/TOOLCHAIN_IAR/stm32l0xx_ll_wwdg.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 189:f392fc9709a3 1 /**
AnnaBridge 189:f392fc9709a3 2 ******************************************************************************
AnnaBridge 189:f392fc9709a3 3 * @file stm32l0xx_ll_wwdg.h
AnnaBridge 189:f392fc9709a3 4 * @author MCD Application Team
AnnaBridge 189:f392fc9709a3 5 * @brief Header file of WWDG LL module.
AnnaBridge 189:f392fc9709a3 6 ******************************************************************************
AnnaBridge 189:f392fc9709a3 7 * @attention
AnnaBridge 189:f392fc9709a3 8 *
AnnaBridge 189:f392fc9709a3 9 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
AnnaBridge 189:f392fc9709a3 10 *
AnnaBridge 189:f392fc9709a3 11 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 189:f392fc9709a3 12 * are permitted provided that the following conditions are met:
AnnaBridge 189:f392fc9709a3 13 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 189:f392fc9709a3 14 * this list of conditions and the following disclaimer.
AnnaBridge 189:f392fc9709a3 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 189:f392fc9709a3 16 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 189:f392fc9709a3 17 * and/or other materials provided with the distribution.
AnnaBridge 189:f392fc9709a3 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 189:f392fc9709a3 19 * may be used to endorse or promote products derived from this software
AnnaBridge 189:f392fc9709a3 20 * without specific prior written permission.
AnnaBridge 189:f392fc9709a3 21 *
AnnaBridge 189:f392fc9709a3 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 189:f392fc9709a3 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 189:f392fc9709a3 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 189:f392fc9709a3 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 189:f392fc9709a3 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 189:f392fc9709a3 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 189:f392fc9709a3 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 189:f392fc9709a3 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 189:f392fc9709a3 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 189:f392fc9709a3 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 189:f392fc9709a3 32 *
AnnaBridge 189:f392fc9709a3 33 ******************************************************************************
AnnaBridge 189:f392fc9709a3 34 */
AnnaBridge 189:f392fc9709a3 35
AnnaBridge 189:f392fc9709a3 36 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 189:f392fc9709a3 37 #ifndef __STM32L0xx_LL_WWDG_H
AnnaBridge 189:f392fc9709a3 38 #define __STM32L0xx_LL_WWDG_H
AnnaBridge 189:f392fc9709a3 39
AnnaBridge 189:f392fc9709a3 40 #ifdef __cplusplus
AnnaBridge 189:f392fc9709a3 41 extern "C" {
AnnaBridge 189:f392fc9709a3 42 #endif
AnnaBridge 189:f392fc9709a3 43
AnnaBridge 189:f392fc9709a3 44 /* Includes ------------------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 45 #include "stm32l0xx.h"
AnnaBridge 189:f392fc9709a3 46
AnnaBridge 189:f392fc9709a3 47 /** @addtogroup STM32L0xx_LL_Driver
AnnaBridge 189:f392fc9709a3 48 * @{
AnnaBridge 189:f392fc9709a3 49 */
AnnaBridge 189:f392fc9709a3 50
AnnaBridge 189:f392fc9709a3 51 #if defined (WWDG)
AnnaBridge 189:f392fc9709a3 52
AnnaBridge 189:f392fc9709a3 53 /** @defgroup WWDG_LL WWDG
AnnaBridge 189:f392fc9709a3 54 * @{
AnnaBridge 189:f392fc9709a3 55 */
AnnaBridge 189:f392fc9709a3 56
AnnaBridge 189:f392fc9709a3 57 /* Private types -------------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 58 /* Private variables ---------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 59
AnnaBridge 189:f392fc9709a3 60 /* Private constants ---------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 61
AnnaBridge 189:f392fc9709a3 62 /* Private macros ------------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 63
AnnaBridge 189:f392fc9709a3 64 /* Exported types ------------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 65 /* Exported constants --------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 66 /** @defgroup WWDG_LL_Exported_Constants WWDG Exported Constants
AnnaBridge 189:f392fc9709a3 67 * @{
AnnaBridge 189:f392fc9709a3 68 */
AnnaBridge 189:f392fc9709a3 69
AnnaBridge 189:f392fc9709a3 70
AnnaBridge 189:f392fc9709a3 71 /** @defgroup WWDG_LL_EC_IT IT Defines
AnnaBridge 189:f392fc9709a3 72 * @brief IT defines which can be used with LL_WWDG_ReadReg and LL_WWDG_WriteReg functions
AnnaBridge 189:f392fc9709a3 73 * @{
AnnaBridge 189:f392fc9709a3 74 */
AnnaBridge 189:f392fc9709a3 75 #define LL_WWDG_CFR_EWI WWDG_CFR_EWI
AnnaBridge 189:f392fc9709a3 76 /**
AnnaBridge 189:f392fc9709a3 77 * @}
AnnaBridge 189:f392fc9709a3 78 */
AnnaBridge 189:f392fc9709a3 79
AnnaBridge 189:f392fc9709a3 80 /** @defgroup WWDG_LL_EC_PRESCALER PRESCALER
AnnaBridge 189:f392fc9709a3 81 * @{
AnnaBridge 189:f392fc9709a3 82 */
AnnaBridge 189:f392fc9709a3 83 #define LL_WWDG_PRESCALER_1 (uint32_t)0x00000000U /*!< WWDG counter clock = (PCLK1/4096)/1 */
AnnaBridge 189:f392fc9709a3 84 #define LL_WWDG_PRESCALER_2 WWDG_CFR_WDGTB_0 /*!< WWDG counter clock = (PCLK1/4096)/2 */
AnnaBridge 189:f392fc9709a3 85 #define LL_WWDG_PRESCALER_4 WWDG_CFR_WDGTB_1 /*!< WWDG counter clock = (PCLK1/4096)/4 */
AnnaBridge 189:f392fc9709a3 86 #define LL_WWDG_PRESCALER_8 (WWDG_CFR_WDGTB_0 | WWDG_CFR_WDGTB_1) /*!< WWDG counter clock = (PCLK1/4096)/8 */
AnnaBridge 189:f392fc9709a3 87 /**
AnnaBridge 189:f392fc9709a3 88 * @}
AnnaBridge 189:f392fc9709a3 89 */
AnnaBridge 189:f392fc9709a3 90
AnnaBridge 189:f392fc9709a3 91 /**
AnnaBridge 189:f392fc9709a3 92 * @}
AnnaBridge 189:f392fc9709a3 93 */
AnnaBridge 189:f392fc9709a3 94
AnnaBridge 189:f392fc9709a3 95 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 96 /** @defgroup WWDG_LL_Exported_Macros WWDG Exported Macros
AnnaBridge 189:f392fc9709a3 97 * @{
AnnaBridge 189:f392fc9709a3 98 */
AnnaBridge 189:f392fc9709a3 99 /** @defgroup WWDG_LL_EM_WRITE_READ Common Write and read registers macros
AnnaBridge 189:f392fc9709a3 100 * @{
AnnaBridge 189:f392fc9709a3 101 */
AnnaBridge 189:f392fc9709a3 102 /**
AnnaBridge 189:f392fc9709a3 103 * @brief Write a value in WWDG register
AnnaBridge 189:f392fc9709a3 104 * @param __INSTANCE__ WWDG Instance
AnnaBridge 189:f392fc9709a3 105 * @param __REG__ Register to be written
AnnaBridge 189:f392fc9709a3 106 * @param __VALUE__ Value to be written in the register
AnnaBridge 189:f392fc9709a3 107 * @retval None
AnnaBridge 189:f392fc9709a3 108 */
AnnaBridge 189:f392fc9709a3 109 #define LL_WWDG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
AnnaBridge 189:f392fc9709a3 110
AnnaBridge 189:f392fc9709a3 111 /**
AnnaBridge 189:f392fc9709a3 112 * @brief Read a value in WWDG register
AnnaBridge 189:f392fc9709a3 113 * @param __INSTANCE__ WWDG Instance
AnnaBridge 189:f392fc9709a3 114 * @param __REG__ Register to be read
AnnaBridge 189:f392fc9709a3 115 * @retval Register value
AnnaBridge 189:f392fc9709a3 116 */
AnnaBridge 189:f392fc9709a3 117 #define LL_WWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
AnnaBridge 189:f392fc9709a3 118 /**
AnnaBridge 189:f392fc9709a3 119 * @}
AnnaBridge 189:f392fc9709a3 120 */
AnnaBridge 189:f392fc9709a3 121
AnnaBridge 189:f392fc9709a3 122
AnnaBridge 189:f392fc9709a3 123 /**
AnnaBridge 189:f392fc9709a3 124 * @}
AnnaBridge 189:f392fc9709a3 125 */
AnnaBridge 189:f392fc9709a3 126
AnnaBridge 189:f392fc9709a3 127 /* Exported functions --------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 128 /** @defgroup WWDG_LL_Exported_Functions WWDG Exported Functions
AnnaBridge 189:f392fc9709a3 129 * @{
AnnaBridge 189:f392fc9709a3 130 */
AnnaBridge 189:f392fc9709a3 131
AnnaBridge 189:f392fc9709a3 132 /** @defgroup WWDG_LL_EF_Configuration Configuration
AnnaBridge 189:f392fc9709a3 133 * @{
AnnaBridge 189:f392fc9709a3 134 */
AnnaBridge 189:f392fc9709a3 135 /**
AnnaBridge 189:f392fc9709a3 136 * @brief Enable Window Watchdog. The watchdog is always disabled after a reset.
AnnaBridge 189:f392fc9709a3 137 * @note It is enabled by setting the WDGA bit in the WWDG_CR register,
AnnaBridge 189:f392fc9709a3 138 * then it cannot be disabled again except by a reset.
AnnaBridge 189:f392fc9709a3 139 * This bit is set by software and only cleared by hardware after a reset.
AnnaBridge 189:f392fc9709a3 140 * When WDGA = 1, the watchdog can generate a reset.
AnnaBridge 189:f392fc9709a3 141 * @rmtoll CR WDGA LL_WWDG_Enable
AnnaBridge 189:f392fc9709a3 142 * @param WWDGx WWDG Instance
AnnaBridge 189:f392fc9709a3 143 * @retval None
AnnaBridge 189:f392fc9709a3 144 */
AnnaBridge 189:f392fc9709a3 145 __STATIC_INLINE void LL_WWDG_Enable(WWDG_TypeDef *WWDGx)
AnnaBridge 189:f392fc9709a3 146 {
AnnaBridge 189:f392fc9709a3 147 SET_BIT(WWDGx->CR, WWDG_CR_WDGA);
AnnaBridge 189:f392fc9709a3 148 }
AnnaBridge 189:f392fc9709a3 149
AnnaBridge 189:f392fc9709a3 150 /**
AnnaBridge 189:f392fc9709a3 151 * @brief Checks if Window Watchdog is enabled
AnnaBridge 189:f392fc9709a3 152 * @rmtoll CR WDGA LL_WWDG_IsEnabled
AnnaBridge 189:f392fc9709a3 153 * @param WWDGx WWDG Instance
AnnaBridge 189:f392fc9709a3 154 * @retval State of bit (1 or 0).
AnnaBridge 189:f392fc9709a3 155 */
AnnaBridge 189:f392fc9709a3 156 __STATIC_INLINE uint32_t LL_WWDG_IsEnabled(WWDG_TypeDef *WWDGx)
AnnaBridge 189:f392fc9709a3 157 {
AnnaBridge 189:f392fc9709a3 158 return (READ_BIT(WWDGx->CR, WWDG_CR_WDGA) == (WWDG_CR_WDGA));
AnnaBridge 189:f392fc9709a3 159 }
AnnaBridge 189:f392fc9709a3 160
AnnaBridge 189:f392fc9709a3 161 /**
AnnaBridge 189:f392fc9709a3 162 * @brief Set the Watchdog counter value to provided value (7-bits T[6:0])
AnnaBridge 189:f392fc9709a3 163 * @note When writing to the WWDG_CR register, always write 1 in the MSB b6 to avoid generating an immediate reset
AnnaBridge 189:f392fc9709a3 164 * This counter is decremented every (4096 x 2expWDGTB) PCLK cycles
AnnaBridge 189:f392fc9709a3 165 * A reset is produced when it rolls over from 0x40 to 0x3F (bit T6 becomes cleared)
AnnaBridge 189:f392fc9709a3 166 * Setting the counter lower then 0x40 causes an immediate reset (if WWDG enabled)
AnnaBridge 189:f392fc9709a3 167 * @rmtoll CR T LL_WWDG_SetCounter
AnnaBridge 189:f392fc9709a3 168 * @param WWDGx WWDG Instance
AnnaBridge 189:f392fc9709a3 169 * @param Counter 0..0x7F (7 bit counter value)
AnnaBridge 189:f392fc9709a3 170 * @retval None
AnnaBridge 189:f392fc9709a3 171 */
AnnaBridge 189:f392fc9709a3 172 __STATIC_INLINE void LL_WWDG_SetCounter(WWDG_TypeDef *WWDGx, uint32_t Counter)
AnnaBridge 189:f392fc9709a3 173 {
AnnaBridge 189:f392fc9709a3 174 MODIFY_REG(WWDGx->CR, WWDG_CR_T, Counter);
AnnaBridge 189:f392fc9709a3 175 }
AnnaBridge 189:f392fc9709a3 176
AnnaBridge 189:f392fc9709a3 177 /**
AnnaBridge 189:f392fc9709a3 178 * @brief Return current Watchdog Counter Value (7 bits counter value)
AnnaBridge 189:f392fc9709a3 179 * @rmtoll CR T LL_WWDG_GetCounter
AnnaBridge 189:f392fc9709a3 180 * @param WWDGx WWDG Instance
AnnaBridge 189:f392fc9709a3 181 * @retval 7 bit Watchdog Counter value
AnnaBridge 189:f392fc9709a3 182 */
AnnaBridge 189:f392fc9709a3 183 __STATIC_INLINE uint32_t LL_WWDG_GetCounter(WWDG_TypeDef *WWDGx)
AnnaBridge 189:f392fc9709a3 184 {
AnnaBridge 189:f392fc9709a3 185 return (uint32_t)(READ_BIT(WWDGx->CR, WWDG_CR_T));
AnnaBridge 189:f392fc9709a3 186 }
AnnaBridge 189:f392fc9709a3 187
AnnaBridge 189:f392fc9709a3 188 /**
AnnaBridge 189:f392fc9709a3 189 * @brief Set the time base of the prescaler (WDGTB).
AnnaBridge 189:f392fc9709a3 190 * @note Prescaler is used to apply ratio on PCLK clock, so that Watchdog counter
AnnaBridge 189:f392fc9709a3 191 * is decremented every (4096 x 2expWDGTB) PCLK cycles
AnnaBridge 189:f392fc9709a3 192 * @rmtoll CFR WDGTB LL_WWDG_SetPrescaler
AnnaBridge 189:f392fc9709a3 193 * @param WWDGx WWDG Instance
AnnaBridge 189:f392fc9709a3 194 * @param Prescaler This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 195 * @arg @ref LL_WWDG_PRESCALER_1
AnnaBridge 189:f392fc9709a3 196 * @arg @ref LL_WWDG_PRESCALER_2
AnnaBridge 189:f392fc9709a3 197 * @arg @ref LL_WWDG_PRESCALER_4
AnnaBridge 189:f392fc9709a3 198 * @arg @ref LL_WWDG_PRESCALER_8
AnnaBridge 189:f392fc9709a3 199 * @retval None
AnnaBridge 189:f392fc9709a3 200 */
AnnaBridge 189:f392fc9709a3 201 __STATIC_INLINE void LL_WWDG_SetPrescaler(WWDG_TypeDef *WWDGx, uint32_t Prescaler)
AnnaBridge 189:f392fc9709a3 202 {
AnnaBridge 189:f392fc9709a3 203 MODIFY_REG(WWDGx->CFR, WWDG_CFR_WDGTB, Prescaler);
AnnaBridge 189:f392fc9709a3 204 }
AnnaBridge 189:f392fc9709a3 205
AnnaBridge 189:f392fc9709a3 206 /**
AnnaBridge 189:f392fc9709a3 207 * @brief Return current Watchdog Prescaler Value
AnnaBridge 189:f392fc9709a3 208 * @rmtoll CFR WDGTB LL_WWDG_GetPrescaler
AnnaBridge 189:f392fc9709a3 209 * @param WWDGx WWDG Instance
AnnaBridge 189:f392fc9709a3 210 * @retval Returned value can be one of the following values:
AnnaBridge 189:f392fc9709a3 211 * @arg @ref LL_WWDG_PRESCALER_1
AnnaBridge 189:f392fc9709a3 212 * @arg @ref LL_WWDG_PRESCALER_2
AnnaBridge 189:f392fc9709a3 213 * @arg @ref LL_WWDG_PRESCALER_4
AnnaBridge 189:f392fc9709a3 214 * @arg @ref LL_WWDG_PRESCALER_8
AnnaBridge 189:f392fc9709a3 215 */
AnnaBridge 189:f392fc9709a3 216 __STATIC_INLINE uint32_t LL_WWDG_GetPrescaler(WWDG_TypeDef *WWDGx)
AnnaBridge 189:f392fc9709a3 217 {
AnnaBridge 189:f392fc9709a3 218 return (uint32_t)(READ_BIT(WWDGx->CFR, WWDG_CFR_WDGTB));
AnnaBridge 189:f392fc9709a3 219 }
AnnaBridge 189:f392fc9709a3 220
AnnaBridge 189:f392fc9709a3 221 /**
AnnaBridge 189:f392fc9709a3 222 * @brief Set the Watchdog Window value to be compared to the downcounter (7-bits W[6:0]).
AnnaBridge 189:f392fc9709a3 223 * @note This window value defines when write in the WWDG_CR register
AnnaBridge 189:f392fc9709a3 224 * to program Watchdog counter is allowed.
AnnaBridge 189:f392fc9709a3 225 * Watchdog counter value update must occur only when the counter value
AnnaBridge 189:f392fc9709a3 226 * is lower than the Watchdog window register value.
AnnaBridge 189:f392fc9709a3 227 * Otherwise, a MCU reset is generated if the 7-bit Watchdog counter value
AnnaBridge 189:f392fc9709a3 228 * (in the control register) is refreshed before the downcounter has reached
AnnaBridge 189:f392fc9709a3 229 * the watchdog window register value.
AnnaBridge 189:f392fc9709a3 230 * Physically is possible to set the Window lower then 0x40 but it is not recommended.
AnnaBridge 189:f392fc9709a3 231 * To generate an immediate reset, it is possible to set the Counter lower than 0x40.
AnnaBridge 189:f392fc9709a3 232 * @rmtoll CFR W LL_WWDG_SetWindow
AnnaBridge 189:f392fc9709a3 233 * @param WWDGx WWDG Instance
AnnaBridge 189:f392fc9709a3 234 * @param Window 0x00..0x7F (7 bit Window value)
AnnaBridge 189:f392fc9709a3 235 * @retval None
AnnaBridge 189:f392fc9709a3 236 */
AnnaBridge 189:f392fc9709a3 237 __STATIC_INLINE void LL_WWDG_SetWindow(WWDG_TypeDef *WWDGx, uint32_t Window)
AnnaBridge 189:f392fc9709a3 238 {
AnnaBridge 189:f392fc9709a3 239 MODIFY_REG(WWDGx->CFR, WWDG_CFR_W, Window);
AnnaBridge 189:f392fc9709a3 240 }
AnnaBridge 189:f392fc9709a3 241
AnnaBridge 189:f392fc9709a3 242 /**
AnnaBridge 189:f392fc9709a3 243 * @brief Return current Watchdog Window Value (7 bits value)
AnnaBridge 189:f392fc9709a3 244 * @rmtoll CFR W LL_WWDG_GetWindow
AnnaBridge 189:f392fc9709a3 245 * @param WWDGx WWDG Instance
AnnaBridge 189:f392fc9709a3 246 * @retval 7 bit Watchdog Window value
AnnaBridge 189:f392fc9709a3 247 */
AnnaBridge 189:f392fc9709a3 248 __STATIC_INLINE uint32_t LL_WWDG_GetWindow(WWDG_TypeDef *WWDGx)
AnnaBridge 189:f392fc9709a3 249 {
AnnaBridge 189:f392fc9709a3 250 return (uint32_t)(READ_BIT(WWDGx->CFR, WWDG_CFR_W));
AnnaBridge 189:f392fc9709a3 251 }
AnnaBridge 189:f392fc9709a3 252
AnnaBridge 189:f392fc9709a3 253 /**
AnnaBridge 189:f392fc9709a3 254 * @}
AnnaBridge 189:f392fc9709a3 255 */
AnnaBridge 189:f392fc9709a3 256
AnnaBridge 189:f392fc9709a3 257 /** @defgroup WWDG_LL_EF_FLAG_Management FLAG_Management
AnnaBridge 189:f392fc9709a3 258 * @{
AnnaBridge 189:f392fc9709a3 259 */
AnnaBridge 189:f392fc9709a3 260 /**
AnnaBridge 189:f392fc9709a3 261 * @brief Indicates if the WWDG Early Wakeup Interrupt Flag is set or not.
AnnaBridge 189:f392fc9709a3 262 * @note This bit is set by hardware when the counter has reached the value 0x40.
AnnaBridge 189:f392fc9709a3 263 * It must be cleared by software by writing 0.
AnnaBridge 189:f392fc9709a3 264 * A write of 1 has no effect. This bit is also set if the interrupt is not enabled.
AnnaBridge 189:f392fc9709a3 265 * @rmtoll SR EWIF LL_WWDG_IsActiveFlag_EWKUP
AnnaBridge 189:f392fc9709a3 266 * @param WWDGx WWDG Instance
AnnaBridge 189:f392fc9709a3 267 * @retval State of bit (1 or 0).
AnnaBridge 189:f392fc9709a3 268 */
AnnaBridge 189:f392fc9709a3 269 __STATIC_INLINE uint32_t LL_WWDG_IsActiveFlag_EWKUP(WWDG_TypeDef *WWDGx)
AnnaBridge 189:f392fc9709a3 270 {
AnnaBridge 189:f392fc9709a3 271 return (READ_BIT(WWDGx->SR, WWDG_SR_EWIF) == (WWDG_SR_EWIF));
AnnaBridge 189:f392fc9709a3 272 }
AnnaBridge 189:f392fc9709a3 273
AnnaBridge 189:f392fc9709a3 274 /**
AnnaBridge 189:f392fc9709a3 275 * @brief Clear WWDG Early Wakeup Interrupt Flag (EWIF)
AnnaBridge 189:f392fc9709a3 276 * @rmtoll SR EWIF LL_WWDG_ClearFlag_EWKUP
AnnaBridge 189:f392fc9709a3 277 * @param WWDGx WWDG Instance
AnnaBridge 189:f392fc9709a3 278 * @retval None
AnnaBridge 189:f392fc9709a3 279 */
AnnaBridge 189:f392fc9709a3 280 __STATIC_INLINE void LL_WWDG_ClearFlag_EWKUP(WWDG_TypeDef *WWDGx)
AnnaBridge 189:f392fc9709a3 281 {
AnnaBridge 189:f392fc9709a3 282 WRITE_REG(WWDGx->SR, ~WWDG_SR_EWIF);
AnnaBridge 189:f392fc9709a3 283 }
AnnaBridge 189:f392fc9709a3 284
AnnaBridge 189:f392fc9709a3 285 /**
AnnaBridge 189:f392fc9709a3 286 * @}
AnnaBridge 189:f392fc9709a3 287 */
AnnaBridge 189:f392fc9709a3 288
AnnaBridge 189:f392fc9709a3 289 /** @defgroup WWDG_LL_EF_IT_Management IT_Management
AnnaBridge 189:f392fc9709a3 290 * @{
AnnaBridge 189:f392fc9709a3 291 */
AnnaBridge 189:f392fc9709a3 292 /**
AnnaBridge 189:f392fc9709a3 293 * @brief Enable the Early Wakeup Interrupt.
AnnaBridge 189:f392fc9709a3 294 * @note When set, an interrupt occurs whenever the counter reaches value 0x40.
AnnaBridge 189:f392fc9709a3 295 * This interrupt is only cleared by hardware after a reset
AnnaBridge 189:f392fc9709a3 296 * @rmtoll CFR EWI LL_WWDG_EnableIT_EWKUP
AnnaBridge 189:f392fc9709a3 297 * @param WWDGx WWDG Instance
AnnaBridge 189:f392fc9709a3 298 * @retval None
AnnaBridge 189:f392fc9709a3 299 */
AnnaBridge 189:f392fc9709a3 300 __STATIC_INLINE void LL_WWDG_EnableIT_EWKUP(WWDG_TypeDef *WWDGx)
AnnaBridge 189:f392fc9709a3 301 {
AnnaBridge 189:f392fc9709a3 302 SET_BIT(WWDGx->CFR, WWDG_CFR_EWI);
AnnaBridge 189:f392fc9709a3 303 }
AnnaBridge 189:f392fc9709a3 304
AnnaBridge 189:f392fc9709a3 305 /**
AnnaBridge 189:f392fc9709a3 306 * @brief Check if Early Wakeup Interrupt is enabled
AnnaBridge 189:f392fc9709a3 307 * @rmtoll CFR EWI LL_WWDG_IsEnabledIT_EWKUP
AnnaBridge 189:f392fc9709a3 308 * @param WWDGx WWDG Instance
AnnaBridge 189:f392fc9709a3 309 * @retval State of bit (1 or 0).
AnnaBridge 189:f392fc9709a3 310 */
AnnaBridge 189:f392fc9709a3 311 __STATIC_INLINE uint32_t LL_WWDG_IsEnabledIT_EWKUP(WWDG_TypeDef *WWDGx)
AnnaBridge 189:f392fc9709a3 312 {
AnnaBridge 189:f392fc9709a3 313 return (READ_BIT(WWDGx->CFR, WWDG_CFR_EWI) == (WWDG_CFR_EWI));
AnnaBridge 189:f392fc9709a3 314 }
AnnaBridge 189:f392fc9709a3 315
AnnaBridge 189:f392fc9709a3 316 /**
AnnaBridge 189:f392fc9709a3 317 * @}
AnnaBridge 189:f392fc9709a3 318 */
AnnaBridge 189:f392fc9709a3 319
AnnaBridge 189:f392fc9709a3 320 /**
AnnaBridge 189:f392fc9709a3 321 * @}
AnnaBridge 189:f392fc9709a3 322 */
AnnaBridge 189:f392fc9709a3 323
AnnaBridge 189:f392fc9709a3 324 /**
AnnaBridge 189:f392fc9709a3 325 * @}
AnnaBridge 189:f392fc9709a3 326 */
AnnaBridge 189:f392fc9709a3 327
AnnaBridge 189:f392fc9709a3 328 #endif /* WWDG */
AnnaBridge 189:f392fc9709a3 329
AnnaBridge 189:f392fc9709a3 330 /**
AnnaBridge 189:f392fc9709a3 331 * @}
AnnaBridge 189:f392fc9709a3 332 */
AnnaBridge 189:f392fc9709a3 333
AnnaBridge 189:f392fc9709a3 334 #ifdef __cplusplus
AnnaBridge 189:f392fc9709a3 335 }
AnnaBridge 189:f392fc9709a3 336 #endif
AnnaBridge 189:f392fc9709a3 337
AnnaBridge 189:f392fc9709a3 338 #endif /* __STM32L0xx_LL_WWDG_H */
AnnaBridge 189:f392fc9709a3 339
AnnaBridge 189:f392fc9709a3 340 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/