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cmsis/BUILD/mbed/TARGET_DISCO_L072CZ_LRWAN1/TOOLCHAIN_IAR/stm32l0xx_ll_system.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 189:f392fc9709a3 1 /**
AnnaBridge 189:f392fc9709a3 2 ******************************************************************************
AnnaBridge 189:f392fc9709a3 3 * @file stm32l0xx_ll_system.h
AnnaBridge 189:f392fc9709a3 4 * @author MCD Application Team
AnnaBridge 189:f392fc9709a3 5 * @brief Header file of SYSTEM LL module.
AnnaBridge 189:f392fc9709a3 6 @verbatim
AnnaBridge 189:f392fc9709a3 7 ==============================================================================
AnnaBridge 189:f392fc9709a3 8 ##### How to use this driver #####
AnnaBridge 189:f392fc9709a3 9 ==============================================================================
AnnaBridge 189:f392fc9709a3 10 [..]
AnnaBridge 189:f392fc9709a3 11 The LL SYSTEM driver contains a set of generic APIs that can be
AnnaBridge 189:f392fc9709a3 12 used by user:
AnnaBridge 189:f392fc9709a3 13 (+) Some of the FLASH features need to be handled in the SYSTEM file.
AnnaBridge 189:f392fc9709a3 14 (+) Access to DBGCMU registers
AnnaBridge 189:f392fc9709a3 15 (+) Access to SYSCFG registers
AnnaBridge 189:f392fc9709a3 16
AnnaBridge 189:f392fc9709a3 17 @endverbatim
AnnaBridge 189:f392fc9709a3 18 ******************************************************************************
AnnaBridge 189:f392fc9709a3 19 * @attention
AnnaBridge 189:f392fc9709a3 20 *
AnnaBridge 189:f392fc9709a3 21 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
AnnaBridge 189:f392fc9709a3 22 *
AnnaBridge 189:f392fc9709a3 23 * Redistribution and use in source and binary forms, with or without modification,
AnnaBridge 189:f392fc9709a3 24 * are permitted provided that the following conditions are met:
AnnaBridge 189:f392fc9709a3 25 * 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge 189:f392fc9709a3 26 * this list of conditions and the following disclaimer.
AnnaBridge 189:f392fc9709a3 27 * 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge 189:f392fc9709a3 28 * this list of conditions and the following disclaimer in the documentation
AnnaBridge 189:f392fc9709a3 29 * and/or other materials provided with the distribution.
AnnaBridge 189:f392fc9709a3 30 * 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge 189:f392fc9709a3 31 * may be used to endorse or promote products derived from this software
AnnaBridge 189:f392fc9709a3 32 * without specific prior written permission.
AnnaBridge 189:f392fc9709a3 33 *
AnnaBridge 189:f392fc9709a3 34 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge 189:f392fc9709a3 35 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge 189:f392fc9709a3 36 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge 189:f392fc9709a3 37 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge 189:f392fc9709a3 38 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge 189:f392fc9709a3 39 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge 189:f392fc9709a3 40 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge 189:f392fc9709a3 41 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge 189:f392fc9709a3 42 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge 189:f392fc9709a3 43 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge 189:f392fc9709a3 44 *
AnnaBridge 189:f392fc9709a3 45 ******************************************************************************
AnnaBridge 189:f392fc9709a3 46 */
AnnaBridge 189:f392fc9709a3 47
AnnaBridge 189:f392fc9709a3 48 /* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge 189:f392fc9709a3 49 #ifndef __STM32L0xx_LL_SYSTEM_H
AnnaBridge 189:f392fc9709a3 50 #define __STM32L0xx_LL_SYSTEM_H
AnnaBridge 189:f392fc9709a3 51
AnnaBridge 189:f392fc9709a3 52 #ifdef __cplusplus
AnnaBridge 189:f392fc9709a3 53 extern "C" {
AnnaBridge 189:f392fc9709a3 54 #endif
AnnaBridge 189:f392fc9709a3 55
AnnaBridge 189:f392fc9709a3 56 /* Includes ------------------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 57 #include "stm32l0xx.h"
AnnaBridge 189:f392fc9709a3 58
AnnaBridge 189:f392fc9709a3 59 /** @addtogroup STM32L0xx_LL_Driver
AnnaBridge 189:f392fc9709a3 60 * @{
AnnaBridge 189:f392fc9709a3 61 */
AnnaBridge 189:f392fc9709a3 62
AnnaBridge 189:f392fc9709a3 63 #if defined (FLASH) || defined (SYSCFG) || defined (DBGMCU)
AnnaBridge 189:f392fc9709a3 64
AnnaBridge 189:f392fc9709a3 65 /** @defgroup SYSTEM_LL SYSTEM
AnnaBridge 189:f392fc9709a3 66 * @{
AnnaBridge 189:f392fc9709a3 67 */
AnnaBridge 189:f392fc9709a3 68
AnnaBridge 189:f392fc9709a3 69 /* Private types -------------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 70 /* Private variables ---------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 71
AnnaBridge 189:f392fc9709a3 72 /* Private constants ---------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 73 /** @defgroup SYSTEM_LL_Private_Constants SYSTEM Private Constants
AnnaBridge 189:f392fc9709a3 74 * @{
AnnaBridge 189:f392fc9709a3 75 */
AnnaBridge 189:f392fc9709a3 76
AnnaBridge 189:f392fc9709a3 77 /* Defines used for position in the register */
AnnaBridge 189:f392fc9709a3 78 #define DBGMCU_REVID_POSITION (uint32_t)16U
AnnaBridge 189:f392fc9709a3 79
AnnaBridge 189:f392fc9709a3 80 /**
AnnaBridge 189:f392fc9709a3 81 * @brief Power-down in Run mode Flash key
AnnaBridge 189:f392fc9709a3 82 */
AnnaBridge 189:f392fc9709a3 83 #define FLASH_PDKEY1 ((uint32_t)0x04152637U) /*!< Flash power down key1 */
AnnaBridge 189:f392fc9709a3 84 #define FLASH_PDKEY2 ((uint32_t)0xFAFBFCFDU) /*!< Flash power down key2: used with FLASH_PDKEY1
AnnaBridge 189:f392fc9709a3 85 to unlock the RUN_PD bit in FLASH_ACR */
AnnaBridge 189:f392fc9709a3 86
AnnaBridge 189:f392fc9709a3 87 /**
AnnaBridge 189:f392fc9709a3 88 * @}
AnnaBridge 189:f392fc9709a3 89 */
AnnaBridge 189:f392fc9709a3 90
AnnaBridge 189:f392fc9709a3 91 /* Private macros ------------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 92
AnnaBridge 189:f392fc9709a3 93 /* Exported types ------------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 94 /* Exported constants --------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 95 /** @defgroup SYSTEM_LL_Exported_Constants SYSTEM Exported Constants
AnnaBridge 189:f392fc9709a3 96 * @{
AnnaBridge 189:f392fc9709a3 97 */
AnnaBridge 189:f392fc9709a3 98
AnnaBridge 189:f392fc9709a3 99 /** @defgroup SYSTEM_LL_EC_REMAP SYSCFG Memory Remap
AnnaBridge 189:f392fc9709a3 100 * @{
AnnaBridge 189:f392fc9709a3 101 */
AnnaBridge 189:f392fc9709a3 102 #define LL_SYSCFG_REMAP_FLASH (uint32_t)0x00000000U /*!< Main Flash memory mapped at 0x00000000 */
AnnaBridge 189:f392fc9709a3 103 #define LL_SYSCFG_REMAP_SYSTEMFLASH SYSCFG_CFGR1_MEM_MODE_0 /*!< System Flash memory mapped at 0x00000000 */
AnnaBridge 189:f392fc9709a3 104 #define LL_SYSCFG_REMAP_SRAM (SYSCFG_CFGR1_MEM_MODE_1 | SYSCFG_CFGR1_MEM_MODE_0) /*!< SRAM mapped at 0x00000000 */
AnnaBridge 189:f392fc9709a3 105
AnnaBridge 189:f392fc9709a3 106 /**
AnnaBridge 189:f392fc9709a3 107 * @}
AnnaBridge 189:f392fc9709a3 108 */
AnnaBridge 189:f392fc9709a3 109
AnnaBridge 189:f392fc9709a3 110 #if defined(SYSCFG_CFGR1_UFB)
AnnaBridge 189:f392fc9709a3 111 /** @defgroup SYSTEM_LL_EC_BANKMODE SYSCFG Bank Mode
AnnaBridge 189:f392fc9709a3 112 * @{
AnnaBridge 189:f392fc9709a3 113 */
AnnaBridge 189:f392fc9709a3 114 #define LL_SYSCFG_BANKMODE_BANK1 (uint32_t)0x00000000U /*!< Flash Bank1 mapped at 0x08000000 (and aliased at 0x00000000),
AnnaBridge 189:f392fc9709a3 115 Flash Bank2 mapped at 0x08018000 (and aliased at 0x00018000),
AnnaBridge 189:f392fc9709a3 116 Data EEPROM Bank1 mapped at 0x08080000 (and aliased at 0x00080000),
AnnaBridge 189:f392fc9709a3 117 Data EEPROM Bank2 mapped at 0x08080C00 (and aliased at 0x00080C00) */
AnnaBridge 189:f392fc9709a3 118 #define LL_SYSCFG_BANKMODE_BANK2 SYSCFG_CFGR1_UFB /*!< Flash Bank2 mapped at 0x08000000 (and aliased at 0x00000000),
AnnaBridge 189:f392fc9709a3 119 Flash Bank1 mapped at 0x08018000 (and aliased at 0x00018000),
AnnaBridge 189:f392fc9709a3 120 Data EEPROM Bank2 mapped at 0x08080000 (and aliased at 0x00080000),
AnnaBridge 189:f392fc9709a3 121 Data EEPROM Bank1 mapped at 0x08080C00 (and aliased at 0x00080C00) */
AnnaBridge 189:f392fc9709a3 122 /**
AnnaBridge 189:f392fc9709a3 123 * @}
AnnaBridge 189:f392fc9709a3 124 */
AnnaBridge 189:f392fc9709a3 125
AnnaBridge 189:f392fc9709a3 126 #endif /* SYSCFG_CFGR1_UFB */
AnnaBridge 189:f392fc9709a3 127
AnnaBridge 189:f392fc9709a3 128 /** @defgroup SYSTEM_LL_EC_BOOTMODE SYSCFG Boot Mode
AnnaBridge 189:f392fc9709a3 129 * @{
AnnaBridge 189:f392fc9709a3 130 */
AnnaBridge 189:f392fc9709a3 131 #define LL_SYSCFG_BOOTMODE_FLASH (uint32_t)0x00000000U /*!< Main Flash memory boot mode */
AnnaBridge 189:f392fc9709a3 132 #define LL_SYSCFG_BOOTMODE_SYSTEMFLASH SYSCFG_CFGR1_BOOT_MODE_0 /*!< System Flash memory boot mode */
AnnaBridge 189:f392fc9709a3 133 #define LL_SYSCFG_BOOTMODE_SRAM (SYSCFG_CFGR1_BOOT_MODE_1 | SYSCFG_CFGR1_BOOT_MODE_0) /*!< SRAM boot mode */
AnnaBridge 189:f392fc9709a3 134
AnnaBridge 189:f392fc9709a3 135 /**
AnnaBridge 189:f392fc9709a3 136 * @}
AnnaBridge 189:f392fc9709a3 137 */
AnnaBridge 189:f392fc9709a3 138
AnnaBridge 189:f392fc9709a3 139 #if defined(SYSCFG_CFGR2_CAPA)
AnnaBridge 189:f392fc9709a3 140 /** @defgroup SYSTEM_LL_EC_CFGR2 SYSCFG VLCD Rail Connection
AnnaBridge 189:f392fc9709a3 141 * @{
AnnaBridge 189:f392fc9709a3 142 */
AnnaBridge 189:f392fc9709a3 143
AnnaBridge 189:f392fc9709a3 144 #define LL_SYSCFG_CAPA_VLCD2_PB2 SYSCFG_CFGR2_CAPA_0 /*!< Connect PB2 pin to LCD_VLCD2 rails supply voltage */
AnnaBridge 189:f392fc9709a3 145 #define LL_SYSCFG_CAPA_VLCD1_PB12 SYSCFG_CFGR2_CAPA_1 /*!< Connect PB12 pin to LCD_VLCD1 rails supply voltage */
AnnaBridge 189:f392fc9709a3 146 #define LL_SYSCFG_CAPA_VLCD3_PB0 SYSCFG_CFGR2_CAPA_2 /*!< Connect PB0 pin to LCD_VLCD3 rails supply voltage */
AnnaBridge 189:f392fc9709a3 147 #if defined (SYSCFG_CFGR2_CAPA_3)
AnnaBridge 189:f392fc9709a3 148 #define LL_SYSCFG_CAPA_VLCD1_PE11 SYSCFG_CFGR2_CAPA_3 /*!< Connect PE11 pin to LCD_VLCD1 rails supply voltage */
AnnaBridge 189:f392fc9709a3 149 #endif /* SYSCFG_CFGR2_CAPA_3 */
AnnaBridge 189:f392fc9709a3 150 #if defined (SYSCFG_CFGR2_CAPA_4)
AnnaBridge 189:f392fc9709a3 151 #define LL_SYSCFG_CAPA_VLCD3_PE12 SYSCFG_CFGR2_CAPA_4 /*!< Connect PE12 pin to LCD_VLCD3 rails supply voltage */
AnnaBridge 189:f392fc9709a3 152 #endif /* SYSCFG_CFGR2_CAPA_4 */
AnnaBridge 189:f392fc9709a3 153 /**
AnnaBridge 189:f392fc9709a3 154 * @}
AnnaBridge 189:f392fc9709a3 155 */
AnnaBridge 189:f392fc9709a3 156 #endif /* SYSCFG_CFGR2_CAPA */
AnnaBridge 189:f392fc9709a3 157
AnnaBridge 189:f392fc9709a3 158 /** @defgroup SYSTEM_LL_EC_I2C_FASTMODEPLUS SYSCFG I2C FASTMODEPLUS
AnnaBridge 189:f392fc9709a3 159 * @{
AnnaBridge 189:f392fc9709a3 160 */
AnnaBridge 189:f392fc9709a3 161 #define LL_SYSCFG_I2C_FASTMODEPLUS_PB6 SYSCFG_CFGR2_I2C_PB6_FMP /*!< Enable Fast Mode Plus on PB6 */
AnnaBridge 189:f392fc9709a3 162 #define LL_SYSCFG_I2C_FASTMODEPLUS_PB7 SYSCFG_CFGR2_I2C_PB7_FMP /*!< Enable Fast Mode Plus on PB7 */
AnnaBridge 189:f392fc9709a3 163 #define LL_SYSCFG_I2C_FASTMODEPLUS_PB8 SYSCFG_CFGR2_I2C_PB8_FMP /*!< Enable Fast Mode Plus on PB8 */
AnnaBridge 189:f392fc9709a3 164 #define LL_SYSCFG_I2C_FASTMODEPLUS_PB9 SYSCFG_CFGR2_I2C_PB9_FMP /*!< Enable Fast Mode Plus on PB9 */
AnnaBridge 189:f392fc9709a3 165 #define LL_SYSCFG_I2C_FASTMODEPLUS_I2C1 SYSCFG_CFGR2_I2C1_FMP /*!< Enable Fast Mode Plus on I2C1 pins */
AnnaBridge 189:f392fc9709a3 166 #if defined(SYSCFG_CFGR2_I2C2_FMP)
AnnaBridge 189:f392fc9709a3 167 #define LL_SYSCFG_I2C_FASTMODEPLUS_I2C2 SYSCFG_CFGR2_I2C2_FMP /*!< Enable Fast Mode Plus on I2C2 pins */
AnnaBridge 189:f392fc9709a3 168 #endif /* SYSCFG_CFGR2_I2C2_FMP */
AnnaBridge 189:f392fc9709a3 169 #if defined(SYSCFG_CFGR2_I2C3_FMP)
AnnaBridge 189:f392fc9709a3 170 #define LL_SYSCFG_I2C_FASTMODEPLUS_I2C3 SYSCFG_CFGR2_I2C3_FMP /*!< Enable Fast Mode Plus on I2C3 pins */
AnnaBridge 189:f392fc9709a3 171 #endif /* SYSCFG_CFGR2_I2C3_FMP */
AnnaBridge 189:f392fc9709a3 172 /**
AnnaBridge 189:f392fc9709a3 173 * @}
AnnaBridge 189:f392fc9709a3 174 */
AnnaBridge 189:f392fc9709a3 175
AnnaBridge 189:f392fc9709a3 176 /** @defgroup SYSTEM_LL_VREFINT_CONTROL SYSCFG VREFINT Control
AnnaBridge 189:f392fc9709a3 177 * @{
AnnaBridge 189:f392fc9709a3 178 */
AnnaBridge 189:f392fc9709a3 179 #define LL_SYSCFG_VREFINT_CONNECT_NONE (uint32_t)0x00000000U /*!< No pad connected to VREFINT_ADC */
AnnaBridge 189:f392fc9709a3 180 #define LL_SYSCFG_VREFINT_CONNECT_IO1 SYSCFG_CFGR3_VREF_OUT_0 /*!< PB0 connected to VREFINT_ADC */
AnnaBridge 189:f392fc9709a3 181 #define LL_SYSCFG_VREFINT_CONNECT_IO2 SYSCFG_CFGR3_VREF_OUT_1 /*!< PB1 connected to VREFINT_ADC */
AnnaBridge 189:f392fc9709a3 182 #define LL_SYSCFG_VREFINT_CONNECT_IO1_IO2 (SYSCFG_CFGR3_VREF_OUT_0 | SYSCFG_CFGR3_VREF_OUT_1) /*!< PB0 and PB1 connected to VREFINT_ADC */
AnnaBridge 189:f392fc9709a3 183 /**
AnnaBridge 189:f392fc9709a3 184 * @}
AnnaBridge 189:f392fc9709a3 185 */
AnnaBridge 189:f392fc9709a3 186
AnnaBridge 189:f392fc9709a3 187 /** @defgroup SYSTEM_LL_EC_EXTI_PORT SYSCFG EXTI Port
AnnaBridge 189:f392fc9709a3 188 * @{
AnnaBridge 189:f392fc9709a3 189 */
AnnaBridge 189:f392fc9709a3 190 #define LL_SYSCFG_EXTI_PORTA (uint32_t)0U /*!< EXTI PORT A */
AnnaBridge 189:f392fc9709a3 191 #define LL_SYSCFG_EXTI_PORTB (uint32_t)1U /*!< EXTI PORT B */
AnnaBridge 189:f392fc9709a3 192 #define LL_SYSCFG_EXTI_PORTC (uint32_t)2U /*!< EXTI PORT C */
AnnaBridge 189:f392fc9709a3 193 #if defined(GPIOD_BASE)
AnnaBridge 189:f392fc9709a3 194 #define LL_SYSCFG_EXTI_PORTD (uint32_t)3U /*!< EXTI PORT D */
AnnaBridge 189:f392fc9709a3 195 #endif /*GPIOD_BASE*/
AnnaBridge 189:f392fc9709a3 196 #if defined(GPIOE_BASE)
AnnaBridge 189:f392fc9709a3 197 #define LL_SYSCFG_EXTI_PORTE (uint32_t)4U /*!< EXTI PORT E */
AnnaBridge 189:f392fc9709a3 198 #endif /*GPIOE_BASE*/
AnnaBridge 189:f392fc9709a3 199 #if defined(GPIOH_BASE)
AnnaBridge 189:f392fc9709a3 200 #define LL_SYSCFG_EXTI_PORTH (uint32_t)5U /*!< EXTI PORT H */
AnnaBridge 189:f392fc9709a3 201 #endif /*GPIOH_BASE*/
AnnaBridge 189:f392fc9709a3 202 /**
AnnaBridge 189:f392fc9709a3 203 * @}
AnnaBridge 189:f392fc9709a3 204 */
AnnaBridge 189:f392fc9709a3 205
AnnaBridge 189:f392fc9709a3 206 /** @defgroup SYSTEM_LL_EC_EXTI_LINE SYSCFG EXTI Line
AnnaBridge 189:f392fc9709a3 207 * @{
AnnaBridge 189:f392fc9709a3 208 */
AnnaBridge 189:f392fc9709a3 209 #define LL_SYSCFG_EXTI_LINE0 (uint32_t)(0U << 16U | 0U) /*!< EXTI_POSITION_0 | EXTICR[0] */
AnnaBridge 189:f392fc9709a3 210 #define LL_SYSCFG_EXTI_LINE1 (uint32_t)(4U << 16U | 0U) /*!< EXTI_POSITION_4 | EXTICR[0] */
AnnaBridge 189:f392fc9709a3 211 #define LL_SYSCFG_EXTI_LINE2 (uint32_t)(8U << 16U | 0U) /*!< EXTI_POSITION_8 | EXTICR[0] */
AnnaBridge 189:f392fc9709a3 212 #define LL_SYSCFG_EXTI_LINE3 (uint32_t)(12U << 16U | 0U) /*!< EXTI_POSITION_12 | EXTICR[0] */
AnnaBridge 189:f392fc9709a3 213 #define LL_SYSCFG_EXTI_LINE4 (uint32_t)(0U << 16U | 1U) /*!< EXTI_POSITION_0 | EXTICR[1] */
AnnaBridge 189:f392fc9709a3 214 #define LL_SYSCFG_EXTI_LINE5 (uint32_t)(4U << 16U | 1U) /*!< EXTI_POSITION_4 | EXTICR[1] */
AnnaBridge 189:f392fc9709a3 215 #define LL_SYSCFG_EXTI_LINE6 (uint32_t)(8U << 16U | 1U) /*!< EXTI_POSITION_8 | EXTICR[1] */
AnnaBridge 189:f392fc9709a3 216 #define LL_SYSCFG_EXTI_LINE7 (uint32_t)(12U << 16U | 1U) /*!< EXTI_POSITION_12 | EXTICR[1] */
AnnaBridge 189:f392fc9709a3 217 #define LL_SYSCFG_EXTI_LINE8 (uint32_t)(0U << 16U | 2U) /*!< EXTI_POSITION_0 | EXTICR[2] */
AnnaBridge 189:f392fc9709a3 218 #define LL_SYSCFG_EXTI_LINE9 (uint32_t)(4U << 16U | 2U) /*!< EXTI_POSITION_4 | EXTICR[2] */
AnnaBridge 189:f392fc9709a3 219 #define LL_SYSCFG_EXTI_LINE10 (uint32_t)(8U << 16U | 2U) /*!< EXTI_POSITION_8 | EXTICR[2] */
AnnaBridge 189:f392fc9709a3 220 #define LL_SYSCFG_EXTI_LINE11 (uint32_t)(12U << 16U | 2U) /*!< EXTI_POSITION_12 | EXTICR[2] */
AnnaBridge 189:f392fc9709a3 221 #define LL_SYSCFG_EXTI_LINE12 (uint32_t)(0U << 16U | 3U) /*!< EXTI_POSITION_0 | EXTICR[3] */
AnnaBridge 189:f392fc9709a3 222 #define LL_SYSCFG_EXTI_LINE13 (uint32_t)(4U << 16U | 3U) /*!< EXTI_POSITION_4 | EXTICR[3] */
AnnaBridge 189:f392fc9709a3 223 #define LL_SYSCFG_EXTI_LINE14 (uint32_t)(8U << 16U | 3U) /*!< EXTI_POSITION_8 | EXTICR[3] */
AnnaBridge 189:f392fc9709a3 224 #define LL_SYSCFG_EXTI_LINE15 (uint32_t)(12U << 16U | 3U) /*!< EXTI_POSITION_12 | EXTICR[3] */
AnnaBridge 189:f392fc9709a3 225 /**
AnnaBridge 189:f392fc9709a3 226 * @}
AnnaBridge 189:f392fc9709a3 227 */
AnnaBridge 189:f392fc9709a3 228
AnnaBridge 189:f392fc9709a3 229
AnnaBridge 189:f392fc9709a3 230
AnnaBridge 189:f392fc9709a3 231 /** @defgroup SYSTEM_LL_EC_APB1_GRP1_STOP_IP DBGMCU APB1 GRP1 STOP IP
AnnaBridge 189:f392fc9709a3 232 * @{
AnnaBridge 189:f392fc9709a3 233 */
AnnaBridge 189:f392fc9709a3 234 #define LL_DBGMCU_APB1_GRP1_TIM2_STOP DBGMCU_APB1_FZ_DBG_TIM2_STOP /*!< TIM2 counter stopped when core is halted */
AnnaBridge 189:f392fc9709a3 235 #if defined(TIM3)
AnnaBridge 189:f392fc9709a3 236 #define LL_DBGMCU_APB1_GRP1_TIM3_STOP DBGMCU_APB1_FZ_DBG_TIM3_STOP /*!< TIM3 counter stopped when core is halted */
AnnaBridge 189:f392fc9709a3 237 #endif /*TIM3*/
AnnaBridge 189:f392fc9709a3 238 #if defined(TIM6)
AnnaBridge 189:f392fc9709a3 239 #define LL_DBGMCU_APB1_GRP1_TIM6_STOP DBGMCU_APB1_FZ_DBG_TIM6_STOP /*!< TIM6 counter stopped when core is halted */
AnnaBridge 189:f392fc9709a3 240 #endif /*TIM6*/
AnnaBridge 189:f392fc9709a3 241 #if defined(TIM7)
AnnaBridge 189:f392fc9709a3 242 #define LL_DBGMCU_APB1_GRP1_TIM7_STOP DBGMCU_APB1_FZ_DBG_TIM7_STOP /*!< TIM7 counter stopped when core is halted */
AnnaBridge 189:f392fc9709a3 243 #endif /*TIM7*/
AnnaBridge 189:f392fc9709a3 244 #define LL_DBGMCU_APB1_GRP1_RTC_STOP DBGMCU_APB1_FZ_DBG_RTC_STOP /*!< RTC Calendar frozen when core is halted */
AnnaBridge 189:f392fc9709a3 245 #define LL_DBGMCU_APB1_GRP1_WWDG_STOP DBGMCU_APB1_FZ_DBG_WWDG_STOP /*!< Debug Window Watchdog stopped when Core is halted */
AnnaBridge 189:f392fc9709a3 246 #define LL_DBGMCU_APB1_GRP1_IWDG_STOP DBGMCU_APB1_FZ_DBG_IWDG_STOP /*!< Debug Independent Watchdog stopped when Core is halted */
AnnaBridge 189:f392fc9709a3 247 #define LL_DBGMCU_APB1_GRP1_I2C1_STOP DBGMCU_APB1_FZ_DBG_I2C1_STOP /*!< I2C1 SMBUS timeout mode stopped when Core is halted */
AnnaBridge 189:f392fc9709a3 248 #if defined(I2C2)
AnnaBridge 189:f392fc9709a3 249 #define LL_DBGMCU_APB1_GRP1_I2C2_STOP DBGMCU_APB1_FZ_DBG_I2C2_STOP /*!< I2C2 SMBUS timeout mode stopped when Core is halted */
AnnaBridge 189:f392fc9709a3 250 #endif /*I2C2*/
AnnaBridge 189:f392fc9709a3 251 #if defined(I2C3)
AnnaBridge 189:f392fc9709a3 252 #define LL_DBGMCU_APB1_GRP1_I2C3_STOP DBGMCU_APB1_FZ_DBG_I2C3_STOP /*!< I2C3 SMBUS timeout mode stopped when Core is halted */
AnnaBridge 189:f392fc9709a3 253 #endif /*I2C3*/
AnnaBridge 189:f392fc9709a3 254 #define LL_DBGMCU_APB1_GRP1_LPTIM1_STOP DBGMCU_APB1_FZ_DBG_LPTIMER_STOP /*!< LPTIM1 counter stopped when core is halted */
AnnaBridge 189:f392fc9709a3 255 /**
AnnaBridge 189:f392fc9709a3 256 * @}
AnnaBridge 189:f392fc9709a3 257 */
AnnaBridge 189:f392fc9709a3 258
AnnaBridge 189:f392fc9709a3 259 /** @defgroup SYSTEM_LL_EC_APB2_GRP1_STOP_IP DBGMCU APB2 GRP1 STOP IP
AnnaBridge 189:f392fc9709a3 260 * @{
AnnaBridge 189:f392fc9709a3 261 */
AnnaBridge 189:f392fc9709a3 262 #if defined(TIM22)
AnnaBridge 189:f392fc9709a3 263 #define LL_DBGMCU_APB2_GRP1_TIM22_STOP DBGMCU_APB2_FZ_DBG_TIM22_STOP /*!< TIM22 counter stopped when core is halted */
AnnaBridge 189:f392fc9709a3 264 #endif /*TIM22*/
AnnaBridge 189:f392fc9709a3 265 #define LL_DBGMCU_APB2_GRP1_TIM21_STOP DBGMCU_APB2_FZ_DBG_TIM21_STOP /*!< TIM21 counter stopped when core is halted */
AnnaBridge 189:f392fc9709a3 266 /**
AnnaBridge 189:f392fc9709a3 267 * @}
AnnaBridge 189:f392fc9709a3 268 */
AnnaBridge 189:f392fc9709a3 269
AnnaBridge 189:f392fc9709a3 270 /** @defgroup SYSTEM_LL_EC_LATENCY FLASH LATENCY
AnnaBridge 189:f392fc9709a3 271 * @{
AnnaBridge 189:f392fc9709a3 272 */
AnnaBridge 189:f392fc9709a3 273 #define LL_FLASH_LATENCY_0 ((uint32_t)0x00000000U) /*!< FLASH Zero Latency cycle */
AnnaBridge 189:f392fc9709a3 274 #define LL_FLASH_LATENCY_1 FLASH_ACR_LATENCY /*!< FLASH One Latency cycle */
AnnaBridge 189:f392fc9709a3 275 /**
AnnaBridge 189:f392fc9709a3 276 * @}
AnnaBridge 189:f392fc9709a3 277 */
AnnaBridge 189:f392fc9709a3 278
AnnaBridge 189:f392fc9709a3 279 /**
AnnaBridge 189:f392fc9709a3 280 * @}
AnnaBridge 189:f392fc9709a3 281 */
AnnaBridge 189:f392fc9709a3 282
AnnaBridge 189:f392fc9709a3 283 /* Exported macro ------------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 284
AnnaBridge 189:f392fc9709a3 285 /* Exported functions --------------------------------------------------------*/
AnnaBridge 189:f392fc9709a3 286 /** @defgroup SYSTEM_LL_Exported_Functions SYSTEM Exported Functions
AnnaBridge 189:f392fc9709a3 287 * @{
AnnaBridge 189:f392fc9709a3 288 */
AnnaBridge 189:f392fc9709a3 289
AnnaBridge 189:f392fc9709a3 290 /** @defgroup SYSTEM_LL_EF_SYSCFG SYSCFG
AnnaBridge 189:f392fc9709a3 291 * @{
AnnaBridge 189:f392fc9709a3 292 */
AnnaBridge 189:f392fc9709a3 293
AnnaBridge 189:f392fc9709a3 294 /**
AnnaBridge 189:f392fc9709a3 295 * @brief Set memory mapping at address 0x00000000
AnnaBridge 189:f392fc9709a3 296 * @rmtoll SYSCFG_CFGR1 MEM_MODE LL_SYSCFG_SetRemapMemory
AnnaBridge 189:f392fc9709a3 297 * @param Memory This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 298 * @arg @ref LL_SYSCFG_REMAP_FLASH
AnnaBridge 189:f392fc9709a3 299 * @arg @ref LL_SYSCFG_REMAP_SYSTEMFLASH
AnnaBridge 189:f392fc9709a3 300 * @arg @ref LL_SYSCFG_REMAP_SRAM
AnnaBridge 189:f392fc9709a3 301 * @retval None
AnnaBridge 189:f392fc9709a3 302 */
AnnaBridge 189:f392fc9709a3 303 __STATIC_INLINE void LL_SYSCFG_SetRemapMemory(uint32_t Memory)
AnnaBridge 189:f392fc9709a3 304 {
AnnaBridge 189:f392fc9709a3 305 MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE, Memory);
AnnaBridge 189:f392fc9709a3 306 }
AnnaBridge 189:f392fc9709a3 307
AnnaBridge 189:f392fc9709a3 308 /**
AnnaBridge 189:f392fc9709a3 309 * @brief Get memory mapping at address 0x00000000
AnnaBridge 189:f392fc9709a3 310 * @rmtoll SYSCFG_CFGR1 MEM_MODE LL_SYSCFG_GetRemapMemory
AnnaBridge 189:f392fc9709a3 311 * @retval Returned value can be one of the following values:
AnnaBridge 189:f392fc9709a3 312 * @arg @ref LL_SYSCFG_REMAP_FLASH
AnnaBridge 189:f392fc9709a3 313 * @arg @ref LL_SYSCFG_REMAP_SYSTEMFLASH
AnnaBridge 189:f392fc9709a3 314 * @arg @ref LL_SYSCFG_REMAP_SRAM
AnnaBridge 189:f392fc9709a3 315 */
AnnaBridge 189:f392fc9709a3 316 __STATIC_INLINE uint32_t LL_SYSCFG_GetRemapMemory(void)
AnnaBridge 189:f392fc9709a3 317 {
AnnaBridge 189:f392fc9709a3 318 return (uint32_t)(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_MEM_MODE));
AnnaBridge 189:f392fc9709a3 319 }
AnnaBridge 189:f392fc9709a3 320
AnnaBridge 189:f392fc9709a3 321 #if defined(SYSCFG_CFGR1_UFB)
AnnaBridge 189:f392fc9709a3 322 /**
AnnaBridge 189:f392fc9709a3 323 * @brief Select Flash bank mode (Bank flashed at 0x08000000)
AnnaBridge 189:f392fc9709a3 324 * @rmtoll SYSCFG_CFGR1 UFB LL_SYSCFG_SetFlashBankMode
AnnaBridge 189:f392fc9709a3 325 * @param Bank This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 326 * @arg @ref LL_SYSCFG_BANKMODE_BANK1
AnnaBridge 189:f392fc9709a3 327 * @arg @ref LL_SYSCFG_BANKMODE_BANK2
AnnaBridge 189:f392fc9709a3 328 * @retval None
AnnaBridge 189:f392fc9709a3 329 */
AnnaBridge 189:f392fc9709a3 330 __STATIC_INLINE void LL_SYSCFG_SetFlashBankMode(uint32_t Bank)
AnnaBridge 189:f392fc9709a3 331 {
AnnaBridge 189:f392fc9709a3 332 MODIFY_REG(SYSCFG->CFGR1, SYSCFG_CFGR1_UFB, Bank);
AnnaBridge 189:f392fc9709a3 333 }
AnnaBridge 189:f392fc9709a3 334
AnnaBridge 189:f392fc9709a3 335 /**
AnnaBridge 189:f392fc9709a3 336 * @brief Get Flash bank mode (Bank flashed at 0x08000000)
AnnaBridge 189:f392fc9709a3 337 * @rmtoll SYSCFG_CFGR1 UFB LL_SYSCFG_GetFlashBankMode
AnnaBridge 189:f392fc9709a3 338 * @retval Returned value can be one of the following values:
AnnaBridge 189:f392fc9709a3 339 * @arg @ref LL_SYSCFG_BANKMODE_BANK1
AnnaBridge 189:f392fc9709a3 340 * @arg @ref LL_SYSCFG_BANKMODE_BANK2
AnnaBridge 189:f392fc9709a3 341 */
AnnaBridge 189:f392fc9709a3 342 __STATIC_INLINE uint32_t LL_SYSCFG_GetFlashBankMode(void)
AnnaBridge 189:f392fc9709a3 343 {
AnnaBridge 189:f392fc9709a3 344 return (uint32_t)(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_UFB));
AnnaBridge 189:f392fc9709a3 345 }
AnnaBridge 189:f392fc9709a3 346 #endif /* SYSCFG_CFGR1_UFB */
AnnaBridge 189:f392fc9709a3 347
AnnaBridge 189:f392fc9709a3 348 /**
AnnaBridge 189:f392fc9709a3 349 * @brief Get Boot mode selected by the boot pins status bits
AnnaBridge 189:f392fc9709a3 350 * @note It indicates the boot mode selected by the boot pins. Bit 9
AnnaBridge 189:f392fc9709a3 351 * corresponds to the complement of nBOOT1 bit in the FLASH_OPTR register.
AnnaBridge 189:f392fc9709a3 352 * Its value is defined in the option bytes. Bit 8 corresponds to the
AnnaBridge 189:f392fc9709a3 353 * value sampled on the BOOT0 pin.
AnnaBridge 189:f392fc9709a3 354 * @rmtoll SYSCFG_CFGR1 BOOT_MODE LL_SYSCFG_GetBootMode
AnnaBridge 189:f392fc9709a3 355 * @retval Returned value can be one of the following values:
AnnaBridge 189:f392fc9709a3 356 * @arg @ref LL_SYSCFG_BOOTMODE_FLASH
AnnaBridge 189:f392fc9709a3 357 * @arg @ref LL_SYSCFG_BOOTMODE_SYSTEMFLASH
AnnaBridge 189:f392fc9709a3 358 * @arg @ref LL_SYSCFG_BOOTMODE_SRAM
AnnaBridge 189:f392fc9709a3 359 */
AnnaBridge 189:f392fc9709a3 360 __STATIC_INLINE uint32_t LL_SYSCFG_GetBootMode(void)
AnnaBridge 189:f392fc9709a3 361 {
AnnaBridge 189:f392fc9709a3 362 return (uint32_t)(READ_BIT(SYSCFG->CFGR1, SYSCFG_CFGR1_BOOT_MODE));
AnnaBridge 189:f392fc9709a3 363 }
AnnaBridge 189:f392fc9709a3 364
AnnaBridge 189:f392fc9709a3 365 /**
AnnaBridge 189:f392fc9709a3 366 * @brief Firewall protection enabled
AnnaBridge 189:f392fc9709a3 367 * @rmtoll SYSCFG_CFGR2 FWDIS LL_SYSCFG_EnableFirewall
AnnaBridge 189:f392fc9709a3 368 * @retval None
AnnaBridge 189:f392fc9709a3 369 */
AnnaBridge 189:f392fc9709a3 370 __STATIC_INLINE void LL_SYSCFG_EnableFirewall(void)
AnnaBridge 189:f392fc9709a3 371 {
AnnaBridge 189:f392fc9709a3 372 CLEAR_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_FWDISEN);
AnnaBridge 189:f392fc9709a3 373 }
AnnaBridge 189:f392fc9709a3 374
AnnaBridge 189:f392fc9709a3 375 /**
AnnaBridge 189:f392fc9709a3 376 * @brief Check if Firewall protection is enabled or not
AnnaBridge 189:f392fc9709a3 377 * @rmtoll SYSCFG_CFGR2 FWDIS LL_SYSCFG_IsEnabledFirewall
AnnaBridge 189:f392fc9709a3 378 * @retval State of bit (1 or 0).
AnnaBridge 189:f392fc9709a3 379 */
AnnaBridge 189:f392fc9709a3 380 __STATIC_INLINE uint32_t LL_SYSCFG_IsEnabledFirewall(void)
AnnaBridge 189:f392fc9709a3 381 {
AnnaBridge 189:f392fc9709a3 382 return !(READ_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_FWDISEN) == SYSCFG_CFGR2_FWDISEN);
AnnaBridge 189:f392fc9709a3 383 }
AnnaBridge 189:f392fc9709a3 384
AnnaBridge 189:f392fc9709a3 385 #if defined(SYSCFG_CFGR2_CAPA)
AnnaBridge 189:f392fc9709a3 386 /**
AnnaBridge 189:f392fc9709a3 387 * @brief Set VLCD rail connection to optional external capacitor
AnnaBridge 189:f392fc9709a3 388 * @note One to three external capacitors can be connected to pads to do
AnnaBridge 189:f392fc9709a3 389 * VLCD biasing.
AnnaBridge 189:f392fc9709a3 390 * - LCD_VLCD1 rail can be connected to PB12 or PE11(*),
AnnaBridge 189:f392fc9709a3 391 * - LCD_VLCD2 rail can be connected to PB2,
AnnaBridge 189:f392fc9709a3 392 * - LCD_VLCD3 rail can be connected to PB0 or PE12(*)
AnnaBridge 189:f392fc9709a3 393 * @rmtoll SYSCFG_CFGR2 CAPA LL_SYSCFG_SetVLCDRailConnection
AnnaBridge 189:f392fc9709a3 394 * @param IoPinConnect This parameter can be a combination of the following values:
AnnaBridge 189:f392fc9709a3 395 * @arg @ref LL_SYSCFG_CAPA_VLCD1_PB12
AnnaBridge 189:f392fc9709a3 396 * @arg @ref LL_SYSCFG_CAPA_VLCD1_PE11(*)
AnnaBridge 189:f392fc9709a3 397 * @arg @ref LL_SYSCFG_CAPA_VLCD2_PB2
AnnaBridge 189:f392fc9709a3 398 * @arg @ref LL_SYSCFG_CAPA_VLCD3_PB0
AnnaBridge 189:f392fc9709a3 399 * @arg @ref LL_SYSCFG_CAPA_VLCD3_PE12(*)
AnnaBridge 189:f392fc9709a3 400 *
AnnaBridge 189:f392fc9709a3 401 * (*) value not defined in all devices
AnnaBridge 189:f392fc9709a3 402 * @retval None
AnnaBridge 189:f392fc9709a3 403 */
AnnaBridge 189:f392fc9709a3 404 __STATIC_INLINE void LL_SYSCFG_SetVLCDRailConnection(uint32_t IoPinConnect)
AnnaBridge 189:f392fc9709a3 405 {
AnnaBridge 189:f392fc9709a3 406 MODIFY_REG(SYSCFG->CFGR2, SYSCFG_CFGR2_CAPA, IoPinConnect);
AnnaBridge 189:f392fc9709a3 407 }
AnnaBridge 189:f392fc9709a3 408
AnnaBridge 189:f392fc9709a3 409
AnnaBridge 189:f392fc9709a3 410 /**
AnnaBridge 189:f392fc9709a3 411 * @brief Get VLCD rail connection configuration
AnnaBridge 189:f392fc9709a3 412 * @note One to three external capacitors can be connected to pads to do
AnnaBridge 189:f392fc9709a3 413 * VLCD biasing.
AnnaBridge 189:f392fc9709a3 414 * - LCD_VLCD1 rail can be connected to PB12 or PE11(*),
AnnaBridge 189:f392fc9709a3 415 * - LCD_VLCD2 rail can be connected to PB2,
AnnaBridge 189:f392fc9709a3 416 * - LCD_VLCD3 rail can be connected to PB0 or PE12(*)
AnnaBridge 189:f392fc9709a3 417 * @rmtoll SYSCFG_CFGR2 CAPA LL_SYSCFG_GetVLCDRailConnection
AnnaBridge 189:f392fc9709a3 418 * @retval Returned value can be a combination of the following values:
AnnaBridge 189:f392fc9709a3 419 * @arg @ref LL_SYSCFG_CAPA_VLCD1_PB12
AnnaBridge 189:f392fc9709a3 420 * @arg @ref LL_SYSCFG_CAPA_VLCD1_PE11(*)
AnnaBridge 189:f392fc9709a3 421 * @arg @ref LL_SYSCFG_CAPA_VLCD2_PB2
AnnaBridge 189:f392fc9709a3 422 * @arg @ref LL_SYSCFG_CAPA_VLCD3_PB0
AnnaBridge 189:f392fc9709a3 423 * @arg @ref LL_SYSCFG_CAPA_VLCD3_PE12(*)
AnnaBridge 189:f392fc9709a3 424 *
AnnaBridge 189:f392fc9709a3 425 * (*) value not defined in all devices
AnnaBridge 189:f392fc9709a3 426 */
AnnaBridge 189:f392fc9709a3 427 __STATIC_INLINE uint32_t LL_SYSCFG_GetVLCDRailConnection(void)
AnnaBridge 189:f392fc9709a3 428 {
AnnaBridge 189:f392fc9709a3 429 return (uint32_t)(READ_BIT(SYSCFG->CFGR2, SYSCFG_CFGR2_CAPA));
AnnaBridge 189:f392fc9709a3 430 }
AnnaBridge 189:f392fc9709a3 431 #endif
AnnaBridge 189:f392fc9709a3 432
AnnaBridge 189:f392fc9709a3 433 /**
AnnaBridge 189:f392fc9709a3 434 * @brief Enable the I2C fast mode plus driving capability.
AnnaBridge 189:f392fc9709a3 435 * @rmtoll SYSCFG_CFGR2 I2C_PBx_FMP LL_SYSCFG_EnableFastModePlus\n
AnnaBridge 189:f392fc9709a3 436 * SYSCFG_CFGR2 I2Cx_FMP LL_SYSCFG_EnableFastModePlus
AnnaBridge 189:f392fc9709a3 437 * @param ConfigFastModePlus This parameter can be a combination of the following values:
AnnaBridge 189:f392fc9709a3 438 * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB6
AnnaBridge 189:f392fc9709a3 439 * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB7
AnnaBridge 189:f392fc9709a3 440 * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB8
AnnaBridge 189:f392fc9709a3 441 * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB9
AnnaBridge 189:f392fc9709a3 442 * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C1
AnnaBridge 189:f392fc9709a3 443 * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C2 (*)
AnnaBridge 189:f392fc9709a3 444 * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C3 (*)
AnnaBridge 189:f392fc9709a3 445 *
AnnaBridge 189:f392fc9709a3 446 * (*) value not defined in all devices
AnnaBridge 189:f392fc9709a3 447 * @retval None
AnnaBridge 189:f392fc9709a3 448 */
AnnaBridge 189:f392fc9709a3 449 __STATIC_INLINE void LL_SYSCFG_EnableFastModePlus(uint32_t ConfigFastModePlus)
AnnaBridge 189:f392fc9709a3 450 {
AnnaBridge 189:f392fc9709a3 451 SET_BIT(SYSCFG->CFGR2, ConfigFastModePlus);
AnnaBridge 189:f392fc9709a3 452 }
AnnaBridge 189:f392fc9709a3 453
AnnaBridge 189:f392fc9709a3 454 /**
AnnaBridge 189:f392fc9709a3 455 * @brief Disable the I2C fast mode plus driving capability.
AnnaBridge 189:f392fc9709a3 456 * @rmtoll SYSCFG_CFGR2 I2C_PBx_FMP LL_SYSCFG_DisableFastModePlus\n
AnnaBridge 189:f392fc9709a3 457 * SYSCFG_CFGR2 I2Cx_FMP LL_SYSCFG_DisableFastModePlus
AnnaBridge 189:f392fc9709a3 458 * @param ConfigFastModePlus This parameter can be a combination of the following values:
AnnaBridge 189:f392fc9709a3 459 * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB6
AnnaBridge 189:f392fc9709a3 460 * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB7
AnnaBridge 189:f392fc9709a3 461 * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB8
AnnaBridge 189:f392fc9709a3 462 * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_PB9
AnnaBridge 189:f392fc9709a3 463 * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C1
AnnaBridge 189:f392fc9709a3 464 * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C2 (*)
AnnaBridge 189:f392fc9709a3 465 * @arg @ref LL_SYSCFG_I2C_FASTMODEPLUS_I2C3 (*)
AnnaBridge 189:f392fc9709a3 466 *
AnnaBridge 189:f392fc9709a3 467 * (*) value not defined in all devices
AnnaBridge 189:f392fc9709a3 468 * @retval None
AnnaBridge 189:f392fc9709a3 469 */
AnnaBridge 189:f392fc9709a3 470 __STATIC_INLINE void LL_SYSCFG_DisableFastModePlus(uint32_t ConfigFastModePlus)
AnnaBridge 189:f392fc9709a3 471 {
AnnaBridge 189:f392fc9709a3 472 CLEAR_BIT(SYSCFG->CFGR2, ConfigFastModePlus);
AnnaBridge 189:f392fc9709a3 473 }
AnnaBridge 189:f392fc9709a3 474
AnnaBridge 189:f392fc9709a3 475 /**
AnnaBridge 189:f392fc9709a3 476 * @brief Select which pad is connected to VREFINT_ADC
AnnaBridge 189:f392fc9709a3 477 * @rmtoll SYSCFG_CFGR3 SEL_VREF_OUT LL_SYSCFG_VREFINT_SetConnection
AnnaBridge 189:f392fc9709a3 478 * @param IoPinConnect This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 479 * @arg @ref LL_SYSCFG_VREFINT_CONNECT_NONE
AnnaBridge 189:f392fc9709a3 480 * @arg @ref LL_SYSCFG_VREFINT_CONNECT_IO1
AnnaBridge 189:f392fc9709a3 481 * @arg @ref LL_SYSCFG_VREFINT_CONNECT_IO2
AnnaBridge 189:f392fc9709a3 482 * @arg @ref LL_SYSCFG_VREFINT_CONNECT_IO1_IO2
AnnaBridge 189:f392fc9709a3 483 * @retval None
AnnaBridge 189:f392fc9709a3 484 */
AnnaBridge 189:f392fc9709a3 485 __STATIC_INLINE void LL_SYSCFG_VREFINT_SetConnection(uint32_t IoPinConnect)
AnnaBridge 189:f392fc9709a3 486 {
AnnaBridge 189:f392fc9709a3 487 MODIFY_REG(SYSCFG->CFGR3, SYSCFG_CFGR3_VREF_OUT, IoPinConnect);
AnnaBridge 189:f392fc9709a3 488 }
AnnaBridge 189:f392fc9709a3 489
AnnaBridge 189:f392fc9709a3 490 /**
AnnaBridge 189:f392fc9709a3 491 * @brief Get pad connection to VREFINT_ADC
AnnaBridge 189:f392fc9709a3 492 * @rmtoll SYSCFG_CFGR3 SEL_VREF_OUT LL_SYSCFG_VREFINT_GetConnection
AnnaBridge 189:f392fc9709a3 493 * @retval Returned value can be one of the following values:
AnnaBridge 189:f392fc9709a3 494 * @arg @ref LL_SYSCFG_VREFINT_CONNECT_NONE
AnnaBridge 189:f392fc9709a3 495 * @arg @ref LL_SYSCFG_VREFINT_CONNECT_IO1
AnnaBridge 189:f392fc9709a3 496 * @arg @ref LL_SYSCFG_VREFINT_CONNECT_IO2
AnnaBridge 189:f392fc9709a3 497 * @arg @ref LL_SYSCFG_VREFINT_CONNECT_IO1_IO2
AnnaBridge 189:f392fc9709a3 498 */
AnnaBridge 189:f392fc9709a3 499 __STATIC_INLINE uint32_t LL_SYSCFG_VREFINT_GetConnection(void)
AnnaBridge 189:f392fc9709a3 500 {
AnnaBridge 189:f392fc9709a3 501 return (uint32_t)(READ_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_VREF_OUT));
AnnaBridge 189:f392fc9709a3 502 }
AnnaBridge 189:f392fc9709a3 503
AnnaBridge 189:f392fc9709a3 504 /**
AnnaBridge 189:f392fc9709a3 505 * @brief Buffer used to generate VREFINT reference for ADC enable
AnnaBridge 189:f392fc9709a3 506 * @note The VrefInit buffer to ADC through internal path is also
AnnaBridge 189:f392fc9709a3 507 * enabled using function LL_ADC_SetCommonPathInternalCh()
AnnaBridge 189:f392fc9709a3 508 * with parameter LL_ADC_PATH_INTERNAL_VREFINT
AnnaBridge 189:f392fc9709a3 509 * @rmtoll SYSCFG_CFGR3 ENBUF_VREFINT_ADC LL_SYSCFG_VREFINT_EnableADC
AnnaBridge 189:f392fc9709a3 510 * @retval None
AnnaBridge 189:f392fc9709a3 511 */
AnnaBridge 189:f392fc9709a3 512 __STATIC_INLINE void LL_SYSCFG_VREFINT_EnableADC(void)
AnnaBridge 189:f392fc9709a3 513 {
AnnaBridge 189:f392fc9709a3 514 SET_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUF_VREFINT_ADC);
AnnaBridge 189:f392fc9709a3 515 }
AnnaBridge 189:f392fc9709a3 516
AnnaBridge 189:f392fc9709a3 517 /**
AnnaBridge 189:f392fc9709a3 518 * @brief Buffer used to generate VREFINT reference for ADC disable
AnnaBridge 189:f392fc9709a3 519 * @rmtoll SYSCFG_CFGR3 ENBUF_VREFINT_ADC LL_SYSCFG_VREFINT_DisableADC
AnnaBridge 189:f392fc9709a3 520 * @retval None
AnnaBridge 189:f392fc9709a3 521 */
AnnaBridge 189:f392fc9709a3 522 __STATIC_INLINE void LL_SYSCFG_VREFINT_DisableADC(void)
AnnaBridge 189:f392fc9709a3 523 {
AnnaBridge 189:f392fc9709a3 524 CLEAR_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUF_VREFINT_ADC);
AnnaBridge 189:f392fc9709a3 525 }
AnnaBridge 189:f392fc9709a3 526
AnnaBridge 189:f392fc9709a3 527 /**
AnnaBridge 189:f392fc9709a3 528 * @brief Buffer used to generate temperature sensor reference for ADC enable
AnnaBridge 189:f392fc9709a3 529 * @rmtoll SYSCFG_CFGR3 ENBUF_SENSOR_ADC LL_SYSCFG_TEMPSENSOR_Enable
AnnaBridge 189:f392fc9709a3 530 * @retval None
AnnaBridge 189:f392fc9709a3 531 */
AnnaBridge 189:f392fc9709a3 532 __STATIC_INLINE void LL_SYSCFG_TEMPSENSOR_Enable(void)
AnnaBridge 189:f392fc9709a3 533 {
AnnaBridge 189:f392fc9709a3 534 SET_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUF_SENSOR_ADC);
AnnaBridge 189:f392fc9709a3 535 }
AnnaBridge 189:f392fc9709a3 536
AnnaBridge 189:f392fc9709a3 537 /**
AnnaBridge 189:f392fc9709a3 538 * @brief Buffer used to generate temperature sensor reference for ADC disable
AnnaBridge 189:f392fc9709a3 539 * @rmtoll SYSCFG_CFGR3 ENBUF_SENSOR_ADC LL_SYSCFG_TEMPSENSOR_Disable
AnnaBridge 189:f392fc9709a3 540 * @retval None
AnnaBridge 189:f392fc9709a3 541 */
AnnaBridge 189:f392fc9709a3 542 __STATIC_INLINE void LL_SYSCFG_TEMPSENSOR_Disable(void)
AnnaBridge 189:f392fc9709a3 543 {
AnnaBridge 189:f392fc9709a3 544 CLEAR_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUF_SENSOR_ADC);
AnnaBridge 189:f392fc9709a3 545 }
AnnaBridge 189:f392fc9709a3 546
AnnaBridge 189:f392fc9709a3 547 /**
AnnaBridge 189:f392fc9709a3 548 * @brief Buffer used to generate VREFINT reference for comparator enable
AnnaBridge 189:f392fc9709a3 549 * @rmtoll SYSCFG_CFGR3 ENBUF_VREFINT_COMP LL_SYSCFG_VREFINT_EnableCOMP
AnnaBridge 189:f392fc9709a3 550 * @retval None
AnnaBridge 189:f392fc9709a3 551 */
AnnaBridge 189:f392fc9709a3 552 __STATIC_INLINE void LL_SYSCFG_VREFINT_EnableCOMP(void)
AnnaBridge 189:f392fc9709a3 553 {
AnnaBridge 189:f392fc9709a3 554 SET_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUFLP_VREFINT_COMP);
AnnaBridge 189:f392fc9709a3 555 }
AnnaBridge 189:f392fc9709a3 556
AnnaBridge 189:f392fc9709a3 557 /**
AnnaBridge 189:f392fc9709a3 558 * @brief Buffer used to generate VREFINT reference for comparator disable
AnnaBridge 189:f392fc9709a3 559 * @rmtoll SYSCFG_CFGR3 ENBUF_VREFINT_COMP LL_SYSCFG_VREFINT_DisableCOMP
AnnaBridge 189:f392fc9709a3 560 * @retval None
AnnaBridge 189:f392fc9709a3 561 */
AnnaBridge 189:f392fc9709a3 562 __STATIC_INLINE void LL_SYSCFG_VREFINT_DisableCOMP(void)
AnnaBridge 189:f392fc9709a3 563 {
AnnaBridge 189:f392fc9709a3 564 CLEAR_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENBUFLP_VREFINT_COMP);
AnnaBridge 189:f392fc9709a3 565 }
AnnaBridge 189:f392fc9709a3 566
AnnaBridge 189:f392fc9709a3 567 #if defined (RCC_HSI48_SUPPORT)
AnnaBridge 189:f392fc9709a3 568 /**
AnnaBridge 189:f392fc9709a3 569 * @brief Buffer used to generate VREFINT reference for HSI48 oscillator enable
AnnaBridge 189:f392fc9709a3 570 * @rmtoll SYSCFG_CFGR3 ENREF_HSI48 LL_SYSCFG_VREFINT_EnableHSI48
AnnaBridge 189:f392fc9709a3 571 * @retval None
AnnaBridge 189:f392fc9709a3 572 */
AnnaBridge 189:f392fc9709a3 573 __STATIC_INLINE void LL_SYSCFG_VREFINT_EnableHSI48(void)
AnnaBridge 189:f392fc9709a3 574 {
AnnaBridge 189:f392fc9709a3 575 SET_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENREF_HSI48);
AnnaBridge 189:f392fc9709a3 576 }
AnnaBridge 189:f392fc9709a3 577
AnnaBridge 189:f392fc9709a3 578 /**
AnnaBridge 189:f392fc9709a3 579 * @brief Buffer used to generate VREFINT reference for HSI48 oscillator disable
AnnaBridge 189:f392fc9709a3 580 * @rmtoll SYSCFG_CFGR3 ENREF_HSI48 LL_SYSCFG_VREFINT_DisableHSI48
AnnaBridge 189:f392fc9709a3 581 * @retval None
AnnaBridge 189:f392fc9709a3 582 */
AnnaBridge 189:f392fc9709a3 583 __STATIC_INLINE void LL_SYSCFG_VREFINT_DisableHSI48(void)
AnnaBridge 189:f392fc9709a3 584 {
AnnaBridge 189:f392fc9709a3 585 CLEAR_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_ENREF_HSI48);
AnnaBridge 189:f392fc9709a3 586 }
AnnaBridge 189:f392fc9709a3 587 #endif
AnnaBridge 189:f392fc9709a3 588
AnnaBridge 189:f392fc9709a3 589 /**
AnnaBridge 189:f392fc9709a3 590 * @brief Check if VREFINT is ready or not
AnnaBridge 189:f392fc9709a3 591 * @note When set, it indicates that VREFINT is available for BOR, PVD and LCD
AnnaBridge 189:f392fc9709a3 592 * @rmtoll SYSCFG_CFGR3 VREFINT_RDYF LL_SYSCFG_VREFINT_IsReady
AnnaBridge 189:f392fc9709a3 593 * @retval State of bit (1 or 0).
AnnaBridge 189:f392fc9709a3 594 */
AnnaBridge 189:f392fc9709a3 595 __STATIC_INLINE uint32_t LL_SYSCFG_VREFINT_IsReady(void)
AnnaBridge 189:f392fc9709a3 596 {
AnnaBridge 189:f392fc9709a3 597 return (READ_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_VREFINT_RDYF) == SYSCFG_CFGR3_VREFINT_RDYF);
AnnaBridge 189:f392fc9709a3 598 }
AnnaBridge 189:f392fc9709a3 599
AnnaBridge 189:f392fc9709a3 600 /**
AnnaBridge 189:f392fc9709a3 601 * @brief Lock the whole content of SYSCFG_CFGR3 register
AnnaBridge 189:f392fc9709a3 602 * @note After SYSCFG_CFGR3 register lock, only read access available.
AnnaBridge 189:f392fc9709a3 603 * Only system hardware reset unlocks SYSCFG_CFGR3 register.
AnnaBridge 189:f392fc9709a3 604 * @rmtoll SYSCFG_CFGR3 REF_LOCK LL_SYSCFG_VREFINT_Lock
AnnaBridge 189:f392fc9709a3 605 * @retval None
AnnaBridge 189:f392fc9709a3 606 */
AnnaBridge 189:f392fc9709a3 607 __STATIC_INLINE void LL_SYSCFG_VREFINT_Lock(void)
AnnaBridge 189:f392fc9709a3 608 {
AnnaBridge 189:f392fc9709a3 609 SET_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_REF_LOCK);
AnnaBridge 189:f392fc9709a3 610 }
AnnaBridge 189:f392fc9709a3 611
AnnaBridge 189:f392fc9709a3 612 /**
AnnaBridge 189:f392fc9709a3 613 * @brief Check if SYSCFG_CFGR3 register is locked (only read access) or not
AnnaBridge 189:f392fc9709a3 614 * @note When set, it indicates that SYSCFG_CFGR3 register is locked, only read access available
AnnaBridge 189:f392fc9709a3 615 * @rmtoll SYSCFG_CFGR3 REF_LOCK LL_SYSCFG_VREFINT_IsLocked
AnnaBridge 189:f392fc9709a3 616 * @retval State of bit (1 or 0).
AnnaBridge 189:f392fc9709a3 617 */
AnnaBridge 189:f392fc9709a3 618 __STATIC_INLINE uint32_t LL_SYSCFG_VREFINT_IsLocked(void)
AnnaBridge 189:f392fc9709a3 619 {
AnnaBridge 189:f392fc9709a3 620 return (READ_BIT(SYSCFG->CFGR3, SYSCFG_CFGR3_REF_LOCK) == SYSCFG_CFGR3_REF_LOCK);
AnnaBridge 189:f392fc9709a3 621 }
AnnaBridge 189:f392fc9709a3 622
AnnaBridge 189:f392fc9709a3 623 /**
AnnaBridge 189:f392fc9709a3 624 * @brief Configure source input for the EXTI external interrupt.
AnnaBridge 189:f392fc9709a3 625 * @rmtoll SYSCFG_EXTICR1 EXTI0 LL_SYSCFG_SetEXTISource\n
AnnaBridge 189:f392fc9709a3 626 * SYSCFG_EXTICR1 EXTI1 LL_SYSCFG_SetEXTISource\n
AnnaBridge 189:f392fc9709a3 627 * SYSCFG_EXTICR1 EXTI2 LL_SYSCFG_SetEXTISource\n
AnnaBridge 189:f392fc9709a3 628 * SYSCFG_EXTICR1 EXTI3 LL_SYSCFG_SetEXTISource\n
AnnaBridge 189:f392fc9709a3 629 * SYSCFG_EXTICR2 EXTI4 LL_SYSCFG_SetEXTISource\n
AnnaBridge 189:f392fc9709a3 630 * SYSCFG_EXTICR2 EXTI5 LL_SYSCFG_SetEXTISource\n
AnnaBridge 189:f392fc9709a3 631 * SYSCFG_EXTICR2 EXTI6 LL_SYSCFG_SetEXTISource\n
AnnaBridge 189:f392fc9709a3 632 * SYSCFG_EXTICR2 EXTI7 LL_SYSCFG_SetEXTISource\n
AnnaBridge 189:f392fc9709a3 633 * SYSCFG_EXTICR3 EXTI8 LL_SYSCFG_SetEXTISource\n
AnnaBridge 189:f392fc9709a3 634 * SYSCFG_EXTICR3 EXTI9 LL_SYSCFG_SetEXTISource\n
AnnaBridge 189:f392fc9709a3 635 * SYSCFG_EXTICR3 EXTI10 LL_SYSCFG_SetEXTISource\n
AnnaBridge 189:f392fc9709a3 636 * SYSCFG_EXTICR3 EXTI11 LL_SYSCFG_SetEXTISource\n
AnnaBridge 189:f392fc9709a3 637 * SYSCFG_EXTICR4 EXTI12 LL_SYSCFG_SetEXTISource\n
AnnaBridge 189:f392fc9709a3 638 * SYSCFG_EXTICR4 EXTI13 LL_SYSCFG_SetEXTISource\n
AnnaBridge 189:f392fc9709a3 639 * SYSCFG_EXTICR4 EXTI14 LL_SYSCFG_SetEXTISource\n
AnnaBridge 189:f392fc9709a3 640 * SYSCFG_EXTICR4 EXTI15 LL_SYSCFG_SetEXTISource
AnnaBridge 189:f392fc9709a3 641 * @param Port This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 642 * @arg @ref LL_SYSCFG_EXTI_PORTA
AnnaBridge 189:f392fc9709a3 643 * @arg @ref LL_SYSCFG_EXTI_PORTB
AnnaBridge 189:f392fc9709a3 644 * @arg @ref LL_SYSCFG_EXTI_PORTC
AnnaBridge 189:f392fc9709a3 645 * @arg @ref LL_SYSCFG_EXTI_PORTD (*)
AnnaBridge 189:f392fc9709a3 646 * @arg @ref LL_SYSCFG_EXTI_PORTE (*)
AnnaBridge 189:f392fc9709a3 647 * @arg @ref LL_SYSCFG_EXTI_PORTH (*)
AnnaBridge 189:f392fc9709a3 648 *
AnnaBridge 189:f392fc9709a3 649 * (*) value not defined in all devices
AnnaBridge 189:f392fc9709a3 650 * @param Line This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 651 * @arg @ref LL_SYSCFG_EXTI_LINE0
AnnaBridge 189:f392fc9709a3 652 * @arg @ref LL_SYSCFG_EXTI_LINE1
AnnaBridge 189:f392fc9709a3 653 * @arg @ref LL_SYSCFG_EXTI_LINE2
AnnaBridge 189:f392fc9709a3 654 * @arg @ref LL_SYSCFG_EXTI_LINE3
AnnaBridge 189:f392fc9709a3 655 * @arg @ref LL_SYSCFG_EXTI_LINE4
AnnaBridge 189:f392fc9709a3 656 * @arg @ref LL_SYSCFG_EXTI_LINE5
AnnaBridge 189:f392fc9709a3 657 * @arg @ref LL_SYSCFG_EXTI_LINE6
AnnaBridge 189:f392fc9709a3 658 * @arg @ref LL_SYSCFG_EXTI_LINE7
AnnaBridge 189:f392fc9709a3 659 * @arg @ref LL_SYSCFG_EXTI_LINE8
AnnaBridge 189:f392fc9709a3 660 * @arg @ref LL_SYSCFG_EXTI_LINE9
AnnaBridge 189:f392fc9709a3 661 * @arg @ref LL_SYSCFG_EXTI_LINE10
AnnaBridge 189:f392fc9709a3 662 * @arg @ref LL_SYSCFG_EXTI_LINE11
AnnaBridge 189:f392fc9709a3 663 * @arg @ref LL_SYSCFG_EXTI_LINE12
AnnaBridge 189:f392fc9709a3 664 * @arg @ref LL_SYSCFG_EXTI_LINE13
AnnaBridge 189:f392fc9709a3 665 * @arg @ref LL_SYSCFG_EXTI_LINE14
AnnaBridge 189:f392fc9709a3 666 * @arg @ref LL_SYSCFG_EXTI_LINE15
AnnaBridge 189:f392fc9709a3 667 * @retval None
AnnaBridge 189:f392fc9709a3 668 */
AnnaBridge 189:f392fc9709a3 669 __STATIC_INLINE void LL_SYSCFG_SetEXTISource(uint32_t Port, uint32_t Line)
AnnaBridge 189:f392fc9709a3 670 {
AnnaBridge 189:f392fc9709a3 671 MODIFY_REG(SYSCFG->EXTICR[Line & 0xFFU], SYSCFG_EXTICR1_EXTI0 << (Line >> 16U), Port << (Line >> 16U));
AnnaBridge 189:f392fc9709a3 672 }
AnnaBridge 189:f392fc9709a3 673
AnnaBridge 189:f392fc9709a3 674 /**
AnnaBridge 189:f392fc9709a3 675 * @brief Get the configured defined for specific EXTI Line
AnnaBridge 189:f392fc9709a3 676 * @rmtoll SYSCFG_EXTICR1 EXTI0 LL_SYSCFG_SetEXTISource\n
AnnaBridge 189:f392fc9709a3 677 * SYSCFG_EXTICR1 EXTI1 LL_SYSCFG_SetEXTISource\n
AnnaBridge 189:f392fc9709a3 678 * SYSCFG_EXTICR1 EXTI2 LL_SYSCFG_SetEXTISource\n
AnnaBridge 189:f392fc9709a3 679 * SYSCFG_EXTICR1 EXTI3 LL_SYSCFG_SetEXTISource\n
AnnaBridge 189:f392fc9709a3 680 * SYSCFG_EXTICR2 EXTI4 LL_SYSCFG_SetEXTISource\n
AnnaBridge 189:f392fc9709a3 681 * SYSCFG_EXTICR2 EXTI5 LL_SYSCFG_SetEXTISource\n
AnnaBridge 189:f392fc9709a3 682 * SYSCFG_EXTICR2 EXTI6 LL_SYSCFG_SetEXTISource\n
AnnaBridge 189:f392fc9709a3 683 * SYSCFG_EXTICR2 EXTI7 LL_SYSCFG_SetEXTISource\n
AnnaBridge 189:f392fc9709a3 684 * SYSCFG_EXTICR3 EXTI8 LL_SYSCFG_SetEXTISource\n
AnnaBridge 189:f392fc9709a3 685 * SYSCFG_EXTICR3 EXTI9 LL_SYSCFG_SetEXTISource\n
AnnaBridge 189:f392fc9709a3 686 * SYSCFG_EXTICR3 EXTI10 LL_SYSCFG_SetEXTISource\n
AnnaBridge 189:f392fc9709a3 687 * SYSCFG_EXTICR3 EXTI11 LL_SYSCFG_SetEXTISource\n
AnnaBridge 189:f392fc9709a3 688 * SYSCFG_EXTICR4 EXTI12 LL_SYSCFG_SetEXTISource\n
AnnaBridge 189:f392fc9709a3 689 * SYSCFG_EXTICR4 EXTI13 LL_SYSCFG_SetEXTISource\n
AnnaBridge 189:f392fc9709a3 690 * SYSCFG_EXTICR4 EXTI14 LL_SYSCFG_SetEXTISource\n
AnnaBridge 189:f392fc9709a3 691 * SYSCFG_EXTICR4 EXTI15 LL_SYSCFG_SetEXTISource
AnnaBridge 189:f392fc9709a3 692 * @param Line This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 693 * @arg @ref LL_SYSCFG_EXTI_LINE0
AnnaBridge 189:f392fc9709a3 694 * @arg @ref LL_SYSCFG_EXTI_LINE1
AnnaBridge 189:f392fc9709a3 695 * @arg @ref LL_SYSCFG_EXTI_LINE2
AnnaBridge 189:f392fc9709a3 696 * @arg @ref LL_SYSCFG_EXTI_LINE3
AnnaBridge 189:f392fc9709a3 697 * @arg @ref LL_SYSCFG_EXTI_LINE4
AnnaBridge 189:f392fc9709a3 698 * @arg @ref LL_SYSCFG_EXTI_LINE5
AnnaBridge 189:f392fc9709a3 699 * @arg @ref LL_SYSCFG_EXTI_LINE6
AnnaBridge 189:f392fc9709a3 700 * @arg @ref LL_SYSCFG_EXTI_LINE7
AnnaBridge 189:f392fc9709a3 701 * @arg @ref LL_SYSCFG_EXTI_LINE8
AnnaBridge 189:f392fc9709a3 702 * @arg @ref LL_SYSCFG_EXTI_LINE9
AnnaBridge 189:f392fc9709a3 703 * @arg @ref LL_SYSCFG_EXTI_LINE10
AnnaBridge 189:f392fc9709a3 704 * @arg @ref LL_SYSCFG_EXTI_LINE11
AnnaBridge 189:f392fc9709a3 705 * @arg @ref LL_SYSCFG_EXTI_LINE12
AnnaBridge 189:f392fc9709a3 706 * @arg @ref LL_SYSCFG_EXTI_LINE13
AnnaBridge 189:f392fc9709a3 707 * @arg @ref LL_SYSCFG_EXTI_LINE14
AnnaBridge 189:f392fc9709a3 708 * @arg @ref LL_SYSCFG_EXTI_LINE15
AnnaBridge 189:f392fc9709a3 709 * @retval Returned value can be one of the following values:
AnnaBridge 189:f392fc9709a3 710 * @arg @ref LL_SYSCFG_EXTI_PORTA
AnnaBridge 189:f392fc9709a3 711 * @arg @ref LL_SYSCFG_EXTI_PORTB
AnnaBridge 189:f392fc9709a3 712 * @arg @ref LL_SYSCFG_EXTI_PORTC
AnnaBridge 189:f392fc9709a3 713 * @arg @ref LL_SYSCFG_EXTI_PORTD (*)
AnnaBridge 189:f392fc9709a3 714 * @arg @ref LL_SYSCFG_EXTI_PORTE (*)
AnnaBridge 189:f392fc9709a3 715 * @arg @ref LL_SYSCFG_EXTI_PORTH (*)
AnnaBridge 189:f392fc9709a3 716 *
AnnaBridge 189:f392fc9709a3 717 * (*) value not defined in all devices
AnnaBridge 189:f392fc9709a3 718 */
AnnaBridge 189:f392fc9709a3 719 __STATIC_INLINE uint32_t LL_SYSCFG_GetEXTISource(uint32_t Line)
AnnaBridge 189:f392fc9709a3 720 {
AnnaBridge 189:f392fc9709a3 721 return (uint32_t)(READ_BIT(SYSCFG->EXTICR[Line & 0xFFU], (SYSCFG_EXTICR1_EXTI0 << (Line >> 16U))) >> (Line >> 16U));
AnnaBridge 189:f392fc9709a3 722 }
AnnaBridge 189:f392fc9709a3 723
AnnaBridge 189:f392fc9709a3 724
AnnaBridge 189:f392fc9709a3 725 /**
AnnaBridge 189:f392fc9709a3 726 * @}
AnnaBridge 189:f392fc9709a3 727 */
AnnaBridge 189:f392fc9709a3 728
AnnaBridge 189:f392fc9709a3 729
AnnaBridge 189:f392fc9709a3 730 /** @defgroup SYSTEM_LL_EF_DBGMCU DBGMCU
AnnaBridge 189:f392fc9709a3 731 * @{
AnnaBridge 189:f392fc9709a3 732 */
AnnaBridge 189:f392fc9709a3 733
AnnaBridge 189:f392fc9709a3 734 /**
AnnaBridge 189:f392fc9709a3 735 * @brief Return the device identifier
AnnaBridge 189:f392fc9709a3 736 * @rmtoll DBGMCU_IDCODE DEV_ID LL_DBGMCU_GetDeviceID
AnnaBridge 189:f392fc9709a3 737 * @retval Values between Min_Data=0x00 and Max_Data=0x7FF (ex: L053 -> 0x417, L073 -> 0x447)
AnnaBridge 189:f392fc9709a3 738 */
AnnaBridge 189:f392fc9709a3 739 __STATIC_INLINE uint32_t LL_DBGMCU_GetDeviceID(void)
AnnaBridge 189:f392fc9709a3 740 {
AnnaBridge 189:f392fc9709a3 741 return (uint32_t)(READ_BIT(DBGMCU->IDCODE, DBGMCU_IDCODE_DEV_ID));
AnnaBridge 189:f392fc9709a3 742 }
AnnaBridge 189:f392fc9709a3 743
AnnaBridge 189:f392fc9709a3 744 /**
AnnaBridge 189:f392fc9709a3 745 * @brief Return the device revision identifier
AnnaBridge 189:f392fc9709a3 746 * @note This field indicates the revision of the device.
AnnaBridge 189:f392fc9709a3 747 * @rmtoll DBGMCU_IDCODE REV_ID LL_DBGMCU_GetRevisionID
AnnaBridge 189:f392fc9709a3 748 * @retval Values between Min_Data=0x00 and Max_Data=0xFFFF
AnnaBridge 189:f392fc9709a3 749 */
AnnaBridge 189:f392fc9709a3 750 __STATIC_INLINE uint32_t LL_DBGMCU_GetRevisionID(void)
AnnaBridge 189:f392fc9709a3 751 {
AnnaBridge 189:f392fc9709a3 752 return (uint32_t)(READ_BIT(DBGMCU->IDCODE, DBGMCU_IDCODE_REV_ID) >> DBGMCU_REVID_POSITION);
AnnaBridge 189:f392fc9709a3 753 }
AnnaBridge 189:f392fc9709a3 754
AnnaBridge 189:f392fc9709a3 755 /**
AnnaBridge 189:f392fc9709a3 756 * @brief Enable the Debug Module during SLEEP mode
AnnaBridge 189:f392fc9709a3 757 * @rmtoll DBGMCU_CR DBG_SLEEP LL_DBGMCU_EnableDBGSleepMode
AnnaBridge 189:f392fc9709a3 758 * @retval None
AnnaBridge 189:f392fc9709a3 759 */
AnnaBridge 189:f392fc9709a3 760 __STATIC_INLINE void LL_DBGMCU_EnableDBGSleepMode(void)
AnnaBridge 189:f392fc9709a3 761 {
AnnaBridge 189:f392fc9709a3 762 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
AnnaBridge 189:f392fc9709a3 763 }
AnnaBridge 189:f392fc9709a3 764
AnnaBridge 189:f392fc9709a3 765 /**
AnnaBridge 189:f392fc9709a3 766 * @brief Disable the Debug Module during SLEEP mode
AnnaBridge 189:f392fc9709a3 767 * @rmtoll DBGMCU_CR DBG_SLEEP LL_DBGMCU_DisableDBGSleepMode
AnnaBridge 189:f392fc9709a3 768 * @retval None
AnnaBridge 189:f392fc9709a3 769 */
AnnaBridge 189:f392fc9709a3 770 __STATIC_INLINE void LL_DBGMCU_DisableDBGSleepMode(void)
AnnaBridge 189:f392fc9709a3 771 {
AnnaBridge 189:f392fc9709a3 772 CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_SLEEP);
AnnaBridge 189:f392fc9709a3 773 }
AnnaBridge 189:f392fc9709a3 774
AnnaBridge 189:f392fc9709a3 775 /**
AnnaBridge 189:f392fc9709a3 776 * @brief Enable the Debug Module during STOP mode
AnnaBridge 189:f392fc9709a3 777 * @rmtoll DBGMCU_CR DBG_STOP LL_DBGMCU_EnableDBGStopMode
AnnaBridge 189:f392fc9709a3 778 * @retval None
AnnaBridge 189:f392fc9709a3 779 */
AnnaBridge 189:f392fc9709a3 780 __STATIC_INLINE void LL_DBGMCU_EnableDBGStopMode(void)
AnnaBridge 189:f392fc9709a3 781 {
AnnaBridge 189:f392fc9709a3 782 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
AnnaBridge 189:f392fc9709a3 783 }
AnnaBridge 189:f392fc9709a3 784
AnnaBridge 189:f392fc9709a3 785 /**
AnnaBridge 189:f392fc9709a3 786 * @brief Disable the Debug Module during STOP mode
AnnaBridge 189:f392fc9709a3 787 * @rmtoll DBGMCU_CR DBG_STOP LL_DBGMCU_DisableDBGStopMode
AnnaBridge 189:f392fc9709a3 788 * @retval None
AnnaBridge 189:f392fc9709a3 789 */
AnnaBridge 189:f392fc9709a3 790 __STATIC_INLINE void LL_DBGMCU_DisableDBGStopMode(void)
AnnaBridge 189:f392fc9709a3 791 {
AnnaBridge 189:f392fc9709a3 792 CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STOP);
AnnaBridge 189:f392fc9709a3 793 }
AnnaBridge 189:f392fc9709a3 794
AnnaBridge 189:f392fc9709a3 795 /**
AnnaBridge 189:f392fc9709a3 796 * @brief Enable the Debug Module during STANDBY mode
AnnaBridge 189:f392fc9709a3 797 * @rmtoll DBGMCU_CR DBG_STANDBY LL_DBGMCU_EnableDBGStandbyMode
AnnaBridge 189:f392fc9709a3 798 * @retval None
AnnaBridge 189:f392fc9709a3 799 */
AnnaBridge 189:f392fc9709a3 800 __STATIC_INLINE void LL_DBGMCU_EnableDBGStandbyMode(void)
AnnaBridge 189:f392fc9709a3 801 {
AnnaBridge 189:f392fc9709a3 802 SET_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
AnnaBridge 189:f392fc9709a3 803 }
AnnaBridge 189:f392fc9709a3 804
AnnaBridge 189:f392fc9709a3 805 /**
AnnaBridge 189:f392fc9709a3 806 * @brief Disable the Debug Module during STANDBY mode
AnnaBridge 189:f392fc9709a3 807 * @rmtoll DBGMCU_CR DBG_STANDBY LL_DBGMCU_DisableDBGStandbyMode
AnnaBridge 189:f392fc9709a3 808 * @retval None
AnnaBridge 189:f392fc9709a3 809 */
AnnaBridge 189:f392fc9709a3 810 __STATIC_INLINE void LL_DBGMCU_DisableDBGStandbyMode(void)
AnnaBridge 189:f392fc9709a3 811 {
AnnaBridge 189:f392fc9709a3 812 CLEAR_BIT(DBGMCU->CR, DBGMCU_CR_DBG_STANDBY);
AnnaBridge 189:f392fc9709a3 813 }
AnnaBridge 189:f392fc9709a3 814
AnnaBridge 189:f392fc9709a3 815 /**
AnnaBridge 189:f392fc9709a3 816 * @brief Freeze APB1 peripherals (group1 peripherals)
AnnaBridge 189:f392fc9709a3 817 * @rmtoll APB1FZ DBG_TIM2_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n
AnnaBridge 189:f392fc9709a3 818 * APB1FZ DBG_TIM3_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n
AnnaBridge 189:f392fc9709a3 819 * APB1FZ DBG_TIM6_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n
AnnaBridge 189:f392fc9709a3 820 * APB1FZ DBG_TIM7_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n
AnnaBridge 189:f392fc9709a3 821 * APB1FZ DBG_RTC_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n
AnnaBridge 189:f392fc9709a3 822 * APB1FZ DBG_WWDG_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n
AnnaBridge 189:f392fc9709a3 823 * APB1FZ DBG_IWDG_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n
AnnaBridge 189:f392fc9709a3 824 * APB1FZ DBG_I2C1_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n
AnnaBridge 189:f392fc9709a3 825 * APB1FZ DBG_I2C2_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n
AnnaBridge 189:f392fc9709a3 826 * APB1FZ DBG_I2C3_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph\n
AnnaBridge 189:f392fc9709a3 827 * APB1FZ DBG_LPTIMER_STOP LL_DBGMCU_APB1_GRP1_FreezePeriph
AnnaBridge 189:f392fc9709a3 828 * @param Periphs This parameter can be a combination of the following values:
AnnaBridge 189:f392fc9709a3 829 * @arg @ref LL_DBGMCU_APB1_GRP1_TIM2_STOP
AnnaBridge 189:f392fc9709a3 830 * @arg @ref LL_DBGMCU_APB1_GRP1_TIM3_STOP (*)
AnnaBridge 189:f392fc9709a3 831 * @arg @ref LL_DBGMCU_APB1_GRP1_TIM6_STOP (*)
AnnaBridge 189:f392fc9709a3 832 * @arg @ref LL_DBGMCU_APB1_GRP1_TIM7_STOP (*)
AnnaBridge 189:f392fc9709a3 833 * @arg @ref LL_DBGMCU_APB1_GRP1_RTC_STOP
AnnaBridge 189:f392fc9709a3 834 * @arg @ref LL_DBGMCU_APB1_GRP1_WWDG_STOP
AnnaBridge 189:f392fc9709a3 835 * @arg @ref LL_DBGMCU_APB1_GRP1_IWDG_STOP
AnnaBridge 189:f392fc9709a3 836 * @arg @ref LL_DBGMCU_APB1_GRP1_I2C1_STOP
AnnaBridge 189:f392fc9709a3 837 * @arg @ref LL_DBGMCU_APB1_GRP1_I2C2_STOP (*)
AnnaBridge 189:f392fc9709a3 838 * @arg @ref LL_DBGMCU_APB1_GRP1_I2C3_STOP (*)
AnnaBridge 189:f392fc9709a3 839 * @arg @ref LL_DBGMCU_APB1_GRP1_LPTIM1_STOP
AnnaBridge 189:f392fc9709a3 840 *
AnnaBridge 189:f392fc9709a3 841 * (*) value not defined in all devices
AnnaBridge 189:f392fc9709a3 842 * @retval None
AnnaBridge 189:f392fc9709a3 843 */
AnnaBridge 189:f392fc9709a3 844 __STATIC_INLINE void LL_DBGMCU_APB1_GRP1_FreezePeriph(uint32_t Periphs)
AnnaBridge 189:f392fc9709a3 845 {
AnnaBridge 189:f392fc9709a3 846 SET_BIT(DBGMCU->APB1FZ, Periphs);
AnnaBridge 189:f392fc9709a3 847 }
AnnaBridge 189:f392fc9709a3 848
AnnaBridge 189:f392fc9709a3 849 /**
AnnaBridge 189:f392fc9709a3 850 * @brief Unfreeze APB1 peripherals (group1 peripherals)
AnnaBridge 189:f392fc9709a3 851 * @rmtoll APB1FZ DBG_TIM2_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
AnnaBridge 189:f392fc9709a3 852 * APB1FZ DBG_TIM3_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
AnnaBridge 189:f392fc9709a3 853 * APB1FZ DBG_TIM6_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
AnnaBridge 189:f392fc9709a3 854 * APB1FZ DBG_TIM7_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
AnnaBridge 189:f392fc9709a3 855 * APB1FZ DBG_RTC_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
AnnaBridge 189:f392fc9709a3 856 * APB1FZ DBG_WWDG_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
AnnaBridge 189:f392fc9709a3 857 * APB1FZ DBG_IWDG_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
AnnaBridge 189:f392fc9709a3 858 * APB1FZ DBG_I2C1_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
AnnaBridge 189:f392fc9709a3 859 * APB1FZ DBG_I2C2_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
AnnaBridge 189:f392fc9709a3 860 * APB1FZ DBG_I2C3_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph\n
AnnaBridge 189:f392fc9709a3 861 * APB1FZ DBG_LPTIMER_STOP LL_DBGMCU_APB1_GRP1_UnFreezePeriph
AnnaBridge 189:f392fc9709a3 862 * @param Periphs This parameter can be a combination of the following values:
AnnaBridge 189:f392fc9709a3 863 * @arg @ref LL_DBGMCU_APB1_GRP1_TIM2_STOP
AnnaBridge 189:f392fc9709a3 864 * @arg @ref LL_DBGMCU_APB1_GRP1_TIM3_STOP (*)
AnnaBridge 189:f392fc9709a3 865 * @arg @ref LL_DBGMCU_APB1_GRP1_TIM6_STOP (*)
AnnaBridge 189:f392fc9709a3 866 * @arg @ref LL_DBGMCU_APB1_GRP1_TIM7_STOP (*)
AnnaBridge 189:f392fc9709a3 867 * @arg @ref LL_DBGMCU_APB1_GRP1_RTC_STOP
AnnaBridge 189:f392fc9709a3 868 * @arg @ref LL_DBGMCU_APB1_GRP1_WWDG_STOP
AnnaBridge 189:f392fc9709a3 869 * @arg @ref LL_DBGMCU_APB1_GRP1_IWDG_STOP
AnnaBridge 189:f392fc9709a3 870 * @arg @ref LL_DBGMCU_APB1_GRP1_I2C1_STOP
AnnaBridge 189:f392fc9709a3 871 * @arg @ref LL_DBGMCU_APB1_GRP1_I2C2_STOP (*)
AnnaBridge 189:f392fc9709a3 872 * @arg @ref LL_DBGMCU_APB1_GRP1_I2C3_STOP (*)
AnnaBridge 189:f392fc9709a3 873 * @arg @ref LL_DBGMCU_APB1_GRP1_LPTIM1_STOP
AnnaBridge 189:f392fc9709a3 874 *
AnnaBridge 189:f392fc9709a3 875 * (*) value not defined in all devices
AnnaBridge 189:f392fc9709a3 876 * @retval None
AnnaBridge 189:f392fc9709a3 877 */
AnnaBridge 189:f392fc9709a3 878 __STATIC_INLINE void LL_DBGMCU_APB1_GRP1_UnFreezePeriph(uint32_t Periphs)
AnnaBridge 189:f392fc9709a3 879 {
AnnaBridge 189:f392fc9709a3 880 CLEAR_BIT(DBGMCU->APB1FZ, Periphs);
AnnaBridge 189:f392fc9709a3 881 }
AnnaBridge 189:f392fc9709a3 882
AnnaBridge 189:f392fc9709a3 883 /**
AnnaBridge 189:f392fc9709a3 884 * @brief Freeze APB2 peripherals
AnnaBridge 189:f392fc9709a3 885 * @rmtoll APB2FZ DBG_TIM22_STOP LL_DBGMCU_APB2_GRP1_FreezePeriph\n
AnnaBridge 189:f392fc9709a3 886 * APB2FZ DBG_TIM21_STOP LL_DBGMCU_APB2_GRP1_FreezePeriph
AnnaBridge 189:f392fc9709a3 887 * @param Periphs This parameter can be a combination of the following values:
AnnaBridge 189:f392fc9709a3 888 * @arg @ref LL_DBGMCU_APB2_GRP1_TIM22_STOP (*)
AnnaBridge 189:f392fc9709a3 889 * @arg @ref LL_DBGMCU_APB2_GRP1_TIM21_STOP
AnnaBridge 189:f392fc9709a3 890 *
AnnaBridge 189:f392fc9709a3 891 * (*) value not defined in all devices
AnnaBridge 189:f392fc9709a3 892 * @retval None
AnnaBridge 189:f392fc9709a3 893 */
AnnaBridge 189:f392fc9709a3 894 __STATIC_INLINE void LL_DBGMCU_APB2_GRP1_FreezePeriph(uint32_t Periphs)
AnnaBridge 189:f392fc9709a3 895 {
AnnaBridge 189:f392fc9709a3 896 SET_BIT(DBGMCU->APB2FZ, Periphs);
AnnaBridge 189:f392fc9709a3 897 }
AnnaBridge 189:f392fc9709a3 898
AnnaBridge 189:f392fc9709a3 899 /**
AnnaBridge 189:f392fc9709a3 900 * @brief Unfreeze APB2 peripherals
AnnaBridge 189:f392fc9709a3 901 * @rmtoll APB2FZ DBG_TIM22_STOP LL_DBGMCU_APB2_GRP1_UnFreezePeriph\n
AnnaBridge 189:f392fc9709a3 902 * APB2FZ DBG_TIM21_STOP LL_DBGMCU_APB2_GRP1_UnFreezePeriph
AnnaBridge 189:f392fc9709a3 903 * @param Periphs This parameter can be a combination of the following values:
AnnaBridge 189:f392fc9709a3 904 * @arg @ref LL_DBGMCU_APB2_GRP1_TIM22_STOP (*)
AnnaBridge 189:f392fc9709a3 905 * @arg @ref LL_DBGMCU_APB2_GRP1_TIM21_STOP
AnnaBridge 189:f392fc9709a3 906 *
AnnaBridge 189:f392fc9709a3 907 * (*) value not defined in all devices
AnnaBridge 189:f392fc9709a3 908 * @retval None
AnnaBridge 189:f392fc9709a3 909 */
AnnaBridge 189:f392fc9709a3 910 __STATIC_INLINE void LL_DBGMCU_APB2_GRP1_UnFreezePeriph(uint32_t Periphs)
AnnaBridge 189:f392fc9709a3 911 {
AnnaBridge 189:f392fc9709a3 912 CLEAR_BIT(DBGMCU->APB2FZ, Periphs);
AnnaBridge 189:f392fc9709a3 913 }
AnnaBridge 189:f392fc9709a3 914
AnnaBridge 189:f392fc9709a3 915 /**
AnnaBridge 189:f392fc9709a3 916 * @}
AnnaBridge 189:f392fc9709a3 917 */
AnnaBridge 189:f392fc9709a3 918
AnnaBridge 189:f392fc9709a3 919 /** @defgroup SYSTEM_LL_EF_FLASH FLASH
AnnaBridge 189:f392fc9709a3 920 * @{
AnnaBridge 189:f392fc9709a3 921 */
AnnaBridge 189:f392fc9709a3 922
AnnaBridge 189:f392fc9709a3 923 /**
AnnaBridge 189:f392fc9709a3 924 * @brief Set FLASH Latency
AnnaBridge 189:f392fc9709a3 925 * @rmtoll FLASH_ACR LATENCY LL_FLASH_SetLatency
AnnaBridge 189:f392fc9709a3 926 * @param Latency This parameter can be one of the following values:
AnnaBridge 189:f392fc9709a3 927 * @arg @ref LL_FLASH_LATENCY_0
AnnaBridge 189:f392fc9709a3 928 * @arg @ref LL_FLASH_LATENCY_1
AnnaBridge 189:f392fc9709a3 929 * @retval None
AnnaBridge 189:f392fc9709a3 930 */
AnnaBridge 189:f392fc9709a3 931 __STATIC_INLINE void LL_FLASH_SetLatency(uint32_t Latency)
AnnaBridge 189:f392fc9709a3 932 {
AnnaBridge 189:f392fc9709a3 933 MODIFY_REG(FLASH->ACR, FLASH_ACR_LATENCY, Latency);
AnnaBridge 189:f392fc9709a3 934 }
AnnaBridge 189:f392fc9709a3 935
AnnaBridge 189:f392fc9709a3 936 /**
AnnaBridge 189:f392fc9709a3 937 * @brief Get FLASH Latency
AnnaBridge 189:f392fc9709a3 938 * @rmtoll FLASH_ACR LATENCY LL_FLASH_GetLatency
AnnaBridge 189:f392fc9709a3 939 * @retval Returned value can be one of the following values:
AnnaBridge 189:f392fc9709a3 940 * @arg @ref LL_FLASH_LATENCY_0
AnnaBridge 189:f392fc9709a3 941 * @arg @ref LL_FLASH_LATENCY_1
AnnaBridge 189:f392fc9709a3 942 */
AnnaBridge 189:f392fc9709a3 943 __STATIC_INLINE uint32_t LL_FLASH_GetLatency(void)
AnnaBridge 189:f392fc9709a3 944 {
AnnaBridge 189:f392fc9709a3 945 return (uint32_t)(READ_BIT(FLASH->ACR, FLASH_ACR_LATENCY));
AnnaBridge 189:f392fc9709a3 946 }
AnnaBridge 189:f392fc9709a3 947
AnnaBridge 189:f392fc9709a3 948 /**
AnnaBridge 189:f392fc9709a3 949 * @brief Enable Prefetch
AnnaBridge 189:f392fc9709a3 950 * @rmtoll FLASH_ACR PRFTEN LL_FLASH_EnablePrefetch
AnnaBridge 189:f392fc9709a3 951 * @retval None
AnnaBridge 189:f392fc9709a3 952 */
AnnaBridge 189:f392fc9709a3 953 __STATIC_INLINE void LL_FLASH_EnablePrefetch(void)
AnnaBridge 189:f392fc9709a3 954 {
AnnaBridge 189:f392fc9709a3 955 SET_BIT(FLASH->ACR, FLASH_ACR_PRFTEN);
AnnaBridge 189:f392fc9709a3 956 }
AnnaBridge 189:f392fc9709a3 957
AnnaBridge 189:f392fc9709a3 958 /**
AnnaBridge 189:f392fc9709a3 959 * @brief Disable Prefetch
AnnaBridge 189:f392fc9709a3 960 * @rmtoll FLASH_ACR PRFTEN LL_FLASH_DisablePrefetch
AnnaBridge 189:f392fc9709a3 961 * @retval None
AnnaBridge 189:f392fc9709a3 962 */
AnnaBridge 189:f392fc9709a3 963 __STATIC_INLINE void LL_FLASH_DisablePrefetch(void)
AnnaBridge 189:f392fc9709a3 964 {
AnnaBridge 189:f392fc9709a3 965 CLEAR_BIT(FLASH->ACR, FLASH_ACR_PRFTEN);
AnnaBridge 189:f392fc9709a3 966 }
AnnaBridge 189:f392fc9709a3 967
AnnaBridge 189:f392fc9709a3 968 /**
AnnaBridge 189:f392fc9709a3 969 * @brief Check if Prefetch buffer is enabled
AnnaBridge 189:f392fc9709a3 970 * @rmtoll FLASH_ACR PRFTEN LL_FLASH_IsPrefetchEnabled
AnnaBridge 189:f392fc9709a3 971 * @retval State of bit (1 or 0).
AnnaBridge 189:f392fc9709a3 972 */
AnnaBridge 189:f392fc9709a3 973 __STATIC_INLINE uint32_t LL_FLASH_IsPrefetchEnabled(void)
AnnaBridge 189:f392fc9709a3 974 {
AnnaBridge 189:f392fc9709a3 975 return (READ_BIT(FLASH->ACR, FLASH_ACR_PRFTEN) == (FLASH_ACR_PRFTEN));
AnnaBridge 189:f392fc9709a3 976 }
AnnaBridge 189:f392fc9709a3 977
AnnaBridge 189:f392fc9709a3 978
AnnaBridge 189:f392fc9709a3 979 /**
AnnaBridge 189:f392fc9709a3 980 * @brief Enable Flash Power-down mode during run mode or Low-power run mode
AnnaBridge 189:f392fc9709a3 981 * @note Flash memory can be put in power-down mode only when the code is executed
AnnaBridge 189:f392fc9709a3 982 * from RAM
AnnaBridge 189:f392fc9709a3 983 * @note Flash must not be accessed when power down is enabled
AnnaBridge 189:f392fc9709a3 984 * @note Flash must not be put in power-down while a program or an erase operation
AnnaBridge 189:f392fc9709a3 985 * is on-going
AnnaBridge 189:f392fc9709a3 986 * @rmtoll FLASH_ACR RUN_PD LL_FLASH_EnableRunPowerDown\n
AnnaBridge 189:f392fc9709a3 987 * FLASH_PDKEYR PDKEY1 LL_FLASH_EnableRunPowerDown\n
AnnaBridge 189:f392fc9709a3 988 * FLASH_PDKEYR PDKEY2 LL_FLASH_EnableRunPowerDown
AnnaBridge 189:f392fc9709a3 989 * @retval None
AnnaBridge 189:f392fc9709a3 990 */
AnnaBridge 189:f392fc9709a3 991 __STATIC_INLINE void LL_FLASH_EnableRunPowerDown(void)
AnnaBridge 189:f392fc9709a3 992 {
AnnaBridge 189:f392fc9709a3 993 /* Following values must be written consecutively to unlock the RUN_PD bit in
AnnaBridge 189:f392fc9709a3 994 FLASH_ACR */
AnnaBridge 189:f392fc9709a3 995 WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY1);
AnnaBridge 189:f392fc9709a3 996 WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY2);
AnnaBridge 189:f392fc9709a3 997 SET_BIT(FLASH->ACR, FLASH_ACR_RUN_PD);
AnnaBridge 189:f392fc9709a3 998 }
AnnaBridge 189:f392fc9709a3 999
AnnaBridge 189:f392fc9709a3 1000 /**
AnnaBridge 189:f392fc9709a3 1001 * @brief Disable Flash Power-down mode during run mode or Low-power run mode
AnnaBridge 189:f392fc9709a3 1002 * @rmtoll FLASH_ACR RUN_PD LL_FLASH_DisableRunPowerDown\n
AnnaBridge 189:f392fc9709a3 1003 * FLASH_PDKEYR PDKEY1 LL_FLASH_DisableRunPowerDown\n
AnnaBridge 189:f392fc9709a3 1004 * FLASH_PDKEYR PDKEY2 LL_FLASH_DisableRunPowerDown
AnnaBridge 189:f392fc9709a3 1005 * @retval None
AnnaBridge 189:f392fc9709a3 1006 */
AnnaBridge 189:f392fc9709a3 1007 __STATIC_INLINE void LL_FLASH_DisableRunPowerDown(void)
AnnaBridge 189:f392fc9709a3 1008 {
AnnaBridge 189:f392fc9709a3 1009 /* Following values must be written consecutively to unlock the RUN_PD bit in
AnnaBridge 189:f392fc9709a3 1010 FLASH_ACR */
AnnaBridge 189:f392fc9709a3 1011 WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY1);
AnnaBridge 189:f392fc9709a3 1012 WRITE_REG(FLASH->PDKEYR, FLASH_PDKEY2);
AnnaBridge 189:f392fc9709a3 1013 CLEAR_BIT(FLASH->ACR, FLASH_ACR_RUN_PD);
AnnaBridge 189:f392fc9709a3 1014 }
AnnaBridge 189:f392fc9709a3 1015
AnnaBridge 189:f392fc9709a3 1016 /**
AnnaBridge 189:f392fc9709a3 1017 * @brief Enable Flash Power-down mode during Sleep or Low-power sleep mode
AnnaBridge 189:f392fc9709a3 1018 * @note Flash must not be put in power-down while a program or an erase operation
AnnaBridge 189:f392fc9709a3 1019 * is on-going
AnnaBridge 189:f392fc9709a3 1020 * @rmtoll FLASH_ACR SLEEP_PD LL_FLASH_EnableSleepPowerDown
AnnaBridge 189:f392fc9709a3 1021 * @retval None
AnnaBridge 189:f392fc9709a3 1022 */
AnnaBridge 189:f392fc9709a3 1023 __STATIC_INLINE void LL_FLASH_EnableSleepPowerDown(void)
AnnaBridge 189:f392fc9709a3 1024 {
AnnaBridge 189:f392fc9709a3 1025 SET_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD);
AnnaBridge 189:f392fc9709a3 1026 }
AnnaBridge 189:f392fc9709a3 1027
AnnaBridge 189:f392fc9709a3 1028 /**
AnnaBridge 189:f392fc9709a3 1029 * @brief Disable Flash Power-down mode during Sleep or Low-power sleep mode
AnnaBridge 189:f392fc9709a3 1030 * @rmtoll FLASH_ACR SLEEP_PD LL_FLASH_DisableSleepPowerDown
AnnaBridge 189:f392fc9709a3 1031 * @retval None
AnnaBridge 189:f392fc9709a3 1032 */
AnnaBridge 189:f392fc9709a3 1033 __STATIC_INLINE void LL_FLASH_DisableSleepPowerDown(void)
AnnaBridge 189:f392fc9709a3 1034 {
AnnaBridge 189:f392fc9709a3 1035 CLEAR_BIT(FLASH->ACR, FLASH_ACR_SLEEP_PD);
AnnaBridge 189:f392fc9709a3 1036 }
AnnaBridge 189:f392fc9709a3 1037
AnnaBridge 189:f392fc9709a3 1038 /**
AnnaBridge 189:f392fc9709a3 1039 * @brief Enable buffers used as a cache during read access
AnnaBridge 189:f392fc9709a3 1040 * @rmtoll FLASH_ACR DISAB_BUF LL_FLASH_EnableBuffers
AnnaBridge 189:f392fc9709a3 1041 * @retval None
AnnaBridge 189:f392fc9709a3 1042 */
AnnaBridge 189:f392fc9709a3 1043 __STATIC_INLINE void LL_FLASH_EnableBuffers(void)
AnnaBridge 189:f392fc9709a3 1044 {
AnnaBridge 189:f392fc9709a3 1045 CLEAR_BIT(FLASH->ACR, FLASH_ACR_DISAB_BUF);
AnnaBridge 189:f392fc9709a3 1046 }
AnnaBridge 189:f392fc9709a3 1047
AnnaBridge 189:f392fc9709a3 1048 /**
AnnaBridge 189:f392fc9709a3 1049 * @brief Disable buffers used as a cache during read access
AnnaBridge 189:f392fc9709a3 1050 * @note When disabled, every read will access the NVM even for
AnnaBridge 189:f392fc9709a3 1051 * an address already read (for example, the previous address).
AnnaBridge 189:f392fc9709a3 1052 * @rmtoll FLASH_ACR DISAB_BUF LL_FLASH_DisableBuffers
AnnaBridge 189:f392fc9709a3 1053 * @retval None
AnnaBridge 189:f392fc9709a3 1054 */
AnnaBridge 189:f392fc9709a3 1055 __STATIC_INLINE void LL_FLASH_DisableBuffers(void)
AnnaBridge 189:f392fc9709a3 1056 {
AnnaBridge 189:f392fc9709a3 1057 SET_BIT(FLASH->ACR, FLASH_ACR_DISAB_BUF);
AnnaBridge 189:f392fc9709a3 1058 }
AnnaBridge 189:f392fc9709a3 1059
AnnaBridge 189:f392fc9709a3 1060 /**
AnnaBridge 189:f392fc9709a3 1061 * @brief Enable pre-read
AnnaBridge 189:f392fc9709a3 1062 * @note When enabled, the memory interface stores the last address
AnnaBridge 189:f392fc9709a3 1063 * read as data and tries to read the next one when no other
AnnaBridge 189:f392fc9709a3 1064 * read or write or prefetch operation is ongoing.
AnnaBridge 189:f392fc9709a3 1065 * It is automatically disabled every time the buffers are disabled.
AnnaBridge 189:f392fc9709a3 1066 * @rmtoll FLASH_ACR PRE_READ LL_FLASH_EnablePreRead
AnnaBridge 189:f392fc9709a3 1067 * @retval None
AnnaBridge 189:f392fc9709a3 1068 */
AnnaBridge 189:f392fc9709a3 1069 __STATIC_INLINE void LL_FLASH_EnablePreRead(void)
AnnaBridge 189:f392fc9709a3 1070 {
AnnaBridge 189:f392fc9709a3 1071 SET_BIT(FLASH->ACR, FLASH_ACR_PRE_READ);
AnnaBridge 189:f392fc9709a3 1072 }
AnnaBridge 189:f392fc9709a3 1073
AnnaBridge 189:f392fc9709a3 1074 /**
AnnaBridge 189:f392fc9709a3 1075 * @brief Disable pre-read
AnnaBridge 189:f392fc9709a3 1076 * @rmtoll FLASH_ACR PRE_READ LL_FLASH_DisablePreRead
AnnaBridge 189:f392fc9709a3 1077 * @retval None
AnnaBridge 189:f392fc9709a3 1078 */
AnnaBridge 189:f392fc9709a3 1079 __STATIC_INLINE void LL_FLASH_DisablePreRead(void)
AnnaBridge 189:f392fc9709a3 1080 {
AnnaBridge 189:f392fc9709a3 1081 CLEAR_BIT(FLASH->ACR, FLASH_ACR_PRE_READ);
AnnaBridge 189:f392fc9709a3 1082 }
AnnaBridge 189:f392fc9709a3 1083
AnnaBridge 189:f392fc9709a3 1084 /**
AnnaBridge 189:f392fc9709a3 1085 * @}
AnnaBridge 189:f392fc9709a3 1086 */
AnnaBridge 189:f392fc9709a3 1087
AnnaBridge 189:f392fc9709a3 1088 /**
AnnaBridge 189:f392fc9709a3 1089 * @}
AnnaBridge 189:f392fc9709a3 1090 */
AnnaBridge 189:f392fc9709a3 1091
AnnaBridge 189:f392fc9709a3 1092 /**
AnnaBridge 189:f392fc9709a3 1093 * @}
AnnaBridge 189:f392fc9709a3 1094 */
AnnaBridge 189:f392fc9709a3 1095
AnnaBridge 189:f392fc9709a3 1096 #endif /* defined (FLASH) || defined (SYSCFG) || defined (DBGMCU) */
AnnaBridge 189:f392fc9709a3 1097
AnnaBridge 189:f392fc9709a3 1098 /**
AnnaBridge 189:f392fc9709a3 1099 * @}
AnnaBridge 189:f392fc9709a3 1100 */
AnnaBridge 189:f392fc9709a3 1101
AnnaBridge 189:f392fc9709a3 1102 #ifdef __cplusplus
AnnaBridge 189:f392fc9709a3 1103 }
AnnaBridge 189:f392fc9709a3 1104 #endif
AnnaBridge 189:f392fc9709a3 1105
AnnaBridge 189:f392fc9709a3 1106 #endif /* __STM32L0xx_LL_SYSTEM_H */
AnnaBridge 189:f392fc9709a3 1107
AnnaBridge 189:f392fc9709a3 1108 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/