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cmsis/BUILD/mbed/TARGET_DISCO_L072CZ_LRWAN1/TOOLCHAIN_IAR/stm32l0xx_ll_i2c.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:: AnnaBridge
Date:: Wed Feb 20 22:31:08 2019 +0000
Revision:: 189:f392fc9709a3

mbed library release version 165

Who changed what in which revision?

User	Revision	Line number	New contents of line
AnnaBridge	189:f392fc9709a3	1	/**
AnnaBridge	189:f392fc9709a3	2	******************************************************************************
AnnaBridge	189:f392fc9709a3	3	* @file stm32l0xx_ll_i2c.h
AnnaBridge	189:f392fc9709a3	4	* @author MCD Application Team
AnnaBridge	189:f392fc9709a3	5	* @brief Header file of I2C LL module.
AnnaBridge	189:f392fc9709a3	6	******************************************************************************
AnnaBridge	189:f392fc9709a3	7	* @attention
AnnaBridge	189:f392fc9709a3	8	*
AnnaBridge	189:f392fc9709a3	9	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
AnnaBridge	189:f392fc9709a3	10	*
AnnaBridge	189:f392fc9709a3	11	* Redistribution and use in source and binary forms, with or without modification,
AnnaBridge	189:f392fc9709a3	12	* are permitted provided that the following conditions are met:
AnnaBridge	189:f392fc9709a3	13	* 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge	189:f392fc9709a3	14	* this list of conditions and the following disclaimer.
AnnaBridge	189:f392fc9709a3	15	* 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge	189:f392fc9709a3	16	* this list of conditions and the following disclaimer in the documentation
AnnaBridge	189:f392fc9709a3	17	* and/or other materials provided with the distribution.
AnnaBridge	189:f392fc9709a3	18	* 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge	189:f392fc9709a3	19	* may be used to endorse or promote products derived from this software
AnnaBridge	189:f392fc9709a3	20	* without specific prior written permission.
AnnaBridge	189:f392fc9709a3	21	*
AnnaBridge	189:f392fc9709a3	22	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge	189:f392fc9709a3	23	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge	189:f392fc9709a3	24	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge	189:f392fc9709a3	25	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge	189:f392fc9709a3	26	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge	189:f392fc9709a3	27	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge	189:f392fc9709a3	28	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge	189:f392fc9709a3	29	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge	189:f392fc9709a3	30	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge	189:f392fc9709a3	31	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge	189:f392fc9709a3	32	*
AnnaBridge	189:f392fc9709a3	33	******************************************************************************
AnnaBridge	189:f392fc9709a3	34	*/
AnnaBridge	189:f392fc9709a3	35
AnnaBridge	189:f392fc9709a3	36	/* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge	189:f392fc9709a3	37	#ifndef __STM32L0xx_LL_I2C_H
AnnaBridge	189:f392fc9709a3	38	#define __STM32L0xx_LL_I2C_H
AnnaBridge	189:f392fc9709a3	39
AnnaBridge	189:f392fc9709a3	40	#ifdef __cplusplus
AnnaBridge	189:f392fc9709a3	41	extern "C" {
AnnaBridge	189:f392fc9709a3	42	#endif
AnnaBridge	189:f392fc9709a3	43
AnnaBridge	189:f392fc9709a3	44	/* Includes ------------------------------------------------------------------*/
AnnaBridge	189:f392fc9709a3	45	#include "stm32l0xx.h"
AnnaBridge	189:f392fc9709a3	46
AnnaBridge	189:f392fc9709a3	47	/** @addtogroup STM32L0xx_LL_Driver
AnnaBridge	189:f392fc9709a3	48	* @{
AnnaBridge	189:f392fc9709a3	49	*/
AnnaBridge	189:f392fc9709a3	50
AnnaBridge	189:f392fc9709a3	51	#if defined (I2C1) \|\| defined (I2C2) \|\| defined (I2C3)
AnnaBridge	189:f392fc9709a3	52
AnnaBridge	189:f392fc9709a3	53	/** @defgroup I2C_LL I2C
AnnaBridge	189:f392fc9709a3	54	* @{
AnnaBridge	189:f392fc9709a3	55	*/
AnnaBridge	189:f392fc9709a3	56
AnnaBridge	189:f392fc9709a3	57	/* Private types -------------------------------------------------------------*/
AnnaBridge	189:f392fc9709a3	58	/* Private variables ---------------------------------------------------------*/
AnnaBridge	189:f392fc9709a3	59
AnnaBridge	189:f392fc9709a3	60	/* Private constants ---------------------------------------------------------*/
AnnaBridge	189:f392fc9709a3	61	/** @defgroup I2C_LL_Private_Constants I2C Private Constants
AnnaBridge	189:f392fc9709a3	62	* @{
AnnaBridge	189:f392fc9709a3	63	*/
AnnaBridge	189:f392fc9709a3	64	/**
AnnaBridge	189:f392fc9709a3	65	* @}
AnnaBridge	189:f392fc9709a3	66	*/
AnnaBridge	189:f392fc9709a3	67
AnnaBridge	189:f392fc9709a3	68	/* Private macros ------------------------------------------------------------*/
AnnaBridge	189:f392fc9709a3	69	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	189:f392fc9709a3	70	/** @defgroup I2C_LL_Private_Macros I2C Private Macros
AnnaBridge	189:f392fc9709a3	71	* @{
AnnaBridge	189:f392fc9709a3	72	*/
AnnaBridge	189:f392fc9709a3	73	/**
AnnaBridge	189:f392fc9709a3	74	* @}
AnnaBridge	189:f392fc9709a3	75	*/
AnnaBridge	189:f392fc9709a3	76	#endif /USE_FULL_LL_DRIVER/
AnnaBridge	189:f392fc9709a3	77
AnnaBridge	189:f392fc9709a3	78	/* Exported types ------------------------------------------------------------*/
AnnaBridge	189:f392fc9709a3	79	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	189:f392fc9709a3	80	/** @defgroup I2C_LL_ES_INIT I2C Exported Init structure
AnnaBridge	189:f392fc9709a3	81	* @{
AnnaBridge	189:f392fc9709a3	82	*/
AnnaBridge	189:f392fc9709a3	83	typedef struct
AnnaBridge	189:f392fc9709a3	84	{
AnnaBridge	189:f392fc9709a3	85	uint32_t PeripheralMode; /*!< Specifies the peripheral mode.
AnnaBridge	189:f392fc9709a3	86	This parameter can be a value of @ref I2C_LL_EC_PERIPHERAL_MODE
AnnaBridge	189:f392fc9709a3	87
AnnaBridge	189:f392fc9709a3	88	This feature can be modified afterwards using unitary function @ref LL_I2C_SetMode(). */
AnnaBridge	189:f392fc9709a3	89
AnnaBridge	189:f392fc9709a3	90	uint32_t Timing; /*!< Specifies the SDA setup, hold time and the SCL high, low period values.
AnnaBridge	189:f392fc9709a3	91	This parameter must be set by referring to the STM32CubeMX Tool and
AnnaBridge	189:f392fc9709a3	92	the helper macro @ref __LL_I2C_CONVERT_TIMINGS()
AnnaBridge	189:f392fc9709a3	93
AnnaBridge	189:f392fc9709a3	94	This feature can be modified afterwards using unitary function @ref LL_I2C_SetTiming(). */
AnnaBridge	189:f392fc9709a3	95
AnnaBridge	189:f392fc9709a3	96	uint32_t AnalogFilter; /*!< Enables or disables analog noise filter.
AnnaBridge	189:f392fc9709a3	97	This parameter can be a value of @ref I2C_LL_EC_ANALOGFILTER_SELECTION
AnnaBridge	189:f392fc9709a3	98
AnnaBridge	189:f392fc9709a3	99	This feature can be modified afterwards using unitary functions @ref LL_I2C_EnableAnalogFilter() or LL_I2C_DisableAnalogFilter(). */
AnnaBridge	189:f392fc9709a3	100
AnnaBridge	189:f392fc9709a3	101	uint32_t DigitalFilter; /*!< Configures the digital noise filter.
AnnaBridge	189:f392fc9709a3	102	This parameter can be a number between Min_Data = 0x00 and Max_Data = 0x0F
AnnaBridge	189:f392fc9709a3	103
AnnaBridge	189:f392fc9709a3	104	This feature can be modified afterwards using unitary function @ref LL_I2C_SetDigitalFilter(). */
AnnaBridge	189:f392fc9709a3	105
AnnaBridge	189:f392fc9709a3	106	uint32_t OwnAddress1; /*!< Specifies the device own address 1.
AnnaBridge	189:f392fc9709a3	107	This parameter must be a value between Min_Data = 0x00 and Max_Data = 0x3FF
AnnaBridge	189:f392fc9709a3	108
AnnaBridge	189:f392fc9709a3	109	This feature can be modified afterwards using unitary function @ref LL_I2C_SetOwnAddress1(). */
AnnaBridge	189:f392fc9709a3	110
AnnaBridge	189:f392fc9709a3	111	uint32_t TypeAcknowledge; /*!< Specifies the ACKnowledge or Non ACKnowledge condition after the address receive match code or next received byte.
AnnaBridge	189:f392fc9709a3	112	This parameter can be a value of @ref I2C_LL_EC_I2C_ACKNOWLEDGE
AnnaBridge	189:f392fc9709a3	113
AnnaBridge	189:f392fc9709a3	114	This feature can be modified afterwards using unitary function @ref LL_I2C_AcknowledgeNextData(). */
AnnaBridge	189:f392fc9709a3	115
AnnaBridge	189:f392fc9709a3	116	uint32_t OwnAddrSize; /*!< Specifies the device own address 1 size (7-bit or 10-bit).
AnnaBridge	189:f392fc9709a3	117	This parameter can be a value of @ref I2C_LL_EC_OWNADDRESS1
AnnaBridge	189:f392fc9709a3	118
AnnaBridge	189:f392fc9709a3	119	This feature can be modified afterwards using unitary function @ref LL_I2C_SetOwnAddress1(). */
AnnaBridge	189:f392fc9709a3	120	} LL_I2C_InitTypeDef;
AnnaBridge	189:f392fc9709a3	121	/**
AnnaBridge	189:f392fc9709a3	122	* @}
AnnaBridge	189:f392fc9709a3	123	*/
AnnaBridge	189:f392fc9709a3	124	#endif /USE_FULL_LL_DRIVER/
AnnaBridge	189:f392fc9709a3	125
AnnaBridge	189:f392fc9709a3	126	/* Exported constants --------------------------------------------------------*/
AnnaBridge	189:f392fc9709a3	127	/** @defgroup I2C_LL_Exported_Constants I2C Exported Constants
AnnaBridge	189:f392fc9709a3	128	* @{
AnnaBridge	189:f392fc9709a3	129	*/
AnnaBridge	189:f392fc9709a3	130
AnnaBridge	189:f392fc9709a3	131	/** @defgroup I2C_LL_EC_CLEAR_FLAG Clear Flags Defines
AnnaBridge	189:f392fc9709a3	132	* @brief Flags defines which can be used with LL_I2C_WriteReg function
AnnaBridge	189:f392fc9709a3	133	* @{
AnnaBridge	189:f392fc9709a3	134	*/
AnnaBridge	189:f392fc9709a3	135	#define LL_I2C_ICR_ADDRCF I2C_ICR_ADDRCF /!< Address Matched flag /
AnnaBridge	189:f392fc9709a3	136	#define LL_I2C_ICR_NACKCF I2C_ICR_NACKCF /!< Not Acknowledge flag /
AnnaBridge	189:f392fc9709a3	137	#define LL_I2C_ICR_STOPCF I2C_ICR_STOPCF /!< Stop detection flag /
AnnaBridge	189:f392fc9709a3	138	#define LL_I2C_ICR_BERRCF I2C_ICR_BERRCF /!< Bus error flag /
AnnaBridge	189:f392fc9709a3	139	#define LL_I2C_ICR_ARLOCF I2C_ICR_ARLOCF /!< Arbitration Lost flag /
AnnaBridge	189:f392fc9709a3	140	#define LL_I2C_ICR_OVRCF I2C_ICR_OVRCF /!< Overrun/Underrun flag /
AnnaBridge	189:f392fc9709a3	141	#define LL_I2C_ICR_PECCF I2C_ICR_PECCF /!< PEC error flag /
AnnaBridge	189:f392fc9709a3	142	#define LL_I2C_ICR_TIMOUTCF I2C_ICR_TIMOUTCF /!< Timeout detection flag /
AnnaBridge	189:f392fc9709a3	143	#define LL_I2C_ICR_ALERTCF I2C_ICR_ALERTCF /!< Alert flag /
AnnaBridge	189:f392fc9709a3	144	/**
AnnaBridge	189:f392fc9709a3	145	* @}
AnnaBridge	189:f392fc9709a3	146	*/
AnnaBridge	189:f392fc9709a3	147
AnnaBridge	189:f392fc9709a3	148	/** @defgroup I2C_LL_EC_GET_FLAG Get Flags Defines
AnnaBridge	189:f392fc9709a3	149	* @brief Flags defines which can be used with LL_I2C_ReadReg function
AnnaBridge	189:f392fc9709a3	150	* @{
AnnaBridge	189:f392fc9709a3	151	*/
AnnaBridge	189:f392fc9709a3	152	#define LL_I2C_ISR_TXE I2C_ISR_TXE /!< Transmit data register empty /
AnnaBridge	189:f392fc9709a3	153	#define LL_I2C_ISR_TXIS I2C_ISR_TXIS /!< Transmit interrupt status /
AnnaBridge	189:f392fc9709a3	154	#define LL_I2C_ISR_RXNE I2C_ISR_RXNE /!< Receive data register not empty /
AnnaBridge	189:f392fc9709a3	155	#define LL_I2C_ISR_ADDR I2C_ISR_ADDR /!< Address matched (slave mode) /
AnnaBridge	189:f392fc9709a3	156	#define LL_I2C_ISR_NACKF I2C_ISR_NACKF /!< Not Acknowledge received flag /
AnnaBridge	189:f392fc9709a3	157	#define LL_I2C_ISR_STOPF I2C_ISR_STOPF /!< Stop detection flag /
AnnaBridge	189:f392fc9709a3	158	#define LL_I2C_ISR_TC I2C_ISR_TC /!< Transfer Complete (master mode) /
AnnaBridge	189:f392fc9709a3	159	#define LL_I2C_ISR_TCR I2C_ISR_TCR /!< Transfer Complete Reload /
AnnaBridge	189:f392fc9709a3	160	#define LL_I2C_ISR_BERR I2C_ISR_BERR /!< Bus error /
AnnaBridge	189:f392fc9709a3	161	#define LL_I2C_ISR_ARLO I2C_ISR_ARLO /!< Arbitration lost /
AnnaBridge	189:f392fc9709a3	162	#define LL_I2C_ISR_OVR I2C_ISR_OVR /!< Overrun/Underrun (slave mode) /
AnnaBridge	189:f392fc9709a3	163	#define LL_I2C_ISR_PECERR I2C_ISR_PECERR /!< PEC Error in reception (SMBus mode) /
AnnaBridge	189:f392fc9709a3	164	#define LL_I2C_ISR_TIMEOUT I2C_ISR_TIMEOUT /!< Timeout detection flag (SMBus mode) /
AnnaBridge	189:f392fc9709a3	165	#define LL_I2C_ISR_ALERT I2C_ISR_ALERT /!< SMBus alert (SMBus mode) /
AnnaBridge	189:f392fc9709a3	166	#define LL_I2C_ISR_BUSY I2C_ISR_BUSY /!< Bus busy /
AnnaBridge	189:f392fc9709a3	167	/**
AnnaBridge	189:f392fc9709a3	168	* @}
AnnaBridge	189:f392fc9709a3	169	*/
AnnaBridge	189:f392fc9709a3	170
AnnaBridge	189:f392fc9709a3	171	/** @defgroup I2C_LL_EC_IT IT Defines
AnnaBridge	189:f392fc9709a3	172	* @brief IT defines which can be used with LL_I2C_ReadReg and LL_I2C_WriteReg functions
AnnaBridge	189:f392fc9709a3	173	* @{
AnnaBridge	189:f392fc9709a3	174	*/
AnnaBridge	189:f392fc9709a3	175	#define LL_I2C_CR1_TXIE I2C_CR1_TXIE /!< TX Interrupt enable /
AnnaBridge	189:f392fc9709a3	176	#define LL_I2C_CR1_RXIE I2C_CR1_RXIE /!< RX Interrupt enable /
AnnaBridge	189:f392fc9709a3	177	#define LL_I2C_CR1_ADDRIE I2C_CR1_ADDRIE /!< Address match Interrupt enable (slave only) /
AnnaBridge	189:f392fc9709a3	178	#define LL_I2C_CR1_NACKIE I2C_CR1_NACKIE /!< Not acknowledge received Interrupt enable /
AnnaBridge	189:f392fc9709a3	179	#define LL_I2C_CR1_STOPIE I2C_CR1_STOPIE /!< STOP detection Interrupt enable /
AnnaBridge	189:f392fc9709a3	180	#define LL_I2C_CR1_TCIE I2C_CR1_TCIE /!< Transfer Complete interrupt enable /
AnnaBridge	189:f392fc9709a3	181	#define LL_I2C_CR1_ERRIE I2C_CR1_ERRIE /!< Error interrupts enable /
AnnaBridge	189:f392fc9709a3	182	/**
AnnaBridge	189:f392fc9709a3	183	* @}
AnnaBridge	189:f392fc9709a3	184	*/
AnnaBridge	189:f392fc9709a3	185
AnnaBridge	189:f392fc9709a3	186	/** @defgroup I2C_LL_EC_PERIPHERAL_MODE Peripheral Mode
AnnaBridge	189:f392fc9709a3	187	* @{
AnnaBridge	189:f392fc9709a3	188	*/
AnnaBridge	189:f392fc9709a3	189	#define LL_I2C_MODE_I2C 0x00000000U /!< I2C Master or Slave mode /
AnnaBridge	189:f392fc9709a3	190	#define LL_I2C_MODE_SMBUS_HOST I2C_CR1_SMBHEN /!< SMBus Host address acknowledge /
AnnaBridge	189:f392fc9709a3	191	#define LL_I2C_MODE_SMBUS_DEVICE 0x00000000U /!< SMBus Device default mode (Default address not acknowledge) /
AnnaBridge	189:f392fc9709a3	192	#define LL_I2C_MODE_SMBUS_DEVICE_ARP I2C_CR1_SMBDEN /!< SMBus Device Default address acknowledge /
AnnaBridge	189:f392fc9709a3	193	/**
AnnaBridge	189:f392fc9709a3	194	* @}
AnnaBridge	189:f392fc9709a3	195	*/
AnnaBridge	189:f392fc9709a3	196
AnnaBridge	189:f392fc9709a3	197	/** @defgroup I2C_LL_EC_ANALOGFILTER_SELECTION Analog Filter Selection
AnnaBridge	189:f392fc9709a3	198	* @{
AnnaBridge	189:f392fc9709a3	199	*/
AnnaBridge	189:f392fc9709a3	200	#define LL_I2C_ANALOGFILTER_ENABLE 0x00000000U /!< Analog filter is enabled. /
AnnaBridge	189:f392fc9709a3	201	#define LL_I2C_ANALOGFILTER_DISABLE I2C_CR1_ANFOFF /!< Analog filter is disabled. /
AnnaBridge	189:f392fc9709a3	202	/**
AnnaBridge	189:f392fc9709a3	203	* @}
AnnaBridge	189:f392fc9709a3	204	*/
AnnaBridge	189:f392fc9709a3	205
AnnaBridge	189:f392fc9709a3	206	/** @defgroup I2C_LL_EC_ADDRESSING_MODE Master Addressing Mode
AnnaBridge	189:f392fc9709a3	207	* @{
AnnaBridge	189:f392fc9709a3	208	*/
AnnaBridge	189:f392fc9709a3	209	#define LL_I2C_ADDRESSING_MODE_7BIT 0x00000000U /!< Master operates in 7-bit addressing mode. /
AnnaBridge	189:f392fc9709a3	210	#define LL_I2C_ADDRESSING_MODE_10BIT I2C_CR2_ADD10 /!< Master operates in 10-bit addressing mode./
AnnaBridge	189:f392fc9709a3	211	/**
AnnaBridge	189:f392fc9709a3	212	* @}
AnnaBridge	189:f392fc9709a3	213	*/
AnnaBridge	189:f392fc9709a3	214
AnnaBridge	189:f392fc9709a3	215	/** @defgroup I2C_LL_EC_OWNADDRESS1 Own Address 1 Length
AnnaBridge	189:f392fc9709a3	216	* @{
AnnaBridge	189:f392fc9709a3	217	*/
AnnaBridge	189:f392fc9709a3	218	#define LL_I2C_OWNADDRESS1_7BIT 0x00000000U /!< Own address 1 is a 7-bit address. /
AnnaBridge	189:f392fc9709a3	219	#define LL_I2C_OWNADDRESS1_10BIT I2C_OAR1_OA1MODE /!< Own address 1 is a 10-bit address./
AnnaBridge	189:f392fc9709a3	220	/**
AnnaBridge	189:f392fc9709a3	221	* @}
AnnaBridge	189:f392fc9709a3	222	*/
AnnaBridge	189:f392fc9709a3	223
AnnaBridge	189:f392fc9709a3	224	/** @defgroup I2C_LL_EC_OWNADDRESS2 Own Address 2 Masks
AnnaBridge	189:f392fc9709a3	225	* @{
AnnaBridge	189:f392fc9709a3	226	*/
AnnaBridge	189:f392fc9709a3	227	#define LL_I2C_OWNADDRESS2_NOMASK I2C_OAR2_OA2NOMASK /!< Own Address2 No mask. /
AnnaBridge	189:f392fc9709a3	228	#define LL_I2C_OWNADDRESS2_MASK01 I2C_OAR2_OA2MASK01 /!< Only Address2 bits[7:2] are compared. /
AnnaBridge	189:f392fc9709a3	229	#define LL_I2C_OWNADDRESS2_MASK02 I2C_OAR2_OA2MASK02 /!< Only Address2 bits[7:3] are compared. /
AnnaBridge	189:f392fc9709a3	230	#define LL_I2C_OWNADDRESS2_MASK03 I2C_OAR2_OA2MASK03 /!< Only Address2 bits[7:4] are compared. /
AnnaBridge	189:f392fc9709a3	231	#define LL_I2C_OWNADDRESS2_MASK04 I2C_OAR2_OA2MASK04 /!< Only Address2 bits[7:5] are compared. /
AnnaBridge	189:f392fc9709a3	232	#define LL_I2C_OWNADDRESS2_MASK05 I2C_OAR2_OA2MASK05 /!< Only Address2 bits[7:6] are compared. /
AnnaBridge	189:f392fc9709a3	233	#define LL_I2C_OWNADDRESS2_MASK06 I2C_OAR2_OA2MASK06 /!< Only Address2 bits[7] are compared. /
AnnaBridge	189:f392fc9709a3	234	#define LL_I2C_OWNADDRESS2_MASK07 I2C_OAR2_OA2MASK07 /!< No comparison is done. All Address2 are acknowledged./
AnnaBridge	189:f392fc9709a3	235	/**
AnnaBridge	189:f392fc9709a3	236	* @}
AnnaBridge	189:f392fc9709a3	237	*/
AnnaBridge	189:f392fc9709a3	238
AnnaBridge	189:f392fc9709a3	239	/** @defgroup I2C_LL_EC_I2C_ACKNOWLEDGE Acknowledge Generation
AnnaBridge	189:f392fc9709a3	240	* @{
AnnaBridge	189:f392fc9709a3	241	*/
AnnaBridge	189:f392fc9709a3	242	#define LL_I2C_ACK 0x00000000U /!< ACK is sent after current received byte. /
AnnaBridge	189:f392fc9709a3	243	#define LL_I2C_NACK I2C_CR2_NACK /!< NACK is sent after current received byte./
AnnaBridge	189:f392fc9709a3	244	/**
AnnaBridge	189:f392fc9709a3	245	* @}
AnnaBridge	189:f392fc9709a3	246	*/
AnnaBridge	189:f392fc9709a3	247
AnnaBridge	189:f392fc9709a3	248	/** @defgroup I2C_LL_EC_ADDRSLAVE Slave Address Length
AnnaBridge	189:f392fc9709a3	249	* @{
AnnaBridge	189:f392fc9709a3	250	*/
AnnaBridge	189:f392fc9709a3	251	#define LL_I2C_ADDRSLAVE_7BIT 0x00000000U /!< Slave Address in 7-bit. /
AnnaBridge	189:f392fc9709a3	252	#define LL_I2C_ADDRSLAVE_10BIT I2C_CR2_ADD10 /!< Slave Address in 10-bit./
AnnaBridge	189:f392fc9709a3	253	/**
AnnaBridge	189:f392fc9709a3	254	* @}
AnnaBridge	189:f392fc9709a3	255	*/
AnnaBridge	189:f392fc9709a3	256
AnnaBridge	189:f392fc9709a3	257	/** @defgroup I2C_LL_EC_REQUEST Transfer Request Direction
AnnaBridge	189:f392fc9709a3	258	* @{
AnnaBridge	189:f392fc9709a3	259	*/
AnnaBridge	189:f392fc9709a3	260	#define LL_I2C_REQUEST_WRITE 0x00000000U /!< Master request a write transfer. /
AnnaBridge	189:f392fc9709a3	261	#define LL_I2C_REQUEST_READ I2C_CR2_RD_WRN /!< Master request a read transfer. /
AnnaBridge	189:f392fc9709a3	262	/**
AnnaBridge	189:f392fc9709a3	263	* @}
AnnaBridge	189:f392fc9709a3	264	*/
AnnaBridge	189:f392fc9709a3	265
AnnaBridge	189:f392fc9709a3	266	/** @defgroup I2C_LL_EC_MODE Transfer End Mode
AnnaBridge	189:f392fc9709a3	267	* @{
AnnaBridge	189:f392fc9709a3	268	*/
AnnaBridge	189:f392fc9709a3	269	#define LL_I2C_MODE_RELOAD I2C_CR2_RELOAD /!< Enable I2C Reload mode. /
AnnaBridge	189:f392fc9709a3	270	#define LL_I2C_MODE_AUTOEND I2C_CR2_AUTOEND /!< Enable I2C Automatic end mode with no HW PEC comparison. /
AnnaBridge	189:f392fc9709a3	271	#define LL_I2C_MODE_SOFTEND 0x00000000U /!< Enable I2C Software end mode with no HW PEC comparison. /
AnnaBridge	189:f392fc9709a3	272	#define LL_I2C_MODE_SMBUS_RELOAD LL_I2C_MODE_RELOAD /!< Enable SMBUS Automatic end mode with HW PEC comparison. /
AnnaBridge	189:f392fc9709a3	273	#define LL_I2C_MODE_SMBUS_AUTOEND_NO_PEC LL_I2C_MODE_AUTOEND /!< Enable SMBUS Automatic end mode with HW PEC comparison. /
AnnaBridge	189:f392fc9709a3	274	#define LL_I2C_MODE_SMBUS_SOFTEND_NO_PEC LL_I2C_MODE_SOFTEND /!< Enable SMBUS Software end mode with HW PEC comparison. /
AnnaBridge	189:f392fc9709a3	275	#define LL_I2C_MODE_SMBUS_AUTOEND_WITH_PEC (uint32_t)(LL_I2C_MODE_AUTOEND \| I2C_CR2_PECBYTE) /!< Enable SMBUS Automatic end mode with HW PEC comparison. /
AnnaBridge	189:f392fc9709a3	276	#define LL_I2C_MODE_SMBUS_SOFTEND_WITH_PEC (uint32_t)(LL_I2C_MODE_SOFTEND \| I2C_CR2_PECBYTE) /!< Enable SMBUS Software end mode with HW PEC comparison. /
AnnaBridge	189:f392fc9709a3	277	/**
AnnaBridge	189:f392fc9709a3	278	* @}
AnnaBridge	189:f392fc9709a3	279	*/
AnnaBridge	189:f392fc9709a3	280
AnnaBridge	189:f392fc9709a3	281	/** @defgroup I2C_LL_EC_GENERATE Start And Stop Generation
AnnaBridge	189:f392fc9709a3	282	* @{
AnnaBridge	189:f392fc9709a3	283	*/
AnnaBridge	189:f392fc9709a3	284	#define LL_I2C_GENERATE_NOSTARTSTOP 0x00000000U /!< Don't Generate Stop and Start condition. /
AnnaBridge	189:f392fc9709a3	285	#define LL_I2C_GENERATE_STOP (uint32_t)(0x80000000U \| I2C_CR2_STOP) /!< Generate Stop condition (Size should be set to 0). /
AnnaBridge	189:f392fc9709a3	286	#define LL_I2C_GENERATE_START_READ (uint32_t)(0x80000000U \| I2C_CR2_START \| I2C_CR2_RD_WRN) /!< Generate Start for read request. /
AnnaBridge	189:f392fc9709a3	287	#define LL_I2C_GENERATE_START_WRITE (uint32_t)(0x80000000U \| I2C_CR2_START) /!< Generate Start for write request. /
AnnaBridge	189:f392fc9709a3	288	#define LL_I2C_GENERATE_RESTART_7BIT_READ (uint32_t)(0x80000000U \| I2C_CR2_START \| I2C_CR2_RD_WRN) /!< Generate Restart for read request, slave 7Bit address. /
AnnaBridge	189:f392fc9709a3	289	#define LL_I2C_GENERATE_RESTART_7BIT_WRITE (uint32_t)(0x80000000U \| I2C_CR2_START) /!< Generate Restart for write request, slave 7Bit address. /
AnnaBridge	189:f392fc9709a3	290	#define LL_I2C_GENERATE_RESTART_10BIT_READ (uint32_t)(0x80000000U \| I2C_CR2_START \| I2C_CR2_RD_WRN \| I2C_CR2_HEAD10R) /!< Generate Restart for read request, slave 10Bit address. /
AnnaBridge	189:f392fc9709a3	291	#define LL_I2C_GENERATE_RESTART_10BIT_WRITE (uint32_t)(0x80000000U \| I2C_CR2_START) /!< Generate Restart for write request, slave 10Bit address./
AnnaBridge	189:f392fc9709a3	292	/**
AnnaBridge	189:f392fc9709a3	293	* @}
AnnaBridge	189:f392fc9709a3	294	*/
AnnaBridge	189:f392fc9709a3	295
AnnaBridge	189:f392fc9709a3	296	/** @defgroup I2C_LL_EC_DIRECTION Read Write Direction
AnnaBridge	189:f392fc9709a3	297	* @{
AnnaBridge	189:f392fc9709a3	298	*/
AnnaBridge	189:f392fc9709a3	299	#define LL_I2C_DIRECTION_WRITE 0x00000000U /!< Write transfer request by master, slave enters receiver mode. /
AnnaBridge	189:f392fc9709a3	300	#define LL_I2C_DIRECTION_READ I2C_ISR_DIR /!< Read transfer request by master, slave enters transmitter mode./
AnnaBridge	189:f392fc9709a3	301	/**
AnnaBridge	189:f392fc9709a3	302	* @}
AnnaBridge	189:f392fc9709a3	303	*/
AnnaBridge	189:f392fc9709a3	304
AnnaBridge	189:f392fc9709a3	305	/** @defgroup I2C_LL_EC_DMA_REG_DATA DMA Register Data
AnnaBridge	189:f392fc9709a3	306	* @{
AnnaBridge	189:f392fc9709a3	307	*/
AnnaBridge	189:f392fc9709a3	308	#define LL_I2C_DMA_REG_DATA_TRANSMIT 0x00000000U /!< Get address of data register used for transmission /
AnnaBridge	189:f392fc9709a3	309	#define LL_I2C_DMA_REG_DATA_RECEIVE 0x00000001U /!< Get address of data register used for reception /
AnnaBridge	189:f392fc9709a3	310	/**
AnnaBridge	189:f392fc9709a3	311	* @}
AnnaBridge	189:f392fc9709a3	312	*/
AnnaBridge	189:f392fc9709a3	313
AnnaBridge	189:f392fc9709a3	314	/** @defgroup I2C_LL_EC_SMBUS_TIMEOUTA_MODE SMBus TimeoutA Mode SCL SDA Timeout
AnnaBridge	189:f392fc9709a3	315	* @{
AnnaBridge	189:f392fc9709a3	316	*/
AnnaBridge	189:f392fc9709a3	317	#define LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW 0x00000000U /!< TimeoutA is used to detect SCL low level timeout. /
AnnaBridge	189:f392fc9709a3	318	#define LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH I2C_TIMEOUTR_TIDLE /!< TimeoutA is used to detect both SCL and SDA high level timeout./
AnnaBridge	189:f392fc9709a3	319	/**
AnnaBridge	189:f392fc9709a3	320	* @}
AnnaBridge	189:f392fc9709a3	321	*/
AnnaBridge	189:f392fc9709a3	322
AnnaBridge	189:f392fc9709a3	323	/** @defgroup I2C_LL_EC_SMBUS_TIMEOUT_SELECTION SMBus Timeout Selection
AnnaBridge	189:f392fc9709a3	324	* @{
AnnaBridge	189:f392fc9709a3	325	*/
AnnaBridge	189:f392fc9709a3	326	#define LL_I2C_SMBUS_TIMEOUTA I2C_TIMEOUTR_TIMOUTEN /!< TimeoutA enable bit /
AnnaBridge	189:f392fc9709a3	327	#define LL_I2C_SMBUS_TIMEOUTB I2C_TIMEOUTR_TEXTEN /!< TimeoutB (extended clock) enable bit /
AnnaBridge	189:f392fc9709a3	328	#define LL_I2C_SMBUS_ALL_TIMEOUT (uint32_t)(I2C_TIMEOUTR_TIMOUTEN \| I2C_TIMEOUTR_TEXTEN) /!< TimeoutA and TimeoutB (extended clock) enable bits /
AnnaBridge	189:f392fc9709a3	329	/**
AnnaBridge	189:f392fc9709a3	330	* @}
AnnaBridge	189:f392fc9709a3	331	*/
AnnaBridge	189:f392fc9709a3	332
AnnaBridge	189:f392fc9709a3	333	/**
AnnaBridge	189:f392fc9709a3	334	* @}
AnnaBridge	189:f392fc9709a3	335	*/
AnnaBridge	189:f392fc9709a3	336
AnnaBridge	189:f392fc9709a3	337	/* Exported macro ------------------------------------------------------------*/
AnnaBridge	189:f392fc9709a3	338	/** @defgroup I2C_LL_Exported_Macros I2C Exported Macros
AnnaBridge	189:f392fc9709a3	339	* @{
AnnaBridge	189:f392fc9709a3	340	*/
AnnaBridge	189:f392fc9709a3	341
AnnaBridge	189:f392fc9709a3	342	/** @defgroup I2C_LL_EM_WRITE_READ Common Write and read registers Macros
AnnaBridge	189:f392fc9709a3	343	* @{
AnnaBridge	189:f392fc9709a3	344	*/
AnnaBridge	189:f392fc9709a3	345
AnnaBridge	189:f392fc9709a3	346	/**
AnnaBridge	189:f392fc9709a3	347	* @brief Write a value in I2C register
AnnaBridge	189:f392fc9709a3	348	* @param __INSTANCE__ I2C Instance
AnnaBridge	189:f392fc9709a3	349	* @param __REG__ Register to be written
AnnaBridge	189:f392fc9709a3	350	* @param __VALUE__ Value to be written in the register
AnnaBridge	189:f392fc9709a3	351	* @retval None
AnnaBridge	189:f392fc9709a3	352	*/
AnnaBridge	189:f392fc9709a3	353	#define LL_I2C_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
AnnaBridge	189:f392fc9709a3	354
AnnaBridge	189:f392fc9709a3	355	/**
AnnaBridge	189:f392fc9709a3	356	* @brief Read a value in I2C register
AnnaBridge	189:f392fc9709a3	357	* @param __INSTANCE__ I2C Instance
AnnaBridge	189:f392fc9709a3	358	* @param __REG__ Register to be read
AnnaBridge	189:f392fc9709a3	359	* @retval Register value
AnnaBridge	189:f392fc9709a3	360	*/
AnnaBridge	189:f392fc9709a3	361	#define LL_I2C_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
AnnaBridge	189:f392fc9709a3	362	/**
AnnaBridge	189:f392fc9709a3	363	* @}
AnnaBridge	189:f392fc9709a3	364	*/
AnnaBridge	189:f392fc9709a3	365
AnnaBridge	189:f392fc9709a3	366	/** @defgroup I2C_LL_EM_CONVERT_TIMINGS Convert SDA SCL timings
AnnaBridge	189:f392fc9709a3	367	* @{
AnnaBridge	189:f392fc9709a3	368	*/
AnnaBridge	189:f392fc9709a3	369	/**
AnnaBridge	189:f392fc9709a3	370	* @brief Configure the SDA setup, hold time and the SCL high, low period.
AnnaBridge	189:f392fc9709a3	371	* @param __PRESCALER__ This parameter must be a value between Min_Data=0 and Max_Data=0xF.
AnnaBridge	189:f392fc9709a3	372	* @param __DATA_SETUP_TIME__ This parameter must be a value between Min_Data=0 and Max_Data=0xF. (tscldel = (SCLDEL+1)xtpresc)
AnnaBridge	189:f392fc9709a3	373	* @param __DATA_HOLD_TIME__ This parameter must be a value between Min_Data=0 and Max_Data=0xF. (tsdadel = SDADELxtpresc)
AnnaBridge	189:f392fc9709a3	374	* @param __CLOCK_HIGH_PERIOD__ This parameter must be a value between Min_Data=0 and Max_Data=0xFF. (tsclh = (SCLH+1)xtpresc)
AnnaBridge	189:f392fc9709a3	375	* @param __CLOCK_LOW_PERIOD__ This parameter must be a value between Min_Data=0 and Max_Data=0xFF. (tscll = (SCLL+1)xtpresc)
AnnaBridge	189:f392fc9709a3	376	* @retval Value between Min_Data=0 and Max_Data=0xFFFFFFFF
AnnaBridge	189:f392fc9709a3	377	*/
AnnaBridge	189:f392fc9709a3	378	#define __LL_I2C_CONVERT_TIMINGS(__PRESCALER__, __DATA_SETUP_TIME__, __DATA_HOLD_TIME__, __CLOCK_HIGH_PERIOD__, __CLOCK_LOW_PERIOD__) \
AnnaBridge	189:f392fc9709a3	379	((((uint32_t)(__PRESCALER__) << I2C_TIMINGR_PRESC_Pos) & I2C_TIMINGR_PRESC) \| \
AnnaBridge	189:f392fc9709a3	380	(((uint32_t)(__DATA_SETUP_TIME__) << I2C_TIMINGR_SCLDEL_Pos) & I2C_TIMINGR_SCLDEL) \| \
AnnaBridge	189:f392fc9709a3	381	(((uint32_t)(__DATA_HOLD_TIME__) << I2C_TIMINGR_SDADEL_Pos) & I2C_TIMINGR_SDADEL) \| \
AnnaBridge	189:f392fc9709a3	382	(((uint32_t)(__CLOCK_HIGH_PERIOD__) << I2C_TIMINGR_SCLH_Pos) & I2C_TIMINGR_SCLH) \| \
AnnaBridge	189:f392fc9709a3	383	(((uint32_t)(__CLOCK_LOW_PERIOD__) << I2C_TIMINGR_SCLL_Pos) & I2C_TIMINGR_SCLL))
AnnaBridge	189:f392fc9709a3	384	/**
AnnaBridge	189:f392fc9709a3	385	* @}
AnnaBridge	189:f392fc9709a3	386	*/
AnnaBridge	189:f392fc9709a3	387
AnnaBridge	189:f392fc9709a3	388	/**
AnnaBridge	189:f392fc9709a3	389	* @}
AnnaBridge	189:f392fc9709a3	390	*/
AnnaBridge	189:f392fc9709a3	391
AnnaBridge	189:f392fc9709a3	392	/* Exported functions --------------------------------------------------------*/
AnnaBridge	189:f392fc9709a3	393	/** @defgroup I2C_LL_Exported_Functions I2C Exported Functions
AnnaBridge	189:f392fc9709a3	394	* @{
AnnaBridge	189:f392fc9709a3	395	*/
AnnaBridge	189:f392fc9709a3	396
AnnaBridge	189:f392fc9709a3	397	/** @defgroup I2C_LL_EF_Configuration Configuration
AnnaBridge	189:f392fc9709a3	398	* @{
AnnaBridge	189:f392fc9709a3	399	*/
AnnaBridge	189:f392fc9709a3	400
AnnaBridge	189:f392fc9709a3	401	/**
AnnaBridge	189:f392fc9709a3	402	* @brief Enable I2C peripheral (PE = 1).
AnnaBridge	189:f392fc9709a3	403	* @rmtoll CR1 PE LL_I2C_Enable
AnnaBridge	189:f392fc9709a3	404	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	405	* @retval None
AnnaBridge	189:f392fc9709a3	406	*/
AnnaBridge	189:f392fc9709a3	407	__STATIC_INLINE void LL_I2C_Enable(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	408	{
AnnaBridge	189:f392fc9709a3	409	SET_BIT(I2Cx->CR1, I2C_CR1_PE);
AnnaBridge	189:f392fc9709a3	410	}
AnnaBridge	189:f392fc9709a3	411
AnnaBridge	189:f392fc9709a3	412	/**
AnnaBridge	189:f392fc9709a3	413	* @brief Disable I2C peripheral (PE = 0).
AnnaBridge	189:f392fc9709a3	414	* @note When PE = 0, the I2C SCL and SDA lines are released.
AnnaBridge	189:f392fc9709a3	415	* Internal state machines and status bits are put back to their reset value.
AnnaBridge	189:f392fc9709a3	416	* When cleared, PE must be kept low for at least 3 APB clock cycles.
AnnaBridge	189:f392fc9709a3	417	* @rmtoll CR1 PE LL_I2C_Disable
AnnaBridge	189:f392fc9709a3	418	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	419	* @retval None
AnnaBridge	189:f392fc9709a3	420	*/
AnnaBridge	189:f392fc9709a3	421	__STATIC_INLINE void LL_I2C_Disable(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	422	{
AnnaBridge	189:f392fc9709a3	423	CLEAR_BIT(I2Cx->CR1, I2C_CR1_PE);
AnnaBridge	189:f392fc9709a3	424	}
AnnaBridge	189:f392fc9709a3	425
AnnaBridge	189:f392fc9709a3	426	/**
AnnaBridge	189:f392fc9709a3	427	* @brief Check if the I2C peripheral is enabled or disabled.
AnnaBridge	189:f392fc9709a3	428	* @rmtoll CR1 PE LL_I2C_IsEnabled
AnnaBridge	189:f392fc9709a3	429	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	430	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	431	*/
AnnaBridge	189:f392fc9709a3	432	__STATIC_INLINE uint32_t LL_I2C_IsEnabled(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	433	{
AnnaBridge	189:f392fc9709a3	434	return (READ_BIT(I2Cx->CR1, I2C_CR1_PE) == (I2C_CR1_PE));
AnnaBridge	189:f392fc9709a3	435	}
AnnaBridge	189:f392fc9709a3	436
AnnaBridge	189:f392fc9709a3	437	/**
AnnaBridge	189:f392fc9709a3	438	* @brief Configure Noise Filters (Analog and Digital).
AnnaBridge	189:f392fc9709a3	439	* @note If the analog filter is also enabled, the digital filter is added to analog filter.
AnnaBridge	189:f392fc9709a3	440	* The filters can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	189:f392fc9709a3	441	* @rmtoll CR1 ANFOFF LL_I2C_ConfigFilters\n
AnnaBridge	189:f392fc9709a3	442	* CR1 DNF LL_I2C_ConfigFilters
AnnaBridge	189:f392fc9709a3	443	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	444	* @param AnalogFilter This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	445	* @arg @ref LL_I2C_ANALOGFILTER_ENABLE
AnnaBridge	189:f392fc9709a3	446	* @arg @ref LL_I2C_ANALOGFILTER_DISABLE
AnnaBridge	189:f392fc9709a3	447	* @param DigitalFilter This parameter must be a value between Min_Data=0x00 (Digital filter disabled) and Max_Data=0x0F (Digital filter enabled and filtering capability up to 15*ti2cclk).
AnnaBridge	189:f392fc9709a3	448	* This parameter is used to configure the digital noise filter on SDA and SCL input.
AnnaBridge	189:f392fc9709a3	449	* The digital filter will filter spikes with a length of up to DNF[3:0]*ti2cclk.
AnnaBridge	189:f392fc9709a3	450	* @retval None
AnnaBridge	189:f392fc9709a3	451	*/
AnnaBridge	189:f392fc9709a3	452	__STATIC_INLINE void LL_I2C_ConfigFilters(I2C_TypeDef *I2Cx, uint32_t AnalogFilter, uint32_t DigitalFilter)
AnnaBridge	189:f392fc9709a3	453	{
AnnaBridge	189:f392fc9709a3	454	MODIFY_REG(I2Cx->CR1, I2C_CR1_ANFOFF \| I2C_CR1_DNF, AnalogFilter \| (DigitalFilter << I2C_CR1_DNF_Pos));
AnnaBridge	189:f392fc9709a3	455	}
AnnaBridge	189:f392fc9709a3	456
AnnaBridge	189:f392fc9709a3	457	/**
AnnaBridge	189:f392fc9709a3	458	* @brief Configure Digital Noise Filter.
AnnaBridge	189:f392fc9709a3	459	* @note If the analog filter is also enabled, the digital filter is added to analog filter.
AnnaBridge	189:f392fc9709a3	460	* This filter can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	189:f392fc9709a3	461	* @rmtoll CR1 DNF LL_I2C_SetDigitalFilter
AnnaBridge	189:f392fc9709a3	462	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	463	* @param DigitalFilter This parameter must be a value between Min_Data=0x00 (Digital filter disabled) and Max_Data=0x0F (Digital filter enabled and filtering capability up to 15*ti2cclk).
AnnaBridge	189:f392fc9709a3	464	* This parameter is used to configure the digital noise filter on SDA and SCL input.
AnnaBridge	189:f392fc9709a3	465	* The digital filter will filter spikes with a length of up to DNF[3:0]*ti2cclk.
AnnaBridge	189:f392fc9709a3	466	* @retval None
AnnaBridge	189:f392fc9709a3	467	*/
AnnaBridge	189:f392fc9709a3	468	__STATIC_INLINE void LL_I2C_SetDigitalFilter(I2C_TypeDef *I2Cx, uint32_t DigitalFilter)
AnnaBridge	189:f392fc9709a3	469	{
AnnaBridge	189:f392fc9709a3	470	MODIFY_REG(I2Cx->CR1, I2C_CR1_DNF, DigitalFilter << I2C_CR1_DNF_Pos);
AnnaBridge	189:f392fc9709a3	471	}
AnnaBridge	189:f392fc9709a3	472
AnnaBridge	189:f392fc9709a3	473	/**
AnnaBridge	189:f392fc9709a3	474	* @brief Get the current Digital Noise Filter configuration.
AnnaBridge	189:f392fc9709a3	475	* @rmtoll CR1 DNF LL_I2C_GetDigitalFilter
AnnaBridge	189:f392fc9709a3	476	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	477	* @retval Value between Min_Data=0x0 and Max_Data=0xF
AnnaBridge	189:f392fc9709a3	478	*/
AnnaBridge	189:f392fc9709a3	479	__STATIC_INLINE uint32_t LL_I2C_GetDigitalFilter(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	480	{
AnnaBridge	189:f392fc9709a3	481	return (uint32_t)(READ_BIT(I2Cx->CR1, I2C_CR1_DNF) >> I2C_CR1_DNF_Pos);
AnnaBridge	189:f392fc9709a3	482	}
AnnaBridge	189:f392fc9709a3	483
AnnaBridge	189:f392fc9709a3	484	/**
AnnaBridge	189:f392fc9709a3	485	* @brief Enable Analog Noise Filter.
AnnaBridge	189:f392fc9709a3	486	* @note This filter can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	189:f392fc9709a3	487	* @rmtoll CR1 ANFOFF LL_I2C_EnableAnalogFilter
AnnaBridge	189:f392fc9709a3	488	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	489	* @retval None
AnnaBridge	189:f392fc9709a3	490	*/
AnnaBridge	189:f392fc9709a3	491	__STATIC_INLINE void LL_I2C_EnableAnalogFilter(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	492	{
AnnaBridge	189:f392fc9709a3	493	CLEAR_BIT(I2Cx->CR1, I2C_CR1_ANFOFF);
AnnaBridge	189:f392fc9709a3	494	}
AnnaBridge	189:f392fc9709a3	495
AnnaBridge	189:f392fc9709a3	496	/**
AnnaBridge	189:f392fc9709a3	497	* @brief Disable Analog Noise Filter.
AnnaBridge	189:f392fc9709a3	498	* @note This filter can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	189:f392fc9709a3	499	* @rmtoll CR1 ANFOFF LL_I2C_DisableAnalogFilter
AnnaBridge	189:f392fc9709a3	500	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	501	* @retval None
AnnaBridge	189:f392fc9709a3	502	*/
AnnaBridge	189:f392fc9709a3	503	__STATIC_INLINE void LL_I2C_DisableAnalogFilter(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	504	{
AnnaBridge	189:f392fc9709a3	505	SET_BIT(I2Cx->CR1, I2C_CR1_ANFOFF);
AnnaBridge	189:f392fc9709a3	506	}
AnnaBridge	189:f392fc9709a3	507
AnnaBridge	189:f392fc9709a3	508	/**
AnnaBridge	189:f392fc9709a3	509	* @brief Check if Analog Noise Filter is enabled or disabled.
AnnaBridge	189:f392fc9709a3	510	* @rmtoll CR1 ANFOFF LL_I2C_IsEnabledAnalogFilter
AnnaBridge	189:f392fc9709a3	511	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	512	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	513	*/
AnnaBridge	189:f392fc9709a3	514	__STATIC_INLINE uint32_t LL_I2C_IsEnabledAnalogFilter(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	515	{
AnnaBridge	189:f392fc9709a3	516	return (READ_BIT(I2Cx->CR1, I2C_CR1_ANFOFF) != (I2C_CR1_ANFOFF));
AnnaBridge	189:f392fc9709a3	517	}
AnnaBridge	189:f392fc9709a3	518
AnnaBridge	189:f392fc9709a3	519	/**
AnnaBridge	189:f392fc9709a3	520	* @brief Enable DMA transmission requests.
AnnaBridge	189:f392fc9709a3	521	* @rmtoll CR1 TXDMAEN LL_I2C_EnableDMAReq_TX
AnnaBridge	189:f392fc9709a3	522	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	523	* @retval None
AnnaBridge	189:f392fc9709a3	524	*/
AnnaBridge	189:f392fc9709a3	525	__STATIC_INLINE void LL_I2C_EnableDMAReq_TX(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	526	{
AnnaBridge	189:f392fc9709a3	527	SET_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN);
AnnaBridge	189:f392fc9709a3	528	}
AnnaBridge	189:f392fc9709a3	529
AnnaBridge	189:f392fc9709a3	530	/**
AnnaBridge	189:f392fc9709a3	531	* @brief Disable DMA transmission requests.
AnnaBridge	189:f392fc9709a3	532	* @rmtoll CR1 TXDMAEN LL_I2C_DisableDMAReq_TX
AnnaBridge	189:f392fc9709a3	533	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	534	* @retval None
AnnaBridge	189:f392fc9709a3	535	*/
AnnaBridge	189:f392fc9709a3	536	__STATIC_INLINE void LL_I2C_DisableDMAReq_TX(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	537	{
AnnaBridge	189:f392fc9709a3	538	CLEAR_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN);
AnnaBridge	189:f392fc9709a3	539	}
AnnaBridge	189:f392fc9709a3	540
AnnaBridge	189:f392fc9709a3	541	/**
AnnaBridge	189:f392fc9709a3	542	* @brief Check if DMA transmission requests are enabled or disabled.
AnnaBridge	189:f392fc9709a3	543	* @rmtoll CR1 TXDMAEN LL_I2C_IsEnabledDMAReq_TX
AnnaBridge	189:f392fc9709a3	544	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	545	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	546	*/
AnnaBridge	189:f392fc9709a3	547	__STATIC_INLINE uint32_t LL_I2C_IsEnabledDMAReq_TX(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	548	{
AnnaBridge	189:f392fc9709a3	549	return (READ_BIT(I2Cx->CR1, I2C_CR1_TXDMAEN) == (I2C_CR1_TXDMAEN));
AnnaBridge	189:f392fc9709a3	550	}
AnnaBridge	189:f392fc9709a3	551
AnnaBridge	189:f392fc9709a3	552	/**
AnnaBridge	189:f392fc9709a3	553	* @brief Enable DMA reception requests.
AnnaBridge	189:f392fc9709a3	554	* @rmtoll CR1 RXDMAEN LL_I2C_EnableDMAReq_RX
AnnaBridge	189:f392fc9709a3	555	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	556	* @retval None
AnnaBridge	189:f392fc9709a3	557	*/
AnnaBridge	189:f392fc9709a3	558	__STATIC_INLINE void LL_I2C_EnableDMAReq_RX(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	559	{
AnnaBridge	189:f392fc9709a3	560	SET_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN);
AnnaBridge	189:f392fc9709a3	561	}
AnnaBridge	189:f392fc9709a3	562
AnnaBridge	189:f392fc9709a3	563	/**
AnnaBridge	189:f392fc9709a3	564	* @brief Disable DMA reception requests.
AnnaBridge	189:f392fc9709a3	565	* @rmtoll CR1 RXDMAEN LL_I2C_DisableDMAReq_RX
AnnaBridge	189:f392fc9709a3	566	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	567	* @retval None
AnnaBridge	189:f392fc9709a3	568	*/
AnnaBridge	189:f392fc9709a3	569	__STATIC_INLINE void LL_I2C_DisableDMAReq_RX(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	570	{
AnnaBridge	189:f392fc9709a3	571	CLEAR_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN);
AnnaBridge	189:f392fc9709a3	572	}
AnnaBridge	189:f392fc9709a3	573
AnnaBridge	189:f392fc9709a3	574	/**
AnnaBridge	189:f392fc9709a3	575	* @brief Check if DMA reception requests are enabled or disabled.
AnnaBridge	189:f392fc9709a3	576	* @rmtoll CR1 RXDMAEN LL_I2C_IsEnabledDMAReq_RX
AnnaBridge	189:f392fc9709a3	577	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	578	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	579	*/
AnnaBridge	189:f392fc9709a3	580	__STATIC_INLINE uint32_t LL_I2C_IsEnabledDMAReq_RX(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	581	{
AnnaBridge	189:f392fc9709a3	582	return (READ_BIT(I2Cx->CR1, I2C_CR1_RXDMAEN) == (I2C_CR1_RXDMAEN));
AnnaBridge	189:f392fc9709a3	583	}
AnnaBridge	189:f392fc9709a3	584
AnnaBridge	189:f392fc9709a3	585	/**
AnnaBridge	189:f392fc9709a3	586	* @brief Get the data register address used for DMA transfer
AnnaBridge	189:f392fc9709a3	587	* @rmtoll TXDR TXDATA LL_I2C_DMA_GetRegAddr\n
AnnaBridge	189:f392fc9709a3	588	* RXDR RXDATA LL_I2C_DMA_GetRegAddr
AnnaBridge	189:f392fc9709a3	589	* @param I2Cx I2C Instance
AnnaBridge	189:f392fc9709a3	590	* @param Direction This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	591	* @arg @ref LL_I2C_DMA_REG_DATA_TRANSMIT
AnnaBridge	189:f392fc9709a3	592	* @arg @ref LL_I2C_DMA_REG_DATA_RECEIVE
AnnaBridge	189:f392fc9709a3	593	* @retval Address of data register
AnnaBridge	189:f392fc9709a3	594	*/
AnnaBridge	189:f392fc9709a3	595	__STATIC_INLINE uint32_t LL_I2C_DMA_GetRegAddr(I2C_TypeDef *I2Cx, uint32_t Direction)
AnnaBridge	189:f392fc9709a3	596	{
AnnaBridge	189:f392fc9709a3	597	register uint32_t data_reg_addr = 0U;
AnnaBridge	189:f392fc9709a3	598
AnnaBridge	189:f392fc9709a3	599	if (Direction == LL_I2C_DMA_REG_DATA_TRANSMIT)
AnnaBridge	189:f392fc9709a3	600	{
AnnaBridge	189:f392fc9709a3	601	/* return address of TXDR register */
AnnaBridge	189:f392fc9709a3	602	data_reg_addr = (uint32_t) & (I2Cx->TXDR);
AnnaBridge	189:f392fc9709a3	603	}
AnnaBridge	189:f392fc9709a3	604	else
AnnaBridge	189:f392fc9709a3	605	{
AnnaBridge	189:f392fc9709a3	606	/* return address of RXDR register */
AnnaBridge	189:f392fc9709a3	607	data_reg_addr = (uint32_t) & (I2Cx->RXDR);
AnnaBridge	189:f392fc9709a3	608	}
AnnaBridge	189:f392fc9709a3	609
AnnaBridge	189:f392fc9709a3	610	return data_reg_addr;
AnnaBridge	189:f392fc9709a3	611	}
AnnaBridge	189:f392fc9709a3	612
AnnaBridge	189:f392fc9709a3	613	/**
AnnaBridge	189:f392fc9709a3	614	* @brief Enable Clock stretching.
AnnaBridge	189:f392fc9709a3	615	* @note This bit can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	189:f392fc9709a3	616	* @rmtoll CR1 NOSTRETCH LL_I2C_EnableClockStretching
AnnaBridge	189:f392fc9709a3	617	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	618	* @retval None
AnnaBridge	189:f392fc9709a3	619	*/
AnnaBridge	189:f392fc9709a3	620	__STATIC_INLINE void LL_I2C_EnableClockStretching(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	621	{
AnnaBridge	189:f392fc9709a3	622	CLEAR_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH);
AnnaBridge	189:f392fc9709a3	623	}
AnnaBridge	189:f392fc9709a3	624
AnnaBridge	189:f392fc9709a3	625	/**
AnnaBridge	189:f392fc9709a3	626	* @brief Disable Clock stretching.
AnnaBridge	189:f392fc9709a3	627	* @note This bit can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	189:f392fc9709a3	628	* @rmtoll CR1 NOSTRETCH LL_I2C_DisableClockStretching
AnnaBridge	189:f392fc9709a3	629	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	630	* @retval None
AnnaBridge	189:f392fc9709a3	631	*/
AnnaBridge	189:f392fc9709a3	632	__STATIC_INLINE void LL_I2C_DisableClockStretching(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	633	{
AnnaBridge	189:f392fc9709a3	634	SET_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH);
AnnaBridge	189:f392fc9709a3	635	}
AnnaBridge	189:f392fc9709a3	636
AnnaBridge	189:f392fc9709a3	637	/**
AnnaBridge	189:f392fc9709a3	638	* @brief Check if Clock stretching is enabled or disabled.
AnnaBridge	189:f392fc9709a3	639	* @rmtoll CR1 NOSTRETCH LL_I2C_IsEnabledClockStretching
AnnaBridge	189:f392fc9709a3	640	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	641	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	642	*/
AnnaBridge	189:f392fc9709a3	643	__STATIC_INLINE uint32_t LL_I2C_IsEnabledClockStretching(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	644	{
AnnaBridge	189:f392fc9709a3	645	return (READ_BIT(I2Cx->CR1, I2C_CR1_NOSTRETCH) != (I2C_CR1_NOSTRETCH));
AnnaBridge	189:f392fc9709a3	646	}
AnnaBridge	189:f392fc9709a3	647
AnnaBridge	189:f392fc9709a3	648	/**
AnnaBridge	189:f392fc9709a3	649	* @brief Enable hardware byte control in slave mode.
AnnaBridge	189:f392fc9709a3	650	* @rmtoll CR1 SBC LL_I2C_EnableSlaveByteControl
AnnaBridge	189:f392fc9709a3	651	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	652	* @retval None
AnnaBridge	189:f392fc9709a3	653	*/
AnnaBridge	189:f392fc9709a3	654	__STATIC_INLINE void LL_I2C_EnableSlaveByteControl(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	655	{
AnnaBridge	189:f392fc9709a3	656	SET_BIT(I2Cx->CR1, I2C_CR1_SBC);
AnnaBridge	189:f392fc9709a3	657	}
AnnaBridge	189:f392fc9709a3	658
AnnaBridge	189:f392fc9709a3	659	/**
AnnaBridge	189:f392fc9709a3	660	* @brief Disable hardware byte control in slave mode.
AnnaBridge	189:f392fc9709a3	661	* @rmtoll CR1 SBC LL_I2C_DisableSlaveByteControl
AnnaBridge	189:f392fc9709a3	662	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	663	* @retval None
AnnaBridge	189:f392fc9709a3	664	*/
AnnaBridge	189:f392fc9709a3	665	__STATIC_INLINE void LL_I2C_DisableSlaveByteControl(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	666	{
AnnaBridge	189:f392fc9709a3	667	CLEAR_BIT(I2Cx->CR1, I2C_CR1_SBC);
AnnaBridge	189:f392fc9709a3	668	}
AnnaBridge	189:f392fc9709a3	669
AnnaBridge	189:f392fc9709a3	670	/**
AnnaBridge	189:f392fc9709a3	671	* @brief Check if hardware byte control in slave mode is enabled or disabled.
AnnaBridge	189:f392fc9709a3	672	* @rmtoll CR1 SBC LL_I2C_IsEnabledSlaveByteControl
AnnaBridge	189:f392fc9709a3	673	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	674	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	675	*/
AnnaBridge	189:f392fc9709a3	676	__STATIC_INLINE uint32_t LL_I2C_IsEnabledSlaveByteControl(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	677	{
AnnaBridge	189:f392fc9709a3	678	return (READ_BIT(I2Cx->CR1, I2C_CR1_SBC) == (I2C_CR1_SBC));
AnnaBridge	189:f392fc9709a3	679	}
AnnaBridge	189:f392fc9709a3	680
AnnaBridge	189:f392fc9709a3	681	/**
AnnaBridge	189:f392fc9709a3	682	* @brief Enable Wakeup from STOP.
AnnaBridge	189:f392fc9709a3	683	* @note Macro @ref IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	684	* WakeUpFromStop feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	685	* @note This bit can only be programmed when Digital Filter is disabled.
AnnaBridge	189:f392fc9709a3	686	* @rmtoll CR1 WUPEN LL_I2C_EnableWakeUpFromStop
AnnaBridge	189:f392fc9709a3	687	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	688	* @retval None
AnnaBridge	189:f392fc9709a3	689	*/
AnnaBridge	189:f392fc9709a3	690	__STATIC_INLINE void LL_I2C_EnableWakeUpFromStop(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	691	{
AnnaBridge	189:f392fc9709a3	692	SET_BIT(I2Cx->CR1, I2C_CR1_WUPEN);
AnnaBridge	189:f392fc9709a3	693	}
AnnaBridge	189:f392fc9709a3	694
AnnaBridge	189:f392fc9709a3	695	/**
AnnaBridge	189:f392fc9709a3	696	* @brief Disable Wakeup from STOP.
AnnaBridge	189:f392fc9709a3	697	* @note Macro @ref IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	698	* WakeUpFromStop feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	699	* @rmtoll CR1 WUPEN LL_I2C_DisableWakeUpFromStop
AnnaBridge	189:f392fc9709a3	700	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	701	* @retval None
AnnaBridge	189:f392fc9709a3	702	*/
AnnaBridge	189:f392fc9709a3	703	__STATIC_INLINE void LL_I2C_DisableWakeUpFromStop(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	704	{
AnnaBridge	189:f392fc9709a3	705	CLEAR_BIT(I2Cx->CR1, I2C_CR1_WUPEN);
AnnaBridge	189:f392fc9709a3	706	}
AnnaBridge	189:f392fc9709a3	707
AnnaBridge	189:f392fc9709a3	708	/**
AnnaBridge	189:f392fc9709a3	709	* @brief Check if Wakeup from STOP is enabled or disabled.
AnnaBridge	189:f392fc9709a3	710	* @note Macro @ref IS_I2C_WAKEUP_FROMSTOP_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	711	* WakeUpFromStop feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	712	* @rmtoll CR1 WUPEN LL_I2C_IsEnabledWakeUpFromStop
AnnaBridge	189:f392fc9709a3	713	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	714	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	715	*/
AnnaBridge	189:f392fc9709a3	716	__STATIC_INLINE uint32_t LL_I2C_IsEnabledWakeUpFromStop(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	717	{
AnnaBridge	189:f392fc9709a3	718	return (READ_BIT(I2Cx->CR1, I2C_CR1_WUPEN) == (I2C_CR1_WUPEN));
AnnaBridge	189:f392fc9709a3	719	}
AnnaBridge	189:f392fc9709a3	720
AnnaBridge	189:f392fc9709a3	721	/**
AnnaBridge	189:f392fc9709a3	722	* @brief Enable General Call.
AnnaBridge	189:f392fc9709a3	723	* @note When enabled the Address 0x00 is ACKed.
AnnaBridge	189:f392fc9709a3	724	* @rmtoll CR1 GCEN LL_I2C_EnableGeneralCall
AnnaBridge	189:f392fc9709a3	725	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	726	* @retval None
AnnaBridge	189:f392fc9709a3	727	*/
AnnaBridge	189:f392fc9709a3	728	__STATIC_INLINE void LL_I2C_EnableGeneralCall(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	729	{
AnnaBridge	189:f392fc9709a3	730	SET_BIT(I2Cx->CR1, I2C_CR1_GCEN);
AnnaBridge	189:f392fc9709a3	731	}
AnnaBridge	189:f392fc9709a3	732
AnnaBridge	189:f392fc9709a3	733	/**
AnnaBridge	189:f392fc9709a3	734	* @brief Disable General Call.
AnnaBridge	189:f392fc9709a3	735	* @note When disabled the Address 0x00 is NACKed.
AnnaBridge	189:f392fc9709a3	736	* @rmtoll CR1 GCEN LL_I2C_DisableGeneralCall
AnnaBridge	189:f392fc9709a3	737	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	738	* @retval None
AnnaBridge	189:f392fc9709a3	739	*/
AnnaBridge	189:f392fc9709a3	740	__STATIC_INLINE void LL_I2C_DisableGeneralCall(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	741	{
AnnaBridge	189:f392fc9709a3	742	CLEAR_BIT(I2Cx->CR1, I2C_CR1_GCEN);
AnnaBridge	189:f392fc9709a3	743	}
AnnaBridge	189:f392fc9709a3	744
AnnaBridge	189:f392fc9709a3	745	/**
AnnaBridge	189:f392fc9709a3	746	* @brief Check if General Call is enabled or disabled.
AnnaBridge	189:f392fc9709a3	747	* @rmtoll CR1 GCEN LL_I2C_IsEnabledGeneralCall
AnnaBridge	189:f392fc9709a3	748	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	749	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	750	*/
AnnaBridge	189:f392fc9709a3	751	__STATIC_INLINE uint32_t LL_I2C_IsEnabledGeneralCall(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	752	{
AnnaBridge	189:f392fc9709a3	753	return (READ_BIT(I2Cx->CR1, I2C_CR1_GCEN) == (I2C_CR1_GCEN));
AnnaBridge	189:f392fc9709a3	754	}
AnnaBridge	189:f392fc9709a3	755
AnnaBridge	189:f392fc9709a3	756	/**
AnnaBridge	189:f392fc9709a3	757	* @brief Configure the Master to operate in 7-bit or 10-bit addressing mode.
AnnaBridge	189:f392fc9709a3	758	* @note Changing this bit is not allowed, when the START bit is set.
AnnaBridge	189:f392fc9709a3	759	* @rmtoll CR2 ADD10 LL_I2C_SetMasterAddressingMode
AnnaBridge	189:f392fc9709a3	760	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	761	* @param AddressingMode This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	762	* @arg @ref LL_I2C_ADDRESSING_MODE_7BIT
AnnaBridge	189:f392fc9709a3	763	* @arg @ref LL_I2C_ADDRESSING_MODE_10BIT
AnnaBridge	189:f392fc9709a3	764	* @retval None
AnnaBridge	189:f392fc9709a3	765	*/
AnnaBridge	189:f392fc9709a3	766	__STATIC_INLINE void LL_I2C_SetMasterAddressingMode(I2C_TypeDef *I2Cx, uint32_t AddressingMode)
AnnaBridge	189:f392fc9709a3	767	{
AnnaBridge	189:f392fc9709a3	768	MODIFY_REG(I2Cx->CR2, I2C_CR2_ADD10, AddressingMode);
AnnaBridge	189:f392fc9709a3	769	}
AnnaBridge	189:f392fc9709a3	770
AnnaBridge	189:f392fc9709a3	771	/**
AnnaBridge	189:f392fc9709a3	772	* @brief Get the Master addressing mode.
AnnaBridge	189:f392fc9709a3	773	* @rmtoll CR2 ADD10 LL_I2C_GetMasterAddressingMode
AnnaBridge	189:f392fc9709a3	774	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	775	* @retval Returned value can be one of the following values:
AnnaBridge	189:f392fc9709a3	776	* @arg @ref LL_I2C_ADDRESSING_MODE_7BIT
AnnaBridge	189:f392fc9709a3	777	* @arg @ref LL_I2C_ADDRESSING_MODE_10BIT
AnnaBridge	189:f392fc9709a3	778	*/
AnnaBridge	189:f392fc9709a3	779	__STATIC_INLINE uint32_t LL_I2C_GetMasterAddressingMode(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	780	{
AnnaBridge	189:f392fc9709a3	781	return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_ADD10));
AnnaBridge	189:f392fc9709a3	782	}
AnnaBridge	189:f392fc9709a3	783
AnnaBridge	189:f392fc9709a3	784	/**
AnnaBridge	189:f392fc9709a3	785	* @brief Set the Own Address1.
AnnaBridge	189:f392fc9709a3	786	* @rmtoll OAR1 OA1 LL_I2C_SetOwnAddress1\n
AnnaBridge	189:f392fc9709a3	787	* OAR1 OA1MODE LL_I2C_SetOwnAddress1
AnnaBridge	189:f392fc9709a3	788	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	789	* @param OwnAddress1 This parameter must be a value between Min_Data=0 and Max_Data=0x3FF.
AnnaBridge	189:f392fc9709a3	790	* @param OwnAddrSize This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	791	* @arg @ref LL_I2C_OWNADDRESS1_7BIT
AnnaBridge	189:f392fc9709a3	792	* @arg @ref LL_I2C_OWNADDRESS1_10BIT
AnnaBridge	189:f392fc9709a3	793	* @retval None
AnnaBridge	189:f392fc9709a3	794	*/
AnnaBridge	189:f392fc9709a3	795	__STATIC_INLINE void LL_I2C_SetOwnAddress1(I2C_TypeDef *I2Cx, uint32_t OwnAddress1, uint32_t OwnAddrSize)
AnnaBridge	189:f392fc9709a3	796	{
AnnaBridge	189:f392fc9709a3	797	MODIFY_REG(I2Cx->OAR1, I2C_OAR1_OA1 \| I2C_OAR1_OA1MODE, OwnAddress1 \| OwnAddrSize);
AnnaBridge	189:f392fc9709a3	798	}
AnnaBridge	189:f392fc9709a3	799
AnnaBridge	189:f392fc9709a3	800	/**
AnnaBridge	189:f392fc9709a3	801	* @brief Enable acknowledge on Own Address1 match address.
AnnaBridge	189:f392fc9709a3	802	* @rmtoll OAR1 OA1EN LL_I2C_EnableOwnAddress1
AnnaBridge	189:f392fc9709a3	803	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	804	* @retval None
AnnaBridge	189:f392fc9709a3	805	*/
AnnaBridge	189:f392fc9709a3	806	__STATIC_INLINE void LL_I2C_EnableOwnAddress1(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	807	{
AnnaBridge	189:f392fc9709a3	808	SET_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN);
AnnaBridge	189:f392fc9709a3	809	}
AnnaBridge	189:f392fc9709a3	810
AnnaBridge	189:f392fc9709a3	811	/**
AnnaBridge	189:f392fc9709a3	812	* @brief Disable acknowledge on Own Address1 match address.
AnnaBridge	189:f392fc9709a3	813	* @rmtoll OAR1 OA1EN LL_I2C_DisableOwnAddress1
AnnaBridge	189:f392fc9709a3	814	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	815	* @retval None
AnnaBridge	189:f392fc9709a3	816	*/
AnnaBridge	189:f392fc9709a3	817	__STATIC_INLINE void LL_I2C_DisableOwnAddress1(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	818	{
AnnaBridge	189:f392fc9709a3	819	CLEAR_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN);
AnnaBridge	189:f392fc9709a3	820	}
AnnaBridge	189:f392fc9709a3	821
AnnaBridge	189:f392fc9709a3	822	/**
AnnaBridge	189:f392fc9709a3	823	* @brief Check if Own Address1 acknowledge is enabled or disabled.
AnnaBridge	189:f392fc9709a3	824	* @rmtoll OAR1 OA1EN LL_I2C_IsEnabledOwnAddress1
AnnaBridge	189:f392fc9709a3	825	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	826	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	827	*/
AnnaBridge	189:f392fc9709a3	828	__STATIC_INLINE uint32_t LL_I2C_IsEnabledOwnAddress1(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	829	{
AnnaBridge	189:f392fc9709a3	830	return (READ_BIT(I2Cx->OAR1, I2C_OAR1_OA1EN) == (I2C_OAR1_OA1EN));
AnnaBridge	189:f392fc9709a3	831	}
AnnaBridge	189:f392fc9709a3	832
AnnaBridge	189:f392fc9709a3	833	/**
AnnaBridge	189:f392fc9709a3	834	* @brief Set the 7bits Own Address2.
AnnaBridge	189:f392fc9709a3	835	* @note This action has no effect if own address2 is enabled.
AnnaBridge	189:f392fc9709a3	836	* @rmtoll OAR2 OA2 LL_I2C_SetOwnAddress2\n
AnnaBridge	189:f392fc9709a3	837	* OAR2 OA2MSK LL_I2C_SetOwnAddress2
AnnaBridge	189:f392fc9709a3	838	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	839	* @param OwnAddress2 Value between Min_Data=0 and Max_Data=0x7F.
AnnaBridge	189:f392fc9709a3	840	* @param OwnAddrMask This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	841	* @arg @ref LL_I2C_OWNADDRESS2_NOMASK
AnnaBridge	189:f392fc9709a3	842	* @arg @ref LL_I2C_OWNADDRESS2_MASK01
AnnaBridge	189:f392fc9709a3	843	* @arg @ref LL_I2C_OWNADDRESS2_MASK02
AnnaBridge	189:f392fc9709a3	844	* @arg @ref LL_I2C_OWNADDRESS2_MASK03
AnnaBridge	189:f392fc9709a3	845	* @arg @ref LL_I2C_OWNADDRESS2_MASK04
AnnaBridge	189:f392fc9709a3	846	* @arg @ref LL_I2C_OWNADDRESS2_MASK05
AnnaBridge	189:f392fc9709a3	847	* @arg @ref LL_I2C_OWNADDRESS2_MASK06
AnnaBridge	189:f392fc9709a3	848	* @arg @ref LL_I2C_OWNADDRESS2_MASK07
AnnaBridge	189:f392fc9709a3	849	* @retval None
AnnaBridge	189:f392fc9709a3	850	*/
AnnaBridge	189:f392fc9709a3	851	__STATIC_INLINE void LL_I2C_SetOwnAddress2(I2C_TypeDef *I2Cx, uint32_t OwnAddress2, uint32_t OwnAddrMask)
AnnaBridge	189:f392fc9709a3	852	{
AnnaBridge	189:f392fc9709a3	853	MODIFY_REG(I2Cx->OAR2, I2C_OAR2_OA2 \| I2C_OAR2_OA2MSK, OwnAddress2 \| OwnAddrMask);
AnnaBridge	189:f392fc9709a3	854	}
AnnaBridge	189:f392fc9709a3	855
AnnaBridge	189:f392fc9709a3	856	/**
AnnaBridge	189:f392fc9709a3	857	* @brief Enable acknowledge on Own Address2 match address.
AnnaBridge	189:f392fc9709a3	858	* @rmtoll OAR2 OA2EN LL_I2C_EnableOwnAddress2
AnnaBridge	189:f392fc9709a3	859	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	860	* @retval None
AnnaBridge	189:f392fc9709a3	861	*/
AnnaBridge	189:f392fc9709a3	862	__STATIC_INLINE void LL_I2C_EnableOwnAddress2(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	863	{
AnnaBridge	189:f392fc9709a3	864	SET_BIT(I2Cx->OAR2, I2C_OAR2_OA2EN);
AnnaBridge	189:f392fc9709a3	865	}
AnnaBridge	189:f392fc9709a3	866
AnnaBridge	189:f392fc9709a3	867	/**
AnnaBridge	189:f392fc9709a3	868	* @brief Disable acknowledge on Own Address2 match address.
AnnaBridge	189:f392fc9709a3	869	* @rmtoll OAR2 OA2EN LL_I2C_DisableOwnAddress2
AnnaBridge	189:f392fc9709a3	870	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	871	* @retval None
AnnaBridge	189:f392fc9709a3	872	*/
AnnaBridge	189:f392fc9709a3	873	__STATIC_INLINE void LL_I2C_DisableOwnAddress2(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	874	{
AnnaBridge	189:f392fc9709a3	875	CLEAR_BIT(I2Cx->OAR2, I2C_OAR2_OA2EN);
AnnaBridge	189:f392fc9709a3	876	}
AnnaBridge	189:f392fc9709a3	877
AnnaBridge	189:f392fc9709a3	878	/**
AnnaBridge	189:f392fc9709a3	879	* @brief Check if Own Address1 acknowledge is enabled or disabled.
AnnaBridge	189:f392fc9709a3	880	* @rmtoll OAR2 OA2EN LL_I2C_IsEnabledOwnAddress2
AnnaBridge	189:f392fc9709a3	881	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	882	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	883	*/
AnnaBridge	189:f392fc9709a3	884	__STATIC_INLINE uint32_t LL_I2C_IsEnabledOwnAddress2(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	885	{
AnnaBridge	189:f392fc9709a3	886	return (READ_BIT(I2Cx->OAR2, I2C_OAR2_OA2EN) == (I2C_OAR2_OA2EN));
AnnaBridge	189:f392fc9709a3	887	}
AnnaBridge	189:f392fc9709a3	888
AnnaBridge	189:f392fc9709a3	889	/**
AnnaBridge	189:f392fc9709a3	890	* @brief Configure the SDA setup, hold time and the SCL high, low period.
AnnaBridge	189:f392fc9709a3	891	* @note This bit can only be programmed when the I2C is disabled (PE = 0).
AnnaBridge	189:f392fc9709a3	892	* @rmtoll TIMINGR TIMINGR LL_I2C_SetTiming
AnnaBridge	189:f392fc9709a3	893	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	894	* @param Timing This parameter must be a value between Min_Data=0 and Max_Data=0xFFFFFFFF.
AnnaBridge	189:f392fc9709a3	895	* @note This parameter is computed with the STM32CubeMX Tool.
AnnaBridge	189:f392fc9709a3	896	* @retval None
AnnaBridge	189:f392fc9709a3	897	*/
AnnaBridge	189:f392fc9709a3	898	__STATIC_INLINE void LL_I2C_SetTiming(I2C_TypeDef *I2Cx, uint32_t Timing)
AnnaBridge	189:f392fc9709a3	899	{
AnnaBridge	189:f392fc9709a3	900	WRITE_REG(I2Cx->TIMINGR, Timing);
AnnaBridge	189:f392fc9709a3	901	}
AnnaBridge	189:f392fc9709a3	902
AnnaBridge	189:f392fc9709a3	903	/**
AnnaBridge	189:f392fc9709a3	904	* @brief Get the Timing Prescaler setting.
AnnaBridge	189:f392fc9709a3	905	* @rmtoll TIMINGR PRESC LL_I2C_GetTimingPrescaler
AnnaBridge	189:f392fc9709a3	906	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	907	* @retval Value between Min_Data=0x0 and Max_Data=0xF
AnnaBridge	189:f392fc9709a3	908	*/
AnnaBridge	189:f392fc9709a3	909	__STATIC_INLINE uint32_t LL_I2C_GetTimingPrescaler(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	910	{
AnnaBridge	189:f392fc9709a3	911	return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_PRESC) >> I2C_TIMINGR_PRESC_Pos);
AnnaBridge	189:f392fc9709a3	912	}
AnnaBridge	189:f392fc9709a3	913
AnnaBridge	189:f392fc9709a3	914	/**
AnnaBridge	189:f392fc9709a3	915	* @brief Get the SCL low period setting.
AnnaBridge	189:f392fc9709a3	916	* @rmtoll TIMINGR SCLL LL_I2C_GetClockLowPeriod
AnnaBridge	189:f392fc9709a3	917	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	918	* @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	189:f392fc9709a3	919	*/
AnnaBridge	189:f392fc9709a3	920	__STATIC_INLINE uint32_t LL_I2C_GetClockLowPeriod(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	921	{
AnnaBridge	189:f392fc9709a3	922	return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SCLL) >> I2C_TIMINGR_SCLL_Pos);
AnnaBridge	189:f392fc9709a3	923	}
AnnaBridge	189:f392fc9709a3	924
AnnaBridge	189:f392fc9709a3	925	/**
AnnaBridge	189:f392fc9709a3	926	* @brief Get the SCL high period setting.
AnnaBridge	189:f392fc9709a3	927	* @rmtoll TIMINGR SCLH LL_I2C_GetClockHighPeriod
AnnaBridge	189:f392fc9709a3	928	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	929	* @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	189:f392fc9709a3	930	*/
AnnaBridge	189:f392fc9709a3	931	__STATIC_INLINE uint32_t LL_I2C_GetClockHighPeriod(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	932	{
AnnaBridge	189:f392fc9709a3	933	return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SCLH) >> I2C_TIMINGR_SCLH_Pos);
AnnaBridge	189:f392fc9709a3	934	}
AnnaBridge	189:f392fc9709a3	935
AnnaBridge	189:f392fc9709a3	936	/**
AnnaBridge	189:f392fc9709a3	937	* @brief Get the SDA hold time.
AnnaBridge	189:f392fc9709a3	938	* @rmtoll TIMINGR SDADEL LL_I2C_GetDataHoldTime
AnnaBridge	189:f392fc9709a3	939	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	940	* @retval Value between Min_Data=0x0 and Max_Data=0xF
AnnaBridge	189:f392fc9709a3	941	*/
AnnaBridge	189:f392fc9709a3	942	__STATIC_INLINE uint32_t LL_I2C_GetDataHoldTime(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	943	{
AnnaBridge	189:f392fc9709a3	944	return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SDADEL) >> I2C_TIMINGR_SDADEL_Pos);
AnnaBridge	189:f392fc9709a3	945	}
AnnaBridge	189:f392fc9709a3	946
AnnaBridge	189:f392fc9709a3	947	/**
AnnaBridge	189:f392fc9709a3	948	* @brief Get the SDA setup time.
AnnaBridge	189:f392fc9709a3	949	* @rmtoll TIMINGR SCLDEL LL_I2C_GetDataSetupTime
AnnaBridge	189:f392fc9709a3	950	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	951	* @retval Value between Min_Data=0x0 and Max_Data=0xF
AnnaBridge	189:f392fc9709a3	952	*/
AnnaBridge	189:f392fc9709a3	953	__STATIC_INLINE uint32_t LL_I2C_GetDataSetupTime(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	954	{
AnnaBridge	189:f392fc9709a3	955	return (uint32_t)(READ_BIT(I2Cx->TIMINGR, I2C_TIMINGR_SCLDEL) >> I2C_TIMINGR_SCLDEL_Pos);
AnnaBridge	189:f392fc9709a3	956	}
AnnaBridge	189:f392fc9709a3	957
AnnaBridge	189:f392fc9709a3	958	/**
AnnaBridge	189:f392fc9709a3	959	* @brief Configure peripheral mode.
AnnaBridge	189:f392fc9709a3	960	* @note Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	961	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	962	* @rmtoll CR1 SMBHEN LL_I2C_SetMode\n
AnnaBridge	189:f392fc9709a3	963	* CR1 SMBDEN LL_I2C_SetMode
AnnaBridge	189:f392fc9709a3	964	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	965	* @param PeripheralMode This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	966	* @arg @ref LL_I2C_MODE_I2C
AnnaBridge	189:f392fc9709a3	967	* @arg @ref LL_I2C_MODE_SMBUS_HOST
AnnaBridge	189:f392fc9709a3	968	* @arg @ref LL_I2C_MODE_SMBUS_DEVICE
AnnaBridge	189:f392fc9709a3	969	* @arg @ref LL_I2C_MODE_SMBUS_DEVICE_ARP
AnnaBridge	189:f392fc9709a3	970	* @retval None
AnnaBridge	189:f392fc9709a3	971	*/
AnnaBridge	189:f392fc9709a3	972	__STATIC_INLINE void LL_I2C_SetMode(I2C_TypeDef *I2Cx, uint32_t PeripheralMode)
AnnaBridge	189:f392fc9709a3	973	{
AnnaBridge	189:f392fc9709a3	974	MODIFY_REG(I2Cx->CR1, I2C_CR1_SMBHEN \| I2C_CR1_SMBDEN, PeripheralMode);
AnnaBridge	189:f392fc9709a3	975	}
AnnaBridge	189:f392fc9709a3	976
AnnaBridge	189:f392fc9709a3	977	/**
AnnaBridge	189:f392fc9709a3	978	* @brief Get peripheral mode.
AnnaBridge	189:f392fc9709a3	979	* @note Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	980	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	981	* @rmtoll CR1 SMBHEN LL_I2C_GetMode\n
AnnaBridge	189:f392fc9709a3	982	* CR1 SMBDEN LL_I2C_GetMode
AnnaBridge	189:f392fc9709a3	983	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	984	* @retval Returned value can be one of the following values:
AnnaBridge	189:f392fc9709a3	985	* @arg @ref LL_I2C_MODE_I2C
AnnaBridge	189:f392fc9709a3	986	* @arg @ref LL_I2C_MODE_SMBUS_HOST
AnnaBridge	189:f392fc9709a3	987	* @arg @ref LL_I2C_MODE_SMBUS_DEVICE
AnnaBridge	189:f392fc9709a3	988	* @arg @ref LL_I2C_MODE_SMBUS_DEVICE_ARP
AnnaBridge	189:f392fc9709a3	989	*/
AnnaBridge	189:f392fc9709a3	990	__STATIC_INLINE uint32_t LL_I2C_GetMode(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	991	{
AnnaBridge	189:f392fc9709a3	992	return (uint32_t)(READ_BIT(I2Cx->CR1, I2C_CR1_SMBHEN \| I2C_CR1_SMBDEN));
AnnaBridge	189:f392fc9709a3	993	}
AnnaBridge	189:f392fc9709a3	994
AnnaBridge	189:f392fc9709a3	995	/**
AnnaBridge	189:f392fc9709a3	996	* @brief Enable SMBus alert (Host or Device mode)
AnnaBridge	189:f392fc9709a3	997	* @note Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	998	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	999	* @note SMBus Device mode:
AnnaBridge	189:f392fc9709a3	1000	* - SMBus Alert pin is drived low and
AnnaBridge	189:f392fc9709a3	1001	* Alert Response Address Header acknowledge is enabled.
AnnaBridge	189:f392fc9709a3	1002	* SMBus Host mode:
AnnaBridge	189:f392fc9709a3	1003	* - SMBus Alert pin management is supported.
AnnaBridge	189:f392fc9709a3	1004	* @rmtoll CR1 ALERTEN LL_I2C_EnableSMBusAlert
AnnaBridge	189:f392fc9709a3	1005	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1006	* @retval None
AnnaBridge	189:f392fc9709a3	1007	*/
AnnaBridge	189:f392fc9709a3	1008	__STATIC_INLINE void LL_I2C_EnableSMBusAlert(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1009	{
AnnaBridge	189:f392fc9709a3	1010	SET_BIT(I2Cx->CR1, I2C_CR1_ALERTEN);
AnnaBridge	189:f392fc9709a3	1011	}
AnnaBridge	189:f392fc9709a3	1012
AnnaBridge	189:f392fc9709a3	1013	/**
AnnaBridge	189:f392fc9709a3	1014	* @brief Disable SMBus alert (Host or Device mode)
AnnaBridge	189:f392fc9709a3	1015	* @note Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1016	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1017	* @note SMBus Device mode:
AnnaBridge	189:f392fc9709a3	1018	* - SMBus Alert pin is not drived (can be used as a standard GPIO) and
AnnaBridge	189:f392fc9709a3	1019	* Alert Response Address Header acknowledge is disabled.
AnnaBridge	189:f392fc9709a3	1020	* SMBus Host mode:
AnnaBridge	189:f392fc9709a3	1021	* - SMBus Alert pin management is not supported.
AnnaBridge	189:f392fc9709a3	1022	* @rmtoll CR1 ALERTEN LL_I2C_DisableSMBusAlert
AnnaBridge	189:f392fc9709a3	1023	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1024	* @retval None
AnnaBridge	189:f392fc9709a3	1025	*/
AnnaBridge	189:f392fc9709a3	1026	__STATIC_INLINE void LL_I2C_DisableSMBusAlert(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1027	{
AnnaBridge	189:f392fc9709a3	1028	CLEAR_BIT(I2Cx->CR1, I2C_CR1_ALERTEN);
AnnaBridge	189:f392fc9709a3	1029	}
AnnaBridge	189:f392fc9709a3	1030
AnnaBridge	189:f392fc9709a3	1031	/**
AnnaBridge	189:f392fc9709a3	1032	* @brief Check if SMBus alert (Host or Device mode) is enabled or disabled.
AnnaBridge	189:f392fc9709a3	1033	* @note Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1034	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1035	* @rmtoll CR1 ALERTEN LL_I2C_IsEnabledSMBusAlert
AnnaBridge	189:f392fc9709a3	1036	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1037	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1038	*/
AnnaBridge	189:f392fc9709a3	1039	__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusAlert(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1040	{
AnnaBridge	189:f392fc9709a3	1041	return (READ_BIT(I2Cx->CR1, I2C_CR1_ALERTEN) == (I2C_CR1_ALERTEN));
AnnaBridge	189:f392fc9709a3	1042	}
AnnaBridge	189:f392fc9709a3	1043
AnnaBridge	189:f392fc9709a3	1044	/**
AnnaBridge	189:f392fc9709a3	1045	* @brief Enable SMBus Packet Error Calculation (PEC).
AnnaBridge	189:f392fc9709a3	1046	* @note Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1047	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1048	* @rmtoll CR1 PECEN LL_I2C_EnableSMBusPEC
AnnaBridge	189:f392fc9709a3	1049	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1050	* @retval None
AnnaBridge	189:f392fc9709a3	1051	*/
AnnaBridge	189:f392fc9709a3	1052	__STATIC_INLINE void LL_I2C_EnableSMBusPEC(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1053	{
AnnaBridge	189:f392fc9709a3	1054	SET_BIT(I2Cx->CR1, I2C_CR1_PECEN);
AnnaBridge	189:f392fc9709a3	1055	}
AnnaBridge	189:f392fc9709a3	1056
AnnaBridge	189:f392fc9709a3	1057	/**
AnnaBridge	189:f392fc9709a3	1058	* @brief Disable SMBus Packet Error Calculation (PEC).
AnnaBridge	189:f392fc9709a3	1059	* @note Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1060	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1061	* @rmtoll CR1 PECEN LL_I2C_DisableSMBusPEC
AnnaBridge	189:f392fc9709a3	1062	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1063	* @retval None
AnnaBridge	189:f392fc9709a3	1064	*/
AnnaBridge	189:f392fc9709a3	1065	__STATIC_INLINE void LL_I2C_DisableSMBusPEC(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1066	{
AnnaBridge	189:f392fc9709a3	1067	CLEAR_BIT(I2Cx->CR1, I2C_CR1_PECEN);
AnnaBridge	189:f392fc9709a3	1068	}
AnnaBridge	189:f392fc9709a3	1069
AnnaBridge	189:f392fc9709a3	1070	/**
AnnaBridge	189:f392fc9709a3	1071	* @brief Check if SMBus Packet Error Calculation (PEC) is enabled or disabled.
AnnaBridge	189:f392fc9709a3	1072	* @note Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1073	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1074	* @rmtoll CR1 PECEN LL_I2C_IsEnabledSMBusPEC
AnnaBridge	189:f392fc9709a3	1075	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1076	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1077	*/
AnnaBridge	189:f392fc9709a3	1078	__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusPEC(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1079	{
AnnaBridge	189:f392fc9709a3	1080	return (READ_BIT(I2Cx->CR1, I2C_CR1_PECEN) == (I2C_CR1_PECEN));
AnnaBridge	189:f392fc9709a3	1081	}
AnnaBridge	189:f392fc9709a3	1082
AnnaBridge	189:f392fc9709a3	1083	/**
AnnaBridge	189:f392fc9709a3	1084	* @brief Configure the SMBus Clock Timeout.
AnnaBridge	189:f392fc9709a3	1085	* @note Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1086	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1087	* @note This configuration can only be programmed when associated Timeout is disabled (TimeoutA and/orTimeoutB).
AnnaBridge	189:f392fc9709a3	1088	* @rmtoll TIMEOUTR TIMEOUTA LL_I2C_ConfigSMBusTimeout\n
AnnaBridge	189:f392fc9709a3	1089	* TIMEOUTR TIDLE LL_I2C_ConfigSMBusTimeout\n
AnnaBridge	189:f392fc9709a3	1090	* TIMEOUTR TIMEOUTB LL_I2C_ConfigSMBusTimeout
AnnaBridge	189:f392fc9709a3	1091	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1092	* @param TimeoutA This parameter must be a value between Min_Data=0 and Max_Data=0xFFF.
AnnaBridge	189:f392fc9709a3	1093	* @param TimeoutAMode This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	1094	* @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW
AnnaBridge	189:f392fc9709a3	1095	* @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH
AnnaBridge	189:f392fc9709a3	1096	* @param TimeoutB
AnnaBridge	189:f392fc9709a3	1097	* @retval None
AnnaBridge	189:f392fc9709a3	1098	*/
AnnaBridge	189:f392fc9709a3	1099	__STATIC_INLINE void LL_I2C_ConfigSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t TimeoutA, uint32_t TimeoutAMode,
AnnaBridge	189:f392fc9709a3	1100	uint32_t TimeoutB)
AnnaBridge	189:f392fc9709a3	1101	{
AnnaBridge	189:f392fc9709a3	1102	MODIFY_REG(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIMEOUTA \| I2C_TIMEOUTR_TIDLE \| I2C_TIMEOUTR_TIMEOUTB,
AnnaBridge	189:f392fc9709a3	1103	TimeoutA \| TimeoutAMode \| (TimeoutB << I2C_TIMEOUTR_TIMEOUTB_Pos));
AnnaBridge	189:f392fc9709a3	1104	}
AnnaBridge	189:f392fc9709a3	1105
AnnaBridge	189:f392fc9709a3	1106	/**
AnnaBridge	189:f392fc9709a3	1107	* @brief Configure the SMBus Clock TimeoutA (SCL low timeout or SCL and SDA high timeout depends on TimeoutA mode).
AnnaBridge	189:f392fc9709a3	1108	* @note Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1109	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1110	* @note These bits can only be programmed when TimeoutA is disabled.
AnnaBridge	189:f392fc9709a3	1111	* @rmtoll TIMEOUTR TIMEOUTA LL_I2C_SetSMBusTimeoutA
AnnaBridge	189:f392fc9709a3	1112	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1113	* @param TimeoutA This parameter must be a value between Min_Data=0 and Max_Data=0xFFF.
AnnaBridge	189:f392fc9709a3	1114	* @retval None
AnnaBridge	189:f392fc9709a3	1115	*/
AnnaBridge	189:f392fc9709a3	1116	__STATIC_INLINE void LL_I2C_SetSMBusTimeoutA(I2C_TypeDef *I2Cx, uint32_t TimeoutA)
AnnaBridge	189:f392fc9709a3	1117	{
AnnaBridge	189:f392fc9709a3	1118	WRITE_REG(I2Cx->TIMEOUTR, TimeoutA);
AnnaBridge	189:f392fc9709a3	1119	}
AnnaBridge	189:f392fc9709a3	1120
AnnaBridge	189:f392fc9709a3	1121	/**
AnnaBridge	189:f392fc9709a3	1122	* @brief Get the SMBus Clock TimeoutA setting.
AnnaBridge	189:f392fc9709a3	1123	* @note Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1124	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1125	* @rmtoll TIMEOUTR TIMEOUTA LL_I2C_GetSMBusTimeoutA
AnnaBridge	189:f392fc9709a3	1126	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1127	* @retval Value between Min_Data=0 and Max_Data=0xFFF
AnnaBridge	189:f392fc9709a3	1128	*/
AnnaBridge	189:f392fc9709a3	1129	__STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutA(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1130	{
AnnaBridge	189:f392fc9709a3	1131	return (uint32_t)(READ_BIT(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIMEOUTA));
AnnaBridge	189:f392fc9709a3	1132	}
AnnaBridge	189:f392fc9709a3	1133
AnnaBridge	189:f392fc9709a3	1134	/**
AnnaBridge	189:f392fc9709a3	1135	* @brief Set the SMBus Clock TimeoutA mode.
AnnaBridge	189:f392fc9709a3	1136	* @note Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1137	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1138	* @note This bit can only be programmed when TimeoutA is disabled.
AnnaBridge	189:f392fc9709a3	1139	* @rmtoll TIMEOUTR TIDLE LL_I2C_SetSMBusTimeoutAMode
AnnaBridge	189:f392fc9709a3	1140	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1141	* @param TimeoutAMode This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	1142	* @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW
AnnaBridge	189:f392fc9709a3	1143	* @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH
AnnaBridge	189:f392fc9709a3	1144	* @retval None
AnnaBridge	189:f392fc9709a3	1145	*/
AnnaBridge	189:f392fc9709a3	1146	__STATIC_INLINE void LL_I2C_SetSMBusTimeoutAMode(I2C_TypeDef *I2Cx, uint32_t TimeoutAMode)
AnnaBridge	189:f392fc9709a3	1147	{
AnnaBridge	189:f392fc9709a3	1148	WRITE_REG(I2Cx->TIMEOUTR, TimeoutAMode);
AnnaBridge	189:f392fc9709a3	1149	}
AnnaBridge	189:f392fc9709a3	1150
AnnaBridge	189:f392fc9709a3	1151	/**
AnnaBridge	189:f392fc9709a3	1152	* @brief Get the SMBus Clock TimeoutA mode.
AnnaBridge	189:f392fc9709a3	1153	* @note Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1154	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1155	* @rmtoll TIMEOUTR TIDLE LL_I2C_GetSMBusTimeoutAMode
AnnaBridge	189:f392fc9709a3	1156	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1157	* @retval Returned value can be one of the following values:
AnnaBridge	189:f392fc9709a3	1158	* @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SCL_LOW
AnnaBridge	189:f392fc9709a3	1159	* @arg @ref LL_I2C_SMBUS_TIMEOUTA_MODE_SDA_SCL_HIGH
AnnaBridge	189:f392fc9709a3	1160	*/
AnnaBridge	189:f392fc9709a3	1161	__STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutAMode(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1162	{
AnnaBridge	189:f392fc9709a3	1163	return (uint32_t)(READ_BIT(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIDLE));
AnnaBridge	189:f392fc9709a3	1164	}
AnnaBridge	189:f392fc9709a3	1165
AnnaBridge	189:f392fc9709a3	1166	/**
AnnaBridge	189:f392fc9709a3	1167	* @brief Configure the SMBus Extended Cumulative Clock TimeoutB (Master or Slave mode).
AnnaBridge	189:f392fc9709a3	1168	* @note Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1169	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1170	* @note These bits can only be programmed when TimeoutB is disabled.
AnnaBridge	189:f392fc9709a3	1171	* @rmtoll TIMEOUTR TIMEOUTB LL_I2C_SetSMBusTimeoutB
AnnaBridge	189:f392fc9709a3	1172	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1173	* @param TimeoutB This parameter must be a value between Min_Data=0 and Max_Data=0xFFF.
AnnaBridge	189:f392fc9709a3	1174	* @retval None
AnnaBridge	189:f392fc9709a3	1175	*/
AnnaBridge	189:f392fc9709a3	1176	__STATIC_INLINE void LL_I2C_SetSMBusTimeoutB(I2C_TypeDef *I2Cx, uint32_t TimeoutB)
AnnaBridge	189:f392fc9709a3	1177	{
AnnaBridge	189:f392fc9709a3	1178	WRITE_REG(I2Cx->TIMEOUTR, TimeoutB << I2C_TIMEOUTR_TIMEOUTB_Pos);
AnnaBridge	189:f392fc9709a3	1179	}
AnnaBridge	189:f392fc9709a3	1180
AnnaBridge	189:f392fc9709a3	1181	/**
AnnaBridge	189:f392fc9709a3	1182	* @brief Get the SMBus Extented Cumulative Clock TimeoutB setting.
AnnaBridge	189:f392fc9709a3	1183	* @note Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1184	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1185	* @rmtoll TIMEOUTR TIMEOUTB LL_I2C_GetSMBusTimeoutB
AnnaBridge	189:f392fc9709a3	1186	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1187	* @retval Value between Min_Data=0 and Max_Data=0xFFF
AnnaBridge	189:f392fc9709a3	1188	*/
AnnaBridge	189:f392fc9709a3	1189	__STATIC_INLINE uint32_t LL_I2C_GetSMBusTimeoutB(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1190	{
AnnaBridge	189:f392fc9709a3	1191	return (uint32_t)(READ_BIT(I2Cx->TIMEOUTR, I2C_TIMEOUTR_TIMEOUTB) >> I2C_TIMEOUTR_TIMEOUTB_Pos);
AnnaBridge	189:f392fc9709a3	1192	}
AnnaBridge	189:f392fc9709a3	1193
AnnaBridge	189:f392fc9709a3	1194	/**
AnnaBridge	189:f392fc9709a3	1195	* @brief Enable the SMBus Clock Timeout.
AnnaBridge	189:f392fc9709a3	1196	* @note Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1197	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1198	* @rmtoll TIMEOUTR TIMOUTEN LL_I2C_EnableSMBusTimeout\n
AnnaBridge	189:f392fc9709a3	1199	* TIMEOUTR TEXTEN LL_I2C_EnableSMBusTimeout
AnnaBridge	189:f392fc9709a3	1200	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1201	* @param ClockTimeout This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	1202	* @arg @ref LL_I2C_SMBUS_TIMEOUTA
AnnaBridge	189:f392fc9709a3	1203	* @arg @ref LL_I2C_SMBUS_TIMEOUTB
AnnaBridge	189:f392fc9709a3	1204	* @arg @ref LL_I2C_SMBUS_ALL_TIMEOUT
AnnaBridge	189:f392fc9709a3	1205	* @retval None
AnnaBridge	189:f392fc9709a3	1206	*/
AnnaBridge	189:f392fc9709a3	1207	__STATIC_INLINE void LL_I2C_EnableSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t ClockTimeout)
AnnaBridge	189:f392fc9709a3	1208	{
AnnaBridge	189:f392fc9709a3	1209	SET_BIT(I2Cx->TIMEOUTR, ClockTimeout);
AnnaBridge	189:f392fc9709a3	1210	}
AnnaBridge	189:f392fc9709a3	1211
AnnaBridge	189:f392fc9709a3	1212	/**
AnnaBridge	189:f392fc9709a3	1213	* @brief Disable the SMBus Clock Timeout.
AnnaBridge	189:f392fc9709a3	1214	* @note Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1215	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1216	* @rmtoll TIMEOUTR TIMOUTEN LL_I2C_DisableSMBusTimeout\n
AnnaBridge	189:f392fc9709a3	1217	* TIMEOUTR TEXTEN LL_I2C_DisableSMBusTimeout
AnnaBridge	189:f392fc9709a3	1218	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1219	* @param ClockTimeout This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	1220	* @arg @ref LL_I2C_SMBUS_TIMEOUTA
AnnaBridge	189:f392fc9709a3	1221	* @arg @ref LL_I2C_SMBUS_TIMEOUTB
AnnaBridge	189:f392fc9709a3	1222	* @arg @ref LL_I2C_SMBUS_ALL_TIMEOUT
AnnaBridge	189:f392fc9709a3	1223	* @retval None
AnnaBridge	189:f392fc9709a3	1224	*/
AnnaBridge	189:f392fc9709a3	1225	__STATIC_INLINE void LL_I2C_DisableSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t ClockTimeout)
AnnaBridge	189:f392fc9709a3	1226	{
AnnaBridge	189:f392fc9709a3	1227	CLEAR_BIT(I2Cx->TIMEOUTR, ClockTimeout);
AnnaBridge	189:f392fc9709a3	1228	}
AnnaBridge	189:f392fc9709a3	1229
AnnaBridge	189:f392fc9709a3	1230	/**
AnnaBridge	189:f392fc9709a3	1231	* @brief Check if the SMBus Clock Timeout is enabled or disabled.
AnnaBridge	189:f392fc9709a3	1232	* @note Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1233	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1234	* @rmtoll TIMEOUTR TIMOUTEN LL_I2C_IsEnabledSMBusTimeout\n
AnnaBridge	189:f392fc9709a3	1235	* TIMEOUTR TEXTEN LL_I2C_IsEnabledSMBusTimeout
AnnaBridge	189:f392fc9709a3	1236	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1237	* @param ClockTimeout This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	1238	* @arg @ref LL_I2C_SMBUS_TIMEOUTA
AnnaBridge	189:f392fc9709a3	1239	* @arg @ref LL_I2C_SMBUS_TIMEOUTB
AnnaBridge	189:f392fc9709a3	1240	* @arg @ref LL_I2C_SMBUS_ALL_TIMEOUT
AnnaBridge	189:f392fc9709a3	1241	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1242	*/
AnnaBridge	189:f392fc9709a3	1243	__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusTimeout(I2C_TypeDef *I2Cx, uint32_t ClockTimeout)
AnnaBridge	189:f392fc9709a3	1244	{
AnnaBridge	189:f392fc9709a3	1245	return (READ_BIT(I2Cx->TIMEOUTR, (I2C_TIMEOUTR_TIMOUTEN \| I2C_TIMEOUTR_TEXTEN)) == (ClockTimeout));
AnnaBridge	189:f392fc9709a3	1246	}
AnnaBridge	189:f392fc9709a3	1247
AnnaBridge	189:f392fc9709a3	1248	/**
AnnaBridge	189:f392fc9709a3	1249	* @}
AnnaBridge	189:f392fc9709a3	1250	*/
AnnaBridge	189:f392fc9709a3	1251
AnnaBridge	189:f392fc9709a3	1252	/** @defgroup I2C_LL_EF_IT_Management IT_Management
AnnaBridge	189:f392fc9709a3	1253	* @{
AnnaBridge	189:f392fc9709a3	1254	*/
AnnaBridge	189:f392fc9709a3	1255
AnnaBridge	189:f392fc9709a3	1256	/**
AnnaBridge	189:f392fc9709a3	1257	* @brief Enable TXIS interrupt.
AnnaBridge	189:f392fc9709a3	1258	* @rmtoll CR1 TXIE LL_I2C_EnableIT_TX
AnnaBridge	189:f392fc9709a3	1259	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1260	* @retval None
AnnaBridge	189:f392fc9709a3	1261	*/
AnnaBridge	189:f392fc9709a3	1262	__STATIC_INLINE void LL_I2C_EnableIT_TX(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1263	{
AnnaBridge	189:f392fc9709a3	1264	SET_BIT(I2Cx->CR1, I2C_CR1_TXIE);
AnnaBridge	189:f392fc9709a3	1265	}
AnnaBridge	189:f392fc9709a3	1266
AnnaBridge	189:f392fc9709a3	1267	/**
AnnaBridge	189:f392fc9709a3	1268	* @brief Disable TXIS interrupt.
AnnaBridge	189:f392fc9709a3	1269	* @rmtoll CR1 TXIE LL_I2C_DisableIT_TX
AnnaBridge	189:f392fc9709a3	1270	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1271	* @retval None
AnnaBridge	189:f392fc9709a3	1272	*/
AnnaBridge	189:f392fc9709a3	1273	__STATIC_INLINE void LL_I2C_DisableIT_TX(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1274	{
AnnaBridge	189:f392fc9709a3	1275	CLEAR_BIT(I2Cx->CR1, I2C_CR1_TXIE);
AnnaBridge	189:f392fc9709a3	1276	}
AnnaBridge	189:f392fc9709a3	1277
AnnaBridge	189:f392fc9709a3	1278	/**
AnnaBridge	189:f392fc9709a3	1279	* @brief Check if the TXIS Interrupt is enabled or disabled.
AnnaBridge	189:f392fc9709a3	1280	* @rmtoll CR1 TXIE LL_I2C_IsEnabledIT_TX
AnnaBridge	189:f392fc9709a3	1281	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1282	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1283	*/
AnnaBridge	189:f392fc9709a3	1284	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_TX(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1285	{
AnnaBridge	189:f392fc9709a3	1286	return (READ_BIT(I2Cx->CR1, I2C_CR1_TXIE) == (I2C_CR1_TXIE));
AnnaBridge	189:f392fc9709a3	1287	}
AnnaBridge	189:f392fc9709a3	1288
AnnaBridge	189:f392fc9709a3	1289	/**
AnnaBridge	189:f392fc9709a3	1290	* @brief Enable RXNE interrupt.
AnnaBridge	189:f392fc9709a3	1291	* @rmtoll CR1 RXIE LL_I2C_EnableIT_RX
AnnaBridge	189:f392fc9709a3	1292	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1293	* @retval None
AnnaBridge	189:f392fc9709a3	1294	*/
AnnaBridge	189:f392fc9709a3	1295	__STATIC_INLINE void LL_I2C_EnableIT_RX(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1296	{
AnnaBridge	189:f392fc9709a3	1297	SET_BIT(I2Cx->CR1, I2C_CR1_RXIE);
AnnaBridge	189:f392fc9709a3	1298	}
AnnaBridge	189:f392fc9709a3	1299
AnnaBridge	189:f392fc9709a3	1300	/**
AnnaBridge	189:f392fc9709a3	1301	* @brief Disable RXNE interrupt.
AnnaBridge	189:f392fc9709a3	1302	* @rmtoll CR1 RXIE LL_I2C_DisableIT_RX
AnnaBridge	189:f392fc9709a3	1303	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1304	* @retval None
AnnaBridge	189:f392fc9709a3	1305	*/
AnnaBridge	189:f392fc9709a3	1306	__STATIC_INLINE void LL_I2C_DisableIT_RX(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1307	{
AnnaBridge	189:f392fc9709a3	1308	CLEAR_BIT(I2Cx->CR1, I2C_CR1_RXIE);
AnnaBridge	189:f392fc9709a3	1309	}
AnnaBridge	189:f392fc9709a3	1310
AnnaBridge	189:f392fc9709a3	1311	/**
AnnaBridge	189:f392fc9709a3	1312	* @brief Check if the RXNE Interrupt is enabled or disabled.
AnnaBridge	189:f392fc9709a3	1313	* @rmtoll CR1 RXIE LL_I2C_IsEnabledIT_RX
AnnaBridge	189:f392fc9709a3	1314	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1315	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1316	*/
AnnaBridge	189:f392fc9709a3	1317	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_RX(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1318	{
AnnaBridge	189:f392fc9709a3	1319	return (READ_BIT(I2Cx->CR1, I2C_CR1_RXIE) == (I2C_CR1_RXIE));
AnnaBridge	189:f392fc9709a3	1320	}
AnnaBridge	189:f392fc9709a3	1321
AnnaBridge	189:f392fc9709a3	1322	/**
AnnaBridge	189:f392fc9709a3	1323	* @brief Enable Address match interrupt (slave mode only).
AnnaBridge	189:f392fc9709a3	1324	* @rmtoll CR1 ADDRIE LL_I2C_EnableIT_ADDR
AnnaBridge	189:f392fc9709a3	1325	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1326	* @retval None
AnnaBridge	189:f392fc9709a3	1327	*/
AnnaBridge	189:f392fc9709a3	1328	__STATIC_INLINE void LL_I2C_EnableIT_ADDR(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1329	{
AnnaBridge	189:f392fc9709a3	1330	SET_BIT(I2Cx->CR1, I2C_CR1_ADDRIE);
AnnaBridge	189:f392fc9709a3	1331	}
AnnaBridge	189:f392fc9709a3	1332
AnnaBridge	189:f392fc9709a3	1333	/**
AnnaBridge	189:f392fc9709a3	1334	* @brief Disable Address match interrupt (slave mode only).
AnnaBridge	189:f392fc9709a3	1335	* @rmtoll CR1 ADDRIE LL_I2C_DisableIT_ADDR
AnnaBridge	189:f392fc9709a3	1336	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1337	* @retval None
AnnaBridge	189:f392fc9709a3	1338	*/
AnnaBridge	189:f392fc9709a3	1339	__STATIC_INLINE void LL_I2C_DisableIT_ADDR(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1340	{
AnnaBridge	189:f392fc9709a3	1341	CLEAR_BIT(I2Cx->CR1, I2C_CR1_ADDRIE);
AnnaBridge	189:f392fc9709a3	1342	}
AnnaBridge	189:f392fc9709a3	1343
AnnaBridge	189:f392fc9709a3	1344	/**
AnnaBridge	189:f392fc9709a3	1345	* @brief Check if Address match interrupt is enabled or disabled.
AnnaBridge	189:f392fc9709a3	1346	* @rmtoll CR1 ADDRIE LL_I2C_IsEnabledIT_ADDR
AnnaBridge	189:f392fc9709a3	1347	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1348	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1349	*/
AnnaBridge	189:f392fc9709a3	1350	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_ADDR(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1351	{
AnnaBridge	189:f392fc9709a3	1352	return (READ_BIT(I2Cx->CR1, I2C_CR1_ADDRIE) == (I2C_CR1_ADDRIE));
AnnaBridge	189:f392fc9709a3	1353	}
AnnaBridge	189:f392fc9709a3	1354
AnnaBridge	189:f392fc9709a3	1355	/**
AnnaBridge	189:f392fc9709a3	1356	* @brief Enable Not acknowledge received interrupt.
AnnaBridge	189:f392fc9709a3	1357	* @rmtoll CR1 NACKIE LL_I2C_EnableIT_NACK
AnnaBridge	189:f392fc9709a3	1358	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1359	* @retval None
AnnaBridge	189:f392fc9709a3	1360	*/
AnnaBridge	189:f392fc9709a3	1361	__STATIC_INLINE void LL_I2C_EnableIT_NACK(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1362	{
AnnaBridge	189:f392fc9709a3	1363	SET_BIT(I2Cx->CR1, I2C_CR1_NACKIE);
AnnaBridge	189:f392fc9709a3	1364	}
AnnaBridge	189:f392fc9709a3	1365
AnnaBridge	189:f392fc9709a3	1366	/**
AnnaBridge	189:f392fc9709a3	1367	* @brief Disable Not acknowledge received interrupt.
AnnaBridge	189:f392fc9709a3	1368	* @rmtoll CR1 NACKIE LL_I2C_DisableIT_NACK
AnnaBridge	189:f392fc9709a3	1369	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1370	* @retval None
AnnaBridge	189:f392fc9709a3	1371	*/
AnnaBridge	189:f392fc9709a3	1372	__STATIC_INLINE void LL_I2C_DisableIT_NACK(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1373	{
AnnaBridge	189:f392fc9709a3	1374	CLEAR_BIT(I2Cx->CR1, I2C_CR1_NACKIE);
AnnaBridge	189:f392fc9709a3	1375	}
AnnaBridge	189:f392fc9709a3	1376
AnnaBridge	189:f392fc9709a3	1377	/**
AnnaBridge	189:f392fc9709a3	1378	* @brief Check if Not acknowledge received interrupt is enabled or disabled.
AnnaBridge	189:f392fc9709a3	1379	* @rmtoll CR1 NACKIE LL_I2C_IsEnabledIT_NACK
AnnaBridge	189:f392fc9709a3	1380	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1381	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1382	*/
AnnaBridge	189:f392fc9709a3	1383	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_NACK(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1384	{
AnnaBridge	189:f392fc9709a3	1385	return (READ_BIT(I2Cx->CR1, I2C_CR1_NACKIE) == (I2C_CR1_NACKIE));
AnnaBridge	189:f392fc9709a3	1386	}
AnnaBridge	189:f392fc9709a3	1387
AnnaBridge	189:f392fc9709a3	1388	/**
AnnaBridge	189:f392fc9709a3	1389	* @brief Enable STOP detection interrupt.
AnnaBridge	189:f392fc9709a3	1390	* @rmtoll CR1 STOPIE LL_I2C_EnableIT_STOP
AnnaBridge	189:f392fc9709a3	1391	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1392	* @retval None
AnnaBridge	189:f392fc9709a3	1393	*/
AnnaBridge	189:f392fc9709a3	1394	__STATIC_INLINE void LL_I2C_EnableIT_STOP(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1395	{
AnnaBridge	189:f392fc9709a3	1396	SET_BIT(I2Cx->CR1, I2C_CR1_STOPIE);
AnnaBridge	189:f392fc9709a3	1397	}
AnnaBridge	189:f392fc9709a3	1398
AnnaBridge	189:f392fc9709a3	1399	/**
AnnaBridge	189:f392fc9709a3	1400	* @brief Disable STOP detection interrupt.
AnnaBridge	189:f392fc9709a3	1401	* @rmtoll CR1 STOPIE LL_I2C_DisableIT_STOP
AnnaBridge	189:f392fc9709a3	1402	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1403	* @retval None
AnnaBridge	189:f392fc9709a3	1404	*/
AnnaBridge	189:f392fc9709a3	1405	__STATIC_INLINE void LL_I2C_DisableIT_STOP(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1406	{
AnnaBridge	189:f392fc9709a3	1407	CLEAR_BIT(I2Cx->CR1, I2C_CR1_STOPIE);
AnnaBridge	189:f392fc9709a3	1408	}
AnnaBridge	189:f392fc9709a3	1409
AnnaBridge	189:f392fc9709a3	1410	/**
AnnaBridge	189:f392fc9709a3	1411	* @brief Check if STOP detection interrupt is enabled or disabled.
AnnaBridge	189:f392fc9709a3	1412	* @rmtoll CR1 STOPIE LL_I2C_IsEnabledIT_STOP
AnnaBridge	189:f392fc9709a3	1413	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1414	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1415	*/
AnnaBridge	189:f392fc9709a3	1416	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_STOP(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1417	{
AnnaBridge	189:f392fc9709a3	1418	return (READ_BIT(I2Cx->CR1, I2C_CR1_STOPIE) == (I2C_CR1_STOPIE));
AnnaBridge	189:f392fc9709a3	1419	}
AnnaBridge	189:f392fc9709a3	1420
AnnaBridge	189:f392fc9709a3	1421	/**
AnnaBridge	189:f392fc9709a3	1422	* @brief Enable Transfer Complete interrupt.
AnnaBridge	189:f392fc9709a3	1423	* @note Any of these events will generate interrupt :
AnnaBridge	189:f392fc9709a3	1424	* Transfer Complete (TC)
AnnaBridge	189:f392fc9709a3	1425	* Transfer Complete Reload (TCR)
AnnaBridge	189:f392fc9709a3	1426	* @rmtoll CR1 TCIE LL_I2C_EnableIT_TC
AnnaBridge	189:f392fc9709a3	1427	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1428	* @retval None
AnnaBridge	189:f392fc9709a3	1429	*/
AnnaBridge	189:f392fc9709a3	1430	__STATIC_INLINE void LL_I2C_EnableIT_TC(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1431	{
AnnaBridge	189:f392fc9709a3	1432	SET_BIT(I2Cx->CR1, I2C_CR1_TCIE);
AnnaBridge	189:f392fc9709a3	1433	}
AnnaBridge	189:f392fc9709a3	1434
AnnaBridge	189:f392fc9709a3	1435	/**
AnnaBridge	189:f392fc9709a3	1436	* @brief Disable Transfer Complete interrupt.
AnnaBridge	189:f392fc9709a3	1437	* @note Any of these events will generate interrupt :
AnnaBridge	189:f392fc9709a3	1438	* Transfer Complete (TC)
AnnaBridge	189:f392fc9709a3	1439	* Transfer Complete Reload (TCR)
AnnaBridge	189:f392fc9709a3	1440	* @rmtoll CR1 TCIE LL_I2C_DisableIT_TC
AnnaBridge	189:f392fc9709a3	1441	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1442	* @retval None
AnnaBridge	189:f392fc9709a3	1443	*/
AnnaBridge	189:f392fc9709a3	1444	__STATIC_INLINE void LL_I2C_DisableIT_TC(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1445	{
AnnaBridge	189:f392fc9709a3	1446	CLEAR_BIT(I2Cx->CR1, I2C_CR1_TCIE);
AnnaBridge	189:f392fc9709a3	1447	}
AnnaBridge	189:f392fc9709a3	1448
AnnaBridge	189:f392fc9709a3	1449	/**
AnnaBridge	189:f392fc9709a3	1450	* @brief Check if Transfer Complete interrupt is enabled or disabled.
AnnaBridge	189:f392fc9709a3	1451	* @rmtoll CR1 TCIE LL_I2C_IsEnabledIT_TC
AnnaBridge	189:f392fc9709a3	1452	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1453	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1454	*/
AnnaBridge	189:f392fc9709a3	1455	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_TC(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1456	{
AnnaBridge	189:f392fc9709a3	1457	return (READ_BIT(I2Cx->CR1, I2C_CR1_TCIE) == (I2C_CR1_TCIE));
AnnaBridge	189:f392fc9709a3	1458	}
AnnaBridge	189:f392fc9709a3	1459
AnnaBridge	189:f392fc9709a3	1460	/**
AnnaBridge	189:f392fc9709a3	1461	* @brief Enable Error interrupts.
AnnaBridge	189:f392fc9709a3	1462	* @note Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1463	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1464	* @note Any of these errors will generate interrupt :
AnnaBridge	189:f392fc9709a3	1465	* Arbitration Loss (ARLO)
AnnaBridge	189:f392fc9709a3	1466	* Bus Error detection (BERR)
AnnaBridge	189:f392fc9709a3	1467	* Overrun/Underrun (OVR)
AnnaBridge	189:f392fc9709a3	1468	* SMBus Timeout detection (TIMEOUT)
AnnaBridge	189:f392fc9709a3	1469	* SMBus PEC error detection (PECERR)
AnnaBridge	189:f392fc9709a3	1470	* SMBus Alert pin event detection (ALERT)
AnnaBridge	189:f392fc9709a3	1471	* @rmtoll CR1 ERRIE LL_I2C_EnableIT_ERR
AnnaBridge	189:f392fc9709a3	1472	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1473	* @retval None
AnnaBridge	189:f392fc9709a3	1474	*/
AnnaBridge	189:f392fc9709a3	1475	__STATIC_INLINE void LL_I2C_EnableIT_ERR(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1476	{
AnnaBridge	189:f392fc9709a3	1477	SET_BIT(I2Cx->CR1, I2C_CR1_ERRIE);
AnnaBridge	189:f392fc9709a3	1478	}
AnnaBridge	189:f392fc9709a3	1479
AnnaBridge	189:f392fc9709a3	1480	/**
AnnaBridge	189:f392fc9709a3	1481	* @brief Disable Error interrupts.
AnnaBridge	189:f392fc9709a3	1482	* @note Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1483	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1484	* @note Any of these errors will generate interrupt :
AnnaBridge	189:f392fc9709a3	1485	* Arbitration Loss (ARLO)
AnnaBridge	189:f392fc9709a3	1486	* Bus Error detection (BERR)
AnnaBridge	189:f392fc9709a3	1487	* Overrun/Underrun (OVR)
AnnaBridge	189:f392fc9709a3	1488	* SMBus Timeout detection (TIMEOUT)
AnnaBridge	189:f392fc9709a3	1489	* SMBus PEC error detection (PECERR)
AnnaBridge	189:f392fc9709a3	1490	* SMBus Alert pin event detection (ALERT)
AnnaBridge	189:f392fc9709a3	1491	* @rmtoll CR1 ERRIE LL_I2C_DisableIT_ERR
AnnaBridge	189:f392fc9709a3	1492	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1493	* @retval None
AnnaBridge	189:f392fc9709a3	1494	*/
AnnaBridge	189:f392fc9709a3	1495	__STATIC_INLINE void LL_I2C_DisableIT_ERR(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1496	{
AnnaBridge	189:f392fc9709a3	1497	CLEAR_BIT(I2Cx->CR1, I2C_CR1_ERRIE);
AnnaBridge	189:f392fc9709a3	1498	}
AnnaBridge	189:f392fc9709a3	1499
AnnaBridge	189:f392fc9709a3	1500	/**
AnnaBridge	189:f392fc9709a3	1501	* @brief Check if Error interrupts are enabled or disabled.
AnnaBridge	189:f392fc9709a3	1502	* @rmtoll CR1 ERRIE LL_I2C_IsEnabledIT_ERR
AnnaBridge	189:f392fc9709a3	1503	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1504	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1505	*/
AnnaBridge	189:f392fc9709a3	1506	__STATIC_INLINE uint32_t LL_I2C_IsEnabledIT_ERR(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1507	{
AnnaBridge	189:f392fc9709a3	1508	return (READ_BIT(I2Cx->CR1, I2C_CR1_ERRIE) == (I2C_CR1_ERRIE));
AnnaBridge	189:f392fc9709a3	1509	}
AnnaBridge	189:f392fc9709a3	1510
AnnaBridge	189:f392fc9709a3	1511	/**
AnnaBridge	189:f392fc9709a3	1512	* @}
AnnaBridge	189:f392fc9709a3	1513	*/
AnnaBridge	189:f392fc9709a3	1514
AnnaBridge	189:f392fc9709a3	1515	/** @defgroup I2C_LL_EF_FLAG_management FLAG_management
AnnaBridge	189:f392fc9709a3	1516	* @{
AnnaBridge	189:f392fc9709a3	1517	*/
AnnaBridge	189:f392fc9709a3	1518
AnnaBridge	189:f392fc9709a3	1519	/**
AnnaBridge	189:f392fc9709a3	1520	* @brief Indicate the status of Transmit data register empty flag.
AnnaBridge	189:f392fc9709a3	1521	* @note RESET: When next data is written in Transmit data register.
AnnaBridge	189:f392fc9709a3	1522	* SET: When Transmit data register is empty.
AnnaBridge	189:f392fc9709a3	1523	* @rmtoll ISR TXE LL_I2C_IsActiveFlag_TXE
AnnaBridge	189:f392fc9709a3	1524	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1525	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1526	*/
AnnaBridge	189:f392fc9709a3	1527	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TXE(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1528	{
AnnaBridge	189:f392fc9709a3	1529	return (READ_BIT(I2Cx->ISR, I2C_ISR_TXE) == (I2C_ISR_TXE));
AnnaBridge	189:f392fc9709a3	1530	}
AnnaBridge	189:f392fc9709a3	1531
AnnaBridge	189:f392fc9709a3	1532	/**
AnnaBridge	189:f392fc9709a3	1533	* @brief Indicate the status of Transmit interrupt flag.
AnnaBridge	189:f392fc9709a3	1534	* @note RESET: When next data is written in Transmit data register.
AnnaBridge	189:f392fc9709a3	1535	* SET: When Transmit data register is empty.
AnnaBridge	189:f392fc9709a3	1536	* @rmtoll ISR TXIS LL_I2C_IsActiveFlag_TXIS
AnnaBridge	189:f392fc9709a3	1537	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1538	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1539	*/
AnnaBridge	189:f392fc9709a3	1540	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TXIS(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1541	{
AnnaBridge	189:f392fc9709a3	1542	return (READ_BIT(I2Cx->ISR, I2C_ISR_TXIS) == (I2C_ISR_TXIS));
AnnaBridge	189:f392fc9709a3	1543	}
AnnaBridge	189:f392fc9709a3	1544
AnnaBridge	189:f392fc9709a3	1545	/**
AnnaBridge	189:f392fc9709a3	1546	* @brief Indicate the status of Receive data register not empty flag.
AnnaBridge	189:f392fc9709a3	1547	* @note RESET: When Receive data register is read.
AnnaBridge	189:f392fc9709a3	1548	* SET: When the received data is copied in Receive data register.
AnnaBridge	189:f392fc9709a3	1549	* @rmtoll ISR RXNE LL_I2C_IsActiveFlag_RXNE
AnnaBridge	189:f392fc9709a3	1550	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1551	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1552	*/
AnnaBridge	189:f392fc9709a3	1553	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_RXNE(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1554	{
AnnaBridge	189:f392fc9709a3	1555	return (READ_BIT(I2Cx->ISR, I2C_ISR_RXNE) == (I2C_ISR_RXNE));
AnnaBridge	189:f392fc9709a3	1556	}
AnnaBridge	189:f392fc9709a3	1557
AnnaBridge	189:f392fc9709a3	1558	/**
AnnaBridge	189:f392fc9709a3	1559	* @brief Indicate the status of Address matched flag (slave mode).
AnnaBridge	189:f392fc9709a3	1560	* @note RESET: Clear default value.
AnnaBridge	189:f392fc9709a3	1561	* SET: When the received slave address matched with one of the enabled slave address.
AnnaBridge	189:f392fc9709a3	1562	* @rmtoll ISR ADDR LL_I2C_IsActiveFlag_ADDR
AnnaBridge	189:f392fc9709a3	1563	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1564	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1565	*/
AnnaBridge	189:f392fc9709a3	1566	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_ADDR(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1567	{
AnnaBridge	189:f392fc9709a3	1568	return (READ_BIT(I2Cx->ISR, I2C_ISR_ADDR) == (I2C_ISR_ADDR));
AnnaBridge	189:f392fc9709a3	1569	}
AnnaBridge	189:f392fc9709a3	1570
AnnaBridge	189:f392fc9709a3	1571	/**
AnnaBridge	189:f392fc9709a3	1572	* @brief Indicate the status of Not Acknowledge received flag.
AnnaBridge	189:f392fc9709a3	1573	* @note RESET: Clear default value.
AnnaBridge	189:f392fc9709a3	1574	* SET: When a NACK is received after a byte transmission.
AnnaBridge	189:f392fc9709a3	1575	* @rmtoll ISR NACKF LL_I2C_IsActiveFlag_NACK
AnnaBridge	189:f392fc9709a3	1576	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1577	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1578	*/
AnnaBridge	189:f392fc9709a3	1579	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_NACK(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1580	{
AnnaBridge	189:f392fc9709a3	1581	return (READ_BIT(I2Cx->ISR, I2C_ISR_NACKF) == (I2C_ISR_NACKF));
AnnaBridge	189:f392fc9709a3	1582	}
AnnaBridge	189:f392fc9709a3	1583
AnnaBridge	189:f392fc9709a3	1584	/**
AnnaBridge	189:f392fc9709a3	1585	* @brief Indicate the status of Stop detection flag.
AnnaBridge	189:f392fc9709a3	1586	* @note RESET: Clear default value.
AnnaBridge	189:f392fc9709a3	1587	* SET: When a Stop condition is detected.
AnnaBridge	189:f392fc9709a3	1588	* @rmtoll ISR STOPF LL_I2C_IsActiveFlag_STOP
AnnaBridge	189:f392fc9709a3	1589	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1590	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1591	*/
AnnaBridge	189:f392fc9709a3	1592	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_STOP(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1593	{
AnnaBridge	189:f392fc9709a3	1594	return (READ_BIT(I2Cx->ISR, I2C_ISR_STOPF) == (I2C_ISR_STOPF));
AnnaBridge	189:f392fc9709a3	1595	}
AnnaBridge	189:f392fc9709a3	1596
AnnaBridge	189:f392fc9709a3	1597	/**
AnnaBridge	189:f392fc9709a3	1598	* @brief Indicate the status of Transfer complete flag (master mode).
AnnaBridge	189:f392fc9709a3	1599	* @note RESET: Clear default value.
AnnaBridge	189:f392fc9709a3	1600	* SET: When RELOAD=0, AUTOEND=0 and NBYTES date have been transferred.
AnnaBridge	189:f392fc9709a3	1601	* @rmtoll ISR TC LL_I2C_IsActiveFlag_TC
AnnaBridge	189:f392fc9709a3	1602	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1603	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1604	*/
AnnaBridge	189:f392fc9709a3	1605	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TC(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1606	{
AnnaBridge	189:f392fc9709a3	1607	return (READ_BIT(I2Cx->ISR, I2C_ISR_TC) == (I2C_ISR_TC));
AnnaBridge	189:f392fc9709a3	1608	}
AnnaBridge	189:f392fc9709a3	1609
AnnaBridge	189:f392fc9709a3	1610	/**
AnnaBridge	189:f392fc9709a3	1611	* @brief Indicate the status of Transfer complete flag (master mode).
AnnaBridge	189:f392fc9709a3	1612	* @note RESET: Clear default value.
AnnaBridge	189:f392fc9709a3	1613	* SET: When RELOAD=1 and NBYTES date have been transferred.
AnnaBridge	189:f392fc9709a3	1614	* @rmtoll ISR TCR LL_I2C_IsActiveFlag_TCR
AnnaBridge	189:f392fc9709a3	1615	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1616	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1617	*/
AnnaBridge	189:f392fc9709a3	1618	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_TCR(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1619	{
AnnaBridge	189:f392fc9709a3	1620	return (READ_BIT(I2Cx->ISR, I2C_ISR_TCR) == (I2C_ISR_TCR));
AnnaBridge	189:f392fc9709a3	1621	}
AnnaBridge	189:f392fc9709a3	1622
AnnaBridge	189:f392fc9709a3	1623	/**
AnnaBridge	189:f392fc9709a3	1624	* @brief Indicate the status of Bus error flag.
AnnaBridge	189:f392fc9709a3	1625	* @note RESET: Clear default value.
AnnaBridge	189:f392fc9709a3	1626	* SET: When a misplaced Start or Stop condition is detected.
AnnaBridge	189:f392fc9709a3	1627	* @rmtoll ISR BERR LL_I2C_IsActiveFlag_BERR
AnnaBridge	189:f392fc9709a3	1628	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1629	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1630	*/
AnnaBridge	189:f392fc9709a3	1631	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_BERR(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1632	{
AnnaBridge	189:f392fc9709a3	1633	return (READ_BIT(I2Cx->ISR, I2C_ISR_BERR) == (I2C_ISR_BERR));
AnnaBridge	189:f392fc9709a3	1634	}
AnnaBridge	189:f392fc9709a3	1635
AnnaBridge	189:f392fc9709a3	1636	/**
AnnaBridge	189:f392fc9709a3	1637	* @brief Indicate the status of Arbitration lost flag.
AnnaBridge	189:f392fc9709a3	1638	* @note RESET: Clear default value.
AnnaBridge	189:f392fc9709a3	1639	* SET: When arbitration lost.
AnnaBridge	189:f392fc9709a3	1640	* @rmtoll ISR ARLO LL_I2C_IsActiveFlag_ARLO
AnnaBridge	189:f392fc9709a3	1641	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1642	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1643	*/
AnnaBridge	189:f392fc9709a3	1644	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_ARLO(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1645	{
AnnaBridge	189:f392fc9709a3	1646	return (READ_BIT(I2Cx->ISR, I2C_ISR_ARLO) == (I2C_ISR_ARLO));
AnnaBridge	189:f392fc9709a3	1647	}
AnnaBridge	189:f392fc9709a3	1648
AnnaBridge	189:f392fc9709a3	1649	/**
AnnaBridge	189:f392fc9709a3	1650	* @brief Indicate the status of Overrun/Underrun flag (slave mode).
AnnaBridge	189:f392fc9709a3	1651	* @note RESET: Clear default value.
AnnaBridge	189:f392fc9709a3	1652	* SET: When an overrun/underrun error occurs (Clock Stretching Disabled).
AnnaBridge	189:f392fc9709a3	1653	* @rmtoll ISR OVR LL_I2C_IsActiveFlag_OVR
AnnaBridge	189:f392fc9709a3	1654	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1655	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1656	*/
AnnaBridge	189:f392fc9709a3	1657	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_OVR(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1658	{
AnnaBridge	189:f392fc9709a3	1659	return (READ_BIT(I2Cx->ISR, I2C_ISR_OVR) == (I2C_ISR_OVR));
AnnaBridge	189:f392fc9709a3	1660	}
AnnaBridge	189:f392fc9709a3	1661
AnnaBridge	189:f392fc9709a3	1662	/**
AnnaBridge	189:f392fc9709a3	1663	* @brief Indicate the status of SMBus PEC error flag in reception.
AnnaBridge	189:f392fc9709a3	1664	* @note Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1665	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1666	* @note RESET: Clear default value.
AnnaBridge	189:f392fc9709a3	1667	* SET: When the received PEC does not match with the PEC register content.
AnnaBridge	189:f392fc9709a3	1668	* @rmtoll ISR PECERR LL_I2C_IsActiveSMBusFlag_PECERR
AnnaBridge	189:f392fc9709a3	1669	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1670	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1671	*/
AnnaBridge	189:f392fc9709a3	1672	__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_PECERR(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1673	{
AnnaBridge	189:f392fc9709a3	1674	return (READ_BIT(I2Cx->ISR, I2C_ISR_PECERR) == (I2C_ISR_PECERR));
AnnaBridge	189:f392fc9709a3	1675	}
AnnaBridge	189:f392fc9709a3	1676
AnnaBridge	189:f392fc9709a3	1677	/**
AnnaBridge	189:f392fc9709a3	1678	* @brief Indicate the status of SMBus Timeout detection flag.
AnnaBridge	189:f392fc9709a3	1679	* @note Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1680	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1681	* @note RESET: Clear default value.
AnnaBridge	189:f392fc9709a3	1682	* SET: When a timeout or extended clock timeout occurs.
AnnaBridge	189:f392fc9709a3	1683	* @rmtoll ISR TIMEOUT LL_I2C_IsActiveSMBusFlag_TIMEOUT
AnnaBridge	189:f392fc9709a3	1684	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1685	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1686	*/
AnnaBridge	189:f392fc9709a3	1687	__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1688	{
AnnaBridge	189:f392fc9709a3	1689	return (READ_BIT(I2Cx->ISR, I2C_ISR_TIMEOUT) == (I2C_ISR_TIMEOUT));
AnnaBridge	189:f392fc9709a3	1690	}
AnnaBridge	189:f392fc9709a3	1691
AnnaBridge	189:f392fc9709a3	1692	/**
AnnaBridge	189:f392fc9709a3	1693	* @brief Indicate the status of SMBus alert flag.
AnnaBridge	189:f392fc9709a3	1694	* @note Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1695	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1696	* @note RESET: Clear default value.
AnnaBridge	189:f392fc9709a3	1697	* SET: When SMBus host configuration, SMBus alert enabled and
AnnaBridge	189:f392fc9709a3	1698	* a falling edge event occurs on SMBA pin.
AnnaBridge	189:f392fc9709a3	1699	* @rmtoll ISR ALERT LL_I2C_IsActiveSMBusFlag_ALERT
AnnaBridge	189:f392fc9709a3	1700	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1701	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1702	*/
AnnaBridge	189:f392fc9709a3	1703	__STATIC_INLINE uint32_t LL_I2C_IsActiveSMBusFlag_ALERT(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1704	{
AnnaBridge	189:f392fc9709a3	1705	return (READ_BIT(I2Cx->ISR, I2C_ISR_ALERT) == (I2C_ISR_ALERT));
AnnaBridge	189:f392fc9709a3	1706	}
AnnaBridge	189:f392fc9709a3	1707
AnnaBridge	189:f392fc9709a3	1708	/**
AnnaBridge	189:f392fc9709a3	1709	* @brief Indicate the status of Bus Busy flag.
AnnaBridge	189:f392fc9709a3	1710	* @note RESET: Clear default value.
AnnaBridge	189:f392fc9709a3	1711	* SET: When a Start condition is detected.
AnnaBridge	189:f392fc9709a3	1712	* @rmtoll ISR BUSY LL_I2C_IsActiveFlag_BUSY
AnnaBridge	189:f392fc9709a3	1713	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1714	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1715	*/
AnnaBridge	189:f392fc9709a3	1716	__STATIC_INLINE uint32_t LL_I2C_IsActiveFlag_BUSY(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1717	{
AnnaBridge	189:f392fc9709a3	1718	return (READ_BIT(I2Cx->ISR, I2C_ISR_BUSY) == (I2C_ISR_BUSY));
AnnaBridge	189:f392fc9709a3	1719	}
AnnaBridge	189:f392fc9709a3	1720
AnnaBridge	189:f392fc9709a3	1721	/**
AnnaBridge	189:f392fc9709a3	1722	* @brief Clear Address Matched flag.
AnnaBridge	189:f392fc9709a3	1723	* @rmtoll ICR ADDRCF LL_I2C_ClearFlag_ADDR
AnnaBridge	189:f392fc9709a3	1724	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1725	* @retval None
AnnaBridge	189:f392fc9709a3	1726	*/
AnnaBridge	189:f392fc9709a3	1727	__STATIC_INLINE void LL_I2C_ClearFlag_ADDR(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1728	{
AnnaBridge	189:f392fc9709a3	1729	SET_BIT(I2Cx->ICR, I2C_ICR_ADDRCF);
AnnaBridge	189:f392fc9709a3	1730	}
AnnaBridge	189:f392fc9709a3	1731
AnnaBridge	189:f392fc9709a3	1732	/**
AnnaBridge	189:f392fc9709a3	1733	* @brief Clear Not Acknowledge flag.
AnnaBridge	189:f392fc9709a3	1734	* @rmtoll ICR NACKCF LL_I2C_ClearFlag_NACK
AnnaBridge	189:f392fc9709a3	1735	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1736	* @retval None
AnnaBridge	189:f392fc9709a3	1737	*/
AnnaBridge	189:f392fc9709a3	1738	__STATIC_INLINE void LL_I2C_ClearFlag_NACK(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1739	{
AnnaBridge	189:f392fc9709a3	1740	SET_BIT(I2Cx->ICR, I2C_ICR_NACKCF);
AnnaBridge	189:f392fc9709a3	1741	}
AnnaBridge	189:f392fc9709a3	1742
AnnaBridge	189:f392fc9709a3	1743	/**
AnnaBridge	189:f392fc9709a3	1744	* @brief Clear Stop detection flag.
AnnaBridge	189:f392fc9709a3	1745	* @rmtoll ICR STOPCF LL_I2C_ClearFlag_STOP
AnnaBridge	189:f392fc9709a3	1746	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1747	* @retval None
AnnaBridge	189:f392fc9709a3	1748	*/
AnnaBridge	189:f392fc9709a3	1749	__STATIC_INLINE void LL_I2C_ClearFlag_STOP(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1750	{
AnnaBridge	189:f392fc9709a3	1751	SET_BIT(I2Cx->ICR, I2C_ICR_STOPCF);
AnnaBridge	189:f392fc9709a3	1752	}
AnnaBridge	189:f392fc9709a3	1753
AnnaBridge	189:f392fc9709a3	1754	/**
AnnaBridge	189:f392fc9709a3	1755	* @brief Clear Transmit data register empty flag (TXE).
AnnaBridge	189:f392fc9709a3	1756	* @note This bit can be clear by software in order to flush the transmit data register (TXDR).
AnnaBridge	189:f392fc9709a3	1757	* @rmtoll ISR TXE LL_I2C_ClearFlag_TXE
AnnaBridge	189:f392fc9709a3	1758	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1759	* @retval None
AnnaBridge	189:f392fc9709a3	1760	*/
AnnaBridge	189:f392fc9709a3	1761	__STATIC_INLINE void LL_I2C_ClearFlag_TXE(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1762	{
AnnaBridge	189:f392fc9709a3	1763	WRITE_REG(I2Cx->ISR, I2C_ISR_TXE);
AnnaBridge	189:f392fc9709a3	1764	}
AnnaBridge	189:f392fc9709a3	1765
AnnaBridge	189:f392fc9709a3	1766	/**
AnnaBridge	189:f392fc9709a3	1767	* @brief Clear Bus error flag.
AnnaBridge	189:f392fc9709a3	1768	* @rmtoll ICR BERRCF LL_I2C_ClearFlag_BERR
AnnaBridge	189:f392fc9709a3	1769	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1770	* @retval None
AnnaBridge	189:f392fc9709a3	1771	*/
AnnaBridge	189:f392fc9709a3	1772	__STATIC_INLINE void LL_I2C_ClearFlag_BERR(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1773	{
AnnaBridge	189:f392fc9709a3	1774	SET_BIT(I2Cx->ICR, I2C_ICR_BERRCF);
AnnaBridge	189:f392fc9709a3	1775	}
AnnaBridge	189:f392fc9709a3	1776
AnnaBridge	189:f392fc9709a3	1777	/**
AnnaBridge	189:f392fc9709a3	1778	* @brief Clear Arbitration lost flag.
AnnaBridge	189:f392fc9709a3	1779	* @rmtoll ICR ARLOCF LL_I2C_ClearFlag_ARLO
AnnaBridge	189:f392fc9709a3	1780	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1781	* @retval None
AnnaBridge	189:f392fc9709a3	1782	*/
AnnaBridge	189:f392fc9709a3	1783	__STATIC_INLINE void LL_I2C_ClearFlag_ARLO(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1784	{
AnnaBridge	189:f392fc9709a3	1785	SET_BIT(I2Cx->ICR, I2C_ICR_ARLOCF);
AnnaBridge	189:f392fc9709a3	1786	}
AnnaBridge	189:f392fc9709a3	1787
AnnaBridge	189:f392fc9709a3	1788	/**
AnnaBridge	189:f392fc9709a3	1789	* @brief Clear Overrun/Underrun flag.
AnnaBridge	189:f392fc9709a3	1790	* @rmtoll ICR OVRCF LL_I2C_ClearFlag_OVR
AnnaBridge	189:f392fc9709a3	1791	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1792	* @retval None
AnnaBridge	189:f392fc9709a3	1793	*/
AnnaBridge	189:f392fc9709a3	1794	__STATIC_INLINE void LL_I2C_ClearFlag_OVR(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1795	{
AnnaBridge	189:f392fc9709a3	1796	SET_BIT(I2Cx->ICR, I2C_ICR_OVRCF);
AnnaBridge	189:f392fc9709a3	1797	}
AnnaBridge	189:f392fc9709a3	1798
AnnaBridge	189:f392fc9709a3	1799	/**
AnnaBridge	189:f392fc9709a3	1800	* @brief Clear SMBus PEC error flag.
AnnaBridge	189:f392fc9709a3	1801	* @note Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1802	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1803	* @rmtoll ICR PECCF LL_I2C_ClearSMBusFlag_PECERR
AnnaBridge	189:f392fc9709a3	1804	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1805	* @retval None
AnnaBridge	189:f392fc9709a3	1806	*/
AnnaBridge	189:f392fc9709a3	1807	__STATIC_INLINE void LL_I2C_ClearSMBusFlag_PECERR(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1808	{
AnnaBridge	189:f392fc9709a3	1809	SET_BIT(I2Cx->ICR, I2C_ICR_PECCF);
AnnaBridge	189:f392fc9709a3	1810	}
AnnaBridge	189:f392fc9709a3	1811
AnnaBridge	189:f392fc9709a3	1812	/**
AnnaBridge	189:f392fc9709a3	1813	* @brief Clear SMBus Timeout detection flag.
AnnaBridge	189:f392fc9709a3	1814	* @note Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1815	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1816	* @rmtoll ICR TIMOUTCF LL_I2C_ClearSMBusFlag_TIMEOUT
AnnaBridge	189:f392fc9709a3	1817	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1818	* @retval None
AnnaBridge	189:f392fc9709a3	1819	*/
AnnaBridge	189:f392fc9709a3	1820	__STATIC_INLINE void LL_I2C_ClearSMBusFlag_TIMEOUT(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1821	{
AnnaBridge	189:f392fc9709a3	1822	SET_BIT(I2Cx->ICR, I2C_ICR_TIMOUTCF);
AnnaBridge	189:f392fc9709a3	1823	}
AnnaBridge	189:f392fc9709a3	1824
AnnaBridge	189:f392fc9709a3	1825	/**
AnnaBridge	189:f392fc9709a3	1826	* @brief Clear SMBus Alert flag.
AnnaBridge	189:f392fc9709a3	1827	* @note Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	1828	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	1829	* @rmtoll ICR ALERTCF LL_I2C_ClearSMBusFlag_ALERT
AnnaBridge	189:f392fc9709a3	1830	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1831	* @retval None
AnnaBridge	189:f392fc9709a3	1832	*/
AnnaBridge	189:f392fc9709a3	1833	__STATIC_INLINE void LL_I2C_ClearSMBusFlag_ALERT(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1834	{
AnnaBridge	189:f392fc9709a3	1835	SET_BIT(I2Cx->ICR, I2C_ICR_ALERTCF);
AnnaBridge	189:f392fc9709a3	1836	}
AnnaBridge	189:f392fc9709a3	1837
AnnaBridge	189:f392fc9709a3	1838	/**
AnnaBridge	189:f392fc9709a3	1839	* @}
AnnaBridge	189:f392fc9709a3	1840	*/
AnnaBridge	189:f392fc9709a3	1841
AnnaBridge	189:f392fc9709a3	1842	/** @defgroup I2C_LL_EF_Data_Management Data_Management
AnnaBridge	189:f392fc9709a3	1843	* @{
AnnaBridge	189:f392fc9709a3	1844	*/
AnnaBridge	189:f392fc9709a3	1845
AnnaBridge	189:f392fc9709a3	1846	/**
AnnaBridge	189:f392fc9709a3	1847	* @brief Enable automatic STOP condition generation (master mode).
AnnaBridge	189:f392fc9709a3	1848	* @note Automatic end mode : a STOP condition is automatically sent when NBYTES data are transferred.
AnnaBridge	189:f392fc9709a3	1849	* This bit has no effect in slave mode or when RELOAD bit is set.
AnnaBridge	189:f392fc9709a3	1850	* @rmtoll CR2 AUTOEND LL_I2C_EnableAutoEndMode
AnnaBridge	189:f392fc9709a3	1851	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1852	* @retval None
AnnaBridge	189:f392fc9709a3	1853	*/
AnnaBridge	189:f392fc9709a3	1854	__STATIC_INLINE void LL_I2C_EnableAutoEndMode(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1855	{
AnnaBridge	189:f392fc9709a3	1856	SET_BIT(I2Cx->CR2, I2C_CR2_AUTOEND);
AnnaBridge	189:f392fc9709a3	1857	}
AnnaBridge	189:f392fc9709a3	1858
AnnaBridge	189:f392fc9709a3	1859	/**
AnnaBridge	189:f392fc9709a3	1860	* @brief Disable automatic STOP condition generation (master mode).
AnnaBridge	189:f392fc9709a3	1861	* @note Software end mode : TC flag is set when NBYTES data are transferre, stretching SCL low.
AnnaBridge	189:f392fc9709a3	1862	* @rmtoll CR2 AUTOEND LL_I2C_DisableAutoEndMode
AnnaBridge	189:f392fc9709a3	1863	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1864	* @retval None
AnnaBridge	189:f392fc9709a3	1865	*/
AnnaBridge	189:f392fc9709a3	1866	__STATIC_INLINE void LL_I2C_DisableAutoEndMode(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1867	{
AnnaBridge	189:f392fc9709a3	1868	CLEAR_BIT(I2Cx->CR2, I2C_CR2_AUTOEND);
AnnaBridge	189:f392fc9709a3	1869	}
AnnaBridge	189:f392fc9709a3	1870
AnnaBridge	189:f392fc9709a3	1871	/**
AnnaBridge	189:f392fc9709a3	1872	* @brief Check if automatic STOP condition is enabled or disabled.
AnnaBridge	189:f392fc9709a3	1873	* @rmtoll CR2 AUTOEND LL_I2C_IsEnabledAutoEndMode
AnnaBridge	189:f392fc9709a3	1874	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1875	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1876	*/
AnnaBridge	189:f392fc9709a3	1877	__STATIC_INLINE uint32_t LL_I2C_IsEnabledAutoEndMode(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1878	{
AnnaBridge	189:f392fc9709a3	1879	return (READ_BIT(I2Cx->CR2, I2C_CR2_AUTOEND) == (I2C_CR2_AUTOEND));
AnnaBridge	189:f392fc9709a3	1880	}
AnnaBridge	189:f392fc9709a3	1881
AnnaBridge	189:f392fc9709a3	1882	/**
AnnaBridge	189:f392fc9709a3	1883	* @brief Enable reload mode (master mode).
AnnaBridge	189:f392fc9709a3	1884	* @note The transfer is not completed after the NBYTES data transfer, NBYTES will be reloaded when TCR flag is set.
AnnaBridge	189:f392fc9709a3	1885	* @rmtoll CR2 RELOAD LL_I2C_EnableReloadMode
AnnaBridge	189:f392fc9709a3	1886	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1887	* @retval None
AnnaBridge	189:f392fc9709a3	1888	*/
AnnaBridge	189:f392fc9709a3	1889	__STATIC_INLINE void LL_I2C_EnableReloadMode(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1890	{
AnnaBridge	189:f392fc9709a3	1891	SET_BIT(I2Cx->CR2, I2C_CR2_RELOAD);
AnnaBridge	189:f392fc9709a3	1892	}
AnnaBridge	189:f392fc9709a3	1893
AnnaBridge	189:f392fc9709a3	1894	/**
AnnaBridge	189:f392fc9709a3	1895	* @brief Disable reload mode (master mode).
AnnaBridge	189:f392fc9709a3	1896	* @note The transfer is completed after the NBYTES data transfer(STOP or RESTART will follow).
AnnaBridge	189:f392fc9709a3	1897	* @rmtoll CR2 RELOAD LL_I2C_DisableReloadMode
AnnaBridge	189:f392fc9709a3	1898	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1899	* @retval None
AnnaBridge	189:f392fc9709a3	1900	*/
AnnaBridge	189:f392fc9709a3	1901	__STATIC_INLINE void LL_I2C_DisableReloadMode(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1902	{
AnnaBridge	189:f392fc9709a3	1903	CLEAR_BIT(I2Cx->CR2, I2C_CR2_RELOAD);
AnnaBridge	189:f392fc9709a3	1904	}
AnnaBridge	189:f392fc9709a3	1905
AnnaBridge	189:f392fc9709a3	1906	/**
AnnaBridge	189:f392fc9709a3	1907	* @brief Check if reload mode is enabled or disabled.
AnnaBridge	189:f392fc9709a3	1908	* @rmtoll CR2 RELOAD LL_I2C_IsEnabledReloadMode
AnnaBridge	189:f392fc9709a3	1909	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1910	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	1911	*/
AnnaBridge	189:f392fc9709a3	1912	__STATIC_INLINE uint32_t LL_I2C_IsEnabledReloadMode(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1913	{
AnnaBridge	189:f392fc9709a3	1914	return (READ_BIT(I2Cx->CR2, I2C_CR2_RELOAD) == (I2C_CR2_RELOAD));
AnnaBridge	189:f392fc9709a3	1915	}
AnnaBridge	189:f392fc9709a3	1916
AnnaBridge	189:f392fc9709a3	1917	/**
AnnaBridge	189:f392fc9709a3	1918	* @brief Configure the number of bytes for transfer.
AnnaBridge	189:f392fc9709a3	1919	* @note Changing these bits when START bit is set is not allowed.
AnnaBridge	189:f392fc9709a3	1920	* @rmtoll CR2 NBYTES LL_I2C_SetTransferSize
AnnaBridge	189:f392fc9709a3	1921	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1922	* @param TransferSize This parameter must be a value between Min_Data=0x00 and Max_Data=0xFF.
AnnaBridge	189:f392fc9709a3	1923	* @retval None
AnnaBridge	189:f392fc9709a3	1924	*/
AnnaBridge	189:f392fc9709a3	1925	__STATIC_INLINE void LL_I2C_SetTransferSize(I2C_TypeDef *I2Cx, uint32_t TransferSize)
AnnaBridge	189:f392fc9709a3	1926	{
AnnaBridge	189:f392fc9709a3	1927	MODIFY_REG(I2Cx->CR2, I2C_CR2_NBYTES, TransferSize << I2C_CR2_NBYTES_Pos);
AnnaBridge	189:f392fc9709a3	1928	}
AnnaBridge	189:f392fc9709a3	1929
AnnaBridge	189:f392fc9709a3	1930	/**
AnnaBridge	189:f392fc9709a3	1931	* @brief Get the number of bytes configured for transfer.
AnnaBridge	189:f392fc9709a3	1932	* @rmtoll CR2 NBYTES LL_I2C_GetTransferSize
AnnaBridge	189:f392fc9709a3	1933	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1934	* @retval Value between Min_Data=0x0 and Max_Data=0xFF
AnnaBridge	189:f392fc9709a3	1935	*/
AnnaBridge	189:f392fc9709a3	1936	__STATIC_INLINE uint32_t LL_I2C_GetTransferSize(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1937	{
AnnaBridge	189:f392fc9709a3	1938	return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_NBYTES) >> I2C_CR2_NBYTES_Pos);
AnnaBridge	189:f392fc9709a3	1939	}
AnnaBridge	189:f392fc9709a3	1940
AnnaBridge	189:f392fc9709a3	1941	/**
AnnaBridge	189:f392fc9709a3	1942	* @brief Prepare the generation of a ACKnowledge or Non ACKnowledge condition after the address receive match code or next received byte.
AnnaBridge	189:f392fc9709a3	1943	* @note Usage in Slave mode only.
AnnaBridge	189:f392fc9709a3	1944	* @rmtoll CR2 NACK LL_I2C_AcknowledgeNextData
AnnaBridge	189:f392fc9709a3	1945	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1946	* @param TypeAcknowledge This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	1947	* @arg @ref LL_I2C_ACK
AnnaBridge	189:f392fc9709a3	1948	* @arg @ref LL_I2C_NACK
AnnaBridge	189:f392fc9709a3	1949	* @retval None
AnnaBridge	189:f392fc9709a3	1950	*/
AnnaBridge	189:f392fc9709a3	1951	__STATIC_INLINE void LL_I2C_AcknowledgeNextData(I2C_TypeDef *I2Cx, uint32_t TypeAcknowledge)
AnnaBridge	189:f392fc9709a3	1952	{
AnnaBridge	189:f392fc9709a3	1953	MODIFY_REG(I2Cx->CR2, I2C_CR2_NACK, TypeAcknowledge);
AnnaBridge	189:f392fc9709a3	1954	}
AnnaBridge	189:f392fc9709a3	1955
AnnaBridge	189:f392fc9709a3	1956	/**
AnnaBridge	189:f392fc9709a3	1957	* @brief Generate a START or RESTART condition
AnnaBridge	189:f392fc9709a3	1958	* @note The START bit can be set even if bus is BUSY or I2C is in slave mode.
AnnaBridge	189:f392fc9709a3	1959	* This action has no effect when RELOAD is set.
AnnaBridge	189:f392fc9709a3	1960	* @rmtoll CR2 START LL_I2C_GenerateStartCondition
AnnaBridge	189:f392fc9709a3	1961	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1962	* @retval None
AnnaBridge	189:f392fc9709a3	1963	*/
AnnaBridge	189:f392fc9709a3	1964	__STATIC_INLINE void LL_I2C_GenerateStartCondition(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1965	{
AnnaBridge	189:f392fc9709a3	1966	SET_BIT(I2Cx->CR2, I2C_CR2_START);
AnnaBridge	189:f392fc9709a3	1967	}
AnnaBridge	189:f392fc9709a3	1968
AnnaBridge	189:f392fc9709a3	1969	/**
AnnaBridge	189:f392fc9709a3	1970	* @brief Generate a STOP condition after the current byte transfer (master mode).
AnnaBridge	189:f392fc9709a3	1971	* @rmtoll CR2 STOP LL_I2C_GenerateStopCondition
AnnaBridge	189:f392fc9709a3	1972	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1973	* @retval None
AnnaBridge	189:f392fc9709a3	1974	*/
AnnaBridge	189:f392fc9709a3	1975	__STATIC_INLINE void LL_I2C_GenerateStopCondition(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1976	{
AnnaBridge	189:f392fc9709a3	1977	SET_BIT(I2Cx->CR2, I2C_CR2_STOP);
AnnaBridge	189:f392fc9709a3	1978	}
AnnaBridge	189:f392fc9709a3	1979
AnnaBridge	189:f392fc9709a3	1980	/**
AnnaBridge	189:f392fc9709a3	1981	* @brief Enable automatic RESTART Read request condition for 10bit address header (master mode).
AnnaBridge	189:f392fc9709a3	1982	* @note The master sends the complete 10bit slave address read sequence :
AnnaBridge	189:f392fc9709a3	1983	* Start + 2 bytes 10bit address in Write direction + Restart + first 7 bits of 10bit address in Read direction.
AnnaBridge	189:f392fc9709a3	1984	* @rmtoll CR2 HEAD10R LL_I2C_EnableAuto10BitRead
AnnaBridge	189:f392fc9709a3	1985	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1986	* @retval None
AnnaBridge	189:f392fc9709a3	1987	*/
AnnaBridge	189:f392fc9709a3	1988	__STATIC_INLINE void LL_I2C_EnableAuto10BitRead(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	1989	{
AnnaBridge	189:f392fc9709a3	1990	CLEAR_BIT(I2Cx->CR2, I2C_CR2_HEAD10R);
AnnaBridge	189:f392fc9709a3	1991	}
AnnaBridge	189:f392fc9709a3	1992
AnnaBridge	189:f392fc9709a3	1993	/**
AnnaBridge	189:f392fc9709a3	1994	* @brief Disable automatic RESTART Read request condition for 10bit address header (master mode).
AnnaBridge	189:f392fc9709a3	1995	* @note The master only sends the first 7 bits of 10bit address in Read direction.
AnnaBridge	189:f392fc9709a3	1996	* @rmtoll CR2 HEAD10R LL_I2C_DisableAuto10BitRead
AnnaBridge	189:f392fc9709a3	1997	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	1998	* @retval None
AnnaBridge	189:f392fc9709a3	1999	*/
AnnaBridge	189:f392fc9709a3	2000	__STATIC_INLINE void LL_I2C_DisableAuto10BitRead(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	2001	{
AnnaBridge	189:f392fc9709a3	2002	SET_BIT(I2Cx->CR2, I2C_CR2_HEAD10R);
AnnaBridge	189:f392fc9709a3	2003	}
AnnaBridge	189:f392fc9709a3	2004
AnnaBridge	189:f392fc9709a3	2005	/**
AnnaBridge	189:f392fc9709a3	2006	* @brief Check if automatic RESTART Read request condition for 10bit address header is enabled or disabled.
AnnaBridge	189:f392fc9709a3	2007	* @rmtoll CR2 HEAD10R LL_I2C_IsEnabledAuto10BitRead
AnnaBridge	189:f392fc9709a3	2008	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	2009	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	2010	*/
AnnaBridge	189:f392fc9709a3	2011	__STATIC_INLINE uint32_t LL_I2C_IsEnabledAuto10BitRead(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	2012	{
AnnaBridge	189:f392fc9709a3	2013	return (READ_BIT(I2Cx->CR2, I2C_CR2_HEAD10R) != (I2C_CR2_HEAD10R));
AnnaBridge	189:f392fc9709a3	2014	}
AnnaBridge	189:f392fc9709a3	2015
AnnaBridge	189:f392fc9709a3	2016	/**
AnnaBridge	189:f392fc9709a3	2017	* @brief Configure the transfer direction (master mode).
AnnaBridge	189:f392fc9709a3	2018	* @note Changing these bits when START bit is set is not allowed.
AnnaBridge	189:f392fc9709a3	2019	* @rmtoll CR2 RD_WRN LL_I2C_SetTransferRequest
AnnaBridge	189:f392fc9709a3	2020	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	2021	* @param TransferRequest This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	2022	* @arg @ref LL_I2C_REQUEST_WRITE
AnnaBridge	189:f392fc9709a3	2023	* @arg @ref LL_I2C_REQUEST_READ
AnnaBridge	189:f392fc9709a3	2024	* @retval None
AnnaBridge	189:f392fc9709a3	2025	*/
AnnaBridge	189:f392fc9709a3	2026	__STATIC_INLINE void LL_I2C_SetTransferRequest(I2C_TypeDef *I2Cx, uint32_t TransferRequest)
AnnaBridge	189:f392fc9709a3	2027	{
AnnaBridge	189:f392fc9709a3	2028	MODIFY_REG(I2Cx->CR2, I2C_CR2_RD_WRN, TransferRequest);
AnnaBridge	189:f392fc9709a3	2029	}
AnnaBridge	189:f392fc9709a3	2030
AnnaBridge	189:f392fc9709a3	2031	/**
AnnaBridge	189:f392fc9709a3	2032	* @brief Get the transfer direction requested (master mode).
AnnaBridge	189:f392fc9709a3	2033	* @rmtoll CR2 RD_WRN LL_I2C_GetTransferRequest
AnnaBridge	189:f392fc9709a3	2034	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	2035	* @retval Returned value can be one of the following values:
AnnaBridge	189:f392fc9709a3	2036	* @arg @ref LL_I2C_REQUEST_WRITE
AnnaBridge	189:f392fc9709a3	2037	* @arg @ref LL_I2C_REQUEST_READ
AnnaBridge	189:f392fc9709a3	2038	*/
AnnaBridge	189:f392fc9709a3	2039	__STATIC_INLINE uint32_t LL_I2C_GetTransferRequest(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	2040	{
AnnaBridge	189:f392fc9709a3	2041	return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_RD_WRN));
AnnaBridge	189:f392fc9709a3	2042	}
AnnaBridge	189:f392fc9709a3	2043
AnnaBridge	189:f392fc9709a3	2044	/**
AnnaBridge	189:f392fc9709a3	2045	* @brief Configure the slave address for transfer (master mode).
AnnaBridge	189:f392fc9709a3	2046	* @note Changing these bits when START bit is set is not allowed.
AnnaBridge	189:f392fc9709a3	2047	* @rmtoll CR2 SADD LL_I2C_SetSlaveAddr
AnnaBridge	189:f392fc9709a3	2048	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	2049	* @param SlaveAddr This parameter must be a value between Min_Data=0x00 and Max_Data=0x3F.
AnnaBridge	189:f392fc9709a3	2050	* @retval None
AnnaBridge	189:f392fc9709a3	2051	*/
AnnaBridge	189:f392fc9709a3	2052	__STATIC_INLINE void LL_I2C_SetSlaveAddr(I2C_TypeDef *I2Cx, uint32_t SlaveAddr)
AnnaBridge	189:f392fc9709a3	2053	{
AnnaBridge	189:f392fc9709a3	2054	MODIFY_REG(I2Cx->CR2, I2C_CR2_SADD, SlaveAddr);
AnnaBridge	189:f392fc9709a3	2055	}
AnnaBridge	189:f392fc9709a3	2056
AnnaBridge	189:f392fc9709a3	2057	/**
AnnaBridge	189:f392fc9709a3	2058	* @brief Get the slave address programmed for transfer.
AnnaBridge	189:f392fc9709a3	2059	* @rmtoll CR2 SADD LL_I2C_GetSlaveAddr
AnnaBridge	189:f392fc9709a3	2060	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	2061	* @retval Value between Min_Data=0x0 and Max_Data=0x3F
AnnaBridge	189:f392fc9709a3	2062	*/
AnnaBridge	189:f392fc9709a3	2063	__STATIC_INLINE uint32_t LL_I2C_GetSlaveAddr(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	2064	{
AnnaBridge	189:f392fc9709a3	2065	return (uint32_t)(READ_BIT(I2Cx->CR2, I2C_CR2_SADD));
AnnaBridge	189:f392fc9709a3	2066	}
AnnaBridge	189:f392fc9709a3	2067
AnnaBridge	189:f392fc9709a3	2068	/**
AnnaBridge	189:f392fc9709a3	2069	* @brief Handles I2Cx communication when starting transfer or during transfer (TC or TCR flag are set).
AnnaBridge	189:f392fc9709a3	2070	* @rmtoll CR2 SADD LL_I2C_HandleTransfer\n
AnnaBridge	189:f392fc9709a3	2071	* CR2 ADD10 LL_I2C_HandleTransfer\n
AnnaBridge	189:f392fc9709a3	2072	* CR2 RD_WRN LL_I2C_HandleTransfer\n
AnnaBridge	189:f392fc9709a3	2073	* CR2 START LL_I2C_HandleTransfer\n
AnnaBridge	189:f392fc9709a3	2074	* CR2 STOP LL_I2C_HandleTransfer\n
AnnaBridge	189:f392fc9709a3	2075	* CR2 RELOAD LL_I2C_HandleTransfer\n
AnnaBridge	189:f392fc9709a3	2076	* CR2 NBYTES LL_I2C_HandleTransfer\n
AnnaBridge	189:f392fc9709a3	2077	* CR2 AUTOEND LL_I2C_HandleTransfer\n
AnnaBridge	189:f392fc9709a3	2078	* CR2 HEAD10R LL_I2C_HandleTransfer
AnnaBridge	189:f392fc9709a3	2079	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	2080	* @param SlaveAddr Specifies the slave address to be programmed.
AnnaBridge	189:f392fc9709a3	2081	* @param SlaveAddrSize This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	2082	* @arg @ref LL_I2C_ADDRSLAVE_7BIT
AnnaBridge	189:f392fc9709a3	2083	* @arg @ref LL_I2C_ADDRSLAVE_10BIT
AnnaBridge	189:f392fc9709a3	2084	* @param TransferSize Specifies the number of bytes to be programmed.
AnnaBridge	189:f392fc9709a3	2085	* This parameter must be a value between Min_Data=0 and Max_Data=255.
AnnaBridge	189:f392fc9709a3	2086	* @param EndMode This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	2087	* @arg @ref LL_I2C_MODE_RELOAD
AnnaBridge	189:f392fc9709a3	2088	* @arg @ref LL_I2C_MODE_AUTOEND
AnnaBridge	189:f392fc9709a3	2089	* @arg @ref LL_I2C_MODE_SOFTEND
AnnaBridge	189:f392fc9709a3	2090	* @arg @ref LL_I2C_MODE_SMBUS_RELOAD
AnnaBridge	189:f392fc9709a3	2091	* @arg @ref LL_I2C_MODE_SMBUS_AUTOEND_NO_PEC
AnnaBridge	189:f392fc9709a3	2092	* @arg @ref LL_I2C_MODE_SMBUS_SOFTEND_NO_PEC
AnnaBridge	189:f392fc9709a3	2093	* @arg @ref LL_I2C_MODE_SMBUS_AUTOEND_WITH_PEC
AnnaBridge	189:f392fc9709a3	2094	* @arg @ref LL_I2C_MODE_SMBUS_SOFTEND_WITH_PEC
AnnaBridge	189:f392fc9709a3	2095	* @param Request This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	2096	* @arg @ref LL_I2C_GENERATE_NOSTARTSTOP
AnnaBridge	189:f392fc9709a3	2097	* @arg @ref LL_I2C_GENERATE_STOP
AnnaBridge	189:f392fc9709a3	2098	* @arg @ref LL_I2C_GENERATE_START_READ
AnnaBridge	189:f392fc9709a3	2099	* @arg @ref LL_I2C_GENERATE_START_WRITE
AnnaBridge	189:f392fc9709a3	2100	* @arg @ref LL_I2C_GENERATE_RESTART_7BIT_READ
AnnaBridge	189:f392fc9709a3	2101	* @arg @ref LL_I2C_GENERATE_RESTART_7BIT_WRITE
AnnaBridge	189:f392fc9709a3	2102	* @arg @ref LL_I2C_GENERATE_RESTART_10BIT_READ
AnnaBridge	189:f392fc9709a3	2103	* @arg @ref LL_I2C_GENERATE_RESTART_10BIT_WRITE
AnnaBridge	189:f392fc9709a3	2104	* @retval None
AnnaBridge	189:f392fc9709a3	2105	*/
AnnaBridge	189:f392fc9709a3	2106	__STATIC_INLINE void LL_I2C_HandleTransfer(I2C_TypeDef *I2Cx, uint32_t SlaveAddr, uint32_t SlaveAddrSize,
AnnaBridge	189:f392fc9709a3	2107	uint32_t TransferSize, uint32_t EndMode, uint32_t Request)
AnnaBridge	189:f392fc9709a3	2108	{
AnnaBridge	189:f392fc9709a3	2109	MODIFY_REG(I2Cx->CR2, I2C_CR2_SADD \| I2C_CR2_ADD10 \| (I2C_CR2_RD_WRN & (uint32_t)(Request >> (31U - I2C_CR2_RD_WRN_Pos))) \| I2C_CR2_START \| I2C_CR2_STOP \| I2C_CR2_RELOAD \|
AnnaBridge	189:f392fc9709a3	2110	I2C_CR2_NBYTES \| I2C_CR2_AUTOEND \| I2C_CR2_HEAD10R,
AnnaBridge	189:f392fc9709a3	2111	SlaveAddr \| SlaveAddrSize \| TransferSize << I2C_CR2_NBYTES_Pos \| EndMode \| Request);
AnnaBridge	189:f392fc9709a3	2112	}
AnnaBridge	189:f392fc9709a3	2113
AnnaBridge	189:f392fc9709a3	2114	/**
AnnaBridge	189:f392fc9709a3	2115	* @brief Indicate the value of transfer direction (slave mode).
AnnaBridge	189:f392fc9709a3	2116	* @note RESET: Write transfer, Slave enters in receiver mode.
AnnaBridge	189:f392fc9709a3	2117	* SET: Read transfer, Slave enters in transmitter mode.
AnnaBridge	189:f392fc9709a3	2118	* @rmtoll ISR DIR LL_I2C_GetTransferDirection
AnnaBridge	189:f392fc9709a3	2119	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	2120	* @retval Returned value can be one of the following values:
AnnaBridge	189:f392fc9709a3	2121	* @arg @ref LL_I2C_DIRECTION_WRITE
AnnaBridge	189:f392fc9709a3	2122	* @arg @ref LL_I2C_DIRECTION_READ
AnnaBridge	189:f392fc9709a3	2123	*/
AnnaBridge	189:f392fc9709a3	2124	__STATIC_INLINE uint32_t LL_I2C_GetTransferDirection(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	2125	{
AnnaBridge	189:f392fc9709a3	2126	return (uint32_t)(READ_BIT(I2Cx->ISR, I2C_ISR_DIR));
AnnaBridge	189:f392fc9709a3	2127	}
AnnaBridge	189:f392fc9709a3	2128
AnnaBridge	189:f392fc9709a3	2129	/**
AnnaBridge	189:f392fc9709a3	2130	* @brief Return the slave matched address.
AnnaBridge	189:f392fc9709a3	2131	* @rmtoll ISR ADDCODE LL_I2C_GetAddressMatchCode
AnnaBridge	189:f392fc9709a3	2132	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	2133	* @retval Value between Min_Data=0x00 and Max_Data=0x3F
AnnaBridge	189:f392fc9709a3	2134	*/
AnnaBridge	189:f392fc9709a3	2135	__STATIC_INLINE uint32_t LL_I2C_GetAddressMatchCode(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	2136	{
AnnaBridge	189:f392fc9709a3	2137	return (uint32_t)(READ_BIT(I2Cx->ISR, I2C_ISR_ADDCODE) >> I2C_ISR_ADDCODE_Pos << 1);
AnnaBridge	189:f392fc9709a3	2138	}
AnnaBridge	189:f392fc9709a3	2139
AnnaBridge	189:f392fc9709a3	2140	/**
AnnaBridge	189:f392fc9709a3	2141	* @brief Enable internal comparison of the SMBus Packet Error byte (transmission or reception mode).
AnnaBridge	189:f392fc9709a3	2142	* @note Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	2143	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	2144	* @note This feature is cleared by hardware when the PEC byte is transferred, or when a STOP condition or an Address Matched is received.
AnnaBridge	189:f392fc9709a3	2145	* This bit has no effect when RELOAD bit is set.
AnnaBridge	189:f392fc9709a3	2146	* This bit has no effect in device mode when SBC bit is not set.
AnnaBridge	189:f392fc9709a3	2147	* @rmtoll CR2 PECBYTE LL_I2C_EnableSMBusPECCompare
AnnaBridge	189:f392fc9709a3	2148	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	2149	* @retval None
AnnaBridge	189:f392fc9709a3	2150	*/
AnnaBridge	189:f392fc9709a3	2151	__STATIC_INLINE void LL_I2C_EnableSMBusPECCompare(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	2152	{
AnnaBridge	189:f392fc9709a3	2153	SET_BIT(I2Cx->CR2, I2C_CR2_PECBYTE);
AnnaBridge	189:f392fc9709a3	2154	}
AnnaBridge	189:f392fc9709a3	2155
AnnaBridge	189:f392fc9709a3	2156	/**
AnnaBridge	189:f392fc9709a3	2157	* @brief Check if the SMBus Packet Error byte internal comparison is requested or not.
AnnaBridge	189:f392fc9709a3	2158	* @note Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	2159	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	2160	* @rmtoll CR2 PECBYTE LL_I2C_IsEnabledSMBusPECCompare
AnnaBridge	189:f392fc9709a3	2161	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	2162	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	2163	*/
AnnaBridge	189:f392fc9709a3	2164	__STATIC_INLINE uint32_t LL_I2C_IsEnabledSMBusPECCompare(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	2165	{
AnnaBridge	189:f392fc9709a3	2166	return (READ_BIT(I2Cx->CR2, I2C_CR2_PECBYTE) == (I2C_CR2_PECBYTE));
AnnaBridge	189:f392fc9709a3	2167	}
AnnaBridge	189:f392fc9709a3	2168
AnnaBridge	189:f392fc9709a3	2169	/**
AnnaBridge	189:f392fc9709a3	2170	* @brief Get the SMBus Packet Error byte calculated.
AnnaBridge	189:f392fc9709a3	2171	* @note Macro @ref IS_SMBUS_INSTANCE(I2Cx) can be used to check whether or not
AnnaBridge	189:f392fc9709a3	2172	* SMBus feature is supported by the I2Cx Instance.
AnnaBridge	189:f392fc9709a3	2173	* @rmtoll PECR PEC LL_I2C_GetSMBusPEC
AnnaBridge	189:f392fc9709a3	2174	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	2175	* @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	189:f392fc9709a3	2176	*/
AnnaBridge	189:f392fc9709a3	2177	__STATIC_INLINE uint32_t LL_I2C_GetSMBusPEC(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	2178	{
AnnaBridge	189:f392fc9709a3	2179	return (uint32_t)(READ_BIT(I2Cx->PECR, I2C_PECR_PEC));
AnnaBridge	189:f392fc9709a3	2180	}
AnnaBridge	189:f392fc9709a3	2181
AnnaBridge	189:f392fc9709a3	2182	/**
AnnaBridge	189:f392fc9709a3	2183	* @brief Read Receive Data register.
AnnaBridge	189:f392fc9709a3	2184	* @rmtoll RXDR RXDATA LL_I2C_ReceiveData8
AnnaBridge	189:f392fc9709a3	2185	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	2186	* @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	189:f392fc9709a3	2187	*/
AnnaBridge	189:f392fc9709a3	2188	__STATIC_INLINE uint8_t LL_I2C_ReceiveData8(I2C_TypeDef *I2Cx)
AnnaBridge	189:f392fc9709a3	2189	{
AnnaBridge	189:f392fc9709a3	2190	return (uint8_t)(READ_BIT(I2Cx->RXDR, I2C_RXDR_RXDATA));
AnnaBridge	189:f392fc9709a3	2191	}
AnnaBridge	189:f392fc9709a3	2192
AnnaBridge	189:f392fc9709a3	2193	/**
AnnaBridge	189:f392fc9709a3	2194	* @brief Write in Transmit Data Register .
AnnaBridge	189:f392fc9709a3	2195	* @rmtoll TXDR TXDATA LL_I2C_TransmitData8
AnnaBridge	189:f392fc9709a3	2196	* @param I2Cx I2C Instance.
AnnaBridge	189:f392fc9709a3	2197	* @param Data Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	189:f392fc9709a3	2198	* @retval None
AnnaBridge	189:f392fc9709a3	2199	*/
AnnaBridge	189:f392fc9709a3	2200	__STATIC_INLINE void LL_I2C_TransmitData8(I2C_TypeDef *I2Cx, uint8_t Data)
AnnaBridge	189:f392fc9709a3	2201	{
AnnaBridge	189:f392fc9709a3	2202	WRITE_REG(I2Cx->TXDR, Data);
AnnaBridge	189:f392fc9709a3	2203	}
AnnaBridge	189:f392fc9709a3	2204
AnnaBridge	189:f392fc9709a3	2205	/**
AnnaBridge	189:f392fc9709a3	2206	* @}
AnnaBridge	189:f392fc9709a3	2207	*/
AnnaBridge	189:f392fc9709a3	2208
AnnaBridge	189:f392fc9709a3	2209	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	189:f392fc9709a3	2210	/** @defgroup I2C_LL_EF_Init Initialization and de-initialization functions
AnnaBridge	189:f392fc9709a3	2211	* @{
AnnaBridge	189:f392fc9709a3	2212	*/
AnnaBridge	189:f392fc9709a3	2213
AnnaBridge	189:f392fc9709a3	2214	uint32_t LL_I2C_Init(I2C_TypeDef I2Cx, LL_I2C_InitTypeDef I2C_InitStruct);
AnnaBridge	189:f392fc9709a3	2215	uint32_t LL_I2C_DeInit(I2C_TypeDef *I2Cx);
AnnaBridge	189:f392fc9709a3	2216	void LL_I2C_StructInit(LL_I2C_InitTypeDef *I2C_InitStruct);
AnnaBridge	189:f392fc9709a3	2217
AnnaBridge	189:f392fc9709a3	2218
AnnaBridge	189:f392fc9709a3	2219	/**
AnnaBridge	189:f392fc9709a3	2220	* @}
AnnaBridge	189:f392fc9709a3	2221	*/
AnnaBridge	189:f392fc9709a3	2222	#endif /* USE_FULL_LL_DRIVER */
AnnaBridge	189:f392fc9709a3	2223
AnnaBridge	189:f392fc9709a3	2224	/**
AnnaBridge	189:f392fc9709a3	2225	* @}
AnnaBridge	189:f392fc9709a3	2226	*/
AnnaBridge	189:f392fc9709a3	2227
AnnaBridge	189:f392fc9709a3	2228	/**
AnnaBridge	189:f392fc9709a3	2229	* @}
AnnaBridge	189:f392fc9709a3	2230	*/
AnnaBridge	189:f392fc9709a3	2231
AnnaBridge	189:f392fc9709a3	2232	#endif /* I2C1 \|\| I2C2 \|\| I2C3 */
AnnaBridge	189:f392fc9709a3	2233
AnnaBridge	189:f392fc9709a3	2234	/**
AnnaBridge	189:f392fc9709a3	2235	* @}
AnnaBridge	189:f392fc9709a3	2236	*/
AnnaBridge	189:f392fc9709a3	2237
AnnaBridge	189:f392fc9709a3	2238	#ifdef __cplusplus
AnnaBridge	189:f392fc9709a3	2239	}
AnnaBridge	189:f392fc9709a3	2240	#endif
AnnaBridge	189:f392fc9709a3	2241
AnnaBridge	189:f392fc9709a3	2242	#endif /* __STM32L0xx_LL_I2C_H */
AnnaBridge	189:f392fc9709a3	2243
AnnaBridge	189:f392fc9709a3	2244	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/