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cmsis/BUILD/mbed/TARGET_DISCO_L072CZ_LRWAN1/TOOLCHAIN_IAR/stm32l0xx_ll_adc.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:: AnnaBridge
Date:: Wed Feb 20 22:31:08 2019 +0000
Revision:: 189:f392fc9709a3

mbed library release version 165

Who changed what in which revision?

User	Revision	Line number	New contents of line
AnnaBridge	189:f392fc9709a3	1	/**
AnnaBridge	189:f392fc9709a3	2	******************************************************************************
AnnaBridge	189:f392fc9709a3	3	* @file stm32l0xx_ll_adc.h
AnnaBridge	189:f392fc9709a3	4	* @author MCD Application Team
AnnaBridge	189:f392fc9709a3	5	* @brief Header file of ADC LL module.
AnnaBridge	189:f392fc9709a3	6	******************************************************************************
AnnaBridge	189:f392fc9709a3	7	* @attention
AnnaBridge	189:f392fc9709a3	8	*
AnnaBridge	189:f392fc9709a3	9	* <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
AnnaBridge	189:f392fc9709a3	10	*
AnnaBridge	189:f392fc9709a3	11	* Redistribution and use in source and binary forms, with or without modification,
AnnaBridge	189:f392fc9709a3	12	* are permitted provided that the following conditions are met:
AnnaBridge	189:f392fc9709a3	13	* 1. Redistributions of source code must retain the above copyright notice,
AnnaBridge	189:f392fc9709a3	14	* this list of conditions and the following disclaimer.
AnnaBridge	189:f392fc9709a3	15	* 2. Redistributions in binary form must reproduce the above copyright notice,
AnnaBridge	189:f392fc9709a3	16	* this list of conditions and the following disclaimer in the documentation
AnnaBridge	189:f392fc9709a3	17	* and/or other materials provided with the distribution.
AnnaBridge	189:f392fc9709a3	18	* 3. Neither the name of STMicroelectronics nor the names of its contributors
AnnaBridge	189:f392fc9709a3	19	* may be used to endorse or promote products derived from this software
AnnaBridge	189:f392fc9709a3	20	* without specific prior written permission.
AnnaBridge	189:f392fc9709a3	21	*
AnnaBridge	189:f392fc9709a3	22	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
AnnaBridge	189:f392fc9709a3	23	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
AnnaBridge	189:f392fc9709a3	24	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
AnnaBridge	189:f392fc9709a3	25	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
AnnaBridge	189:f392fc9709a3	26	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
AnnaBridge	189:f392fc9709a3	27	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
AnnaBridge	189:f392fc9709a3	28	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
AnnaBridge	189:f392fc9709a3	29	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
AnnaBridge	189:f392fc9709a3	30	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
AnnaBridge	189:f392fc9709a3	31	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
AnnaBridge	189:f392fc9709a3	32	*
AnnaBridge	189:f392fc9709a3	33	******************************************************************************
AnnaBridge	189:f392fc9709a3	34	*/
AnnaBridge	189:f392fc9709a3	35
AnnaBridge	189:f392fc9709a3	36	/* Define to prevent recursive inclusion -------------------------------------*/
AnnaBridge	189:f392fc9709a3	37	#ifndef __STM32L0xx_LL_ADC_H
AnnaBridge	189:f392fc9709a3	38	#define __STM32L0xx_LL_ADC_H
AnnaBridge	189:f392fc9709a3	39
AnnaBridge	189:f392fc9709a3	40	#ifdef __cplusplus
AnnaBridge	189:f392fc9709a3	41	extern "C" {
AnnaBridge	189:f392fc9709a3	42	#endif
AnnaBridge	189:f392fc9709a3	43
AnnaBridge	189:f392fc9709a3	44	/* Includes ------------------------------------------------------------------*/
AnnaBridge	189:f392fc9709a3	45	#include "stm32l0xx.h"
AnnaBridge	189:f392fc9709a3	46
AnnaBridge	189:f392fc9709a3	47	/** @addtogroup STM32L0xx_LL_Driver
AnnaBridge	189:f392fc9709a3	48	* @{
AnnaBridge	189:f392fc9709a3	49	*/
AnnaBridge	189:f392fc9709a3	50
AnnaBridge	189:f392fc9709a3	51	#if defined (ADC1)
AnnaBridge	189:f392fc9709a3	52
AnnaBridge	189:f392fc9709a3	53	/** @defgroup ADC_LL ADC
AnnaBridge	189:f392fc9709a3	54	* @{
AnnaBridge	189:f392fc9709a3	55	*/
AnnaBridge	189:f392fc9709a3	56
AnnaBridge	189:f392fc9709a3	57	/* Private types -------------------------------------------------------------*/
AnnaBridge	189:f392fc9709a3	58	/* Private variables ---------------------------------------------------------*/
AnnaBridge	189:f392fc9709a3	59
AnnaBridge	189:f392fc9709a3	60	/* Private constants ---------------------------------------------------------*/
AnnaBridge	189:f392fc9709a3	61	/** @defgroup ADC_LL_Private_Constants ADC Private Constants
AnnaBridge	189:f392fc9709a3	62	* @{
AnnaBridge	189:f392fc9709a3	63	*/
AnnaBridge	189:f392fc9709a3	64
AnnaBridge	189:f392fc9709a3	65	/* Internal mask for ADC group regular trigger: */
AnnaBridge	189:f392fc9709a3	66	/* To select into literal LL_ADC_REG_TRIG_x the relevant bits for: */
AnnaBridge	189:f392fc9709a3	67	/* - regular trigger source */
AnnaBridge	189:f392fc9709a3	68	/* - regular trigger edge */
AnnaBridge	189:f392fc9709a3	69	#define ADC_REG_TRIG_EXT_EDGE_DEFAULT (ADC_CFGR1_EXTEN_0) /* Trigger edge set to rising edge (default setting for compatibility with some ADC on other STM32 families having this setting set by HW default value) */
AnnaBridge	189:f392fc9709a3	70
AnnaBridge	189:f392fc9709a3	71	/* Mask containing trigger source masks for each of possible */
AnnaBridge	189:f392fc9709a3	72	/* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
AnnaBridge	189:f392fc9709a3	73	/* corresponding to {SW start; ext trigger; ext trigger; ext trigger}. */
AnnaBridge	189:f392fc9709a3	74	#define ADC_REG_TRIG_SOURCE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTSEL) << (4U * 0U)) \| \
AnnaBridge	189:f392fc9709a3	75	((ADC_CFGR1_EXTSEL) << (4U * 1U)) \| \
AnnaBridge	189:f392fc9709a3	76	((ADC_CFGR1_EXTSEL) << (4U * 2U)) \| \
AnnaBridge	189:f392fc9709a3	77	((ADC_CFGR1_EXTSEL) << (4U * 3U)) )
AnnaBridge	189:f392fc9709a3	78
AnnaBridge	189:f392fc9709a3	79	/* Mask containing trigger edge masks for each of possible */
AnnaBridge	189:f392fc9709a3	80	/* trigger edge selection duplicated with shifts [0; 4; 8; 12] */
AnnaBridge	189:f392fc9709a3	81	/* corresponding to {SW start; ext trigger; ext trigger; ext trigger}. */
AnnaBridge	189:f392fc9709a3	82	#define ADC_REG_TRIG_EDGE_MASK (((LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN) << (4U * 0U)) \| \
AnnaBridge	189:f392fc9709a3	83	((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 1U)) \| \
AnnaBridge	189:f392fc9709a3	84	((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 2U)) \| \
AnnaBridge	189:f392fc9709a3	85	((ADC_REG_TRIG_EXT_EDGE_DEFAULT) << (4U * 3U)) )
AnnaBridge	189:f392fc9709a3	86
AnnaBridge	189:f392fc9709a3	87	/* Definition of ADC group regular trigger bits information. */
AnnaBridge	189:f392fc9709a3	88	#define ADC_REG_TRIG_EXTSEL_BITOFFSET_POS ((uint32_t) 6U) /* Value equivalent to POSITION_VAL(ADC_CFGR1_EXTSEL) */
AnnaBridge	189:f392fc9709a3	89	#define ADC_REG_TRIG_EXTEN_BITOFFSET_POS ((uint32_t)10U) /* Value equivalent to POSITION_VAL(ADC_CFGR1_EXTEN) */
AnnaBridge	189:f392fc9709a3	90
AnnaBridge	189:f392fc9709a3	91
AnnaBridge	189:f392fc9709a3	92
AnnaBridge	189:f392fc9709a3	93	/* Internal mask for ADC channel: */
AnnaBridge	189:f392fc9709a3	94	/* To select into literal LL_ADC_CHANNEL_x the relevant bits for: */
AnnaBridge	189:f392fc9709a3	95	/* - channel identifier defined by number */
AnnaBridge	189:f392fc9709a3	96	/* - channel identifier defined by bitfield */
AnnaBridge	189:f392fc9709a3	97	/* - channel differentiation between external channels (connected to */
AnnaBridge	189:f392fc9709a3	98	/* GPIO pins) and internal channels (connected to internal paths) */
AnnaBridge	189:f392fc9709a3	99	#define ADC_CHANNEL_ID_NUMBER_MASK (ADC_CFGR1_AWDCH)
AnnaBridge	189:f392fc9709a3	100	#define ADC_CHANNEL_ID_BITFIELD_MASK (ADC_CHSELR_CHSEL)
AnnaBridge	189:f392fc9709a3	101	#define ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS ((uint32_t)26U)/* Value equivalent to POSITION_VAL(ADC_CHANNEL_ID_NUMBER_MASK) */
AnnaBridge	189:f392fc9709a3	102	#define ADC_CHANNEL_ID_MASK (ADC_CHANNEL_ID_NUMBER_MASK \| ADC_CHANNEL_ID_BITFIELD_MASK \| ADC_CHANNEL_ID_INTERNAL_CH_MASK)
AnnaBridge	189:f392fc9709a3	103	/* Equivalent mask of ADC_CHANNEL_NUMBER_MASK aligned on register LSB (bit 0) */
AnnaBridge	189:f392fc9709a3	104	#define ADC_CHANNEL_ID_NUMBER_MASK_POSBIT0 ((uint32_t)0x0000001FU) /* Equivalent to shift: (ADC_CHANNEL_NUMBER_MASK >> POSITION_VAL(ADC_CHANNEL_NUMBER_MASK)) */
AnnaBridge	189:f392fc9709a3	105
AnnaBridge	189:f392fc9709a3	106	/* Channel differentiation between external and internal channels */
AnnaBridge	189:f392fc9709a3	107	#define ADC_CHANNEL_ID_INTERNAL_CH ((uint32_t)0x80000000U) /* Marker of internal channel */
AnnaBridge	189:f392fc9709a3	108	#define ADC_CHANNEL_ID_INTERNAL_CH_MASK (ADC_CHANNEL_ID_INTERNAL_CH)
AnnaBridge	189:f392fc9709a3	109
AnnaBridge	189:f392fc9709a3	110	/* Definition of channels ID number information to be inserted into */
AnnaBridge	189:f392fc9709a3	111	/* channels literals definition. */
AnnaBridge	189:f392fc9709a3	112	#define ADC_CHANNEL_0_NUMBER ((uint32_t)0x00000000U)
AnnaBridge	189:f392fc9709a3	113	#define ADC_CHANNEL_1_NUMBER ( ADC_CFGR1_AWDCH_0)
AnnaBridge	189:f392fc9709a3	114	#define ADC_CHANNEL_2_NUMBER ( ADC_CFGR1_AWDCH_1 )
AnnaBridge	189:f392fc9709a3	115	#define ADC_CHANNEL_3_NUMBER ( ADC_CFGR1_AWDCH_1 \| ADC_CFGR1_AWDCH_0)
AnnaBridge	189:f392fc9709a3	116	#define ADC_CHANNEL_4_NUMBER ( ADC_CFGR1_AWDCH_2 )
AnnaBridge	189:f392fc9709a3	117	#define ADC_CHANNEL_5_NUMBER ( ADC_CFGR1_AWDCH_2 \| ADC_CFGR1_AWDCH_0)
AnnaBridge	189:f392fc9709a3	118	#define ADC_CHANNEL_6_NUMBER ( ADC_CFGR1_AWDCH_2 \| ADC_CFGR1_AWDCH_1 )
AnnaBridge	189:f392fc9709a3	119	#define ADC_CHANNEL_7_NUMBER ( ADC_CFGR1_AWDCH_2 \| ADC_CFGR1_AWDCH_1 \| ADC_CFGR1_AWDCH_0)
AnnaBridge	189:f392fc9709a3	120	#define ADC_CHANNEL_8_NUMBER ( ADC_CFGR1_AWDCH_3 )
AnnaBridge	189:f392fc9709a3	121	#define ADC_CHANNEL_9_NUMBER ( ADC_CFGR1_AWDCH_3 \| ADC_CFGR1_AWDCH_0)
AnnaBridge	189:f392fc9709a3	122	#define ADC_CHANNEL_10_NUMBER ( ADC_CFGR1_AWDCH_3 \| ADC_CFGR1_AWDCH_1 )
AnnaBridge	189:f392fc9709a3	123	#define ADC_CHANNEL_11_NUMBER ( ADC_CFGR1_AWDCH_3 \| ADC_CFGR1_AWDCH_1 \| ADC_CFGR1_AWDCH_0)
AnnaBridge	189:f392fc9709a3	124	#define ADC_CHANNEL_12_NUMBER ( ADC_CFGR1_AWDCH_3 \| ADC_CFGR1_AWDCH_2 )
AnnaBridge	189:f392fc9709a3	125	#define ADC_CHANNEL_13_NUMBER ( ADC_CFGR1_AWDCH_3 \| ADC_CFGR1_AWDCH_2 \| ADC_CFGR1_AWDCH_0)
AnnaBridge	189:f392fc9709a3	126	#define ADC_CHANNEL_14_NUMBER ( ADC_CFGR1_AWDCH_3 \| ADC_CFGR1_AWDCH_2 \| ADC_CFGR1_AWDCH_1 )
AnnaBridge	189:f392fc9709a3	127	#define ADC_CHANNEL_15_NUMBER ( ADC_CFGR1_AWDCH_3 \| ADC_CFGR1_AWDCH_2 \| ADC_CFGR1_AWDCH_1 \| ADC_CFGR1_AWDCH_0)
AnnaBridge	189:f392fc9709a3	128	#define ADC_CHANNEL_16_NUMBER (ADC_CFGR1_AWDCH_4 )
AnnaBridge	189:f392fc9709a3	129	#define ADC_CHANNEL_17_NUMBER (ADC_CFGR1_AWDCH_4 \| ADC_CFGR1_AWDCH_0)
AnnaBridge	189:f392fc9709a3	130	#define ADC_CHANNEL_18_NUMBER (ADC_CFGR1_AWDCH_4 \| ADC_CFGR1_AWDCH_1 )
AnnaBridge	189:f392fc9709a3	131
AnnaBridge	189:f392fc9709a3	132	/* Definition of channels ID bitfield information to be inserted into */
AnnaBridge	189:f392fc9709a3	133	/* channels literals definition. */
AnnaBridge	189:f392fc9709a3	134	#define ADC_CHANNEL_0_BITFIELD (ADC_CHSELR_CHSEL0)
AnnaBridge	189:f392fc9709a3	135	#define ADC_CHANNEL_1_BITFIELD (ADC_CHSELR_CHSEL1)
AnnaBridge	189:f392fc9709a3	136	#define ADC_CHANNEL_2_BITFIELD (ADC_CHSELR_CHSEL2)
AnnaBridge	189:f392fc9709a3	137	#define ADC_CHANNEL_3_BITFIELD (ADC_CHSELR_CHSEL3)
AnnaBridge	189:f392fc9709a3	138	#define ADC_CHANNEL_4_BITFIELD (ADC_CHSELR_CHSEL4)
AnnaBridge	189:f392fc9709a3	139	#define ADC_CHANNEL_5_BITFIELD (ADC_CHSELR_CHSEL5)
AnnaBridge	189:f392fc9709a3	140	#define ADC_CHANNEL_6_BITFIELD (ADC_CHSELR_CHSEL6)
AnnaBridge	189:f392fc9709a3	141	#define ADC_CHANNEL_7_BITFIELD (ADC_CHSELR_CHSEL7)
AnnaBridge	189:f392fc9709a3	142	#define ADC_CHANNEL_8_BITFIELD (ADC_CHSELR_CHSEL8)
AnnaBridge	189:f392fc9709a3	143	#define ADC_CHANNEL_9_BITFIELD (ADC_CHSELR_CHSEL9)
AnnaBridge	189:f392fc9709a3	144	#define ADC_CHANNEL_10_BITFIELD (ADC_CHSELR_CHSEL10)
AnnaBridge	189:f392fc9709a3	145	#define ADC_CHANNEL_11_BITFIELD (ADC_CHSELR_CHSEL11)
AnnaBridge	189:f392fc9709a3	146	#define ADC_CHANNEL_12_BITFIELD (ADC_CHSELR_CHSEL12)
AnnaBridge	189:f392fc9709a3	147	#define ADC_CHANNEL_13_BITFIELD (ADC_CHSELR_CHSEL13)
AnnaBridge	189:f392fc9709a3	148	#define ADC_CHANNEL_14_BITFIELD (ADC_CHSELR_CHSEL14)
AnnaBridge	189:f392fc9709a3	149	#define ADC_CHANNEL_15_BITFIELD (ADC_CHSELR_CHSEL15)
AnnaBridge	189:f392fc9709a3	150	#if defined(ADC_CCR_VLCDEN)
AnnaBridge	189:f392fc9709a3	151	#define ADC_CHANNEL_16_BITFIELD (ADC_CHSELR_CHSEL16)
AnnaBridge	189:f392fc9709a3	152	#endif
AnnaBridge	189:f392fc9709a3	153	#define ADC_CHANNEL_17_BITFIELD (ADC_CHSELR_CHSEL17)
AnnaBridge	189:f392fc9709a3	154	#define ADC_CHANNEL_18_BITFIELD (ADC_CHSELR_CHSEL18)
AnnaBridge	189:f392fc9709a3	155
AnnaBridge	189:f392fc9709a3	156	/* Internal mask for ADC analog watchdog: */
AnnaBridge	189:f392fc9709a3	157	/* To select into literals LL_ADC_AWD_CHANNELx_xxx the relevant bits for: */
AnnaBridge	189:f392fc9709a3	158	/* (concatenation of multiple bits used in different analog watchdogs, */
AnnaBridge	189:f392fc9709a3	159	/* (feature of several watchdogs not available on all STM32 families)). */
AnnaBridge	189:f392fc9709a3	160	/* - analog watchdog 1: monitored channel defined by number, */
AnnaBridge	189:f392fc9709a3	161	/* selection of ADC group (ADC group regular). */
AnnaBridge	189:f392fc9709a3	162
AnnaBridge	189:f392fc9709a3	163	/* Internal register offset for ADC analog watchdog channel configuration */
AnnaBridge	189:f392fc9709a3	164	#define ADC_AWD_CR1_REGOFFSET ((uint32_t)0x00000000U)
AnnaBridge	189:f392fc9709a3	165
AnnaBridge	189:f392fc9709a3	166	#define ADC_AWD_CRX_REGOFFSET_MASK (ADC_AWD_CR1_REGOFFSET)
AnnaBridge	189:f392fc9709a3	167
AnnaBridge	189:f392fc9709a3	168	#define ADC_AWD_CR1_CHANNEL_MASK (ADC_CFGR1_AWDCH \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL)
AnnaBridge	189:f392fc9709a3	169	#define ADC_AWD_CR_ALL_CHANNEL_MASK (ADC_AWD_CR1_CHANNEL_MASK)
AnnaBridge	189:f392fc9709a3	170
AnnaBridge	189:f392fc9709a3	171	/* Internal register offset for ADC analog watchdog threshold configuration */
AnnaBridge	189:f392fc9709a3	172	#define ADC_AWD_TR1_REGOFFSET (ADC_AWD_CR1_REGOFFSET)
AnnaBridge	189:f392fc9709a3	173	#define ADC_AWD_TRX_REGOFFSET_MASK (ADC_AWD_TR1_REGOFFSET)
AnnaBridge	189:f392fc9709a3	174
AnnaBridge	189:f392fc9709a3	175
AnnaBridge	189:f392fc9709a3	176	/* ADC registers bits positions */
AnnaBridge	189:f392fc9709a3	177	#define ADC_CFGR1_RES_BITOFFSET_POS ((uint32_t) 3U) /* Value equivalent to POSITION_VAL(ADC_CFGR1_RES) */
AnnaBridge	189:f392fc9709a3	178	#define ADC_CFGR1_AWDSGL_BITOFFSET_POS ((uint32_t)22U) /* Value equivalent to POSITION_VAL(ADC_CFGR1_AWDSGL) */
AnnaBridge	189:f392fc9709a3	179	#define ADC_TR_HT_BITOFFSET_POS ((uint32_t)16U) /* Value equivalent to POSITION_VAL(ADC_TR_HT) */
AnnaBridge	189:f392fc9709a3	180	#define ADC_CHSELR_CHSEL0_BITOFFSET_POS ((uint32_t) 0U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL0) */
AnnaBridge	189:f392fc9709a3	181	#define ADC_CHSELR_CHSEL1_BITOFFSET_POS ((uint32_t) 1U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL1) */
AnnaBridge	189:f392fc9709a3	182	#define ADC_CHSELR_CHSEL2_BITOFFSET_POS ((uint32_t) 2U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL2) */
AnnaBridge	189:f392fc9709a3	183	#define ADC_CHSELR_CHSEL3_BITOFFSET_POS ((uint32_t) 3U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL3) */
AnnaBridge	189:f392fc9709a3	184	#define ADC_CHSELR_CHSEL4_BITOFFSET_POS ((uint32_t) 4U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL4) */
AnnaBridge	189:f392fc9709a3	185	#define ADC_CHSELR_CHSEL5_BITOFFSET_POS ((uint32_t) 5U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL5) */
AnnaBridge	189:f392fc9709a3	186	#define ADC_CHSELR_CHSEL6_BITOFFSET_POS ((uint32_t) 6U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL6) */
AnnaBridge	189:f392fc9709a3	187	#define ADC_CHSELR_CHSEL7_BITOFFSET_POS ((uint32_t) 7U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL7) */
AnnaBridge	189:f392fc9709a3	188	#define ADC_CHSELR_CHSEL8_BITOFFSET_POS ((uint32_t) 8U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL8) */
AnnaBridge	189:f392fc9709a3	189	#define ADC_CHSELR_CHSEL9_BITOFFSET_POS ((uint32_t) 9U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL9) */
AnnaBridge	189:f392fc9709a3	190	#define ADC_CHSELR_CHSEL10_BITOFFSET_POS ((uint32_t)10U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL10) */
AnnaBridge	189:f392fc9709a3	191	#define ADC_CHSELR_CHSEL11_BITOFFSET_POS ((uint32_t)11U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL11) */
AnnaBridge	189:f392fc9709a3	192	#define ADC_CHSELR_CHSEL12_BITOFFSET_POS ((uint32_t)12U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL12) */
AnnaBridge	189:f392fc9709a3	193	#define ADC_CHSELR_CHSEL13_BITOFFSET_POS ((uint32_t)13U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL13) */
AnnaBridge	189:f392fc9709a3	194	#define ADC_CHSELR_CHSEL14_BITOFFSET_POS ((uint32_t)14U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL14) */
AnnaBridge	189:f392fc9709a3	195	#define ADC_CHSELR_CHSEL15_BITOFFSET_POS ((uint32_t)15U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL15) */
AnnaBridge	189:f392fc9709a3	196	#if defined(ADC_CCR_VLCDEN)
AnnaBridge	189:f392fc9709a3	197	#define ADC_CHSELR_CHSEL16_BITOFFSET_POS ((uint32_t)16U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL16) */
AnnaBridge	189:f392fc9709a3	198	#endif
AnnaBridge	189:f392fc9709a3	199	#define ADC_CHSELR_CHSEL17_BITOFFSET_POS ((uint32_t)17U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL17) */
AnnaBridge	189:f392fc9709a3	200	#define ADC_CHSELR_CHSEL18_BITOFFSET_POS ((uint32_t)18U) /* Value equivalent to POSITION_VAL(ADC_CHSELR_CHSEL18) */
AnnaBridge	189:f392fc9709a3	201
AnnaBridge	189:f392fc9709a3	202
AnnaBridge	189:f392fc9709a3	203	/* ADC registers bits groups */
AnnaBridge	189:f392fc9709a3	204	#define ADC_CR_BITS_PROPERTY_RS (ADC_CR_ADCAL \| ADC_CR_ADSTP \| ADC_CR_ADSTART \| ADC_CR_ADDIS \| ADC_CR_ADEN) /* ADC register CR bits with HW property "rs": Software can read as well as set this bit. Writing '0' has no effect on the bit value. */
AnnaBridge	189:f392fc9709a3	205
AnnaBridge	189:f392fc9709a3	206
AnnaBridge	189:f392fc9709a3	207	/* ADC internal channels related definitions */
AnnaBridge	189:f392fc9709a3	208	/* Internal voltage reference VrefInt */
AnnaBridge	189:f392fc9709a3	209	#define VREFINT_CAL_ADDR ((uint16_t) ((uint32_t)0x1FF80078U)) / Internal voltage reference, address of parameter VREFINT_CAL: VrefInt ADC raw data acquired at temperature 30 DegC (tolerance: +-5 DegC), Vref+ = 3.0 V (tolerance: +-10 mV). */
AnnaBridge	189:f392fc9709a3	210	#define VREFINT_CAL_VREF ((uint32_t) 3000U) /* Analog voltage reference (Vref+) value with which temperature sensor has been calibrated in production (tolerance: +-10 mV) (unit: mV). */
AnnaBridge	189:f392fc9709a3	211	/* Temperature sensor */
AnnaBridge	189:f392fc9709a3	212	/* Note: On device STM32L011, calibration parameter TS_CAL1 is not available. */
AnnaBridge	189:f392fc9709a3	213	#if !defined(STM32L011xx)
AnnaBridge	189:f392fc9709a3	214	#define TEMPSENSOR_CAL1_ADDR ((uint16_t) ((uint32_t)0x1FF8007AU)) / Internal temperature sensor, address of parameter TS_CAL1: On STM32L0, temperature sensor ADC raw data acquired at temperature 30 DegC (tolerance: +-5 DegC), Vref+ = 3.0 V (tolerance: +-10 mV). */
AnnaBridge	189:f392fc9709a3	215	#endif
AnnaBridge	189:f392fc9709a3	216	#define TEMPSENSOR_CAL2_ADDR ((uint16_t) ((uint32_t)0x1FF8007EU)) / Internal temperature sensor, address of parameter TS_CAL2: On STM32L0, temperature sensor ADC raw data acquired at temperature 130 DegC (tolerance: +-5 DegC), Vref+ = 3.0 V (tolerance: +-10 mV). */
AnnaBridge	189:f392fc9709a3	217	#if !defined(STM32L011xx)
AnnaBridge	189:f392fc9709a3	218	#define TEMPSENSOR_CAL1_TEMP (( int32_t) 30) /* Internal temperature sensor, temperature at which temperature sensor has been calibrated in production for data into TEMPSENSOR_CAL1_ADDR (tolerance: +-5 DegC) (unit: DegC). */
AnnaBridge	189:f392fc9709a3	219	#endif
AnnaBridge	189:f392fc9709a3	220	#define TEMPSENSOR_CAL2_TEMP (( int32_t) 130) /* Internal temperature sensor, temperature at which temperature sensor has been calibrated in production for data into TEMPSENSOR_CAL2_ADDR (tolerance: +-5 DegC) (unit: DegC). */
AnnaBridge	189:f392fc9709a3	221	#define TEMPSENSOR_CAL_VREFANALOG ((uint32_t) 3000U) /* Analog voltage reference (Vref+) voltage with which temperature sensor has been calibrated in production (+-10 mV) (unit: mV). */
AnnaBridge	189:f392fc9709a3	222
AnnaBridge	189:f392fc9709a3	223
AnnaBridge	189:f392fc9709a3	224	/**
AnnaBridge	189:f392fc9709a3	225	* @}
AnnaBridge	189:f392fc9709a3	226	*/
AnnaBridge	189:f392fc9709a3	227
AnnaBridge	189:f392fc9709a3	228
AnnaBridge	189:f392fc9709a3	229	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	189:f392fc9709a3	230	/* Private macros ------------------------------------------------------------*/
AnnaBridge	189:f392fc9709a3	231	/** @defgroup ADC_LL_Private_Macros ADC Private Macros
AnnaBridge	189:f392fc9709a3	232	* @{
AnnaBridge	189:f392fc9709a3	233	*/
AnnaBridge	189:f392fc9709a3	234
AnnaBridge	189:f392fc9709a3	235
AnnaBridge	189:f392fc9709a3	236	/**
AnnaBridge	189:f392fc9709a3	237	* @}
AnnaBridge	189:f392fc9709a3	238	*/
AnnaBridge	189:f392fc9709a3	239
AnnaBridge	189:f392fc9709a3	240	#endif
AnnaBridge	189:f392fc9709a3	241
AnnaBridge	189:f392fc9709a3	242	/* Exported types ------------------------------------------------------------*/
AnnaBridge	189:f392fc9709a3	243	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	189:f392fc9709a3	244	/** @defgroup ADC_LL_ES_INIT ADC Exported Init structure
AnnaBridge	189:f392fc9709a3	245	* @{
AnnaBridge	189:f392fc9709a3	246	*/
AnnaBridge	189:f392fc9709a3	247
AnnaBridge	189:f392fc9709a3	248	/**
AnnaBridge	189:f392fc9709a3	249	* @brief Structure definition of some features of ADC common parameters
AnnaBridge	189:f392fc9709a3	250	* and multimode
AnnaBridge	189:f392fc9709a3	251	* (all ADC instances belonging to the same ADC common instance).
AnnaBridge	189:f392fc9709a3	252	* @note The setting of these parameters by function @ref LL_ADC_CommonInit()
AnnaBridge	189:f392fc9709a3	253	* is conditioned to ADC instances state (all ADC instances
AnnaBridge	189:f392fc9709a3	254	* sharing the same ADC common instance):
AnnaBridge	189:f392fc9709a3	255	* All ADC instances sharing the same ADC common instance must be
AnnaBridge	189:f392fc9709a3	256	* disabled.
AnnaBridge	189:f392fc9709a3	257	*/
AnnaBridge	189:f392fc9709a3	258	typedef struct
AnnaBridge	189:f392fc9709a3	259	{
AnnaBridge	189:f392fc9709a3	260	uint32_t CommonClock; /*!< Set parameter common to several ADC: Clock source and prescaler.
AnnaBridge	189:f392fc9709a3	261	This parameter can be a value of @ref ADC_LL_EC_COMMON_CLOCK_SOURCE
AnnaBridge	189:f392fc9709a3	262
AnnaBridge	189:f392fc9709a3	263	This feature can be modified afterwards using unitary function @ref LL_ADC_SetCommonClock(). */
AnnaBridge	189:f392fc9709a3	264
AnnaBridge	189:f392fc9709a3	265	} LL_ADC_CommonInitTypeDef;
AnnaBridge	189:f392fc9709a3	266
AnnaBridge	189:f392fc9709a3	267	/**
AnnaBridge	189:f392fc9709a3	268	* @brief Structure definition of some features of ADC instance.
AnnaBridge	189:f392fc9709a3	269	* @note These parameters have an impact on ADC scope: ADC instance.
AnnaBridge	189:f392fc9709a3	270	* Refer to corresponding unitary functions into
AnnaBridge	189:f392fc9709a3	271	* @ref ADC_LL_EF_Configuration_ADC_Instance .
AnnaBridge	189:f392fc9709a3	272	* @note The setting of these parameters by function @ref LL_ADC_Init()
AnnaBridge	189:f392fc9709a3	273	* is conditioned to ADC state:
AnnaBridge	189:f392fc9709a3	274	* ADC instance must be disabled.
AnnaBridge	189:f392fc9709a3	275	* This condition is applied to all ADC features, for efficiency
AnnaBridge	189:f392fc9709a3	276	* and compatibility over all STM32 families. However, the different
AnnaBridge	189:f392fc9709a3	277	* features can be set under different ADC state conditions
AnnaBridge	189:f392fc9709a3	278	* (setting possible with ADC enabled without conversion on going,
AnnaBridge	189:f392fc9709a3	279	* ADC enabled with conversion on going, ...)
AnnaBridge	189:f392fc9709a3	280	* Each feature can be updated afterwards with a unitary function
AnnaBridge	189:f392fc9709a3	281	* and potentially with ADC in a different state than disabled,
AnnaBridge	189:f392fc9709a3	282	* refer to description of each function for setting
AnnaBridge	189:f392fc9709a3	283	* conditioned to ADC state.
AnnaBridge	189:f392fc9709a3	284	*/
AnnaBridge	189:f392fc9709a3	285	typedef struct
AnnaBridge	189:f392fc9709a3	286	{
AnnaBridge	189:f392fc9709a3	287	uint32_t Clock; /*!< Set ADC instance clock source and prescaler.
AnnaBridge	189:f392fc9709a3	288	This parameter can be a value of @ref ADC_LL_EC_CLOCK_SOURCE
AnnaBridge	189:f392fc9709a3	289	@note On this STM32 serie, this parameter has some clock ratio constraints:
AnnaBridge	189:f392fc9709a3	290	ADC clock synchronous (from PCLK) with prescaler 1 must be enabled only if PCLK has a 50% duty clock cycle
AnnaBridge	189:f392fc9709a3	291	(APB prescaler configured inside the RCC must be bypassed and the system clock must by 50% duty cycle).
AnnaBridge	189:f392fc9709a3	292
AnnaBridge	189:f392fc9709a3	293
AnnaBridge	189:f392fc9709a3	294	This feature can be modified afterwards using unitary function @ref LL_ADC_SetClock().
AnnaBridge	189:f392fc9709a3	295	For more details, refer to description of this function. */
AnnaBridge	189:f392fc9709a3	296
AnnaBridge	189:f392fc9709a3	297	uint32_t Resolution; /*!< Set ADC resolution.
AnnaBridge	189:f392fc9709a3	298	This parameter can be a value of @ref ADC_LL_EC_RESOLUTION
AnnaBridge	189:f392fc9709a3	299
AnnaBridge	189:f392fc9709a3	300	This feature can be modified afterwards using unitary function @ref LL_ADC_SetResolution(). */
AnnaBridge	189:f392fc9709a3	301
AnnaBridge	189:f392fc9709a3	302	uint32_t DataAlignment; /*!< Set ADC conversion data alignment.
AnnaBridge	189:f392fc9709a3	303	This parameter can be a value of @ref ADC_LL_EC_DATA_ALIGN
AnnaBridge	189:f392fc9709a3	304
AnnaBridge	189:f392fc9709a3	305	This feature can be modified afterwards using unitary function @ref LL_ADC_SetDataAlignment(). */
AnnaBridge	189:f392fc9709a3	306
AnnaBridge	189:f392fc9709a3	307	uint32_t LowPowerMode; /*!< Set ADC low power mode.
AnnaBridge	189:f392fc9709a3	308	This parameter can be a value of @ref ADC_LL_EC_LP_MODE
AnnaBridge	189:f392fc9709a3	309
AnnaBridge	189:f392fc9709a3	310	This feature can be modified afterwards using unitary function @ref LL_ADC_SetLowPowerMode(). */
AnnaBridge	189:f392fc9709a3	311
AnnaBridge	189:f392fc9709a3	312	} LL_ADC_InitTypeDef;
AnnaBridge	189:f392fc9709a3	313
AnnaBridge	189:f392fc9709a3	314	/**
AnnaBridge	189:f392fc9709a3	315	* @brief Structure definition of some features of ADC group regular.
AnnaBridge	189:f392fc9709a3	316	* @note These parameters have an impact on ADC scope: ADC group regular.
AnnaBridge	189:f392fc9709a3	317	* Refer to corresponding unitary functions into
AnnaBridge	189:f392fc9709a3	318	* @ref ADC_LL_EF_Configuration_ADC_Group_Regular
AnnaBridge	189:f392fc9709a3	319	* (functions with prefix "REG").
AnnaBridge	189:f392fc9709a3	320	* @note The setting of these parameters by function @ref LL_ADC_REG_Init()
AnnaBridge	189:f392fc9709a3	321	* is conditioned to ADC state:
AnnaBridge	189:f392fc9709a3	322	* ADC instance must be disabled.
AnnaBridge	189:f392fc9709a3	323	* This condition is applied to all ADC features, for efficiency
AnnaBridge	189:f392fc9709a3	324	* and compatibility over all STM32 families. However, the different
AnnaBridge	189:f392fc9709a3	325	* features can be set under different ADC state conditions
AnnaBridge	189:f392fc9709a3	326	* (setting possible with ADC enabled without conversion on going,
AnnaBridge	189:f392fc9709a3	327	* ADC enabled with conversion on going, ...)
AnnaBridge	189:f392fc9709a3	328	* Each feature can be updated afterwards with a unitary function
AnnaBridge	189:f392fc9709a3	329	* and potentially with ADC in a different state than disabled,
AnnaBridge	189:f392fc9709a3	330	* refer to description of each function for setting
AnnaBridge	189:f392fc9709a3	331	* conditioned to ADC state.
AnnaBridge	189:f392fc9709a3	332	*/
AnnaBridge	189:f392fc9709a3	333	typedef struct
AnnaBridge	189:f392fc9709a3	334	{
AnnaBridge	189:f392fc9709a3	335	uint32_t TriggerSource; /*!< Set ADC group regular conversion trigger source: internal (SW start) or from external IP (timer event, external interrupt line).
AnnaBridge	189:f392fc9709a3	336	This parameter can be a value of @ref ADC_LL_EC_REG_TRIGGER_SOURCE
AnnaBridge	189:f392fc9709a3	337	@note On this STM32 serie, setting trigger source to external trigger also set trigger polarity to rising edge
AnnaBridge	189:f392fc9709a3	338	(default setting for compatibility with some ADC on other STM32 families having this setting set by HW default value).
AnnaBridge	189:f392fc9709a3	339	In case of need to modify trigger edge, use function @ref LL_ADC_REG_SetTriggerEdge().
AnnaBridge	189:f392fc9709a3	340
AnnaBridge	189:f392fc9709a3	341	This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetTriggerSource(). */
AnnaBridge	189:f392fc9709a3	342
AnnaBridge	189:f392fc9709a3	343	uint32_t SequencerDiscont; /*!< Set ADC group regular sequencer discontinuous mode: sequence subdivided and scan conversions interrupted every selected number of ranks.
AnnaBridge	189:f392fc9709a3	344	This parameter can be a value of @ref ADC_LL_EC_REG_SEQ_DISCONT_MODE
AnnaBridge	189:f392fc9709a3	345	@note This parameter has an effect only if group regular sequencer is enabled
AnnaBridge	189:f392fc9709a3	346	(several ADC channels enabled in group regular sequencer).
AnnaBridge	189:f392fc9709a3	347
AnnaBridge	189:f392fc9709a3	348	This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetSequencerDiscont(). */
AnnaBridge	189:f392fc9709a3	349
AnnaBridge	189:f392fc9709a3	350	uint32_t ContinuousMode; /*!< Set ADC continuous conversion mode on ADC group regular, whether ADC conversions are performed in single mode (one conversion per trigger) or in continuous mode (after the first trigger, following conversions launched successively automatically).
AnnaBridge	189:f392fc9709a3	351	This parameter can be a value of @ref ADC_LL_EC_REG_CONTINUOUS_MODE
AnnaBridge	189:f392fc9709a3	352	Note: It is not possible to enable both ADC group regular continuous mode and discontinuous mode.
AnnaBridge	189:f392fc9709a3	353
AnnaBridge	189:f392fc9709a3	354	This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetContinuousMode(). */
AnnaBridge	189:f392fc9709a3	355
AnnaBridge	189:f392fc9709a3	356	uint32_t DMATransfer; /*!< Set ADC group regular conversion data transfer: no transfer or transfer by DMA, and DMA requests mode.
AnnaBridge	189:f392fc9709a3	357	This parameter can be a value of @ref ADC_LL_EC_REG_DMA_TRANSFER
AnnaBridge	189:f392fc9709a3	358
AnnaBridge	189:f392fc9709a3	359	This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetDMATransfer(). */
AnnaBridge	189:f392fc9709a3	360
AnnaBridge	189:f392fc9709a3	361	uint32_t Overrun; /*!< Set ADC group regular behavior in case of overrun:
AnnaBridge	189:f392fc9709a3	362	data preserved or overwritten.
AnnaBridge	189:f392fc9709a3	363	This parameter can be a value of @ref ADC_LL_EC_REG_OVR_DATA_BEHAVIOR
AnnaBridge	189:f392fc9709a3	364
AnnaBridge	189:f392fc9709a3	365	This feature can be modified afterwards using unitary function @ref LL_ADC_REG_SetOverrun(). */
AnnaBridge	189:f392fc9709a3	366
AnnaBridge	189:f392fc9709a3	367	} LL_ADC_REG_InitTypeDef;
AnnaBridge	189:f392fc9709a3	368
AnnaBridge	189:f392fc9709a3	369	/**
AnnaBridge	189:f392fc9709a3	370	* @}
AnnaBridge	189:f392fc9709a3	371	*/
AnnaBridge	189:f392fc9709a3	372	#endif /* USE_FULL_LL_DRIVER */
AnnaBridge	189:f392fc9709a3	373
AnnaBridge	189:f392fc9709a3	374	/* Exported constants --------------------------------------------------------*/
AnnaBridge	189:f392fc9709a3	375	/** @defgroup ADC_LL_Exported_Constants ADC Exported Constants
AnnaBridge	189:f392fc9709a3	376	* @{
AnnaBridge	189:f392fc9709a3	377	*/
AnnaBridge	189:f392fc9709a3	378
AnnaBridge	189:f392fc9709a3	379	/** @defgroup ADC_LL_EC_FLAG ADC flags
AnnaBridge	189:f392fc9709a3	380	* @brief Flags defines which can be used with LL_ADC_ReadReg function
AnnaBridge	189:f392fc9709a3	381	* @{
AnnaBridge	189:f392fc9709a3	382	*/
AnnaBridge	189:f392fc9709a3	383	#define LL_ADC_FLAG_ADRDY ADC_ISR_ADRDY /!< ADC flag ADC instance ready /
AnnaBridge	189:f392fc9709a3	384	#define LL_ADC_FLAG_EOC ADC_ISR_EOC /!< ADC flag ADC group regular end of unitary conversion /
AnnaBridge	189:f392fc9709a3	385	#define LL_ADC_FLAG_EOS ADC_ISR_EOS /!< ADC flag ADC group regular end of sequence conversions /
AnnaBridge	189:f392fc9709a3	386	#define LL_ADC_FLAG_OVR ADC_ISR_OVR /!< ADC flag ADC group regular overrun /
AnnaBridge	189:f392fc9709a3	387	#define LL_ADC_FLAG_EOSMP ADC_ISR_EOSMP /!< ADC flag ADC group regular end of sampling phase /
AnnaBridge	189:f392fc9709a3	388	#define LL_ADC_FLAG_AWD1 ADC_ISR_AWD /!< ADC flag ADC analog watchdog 1 /
AnnaBridge	189:f392fc9709a3	389	#define LL_ADC_FLAG_EOCAL ADC_ISR_EOCAL /!< ADC flag end of calibration /
AnnaBridge	189:f392fc9709a3	390	/**
AnnaBridge	189:f392fc9709a3	391	* @}
AnnaBridge	189:f392fc9709a3	392	*/
AnnaBridge	189:f392fc9709a3	393
AnnaBridge	189:f392fc9709a3	394	/** @defgroup ADC_LL_EC_IT ADC interruptions for configuration (interruption enable or disable)
AnnaBridge	189:f392fc9709a3	395	* @brief IT defines which can be used with LL_ADC_ReadReg and LL_ADC_WriteReg functions
AnnaBridge	189:f392fc9709a3	396	* @{
AnnaBridge	189:f392fc9709a3	397	*/
AnnaBridge	189:f392fc9709a3	398	#define LL_ADC_IT_ADRDY ADC_IER_ADRDYIE /!< ADC interruption ADC instance ready /
AnnaBridge	189:f392fc9709a3	399	#define LL_ADC_IT_EOC ADC_IER_EOCIE /!< ADC interruption ADC group regular end of unitary conversion /
AnnaBridge	189:f392fc9709a3	400	#define LL_ADC_IT_EOS ADC_IER_EOSIE /!< ADC interruption ADC group regular end of sequence conversions /
AnnaBridge	189:f392fc9709a3	401	#define LL_ADC_IT_OVR ADC_IER_OVRIE /!< ADC interruption ADC group regular overrun /
AnnaBridge	189:f392fc9709a3	402	#define LL_ADC_IT_EOSMP ADC_IER_EOSMPIE /!< ADC interruption ADC group regular end of sampling phase /
AnnaBridge	189:f392fc9709a3	403	#define LL_ADC_IT_AWD1 ADC_IER_AWDIE /!< ADC interruption ADC analog watchdog 1 /
AnnaBridge	189:f392fc9709a3	404	#define LL_ADC_IT_EOCAL ADC_IER_EOCALIE /!< ADC interruption ADC end of calibration /
AnnaBridge	189:f392fc9709a3	405	/**
AnnaBridge	189:f392fc9709a3	406	* @}
AnnaBridge	189:f392fc9709a3	407	*/
AnnaBridge	189:f392fc9709a3	408
AnnaBridge	189:f392fc9709a3	409	/** @defgroup ADC_LL_EC_REGISTERS ADC registers compliant with specific purpose
AnnaBridge	189:f392fc9709a3	410	* @{
AnnaBridge	189:f392fc9709a3	411	*/
AnnaBridge	189:f392fc9709a3	412	/* List of ADC registers intended to be used (most commonly) with */
AnnaBridge	189:f392fc9709a3	413	/* DMA transfer. */
AnnaBridge	189:f392fc9709a3	414	/* Refer to function @ref LL_ADC_DMA_GetRegAddr(). */
AnnaBridge	189:f392fc9709a3	415	#define LL_ADC_DMA_REG_REGULAR_DATA ((uint32_t)0x00000000U) /* ADC group regular conversion data register (corresponding to register DR) to be used with ADC configured in independent mode. Without DMA transfer, register accessed by LL function @ref LL_ADC_REG_ReadConversionData32() and other functions @ref LL_ADC_REG_ReadConversionDatax() */
AnnaBridge	189:f392fc9709a3	416	/**
AnnaBridge	189:f392fc9709a3	417	* @}
AnnaBridge	189:f392fc9709a3	418	*/
AnnaBridge	189:f392fc9709a3	419
AnnaBridge	189:f392fc9709a3	420	/** @defgroup ADC_LL_EC_COMMON_CLOCK_SOURCE ADC common - Clock source
AnnaBridge	189:f392fc9709a3	421	* @{
AnnaBridge	189:f392fc9709a3	422	*/
AnnaBridge	189:f392fc9709a3	423	#define LL_ADC_CLOCK_ASYNC_DIV1 ((uint32_t)0x00000000U) /!< ADC asynchronous clock without prescaler /
AnnaBridge	189:f392fc9709a3	424	#define LL_ADC_CLOCK_ASYNC_DIV2 (ADC_CCR_PRESC_0) /!< ADC asynchronous clock with prescaler division by 2. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). /
AnnaBridge	189:f392fc9709a3	425	#define LL_ADC_CLOCK_ASYNC_DIV4 (ADC_CCR_PRESC_1 ) /!< ADC asynchronous clock with prescaler division by 4. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). /
AnnaBridge	189:f392fc9709a3	426	#define LL_ADC_CLOCK_ASYNC_DIV6 (ADC_CCR_PRESC_1 \| ADC_CCR_PRESC_0) /!< ADC asynchronous clock with prescaler division by 6. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). /
AnnaBridge	189:f392fc9709a3	427	#define LL_ADC_CLOCK_ASYNC_DIV8 (ADC_CCR_PRESC_2 ) /!< ADC asynchronous clock with prescaler division by 8. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). /
AnnaBridge	189:f392fc9709a3	428	#define LL_ADC_CLOCK_ASYNC_DIV10 (ADC_CCR_PRESC_2 \| ADC_CCR_PRESC_0) /!< ADC asynchronous clock with prescaler division by 10. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). /
AnnaBridge	189:f392fc9709a3	429	#define LL_ADC_CLOCK_ASYNC_DIV12 (ADC_CCR_PRESC_2 \| ADC_CCR_PRESC_1 ) /!< ADC asynchronous clock with prescaler division by 12. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). /
AnnaBridge	189:f392fc9709a3	430	#define LL_ADC_CLOCK_ASYNC_DIV16 (ADC_CCR_PRESC_2 \| ADC_CCR_PRESC_1 \| ADC_CCR_PRESC_0) /!< ADC asynchronous clock with prescaler division by 16. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). /
AnnaBridge	189:f392fc9709a3	431	#define LL_ADC_CLOCK_ASYNC_DIV32 (ADC_CCR_PRESC_3) /!< ADC asynchronous clock with prescaler division by 32. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). /
AnnaBridge	189:f392fc9709a3	432	#define LL_ADC_CLOCK_ASYNC_DIV64 (ADC_CCR_PRESC_3 \| ADC_CCR_PRESC_0) /!< ADC asynchronous clock with prescaler division by 64. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). /
AnnaBridge	189:f392fc9709a3	433	#define LL_ADC_CLOCK_ASYNC_DIV128 (ADC_CCR_PRESC_3 \| ADC_CCR_PRESC_1) /!< ADC asynchronous clock with prescaler division by 128. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). /
AnnaBridge	189:f392fc9709a3	434	#define LL_ADC_CLOCK_ASYNC_DIV256 (ADC_CCR_PRESC_3 \| ADC_CCR_PRESC_1 \| ADC_CCR_PRESC_0) /!< ADC asynchronous clock with prescaler division by 256. ADC common clock asynchonous prescaler is applied to each ADC instance if the corresponding ADC instance clock is set to clock source asynchronous (refer to function @ref LL_ADC_SetClock() ). /
AnnaBridge	189:f392fc9709a3	435	/**
AnnaBridge	189:f392fc9709a3	436	* @}
AnnaBridge	189:f392fc9709a3	437	*/
AnnaBridge	189:f392fc9709a3	438
AnnaBridge	189:f392fc9709a3	439	/** @defgroup ADC_LL_EC_COMMON_CLOCK_FREQ_MODE ADC common - Clock frequency mode
AnnaBridge	189:f392fc9709a3	440	* @{
AnnaBridge	189:f392fc9709a3	441	*/
AnnaBridge	189:f392fc9709a3	442	#define LL_ADC_CLOCK_FREQ_MODE_HIGH ((uint32_t)0x00000000U)/!< ADC clock mode to high frequency. On STM32L0, ADC clock frequency above 2.8MHz. /
AnnaBridge	189:f392fc9709a3	443	#define LL_ADC_CLOCK_FREQ_MODE_LOW (ADC_CCR_LFMEN) /!< ADC clock mode to low frequency. On STM32L0, ADC clock frequency below 2.8MHz. /
AnnaBridge	189:f392fc9709a3	444	/**
AnnaBridge	189:f392fc9709a3	445	* @}
AnnaBridge	189:f392fc9709a3	446	*/
AnnaBridge	189:f392fc9709a3	447
AnnaBridge	189:f392fc9709a3	448	/** @defgroup ADC_LL_EC_COMMON_PATH_INTERNAL ADC common - Measurement path to internal channels
AnnaBridge	189:f392fc9709a3	449	* @{
AnnaBridge	189:f392fc9709a3	450	*/
AnnaBridge	189:f392fc9709a3	451	/* Note: Other measurement paths to internal channels may be available */
AnnaBridge	189:f392fc9709a3	452	/* (connections to other peripherals). */
AnnaBridge	189:f392fc9709a3	453	/* If they are not listed below, they do not require any specific */
AnnaBridge	189:f392fc9709a3	454	/* path enable. In this case, Access to measurement path is done */
AnnaBridge	189:f392fc9709a3	455	/* only by selecting the corresponding ADC internal channel. */
AnnaBridge	189:f392fc9709a3	456	#define LL_ADC_PATH_INTERNAL_NONE ((uint32_t)0x00000000U)/!< ADC measurement pathes all disabled /
AnnaBridge	189:f392fc9709a3	457	#define LL_ADC_PATH_INTERNAL_VREFINT (ADC_CCR_VREFEN) /!< ADC measurement path to internal channel VrefInt /
AnnaBridge	189:f392fc9709a3	458	#define LL_ADC_PATH_INTERNAL_TEMPSENSOR (ADC_CCR_TSEN) /!< ADC measurement path to internal channel temperature sensor /
AnnaBridge	189:f392fc9709a3	459	#define LL_ADC_PATH_INTERNAL_VLCD (ADC_CCR_VLCDEN) /!< ADC measurement path to internal channel Vlcd /
AnnaBridge	189:f392fc9709a3	460	/**
AnnaBridge	189:f392fc9709a3	461	* @}
AnnaBridge	189:f392fc9709a3	462	*/
AnnaBridge	189:f392fc9709a3	463
AnnaBridge	189:f392fc9709a3	464	/** @defgroup ADC_LL_EC_CLOCK_SOURCE ADC instance - Clock source
AnnaBridge	189:f392fc9709a3	465	* @{
AnnaBridge	189:f392fc9709a3	466	*/
AnnaBridge	189:f392fc9709a3	467	#define LL_ADC_CLOCK_SYNC_PCLK_DIV4 (ADC_CFGR2_CKMODE_1) /!< ADC synchronous clock derived from AHB clock divided by 4 /
AnnaBridge	189:f392fc9709a3	468	#define LL_ADC_CLOCK_SYNC_PCLK_DIV2 (ADC_CFGR2_CKMODE_0) /!< ADC synchronous clock derived from AHB clock divided by 2 /
AnnaBridge	189:f392fc9709a3	469	#define LL_ADC_CLOCK_SYNC_PCLK_DIV1 (ADC_CFGR2_CKMODE_1 \| ADC_CFGR2_CKMODE_0) /!< ADC synchronous clock derived from AHB clock not divided /
AnnaBridge	189:f392fc9709a3	470	#define LL_ADC_CLOCK_ASYNC ((uint32_t)0x00000000U) /!< ADC asynchronous clock. Asynchronous clock prescaler can be configured using function @ref LL_ADC_SetCommonClock(). /
AnnaBridge	189:f392fc9709a3	471	/**
AnnaBridge	189:f392fc9709a3	472	* @}
AnnaBridge	189:f392fc9709a3	473	*/
AnnaBridge	189:f392fc9709a3	474
AnnaBridge	189:f392fc9709a3	475	/** @defgroup ADC_LL_EC_RESOLUTION ADC instance - Resolution
AnnaBridge	189:f392fc9709a3	476	* @{
AnnaBridge	189:f392fc9709a3	477	*/
AnnaBridge	189:f392fc9709a3	478	#define LL_ADC_RESOLUTION_12B ((uint32_t)0x00000000U) /!< ADC resolution 12 bits /
AnnaBridge	189:f392fc9709a3	479	#define LL_ADC_RESOLUTION_10B ( ADC_CFGR1_RES_0) /!< ADC resolution 10 bits /
AnnaBridge	189:f392fc9709a3	480	#define LL_ADC_RESOLUTION_8B (ADC_CFGR1_RES_1 ) /!< ADC resolution 8 bits /
AnnaBridge	189:f392fc9709a3	481	#define LL_ADC_RESOLUTION_6B (ADC_CFGR1_RES_1 \| ADC_CFGR1_RES_0) /!< ADC resolution 6 bits /
AnnaBridge	189:f392fc9709a3	482	/**
AnnaBridge	189:f392fc9709a3	483	* @}
AnnaBridge	189:f392fc9709a3	484	*/
AnnaBridge	189:f392fc9709a3	485
AnnaBridge	189:f392fc9709a3	486	/** @defgroup ADC_LL_EC_DATA_ALIGN ADC instance - Data alignment
AnnaBridge	189:f392fc9709a3	487	* @{
AnnaBridge	189:f392fc9709a3	488	*/
AnnaBridge	189:f392fc9709a3	489	#define LL_ADC_DATA_ALIGN_RIGHT ((uint32_t)0x00000000U)/!< ADC conversion data alignment: right aligned (alignment on data register LSB bit 0)/
AnnaBridge	189:f392fc9709a3	490	#define LL_ADC_DATA_ALIGN_LEFT (ADC_CFGR1_ALIGN) /!< ADC conversion data alignment: left aligned (aligment on data register MSB bit 15)/
AnnaBridge	189:f392fc9709a3	491	/**
AnnaBridge	189:f392fc9709a3	492	* @}
AnnaBridge	189:f392fc9709a3	493	*/
AnnaBridge	189:f392fc9709a3	494
AnnaBridge	189:f392fc9709a3	495	/** @defgroup ADC_LL_EC_LP_MODE ADC instance - Low power mode
AnnaBridge	189:f392fc9709a3	496	* @{
AnnaBridge	189:f392fc9709a3	497	*/
AnnaBridge	189:f392fc9709a3	498	#define LL_ADC_LP_MODE_NONE ((uint32_t)0x00000000U) /!< No ADC low power mode activated /
AnnaBridge	189:f392fc9709a3	499	#define LL_ADC_LP_AUTOWAIT (ADC_CFGR1_WAIT) /!< ADC low power mode auto delay: Dynamic low power mode, ADC conversions are performed only when necessary (when previous ADC conversion data is read). See description with function @ref LL_ADC_SetLowPowerMode(). /
AnnaBridge	189:f392fc9709a3	500	#define LL_ADC_LP_AUTOPOWEROFF (ADC_CFGR1_AUTOFF) /!< ADC low power mode auto power-off: the ADC automatically powers-off after a ADC conversion and automatically wakes up when a new ADC conversion is triggered (with startup time between trigger and start of sampling). See description with function @ref LL_ADC_SetLowPowerMode(). /
AnnaBridge	189:f392fc9709a3	501	#define LL_ADC_LP_AUTOWAIT_AUTOPOWEROFF (ADC_CFGR1_WAIT \| ADC_CFGR1_AUTOFF) /!< ADC low power modes auto wait and auto power-off combined. See description with function @ref LL_ADC_SetLowPowerMode(). /
AnnaBridge	189:f392fc9709a3	502	/**
AnnaBridge	189:f392fc9709a3	503	* @}
AnnaBridge	189:f392fc9709a3	504	*/
AnnaBridge	189:f392fc9709a3	505
AnnaBridge	189:f392fc9709a3	506	/** @defgroup ADC_LL_EC_GROUPS ADC instance - Groups
AnnaBridge	189:f392fc9709a3	507	* @{
AnnaBridge	189:f392fc9709a3	508	*/
AnnaBridge	189:f392fc9709a3	509	#define LL_ADC_GROUP_REGULAR ((uint32_t)0x00000001U) /!< ADC group regular (available on all STM32 devices) /
AnnaBridge	189:f392fc9709a3	510	/**
AnnaBridge	189:f392fc9709a3	511	* @}
AnnaBridge	189:f392fc9709a3	512	*/
AnnaBridge	189:f392fc9709a3	513
AnnaBridge	189:f392fc9709a3	514	/** @defgroup ADC_LL_EC_CHANNEL ADC instance - Channel number
AnnaBridge	189:f392fc9709a3	515	* @{
AnnaBridge	189:f392fc9709a3	516	*/
AnnaBridge	189:f392fc9709a3	517	#define LL_ADC_CHANNEL_0 (ADC_CHANNEL_0_NUMBER \| ADC_CHANNEL_0_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN0 /
AnnaBridge	189:f392fc9709a3	518	#define LL_ADC_CHANNEL_1 (ADC_CHANNEL_1_NUMBER \| ADC_CHANNEL_1_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN1 /
AnnaBridge	189:f392fc9709a3	519	#define LL_ADC_CHANNEL_2 (ADC_CHANNEL_2_NUMBER \| ADC_CHANNEL_2_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN2 /
AnnaBridge	189:f392fc9709a3	520	#define LL_ADC_CHANNEL_3 (ADC_CHANNEL_3_NUMBER \| ADC_CHANNEL_3_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN3 /
AnnaBridge	189:f392fc9709a3	521	#define LL_ADC_CHANNEL_4 (ADC_CHANNEL_4_NUMBER \| ADC_CHANNEL_4_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN4 /
AnnaBridge	189:f392fc9709a3	522	#define LL_ADC_CHANNEL_5 (ADC_CHANNEL_5_NUMBER \| ADC_CHANNEL_5_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN5 /
AnnaBridge	189:f392fc9709a3	523	#define LL_ADC_CHANNEL_6 (ADC_CHANNEL_6_NUMBER \| ADC_CHANNEL_6_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN6 /
AnnaBridge	189:f392fc9709a3	524	#define LL_ADC_CHANNEL_7 (ADC_CHANNEL_7_NUMBER \| ADC_CHANNEL_7_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN7 /
AnnaBridge	189:f392fc9709a3	525	#define LL_ADC_CHANNEL_8 (ADC_CHANNEL_8_NUMBER \| ADC_CHANNEL_8_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN8 /
AnnaBridge	189:f392fc9709a3	526	#define LL_ADC_CHANNEL_9 (ADC_CHANNEL_9_NUMBER \| ADC_CHANNEL_9_BITFIELD ) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN9 /
AnnaBridge	189:f392fc9709a3	527	#define LL_ADC_CHANNEL_10 (ADC_CHANNEL_10_NUMBER \| ADC_CHANNEL_10_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN10 /
AnnaBridge	189:f392fc9709a3	528	#define LL_ADC_CHANNEL_11 (ADC_CHANNEL_11_NUMBER \| ADC_CHANNEL_11_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN11 /
AnnaBridge	189:f392fc9709a3	529	#define LL_ADC_CHANNEL_12 (ADC_CHANNEL_12_NUMBER \| ADC_CHANNEL_12_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN12 /
AnnaBridge	189:f392fc9709a3	530	#define LL_ADC_CHANNEL_13 (ADC_CHANNEL_13_NUMBER \| ADC_CHANNEL_13_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN13 /
AnnaBridge	189:f392fc9709a3	531	#define LL_ADC_CHANNEL_14 (ADC_CHANNEL_14_NUMBER \| ADC_CHANNEL_14_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN14 /
AnnaBridge	189:f392fc9709a3	532	#define LL_ADC_CHANNEL_15 (ADC_CHANNEL_15_NUMBER \| ADC_CHANNEL_15_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN15 /
AnnaBridge	189:f392fc9709a3	533	#define LL_ADC_CHANNEL_17 (ADC_CHANNEL_17_NUMBER \| ADC_CHANNEL_17_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN17 /
AnnaBridge	189:f392fc9709a3	534	#define LL_ADC_CHANNEL_18 (ADC_CHANNEL_18_NUMBER \| ADC_CHANNEL_18_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN18 /
AnnaBridge	189:f392fc9709a3	535	#define LL_ADC_CHANNEL_VREFINT (LL_ADC_CHANNEL_17 \| ADC_CHANNEL_ID_INTERNAL_CH) /!< ADC internal channel connected to VrefInt: Internal voltage reference. /
AnnaBridge	189:f392fc9709a3	536	#define LL_ADC_CHANNEL_TEMPSENSOR (LL_ADC_CHANNEL_18 \| ADC_CHANNEL_ID_INTERNAL_CH) /!< ADC internal channel connected to Temperature sensor. /
AnnaBridge	189:f392fc9709a3	537	#if defined(ADC_CCR_VLCDEN)
AnnaBridge	189:f392fc9709a3	538	#define LL_ADC_CHANNEL_16 (ADC_CHANNEL_16_NUMBER \| ADC_CHANNEL_16_BITFIELD) /!< ADC external channel (channel connected to GPIO pin) ADCx_IN16 /
AnnaBridge	189:f392fc9709a3	539	#define LL_ADC_CHANNEL_VLCD (LL_ADC_CHANNEL_16 \| ADC_CHANNEL_ID_INTERNAL_CH) /!< ADC internal channel connected to Vlcd: Vlcd voltage through a divider ladder of factor 1/4, 1/3 or 1/2 (set by LCD voltage generator biasing), to have Vlcd always below Vdda. /
AnnaBridge	189:f392fc9709a3	540	#endif
AnnaBridge	189:f392fc9709a3	541	/**
AnnaBridge	189:f392fc9709a3	542	* @}
AnnaBridge	189:f392fc9709a3	543	*/
AnnaBridge	189:f392fc9709a3	544
AnnaBridge	189:f392fc9709a3	545	/** @defgroup ADC_LL_EC_REG_TRIGGER_SOURCE ADC group regular - Trigger source
AnnaBridge	189:f392fc9709a3	546	* @{
AnnaBridge	189:f392fc9709a3	547	*/
AnnaBridge	189:f392fc9709a3	548	#define LL_ADC_REG_TRIG_SOFTWARE ((uint32_t)0x00000000U) /!< ADC group regular conversion trigger internal: SW start. /
AnnaBridge	189:f392fc9709a3	549	#define LL_ADC_REG_TRIG_EXT_TIM6_TRGO (ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM6 TRGO. Trigger edge set to rising edge (default setting). /
AnnaBridge	189:f392fc9709a3	550	#define LL_ADC_REG_TRIG_EXT_TIM21_CH2 (ADC_CFGR1_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM21 channel 2 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting). /
AnnaBridge	189:f392fc9709a3	551	#define LL_ADC_REG_TRIG_EXT_TIM2_TRGO (ADC_CFGR1_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM2 TRGO. Trigger edge set to rising edge (default setting). /
AnnaBridge	189:f392fc9709a3	552	#define LL_ADC_REG_TRIG_EXT_TIM2_CH4 (ADC_CFGR1_EXTSEL_1 \| ADC_CFGR1_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM2 channel 4 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting). /
AnnaBridge	189:f392fc9709a3	553	#define LL_ADC_REG_TRIG_EXT_TIM22_TRGO (ADC_CFGR1_EXTSEL_2 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM22 TRGO. Trigger edge set to rising edge (default setting). /
AnnaBridge	189:f392fc9709a3	554	#define LL_ADC_REG_TRIG_EXT_TIM2_CH3 (ADC_CFGR1_EXTSEL_2 \| ADC_CFGR1_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM2 channel 4 event (capture compare: input capture or output capture). Trigger edge set to rising edge (default setting). /
AnnaBridge	189:f392fc9709a3	555	#define LL_ADC_REG_TRIG_EXT_TIM3_TRGO (ADC_CFGR1_EXTSEL_2 \| ADC_CFGR1_EXTSEL_1 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: TIM3 TRG0. Trigger edge set to rising edge (default setting). /
AnnaBridge	189:f392fc9709a3	556	#define LL_ADC_REG_TRIG_EXT_EXTI_LINE11 (ADC_CFGR1_EXTSEL_2 \| ADC_CFGR1_EXTSEL_1 \| ADC_CFGR1_EXTSEL_0 \| ADC_REG_TRIG_EXT_EDGE_DEFAULT) /!< ADC group regular conversion trigger from external IP: external interrupt line 11. Trigger edge set to rising edge (default setting). /
AnnaBridge	189:f392fc9709a3	557	/**
AnnaBridge	189:f392fc9709a3	558	* @}
AnnaBridge	189:f392fc9709a3	559	*/
AnnaBridge	189:f392fc9709a3	560
AnnaBridge	189:f392fc9709a3	561	/** @defgroup ADC_LL_EC_REG_TRIGGER_EDGE ADC group regular - Trigger edge
AnnaBridge	189:f392fc9709a3	562	* @{
AnnaBridge	189:f392fc9709a3	563	*/
AnnaBridge	189:f392fc9709a3	564	#define LL_ADC_REG_TRIG_EXT_RISING ( ADC_CFGR1_EXTEN_0) /!< ADC group regular conversion trigger polarity set to rising edge /
AnnaBridge	189:f392fc9709a3	565	#define LL_ADC_REG_TRIG_EXT_FALLING (ADC_CFGR1_EXTEN_1 ) /!< ADC group regular conversion trigger polarity set to falling edge /
AnnaBridge	189:f392fc9709a3	566	#define LL_ADC_REG_TRIG_EXT_RISINGFALLING (ADC_CFGR1_EXTEN_1 \| ADC_CFGR1_EXTEN_0) /!< ADC group regular conversion trigger polarity set to both rising and falling edges /
AnnaBridge	189:f392fc9709a3	567	/**
AnnaBridge	189:f392fc9709a3	568	* @}
AnnaBridge	189:f392fc9709a3	569	*/
AnnaBridge	189:f392fc9709a3	570
AnnaBridge	189:f392fc9709a3	571	/** @defgroup ADC_LL_EC_REG_CONTINUOUS_MODE ADC group regular - Continuous mode
AnnaBridge	189:f392fc9709a3	572	* @{
AnnaBridge	189:f392fc9709a3	573	*/
AnnaBridge	189:f392fc9709a3	574	#define LL_ADC_REG_CONV_SINGLE ((uint32_t)0x00000000U) /!< ADC conversions are performed in single mode: one conversion per trigger /
AnnaBridge	189:f392fc9709a3	575	#define LL_ADC_REG_CONV_CONTINUOUS (ADC_CFGR1_CONT) /!< ADC conversions are performed in continuous mode: after the first trigger, following conversions launched successively automatically /
AnnaBridge	189:f392fc9709a3	576	/**
AnnaBridge	189:f392fc9709a3	577	* @}
AnnaBridge	189:f392fc9709a3	578	*/
AnnaBridge	189:f392fc9709a3	579
AnnaBridge	189:f392fc9709a3	580	/** @defgroup ADC_LL_EC_REG_DMA_TRANSFER ADC group regular - DMA transfer of ADC conversion data
AnnaBridge	189:f392fc9709a3	581	* @{
AnnaBridge	189:f392fc9709a3	582	*/
AnnaBridge	189:f392fc9709a3	583	#define LL_ADC_REG_DMA_TRANSFER_NONE ((uint32_t)0x00000000U) /!< ADC conversions are not transferred by DMA /
AnnaBridge	189:f392fc9709a3	584	#define LL_ADC_REG_DMA_TRANSFER_LIMITED ( ADC_CFGR1_DMAEN) /!< ADC conversion data are transferred by DMA, in limited mode (one shot mode): DMA transfer requests are stopped when number of DMA data transfers (number of ADC conversions) is reached. This ADC mode is intended to be used with DMA mode non-circular. /
AnnaBridge	189:f392fc9709a3	585	#define LL_ADC_REG_DMA_TRANSFER_UNLIMITED (ADC_CFGR1_DMACFG \| ADC_CFGR1_DMAEN) /!< ADC conversion data are transferred by DMA, in unlimited mode: DMA transfer requests are unlimited, whatever number of DMA data transferred (number of ADC conversions). This ADC mode is intended to be used with DMA mode circular. /
AnnaBridge	189:f392fc9709a3	586	/**
AnnaBridge	189:f392fc9709a3	587	* @}
AnnaBridge	189:f392fc9709a3	588	*/
AnnaBridge	189:f392fc9709a3	589
AnnaBridge	189:f392fc9709a3	590	/** @defgroup ADC_LL_EC_REG_OVR_DATA_BEHAVIOR ADC group regular - Overrun behavior on conversion data
AnnaBridge	189:f392fc9709a3	591	* @{
AnnaBridge	189:f392fc9709a3	592	*/
AnnaBridge	189:f392fc9709a3	593	#define LL_ADC_REG_OVR_DATA_PRESERVED ((uint32_t)0x00000000U)/!< ADC group regular behavior in case of overrun: data preserved /
AnnaBridge	189:f392fc9709a3	594	#define LL_ADC_REG_OVR_DATA_OVERWRITTEN (ADC_CFGR1_OVRMOD) /!< ADC group regular behavior in case of overrun: data overwritten /
AnnaBridge	189:f392fc9709a3	595	/**
AnnaBridge	189:f392fc9709a3	596	* @}
AnnaBridge	189:f392fc9709a3	597	*/
AnnaBridge	189:f392fc9709a3	598
AnnaBridge	189:f392fc9709a3	599	/** @defgroup ADC_LL_EC_REG_SEQ_SCAN_DIRECTION ADC group regular - Sequencer scan direction
AnnaBridge	189:f392fc9709a3	600	* @{
AnnaBridge	189:f392fc9709a3	601	*/
AnnaBridge	189:f392fc9709a3	602	#define LL_ADC_REG_SEQ_SCAN_DIR_FORWARD ((uint32_t)0x00000000U)/!< ADC group regular sequencer scan direction forward: from lowest channel number to highest channel number (scan of all ranks, ADC conversion of ranks with channels enabled in sequencer). On some other STM32 families, this setting is not available and the default scan direction is forward. /
AnnaBridge	189:f392fc9709a3	603	#define LL_ADC_REG_SEQ_SCAN_DIR_BACKWARD (ADC_CFGR1_SCANDIR) /!< ADC group regular sequencer scan direction backward: from highest channel number to lowest channel number (scan of all ranks, ADC conversion of ranks with channels enabled in sequencer) /
AnnaBridge	189:f392fc9709a3	604	/**
AnnaBridge	189:f392fc9709a3	605	* @}
AnnaBridge	189:f392fc9709a3	606	*/
AnnaBridge	189:f392fc9709a3	607
AnnaBridge	189:f392fc9709a3	608	/** @defgroup ADC_LL_EC_REG_SEQ_DISCONT_MODE ADC group regular - Sequencer discontinuous mode
AnnaBridge	189:f392fc9709a3	609	* @{
AnnaBridge	189:f392fc9709a3	610	*/
AnnaBridge	189:f392fc9709a3	611	#define LL_ADC_REG_SEQ_DISCONT_DISABLE ((uint32_t)0x00000000U) /!< ADC group regular sequencer discontinuous mode disable /
AnnaBridge	189:f392fc9709a3	612	#define LL_ADC_REG_SEQ_DISCONT_1RANK (ADC_CFGR1_DISCEN) /!< ADC group regular sequencer discontinuous mode enable with sequence interruption every rank /
AnnaBridge	189:f392fc9709a3	613	/**
AnnaBridge	189:f392fc9709a3	614	* @}
AnnaBridge	189:f392fc9709a3	615	*/
AnnaBridge	189:f392fc9709a3	616
AnnaBridge	189:f392fc9709a3	617	/** @defgroup ADC_LL_EC_CHANNEL_SAMPLINGTIME Channel - Sampling time
AnnaBridge	189:f392fc9709a3	618	* @{
AnnaBridge	189:f392fc9709a3	619	*/
AnnaBridge	189:f392fc9709a3	620	#define LL_ADC_SAMPLINGTIME_1CYCLE_5 ((uint32_t)0x00000000U) /!< Sampling time 1.5 ADC clock cycle /
AnnaBridge	189:f392fc9709a3	621	#define LL_ADC_SAMPLINGTIME_3CYCLES_5 (ADC_SMPR_SMP_0) /!< Sampling time 3.5 ADC clock cycles /
AnnaBridge	189:f392fc9709a3	622	#define LL_ADC_SAMPLINGTIME_7CYCLES_5 (ADC_SMPR_SMP_1) /!< Sampling time 7.5 ADC clock cycles /
AnnaBridge	189:f392fc9709a3	623	#define LL_ADC_SAMPLINGTIME_12CYCLES_5 (ADC_SMPR_SMP_1 \| ADC_SMPR_SMP_0) /!< Sampling time 12.5 ADC clock cycles /
AnnaBridge	189:f392fc9709a3	624	#define LL_ADC_SAMPLINGTIME_19CYCLES_5 (ADC_SMPR_SMP_2) /!< Sampling time 19.5 ADC clock cycles /
AnnaBridge	189:f392fc9709a3	625	#define LL_ADC_SAMPLINGTIME_39CYCLES_5 (ADC_SMPR_SMP_2 \| ADC_SMPR_SMP_0) /!< Sampling time 39.5 ADC clock cycles /
AnnaBridge	189:f392fc9709a3	626	#define LL_ADC_SAMPLINGTIME_79CYCLES_5 (ADC_SMPR_SMP_2 \| ADC_SMPR_SMP_1) /!< Sampling time 79.5 ADC clock cycles /
AnnaBridge	189:f392fc9709a3	627	#define LL_ADC_SAMPLINGTIME_160CYCLES_5 (ADC_SMPR_SMP_2 \| ADC_SMPR_SMP_1 \| ADC_SMPR_SMP_0) /!< Sampling time 160.5 ADC clock cycles /
AnnaBridge	189:f392fc9709a3	628	/**
AnnaBridge	189:f392fc9709a3	629	* @}
AnnaBridge	189:f392fc9709a3	630	*/
AnnaBridge	189:f392fc9709a3	631
AnnaBridge	189:f392fc9709a3	632	/** @defgroup ADC_LL_EC_AWD_NUMBER Analog watchdog - Analog watchdog number
AnnaBridge	189:f392fc9709a3	633	* @{
AnnaBridge	189:f392fc9709a3	634	*/
AnnaBridge	189:f392fc9709a3	635	#define LL_ADC_AWD1 (ADC_AWD_CR1_CHANNEL_MASK \| ADC_AWD_CR1_REGOFFSET) /!< ADC analog watchdog number 1 /
AnnaBridge	189:f392fc9709a3	636	/**
AnnaBridge	189:f392fc9709a3	637	* @}
AnnaBridge	189:f392fc9709a3	638	*/
AnnaBridge	189:f392fc9709a3	639
AnnaBridge	189:f392fc9709a3	640	/** @defgroup ADC_LL_EC_AWD_CHANNELS Analog watchdog - Monitored channels
AnnaBridge	189:f392fc9709a3	641	* @{
AnnaBridge	189:f392fc9709a3	642	*/
AnnaBridge	189:f392fc9709a3	643	#define LL_ADC_AWD_DISABLE ((uint32_t)0x00000000U) /!< ADC analog watchdog monitoring disabled /
AnnaBridge	189:f392fc9709a3	644	#define LL_ADC_AWD_ALL_CHANNELS_REG ( ADC_CFGR1_AWDEN ) /!< ADC analog watchdog monitoring of all channels, converted by group regular only /
AnnaBridge	189:f392fc9709a3	645	#define LL_ADC_AWD_CHANNEL_0_REG ((LL_ADC_CHANNEL_0 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN0, converted by group regular only /
AnnaBridge	189:f392fc9709a3	646	#define LL_ADC_AWD_CHANNEL_1_REG ((LL_ADC_CHANNEL_1 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN1, converted by group regular only /
AnnaBridge	189:f392fc9709a3	647	#define LL_ADC_AWD_CHANNEL_2_REG ((LL_ADC_CHANNEL_2 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN2, converted by group regular only /
AnnaBridge	189:f392fc9709a3	648	#define LL_ADC_AWD_CHANNEL_3_REG ((LL_ADC_CHANNEL_3 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN3, converted by group regular only /
AnnaBridge	189:f392fc9709a3	649	#define LL_ADC_AWD_CHANNEL_4_REG ((LL_ADC_CHANNEL_4 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN4, converted by group regular only /
AnnaBridge	189:f392fc9709a3	650	#define LL_ADC_AWD_CHANNEL_5_REG ((LL_ADC_CHANNEL_5 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN5, converted by group regular only /
AnnaBridge	189:f392fc9709a3	651	#define LL_ADC_AWD_CHANNEL_6_REG ((LL_ADC_CHANNEL_6 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN6, converted by group regular only /
AnnaBridge	189:f392fc9709a3	652	#define LL_ADC_AWD_CHANNEL_7_REG ((LL_ADC_CHANNEL_7 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN7, converted by group regular only /
AnnaBridge	189:f392fc9709a3	653	#define LL_ADC_AWD_CHANNEL_8_REG ((LL_ADC_CHANNEL_8 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN8, converted by group regular only /
AnnaBridge	189:f392fc9709a3	654	#define LL_ADC_AWD_CHANNEL_9_REG ((LL_ADC_CHANNEL_9 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN9, converted by group regular only /
AnnaBridge	189:f392fc9709a3	655	#define LL_ADC_AWD_CHANNEL_10_REG ((LL_ADC_CHANNEL_10 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN10, converted by group regular only /
AnnaBridge	189:f392fc9709a3	656	#define LL_ADC_AWD_CHANNEL_11_REG ((LL_ADC_CHANNEL_11 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN11, converted by group regular only /
AnnaBridge	189:f392fc9709a3	657	#define LL_ADC_AWD_CHANNEL_12_REG ((LL_ADC_CHANNEL_12 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN12, converted by group regular only /
AnnaBridge	189:f392fc9709a3	658	#define LL_ADC_AWD_CHANNEL_13_REG ((LL_ADC_CHANNEL_13 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN13, converted by group regular only /
AnnaBridge	189:f392fc9709a3	659	#define LL_ADC_AWD_CHANNEL_14_REG ((LL_ADC_CHANNEL_14 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN14, converted by group regular only /
AnnaBridge	189:f392fc9709a3	660	#define LL_ADC_AWD_CHANNEL_15_REG ((LL_ADC_CHANNEL_15 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN15, converted by group regular only /
AnnaBridge	189:f392fc9709a3	661	#define LL_ADC_AWD_CHANNEL_17_REG ((LL_ADC_CHANNEL_17 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN17, converted by group regular only /
AnnaBridge	189:f392fc9709a3	662	#define LL_ADC_AWD_CHANNEL_18_REG ((LL_ADC_CHANNEL_18 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN18, converted by group regular only /
AnnaBridge	189:f392fc9709a3	663	#define LL_ADC_AWD_CH_VREFINT_REG ((LL_ADC_CHANNEL_VREFINT & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to VrefInt: Internal voltage reference, converted by group regular only /
AnnaBridge	189:f392fc9709a3	664	#define LL_ADC_AWD_CH_TEMPSENSOR_REG ((LL_ADC_CHANNEL_TEMPSENSOR & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to Temperature sensor, converted by group regular only /
AnnaBridge	189:f392fc9709a3	665	#if defined(ADC_CCR_VLCDEN)
AnnaBridge	189:f392fc9709a3	666	#define LL_ADC_AWD_CHANNEL_16_REG ((LL_ADC_CHANNEL_16 & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC external channel (channel connected to GPIO pin) ADCx_IN16, converted by group regular only /
AnnaBridge	189:f392fc9709a3	667	#define LL_ADC_AWD_CH_VLCD_REG ((LL_ADC_CHANNEL_VLCD & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL) /!< ADC analog watchdog monitoring of ADC internal channel connected to Vbat/3: Vbat voltage through a divider ladder of factor 1/3 to have Vbat always below Vdda, converted by group regular only /
AnnaBridge	189:f392fc9709a3	668	#endif
AnnaBridge	189:f392fc9709a3	669	/**
AnnaBridge	189:f392fc9709a3	670	* @}
AnnaBridge	189:f392fc9709a3	671	*/
AnnaBridge	189:f392fc9709a3	672
AnnaBridge	189:f392fc9709a3	673	/** @defgroup ADC_LL_EC_AWD_THRESHOLDS Analog watchdog - Thresholds
AnnaBridge	189:f392fc9709a3	674	* @{
AnnaBridge	189:f392fc9709a3	675	*/
AnnaBridge	189:f392fc9709a3	676	#define LL_ADC_AWD_THRESHOLD_HIGH (ADC_TR_HT ) /!< ADC analog watchdog threshold high /
AnnaBridge	189:f392fc9709a3	677	#define LL_ADC_AWD_THRESHOLD_LOW ( ADC_TR_LT) /!< ADC analog watchdog threshold low /
AnnaBridge	189:f392fc9709a3	678	#define LL_ADC_AWD_THRESHOLDS_HIGH_LOW (ADC_TR_HT \| ADC_TR_LT) /!< ADC analog watchdog both thresholds high and low concatenated into the same data /
AnnaBridge	189:f392fc9709a3	679	/**
AnnaBridge	189:f392fc9709a3	680	* @}
AnnaBridge	189:f392fc9709a3	681	*/
AnnaBridge	189:f392fc9709a3	682
AnnaBridge	189:f392fc9709a3	683	/** @defgroup ADC_LL_EC_OVS_SCOPE Oversampling - Oversampling scope
AnnaBridge	189:f392fc9709a3	684	* @{
AnnaBridge	189:f392fc9709a3	685	*/
AnnaBridge	189:f392fc9709a3	686	#define LL_ADC_OVS_DISABLE ((uint32_t)0x00000000U) /!< ADC oversampling disabled. /
AnnaBridge	189:f392fc9709a3	687	#define LL_ADC_OVS_GRP_REGULAR_CONTINUED ( ADC_CFGR2_OVSE) /!< ADC oversampling on conversions of ADC group regular. Literal suffix "continued" is kept for compatibility with other STM32 devices featuring ADC group injected, in this case other oversampling scope parameters are available. /
AnnaBridge	189:f392fc9709a3	688	/**
AnnaBridge	189:f392fc9709a3	689	* @}
AnnaBridge	189:f392fc9709a3	690	*/
AnnaBridge	189:f392fc9709a3	691
AnnaBridge	189:f392fc9709a3	692	/** @defgroup ADC_LL_EC_OVS_DISCONT_MODE Oversampling - Discontinuous mode
AnnaBridge	189:f392fc9709a3	693	* @{
AnnaBridge	189:f392fc9709a3	694	*/
AnnaBridge	189:f392fc9709a3	695	#define LL_ADC_OVS_REG_CONT ((uint32_t)0x00000000U)/!< ADC oversampling discontinuous mode: continuous mode (all conversions of oversampling ratio are done from 1 trigger) /
AnnaBridge	189:f392fc9709a3	696	#define LL_ADC_OVS_REG_DISCONT (ADC_CFGR2_TOVS) /!< ADC oversampling discontinuous mode: discontinuous mode (each conversion of oversampling ratio needs a trigger) /
AnnaBridge	189:f392fc9709a3	697	/**
AnnaBridge	189:f392fc9709a3	698	* @}
AnnaBridge	189:f392fc9709a3	699	*/
AnnaBridge	189:f392fc9709a3	700
AnnaBridge	189:f392fc9709a3	701	/** @defgroup ADC_LL_EC_OVS_RATIO Oversampling - Ratio
AnnaBridge	189:f392fc9709a3	702	* @{
AnnaBridge	189:f392fc9709a3	703	*/
AnnaBridge	189:f392fc9709a3	704	#define LL_ADC_OVS_RATIO_2 ((uint32_t)0x00000000U) /!< ADC oversampling ratio of 2 (2 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
AnnaBridge	189:f392fc9709a3	705	#define LL_ADC_OVS_RATIO_4 ( ADC_CFGR2_OVSR_0) /!< ADC oversampling ratio of 4 (4 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
AnnaBridge	189:f392fc9709a3	706	#define LL_ADC_OVS_RATIO_8 ( ADC_CFGR2_OVSR_1 ) /!< ADC oversampling ratio of 8 (8 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
AnnaBridge	189:f392fc9709a3	707	#define LL_ADC_OVS_RATIO_16 ( ADC_CFGR2_OVSR_1 \| ADC_CFGR2_OVSR_0) /!< ADC oversampling ratio of 16 (16 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
AnnaBridge	189:f392fc9709a3	708	#define LL_ADC_OVS_RATIO_32 (ADC_CFGR2_OVSR_2 ) /!< ADC oversampling ratio of 32 (32 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
AnnaBridge	189:f392fc9709a3	709	#define LL_ADC_OVS_RATIO_64 (ADC_CFGR2_OVSR_2 \| ADC_CFGR2_OVSR_0) /!< ADC oversampling ratio of 64 (64 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
AnnaBridge	189:f392fc9709a3	710	#define LL_ADC_OVS_RATIO_128 (ADC_CFGR2_OVSR_2 \| ADC_CFGR2_OVSR_1 ) /!< ADC oversampling ratio of 128 (128 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
AnnaBridge	189:f392fc9709a3	711	#define LL_ADC_OVS_RATIO_256 (ADC_CFGR2_OVSR_2 \| ADC_CFGR2_OVSR_1 \| ADC_CFGR2_OVSR_0) /!< ADC oversampling ratio of 256 (256 ADC conversions are performed, sum of these conversions data is computed to result as the ADC oversampling conversion data (before potential shift) /
AnnaBridge	189:f392fc9709a3	712	/**
AnnaBridge	189:f392fc9709a3	713	* @}
AnnaBridge	189:f392fc9709a3	714	*/
AnnaBridge	189:f392fc9709a3	715
AnnaBridge	189:f392fc9709a3	716	/** @defgroup ADC_LL_EC_OVS_SHIFT Oversampling - Data shift
AnnaBridge	189:f392fc9709a3	717	* @{
AnnaBridge	189:f392fc9709a3	718	*/
AnnaBridge	189:f392fc9709a3	719	#define LL_ADC_OVS_SHIFT_NONE ((uint32_t)0x00000000U) /!< ADC oversampling no shift (sum of the ADC conversions data is not divided to result as the ADC oversampling conversion data) /
AnnaBridge	189:f392fc9709a3	720	#define LL_ADC_OVS_SHIFT_RIGHT_1 ( ADC_CFGR2_OVSS_0) /!< ADC oversampling shift of 1 (sum of the ADC conversions data is divided by 2 to result as the ADC oversampling conversion data) /
AnnaBridge	189:f392fc9709a3	721	#define LL_ADC_OVS_SHIFT_RIGHT_2 ( ADC_CFGR2_OVSS_1 ) /!< ADC oversampling shift of 2 (sum of the ADC conversions data is divided by 4 to result as the ADC oversampling conversion data) /
AnnaBridge	189:f392fc9709a3	722	#define LL_ADC_OVS_SHIFT_RIGHT_3 ( ADC_CFGR2_OVSS_1 \| ADC_CFGR2_OVSS_0) /!< ADC oversampling shift of 3 (sum of the ADC conversions data is divided by 8 to result as the ADC oversampling conversion data) /
AnnaBridge	189:f392fc9709a3	723	#define LL_ADC_OVS_SHIFT_RIGHT_4 ( ADC_CFGR2_OVSS_2 ) /!< ADC oversampling shift of 4 (sum of the ADC conversions data is divided by 16 to result as the ADC oversampling conversion data) /
AnnaBridge	189:f392fc9709a3	724	#define LL_ADC_OVS_SHIFT_RIGHT_5 ( ADC_CFGR2_OVSS_2 \| ADC_CFGR2_OVSS_0) /!< ADC oversampling shift of 5 (sum of the ADC conversions data is divided by 32 to result as the ADC oversampling conversion data) /
AnnaBridge	189:f392fc9709a3	725	#define LL_ADC_OVS_SHIFT_RIGHT_6 ( ADC_CFGR2_OVSS_2 \| ADC_CFGR2_OVSS_1 ) /!< ADC oversampling shift of 6 (sum of the ADC conversions data is divided by 64 to result as the ADC oversampling conversion data) /
AnnaBridge	189:f392fc9709a3	726	#define LL_ADC_OVS_SHIFT_RIGHT_7 ( ADC_CFGR2_OVSS_2 \| ADC_CFGR2_OVSS_1 \| ADC_CFGR2_OVSS_0) /!< ADC oversampling shift of 7 (sum of the ADC conversions data is divided by 128 to result as the ADC oversampling conversion data) /
AnnaBridge	189:f392fc9709a3	727	#define LL_ADC_OVS_SHIFT_RIGHT_8 (ADC_CFGR2_OVSS_3 ) /!< ADC oversampling shift of 8 (sum of the ADC conversions data is divided by 256 to result as the ADC oversampling conversion data) /
AnnaBridge	189:f392fc9709a3	728	/**
AnnaBridge	189:f392fc9709a3	729	* @}
AnnaBridge	189:f392fc9709a3	730	*/
AnnaBridge	189:f392fc9709a3	731
AnnaBridge	189:f392fc9709a3	732
AnnaBridge	189:f392fc9709a3	733	/** @defgroup ADC_LL_EC_HW_DELAYS Definitions of ADC hardware constraints delays
AnnaBridge	189:f392fc9709a3	734	* @note Only ADC IP HW delays are defined in ADC LL driver driver,
AnnaBridge	189:f392fc9709a3	735	* not timeout values.
AnnaBridge	189:f392fc9709a3	736	* For details on delays values, refer to descriptions in source code
AnnaBridge	189:f392fc9709a3	737	* above each literal definition.
AnnaBridge	189:f392fc9709a3	738	* @{
AnnaBridge	189:f392fc9709a3	739	*/
AnnaBridge	189:f392fc9709a3	740
AnnaBridge	189:f392fc9709a3	741	/* Note: Only ADC IP HW delays are defined in ADC LL driver driver, */
AnnaBridge	189:f392fc9709a3	742	/* not timeout values. */
AnnaBridge	189:f392fc9709a3	743	/* Timeout values for ADC operations are dependent to device clock */
AnnaBridge	189:f392fc9709a3	744	/* configuration (system clock versus ADC clock), */
AnnaBridge	189:f392fc9709a3	745	/* and therefore must be defined in user application. */
AnnaBridge	189:f392fc9709a3	746	/* Indications for estimation of ADC timeout delays, for this */
AnnaBridge	189:f392fc9709a3	747	/* STM32 serie: */
AnnaBridge	189:f392fc9709a3	748	/* - ADC calibration time: maximum delay is 83/fADC. */
AnnaBridge	189:f392fc9709a3	749	/* (refer to device datasheet, parameter "tCAL") */
AnnaBridge	189:f392fc9709a3	750	/* - ADC enable time: maximum delay is 1 conversion cycle. */
AnnaBridge	189:f392fc9709a3	751	/* (refer to device datasheet, parameter "tSTAB") */
AnnaBridge	189:f392fc9709a3	752	/* - ADC disable time: maximum delay should be a few ADC clock cycles */
AnnaBridge	189:f392fc9709a3	753	/* - ADC stop conversion time: maximum delay should be a few ADC clock */
AnnaBridge	189:f392fc9709a3	754	/* cycles */
AnnaBridge	189:f392fc9709a3	755	/* - ADC conversion time: duration depending on ADC clock and ADC */
AnnaBridge	189:f392fc9709a3	756	/* configuration. */
AnnaBridge	189:f392fc9709a3	757	/* (refer to device reference manual, section "Timing") */
AnnaBridge	189:f392fc9709a3	758
AnnaBridge	189:f392fc9709a3	759	/* Delay for ADC stabilization time (ADC voltage regulator start-up time) */
AnnaBridge	189:f392fc9709a3	760	/* Delay set to maximum value (refer to device datasheet, */
AnnaBridge	189:f392fc9709a3	761	/* parameter "tUP_LDO"). */
AnnaBridge	189:f392fc9709a3	762	#define LL_ADC_DELAY_INTERNAL_REGUL_STAB_US ((uint32_t) 10U) /!< Delay for ADC stabilization time (ADC voltage regulator start-up time) /
AnnaBridge	189:f392fc9709a3	763
AnnaBridge	189:f392fc9709a3	764	/* Delay for internal voltage reference stabilization time. */
AnnaBridge	189:f392fc9709a3	765	/* Delay set to maximum value (refer to device datasheet, */
AnnaBridge	189:f392fc9709a3	766	/* parameter "TADC_BUF"). */
AnnaBridge	189:f392fc9709a3	767	/* Unit: us */
AnnaBridge	189:f392fc9709a3	768	#define LL_ADC_DELAY_VREFINT_STAB_US ((uint32_t) 10U) /!< Delay for internal voltage reference stabilization time /
AnnaBridge	189:f392fc9709a3	769
AnnaBridge	189:f392fc9709a3	770	/* Delay for temperature sensor stabilization time. */
AnnaBridge	189:f392fc9709a3	771	/* Literal set to maximum value (refer to device datasheet, */
AnnaBridge	189:f392fc9709a3	772	/* parameter "tSTART"). */
AnnaBridge	189:f392fc9709a3	773	/* Unit: us */
AnnaBridge	189:f392fc9709a3	774	#define LL_ADC_DELAY_TEMPSENSOR_STAB_US ((uint32_t) 10U) /!< Delay for temperature sensor stabilization time /
AnnaBridge	189:f392fc9709a3	775
AnnaBridge	189:f392fc9709a3	776	/* Delay required between ADC end of calibration and ADC enable. */
AnnaBridge	189:f392fc9709a3	777	/* Note: On this STM32 serie, a minimum number of ADC clock cycles */
AnnaBridge	189:f392fc9709a3	778	/* are required between ADC end of calibration and ADC enable. */
AnnaBridge	189:f392fc9709a3	779	/* Wait time can be computed in user application by waiting for the */
AnnaBridge	189:f392fc9709a3	780	/* equivalent number of CPU cycles, by taking into account */
AnnaBridge	189:f392fc9709a3	781	/* ratio of CPU clock versus ADC clock prescalers. */
AnnaBridge	189:f392fc9709a3	782	/* Unit: ADC clock cycles. */
AnnaBridge	189:f392fc9709a3	783	#define LL_ADC_DELAY_CALIB_ENABLE_ADC_CYCLES ((uint32_t) 2U) /!< Delay required between ADC end of calibration and ADC enable /
AnnaBridge	189:f392fc9709a3	784
AnnaBridge	189:f392fc9709a3	785	/**
AnnaBridge	189:f392fc9709a3	786	* @}
AnnaBridge	189:f392fc9709a3	787	*/
AnnaBridge	189:f392fc9709a3	788
AnnaBridge	189:f392fc9709a3	789	/**
AnnaBridge	189:f392fc9709a3	790	* @}
AnnaBridge	189:f392fc9709a3	791	*/
AnnaBridge	189:f392fc9709a3	792
AnnaBridge	189:f392fc9709a3	793
AnnaBridge	189:f392fc9709a3	794	/* Exported macro ------------------------------------------------------------*/
AnnaBridge	189:f392fc9709a3	795	/** @defgroup ADC_LL_Exported_Macros ADC Exported Macros
AnnaBridge	189:f392fc9709a3	796	* @{
AnnaBridge	189:f392fc9709a3	797	*/
AnnaBridge	189:f392fc9709a3	798
AnnaBridge	189:f392fc9709a3	799	/** @defgroup ADC_LL_EM_WRITE_READ Common write and read registers Macros
AnnaBridge	189:f392fc9709a3	800	* @{
AnnaBridge	189:f392fc9709a3	801	*/
AnnaBridge	189:f392fc9709a3	802
AnnaBridge	189:f392fc9709a3	803	/**
AnnaBridge	189:f392fc9709a3	804	* @brief Write a value in ADC register
AnnaBridge	189:f392fc9709a3	805	* @param __INSTANCE__ ADC Instance
AnnaBridge	189:f392fc9709a3	806	* @param __REG__ Register to be written
AnnaBridge	189:f392fc9709a3	807	* @param __VALUE__ Value to be written in the register
AnnaBridge	189:f392fc9709a3	808	* @retval None
AnnaBridge	189:f392fc9709a3	809	*/
AnnaBridge	189:f392fc9709a3	810	#define LL_ADC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
AnnaBridge	189:f392fc9709a3	811
AnnaBridge	189:f392fc9709a3	812	/**
AnnaBridge	189:f392fc9709a3	813	* @brief Read a value in ADC register
AnnaBridge	189:f392fc9709a3	814	* @param __INSTANCE__ ADC Instance
AnnaBridge	189:f392fc9709a3	815	* @param __REG__ Register to be read
AnnaBridge	189:f392fc9709a3	816	* @retval Register value
AnnaBridge	189:f392fc9709a3	817	*/
AnnaBridge	189:f392fc9709a3	818	#define LL_ADC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
AnnaBridge	189:f392fc9709a3	819	/**
AnnaBridge	189:f392fc9709a3	820	* @}
AnnaBridge	189:f392fc9709a3	821	*/
AnnaBridge	189:f392fc9709a3	822
AnnaBridge	189:f392fc9709a3	823	/** @defgroup ADC_LL_EM_HELPER_MACRO ADC helper macro
AnnaBridge	189:f392fc9709a3	824	* @{
AnnaBridge	189:f392fc9709a3	825	*/
AnnaBridge	189:f392fc9709a3	826
AnnaBridge	189:f392fc9709a3	827	/**
AnnaBridge	189:f392fc9709a3	828	* @brief Helper macro to get ADC channel number in decimal format
AnnaBridge	189:f392fc9709a3	829	* from literals LL_ADC_CHANNEL_x.
AnnaBridge	189:f392fc9709a3	830	* @note Example:
AnnaBridge	189:f392fc9709a3	831	* __LL_ADC_CHANNEL_TO_DECIMAL_NB(LL_ADC_CHANNEL_4)
AnnaBridge	189:f392fc9709a3	832	* will return decimal number "4".
AnnaBridge	189:f392fc9709a3	833	* @note The input can be a value from functions where a channel
AnnaBridge	189:f392fc9709a3	834	* number is returned, either defined with number
AnnaBridge	189:f392fc9709a3	835	* or with bitfield (only one bit must be set).
AnnaBridge	189:f392fc9709a3	836	* @param __CHANNEL__ This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	837	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	189:f392fc9709a3	838	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	189:f392fc9709a3	839	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	189:f392fc9709a3	840	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	189:f392fc9709a3	841	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	189:f392fc9709a3	842	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	189:f392fc9709a3	843	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	189:f392fc9709a3	844	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	189:f392fc9709a3	845	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	189:f392fc9709a3	846	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	189:f392fc9709a3	847	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	189:f392fc9709a3	848	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	189:f392fc9709a3	849	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	189:f392fc9709a3	850	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	189:f392fc9709a3	851	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	189:f392fc9709a3	852	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	189:f392fc9709a3	853	* @arg @ref LL_ADC_CHANNEL_16 (1)
AnnaBridge	189:f392fc9709a3	854	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	189:f392fc9709a3	855	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	189:f392fc9709a3	856	* @arg @ref LL_ADC_CHANNEL_VREFINT
AnnaBridge	189:f392fc9709a3	857	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
AnnaBridge	189:f392fc9709a3	858	* @arg @ref LL_ADC_CHANNEL_VLCD (1)
AnnaBridge	189:f392fc9709a3	859	*
AnnaBridge	189:f392fc9709a3	860	* (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
AnnaBridge	189:f392fc9709a3	861	* @retval Value between Min_Data=0 and Max_Data=18
AnnaBridge	189:f392fc9709a3	862	*/
AnnaBridge	189:f392fc9709a3	863	#if defined(ADC_CCR_VLCDEN)
AnnaBridge	189:f392fc9709a3	864	#define __LL_ADC_CHANNEL_TO_DECIMAL_NB(__CHANNEL__) \
AnnaBridge	189:f392fc9709a3	865	((((__CHANNEL__) & ADC_CHANNEL_ID_BITFIELD_MASK) == 0U) \
AnnaBridge	189:f392fc9709a3	866	? ( \
AnnaBridge	189:f392fc9709a3	867	((__CHANNEL__) & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS \
AnnaBridge	189:f392fc9709a3	868	) \
AnnaBridge	189:f392fc9709a3	869	: \
AnnaBridge	189:f392fc9709a3	870	( \
AnnaBridge	189:f392fc9709a3	871	(((__CHANNEL__) & ADC_CHSELR_CHSEL0) == ADC_CHSELR_CHSEL0) ? (0U) : \
AnnaBridge	189:f392fc9709a3	872	( \
AnnaBridge	189:f392fc9709a3	873	(((__CHANNEL__) & ADC_CHSELR_CHSEL1) == ADC_CHSELR_CHSEL1) ? (1U) : \
AnnaBridge	189:f392fc9709a3	874	( \
AnnaBridge	189:f392fc9709a3	875	(((__CHANNEL__) & ADC_CHSELR_CHSEL2) == ADC_CHSELR_CHSEL2) ? (2U) : \
AnnaBridge	189:f392fc9709a3	876	( \
AnnaBridge	189:f392fc9709a3	877	(((__CHANNEL__) & ADC_CHSELR_CHSEL3) == ADC_CHSELR_CHSEL3) ? (3U) : \
AnnaBridge	189:f392fc9709a3	878	( \
AnnaBridge	189:f392fc9709a3	879	(((__CHANNEL__) & ADC_CHSELR_CHSEL4) == ADC_CHSELR_CHSEL4) ? (4U) : \
AnnaBridge	189:f392fc9709a3	880	( \
AnnaBridge	189:f392fc9709a3	881	(((__CHANNEL__) & ADC_CHSELR_CHSEL5) == ADC_CHSELR_CHSEL5) ? (5U) : \
AnnaBridge	189:f392fc9709a3	882	( \
AnnaBridge	189:f392fc9709a3	883	(((__CHANNEL__) & ADC_CHSELR_CHSEL6) == ADC_CHSELR_CHSEL6) ? (6U) : \
AnnaBridge	189:f392fc9709a3	884	( \
AnnaBridge	189:f392fc9709a3	885	(((__CHANNEL__) & ADC_CHSELR_CHSEL7) == ADC_CHSELR_CHSEL7) ? (7U) : \
AnnaBridge	189:f392fc9709a3	886	( \
AnnaBridge	189:f392fc9709a3	887	(((__CHANNEL__) & ADC_CHSELR_CHSEL8) == ADC_CHSELR_CHSEL8) ? (8U) : \
AnnaBridge	189:f392fc9709a3	888	( \
AnnaBridge	189:f392fc9709a3	889	(((__CHANNEL__) & ADC_CHSELR_CHSEL9) == ADC_CHSELR_CHSEL9) ? (9U) : \
AnnaBridge	189:f392fc9709a3	890	( \
AnnaBridge	189:f392fc9709a3	891	(((__CHANNEL__) & ADC_CHSELR_CHSEL10) == ADC_CHSELR_CHSEL10) ? (10U) : \
AnnaBridge	189:f392fc9709a3	892	( \
AnnaBridge	189:f392fc9709a3	893	(((__CHANNEL__) & ADC_CHSELR_CHSEL11) == ADC_CHSELR_CHSEL11) ? (11U) : \
AnnaBridge	189:f392fc9709a3	894	( \
AnnaBridge	189:f392fc9709a3	895	(((__CHANNEL__) & ADC_CHSELR_CHSEL12) == ADC_CHSELR_CHSEL12) ? (12U) : \
AnnaBridge	189:f392fc9709a3	896	( \
AnnaBridge	189:f392fc9709a3	897	(((__CHANNEL__) & ADC_CHSELR_CHSEL13) == ADC_CHSELR_CHSEL13) ? (13U) : \
AnnaBridge	189:f392fc9709a3	898	( \
AnnaBridge	189:f392fc9709a3	899	(((__CHANNEL__) & ADC_CHSELR_CHSEL14) == ADC_CHSELR_CHSEL14) ? (14U) : \
AnnaBridge	189:f392fc9709a3	900	( \
AnnaBridge	189:f392fc9709a3	901	(((__CHANNEL__) & ADC_CHSELR_CHSEL15) == ADC_CHSELR_CHSEL15) ? (15U) : \
AnnaBridge	189:f392fc9709a3	902	( \
AnnaBridge	189:f392fc9709a3	903	(((__CHANNEL__) & ADC_CHSELR_CHSEL16) == ADC_CHSELR_CHSEL16) ? (16U) : \
AnnaBridge	189:f392fc9709a3	904	( \
AnnaBridge	189:f392fc9709a3	905	(((__CHANNEL__) & ADC_CHSELR_CHSEL17) == ADC_CHSELR_CHSEL17) ? (17U) : \
AnnaBridge	189:f392fc9709a3	906	( \
AnnaBridge	189:f392fc9709a3	907	(((__CHANNEL__) & ADC_CHSELR_CHSEL18) == ADC_CHSELR_CHSEL18) ? (18U) : \
AnnaBridge	189:f392fc9709a3	908	(0U) \
AnnaBridge	189:f392fc9709a3	909	) \
AnnaBridge	189:f392fc9709a3	910	) \
AnnaBridge	189:f392fc9709a3	911	) \
AnnaBridge	189:f392fc9709a3	912	) \
AnnaBridge	189:f392fc9709a3	913	) \
AnnaBridge	189:f392fc9709a3	914	) \
AnnaBridge	189:f392fc9709a3	915	) \
AnnaBridge	189:f392fc9709a3	916	) \
AnnaBridge	189:f392fc9709a3	917	) \
AnnaBridge	189:f392fc9709a3	918	) \
AnnaBridge	189:f392fc9709a3	919	) \
AnnaBridge	189:f392fc9709a3	920	) \
AnnaBridge	189:f392fc9709a3	921	) \
AnnaBridge	189:f392fc9709a3	922	) \
AnnaBridge	189:f392fc9709a3	923	) \
AnnaBridge	189:f392fc9709a3	924	) \
AnnaBridge	189:f392fc9709a3	925	) \
AnnaBridge	189:f392fc9709a3	926	) \
AnnaBridge	189:f392fc9709a3	927	) \
AnnaBridge	189:f392fc9709a3	928	)
AnnaBridge	189:f392fc9709a3	929	#else
AnnaBridge	189:f392fc9709a3	930	#define __LL_ADC_CHANNEL_TO_DECIMAL_NB(__CHANNEL__) \
AnnaBridge	189:f392fc9709a3	931	((((__CHANNEL__) & ADC_CHANNEL_ID_BITFIELD_MASK) == 0U) \
AnnaBridge	189:f392fc9709a3	932	? ( \
AnnaBridge	189:f392fc9709a3	933	((__CHANNEL__) & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS \
AnnaBridge	189:f392fc9709a3	934	) \
AnnaBridge	189:f392fc9709a3	935	: \
AnnaBridge	189:f392fc9709a3	936	( \
AnnaBridge	189:f392fc9709a3	937	(((__CHANNEL__) & ADC_CHSELR_CHSEL0) == ADC_CHSELR_CHSEL0) ? (0U) : \
AnnaBridge	189:f392fc9709a3	938	( \
AnnaBridge	189:f392fc9709a3	939	(((__CHANNEL__) & ADC_CHSELR_CHSEL1) == ADC_CHSELR_CHSEL1) ? (1U) : \
AnnaBridge	189:f392fc9709a3	940	( \
AnnaBridge	189:f392fc9709a3	941	(((__CHANNEL__) & ADC_CHSELR_CHSEL2) == ADC_CHSELR_CHSEL2) ? (2U) : \
AnnaBridge	189:f392fc9709a3	942	( \
AnnaBridge	189:f392fc9709a3	943	(((__CHANNEL__) & ADC_CHSELR_CHSEL3) == ADC_CHSELR_CHSEL3) ? (3U) : \
AnnaBridge	189:f392fc9709a3	944	( \
AnnaBridge	189:f392fc9709a3	945	(((__CHANNEL__) & ADC_CHSELR_CHSEL4) == ADC_CHSELR_CHSEL4) ? (4U) : \
AnnaBridge	189:f392fc9709a3	946	( \
AnnaBridge	189:f392fc9709a3	947	(((__CHANNEL__) & ADC_CHSELR_CHSEL5) == ADC_CHSELR_CHSEL5) ? (5U) : \
AnnaBridge	189:f392fc9709a3	948	( \
AnnaBridge	189:f392fc9709a3	949	(((__CHANNEL__) & ADC_CHSELR_CHSEL6) == ADC_CHSELR_CHSEL6) ? (6U) : \
AnnaBridge	189:f392fc9709a3	950	( \
AnnaBridge	189:f392fc9709a3	951	(((__CHANNEL__) & ADC_CHSELR_CHSEL7) == ADC_CHSELR_CHSEL7) ? (7U) : \
AnnaBridge	189:f392fc9709a3	952	( \
AnnaBridge	189:f392fc9709a3	953	(((__CHANNEL__) & ADC_CHSELR_CHSEL8) == ADC_CHSELR_CHSEL8) ? (8U) : \
AnnaBridge	189:f392fc9709a3	954	( \
AnnaBridge	189:f392fc9709a3	955	(((__CHANNEL__) & ADC_CHSELR_CHSEL9) == ADC_CHSELR_CHSEL9) ? (9U) : \
AnnaBridge	189:f392fc9709a3	956	( \
AnnaBridge	189:f392fc9709a3	957	(((__CHANNEL__) & ADC_CHSELR_CHSEL10) == ADC_CHSELR_CHSEL10) ? (10U) : \
AnnaBridge	189:f392fc9709a3	958	( \
AnnaBridge	189:f392fc9709a3	959	(((__CHANNEL__) & ADC_CHSELR_CHSEL11) == ADC_CHSELR_CHSEL11) ? (11U) : \
AnnaBridge	189:f392fc9709a3	960	( \
AnnaBridge	189:f392fc9709a3	961	(((__CHANNEL__) & ADC_CHSELR_CHSEL12) == ADC_CHSELR_CHSEL12) ? (12U) : \
AnnaBridge	189:f392fc9709a3	962	( \
AnnaBridge	189:f392fc9709a3	963	(((__CHANNEL__) & ADC_CHSELR_CHSEL13) == ADC_CHSELR_CHSEL13) ? (13U) : \
AnnaBridge	189:f392fc9709a3	964	( \
AnnaBridge	189:f392fc9709a3	965	(((__CHANNEL__) & ADC_CHSELR_CHSEL14) == ADC_CHSELR_CHSEL14) ? (14U) : \
AnnaBridge	189:f392fc9709a3	966	( \
AnnaBridge	189:f392fc9709a3	967	(((__CHANNEL__) & ADC_CHSELR_CHSEL15) == ADC_CHSELR_CHSEL15) ? (15U) : \
AnnaBridge	189:f392fc9709a3	968	( \
AnnaBridge	189:f392fc9709a3	969	(((__CHANNEL__) & ADC_CHSELR_CHSEL17) == ADC_CHSELR_CHSEL17) ? (17U) : \
AnnaBridge	189:f392fc9709a3	970	( \
AnnaBridge	189:f392fc9709a3	971	(((__CHANNEL__) & ADC_CHSELR_CHSEL18) == ADC_CHSELR_CHSEL18) ? (18U) : \
AnnaBridge	189:f392fc9709a3	972	(0U) \
AnnaBridge	189:f392fc9709a3	973	) \
AnnaBridge	189:f392fc9709a3	974	) \
AnnaBridge	189:f392fc9709a3	975	) \
AnnaBridge	189:f392fc9709a3	976	) \
AnnaBridge	189:f392fc9709a3	977	) \
AnnaBridge	189:f392fc9709a3	978	) \
AnnaBridge	189:f392fc9709a3	979	) \
AnnaBridge	189:f392fc9709a3	980	) \
AnnaBridge	189:f392fc9709a3	981	) \
AnnaBridge	189:f392fc9709a3	982	) \
AnnaBridge	189:f392fc9709a3	983	) \
AnnaBridge	189:f392fc9709a3	984	) \
AnnaBridge	189:f392fc9709a3	985	) \
AnnaBridge	189:f392fc9709a3	986	) \
AnnaBridge	189:f392fc9709a3	987	) \
AnnaBridge	189:f392fc9709a3	988	) \
AnnaBridge	189:f392fc9709a3	989	) \
AnnaBridge	189:f392fc9709a3	990	) \
AnnaBridge	189:f392fc9709a3	991	)
AnnaBridge	189:f392fc9709a3	992	#endif
AnnaBridge	189:f392fc9709a3	993
AnnaBridge	189:f392fc9709a3	994	/**
AnnaBridge	189:f392fc9709a3	995	* @brief Helper macro to get ADC channel in literal format LL_ADC_CHANNEL_x
AnnaBridge	189:f392fc9709a3	996	* from number in decimal format.
AnnaBridge	189:f392fc9709a3	997	* @note Example:
AnnaBridge	189:f392fc9709a3	998	* __LL_ADC_DECIMAL_NB_TO_CHANNEL(4)
AnnaBridge	189:f392fc9709a3	999	* will return a data equivalent to "LL_ADC_CHANNEL_4".
AnnaBridge	189:f392fc9709a3	1000	* @param __DECIMAL_NB__: Value between Min_Data=0 and Max_Data=18
AnnaBridge	189:f392fc9709a3	1001	* @retval Returned value can be one of the following values:
AnnaBridge	189:f392fc9709a3	1002	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	189:f392fc9709a3	1003	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	189:f392fc9709a3	1004	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	189:f392fc9709a3	1005	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	189:f392fc9709a3	1006	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	189:f392fc9709a3	1007	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	189:f392fc9709a3	1008	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	189:f392fc9709a3	1009	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	189:f392fc9709a3	1010	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	189:f392fc9709a3	1011	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	189:f392fc9709a3	1012	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	189:f392fc9709a3	1013	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	189:f392fc9709a3	1014	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	189:f392fc9709a3	1015	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	189:f392fc9709a3	1016	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	189:f392fc9709a3	1017	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	189:f392fc9709a3	1018	* @arg @ref LL_ADC_CHANNEL_16 (1)
AnnaBridge	189:f392fc9709a3	1019	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	189:f392fc9709a3	1020	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	189:f392fc9709a3	1021	* @arg @ref LL_ADC_CHANNEL_VREFINT (2)
AnnaBridge	189:f392fc9709a3	1022	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (2)
AnnaBridge	189:f392fc9709a3	1023	* @arg @ref LL_ADC_CHANNEL_VLCD (1)(2)
AnnaBridge	189:f392fc9709a3	1024	*
AnnaBridge	189:f392fc9709a3	1025	* (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.\n
AnnaBridge	189:f392fc9709a3	1026	* (2) For ADC channel read back from ADC register,
AnnaBridge	189:f392fc9709a3	1027	* comparison with internal channel parameter to be done
AnnaBridge	189:f392fc9709a3	1028	* using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL().
AnnaBridge	189:f392fc9709a3	1029	*/
AnnaBridge	189:f392fc9709a3	1030	#define __LL_ADC_DECIMAL_NB_TO_CHANNEL(__DECIMAL_NB__) \
AnnaBridge	189:f392fc9709a3	1031	( \
AnnaBridge	189:f392fc9709a3	1032	((__DECIMAL_NB__) << ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS) \| \
AnnaBridge	189:f392fc9709a3	1033	(ADC_CHSELR_CHSEL0 << (__DECIMAL_NB__)) \
AnnaBridge	189:f392fc9709a3	1034	)
AnnaBridge	189:f392fc9709a3	1035
AnnaBridge	189:f392fc9709a3	1036	/**
AnnaBridge	189:f392fc9709a3	1037	* @brief Helper macro to determine whether the selected channel
AnnaBridge	189:f392fc9709a3	1038	* corresponds to literal definitions of driver.
AnnaBridge	189:f392fc9709a3	1039	* @note The different literal definitions of ADC channels are:
AnnaBridge	189:f392fc9709a3	1040	* - ADC internal channel:
AnnaBridge	189:f392fc9709a3	1041	* LL_ADC_CHANNEL_VREFINT, LL_ADC_CHANNEL_TEMPSENSOR, ...
AnnaBridge	189:f392fc9709a3	1042	* - ADC external channel (channel connected to a GPIO pin):
AnnaBridge	189:f392fc9709a3	1043	* LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...
AnnaBridge	189:f392fc9709a3	1044	* @note The channel parameter must be a value defined from literal
AnnaBridge	189:f392fc9709a3	1045	* definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT,
AnnaBridge	189:f392fc9709a3	1046	* LL_ADC_CHANNEL_TEMPSENSOR, ...),
AnnaBridge	189:f392fc9709a3	1047	* ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...),
AnnaBridge	189:f392fc9709a3	1048	* must not be a value from functions where a channel number is
AnnaBridge	189:f392fc9709a3	1049	* returned from ADC registers,
AnnaBridge	189:f392fc9709a3	1050	* because internal and external channels share the same channel
AnnaBridge	189:f392fc9709a3	1051	* number in ADC registers. The differentiation is made only with
AnnaBridge	189:f392fc9709a3	1052	* parameters definitions of driver.
AnnaBridge	189:f392fc9709a3	1053	* @param __CHANNEL__ This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	1054	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	189:f392fc9709a3	1055	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	189:f392fc9709a3	1056	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	189:f392fc9709a3	1057	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	189:f392fc9709a3	1058	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	189:f392fc9709a3	1059	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	189:f392fc9709a3	1060	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	189:f392fc9709a3	1061	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	189:f392fc9709a3	1062	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	189:f392fc9709a3	1063	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	189:f392fc9709a3	1064	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	189:f392fc9709a3	1065	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	189:f392fc9709a3	1066	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	189:f392fc9709a3	1067	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	189:f392fc9709a3	1068	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	189:f392fc9709a3	1069	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	189:f392fc9709a3	1070	* @arg @ref LL_ADC_CHANNEL_16 (1)
AnnaBridge	189:f392fc9709a3	1071	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	189:f392fc9709a3	1072	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	189:f392fc9709a3	1073	* @arg @ref LL_ADC_CHANNEL_VREFINT
AnnaBridge	189:f392fc9709a3	1074	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
AnnaBridge	189:f392fc9709a3	1075	* @arg @ref LL_ADC_CHANNEL_VLCD (1)
AnnaBridge	189:f392fc9709a3	1076	*
AnnaBridge	189:f392fc9709a3	1077	* (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
AnnaBridge	189:f392fc9709a3	1078	* @retval Value "0" if the channel corresponds to a parameter definition of a ADC external channel (channel connected to a GPIO pin).
AnnaBridge	189:f392fc9709a3	1079	* Value "1" if the channel corresponds to a parameter definition of a ADC internal channel.
AnnaBridge	189:f392fc9709a3	1080	*/
AnnaBridge	189:f392fc9709a3	1081	#define __LL_ADC_IS_CHANNEL_INTERNAL(__CHANNEL__) \
AnnaBridge	189:f392fc9709a3	1082	(((__CHANNEL__) & ADC_CHANNEL_ID_INTERNAL_CH_MASK) != 0U)
AnnaBridge	189:f392fc9709a3	1083
AnnaBridge	189:f392fc9709a3	1084	/**
AnnaBridge	189:f392fc9709a3	1085	* @brief Helper macro to convert a channel defined from parameter
AnnaBridge	189:f392fc9709a3	1086	* definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT,
AnnaBridge	189:f392fc9709a3	1087	* LL_ADC_CHANNEL_TEMPSENSOR, ...),
AnnaBridge	189:f392fc9709a3	1088	* to its equivalent parameter definition of a ADC external channel
AnnaBridge	189:f392fc9709a3	1089	* (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...).
AnnaBridge	189:f392fc9709a3	1090	* @note The channel parameter can be, additionally to a value
AnnaBridge	189:f392fc9709a3	1091	* defined from parameter definition of a ADC internal channel
AnnaBridge	189:f392fc9709a3	1092	* (LL_ADC_CHANNEL_VREFINT, LL_ADC_CHANNEL_TEMPSENSOR, ...),
AnnaBridge	189:f392fc9709a3	1093	* a value defined from parameter definition of
AnnaBridge	189:f392fc9709a3	1094	* ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...)
AnnaBridge	189:f392fc9709a3	1095	* or a value from functions where a channel number is returned
AnnaBridge	189:f392fc9709a3	1096	* from ADC registers.
AnnaBridge	189:f392fc9709a3	1097	* @param __CHANNEL__ This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	1098	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	189:f392fc9709a3	1099	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	189:f392fc9709a3	1100	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	189:f392fc9709a3	1101	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	189:f392fc9709a3	1102	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	189:f392fc9709a3	1103	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	189:f392fc9709a3	1104	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	189:f392fc9709a3	1105	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	189:f392fc9709a3	1106	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	189:f392fc9709a3	1107	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	189:f392fc9709a3	1108	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	189:f392fc9709a3	1109	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	189:f392fc9709a3	1110	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	189:f392fc9709a3	1111	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	189:f392fc9709a3	1112	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	189:f392fc9709a3	1113	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	189:f392fc9709a3	1114	* @arg @ref LL_ADC_CHANNEL_16 (1)
AnnaBridge	189:f392fc9709a3	1115	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	189:f392fc9709a3	1116	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	189:f392fc9709a3	1117	* @arg @ref LL_ADC_CHANNEL_VREFINT
AnnaBridge	189:f392fc9709a3	1118	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
AnnaBridge	189:f392fc9709a3	1119	* @arg @ref LL_ADC_CHANNEL_VLCD (1)
AnnaBridge	189:f392fc9709a3	1120	*
AnnaBridge	189:f392fc9709a3	1121	* (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
AnnaBridge	189:f392fc9709a3	1122	* @retval Returned value can be one of the following values:
AnnaBridge	189:f392fc9709a3	1123	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	189:f392fc9709a3	1124	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	189:f392fc9709a3	1125	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	189:f392fc9709a3	1126	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	189:f392fc9709a3	1127	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	189:f392fc9709a3	1128	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	189:f392fc9709a3	1129	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	189:f392fc9709a3	1130	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	189:f392fc9709a3	1131	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	189:f392fc9709a3	1132	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	189:f392fc9709a3	1133	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	189:f392fc9709a3	1134	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	189:f392fc9709a3	1135	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	189:f392fc9709a3	1136	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	189:f392fc9709a3	1137	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	189:f392fc9709a3	1138	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	189:f392fc9709a3	1139	* @arg @ref LL_ADC_CHANNEL_16
AnnaBridge	189:f392fc9709a3	1140	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	189:f392fc9709a3	1141	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	189:f392fc9709a3	1142	*/
AnnaBridge	189:f392fc9709a3	1143	#define __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL(__CHANNEL__) \
AnnaBridge	189:f392fc9709a3	1144	((__CHANNEL__) & ~ADC_CHANNEL_ID_INTERNAL_CH_MASK)
AnnaBridge	189:f392fc9709a3	1145
AnnaBridge	189:f392fc9709a3	1146	/**
AnnaBridge	189:f392fc9709a3	1147	* @brief Helper macro to determine whether the internal channel
AnnaBridge	189:f392fc9709a3	1148	* selected is available on the ADC instance selected.
AnnaBridge	189:f392fc9709a3	1149	* @note The channel parameter must be a value defined from parameter
AnnaBridge	189:f392fc9709a3	1150	* definition of a ADC internal channel (LL_ADC_CHANNEL_VREFINT,
AnnaBridge	189:f392fc9709a3	1151	* LL_ADC_CHANNEL_TEMPSENSOR, ...),
AnnaBridge	189:f392fc9709a3	1152	* must not be a value defined from parameter definition of
AnnaBridge	189:f392fc9709a3	1153	* ADC external channel (LL_ADC_CHANNEL_1, LL_ADC_CHANNEL_2, ...)
AnnaBridge	189:f392fc9709a3	1154	* or a value from functions where a channel number is
AnnaBridge	189:f392fc9709a3	1155	* returned from ADC registers,
AnnaBridge	189:f392fc9709a3	1156	* because internal and external channels share the same channel
AnnaBridge	189:f392fc9709a3	1157	* number in ADC registers. The differentiation is made only with
AnnaBridge	189:f392fc9709a3	1158	* parameters definitions of driver.
AnnaBridge	189:f392fc9709a3	1159	* @param __ADC_INSTANCE__ ADC instance
AnnaBridge	189:f392fc9709a3	1160	* @param __CHANNEL__ This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	1161	* @arg @ref LL_ADC_CHANNEL_VREFINT
AnnaBridge	189:f392fc9709a3	1162	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
AnnaBridge	189:f392fc9709a3	1163	* @arg @ref LL_ADC_CHANNEL_VLCD (1)
AnnaBridge	189:f392fc9709a3	1164	*
AnnaBridge	189:f392fc9709a3	1165	* (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
AnnaBridge	189:f392fc9709a3	1166
AnnaBridge	189:f392fc9709a3	1167	* @retval Value "0" if the internal channel selected is not available on the ADC instance selected.
AnnaBridge	189:f392fc9709a3	1168	* Value "1" if the internal channel selected is available on the ADC instance selected.
AnnaBridge	189:f392fc9709a3	1169	*/
AnnaBridge	189:f392fc9709a3	1170	#if defined(ADC_CCR_VLCDEN)
AnnaBridge	189:f392fc9709a3	1171	#define __LL_ADC_IS_CHANNEL_INTERNAL_AVAILABLE(__ADC_INSTANCE__, __CHANNEL__) \
AnnaBridge	189:f392fc9709a3	1172	( \
AnnaBridge	189:f392fc9709a3	1173	((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \|\| \
AnnaBridge	189:f392fc9709a3	1174	((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR) \|\| \
AnnaBridge	189:f392fc9709a3	1175	((__CHANNEL__) == LL_ADC_CHANNEL_VLCD) \
AnnaBridge	189:f392fc9709a3	1176	)
AnnaBridge	189:f392fc9709a3	1177	#else
AnnaBridge	189:f392fc9709a3	1178	#define __LL_ADC_IS_CHANNEL_INTERNAL_AVAILABLE(__ADC_INSTANCE__, __CHANNEL__) \
AnnaBridge	189:f392fc9709a3	1179	( \
AnnaBridge	189:f392fc9709a3	1180	((__CHANNEL__) == LL_ADC_CHANNEL_VREFINT) \|\| \
AnnaBridge	189:f392fc9709a3	1181	((__CHANNEL__) == LL_ADC_CHANNEL_TEMPSENSOR) \
AnnaBridge	189:f392fc9709a3	1182	)
AnnaBridge	189:f392fc9709a3	1183	#endif
AnnaBridge	189:f392fc9709a3	1184
AnnaBridge	189:f392fc9709a3	1185	/**
AnnaBridge	189:f392fc9709a3	1186	* @brief Helper macro to define ADC analog watchdog parameter:
AnnaBridge	189:f392fc9709a3	1187	* define a single channel to monitor with analog watchdog
AnnaBridge	189:f392fc9709a3	1188	* from sequencer channel and groups definition.
AnnaBridge	189:f392fc9709a3	1189	* @note To be used with function @ref LL_ADC_SetAnalogWDMonitChannels().
AnnaBridge	189:f392fc9709a3	1190	* Example:
AnnaBridge	189:f392fc9709a3	1191	* LL_ADC_SetAnalogWDMonitChannels(
AnnaBridge	189:f392fc9709a3	1192	* ADC1, LL_ADC_AWD1,
AnnaBridge	189:f392fc9709a3	1193	* __LL_ADC_ANALOGWD_CHANNEL_GROUP(LL_ADC_CHANNEL4, LL_ADC_GROUP_REGULAR))
AnnaBridge	189:f392fc9709a3	1194	* @param __CHANNEL__ This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	1195	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	189:f392fc9709a3	1196	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	189:f392fc9709a3	1197	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	189:f392fc9709a3	1198	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	189:f392fc9709a3	1199	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	189:f392fc9709a3	1200	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	189:f392fc9709a3	1201	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	189:f392fc9709a3	1202	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	189:f392fc9709a3	1203	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	189:f392fc9709a3	1204	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	189:f392fc9709a3	1205	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	189:f392fc9709a3	1206	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	189:f392fc9709a3	1207	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	189:f392fc9709a3	1208	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	189:f392fc9709a3	1209	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	189:f392fc9709a3	1210	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	189:f392fc9709a3	1211	* @arg @ref LL_ADC_CHANNEL_16 (1)
AnnaBridge	189:f392fc9709a3	1212	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	189:f392fc9709a3	1213	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	189:f392fc9709a3	1214	* @arg @ref LL_ADC_CHANNEL_VREFINT (2)
AnnaBridge	189:f392fc9709a3	1215	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR (2)
AnnaBridge	189:f392fc9709a3	1216	* @arg @ref LL_ADC_CHANNEL_VLCD (1)(2)
AnnaBridge	189:f392fc9709a3	1217	*
AnnaBridge	189:f392fc9709a3	1218	* (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.\n
AnnaBridge	189:f392fc9709a3	1219	* (2) For ADC channel read back from ADC register,
AnnaBridge	189:f392fc9709a3	1220	* comparison with internal channel parameter to be done
AnnaBridge	189:f392fc9709a3	1221	* using helper macro @ref __LL_ADC_CHANNEL_INTERNAL_TO_EXTERNAL().
AnnaBridge	189:f392fc9709a3	1222	* @param __GROUP__ This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	1223	* @arg @ref LL_ADC_GROUP_REGULAR
AnnaBridge	189:f392fc9709a3	1224	* @retval Returned value can be one of the following values:
AnnaBridge	189:f392fc9709a3	1225	* @arg @ref LL_ADC_AWD_DISABLE
AnnaBridge	189:f392fc9709a3	1226	* @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG
AnnaBridge	189:f392fc9709a3	1227	* @arg @ref LL_ADC_AWD_CHANNEL_0_REG
AnnaBridge	189:f392fc9709a3	1228	* @arg @ref LL_ADC_AWD_CHANNEL_1_REG
AnnaBridge	189:f392fc9709a3	1229	* @arg @ref LL_ADC_AWD_CHANNEL_2_REG
AnnaBridge	189:f392fc9709a3	1230	* @arg @ref LL_ADC_AWD_CHANNEL_3_REG
AnnaBridge	189:f392fc9709a3	1231	* @arg @ref LL_ADC_AWD_CHANNEL_4_REG
AnnaBridge	189:f392fc9709a3	1232	* @arg @ref LL_ADC_AWD_CHANNEL_5_REG
AnnaBridge	189:f392fc9709a3	1233	* @arg @ref LL_ADC_AWD_CHANNEL_6_REG
AnnaBridge	189:f392fc9709a3	1234	* @arg @ref LL_ADC_AWD_CHANNEL_7_REG
AnnaBridge	189:f392fc9709a3	1235	* @arg @ref LL_ADC_AWD_CHANNEL_8_REG
AnnaBridge	189:f392fc9709a3	1236	* @arg @ref LL_ADC_AWD_CHANNEL_9_REG
AnnaBridge	189:f392fc9709a3	1237	* @arg @ref LL_ADC_AWD_CHANNEL_10_REG
AnnaBridge	189:f392fc9709a3	1238	* @arg @ref LL_ADC_AWD_CHANNEL_11_REG
AnnaBridge	189:f392fc9709a3	1239	* @arg @ref LL_ADC_AWD_CHANNEL_12_REG
AnnaBridge	189:f392fc9709a3	1240	* @arg @ref LL_ADC_AWD_CHANNEL_13_REG
AnnaBridge	189:f392fc9709a3	1241	* @arg @ref LL_ADC_AWD_CHANNEL_14_REG
AnnaBridge	189:f392fc9709a3	1242	* @arg @ref LL_ADC_AWD_CHANNEL_15_REG
AnnaBridge	189:f392fc9709a3	1243	* @arg @ref LL_ADC_AWD_CHANNEL_16_REG (1)
AnnaBridge	189:f392fc9709a3	1244	* @arg @ref LL_ADC_AWD_CHANNEL_17_REG
AnnaBridge	189:f392fc9709a3	1245	* @arg @ref LL_ADC_AWD_CHANNEL_18_REG
AnnaBridge	189:f392fc9709a3	1246	* @arg @ref LL_ADC_AWD_CH_VREFINT_REG
AnnaBridge	189:f392fc9709a3	1247	* @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_REG
AnnaBridge	189:f392fc9709a3	1248	* @arg @ref LL_ADC_AWD_CH_VLCD_REG (1)
AnnaBridge	189:f392fc9709a3	1249	*
AnnaBridge	189:f392fc9709a3	1250	* (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
AnnaBridge	189:f392fc9709a3	1251	*/
AnnaBridge	189:f392fc9709a3	1252	#define __LL_ADC_ANALOGWD_CHANNEL_GROUP(__CHANNEL__, __GROUP__) \
AnnaBridge	189:f392fc9709a3	1253	(((__CHANNEL__) & ADC_CHANNEL_ID_MASK) \| ADC_CFGR1_AWDEN \| ADC_CFGR1_AWDSGL)
AnnaBridge	189:f392fc9709a3	1254
AnnaBridge	189:f392fc9709a3	1255	/**
AnnaBridge	189:f392fc9709a3	1256	* @brief Helper macro to set the value of ADC analog watchdog threshold high
AnnaBridge	189:f392fc9709a3	1257	* or low in function of ADC resolution, when ADC resolution is
AnnaBridge	189:f392fc9709a3	1258	* different of 12 bits.
AnnaBridge	189:f392fc9709a3	1259	* @note To be used with function @ref LL_ADC_ConfigAnalogWDThresholds()
AnnaBridge	189:f392fc9709a3	1260	* or @ref LL_ADC_SetAnalogWDThresholds().
AnnaBridge	189:f392fc9709a3	1261	* Example, with a ADC resolution of 8 bits, to set the value of
AnnaBridge	189:f392fc9709a3	1262	* analog watchdog threshold high (on 8 bits):
AnnaBridge	189:f392fc9709a3	1263	* LL_ADC_SetAnalogWDThresholds
AnnaBridge	189:f392fc9709a3	1264	* (< ADCx param >,
AnnaBridge	189:f392fc9709a3	1265	* __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION(LL_ADC_RESOLUTION_8B, <threshold_value_8_bits>)
AnnaBridge	189:f392fc9709a3	1266	* );
AnnaBridge	189:f392fc9709a3	1267	* @param __ADC_RESOLUTION__ This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	1268	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	189:f392fc9709a3	1269	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	189:f392fc9709a3	1270	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	189:f392fc9709a3	1271	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	189:f392fc9709a3	1272	* @param __AWD_THRESHOLD__ Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	189:f392fc9709a3	1273	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	189:f392fc9709a3	1274	*/
AnnaBridge	189:f392fc9709a3	1275	#define __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION(__ADC_RESOLUTION__, __AWD_THRESHOLD__) \
AnnaBridge	189:f392fc9709a3	1276	((__AWD_THRESHOLD__) << ((__ADC_RESOLUTION__) >> (ADC_CFGR1_RES_BITOFFSET_POS - 1U )))
AnnaBridge	189:f392fc9709a3	1277
AnnaBridge	189:f392fc9709a3	1278	/**
AnnaBridge	189:f392fc9709a3	1279	* @brief Helper macro to get the value of ADC analog watchdog threshold high
AnnaBridge	189:f392fc9709a3	1280	* or low in function of ADC resolution, when ADC resolution is
AnnaBridge	189:f392fc9709a3	1281	* different of 12 bits.
AnnaBridge	189:f392fc9709a3	1282	* @note To be used with function @ref LL_ADC_GetAnalogWDThresholds().
AnnaBridge	189:f392fc9709a3	1283	* Example, with a ADC resolution of 8 bits, to get the value of
AnnaBridge	189:f392fc9709a3	1284	* analog watchdog threshold high (on 8 bits):
AnnaBridge	189:f392fc9709a3	1285	* < threshold_value_6_bits > = __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION
AnnaBridge	189:f392fc9709a3	1286	* (LL_ADC_RESOLUTION_8B,
AnnaBridge	189:f392fc9709a3	1287	* LL_ADC_GetAnalogWDThresholds(<ADCx param>, LL_ADC_AWD_THRESHOLD_HIGH)
AnnaBridge	189:f392fc9709a3	1288	* );
AnnaBridge	189:f392fc9709a3	1289	* @param __ADC_RESOLUTION__ This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	1290	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	189:f392fc9709a3	1291	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	189:f392fc9709a3	1292	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	189:f392fc9709a3	1293	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	189:f392fc9709a3	1294	* @param __AWD_THRESHOLD_12_BITS__ Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	189:f392fc9709a3	1295	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	189:f392fc9709a3	1296	*/
AnnaBridge	189:f392fc9709a3	1297	#define __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION(__ADC_RESOLUTION__, __AWD_THRESHOLD_12_BITS__) \
AnnaBridge	189:f392fc9709a3	1298	((__AWD_THRESHOLD_12_BITS__) >> ((__ADC_RESOLUTION__) >> (ADC_CFGR1_RES_BITOFFSET_POS - 1U )))
AnnaBridge	189:f392fc9709a3	1299
AnnaBridge	189:f392fc9709a3	1300	/**
AnnaBridge	189:f392fc9709a3	1301	* @brief Helper macro to get the ADC analog watchdog threshold high
AnnaBridge	189:f392fc9709a3	1302	* or low from raw value containing both thresholds concatenated.
AnnaBridge	189:f392fc9709a3	1303	* @note To be used with function @ref LL_ADC_GetAnalogWDThresholds().
AnnaBridge	189:f392fc9709a3	1304	* Example, to get analog watchdog threshold high from the register raw value:
AnnaBridge	189:f392fc9709a3	1305	* __LL_ADC_ANALOGWD_THRESHOLDS_HIGH_LOW(LL_ADC_AWD_THRESHOLD_HIGH, <raw_value_with_both_thresholds>);
AnnaBridge	189:f392fc9709a3	1306	* @param __AWD_THRESHOLD_TYPE__ This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	1307	* @arg @ref LL_ADC_AWD_THRESHOLD_HIGH
AnnaBridge	189:f392fc9709a3	1308	* @arg @ref LL_ADC_AWD_THRESHOLD_LOW
AnnaBridge	189:f392fc9709a3	1309	* @param __AWD_THRESHOLDS__ Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF
AnnaBridge	189:f392fc9709a3	1310	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	189:f392fc9709a3	1311	*/
AnnaBridge	189:f392fc9709a3	1312	#define __LL_ADC_ANALOGWD_THRESHOLDS_HIGH_LOW(__AWD_THRESHOLD_TYPE__, __AWD_THRESHOLDS__) \
AnnaBridge	189:f392fc9709a3	1313	(((__AWD_THRESHOLD_TYPE__) == LL_ADC_AWD_THRESHOLD_LOW) \
AnnaBridge	189:f392fc9709a3	1314	? ( \
AnnaBridge	189:f392fc9709a3	1315	(__AWD_THRESHOLDS__) & LL_ADC_AWD_THRESHOLD_LOW \
AnnaBridge	189:f392fc9709a3	1316	) \
AnnaBridge	189:f392fc9709a3	1317	: \
AnnaBridge	189:f392fc9709a3	1318	( \
AnnaBridge	189:f392fc9709a3	1319	((__AWD_THRESHOLDS__) >> ADC_TR_HT_BITOFFSET_POS) & LL_ADC_AWD_THRESHOLD_LOW \
AnnaBridge	189:f392fc9709a3	1320	) \
AnnaBridge	189:f392fc9709a3	1321	)
AnnaBridge	189:f392fc9709a3	1322
AnnaBridge	189:f392fc9709a3	1323	/**
AnnaBridge	189:f392fc9709a3	1324	* @brief Helper macro to select the ADC common instance
AnnaBridge	189:f392fc9709a3	1325	* to which is belonging the selected ADC instance.
AnnaBridge	189:f392fc9709a3	1326	* @note ADC common register instance can be used for:
AnnaBridge	189:f392fc9709a3	1327	* - Set parameters common to several ADC instances
AnnaBridge	189:f392fc9709a3	1328	* - Multimode (for devices with several ADC instances)
AnnaBridge	189:f392fc9709a3	1329	* Refer to functions having argument "ADCxy_COMMON" as parameter.
AnnaBridge	189:f392fc9709a3	1330	* @param __ADCx__ ADC instance
AnnaBridge	189:f392fc9709a3	1331	* @retval ADC common register instance
AnnaBridge	189:f392fc9709a3	1332	*/
AnnaBridge	189:f392fc9709a3	1333	#define __LL_ADC_COMMON_INSTANCE(__ADCx__) \
AnnaBridge	189:f392fc9709a3	1334	(ADC1_COMMON)
AnnaBridge	189:f392fc9709a3	1335
AnnaBridge	189:f392fc9709a3	1336	/**
AnnaBridge	189:f392fc9709a3	1337	* @brief Helper macro to check if all ADC instances sharing the same
AnnaBridge	189:f392fc9709a3	1338	* ADC common instance are disabled.
AnnaBridge	189:f392fc9709a3	1339	* @note This check is required by functions with setting conditioned to
AnnaBridge	189:f392fc9709a3	1340	* ADC state:
AnnaBridge	189:f392fc9709a3	1341	* All ADC instances of the ADC common group must be disabled.
AnnaBridge	189:f392fc9709a3	1342	* Refer to functions having argument "ADCxy_COMMON" as parameter.
AnnaBridge	189:f392fc9709a3	1343	* @note On devices with only 1 ADC common instance, parameter of this macro
AnnaBridge	189:f392fc9709a3	1344	* is useless and can be ignored (parameter kept for compatibility
AnnaBridge	189:f392fc9709a3	1345	* with devices featuring several ADC common instances).
AnnaBridge	189:f392fc9709a3	1346	* @param __ADCXY_COMMON__ ADC common instance
AnnaBridge	189:f392fc9709a3	1347	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	189:f392fc9709a3	1348	* @retval Value "0" if all ADC instances sharing the same ADC common instance
AnnaBridge	189:f392fc9709a3	1349	* are disabled.
AnnaBridge	189:f392fc9709a3	1350	* Value "1" if at least one ADC instance sharing the same ADC common instance
AnnaBridge	189:f392fc9709a3	1351	* is enabled.
AnnaBridge	189:f392fc9709a3	1352	*/
AnnaBridge	189:f392fc9709a3	1353	#define __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE(__ADCXY_COMMON__) \
AnnaBridge	189:f392fc9709a3	1354	LL_ADC_IsEnabled(ADC1)
AnnaBridge	189:f392fc9709a3	1355
AnnaBridge	189:f392fc9709a3	1356	/**
AnnaBridge	189:f392fc9709a3	1357	* @brief Helper macro to define the ADC conversion data full-scale digital
AnnaBridge	189:f392fc9709a3	1358	* value corresponding to the selected ADC resolution.
AnnaBridge	189:f392fc9709a3	1359	* @note ADC conversion data full-scale corresponds to voltage range
AnnaBridge	189:f392fc9709a3	1360	* determined by analog voltage references Vref+ and Vref-
AnnaBridge	189:f392fc9709a3	1361	* (refer to reference manual).
AnnaBridge	189:f392fc9709a3	1362	* @param __ADC_RESOLUTION__ This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	1363	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	189:f392fc9709a3	1364	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	189:f392fc9709a3	1365	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	189:f392fc9709a3	1366	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	189:f392fc9709a3	1367	* @retval ADC conversion data equivalent voltage value (unit: mVolt)
AnnaBridge	189:f392fc9709a3	1368	*/
AnnaBridge	189:f392fc9709a3	1369	#define __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__) \
AnnaBridge	189:f392fc9709a3	1370	(((uint32_t)0xFFFU) >> ((__ADC_RESOLUTION__) >> (ADC_CFGR1_RES_BITOFFSET_POS - 1U)))
AnnaBridge	189:f392fc9709a3	1371
AnnaBridge	189:f392fc9709a3	1372	/**
AnnaBridge	189:f392fc9709a3	1373	* @brief Helper macro to convert the ADC conversion data from
AnnaBridge	189:f392fc9709a3	1374	* a resolution to another resolution.
AnnaBridge	189:f392fc9709a3	1375	* @param __DATA__ ADC conversion data to be converted
AnnaBridge	189:f392fc9709a3	1376	* @param __ADC_RESOLUTION_CURRENT__ Resolution of to the data to be converted
AnnaBridge	189:f392fc9709a3	1377	* This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	1378	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	189:f392fc9709a3	1379	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	189:f392fc9709a3	1380	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	189:f392fc9709a3	1381	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	189:f392fc9709a3	1382	* @param __ADC_RESOLUTION_TARGET__ Resolution of the data after conversion
AnnaBridge	189:f392fc9709a3	1383	* This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	1384	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	189:f392fc9709a3	1385	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	189:f392fc9709a3	1386	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	189:f392fc9709a3	1387	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	189:f392fc9709a3	1388	* @retval ADC conversion data to the requested resolution
AnnaBridge	189:f392fc9709a3	1389	*/
AnnaBridge	189:f392fc9709a3	1390	#define __LL_ADC_CONVERT_DATA_RESOLUTION(__DATA__, __ADC_RESOLUTION_CURRENT__, __ADC_RESOLUTION_TARGET__) \
AnnaBridge	189:f392fc9709a3	1391	(((__DATA__) \
AnnaBridge	189:f392fc9709a3	1392	<< ((__ADC_RESOLUTION_CURRENT__) >> (ADC_CFGR1_RES_BITOFFSET_POS - 1U))) \
AnnaBridge	189:f392fc9709a3	1393	>> ((__ADC_RESOLUTION_TARGET__) >> (ADC_CFGR1_RES_BITOFFSET_POS - 1U)) \
AnnaBridge	189:f392fc9709a3	1394	)
AnnaBridge	189:f392fc9709a3	1395
AnnaBridge	189:f392fc9709a3	1396	/**
AnnaBridge	189:f392fc9709a3	1397	* @brief Helper macro to calculate the voltage (unit: mVolt)
AnnaBridge	189:f392fc9709a3	1398	* corresponding to a ADC conversion data (unit: digital value).
AnnaBridge	189:f392fc9709a3	1399	* @note Analog reference voltage (Vref+) must be either known from
AnnaBridge	189:f392fc9709a3	1400	* user board environment or can be calculated using ADC measurement
AnnaBridge	189:f392fc9709a3	1401	* and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE().
AnnaBridge	189:f392fc9709a3	1402	* @param __VREFANALOG_VOLTAGE__ Analog reference voltage (unit: mV)
AnnaBridge	189:f392fc9709a3	1403	* @param __ADC_DATA__ ADC conversion data (resolution 12 bits)
AnnaBridge	189:f392fc9709a3	1404	* (unit: digital value).
AnnaBridge	189:f392fc9709a3	1405	* @param __ADC_RESOLUTION__ This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	1406	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	189:f392fc9709a3	1407	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	189:f392fc9709a3	1408	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	189:f392fc9709a3	1409	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	189:f392fc9709a3	1410	* @retval ADC conversion data equivalent voltage value (unit: mVolt)
AnnaBridge	189:f392fc9709a3	1411	*/
AnnaBridge	189:f392fc9709a3	1412	#define __LL_ADC_CALC_DATA_TO_VOLTAGE(__VREFANALOG_VOLTAGE__,\
AnnaBridge	189:f392fc9709a3	1413	__ADC_DATA__,\
AnnaBridge	189:f392fc9709a3	1414	__ADC_RESOLUTION__) \
AnnaBridge	189:f392fc9709a3	1415	((__ADC_DATA__) * (__VREFANALOG_VOLTAGE__) \
AnnaBridge	189:f392fc9709a3	1416	/ __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__) \
AnnaBridge	189:f392fc9709a3	1417	)
AnnaBridge	189:f392fc9709a3	1418
AnnaBridge	189:f392fc9709a3	1419	/**
AnnaBridge	189:f392fc9709a3	1420	* @brief Helper macro to calculate analog reference voltage (Vref+)
AnnaBridge	189:f392fc9709a3	1421	* (unit: mVolt) from ADC conversion data of internal voltage
AnnaBridge	189:f392fc9709a3	1422	* reference VrefInt.
AnnaBridge	189:f392fc9709a3	1423	* @note Computation is using VrefInt calibration value
AnnaBridge	189:f392fc9709a3	1424	* stored in system memory for each device during production.
AnnaBridge	189:f392fc9709a3	1425	* @note This voltage depends on user board environment: voltage level
AnnaBridge	189:f392fc9709a3	1426	* connected to pin Vref+.
AnnaBridge	189:f392fc9709a3	1427	* On devices with small package, the pin Vref+ is not present
AnnaBridge	189:f392fc9709a3	1428	* and internally bonded to pin Vdda.
AnnaBridge	189:f392fc9709a3	1429	* @note On this STM32 serie, calibration data of internal voltage reference
AnnaBridge	189:f392fc9709a3	1430	* VrefInt corresponds to a resolution of 12 bits,
AnnaBridge	189:f392fc9709a3	1431	* this is the recommended ADC resolution to convert voltage of
AnnaBridge	189:f392fc9709a3	1432	* internal voltage reference VrefInt.
AnnaBridge	189:f392fc9709a3	1433	* Otherwise, this macro performs the processing to scale
AnnaBridge	189:f392fc9709a3	1434	* ADC conversion data to 12 bits.
AnnaBridge	189:f392fc9709a3	1435	* @param __VREFINT_ADC_DATA__: ADC conversion data (resolution 12 bits)
AnnaBridge	189:f392fc9709a3	1436	* of internal voltage reference VrefInt (unit: digital value).
AnnaBridge	189:f392fc9709a3	1437	* @param __ADC_RESOLUTION__ This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	1438	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	189:f392fc9709a3	1439	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	189:f392fc9709a3	1440	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	189:f392fc9709a3	1441	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	189:f392fc9709a3	1442	* @retval Analog reference voltage (unit: mV)
AnnaBridge	189:f392fc9709a3	1443	*/
AnnaBridge	189:f392fc9709a3	1444	#define __LL_ADC_CALC_VREFANALOG_VOLTAGE(__VREFINT_ADC_DATA__,\
AnnaBridge	189:f392fc9709a3	1445	__ADC_RESOLUTION__) \
AnnaBridge	189:f392fc9709a3	1446	(((uint32_t)(VREFINT_CAL_ADDR) VREFINT_CAL_VREF) \
AnnaBridge	189:f392fc9709a3	1447	/ __LL_ADC_CONVERT_DATA_RESOLUTION((__VREFINT_ADC_DATA__), \
AnnaBridge	189:f392fc9709a3	1448	(__ADC_RESOLUTION__), \
AnnaBridge	189:f392fc9709a3	1449	LL_ADC_RESOLUTION_12B) \
AnnaBridge	189:f392fc9709a3	1450	)
AnnaBridge	189:f392fc9709a3	1451
AnnaBridge	189:f392fc9709a3	1452	/* Note: On device STM32L011, calibration parameter TS_CAL1 is not available. */
AnnaBridge	189:f392fc9709a3	1453	/* Therefore, helper macro __LL_ADC_CALC_TEMPERATURE() is not available.*/
AnnaBridge	189:f392fc9709a3	1454	/* Use helper macro @ref __LL_ADC_CALC_TEMPERATURE_TYP_PARAMS(). */
AnnaBridge	189:f392fc9709a3	1455	#if !defined(STM32L011xx)
AnnaBridge	189:f392fc9709a3	1456	/**
AnnaBridge	189:f392fc9709a3	1457	* @brief Helper macro to calculate the temperature (unit: degree Celsius)
AnnaBridge	189:f392fc9709a3	1458	* from ADC conversion data of internal temperature sensor.
AnnaBridge	189:f392fc9709a3	1459	* @note Computation is using temperature sensor calibration values
AnnaBridge	189:f392fc9709a3	1460	* stored in system memory for each device during production.
AnnaBridge	189:f392fc9709a3	1461	* @note Calculation formula:
AnnaBridge	189:f392fc9709a3	1462	* Temperature = ((TS_ADC_DATA - TS_CAL1)
AnnaBridge	189:f392fc9709a3	1463	* * (TS_CAL2_TEMP - TS_CAL1_TEMP))
AnnaBridge	189:f392fc9709a3	1464	* / (TS_CAL2 - TS_CAL1) + TS_CAL1_TEMP
AnnaBridge	189:f392fc9709a3	1465	* with TS_ADC_DATA = temperature sensor raw data measured by ADC
AnnaBridge	189:f392fc9709a3	1466	* Avg_Slope = (TS_CAL2 - TS_CAL1)
AnnaBridge	189:f392fc9709a3	1467	* / (TS_CAL2_TEMP - TS_CAL1_TEMP)
AnnaBridge	189:f392fc9709a3	1468	* TS_CAL1 = equivalent TS_ADC_DATA at temperature
AnnaBridge	189:f392fc9709a3	1469	* TEMP_DEGC_CAL1 (calibrated in factory)
AnnaBridge	189:f392fc9709a3	1470	* TS_CAL2 = equivalent TS_ADC_DATA at temperature
AnnaBridge	189:f392fc9709a3	1471	* TEMP_DEGC_CAL2 (calibrated in factory)
AnnaBridge	189:f392fc9709a3	1472	* Caution: Calculation relevancy under reserve that calibration
AnnaBridge	189:f392fc9709a3	1473	* parameters are correct (address and data).
AnnaBridge	189:f392fc9709a3	1474	* To calculate temperature using temperature sensor
AnnaBridge	189:f392fc9709a3	1475	* datasheet typical values (generic values less, therefore
AnnaBridge	189:f392fc9709a3	1476	* less accurate than calibrated values),
AnnaBridge	189:f392fc9709a3	1477	* use helper macro @ref __LL_ADC_CALC_TEMPERATURE_TYP_PARAMS().
AnnaBridge	189:f392fc9709a3	1478	* @note As calculation input, the analog reference voltage (Vref+) must be
AnnaBridge	189:f392fc9709a3	1479	* defined as it impacts the ADC LSB equivalent voltage.
AnnaBridge	189:f392fc9709a3	1480	* @note Analog reference voltage (Vref+) must be either known from
AnnaBridge	189:f392fc9709a3	1481	* user board environment or can be calculated using ADC measurement
AnnaBridge	189:f392fc9709a3	1482	* and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE().
AnnaBridge	189:f392fc9709a3	1483	* @note On this STM32 serie, calibration data of temperature sensor
AnnaBridge	189:f392fc9709a3	1484	* corresponds to a resolution of 12 bits,
AnnaBridge	189:f392fc9709a3	1485	* this is the recommended ADC resolution to convert voltage of
AnnaBridge	189:f392fc9709a3	1486	* temperature sensor.
AnnaBridge	189:f392fc9709a3	1487	* Otherwise, this macro performs the processing to scale
AnnaBridge	189:f392fc9709a3	1488	* ADC conversion data to 12 bits.
AnnaBridge	189:f392fc9709a3	1489	* @param __VREFANALOG_VOLTAGE__ Analog reference voltage (unit: mV)
AnnaBridge	189:f392fc9709a3	1490	* @param __TEMPSENSOR_ADC_DATA__ ADC conversion data of internal
AnnaBridge	189:f392fc9709a3	1491	* temperature sensor (unit: digital value).
AnnaBridge	189:f392fc9709a3	1492	* @param __ADC_RESOLUTION__ ADC resolution at which internal temperature
AnnaBridge	189:f392fc9709a3	1493	* sensor voltage has been measured.
AnnaBridge	189:f392fc9709a3	1494	* This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	1495	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	189:f392fc9709a3	1496	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	189:f392fc9709a3	1497	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	189:f392fc9709a3	1498	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	189:f392fc9709a3	1499	* @retval Temperature (unit: degree Celsius)
AnnaBridge	189:f392fc9709a3	1500	*/
AnnaBridge	189:f392fc9709a3	1501	#define __LL_ADC_CALC_TEMPERATURE(__VREFANALOG_VOLTAGE__,\
AnnaBridge	189:f392fc9709a3	1502	__TEMPSENSOR_ADC_DATA__,\
AnnaBridge	189:f392fc9709a3	1503	__ADC_RESOLUTION__) \
AnnaBridge	189:f392fc9709a3	1504	(((( ((int32_t)((__LL_ADC_CONVERT_DATA_RESOLUTION((__TEMPSENSOR_ADC_DATA__), \
AnnaBridge	189:f392fc9709a3	1505	(__ADC_RESOLUTION__), \
AnnaBridge	189:f392fc9709a3	1506	LL_ADC_RESOLUTION_12B) \
AnnaBridge	189:f392fc9709a3	1507	* (__VREFANALOG_VOLTAGE__)) \
AnnaBridge	189:f392fc9709a3	1508	/ TEMPSENSOR_CAL_VREFANALOG) \
AnnaBridge	189:f392fc9709a3	1509	- (int32_t) *TEMPSENSOR_CAL1_ADDR) \
AnnaBridge	189:f392fc9709a3	1510	) * (int32_t)(TEMPSENSOR_CAL2_TEMP - TEMPSENSOR_CAL1_TEMP) \
AnnaBridge	189:f392fc9709a3	1511	) / (int32_t)((int32_t)TEMPSENSOR_CAL2_ADDR - (int32_t)TEMPSENSOR_CAL1_ADDR) \
AnnaBridge	189:f392fc9709a3	1512	) + TEMPSENSOR_CAL1_TEMP \
AnnaBridge	189:f392fc9709a3	1513	)
AnnaBridge	189:f392fc9709a3	1514	#endif
AnnaBridge	189:f392fc9709a3	1515
AnnaBridge	189:f392fc9709a3	1516	/**
AnnaBridge	189:f392fc9709a3	1517	* @brief Helper macro to calculate the temperature (unit: degree Celsius)
AnnaBridge	189:f392fc9709a3	1518	* from ADC conversion data of internal temperature sensor.
AnnaBridge	189:f392fc9709a3	1519	* @note Computation is using temperature sensor typical values
AnnaBridge	189:f392fc9709a3	1520	* (refer to device datasheet).
AnnaBridge	189:f392fc9709a3	1521	* @note Calculation formula:
AnnaBridge	189:f392fc9709a3	1522	* Temperature = (TS_TYP_CALx_VOLT(uV) - TS_ADC_DATA * Conversion_uV)
AnnaBridge	189:f392fc9709a3	1523	* / Avg_Slope + CALx_TEMP
AnnaBridge	189:f392fc9709a3	1524	* with TS_ADC_DATA = temperature sensor raw data measured by ADC
AnnaBridge	189:f392fc9709a3	1525	* (unit: digital value)
AnnaBridge	189:f392fc9709a3	1526	* Avg_Slope = temperature sensor slope
AnnaBridge	189:f392fc9709a3	1527	* (unit: uV/Degree Celsius)
AnnaBridge	189:f392fc9709a3	1528	* TS_TYP_CALx_VOLT = temperature sensor digital value at
AnnaBridge	189:f392fc9709a3	1529	* temperature CALx_TEMP (unit: mV)
AnnaBridge	189:f392fc9709a3	1530	* Caution: Calculation relevancy under reserve the temperature sensor
AnnaBridge	189:f392fc9709a3	1531	* of the current device has characteristics in line with
AnnaBridge	189:f392fc9709a3	1532	* datasheet typical values.
AnnaBridge	189:f392fc9709a3	1533	* If temperature sensor calibration values are available on
AnnaBridge	189:f392fc9709a3	1534	* on this device (presence of macro __LL_ADC_CALC_TEMPERATURE()),
AnnaBridge	189:f392fc9709a3	1535	* temperature calculation will be more accurate using
AnnaBridge	189:f392fc9709a3	1536	* helper macro @ref __LL_ADC_CALC_TEMPERATURE().
AnnaBridge	189:f392fc9709a3	1537	* @note As calculation input, the analog reference voltage (Vref+) must be
AnnaBridge	189:f392fc9709a3	1538	* defined as it impacts the ADC LSB equivalent voltage.
AnnaBridge	189:f392fc9709a3	1539	* @note Analog reference voltage (Vref+) must be either known from
AnnaBridge	189:f392fc9709a3	1540	* user board environment or can be calculated using ADC measurement
AnnaBridge	189:f392fc9709a3	1541	* and ADC helper macro @ref __LL_ADC_CALC_VREFANALOG_VOLTAGE().
AnnaBridge	189:f392fc9709a3	1542	* @note ADC measurement data must correspond to a resolution of 12bits
AnnaBridge	189:f392fc9709a3	1543	* (full scale digital value 4095). If not the case, the data must be
AnnaBridge	189:f392fc9709a3	1544	* preliminarily rescaled to an equivalent resolution of 12 bits.
AnnaBridge	189:f392fc9709a3	1545	* @param __TEMPSENSOR_TYP_AVGSLOPE__ Device datasheet data: Temperature sensor slope typical value (unit: uV/DegCelsius).
AnnaBridge	189:f392fc9709a3	1546	* On STM32L0, refer to device datasheet parameter "Avg_Slope".
AnnaBridge	189:f392fc9709a3	1547	* @param __TEMPSENSOR_TYP_CALX_V__ Device datasheet data: Temperature sensor voltage typical value (at temperature and Vref+ defined in parameters below) (unit: mV).
AnnaBridge	189:f392fc9709a3	1548	* On STM32L0, refer to device datasheet parameter "V130" (corresponding to TS_CAL2).
AnnaBridge	189:f392fc9709a3	1549	* @param __TEMPSENSOR_CALX_TEMP__ Device datasheet data: Temperature at which temperature sensor voltage (see parameter above) is corresponding (unit: mV)
AnnaBridge	189:f392fc9709a3	1550	* @param __VREFANALOG_VOLTAGE__ Analog voltage reference (Vref+) voltage (unit: mV)
AnnaBridge	189:f392fc9709a3	1551	* @param __TEMPSENSOR_ADC_DATA__ ADC conversion data of internal temperature sensor (unit: digital value).
AnnaBridge	189:f392fc9709a3	1552	* @param __ADC_RESOLUTION__ ADC resolution at which internal temperature sensor voltage has been measured.
AnnaBridge	189:f392fc9709a3	1553	* This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	1554	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	189:f392fc9709a3	1555	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	189:f392fc9709a3	1556	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	189:f392fc9709a3	1557	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	189:f392fc9709a3	1558	* @retval Temperature (unit: degree Celsius)
AnnaBridge	189:f392fc9709a3	1559	*/
AnnaBridge	189:f392fc9709a3	1560	#define __LL_ADC_CALC_TEMPERATURE_TYP_PARAMS(__TEMPSENSOR_TYP_AVGSLOPE__,\
AnnaBridge	189:f392fc9709a3	1561	__TEMPSENSOR_TYP_CALX_V__,\
AnnaBridge	189:f392fc9709a3	1562	__TEMPSENSOR_CALX_TEMP__,\
AnnaBridge	189:f392fc9709a3	1563	__VREFANALOG_VOLTAGE__,\
AnnaBridge	189:f392fc9709a3	1564	__TEMPSENSOR_ADC_DATA__,\
AnnaBridge	189:f392fc9709a3	1565	__ADC_RESOLUTION__) \
AnnaBridge	189:f392fc9709a3	1566	((( ( \
AnnaBridge	189:f392fc9709a3	1567	(int32_t)((((__TEMPSENSOR_ADC_DATA__) * (__VREFANALOG_VOLTAGE__)) \
AnnaBridge	189:f392fc9709a3	1568	/ __LL_ADC_DIGITAL_SCALE(__ADC_RESOLUTION__)) \
AnnaBridge	189:f392fc9709a3	1569	* 1000) \
AnnaBridge	189:f392fc9709a3	1570	- \
AnnaBridge	189:f392fc9709a3	1571	(int32_t)(((__TEMPSENSOR_TYP_CALX_V__)) \
AnnaBridge	189:f392fc9709a3	1572	* 1000) \
AnnaBridge	189:f392fc9709a3	1573	) \
AnnaBridge	189:f392fc9709a3	1574	) / (__TEMPSENSOR_TYP_AVGSLOPE__) \
AnnaBridge	189:f392fc9709a3	1575	) + (__TEMPSENSOR_CALX_TEMP__) \
AnnaBridge	189:f392fc9709a3	1576	)
AnnaBridge	189:f392fc9709a3	1577
AnnaBridge	189:f392fc9709a3	1578	/**
AnnaBridge	189:f392fc9709a3	1579	* @}
AnnaBridge	189:f392fc9709a3	1580	*/
AnnaBridge	189:f392fc9709a3	1581
AnnaBridge	189:f392fc9709a3	1582	/**
AnnaBridge	189:f392fc9709a3	1583	* @}
AnnaBridge	189:f392fc9709a3	1584	*/
AnnaBridge	189:f392fc9709a3	1585
AnnaBridge	189:f392fc9709a3	1586
AnnaBridge	189:f392fc9709a3	1587	/* Exported functions --------------------------------------------------------*/
AnnaBridge	189:f392fc9709a3	1588	/** @defgroup ADC_LL_Exported_Functions ADC Exported Functions
AnnaBridge	189:f392fc9709a3	1589	* @{
AnnaBridge	189:f392fc9709a3	1590	*/
AnnaBridge	189:f392fc9709a3	1591
AnnaBridge	189:f392fc9709a3	1592	/** @defgroup ADC_LL_EF_DMA_Management ADC DMA management
AnnaBridge	189:f392fc9709a3	1593	* @{
AnnaBridge	189:f392fc9709a3	1594	*/
AnnaBridge	189:f392fc9709a3	1595	/* Note: LL ADC functions to set DMA transfer are located into sections of */
AnnaBridge	189:f392fc9709a3	1596	/* configuration of ADC instance, groups and multimode (if available): */
AnnaBridge	189:f392fc9709a3	1597	/* @ref LL_ADC_REG_SetDMATransfer(), ... */
AnnaBridge	189:f392fc9709a3	1598
AnnaBridge	189:f392fc9709a3	1599	/**
AnnaBridge	189:f392fc9709a3	1600	* @brief Function to help to configure DMA transfer from ADC: retrieve the
AnnaBridge	189:f392fc9709a3	1601	* ADC register address from ADC instance and a list of ADC registers
AnnaBridge	189:f392fc9709a3	1602	* intended to be used (most commonly) with DMA transfer.
AnnaBridge	189:f392fc9709a3	1603	* @note These ADC registers are data registers:
AnnaBridge	189:f392fc9709a3	1604	* when ADC conversion data is available in ADC data registers,
AnnaBridge	189:f392fc9709a3	1605	* ADC generates a DMA transfer request.
AnnaBridge	189:f392fc9709a3	1606	* @note This macro is intended to be used with LL DMA driver, refer to
AnnaBridge	189:f392fc9709a3	1607	* function "LL_DMA_ConfigAddresses()".
AnnaBridge	189:f392fc9709a3	1608	* Example:
AnnaBridge	189:f392fc9709a3	1609	* LL_DMA_ConfigAddresses(DMA1,
AnnaBridge	189:f392fc9709a3	1610	* LL_DMA_CHANNEL_1,
AnnaBridge	189:f392fc9709a3	1611	* LL_ADC_DMA_GetRegAddr(ADC1, LL_ADC_DMA_REG_REGULAR_DATA),
AnnaBridge	189:f392fc9709a3	1612	* (uint32_t)&< array or variable >,
AnnaBridge	189:f392fc9709a3	1613	* LL_DMA_DIRECTION_PERIPH_TO_MEMORY);
AnnaBridge	189:f392fc9709a3	1614	* @note For devices with several ADC: in multimode, some devices
AnnaBridge	189:f392fc9709a3	1615	* use a different data register outside of ADC instance scope
AnnaBridge	189:f392fc9709a3	1616	* (common data register). This macro manages this register difference,
AnnaBridge	189:f392fc9709a3	1617	* only ADC instance has to be set as parameter.
AnnaBridge	189:f392fc9709a3	1618	* @rmtoll DR DATA LL_ADC_DMA_GetRegAddr
AnnaBridge	189:f392fc9709a3	1619	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	1620	* @param Register This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	1621	* @arg @ref LL_ADC_DMA_REG_REGULAR_DATA
AnnaBridge	189:f392fc9709a3	1622	* @retval ADC register address
AnnaBridge	189:f392fc9709a3	1623	*/
AnnaBridge	189:f392fc9709a3	1624	__STATIC_INLINE uint32_t LL_ADC_DMA_GetRegAddr(ADC_TypeDef *ADCx, uint32_t Register)
AnnaBridge	189:f392fc9709a3	1625	{
AnnaBridge	189:f392fc9709a3	1626	/* Retrieve address of register DR */
AnnaBridge	189:f392fc9709a3	1627	return (uint32_t)&(ADCx->DR);
AnnaBridge	189:f392fc9709a3	1628	}
AnnaBridge	189:f392fc9709a3	1629
AnnaBridge	189:f392fc9709a3	1630	/**
AnnaBridge	189:f392fc9709a3	1631	* @}
AnnaBridge	189:f392fc9709a3	1632	*/
AnnaBridge	189:f392fc9709a3	1633
AnnaBridge	189:f392fc9709a3	1634	/** @defgroup ADC_LL_EF_Configuration_ADC_Common Configuration of ADC hierarchical scope: common to several ADC instances
AnnaBridge	189:f392fc9709a3	1635	* @{
AnnaBridge	189:f392fc9709a3	1636	*/
AnnaBridge	189:f392fc9709a3	1637
AnnaBridge	189:f392fc9709a3	1638	/**
AnnaBridge	189:f392fc9709a3	1639	* @brief Set parameter common to several ADC: Clock source and prescaler.
AnnaBridge	189:f392fc9709a3	1640	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	189:f392fc9709a3	1641	* ADC state:
AnnaBridge	189:f392fc9709a3	1642	* All ADC instances of the ADC common group must be disabled.
AnnaBridge	189:f392fc9709a3	1643	* This check can be done with function @ref LL_ADC_IsEnabled() for each
AnnaBridge	189:f392fc9709a3	1644	* ADC instance or by using helper macro helper macro
AnnaBridge	189:f392fc9709a3	1645	* @ref __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE().
AnnaBridge	189:f392fc9709a3	1646	* @rmtoll CCR PRESC LL_ADC_SetCommonClock
AnnaBridge	189:f392fc9709a3	1647	* @param ADCxy_COMMON ADC common instance
AnnaBridge	189:f392fc9709a3	1648	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	189:f392fc9709a3	1649	* @param CommonClock This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	1650	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV1 (1)
AnnaBridge	189:f392fc9709a3	1651	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV2 (1)
AnnaBridge	189:f392fc9709a3	1652	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV4 (1)
AnnaBridge	189:f392fc9709a3	1653	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV6 (1)
AnnaBridge	189:f392fc9709a3	1654	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV8 (1)
AnnaBridge	189:f392fc9709a3	1655	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV10 (1)
AnnaBridge	189:f392fc9709a3	1656	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV12 (1)
AnnaBridge	189:f392fc9709a3	1657	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV16 (1)
AnnaBridge	189:f392fc9709a3	1658	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV32 (1)
AnnaBridge	189:f392fc9709a3	1659	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV64 (1)
AnnaBridge	189:f392fc9709a3	1660	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV128 (1)
AnnaBridge	189:f392fc9709a3	1661	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV256 (1)
AnnaBridge	189:f392fc9709a3	1662	*
AnnaBridge	189:f392fc9709a3	1663	* (1) ADC common clock asynchonous prescaler is applied to
AnnaBridge	189:f392fc9709a3	1664	* each ADC instance if the corresponding ADC instance clock
AnnaBridge	189:f392fc9709a3	1665	* is set to clock source asynchronous.
AnnaBridge	189:f392fc9709a3	1666	* (refer to function @ref LL_ADC_SetClock() ).
AnnaBridge	189:f392fc9709a3	1667	* @retval None
AnnaBridge	189:f392fc9709a3	1668	*/
AnnaBridge	189:f392fc9709a3	1669	__STATIC_INLINE void LL_ADC_SetCommonClock(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t CommonClock)
AnnaBridge	189:f392fc9709a3	1670	{
AnnaBridge	189:f392fc9709a3	1671	MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_PRESC, CommonClock);
AnnaBridge	189:f392fc9709a3	1672	}
AnnaBridge	189:f392fc9709a3	1673
AnnaBridge	189:f392fc9709a3	1674	/**
AnnaBridge	189:f392fc9709a3	1675	* @brief Get parameter common to several ADC: Clock source and prescaler.
AnnaBridge	189:f392fc9709a3	1676	* @rmtoll CCR PRESC LL_ADC_GetCommonClock
AnnaBridge	189:f392fc9709a3	1677	* @param ADCxy_COMMON ADC common instance
AnnaBridge	189:f392fc9709a3	1678	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	189:f392fc9709a3	1679	* @retval Returned value can be one of the following values:
AnnaBridge	189:f392fc9709a3	1680	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV1 (1)
AnnaBridge	189:f392fc9709a3	1681	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV2 (1)
AnnaBridge	189:f392fc9709a3	1682	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV4 (1)
AnnaBridge	189:f392fc9709a3	1683	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV6 (1)
AnnaBridge	189:f392fc9709a3	1684	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV8 (1)
AnnaBridge	189:f392fc9709a3	1685	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV10 (1)
AnnaBridge	189:f392fc9709a3	1686	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV12 (1)
AnnaBridge	189:f392fc9709a3	1687	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV16 (1)
AnnaBridge	189:f392fc9709a3	1688	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV32 (1)
AnnaBridge	189:f392fc9709a3	1689	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV64 (1)
AnnaBridge	189:f392fc9709a3	1690	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV128 (1)
AnnaBridge	189:f392fc9709a3	1691	* @arg @ref LL_ADC_CLOCK_ASYNC_DIV256 (1)
AnnaBridge	189:f392fc9709a3	1692	*
AnnaBridge	189:f392fc9709a3	1693	* (1) ADC common clock asynchonous prescaler is applied to
AnnaBridge	189:f392fc9709a3	1694	* each ADC instance if the corresponding ADC instance clock
AnnaBridge	189:f392fc9709a3	1695	* is set to clock source asynchronous.
AnnaBridge	189:f392fc9709a3	1696	* (refer to function @ref LL_ADC_SetClock() ).
AnnaBridge	189:f392fc9709a3	1697	*/
AnnaBridge	189:f392fc9709a3	1698	__STATIC_INLINE uint32_t LL_ADC_GetCommonClock(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	189:f392fc9709a3	1699	{
AnnaBridge	189:f392fc9709a3	1700	return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_PRESC));
AnnaBridge	189:f392fc9709a3	1701	}
AnnaBridge	189:f392fc9709a3	1702
AnnaBridge	189:f392fc9709a3	1703	/**
AnnaBridge	189:f392fc9709a3	1704	* @brief Set parameter common to several ADC: Clock low frequency mode.
AnnaBridge	189:f392fc9709a3	1705	* Refer to reference manual for alignments formats
AnnaBridge	189:f392fc9709a3	1706	* dependencies to ADC resolutions.
AnnaBridge	189:f392fc9709a3	1707	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	189:f392fc9709a3	1708	* ADC state:
AnnaBridge	189:f392fc9709a3	1709	* ADC must be disabled or enabled without conversion on going
AnnaBridge	189:f392fc9709a3	1710	* on group regular.
AnnaBridge	189:f392fc9709a3	1711	* @rmtoll CCR LFMEN LL_ADC_SetCommonFrequencyMode
AnnaBridge	189:f392fc9709a3	1712	* @param ADCxy_COMMON ADC common instance
AnnaBridge	189:f392fc9709a3	1713	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	189:f392fc9709a3	1714	* @param Resolution This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	1715	* @arg @ref LL_ADC_CLOCK_FREQ_MODE_HIGH
AnnaBridge	189:f392fc9709a3	1716	* @arg @ref LL_ADC_CLOCK_FREQ_MODE_LOW
AnnaBridge	189:f392fc9709a3	1717	* @retval None
AnnaBridge	189:f392fc9709a3	1718	*/
AnnaBridge	189:f392fc9709a3	1719	__STATIC_INLINE void LL_ADC_SetCommonFrequencyMode(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t Resolution)
AnnaBridge	189:f392fc9709a3	1720	{
AnnaBridge	189:f392fc9709a3	1721	MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_LFMEN, Resolution);
AnnaBridge	189:f392fc9709a3	1722	}
AnnaBridge	189:f392fc9709a3	1723
AnnaBridge	189:f392fc9709a3	1724	/**
AnnaBridge	189:f392fc9709a3	1725	* @brief Get parameter common to several ADC: Clock low frequency mode.
AnnaBridge	189:f392fc9709a3	1726	* Refer to reference manual for alignments formats
AnnaBridge	189:f392fc9709a3	1727	* dependencies to ADC resolutions.
AnnaBridge	189:f392fc9709a3	1728	* @rmtoll CCR LFMEN LL_ADC_GetCommonFrequencyMode
AnnaBridge	189:f392fc9709a3	1729	* @param ADCxy_COMMON ADC common instance
AnnaBridge	189:f392fc9709a3	1730	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	189:f392fc9709a3	1731	* @retval Returned value can be one of the following values:
AnnaBridge	189:f392fc9709a3	1732	* @arg @ref LL_ADC_CLOCK_FREQ_MODE_HIGH
AnnaBridge	189:f392fc9709a3	1733	* @arg @ref LL_ADC_CLOCK_FREQ_MODE_LOW
AnnaBridge	189:f392fc9709a3	1734	*/
AnnaBridge	189:f392fc9709a3	1735	__STATIC_INLINE uint32_t LL_ADC_GetCommonFrequencyMode(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	189:f392fc9709a3	1736	{
AnnaBridge	189:f392fc9709a3	1737	return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_LFMEN));
AnnaBridge	189:f392fc9709a3	1738	}
AnnaBridge	189:f392fc9709a3	1739
AnnaBridge	189:f392fc9709a3	1740	/**
AnnaBridge	189:f392fc9709a3	1741	* @brief Set parameter common to several ADC: measurement path to internal
AnnaBridge	189:f392fc9709a3	1742	* channels (VrefInt, temperature sensor, ...).
AnnaBridge	189:f392fc9709a3	1743	* @note One or several values can be selected.
AnnaBridge	189:f392fc9709a3	1744	* Example: (LL_ADC_PATH_INTERNAL_VREFINT \|
AnnaBridge	189:f392fc9709a3	1745	* LL_ADC_PATH_INTERNAL_TEMPSENSOR)
AnnaBridge	189:f392fc9709a3	1746	* @note Stabilization time of measurement path to internal channel:
AnnaBridge	189:f392fc9709a3	1747	* After enabling internal paths, before starting ADC conversion,
AnnaBridge	189:f392fc9709a3	1748	* a delay is required for internal voltage reference and
AnnaBridge	189:f392fc9709a3	1749	* temperature sensor stabilization time.
AnnaBridge	189:f392fc9709a3	1750	* Refer to device datasheet.
AnnaBridge	189:f392fc9709a3	1751	* Refer to literal @ref LL_ADC_DELAY_VREFINT_STAB_US.
AnnaBridge	189:f392fc9709a3	1752	* Refer to literal @ref LL_ADC_DELAY_TEMPSENSOR_STAB_US.
AnnaBridge	189:f392fc9709a3	1753	* @note ADC internal channel sampling time constraint:
AnnaBridge	189:f392fc9709a3	1754	* For ADC conversion of internal channels,
AnnaBridge	189:f392fc9709a3	1755	* a sampling time minimum value is required.
AnnaBridge	189:f392fc9709a3	1756	* Refer to device datasheet.
AnnaBridge	189:f392fc9709a3	1757	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	189:f392fc9709a3	1758	* ADC state:
AnnaBridge	189:f392fc9709a3	1759	* All ADC instances of the ADC common group must be disabled.
AnnaBridge	189:f392fc9709a3	1760	* This check can be done with function @ref LL_ADC_IsEnabled() for each
AnnaBridge	189:f392fc9709a3	1761	* ADC instance or by using helper macro helper macro
AnnaBridge	189:f392fc9709a3	1762	* @ref __LL_ADC_IS_ENABLED_ALL_COMMON_INSTANCE().
AnnaBridge	189:f392fc9709a3	1763	* @rmtoll CCR VREFEN LL_ADC_SetCommonPathInternalCh\n
AnnaBridge	189:f392fc9709a3	1764	* CCR TSEN LL_ADC_SetCommonPathInternalCh\n
AnnaBridge	189:f392fc9709a3	1765	* CCR VLCDEN LL_ADC_SetCommonPathInternalCh
AnnaBridge	189:f392fc9709a3	1766	* @param ADCxy_COMMON ADC common instance
AnnaBridge	189:f392fc9709a3	1767	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	189:f392fc9709a3	1768	* @param PathInternal This parameter can be a combination of the following values:
AnnaBridge	189:f392fc9709a3	1769	* @arg @ref LL_ADC_PATH_INTERNAL_NONE
AnnaBridge	189:f392fc9709a3	1770	* @arg @ref LL_ADC_PATH_INTERNAL_VREFINT
AnnaBridge	189:f392fc9709a3	1771	* @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR
AnnaBridge	189:f392fc9709a3	1772	* @arg @ref LL_ADC_PATH_INTERNAL_VLCD (*)
AnnaBridge	189:f392fc9709a3	1773	*
AnnaBridge	189:f392fc9709a3	1774	* (*) value not defined in all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
AnnaBridge	189:f392fc9709a3	1775	* @retval None
AnnaBridge	189:f392fc9709a3	1776	*/
AnnaBridge	189:f392fc9709a3	1777	__STATIC_INLINE void LL_ADC_SetCommonPathInternalCh(ADC_Common_TypeDef *ADCxy_COMMON, uint32_t PathInternal)
AnnaBridge	189:f392fc9709a3	1778	{
AnnaBridge	189:f392fc9709a3	1779	#if defined (ADC_CCR_VLCDEN)
AnnaBridge	189:f392fc9709a3	1780	MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_VREFEN \| ADC_CCR_TSEN \| ADC_CCR_VLCDEN, PathInternal);
AnnaBridge	189:f392fc9709a3	1781	#else
AnnaBridge	189:f392fc9709a3	1782	MODIFY_REG(ADCxy_COMMON->CCR, ADC_CCR_VREFEN \| ADC_CCR_TSEN, PathInternal);
AnnaBridge	189:f392fc9709a3	1783	#endif
AnnaBridge	189:f392fc9709a3	1784	}
AnnaBridge	189:f392fc9709a3	1785
AnnaBridge	189:f392fc9709a3	1786	/**
AnnaBridge	189:f392fc9709a3	1787	* @brief Get parameter common to several ADC: measurement path to internal
AnnaBridge	189:f392fc9709a3	1788	* channels (VrefInt, temperature sensor, ...).
AnnaBridge	189:f392fc9709a3	1789	* @note One or several values can be selected.
AnnaBridge	189:f392fc9709a3	1790	* Example: (LL_ADC_PATH_INTERNAL_VREFINT \|
AnnaBridge	189:f392fc9709a3	1791	* LL_ADC_PATH_INTERNAL_TEMPSENSOR)
AnnaBridge	189:f392fc9709a3	1792	* @rmtoll CCR VREFEN LL_ADC_GetCommonPathInternalCh\n
AnnaBridge	189:f392fc9709a3	1793	* CCR TSEN LL_ADC_GetCommonPathInternalCh\n
AnnaBridge	189:f392fc9709a3	1794	* CCR VLCDEN LL_ADC_GetCommonPathInternalCh
AnnaBridge	189:f392fc9709a3	1795	* @param ADCxy_COMMON ADC common instance
AnnaBridge	189:f392fc9709a3	1796	* (can be set directly from CMSIS definition or by using helper macro @ref __LL_ADC_COMMON_INSTANCE() )
AnnaBridge	189:f392fc9709a3	1797	* @retval Returned value can be a combination of the following values:
AnnaBridge	189:f392fc9709a3	1798	* @arg @ref LL_ADC_PATH_INTERNAL_NONE
AnnaBridge	189:f392fc9709a3	1799	* @arg @ref LL_ADC_PATH_INTERNAL_VREFINT
AnnaBridge	189:f392fc9709a3	1800	* @arg @ref LL_ADC_PATH_INTERNAL_TEMPSENSOR
AnnaBridge	189:f392fc9709a3	1801	* @arg @ref LL_ADC_PATH_INTERNAL_VLCD (*)
AnnaBridge	189:f392fc9709a3	1802	*
AnnaBridge	189:f392fc9709a3	1803	* (*) value not defined in all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
AnnaBridge	189:f392fc9709a3	1804	*/
AnnaBridge	189:f392fc9709a3	1805	__STATIC_INLINE uint32_t LL_ADC_GetCommonPathInternalCh(ADC_Common_TypeDef *ADCxy_COMMON)
AnnaBridge	189:f392fc9709a3	1806	{
AnnaBridge	189:f392fc9709a3	1807	#if defined(ADC_CCR_VLCDEN)
AnnaBridge	189:f392fc9709a3	1808	return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_VREFEN \| ADC_CCR_TSEN \| ADC_CCR_VLCDEN));
AnnaBridge	189:f392fc9709a3	1809	#else
AnnaBridge	189:f392fc9709a3	1810	return (uint32_t)(READ_BIT(ADCxy_COMMON->CCR, ADC_CCR_VREFEN \| ADC_CCR_TSEN));
AnnaBridge	189:f392fc9709a3	1811	#endif
AnnaBridge	189:f392fc9709a3	1812	}
AnnaBridge	189:f392fc9709a3	1813
AnnaBridge	189:f392fc9709a3	1814	/**
AnnaBridge	189:f392fc9709a3	1815	* @}
AnnaBridge	189:f392fc9709a3	1816	*/
AnnaBridge	189:f392fc9709a3	1817
AnnaBridge	189:f392fc9709a3	1818	/** @defgroup ADC_LL_EF_Configuration_ADC_Instance Configuration of ADC hierarchical scope: ADC instance
AnnaBridge	189:f392fc9709a3	1819	* @{
AnnaBridge	189:f392fc9709a3	1820	*/
AnnaBridge	189:f392fc9709a3	1821
AnnaBridge	189:f392fc9709a3	1822	/**
AnnaBridge	189:f392fc9709a3	1823	* @brief Set ADC instance clock source and prescaler.
AnnaBridge	189:f392fc9709a3	1824	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	189:f392fc9709a3	1825	* ADC state:
AnnaBridge	189:f392fc9709a3	1826	* ADC must be disabled.
AnnaBridge	189:f392fc9709a3	1827	* @rmtoll CFGR2 CKMODE LL_ADC_SetClock
AnnaBridge	189:f392fc9709a3	1828	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	1829	* @param ClockSource This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	1830	* @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV4
AnnaBridge	189:f392fc9709a3	1831	* @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV2
AnnaBridge	189:f392fc9709a3	1832	* @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV1 (2)
AnnaBridge	189:f392fc9709a3	1833	* @arg @ref LL_ADC_CLOCK_ASYNC (1)
AnnaBridge	189:f392fc9709a3	1834	*
AnnaBridge	189:f392fc9709a3	1835	* (1) Asynchronous clock prescaler can be configured using
AnnaBridge	189:f392fc9709a3	1836	* function @ref LL_ADC_SetCommonClock().\n
AnnaBridge	189:f392fc9709a3	1837	* (2) Caution: This parameter has some clock ratio constraints:
AnnaBridge	189:f392fc9709a3	1838	* This configuration must be enabled only if PCLK has a 50%
AnnaBridge	189:f392fc9709a3	1839	* duty clock cycle (APB prescaler configured inside the RCC
AnnaBridge	189:f392fc9709a3	1840	* must be bypassed and the system clock must by 50% duty
AnnaBridge	189:f392fc9709a3	1841	* cycle).
AnnaBridge	189:f392fc9709a3	1842	* Refer to reference manual.
AnnaBridge	189:f392fc9709a3	1843	* @retval None
AnnaBridge	189:f392fc9709a3	1844	*/
AnnaBridge	189:f392fc9709a3	1845	__STATIC_INLINE void LL_ADC_SetClock(ADC_TypeDef *ADCx, uint32_t ClockSource)
AnnaBridge	189:f392fc9709a3	1846	{
AnnaBridge	189:f392fc9709a3	1847	MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_CKMODE, ClockSource);
AnnaBridge	189:f392fc9709a3	1848	}
AnnaBridge	189:f392fc9709a3	1849
AnnaBridge	189:f392fc9709a3	1850	/**
AnnaBridge	189:f392fc9709a3	1851	* @brief Get ADC instance clock source and prescaler.
AnnaBridge	189:f392fc9709a3	1852	* @rmtoll CFGR2 CKMODE LL_ADC_GetClock
AnnaBridge	189:f392fc9709a3	1853	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	1854	* @retval Returned value can be one of the following values:
AnnaBridge	189:f392fc9709a3	1855	* @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV4
AnnaBridge	189:f392fc9709a3	1856	* @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV2
AnnaBridge	189:f392fc9709a3	1857	* @arg @ref LL_ADC_CLOCK_SYNC_PCLK_DIV1 (2)
AnnaBridge	189:f392fc9709a3	1858	* @arg @ref LL_ADC_CLOCK_ASYNC (1)
AnnaBridge	189:f392fc9709a3	1859	*
AnnaBridge	189:f392fc9709a3	1860	* (1) Asynchronous clock prescaler can be retrieved using
AnnaBridge	189:f392fc9709a3	1861	* function @ref LL_ADC_GetCommonClock().\n
AnnaBridge	189:f392fc9709a3	1862	* (2) Caution: This parameter has some clock ratio constraints:
AnnaBridge	189:f392fc9709a3	1863	* This configuration must be enabled only if PCLK has a 50%
AnnaBridge	189:f392fc9709a3	1864	* duty clock cycle (APB prescaler configured inside the RCC
AnnaBridge	189:f392fc9709a3	1865	* must be bypassed and the system clock must by 50% duty
AnnaBridge	189:f392fc9709a3	1866	* cycle).
AnnaBridge	189:f392fc9709a3	1867	* Refer to reference manual.
AnnaBridge	189:f392fc9709a3	1868	*/
AnnaBridge	189:f392fc9709a3	1869	__STATIC_INLINE uint32_t LL_ADC_GetClock(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	1870	{
AnnaBridge	189:f392fc9709a3	1871	return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_CKMODE));
AnnaBridge	189:f392fc9709a3	1872	}
AnnaBridge	189:f392fc9709a3	1873
AnnaBridge	189:f392fc9709a3	1874	/**
AnnaBridge	189:f392fc9709a3	1875	* @brief Set ADC calibration factor in the mode single-ended
AnnaBridge	189:f392fc9709a3	1876	* or differential (for devices with differential mode available).
AnnaBridge	189:f392fc9709a3	1877	* @note This function is intended to set calibration parameters
AnnaBridge	189:f392fc9709a3	1878	* without having to perform a new calibration using
AnnaBridge	189:f392fc9709a3	1879	* @ref LL_ADC_StartCalibration().
AnnaBridge	189:f392fc9709a3	1880	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	189:f392fc9709a3	1881	* ADC state:
AnnaBridge	189:f392fc9709a3	1882	* ADC must be enabled, without calibration on going, without conversion
AnnaBridge	189:f392fc9709a3	1883	* on going on group regular.
AnnaBridge	189:f392fc9709a3	1884	* @rmtoll CALFACT CALFACT LL_ADC_SetCalibrationFactor
AnnaBridge	189:f392fc9709a3	1885	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	1886	* @param CalibrationFactor Value between Min_Data=0x00 and Max_Data=0x7F
AnnaBridge	189:f392fc9709a3	1887	* @retval None
AnnaBridge	189:f392fc9709a3	1888	*/
AnnaBridge	189:f392fc9709a3	1889	__STATIC_INLINE void LL_ADC_SetCalibrationFactor(ADC_TypeDef *ADCx, uint32_t CalibrationFactor)
AnnaBridge	189:f392fc9709a3	1890	{
AnnaBridge	189:f392fc9709a3	1891	MODIFY_REG(ADCx->CALFACT,
AnnaBridge	189:f392fc9709a3	1892	ADC_CALFACT_CALFACT,
AnnaBridge	189:f392fc9709a3	1893	CalibrationFactor);
AnnaBridge	189:f392fc9709a3	1894	}
AnnaBridge	189:f392fc9709a3	1895
AnnaBridge	189:f392fc9709a3	1896	/**
AnnaBridge	189:f392fc9709a3	1897	* @brief Get ADC calibration factor in the mode single-ended
AnnaBridge	189:f392fc9709a3	1898	* or differential (for devices with differential mode available).
AnnaBridge	189:f392fc9709a3	1899	* @note Calibration factors are set by hardware after performing
AnnaBridge	189:f392fc9709a3	1900	* a calibration run using function @ref LL_ADC_StartCalibration().
AnnaBridge	189:f392fc9709a3	1901	* @rmtoll CALFACT CALFACT LL_ADC_GetCalibrationFactor
AnnaBridge	189:f392fc9709a3	1902	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	1903	* @retval Value between Min_Data=0x00 and Max_Data=0x7F
AnnaBridge	189:f392fc9709a3	1904	*/
AnnaBridge	189:f392fc9709a3	1905	__STATIC_INLINE uint32_t LL_ADC_GetCalibrationFactor(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	1906	{
AnnaBridge	189:f392fc9709a3	1907	return (uint32_t)(READ_BIT(ADCx->CALFACT, ADC_CALFACT_CALFACT));
AnnaBridge	189:f392fc9709a3	1908	}
AnnaBridge	189:f392fc9709a3	1909
AnnaBridge	189:f392fc9709a3	1910	/**
AnnaBridge	189:f392fc9709a3	1911	* @brief Set ADC resolution.
AnnaBridge	189:f392fc9709a3	1912	* Refer to reference manual for alignments formats
AnnaBridge	189:f392fc9709a3	1913	* dependencies to ADC resolutions.
AnnaBridge	189:f392fc9709a3	1914	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	189:f392fc9709a3	1915	* ADC state:
AnnaBridge	189:f392fc9709a3	1916	* ADC must be disabled or enabled without conversion on going
AnnaBridge	189:f392fc9709a3	1917	* on group regular.
AnnaBridge	189:f392fc9709a3	1918	* @rmtoll CFGR1 RES LL_ADC_SetResolution
AnnaBridge	189:f392fc9709a3	1919	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	1920	* @param Resolution This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	1921	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	189:f392fc9709a3	1922	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	189:f392fc9709a3	1923	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	189:f392fc9709a3	1924	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	189:f392fc9709a3	1925	* @retval None
AnnaBridge	189:f392fc9709a3	1926	*/
AnnaBridge	189:f392fc9709a3	1927	__STATIC_INLINE void LL_ADC_SetResolution(ADC_TypeDef *ADCx, uint32_t Resolution)
AnnaBridge	189:f392fc9709a3	1928	{
AnnaBridge	189:f392fc9709a3	1929	MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_RES, Resolution);
AnnaBridge	189:f392fc9709a3	1930	}
AnnaBridge	189:f392fc9709a3	1931
AnnaBridge	189:f392fc9709a3	1932	/**
AnnaBridge	189:f392fc9709a3	1933	* @brief Get ADC resolution.
AnnaBridge	189:f392fc9709a3	1934	* Refer to reference manual for alignments formats
AnnaBridge	189:f392fc9709a3	1935	* dependencies to ADC resolutions.
AnnaBridge	189:f392fc9709a3	1936	* @rmtoll CFGR1 RES LL_ADC_GetResolution
AnnaBridge	189:f392fc9709a3	1937	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	1938	* @retval Returned value can be one of the following values:
AnnaBridge	189:f392fc9709a3	1939	* @arg @ref LL_ADC_RESOLUTION_12B
AnnaBridge	189:f392fc9709a3	1940	* @arg @ref LL_ADC_RESOLUTION_10B
AnnaBridge	189:f392fc9709a3	1941	* @arg @ref LL_ADC_RESOLUTION_8B
AnnaBridge	189:f392fc9709a3	1942	* @arg @ref LL_ADC_RESOLUTION_6B
AnnaBridge	189:f392fc9709a3	1943	*/
AnnaBridge	189:f392fc9709a3	1944	__STATIC_INLINE uint32_t LL_ADC_GetResolution(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	1945	{
AnnaBridge	189:f392fc9709a3	1946	return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_RES));
AnnaBridge	189:f392fc9709a3	1947	}
AnnaBridge	189:f392fc9709a3	1948
AnnaBridge	189:f392fc9709a3	1949	/**
AnnaBridge	189:f392fc9709a3	1950	* @brief Set ADC conversion data alignment.
AnnaBridge	189:f392fc9709a3	1951	* @note Refer to reference manual for alignments formats
AnnaBridge	189:f392fc9709a3	1952	* dependencies to ADC resolutions.
AnnaBridge	189:f392fc9709a3	1953	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	189:f392fc9709a3	1954	* ADC state:
AnnaBridge	189:f392fc9709a3	1955	* ADC must be disabled or enabled without conversion on going
AnnaBridge	189:f392fc9709a3	1956	* on group regular.
AnnaBridge	189:f392fc9709a3	1957	* @rmtoll CFGR1 ALIGN LL_ADC_SetDataAlignment
AnnaBridge	189:f392fc9709a3	1958	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	1959	* @param DataAlignment This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	1960	* @arg @ref LL_ADC_DATA_ALIGN_RIGHT
AnnaBridge	189:f392fc9709a3	1961	* @arg @ref LL_ADC_DATA_ALIGN_LEFT
AnnaBridge	189:f392fc9709a3	1962	* @retval None
AnnaBridge	189:f392fc9709a3	1963	*/
AnnaBridge	189:f392fc9709a3	1964	__STATIC_INLINE void LL_ADC_SetDataAlignment(ADC_TypeDef *ADCx, uint32_t DataAlignment)
AnnaBridge	189:f392fc9709a3	1965	{
AnnaBridge	189:f392fc9709a3	1966	MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_ALIGN, DataAlignment);
AnnaBridge	189:f392fc9709a3	1967	}
AnnaBridge	189:f392fc9709a3	1968
AnnaBridge	189:f392fc9709a3	1969	/**
AnnaBridge	189:f392fc9709a3	1970	* @brief Get ADC conversion data alignment.
AnnaBridge	189:f392fc9709a3	1971	* @note Refer to reference manual for alignments formats
AnnaBridge	189:f392fc9709a3	1972	* dependencies to ADC resolutions.
AnnaBridge	189:f392fc9709a3	1973	* @rmtoll CFGR1 ALIGN LL_ADC_GetDataAlignment
AnnaBridge	189:f392fc9709a3	1974	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	1975	* @retval Returned value can be one of the following values:
AnnaBridge	189:f392fc9709a3	1976	* @arg @ref LL_ADC_DATA_ALIGN_RIGHT
AnnaBridge	189:f392fc9709a3	1977	* @arg @ref LL_ADC_DATA_ALIGN_LEFT
AnnaBridge	189:f392fc9709a3	1978	*/
AnnaBridge	189:f392fc9709a3	1979	__STATIC_INLINE uint32_t LL_ADC_GetDataAlignment(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	1980	{
AnnaBridge	189:f392fc9709a3	1981	return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_ALIGN));
AnnaBridge	189:f392fc9709a3	1982	}
AnnaBridge	189:f392fc9709a3	1983
AnnaBridge	189:f392fc9709a3	1984	/**
AnnaBridge	189:f392fc9709a3	1985	* @brief Set ADC low power mode.
AnnaBridge	189:f392fc9709a3	1986	* @note Description of ADC low power modes:
AnnaBridge	189:f392fc9709a3	1987	* - ADC low power mode "auto wait": Dynamic low power mode,
AnnaBridge	189:f392fc9709a3	1988	* ADC conversions occurrences are limited to the minimum necessary
AnnaBridge	189:f392fc9709a3	1989	* in order to reduce power consumption.
AnnaBridge	189:f392fc9709a3	1990	* New ADC conversion starts only when the previous
AnnaBridge	189:f392fc9709a3	1991	* unitary conversion data (for ADC group regular)
AnnaBridge	189:f392fc9709a3	1992	* has been retrieved by user software.
AnnaBridge	189:f392fc9709a3	1993	* In the meantime, ADC remains idle: does not performs any
AnnaBridge	189:f392fc9709a3	1994	* other conversion.
AnnaBridge	189:f392fc9709a3	1995	* This mode allows to automatically adapt the ADC conversions
AnnaBridge	189:f392fc9709a3	1996	* triggers to the speed of the software that reads the data.
AnnaBridge	189:f392fc9709a3	1997	* Moreover, this avoids risk of overrun for low frequency
AnnaBridge	189:f392fc9709a3	1998	* applications.
AnnaBridge	189:f392fc9709a3	1999	* How to use this low power mode:
AnnaBridge	189:f392fc9709a3	2000	* - Do not use with interruption or DMA since these modes
AnnaBridge	189:f392fc9709a3	2001	* have to clear immediately the EOC flag to free the
AnnaBridge	189:f392fc9709a3	2002	* IRQ vector sequencer.
AnnaBridge	189:f392fc9709a3	2003	* - Do use with polling: 1. Start conversion,
AnnaBridge	189:f392fc9709a3	2004	* 2. Later on, when conversion data is needed: poll for end of
AnnaBridge	189:f392fc9709a3	2005	* conversion to ensure that conversion is completed and
AnnaBridge	189:f392fc9709a3	2006	* retrieve ADC conversion data. This will trig another
AnnaBridge	189:f392fc9709a3	2007	* ADC conversion start.
AnnaBridge	189:f392fc9709a3	2008	* - ADC low power mode "auto power-off" (feature available on
AnnaBridge	189:f392fc9709a3	2009	* this device if parameter LL_ADC_LP_MODE_AUTOOFF is available):
AnnaBridge	189:f392fc9709a3	2010	* the ADC automatically powers-off after a conversion and
AnnaBridge	189:f392fc9709a3	2011	* automatically wakes up when a new conversion is triggered
AnnaBridge	189:f392fc9709a3	2012	* (with startup time between trigger and start of sampling).
AnnaBridge	189:f392fc9709a3	2013	* This feature can be combined with low power mode "auto wait".
AnnaBridge	189:f392fc9709a3	2014	* @note With ADC low power mode "auto wait", the ADC conversion data read
AnnaBridge	189:f392fc9709a3	2015	* is corresponding to previous ADC conversion start, independently
AnnaBridge	189:f392fc9709a3	2016	* of delay during which ADC was idle.
AnnaBridge	189:f392fc9709a3	2017	* Therefore, the ADC conversion data may be outdated: does not
AnnaBridge	189:f392fc9709a3	2018	* correspond to the current voltage level on the selected
AnnaBridge	189:f392fc9709a3	2019	* ADC channel.
AnnaBridge	189:f392fc9709a3	2020	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	189:f392fc9709a3	2021	* ADC state:
AnnaBridge	189:f392fc9709a3	2022	* ADC must be disabled or enabled without conversion on going
AnnaBridge	189:f392fc9709a3	2023	* on group regular.
AnnaBridge	189:f392fc9709a3	2024	* @rmtoll CFGR1 WAIT LL_ADC_SetLowPowerMode\n
AnnaBridge	189:f392fc9709a3	2025	* CFGR1 AUTOFF LL_ADC_SetLowPowerMode
AnnaBridge	189:f392fc9709a3	2026	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	2027	* @param LowPowerMode This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	2028	* @arg @ref LL_ADC_LP_MODE_NONE
AnnaBridge	189:f392fc9709a3	2029	* @arg @ref LL_ADC_LP_AUTOWAIT
AnnaBridge	189:f392fc9709a3	2030	* @arg @ref LL_ADC_LP_AUTOPOWEROFF
AnnaBridge	189:f392fc9709a3	2031	* @arg @ref LL_ADC_LP_AUTOWAIT_AUTOPOWEROFF
AnnaBridge	189:f392fc9709a3	2032	* @retval None
AnnaBridge	189:f392fc9709a3	2033	*/
AnnaBridge	189:f392fc9709a3	2034	__STATIC_INLINE void LL_ADC_SetLowPowerMode(ADC_TypeDef *ADCx, uint32_t LowPowerMode)
AnnaBridge	189:f392fc9709a3	2035	{
AnnaBridge	189:f392fc9709a3	2036	MODIFY_REG(ADCx->CFGR1, (ADC_CFGR1_WAIT \| ADC_CFGR1_AUTOFF), LowPowerMode);
AnnaBridge	189:f392fc9709a3	2037	}
AnnaBridge	189:f392fc9709a3	2038
AnnaBridge	189:f392fc9709a3	2039	/**
AnnaBridge	189:f392fc9709a3	2040	* @brief Get ADC low power mode:
AnnaBridge	189:f392fc9709a3	2041	* @note Description of ADC low power modes:
AnnaBridge	189:f392fc9709a3	2042	* - ADC low power mode "auto wait": Dynamic low power mode,
AnnaBridge	189:f392fc9709a3	2043	* ADC conversions occurrences are limited to the minimum necessary
AnnaBridge	189:f392fc9709a3	2044	* in order to reduce power consumption.
AnnaBridge	189:f392fc9709a3	2045	* New ADC conversion starts only when the previous
AnnaBridge	189:f392fc9709a3	2046	* unitary conversion data (for ADC group regular)
AnnaBridge	189:f392fc9709a3	2047	* has been retrieved by user software.
AnnaBridge	189:f392fc9709a3	2048	* In the meantime, ADC remains idle: does not performs any
AnnaBridge	189:f392fc9709a3	2049	* other conversion.
AnnaBridge	189:f392fc9709a3	2050	* This mode allows to automatically adapt the ADC conversions
AnnaBridge	189:f392fc9709a3	2051	* triggers to the speed of the software that reads the data.
AnnaBridge	189:f392fc9709a3	2052	* Moreover, this avoids risk of overrun for low frequency
AnnaBridge	189:f392fc9709a3	2053	* applications.
AnnaBridge	189:f392fc9709a3	2054	* How to use this low power mode:
AnnaBridge	189:f392fc9709a3	2055	* - Do not use with interruption or DMA since these modes
AnnaBridge	189:f392fc9709a3	2056	* have to clear immediately the EOC flag to free the
AnnaBridge	189:f392fc9709a3	2057	* IRQ vector sequencer.
AnnaBridge	189:f392fc9709a3	2058	* - Do use with polling: 1. Start conversion,
AnnaBridge	189:f392fc9709a3	2059	* 2. Later on, when conversion data is needed: poll for end of
AnnaBridge	189:f392fc9709a3	2060	* conversion to ensure that conversion is completed and
AnnaBridge	189:f392fc9709a3	2061	* retrieve ADC conversion data. This will trig another
AnnaBridge	189:f392fc9709a3	2062	* ADC conversion start.
AnnaBridge	189:f392fc9709a3	2063	* - ADC low power mode "auto power-off" (feature available on
AnnaBridge	189:f392fc9709a3	2064	* this device if parameter LL_ADC_LP_MODE_AUTOOFF is available):
AnnaBridge	189:f392fc9709a3	2065	* the ADC automatically powers-off after a conversion and
AnnaBridge	189:f392fc9709a3	2066	* automatically wakes up when a new conversion is triggered
AnnaBridge	189:f392fc9709a3	2067	* (with startup time between trigger and start of sampling).
AnnaBridge	189:f392fc9709a3	2068	* This feature can be combined with low power mode "auto wait".
AnnaBridge	189:f392fc9709a3	2069	* @note With ADC low power mode "auto wait", the ADC conversion data read
AnnaBridge	189:f392fc9709a3	2070	* is corresponding to previous ADC conversion start, independently
AnnaBridge	189:f392fc9709a3	2071	* of delay during which ADC was idle.
AnnaBridge	189:f392fc9709a3	2072	* Therefore, the ADC conversion data may be outdated: does not
AnnaBridge	189:f392fc9709a3	2073	* correspond to the current voltage level on the selected
AnnaBridge	189:f392fc9709a3	2074	* ADC channel.
AnnaBridge	189:f392fc9709a3	2075	* @rmtoll CFGR1 WAIT LL_ADC_GetLowPowerMode\n
AnnaBridge	189:f392fc9709a3	2076	* CFGR1 AUTOFF LL_ADC_GetLowPowerMode
AnnaBridge	189:f392fc9709a3	2077	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	2078	* @retval Returned value can be one of the following values:
AnnaBridge	189:f392fc9709a3	2079	* @arg @ref LL_ADC_LP_MODE_NONE
AnnaBridge	189:f392fc9709a3	2080	* @arg @ref LL_ADC_LP_AUTOWAIT
AnnaBridge	189:f392fc9709a3	2081	* @arg @ref LL_ADC_LP_AUTOPOWEROFF
AnnaBridge	189:f392fc9709a3	2082	* @arg @ref LL_ADC_LP_AUTOWAIT_AUTOPOWEROFF
AnnaBridge	189:f392fc9709a3	2083	*/
AnnaBridge	189:f392fc9709a3	2084	__STATIC_INLINE uint32_t LL_ADC_GetLowPowerMode(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	2085	{
AnnaBridge	189:f392fc9709a3	2086	return (uint32_t)(READ_BIT(ADCx->CFGR1, (ADC_CFGR1_WAIT \| ADC_CFGR1_AUTOFF)));
AnnaBridge	189:f392fc9709a3	2087	}
AnnaBridge	189:f392fc9709a3	2088
AnnaBridge	189:f392fc9709a3	2089	/**
AnnaBridge	189:f392fc9709a3	2090	* @brief Set sampling time common to a group of channels.
AnnaBridge	189:f392fc9709a3	2091	* @note Unit: ADC clock cycles.
AnnaBridge	189:f392fc9709a3	2092	* @note On this STM32 serie, sampling time scope is on ADC instance:
AnnaBridge	189:f392fc9709a3	2093	* Sampling time common to all channels.
AnnaBridge	189:f392fc9709a3	2094	* (on some other STM32 families, sampling time is channel wise)
AnnaBridge	189:f392fc9709a3	2095	* @note In case of internal channel (VrefInt, TempSensor, ...) to be
AnnaBridge	189:f392fc9709a3	2096	* converted:
AnnaBridge	189:f392fc9709a3	2097	* sampling time constraints must be respected (sampling time can be
AnnaBridge	189:f392fc9709a3	2098	* adjusted in function of ADC clock frequency and sampling time
AnnaBridge	189:f392fc9709a3	2099	* setting).
AnnaBridge	189:f392fc9709a3	2100	* Refer to device datasheet for timings values (parameters TS_vrefint,
AnnaBridge	189:f392fc9709a3	2101	* TS_temp, ...).
AnnaBridge	189:f392fc9709a3	2102	* @note Conversion time is the addition of sampling time and processing time.
AnnaBridge	189:f392fc9709a3	2103	* On this STM32 serie, ADC processing time is:
AnnaBridge	189:f392fc9709a3	2104	* - 12.5 ADC clock cycles at ADC resolution 12 bits
AnnaBridge	189:f392fc9709a3	2105	* - 10.5 ADC clock cycles at ADC resolution 10 bits
AnnaBridge	189:f392fc9709a3	2106	* - 8.5 ADC clock cycles at ADC resolution 8 bits
AnnaBridge	189:f392fc9709a3	2107	* - 6.5 ADC clock cycles at ADC resolution 6 bits
AnnaBridge	189:f392fc9709a3	2108	* @note In case of ADC conversion of internal channel (VrefInt,
AnnaBridge	189:f392fc9709a3	2109	* temperature sensor, ...), a sampling time minimum value
AnnaBridge	189:f392fc9709a3	2110	* is required.
AnnaBridge	189:f392fc9709a3	2111	* Refer to device datasheet.
AnnaBridge	189:f392fc9709a3	2112	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	189:f392fc9709a3	2113	* ADC state:
AnnaBridge	189:f392fc9709a3	2114	* ADC must be disabled or enabled without conversion on going
AnnaBridge	189:f392fc9709a3	2115	* on group regular.
AnnaBridge	189:f392fc9709a3	2116	* @rmtoll SMPR SMP LL_ADC_SetSamplingTimeCommonChannels
AnnaBridge	189:f392fc9709a3	2117	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	2118	* @param SamplingTime This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	2119	* @arg @ref LL_ADC_SAMPLINGTIME_1CYCLE_5
AnnaBridge	189:f392fc9709a3	2120	* @arg @ref LL_ADC_SAMPLINGTIME_3CYCLES_5
AnnaBridge	189:f392fc9709a3	2121	* @arg @ref LL_ADC_SAMPLINGTIME_7CYCLES_5
AnnaBridge	189:f392fc9709a3	2122	* @arg @ref LL_ADC_SAMPLINGTIME_12CYCLES_5
AnnaBridge	189:f392fc9709a3	2123	* @arg @ref LL_ADC_SAMPLINGTIME_19CYCLES_5
AnnaBridge	189:f392fc9709a3	2124	* @arg @ref LL_ADC_SAMPLINGTIME_39CYCLES_5
AnnaBridge	189:f392fc9709a3	2125	* @arg @ref LL_ADC_SAMPLINGTIME_79CYCLES_5
AnnaBridge	189:f392fc9709a3	2126	* @arg @ref LL_ADC_SAMPLINGTIME_160CYCLES_5
AnnaBridge	189:f392fc9709a3	2127	* @retval None
AnnaBridge	189:f392fc9709a3	2128	*/
AnnaBridge	189:f392fc9709a3	2129	__STATIC_INLINE void LL_ADC_SetSamplingTimeCommonChannels(ADC_TypeDef *ADCx, uint32_t SamplingTime)
AnnaBridge	189:f392fc9709a3	2130	{
AnnaBridge	189:f392fc9709a3	2131	MODIFY_REG(ADCx->SMPR, ADC_SMPR_SMP, SamplingTime);
AnnaBridge	189:f392fc9709a3	2132	}
AnnaBridge	189:f392fc9709a3	2133
AnnaBridge	189:f392fc9709a3	2134	/**
AnnaBridge	189:f392fc9709a3	2135	* @brief Get sampling time common to a group of channels.
AnnaBridge	189:f392fc9709a3	2136	* @note Unit: ADC clock cycles.
AnnaBridge	189:f392fc9709a3	2137	* @note On this STM32 serie, sampling time scope is on ADC instance:
AnnaBridge	189:f392fc9709a3	2138	* Sampling time common to all channels.
AnnaBridge	189:f392fc9709a3	2139	* (on some other STM32 families, sampling time is channel wise)
AnnaBridge	189:f392fc9709a3	2140	* @note Conversion time is the addition of sampling time and processing time.
AnnaBridge	189:f392fc9709a3	2141	* Refer to reference manual for ADC processing time of
AnnaBridge	189:f392fc9709a3	2142	* this STM32 serie.
AnnaBridge	189:f392fc9709a3	2143	* @rmtoll SMPR SMP LL_ADC_GetSamplingTimeCommonChannels
AnnaBridge	189:f392fc9709a3	2144	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	2145	* @retval Returned value can be one of the following values:
AnnaBridge	189:f392fc9709a3	2146	* @arg @ref LL_ADC_SAMPLINGTIME_1CYCLE_5
AnnaBridge	189:f392fc9709a3	2147	* @arg @ref LL_ADC_SAMPLINGTIME_3CYCLES_5
AnnaBridge	189:f392fc9709a3	2148	* @arg @ref LL_ADC_SAMPLINGTIME_7CYCLES_5
AnnaBridge	189:f392fc9709a3	2149	* @arg @ref LL_ADC_SAMPLINGTIME_12CYCLES_5
AnnaBridge	189:f392fc9709a3	2150	* @arg @ref LL_ADC_SAMPLINGTIME_19CYCLES_5
AnnaBridge	189:f392fc9709a3	2151	* @arg @ref LL_ADC_SAMPLINGTIME_39CYCLES_5
AnnaBridge	189:f392fc9709a3	2152	* @arg @ref LL_ADC_SAMPLINGTIME_79CYCLES_5
AnnaBridge	189:f392fc9709a3	2153	* @arg @ref LL_ADC_SAMPLINGTIME_160CYCLES_5
AnnaBridge	189:f392fc9709a3	2154	*/
AnnaBridge	189:f392fc9709a3	2155	__STATIC_INLINE uint32_t LL_ADC_GetSamplingTimeCommonChannels(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	2156	{
AnnaBridge	189:f392fc9709a3	2157	return (uint32_t)(READ_BIT(ADCx->SMPR, ADC_SMPR_SMP));
AnnaBridge	189:f392fc9709a3	2158	}
AnnaBridge	189:f392fc9709a3	2159
AnnaBridge	189:f392fc9709a3	2160	/**
AnnaBridge	189:f392fc9709a3	2161	* @}
AnnaBridge	189:f392fc9709a3	2162	*/
AnnaBridge	189:f392fc9709a3	2163
AnnaBridge	189:f392fc9709a3	2164	/** @defgroup ADC_LL_EF_Configuration_ADC_Group_Regular Configuration of ADC hierarchical scope: group regular
AnnaBridge	189:f392fc9709a3	2165	* @{
AnnaBridge	189:f392fc9709a3	2166	*/
AnnaBridge	189:f392fc9709a3	2167
AnnaBridge	189:f392fc9709a3	2168	/**
AnnaBridge	189:f392fc9709a3	2169	* @brief Set ADC group regular conversion trigger source:
AnnaBridge	189:f392fc9709a3	2170	* internal (SW start) or from external IP (timer event,
AnnaBridge	189:f392fc9709a3	2171	* external interrupt line).
AnnaBridge	189:f392fc9709a3	2172	* @note On this STM32 serie, setting trigger source to external trigger
AnnaBridge	189:f392fc9709a3	2173	* also set trigger polarity to rising edge
AnnaBridge	189:f392fc9709a3	2174	* (default setting for compatibility with some ADC on other
AnnaBridge	189:f392fc9709a3	2175	* STM32 families having this setting set by HW default value).
AnnaBridge	189:f392fc9709a3	2176	* In case of need to modify trigger edge, use
AnnaBridge	189:f392fc9709a3	2177	* function @ref LL_ADC_REG_SetTriggerEdge().
AnnaBridge	189:f392fc9709a3	2178	* @note Availability of parameters of trigger sources from timer
AnnaBridge	189:f392fc9709a3	2179	* depends on timers availability on the selected device.
AnnaBridge	189:f392fc9709a3	2180	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	189:f392fc9709a3	2181	* ADC state:
AnnaBridge	189:f392fc9709a3	2182	* ADC must be disabled or enabled without conversion on going
AnnaBridge	189:f392fc9709a3	2183	* on group regular.
AnnaBridge	189:f392fc9709a3	2184	* @rmtoll CFGR1 EXTSEL LL_ADC_REG_SetTriggerSource\n
AnnaBridge	189:f392fc9709a3	2185	* CFGR1 EXTEN LL_ADC_REG_SetTriggerSource
AnnaBridge	189:f392fc9709a3	2186	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	2187	* @param TriggerSource This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	2188	* @arg @ref LL_ADC_REG_TRIG_SOFTWARE
AnnaBridge	189:f392fc9709a3	2189	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM6_TRGO
AnnaBridge	189:f392fc9709a3	2190	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM21_CH2
AnnaBridge	189:f392fc9709a3	2191	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_TRGO
AnnaBridge	189:f392fc9709a3	2192	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH4
AnnaBridge	189:f392fc9709a3	2193	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM22_TRGO
AnnaBridge	189:f392fc9709a3	2194	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH3 (*)
AnnaBridge	189:f392fc9709a3	2195	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_TRGO
AnnaBridge	189:f392fc9709a3	2196	* @arg @ref LL_ADC_REG_TRIG_EXT_EXTI_LINE11
AnnaBridge	189:f392fc9709a3	2197	*
AnnaBridge	189:f392fc9709a3	2198	* (*) value not defined in all devices
AnnaBridge	189:f392fc9709a3	2199	* @retval None
AnnaBridge	189:f392fc9709a3	2200	*/
AnnaBridge	189:f392fc9709a3	2201	__STATIC_INLINE void LL_ADC_REG_SetTriggerSource(ADC_TypeDef *ADCx, uint32_t TriggerSource)
AnnaBridge	189:f392fc9709a3	2202	{
AnnaBridge	189:f392fc9709a3	2203	MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN \| ADC_CFGR1_EXTSEL, TriggerSource);
AnnaBridge	189:f392fc9709a3	2204	}
AnnaBridge	189:f392fc9709a3	2205
AnnaBridge	189:f392fc9709a3	2206	/**
AnnaBridge	189:f392fc9709a3	2207	* @brief Get ADC group regular conversion trigger source:
AnnaBridge	189:f392fc9709a3	2208	* internal (SW start) or from external IP (timer event,
AnnaBridge	189:f392fc9709a3	2209	* external interrupt line).
AnnaBridge	189:f392fc9709a3	2210	* @note To determine whether group regular trigger source is
AnnaBridge	189:f392fc9709a3	2211	* internal (SW start) or external, without detail
AnnaBridge	189:f392fc9709a3	2212	* of which peripheral is selected as external trigger,
AnnaBridge	189:f392fc9709a3	2213	* (equivalent to
AnnaBridge	189:f392fc9709a3	2214	* "if(LL_ADC_REG_GetTriggerSource(ADC1) == LL_ADC_REG_TRIG_SOFTWARE)")
AnnaBridge	189:f392fc9709a3	2215	* use function @ref LL_ADC_REG_IsTriggerSourceSWStart.
AnnaBridge	189:f392fc9709a3	2216	* @note Availability of parameters of trigger sources from timer
AnnaBridge	189:f392fc9709a3	2217	* depends on timers availability on the selected device.
AnnaBridge	189:f392fc9709a3	2218	* @rmtoll CFGR1 EXTSEL LL_ADC_REG_GetTriggerSource\n
AnnaBridge	189:f392fc9709a3	2219	* CFGR1 EXTEN LL_ADC_REG_GetTriggerSource
AnnaBridge	189:f392fc9709a3	2220	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	2221	* @retval Returned value can be one of the following values:
AnnaBridge	189:f392fc9709a3	2222	* @arg @ref LL_ADC_REG_TRIG_SOFTWARE
AnnaBridge	189:f392fc9709a3	2223	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM6_TRGO
AnnaBridge	189:f392fc9709a3	2224	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM21_CH2
AnnaBridge	189:f392fc9709a3	2225	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_TRGO
AnnaBridge	189:f392fc9709a3	2226	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH4
AnnaBridge	189:f392fc9709a3	2227	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM22_TRGO
AnnaBridge	189:f392fc9709a3	2228	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM2_CH3 (*)
AnnaBridge	189:f392fc9709a3	2229	* @arg @ref LL_ADC_REG_TRIG_EXT_TIM3_TRGO
AnnaBridge	189:f392fc9709a3	2230	* @arg @ref LL_ADC_REG_TRIG_EXT_EXTI_LINE11
AnnaBridge	189:f392fc9709a3	2231	*
AnnaBridge	189:f392fc9709a3	2232	* (*) value not defined in all devices
AnnaBridge	189:f392fc9709a3	2233	*/
AnnaBridge	189:f392fc9709a3	2234	__STATIC_INLINE uint32_t LL_ADC_REG_GetTriggerSource(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	2235	{
AnnaBridge	189:f392fc9709a3	2236	register uint32_t TriggerSource = READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTSEL \| ADC_CFGR1_EXTEN);
AnnaBridge	189:f392fc9709a3	2237
AnnaBridge	189:f392fc9709a3	2238	/* Value for shift of {0; 4; 8; 12} depending on value of bitfield */
AnnaBridge	189:f392fc9709a3	2239	/* corresponding to ADC_CFGR1_EXTEN {0; 1; 2; 3}. */
AnnaBridge	189:f392fc9709a3	2240	register uint32_t ShiftExten = ((TriggerSource & ADC_CFGR1_EXTEN) >> (ADC_REG_TRIG_EXTEN_BITOFFSET_POS - 2U));
AnnaBridge	189:f392fc9709a3	2241
AnnaBridge	189:f392fc9709a3	2242	/* Set bitfield corresponding to ADC_CFGR1_EXTEN and ADC_CFGR1_EXTSEL */
AnnaBridge	189:f392fc9709a3	2243	/* to match with triggers literals definition. */
AnnaBridge	189:f392fc9709a3	2244	return ((TriggerSource
AnnaBridge	189:f392fc9709a3	2245	& (ADC_REG_TRIG_SOURCE_MASK >> ShiftExten) & ADC_CFGR1_EXTSEL)
AnnaBridge	189:f392fc9709a3	2246	\| ((ADC_REG_TRIG_EDGE_MASK >> ShiftExten) & ADC_CFGR1_EXTEN)
AnnaBridge	189:f392fc9709a3	2247	);
AnnaBridge	189:f392fc9709a3	2248	}
AnnaBridge	189:f392fc9709a3	2249
AnnaBridge	189:f392fc9709a3	2250	/**
AnnaBridge	189:f392fc9709a3	2251	* @brief Get ADC group regular conversion trigger source internal (SW start)
AnnaBridge	189:f392fc9709a3	2252	or external.
AnnaBridge	189:f392fc9709a3	2253	* @note In case of group regular trigger source set to external trigger,
AnnaBridge	189:f392fc9709a3	2254	* to determine which peripheral is selected as external trigger,
AnnaBridge	189:f392fc9709a3	2255	* use function @ref LL_ADC_REG_GetTriggerSource().
AnnaBridge	189:f392fc9709a3	2256	* @rmtoll CFGR1 EXTEN LL_ADC_REG_IsTriggerSourceSWStart
AnnaBridge	189:f392fc9709a3	2257	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	2258	* @retval Value "0" if trigger source external trigger
AnnaBridge	189:f392fc9709a3	2259	* Value "1" if trigger source SW start.
AnnaBridge	189:f392fc9709a3	2260	*/
AnnaBridge	189:f392fc9709a3	2261	__STATIC_INLINE uint32_t LL_ADC_REG_IsTriggerSourceSWStart(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	2262	{
AnnaBridge	189:f392fc9709a3	2263	return (READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN) == (LL_ADC_REG_TRIG_SOFTWARE & ADC_CFGR1_EXTEN));
AnnaBridge	189:f392fc9709a3	2264	}
AnnaBridge	189:f392fc9709a3	2265
AnnaBridge	189:f392fc9709a3	2266	/**
AnnaBridge	189:f392fc9709a3	2267	* @brief Set ADC group regular conversion trigger polarity.
AnnaBridge	189:f392fc9709a3	2268	* @note Applicable only for trigger source set to external trigger.
AnnaBridge	189:f392fc9709a3	2269	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	189:f392fc9709a3	2270	* ADC state:
AnnaBridge	189:f392fc9709a3	2271	* ADC must be disabled or enabled without conversion on going
AnnaBridge	189:f392fc9709a3	2272	* on group regular.
AnnaBridge	189:f392fc9709a3	2273	* @rmtoll CFGR1 EXTEN LL_ADC_REG_SetTriggerEdge
AnnaBridge	189:f392fc9709a3	2274	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	2275	* @param ExternalTriggerEdge This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	2276	* @arg @ref LL_ADC_REG_TRIG_EXT_RISING
AnnaBridge	189:f392fc9709a3	2277	* @arg @ref LL_ADC_REG_TRIG_EXT_FALLING
AnnaBridge	189:f392fc9709a3	2278	* @arg @ref LL_ADC_REG_TRIG_EXT_RISINGFALLING
AnnaBridge	189:f392fc9709a3	2279	* @retval None
AnnaBridge	189:f392fc9709a3	2280	*/
AnnaBridge	189:f392fc9709a3	2281	__STATIC_INLINE void LL_ADC_REG_SetTriggerEdge(ADC_TypeDef *ADCx, uint32_t ExternalTriggerEdge)
AnnaBridge	189:f392fc9709a3	2282	{
AnnaBridge	189:f392fc9709a3	2283	MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_EXTEN, ExternalTriggerEdge);
AnnaBridge	189:f392fc9709a3	2284	}
AnnaBridge	189:f392fc9709a3	2285
AnnaBridge	189:f392fc9709a3	2286	/**
AnnaBridge	189:f392fc9709a3	2287	* @brief Get ADC group regular conversion trigger polarity.
AnnaBridge	189:f392fc9709a3	2288	* @note Applicable only for trigger source set to external trigger.
AnnaBridge	189:f392fc9709a3	2289	* @rmtoll CFGR1 EXTEN LL_ADC_REG_GetTriggerEdge
AnnaBridge	189:f392fc9709a3	2290	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	2291	* @retval Returned value can be one of the following values:
AnnaBridge	189:f392fc9709a3	2292	* @arg @ref LL_ADC_REG_TRIG_EXT_RISING
AnnaBridge	189:f392fc9709a3	2293	* @arg @ref LL_ADC_REG_TRIG_EXT_FALLING
AnnaBridge	189:f392fc9709a3	2294	* @arg @ref LL_ADC_REG_TRIG_EXT_RISINGFALLING
AnnaBridge	189:f392fc9709a3	2295	*/
AnnaBridge	189:f392fc9709a3	2296	__STATIC_INLINE uint32_t LL_ADC_REG_GetTriggerEdge(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	2297	{
AnnaBridge	189:f392fc9709a3	2298	return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_EXTEN));
AnnaBridge	189:f392fc9709a3	2299	}
AnnaBridge	189:f392fc9709a3	2300
AnnaBridge	189:f392fc9709a3	2301
AnnaBridge	189:f392fc9709a3	2302	/**
AnnaBridge	189:f392fc9709a3	2303	* @brief Set ADC group regular sequencer scan direction.
AnnaBridge	189:f392fc9709a3	2304	* @note On some other STM32 families, this setting is not available and
AnnaBridge	189:f392fc9709a3	2305	* the default scan direction is forward.
AnnaBridge	189:f392fc9709a3	2306	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	189:f392fc9709a3	2307	* ADC state:
AnnaBridge	189:f392fc9709a3	2308	* ADC must be disabled or enabled without conversion on going
AnnaBridge	189:f392fc9709a3	2309	* on group regular.
AnnaBridge	189:f392fc9709a3	2310	* @rmtoll CFGR1 SCANDIR LL_ADC_REG_SetSequencerScanDirection
AnnaBridge	189:f392fc9709a3	2311	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	2312	* @param ScanDirection This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	2313	* @arg @ref LL_ADC_REG_SEQ_SCAN_DIR_FORWARD
AnnaBridge	189:f392fc9709a3	2314	* @arg @ref LL_ADC_REG_SEQ_SCAN_DIR_BACKWARD
AnnaBridge	189:f392fc9709a3	2315	* @retval None
AnnaBridge	189:f392fc9709a3	2316	*/
AnnaBridge	189:f392fc9709a3	2317	__STATIC_INLINE void LL_ADC_REG_SetSequencerScanDirection(ADC_TypeDef *ADCx, uint32_t ScanDirection)
AnnaBridge	189:f392fc9709a3	2318	{
AnnaBridge	189:f392fc9709a3	2319	MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_SCANDIR, ScanDirection);
AnnaBridge	189:f392fc9709a3	2320	}
AnnaBridge	189:f392fc9709a3	2321
AnnaBridge	189:f392fc9709a3	2322	/**
AnnaBridge	189:f392fc9709a3	2323	* @brief Get ADC group regular sequencer scan direction.
AnnaBridge	189:f392fc9709a3	2324	* @note On some other STM32 families, this setting is not available and
AnnaBridge	189:f392fc9709a3	2325	* the default scan direction is forward.
AnnaBridge	189:f392fc9709a3	2326	* @rmtoll CFGR1 SCANDIR LL_ADC_REG_GetSequencerScanDirection
AnnaBridge	189:f392fc9709a3	2327	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	2328	* @retval Returned value can be one of the following values:
AnnaBridge	189:f392fc9709a3	2329	* @arg @ref LL_ADC_REG_SEQ_SCAN_DIR_FORWARD
AnnaBridge	189:f392fc9709a3	2330	* @arg @ref LL_ADC_REG_SEQ_SCAN_DIR_BACKWARD
AnnaBridge	189:f392fc9709a3	2331	*/
AnnaBridge	189:f392fc9709a3	2332	__STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerScanDirection(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	2333	{
AnnaBridge	189:f392fc9709a3	2334	return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_SCANDIR));
AnnaBridge	189:f392fc9709a3	2335	}
AnnaBridge	189:f392fc9709a3	2336
AnnaBridge	189:f392fc9709a3	2337	/**
AnnaBridge	189:f392fc9709a3	2338	* @brief Set ADC group regular sequencer discontinuous mode:
AnnaBridge	189:f392fc9709a3	2339	* sequence subdivided and scan conversions interrupted every selected
AnnaBridge	189:f392fc9709a3	2340	* number of ranks.
AnnaBridge	189:f392fc9709a3	2341	* @note It is not possible to enable both ADC group regular
AnnaBridge	189:f392fc9709a3	2342	* continuous mode and sequencer discontinuous mode.
AnnaBridge	189:f392fc9709a3	2343	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	189:f392fc9709a3	2344	* ADC state:
AnnaBridge	189:f392fc9709a3	2345	* ADC must be disabled or enabled without conversion on going
AnnaBridge	189:f392fc9709a3	2346	* on group regular.
AnnaBridge	189:f392fc9709a3	2347	* @rmtoll CFGR1 DISCEN LL_ADC_REG_SetSequencerDiscont\n
AnnaBridge	189:f392fc9709a3	2348	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	2349	* @param SeqDiscont This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	2350	* @arg @ref LL_ADC_REG_SEQ_DISCONT_DISABLE
AnnaBridge	189:f392fc9709a3	2351	* @arg @ref LL_ADC_REG_SEQ_DISCONT_1RANK
AnnaBridge	189:f392fc9709a3	2352	* @retval None
AnnaBridge	189:f392fc9709a3	2353	*/
AnnaBridge	189:f392fc9709a3	2354	__STATIC_INLINE void LL_ADC_REG_SetSequencerDiscont(ADC_TypeDef *ADCx, uint32_t SeqDiscont)
AnnaBridge	189:f392fc9709a3	2355	{
AnnaBridge	189:f392fc9709a3	2356	MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_DISCEN, SeqDiscont);
AnnaBridge	189:f392fc9709a3	2357	}
AnnaBridge	189:f392fc9709a3	2358
AnnaBridge	189:f392fc9709a3	2359	/**
AnnaBridge	189:f392fc9709a3	2360	* @brief Get ADC group regular sequencer discontinuous mode:
AnnaBridge	189:f392fc9709a3	2361	* sequence subdivided and scan conversions interrupted every selected
AnnaBridge	189:f392fc9709a3	2362	* number of ranks.
AnnaBridge	189:f392fc9709a3	2363	* @rmtoll CFGR1 DISCEN LL_ADC_REG_GetSequencerDiscont\n
AnnaBridge	189:f392fc9709a3	2364	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	2365	* @retval Returned value can be one of the following values:
AnnaBridge	189:f392fc9709a3	2366	* @arg @ref LL_ADC_REG_SEQ_DISCONT_DISABLE
AnnaBridge	189:f392fc9709a3	2367	* @arg @ref LL_ADC_REG_SEQ_DISCONT_1RANK
AnnaBridge	189:f392fc9709a3	2368	*/
AnnaBridge	189:f392fc9709a3	2369	__STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerDiscont(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	2370	{
AnnaBridge	189:f392fc9709a3	2371	return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_DISCEN));
AnnaBridge	189:f392fc9709a3	2372	}
AnnaBridge	189:f392fc9709a3	2373
AnnaBridge	189:f392fc9709a3	2374	/**
AnnaBridge	189:f392fc9709a3	2375	* @brief Set ADC group regular sequence: channel on rank corresponding to
AnnaBridge	189:f392fc9709a3	2376	* channel number.
AnnaBridge	189:f392fc9709a3	2377	* @note This function performs:
AnnaBridge	189:f392fc9709a3	2378	* - Channels ordering into each rank of scan sequence:
AnnaBridge	189:f392fc9709a3	2379	* rank of each channel is fixed by channel HW number
AnnaBridge	189:f392fc9709a3	2380	* (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
AnnaBridge	189:f392fc9709a3	2381	* - Set channels selected by overwriting the current sequencer
AnnaBridge	189:f392fc9709a3	2382	* configuration.
AnnaBridge	189:f392fc9709a3	2383	* @note On this STM32 serie, ADC group regular sequencer is
AnnaBridge	189:f392fc9709a3	2384	* not fully configurable: sequencer length and each rank
AnnaBridge	189:f392fc9709a3	2385	* affectation to a channel are fixed by channel HW number.
AnnaBridge	189:f392fc9709a3	2386	* @note Depending on devices and packages, some channels may not be available.
AnnaBridge	189:f392fc9709a3	2387	* Refer to device datasheet for channels availability.
AnnaBridge	189:f392fc9709a3	2388	* @note On this STM32 serie, to measure internal channels (VrefInt,
AnnaBridge	189:f392fc9709a3	2389	* TempSensor, ...), measurement paths to internal channels must be
AnnaBridge	189:f392fc9709a3	2390	* enabled separately.
AnnaBridge	189:f392fc9709a3	2391	* This can be done using function @ref LL_ADC_SetCommonPathInternalCh().
AnnaBridge	189:f392fc9709a3	2392	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	189:f392fc9709a3	2393	* ADC state:
AnnaBridge	189:f392fc9709a3	2394	* ADC must be disabled or enabled without conversion on going
AnnaBridge	189:f392fc9709a3	2395	* on group regular.
AnnaBridge	189:f392fc9709a3	2396	* @note One or several values can be selected.
AnnaBridge	189:f392fc9709a3	2397	* Example: (LL_ADC_CHANNEL_4 \| LL_ADC_CHANNEL_12 \| ...)
AnnaBridge	189:f392fc9709a3	2398	* @rmtoll CHSELR CHSEL0 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	189:f392fc9709a3	2399	* CHSELR CHSEL1 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	189:f392fc9709a3	2400	* CHSELR CHSEL2 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	189:f392fc9709a3	2401	* CHSELR CHSEL3 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	189:f392fc9709a3	2402	* CHSELR CHSEL4 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	189:f392fc9709a3	2403	* CHSELR CHSEL5 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	189:f392fc9709a3	2404	* CHSELR CHSEL6 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	189:f392fc9709a3	2405	* CHSELR CHSEL7 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	189:f392fc9709a3	2406	* CHSELR CHSEL8 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	189:f392fc9709a3	2407	* CHSELR CHSEL9 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	189:f392fc9709a3	2408	* CHSELR CHSEL10 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	189:f392fc9709a3	2409	* CHSELR CHSEL11 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	189:f392fc9709a3	2410	* CHSELR CHSEL12 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	189:f392fc9709a3	2411	* CHSELR CHSEL13 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	189:f392fc9709a3	2412	* CHSELR CHSEL14 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	189:f392fc9709a3	2413	* CHSELR CHSEL15 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	189:f392fc9709a3	2414	* CHSELR CHSEL16 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	189:f392fc9709a3	2415	* CHSELR CHSEL17 LL_ADC_REG_SetSequencerChannels\n
AnnaBridge	189:f392fc9709a3	2416	* CHSELR CHSEL18 LL_ADC_REG_SetSequencerChannels
AnnaBridge	189:f392fc9709a3	2417	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	2418	* @param Channel This parameter can be a combination of the following values:
AnnaBridge	189:f392fc9709a3	2419	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	189:f392fc9709a3	2420	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	189:f392fc9709a3	2421	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	189:f392fc9709a3	2422	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	189:f392fc9709a3	2423	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	189:f392fc9709a3	2424	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	189:f392fc9709a3	2425	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	189:f392fc9709a3	2426	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	189:f392fc9709a3	2427	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	189:f392fc9709a3	2428	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	189:f392fc9709a3	2429	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	189:f392fc9709a3	2430	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	189:f392fc9709a3	2431	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	189:f392fc9709a3	2432	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	189:f392fc9709a3	2433	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	189:f392fc9709a3	2434	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	189:f392fc9709a3	2435	* @arg @ref LL_ADC_CHANNEL_16 (1)
AnnaBridge	189:f392fc9709a3	2436	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	189:f392fc9709a3	2437	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	189:f392fc9709a3	2438	* @arg @ref LL_ADC_CHANNEL_VREFINT
AnnaBridge	189:f392fc9709a3	2439	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
AnnaBridge	189:f392fc9709a3	2440	* @arg @ref LL_ADC_CHANNEL_VLCD (1)
AnnaBridge	189:f392fc9709a3	2441	*
AnnaBridge	189:f392fc9709a3	2442	* (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
AnnaBridge	189:f392fc9709a3	2443	* @retval None
AnnaBridge	189:f392fc9709a3	2444	*/
AnnaBridge	189:f392fc9709a3	2445	__STATIC_INLINE void LL_ADC_REG_SetSequencerChannels(ADC_TypeDef *ADCx, uint32_t Channel)
AnnaBridge	189:f392fc9709a3	2446	{
AnnaBridge	189:f392fc9709a3	2447	/* Parameter "Channel" is used with masks because containing */
AnnaBridge	189:f392fc9709a3	2448	/* other bits reserved for other purpose. */
AnnaBridge	189:f392fc9709a3	2449	WRITE_REG(ADCx->CHSELR, (Channel & ADC_CHANNEL_ID_BITFIELD_MASK));
AnnaBridge	189:f392fc9709a3	2450	}
AnnaBridge	189:f392fc9709a3	2451
AnnaBridge	189:f392fc9709a3	2452	/**
AnnaBridge	189:f392fc9709a3	2453	* @brief Add channel to ADC group regular sequence: channel on rank corresponding to
AnnaBridge	189:f392fc9709a3	2454	* channel number.
AnnaBridge	189:f392fc9709a3	2455	* @note This function performs:
AnnaBridge	189:f392fc9709a3	2456	* - Channels ordering into each rank of scan sequence:
AnnaBridge	189:f392fc9709a3	2457	* rank of each channel is fixed by channel HW number
AnnaBridge	189:f392fc9709a3	2458	* (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
AnnaBridge	189:f392fc9709a3	2459	* - Set channels selected by adding them to the current sequencer
AnnaBridge	189:f392fc9709a3	2460	* configuration.
AnnaBridge	189:f392fc9709a3	2461	* @note On this STM32 serie, ADC group regular sequencer is
AnnaBridge	189:f392fc9709a3	2462	* not fully configurable: sequencer length and each rank
AnnaBridge	189:f392fc9709a3	2463	* affectation to a channel are fixed by channel HW number.
AnnaBridge	189:f392fc9709a3	2464	* @note Depending on devices and packages, some channels may not be available.
AnnaBridge	189:f392fc9709a3	2465	* Refer to device datasheet for channels availability.
AnnaBridge	189:f392fc9709a3	2466	* @note On this STM32 serie, to measure internal channels (VrefInt,
AnnaBridge	189:f392fc9709a3	2467	* TempSensor, ...), measurement paths to internal channels must be
AnnaBridge	189:f392fc9709a3	2468	* enabled separately.
AnnaBridge	189:f392fc9709a3	2469	* This can be done using function @ref LL_ADC_SetCommonPathInternalCh().
AnnaBridge	189:f392fc9709a3	2470	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	189:f392fc9709a3	2471	* ADC state:
AnnaBridge	189:f392fc9709a3	2472	* ADC must be disabled or enabled without conversion on going
AnnaBridge	189:f392fc9709a3	2473	* on group regular.
AnnaBridge	189:f392fc9709a3	2474	* @note One or several values can be selected.
AnnaBridge	189:f392fc9709a3	2475	* Example: (LL_ADC_CHANNEL_4 \| LL_ADC_CHANNEL_12 \| ...)
AnnaBridge	189:f392fc9709a3	2476	* @rmtoll CHSELR CHSEL0 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	189:f392fc9709a3	2477	* CHSELR CHSEL1 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	189:f392fc9709a3	2478	* CHSELR CHSEL2 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	189:f392fc9709a3	2479	* CHSELR CHSEL3 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	189:f392fc9709a3	2480	* CHSELR CHSEL4 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	189:f392fc9709a3	2481	* CHSELR CHSEL5 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	189:f392fc9709a3	2482	* CHSELR CHSEL6 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	189:f392fc9709a3	2483	* CHSELR CHSEL7 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	189:f392fc9709a3	2484	* CHSELR CHSEL8 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	189:f392fc9709a3	2485	* CHSELR CHSEL9 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	189:f392fc9709a3	2486	* CHSELR CHSEL10 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	189:f392fc9709a3	2487	* CHSELR CHSEL11 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	189:f392fc9709a3	2488	* CHSELR CHSEL12 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	189:f392fc9709a3	2489	* CHSELR CHSEL13 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	189:f392fc9709a3	2490	* CHSELR CHSEL14 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	189:f392fc9709a3	2491	* CHSELR CHSEL15 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	189:f392fc9709a3	2492	* CHSELR CHSEL16 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	189:f392fc9709a3	2493	* CHSELR CHSEL17 LL_ADC_REG_SetSequencerChAdd\n
AnnaBridge	189:f392fc9709a3	2494	* CHSELR CHSEL18 LL_ADC_REG_SetSequencerChAdd
AnnaBridge	189:f392fc9709a3	2495	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	2496	* @param Channel This parameter can be a combination of the following values:
AnnaBridge	189:f392fc9709a3	2497	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	189:f392fc9709a3	2498	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	189:f392fc9709a3	2499	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	189:f392fc9709a3	2500	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	189:f392fc9709a3	2501	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	189:f392fc9709a3	2502	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	189:f392fc9709a3	2503	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	189:f392fc9709a3	2504	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	189:f392fc9709a3	2505	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	189:f392fc9709a3	2506	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	189:f392fc9709a3	2507	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	189:f392fc9709a3	2508	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	189:f392fc9709a3	2509	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	189:f392fc9709a3	2510	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	189:f392fc9709a3	2511	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	189:f392fc9709a3	2512	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	189:f392fc9709a3	2513	* @arg @ref LL_ADC_CHANNEL_16 (1)
AnnaBridge	189:f392fc9709a3	2514	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	189:f392fc9709a3	2515	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	189:f392fc9709a3	2516	* @arg @ref LL_ADC_CHANNEL_VREFINT
AnnaBridge	189:f392fc9709a3	2517	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
AnnaBridge	189:f392fc9709a3	2518	* @arg @ref LL_ADC_CHANNEL_VLCD (1)
AnnaBridge	189:f392fc9709a3	2519	*
AnnaBridge	189:f392fc9709a3	2520	* (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
AnnaBridge	189:f392fc9709a3	2521	* @retval None
AnnaBridge	189:f392fc9709a3	2522	*/
AnnaBridge	189:f392fc9709a3	2523	__STATIC_INLINE void LL_ADC_REG_SetSequencerChAdd(ADC_TypeDef *ADCx, uint32_t Channel)
AnnaBridge	189:f392fc9709a3	2524	{
AnnaBridge	189:f392fc9709a3	2525	/* Parameter "Channel" is used with masks because containing */
AnnaBridge	189:f392fc9709a3	2526	/* other bits reserved for other purpose. */
AnnaBridge	189:f392fc9709a3	2527	SET_BIT(ADCx->CHSELR, (Channel & ADC_CHANNEL_ID_BITFIELD_MASK));
AnnaBridge	189:f392fc9709a3	2528	}
AnnaBridge	189:f392fc9709a3	2529
AnnaBridge	189:f392fc9709a3	2530	/**
AnnaBridge	189:f392fc9709a3	2531	* @brief Remove channel to ADC group regular sequence: channel on rank corresponding to
AnnaBridge	189:f392fc9709a3	2532	* channel number.
AnnaBridge	189:f392fc9709a3	2533	* @note This function performs:
AnnaBridge	189:f392fc9709a3	2534	* - Channels ordering into each rank of scan sequence:
AnnaBridge	189:f392fc9709a3	2535	* rank of each channel is fixed by channel HW number
AnnaBridge	189:f392fc9709a3	2536	* (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
AnnaBridge	189:f392fc9709a3	2537	* - Set channels selected by removing them to the current sequencer
AnnaBridge	189:f392fc9709a3	2538	* configuration.
AnnaBridge	189:f392fc9709a3	2539	* @note On this STM32 serie, ADC group regular sequencer is
AnnaBridge	189:f392fc9709a3	2540	* not fully configurable: sequencer length and each rank
AnnaBridge	189:f392fc9709a3	2541	* affectation to a channel are fixed by channel HW number.
AnnaBridge	189:f392fc9709a3	2542	* @note Depending on devices and packages, some channels may not be available.
AnnaBridge	189:f392fc9709a3	2543	* Refer to device datasheet for channels availability.
AnnaBridge	189:f392fc9709a3	2544	* @note On this STM32 serie, to measure internal channels (VrefInt,
AnnaBridge	189:f392fc9709a3	2545	* TempSensor, ...), measurement paths to internal channels must be
AnnaBridge	189:f392fc9709a3	2546	* enabled separately.
AnnaBridge	189:f392fc9709a3	2547	* This can be done using function @ref LL_ADC_SetCommonPathInternalCh().
AnnaBridge	189:f392fc9709a3	2548	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	189:f392fc9709a3	2549	* ADC state:
AnnaBridge	189:f392fc9709a3	2550	* ADC must be disabled or enabled without conversion on going
AnnaBridge	189:f392fc9709a3	2551	* on group regular.
AnnaBridge	189:f392fc9709a3	2552	* @note One or several values can be selected.
AnnaBridge	189:f392fc9709a3	2553	* Example: (LL_ADC_CHANNEL_4 \| LL_ADC_CHANNEL_12 \| ...)
AnnaBridge	189:f392fc9709a3	2554	* @rmtoll CHSELR CHSEL0 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	189:f392fc9709a3	2555	* CHSELR CHSEL1 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	189:f392fc9709a3	2556	* CHSELR CHSEL2 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	189:f392fc9709a3	2557	* CHSELR CHSEL3 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	189:f392fc9709a3	2558	* CHSELR CHSEL4 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	189:f392fc9709a3	2559	* CHSELR CHSEL5 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	189:f392fc9709a3	2560	* CHSELR CHSEL6 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	189:f392fc9709a3	2561	* CHSELR CHSEL7 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	189:f392fc9709a3	2562	* CHSELR CHSEL8 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	189:f392fc9709a3	2563	* CHSELR CHSEL9 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	189:f392fc9709a3	2564	* CHSELR CHSEL10 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	189:f392fc9709a3	2565	* CHSELR CHSEL11 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	189:f392fc9709a3	2566	* CHSELR CHSEL12 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	189:f392fc9709a3	2567	* CHSELR CHSEL13 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	189:f392fc9709a3	2568	* CHSELR CHSEL14 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	189:f392fc9709a3	2569	* CHSELR CHSEL15 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	189:f392fc9709a3	2570	* CHSELR CHSEL16 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	189:f392fc9709a3	2571	* CHSELR CHSEL17 LL_ADC_REG_SetSequencerChRem\n
AnnaBridge	189:f392fc9709a3	2572	* CHSELR CHSEL18 LL_ADC_REG_SetSequencerChRem
AnnaBridge	189:f392fc9709a3	2573	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	2574	* @param Channel This parameter can be a combination of the following values:
AnnaBridge	189:f392fc9709a3	2575	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	189:f392fc9709a3	2576	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	189:f392fc9709a3	2577	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	189:f392fc9709a3	2578	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	189:f392fc9709a3	2579	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	189:f392fc9709a3	2580	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	189:f392fc9709a3	2581	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	189:f392fc9709a3	2582	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	189:f392fc9709a3	2583	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	189:f392fc9709a3	2584	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	189:f392fc9709a3	2585	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	189:f392fc9709a3	2586	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	189:f392fc9709a3	2587	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	189:f392fc9709a3	2588	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	189:f392fc9709a3	2589	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	189:f392fc9709a3	2590	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	189:f392fc9709a3	2591	* @arg @ref LL_ADC_CHANNEL_16 (1)
AnnaBridge	189:f392fc9709a3	2592	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	189:f392fc9709a3	2593	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	189:f392fc9709a3	2594	* @arg @ref LL_ADC_CHANNEL_VREFINT
AnnaBridge	189:f392fc9709a3	2595	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
AnnaBridge	189:f392fc9709a3	2596	* @arg @ref LL_ADC_CHANNEL_VLCD (1)
AnnaBridge	189:f392fc9709a3	2597	*
AnnaBridge	189:f392fc9709a3	2598	* (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
AnnaBridge	189:f392fc9709a3	2599	* @retval None
AnnaBridge	189:f392fc9709a3	2600	*/
AnnaBridge	189:f392fc9709a3	2601	__STATIC_INLINE void LL_ADC_REG_SetSequencerChRem(ADC_TypeDef *ADCx, uint32_t Channel)
AnnaBridge	189:f392fc9709a3	2602	{
AnnaBridge	189:f392fc9709a3	2603	/* Parameter "Channel" is used with masks because containing */
AnnaBridge	189:f392fc9709a3	2604	/* other bits reserved for other purpose. */
AnnaBridge	189:f392fc9709a3	2605	CLEAR_BIT(ADCx->CHSELR, (Channel & ADC_CHANNEL_ID_BITFIELD_MASK));
AnnaBridge	189:f392fc9709a3	2606	}
AnnaBridge	189:f392fc9709a3	2607
AnnaBridge	189:f392fc9709a3	2608	/**
AnnaBridge	189:f392fc9709a3	2609	* @brief Get ADC group regular sequence: channel on rank corresponding to
AnnaBridge	189:f392fc9709a3	2610	* channel number.
AnnaBridge	189:f392fc9709a3	2611	* @note This function performs:
AnnaBridge	189:f392fc9709a3	2612	* - Channels order reading into each rank of scan sequence:
AnnaBridge	189:f392fc9709a3	2613	* rank of each channel is fixed by channel HW number
AnnaBridge	189:f392fc9709a3	2614	* (channel 0 fixed on rank 0, channel 1 fixed on rank1, ...).
AnnaBridge	189:f392fc9709a3	2615	* @note On this STM32 serie, ADC group regular sequencer is
AnnaBridge	189:f392fc9709a3	2616	* not fully configurable: sequencer length and each rank
AnnaBridge	189:f392fc9709a3	2617	* affectation to a channel are fixed by channel HW number.
AnnaBridge	189:f392fc9709a3	2618	* @note Depending on devices and packages, some channels may not be available.
AnnaBridge	189:f392fc9709a3	2619	* Refer to device datasheet for channels availability.
AnnaBridge	189:f392fc9709a3	2620	* @note On this STM32 serie, to measure internal channels (VrefInt,
AnnaBridge	189:f392fc9709a3	2621	* TempSensor, ...), measurement paths to internal channels must be
AnnaBridge	189:f392fc9709a3	2622	* enabled separately.
AnnaBridge	189:f392fc9709a3	2623	* This can be done using function @ref LL_ADC_SetCommonPathInternalCh().
AnnaBridge	189:f392fc9709a3	2624	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	189:f392fc9709a3	2625	* ADC state:
AnnaBridge	189:f392fc9709a3	2626	* ADC must be disabled or enabled without conversion on going
AnnaBridge	189:f392fc9709a3	2627	* on group regular.
AnnaBridge	189:f392fc9709a3	2628	* @note One or several values can be retrieved.
AnnaBridge	189:f392fc9709a3	2629	* Example: (LL_ADC_CHANNEL_4 \| LL_ADC_CHANNEL_12 \| ...)
AnnaBridge	189:f392fc9709a3	2630	* @rmtoll CHSELR CHSEL0 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	189:f392fc9709a3	2631	* CHSELR CHSEL1 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	189:f392fc9709a3	2632	* CHSELR CHSEL2 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	189:f392fc9709a3	2633	* CHSELR CHSEL3 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	189:f392fc9709a3	2634	* CHSELR CHSEL4 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	189:f392fc9709a3	2635	* CHSELR CHSEL5 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	189:f392fc9709a3	2636	* CHSELR CHSEL6 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	189:f392fc9709a3	2637	* CHSELR CHSEL7 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	189:f392fc9709a3	2638	* CHSELR CHSEL8 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	189:f392fc9709a3	2639	* CHSELR CHSEL9 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	189:f392fc9709a3	2640	* CHSELR CHSEL10 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	189:f392fc9709a3	2641	* CHSELR CHSEL11 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	189:f392fc9709a3	2642	* CHSELR CHSEL12 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	189:f392fc9709a3	2643	* CHSELR CHSEL13 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	189:f392fc9709a3	2644	* CHSELR CHSEL14 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	189:f392fc9709a3	2645	* CHSELR CHSEL15 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	189:f392fc9709a3	2646	* CHSELR CHSEL16 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	189:f392fc9709a3	2647	* CHSELR CHSEL17 LL_ADC_REG_GetSequencerChannels\n
AnnaBridge	189:f392fc9709a3	2648	* CHSELR CHSEL18 LL_ADC_REG_GetSequencerChannels
AnnaBridge	189:f392fc9709a3	2649	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	2650	* @retval Returned value can be a combination of the following values:
AnnaBridge	189:f392fc9709a3	2651	* @arg @ref LL_ADC_CHANNEL_0
AnnaBridge	189:f392fc9709a3	2652	* @arg @ref LL_ADC_CHANNEL_1
AnnaBridge	189:f392fc9709a3	2653	* @arg @ref LL_ADC_CHANNEL_2
AnnaBridge	189:f392fc9709a3	2654	* @arg @ref LL_ADC_CHANNEL_3
AnnaBridge	189:f392fc9709a3	2655	* @arg @ref LL_ADC_CHANNEL_4
AnnaBridge	189:f392fc9709a3	2656	* @arg @ref LL_ADC_CHANNEL_5
AnnaBridge	189:f392fc9709a3	2657	* @arg @ref LL_ADC_CHANNEL_6
AnnaBridge	189:f392fc9709a3	2658	* @arg @ref LL_ADC_CHANNEL_7
AnnaBridge	189:f392fc9709a3	2659	* @arg @ref LL_ADC_CHANNEL_8
AnnaBridge	189:f392fc9709a3	2660	* @arg @ref LL_ADC_CHANNEL_9
AnnaBridge	189:f392fc9709a3	2661	* @arg @ref LL_ADC_CHANNEL_10
AnnaBridge	189:f392fc9709a3	2662	* @arg @ref LL_ADC_CHANNEL_11
AnnaBridge	189:f392fc9709a3	2663	* @arg @ref LL_ADC_CHANNEL_12
AnnaBridge	189:f392fc9709a3	2664	* @arg @ref LL_ADC_CHANNEL_13
AnnaBridge	189:f392fc9709a3	2665	* @arg @ref LL_ADC_CHANNEL_14
AnnaBridge	189:f392fc9709a3	2666	* @arg @ref LL_ADC_CHANNEL_15
AnnaBridge	189:f392fc9709a3	2667	* @arg @ref LL_ADC_CHANNEL_16 (1)
AnnaBridge	189:f392fc9709a3	2668	* @arg @ref LL_ADC_CHANNEL_17
AnnaBridge	189:f392fc9709a3	2669	* @arg @ref LL_ADC_CHANNEL_18
AnnaBridge	189:f392fc9709a3	2670	* @arg @ref LL_ADC_CHANNEL_VREFINT
AnnaBridge	189:f392fc9709a3	2671	* @arg @ref LL_ADC_CHANNEL_TEMPSENSOR
AnnaBridge	189:f392fc9709a3	2672	* @arg @ref LL_ADC_CHANNEL_VLCD (1)
AnnaBridge	189:f392fc9709a3	2673	*
AnnaBridge	189:f392fc9709a3	2674	* (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
AnnaBridge	189:f392fc9709a3	2675	*/
AnnaBridge	189:f392fc9709a3	2676	__STATIC_INLINE uint32_t LL_ADC_REG_GetSequencerChannels(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	2677	{
AnnaBridge	189:f392fc9709a3	2678	register uint32_t ChannelsBitfield = READ_BIT(ADCx->CHSELR, ADC_CHSELR_CHSEL);
AnnaBridge	189:f392fc9709a3	2679
AnnaBridge	189:f392fc9709a3	2680	return ( (((ChannelsBitfield & ADC_CHSELR_CHSEL0) >> ADC_CHSELR_CHSEL0_BITOFFSET_POS) * LL_ADC_CHANNEL_0)
AnnaBridge	189:f392fc9709a3	2681	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL1) >> ADC_CHSELR_CHSEL1_BITOFFSET_POS) * LL_ADC_CHANNEL_1)
AnnaBridge	189:f392fc9709a3	2682	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL2) >> ADC_CHSELR_CHSEL2_BITOFFSET_POS) * LL_ADC_CHANNEL_2)
AnnaBridge	189:f392fc9709a3	2683	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL3) >> ADC_CHSELR_CHSEL3_BITOFFSET_POS) * LL_ADC_CHANNEL_3)
AnnaBridge	189:f392fc9709a3	2684	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL4) >> ADC_CHSELR_CHSEL4_BITOFFSET_POS) * LL_ADC_CHANNEL_4)
AnnaBridge	189:f392fc9709a3	2685	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL5) >> ADC_CHSELR_CHSEL5_BITOFFSET_POS) * LL_ADC_CHANNEL_5)
AnnaBridge	189:f392fc9709a3	2686	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL6) >> ADC_CHSELR_CHSEL6_BITOFFSET_POS) * LL_ADC_CHANNEL_6)
AnnaBridge	189:f392fc9709a3	2687	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL7) >> ADC_CHSELR_CHSEL7_BITOFFSET_POS) * LL_ADC_CHANNEL_7)
AnnaBridge	189:f392fc9709a3	2688	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL8) >> ADC_CHSELR_CHSEL8_BITOFFSET_POS) * LL_ADC_CHANNEL_8)
AnnaBridge	189:f392fc9709a3	2689	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL9) >> ADC_CHSELR_CHSEL9_BITOFFSET_POS) * LL_ADC_CHANNEL_9)
AnnaBridge	189:f392fc9709a3	2690	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL10) >> ADC_CHSELR_CHSEL10_BITOFFSET_POS) * LL_ADC_CHANNEL_10)
AnnaBridge	189:f392fc9709a3	2691	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL11) >> ADC_CHSELR_CHSEL11_BITOFFSET_POS) * LL_ADC_CHANNEL_11)
AnnaBridge	189:f392fc9709a3	2692	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL12) >> ADC_CHSELR_CHSEL12_BITOFFSET_POS) * LL_ADC_CHANNEL_12)
AnnaBridge	189:f392fc9709a3	2693	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL13) >> ADC_CHSELR_CHSEL13_BITOFFSET_POS) * LL_ADC_CHANNEL_13)
AnnaBridge	189:f392fc9709a3	2694	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL14) >> ADC_CHSELR_CHSEL14_BITOFFSET_POS) * LL_ADC_CHANNEL_14)
AnnaBridge	189:f392fc9709a3	2695	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL15) >> ADC_CHSELR_CHSEL15_BITOFFSET_POS) * LL_ADC_CHANNEL_15)
AnnaBridge	189:f392fc9709a3	2696	#if defined(ADC_CCR_VLCDEN)
AnnaBridge	189:f392fc9709a3	2697	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL16) >> ADC_CHSELR_CHSEL16_BITOFFSET_POS) * LL_ADC_CHANNEL_16)
AnnaBridge	189:f392fc9709a3	2698	#endif
AnnaBridge	189:f392fc9709a3	2699	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL17) >> ADC_CHSELR_CHSEL17_BITOFFSET_POS) * LL_ADC_CHANNEL_17)
AnnaBridge	189:f392fc9709a3	2700	\| (((ChannelsBitfield & ADC_CHSELR_CHSEL18) >> ADC_CHSELR_CHSEL18_BITOFFSET_POS) * LL_ADC_CHANNEL_18)
AnnaBridge	189:f392fc9709a3	2701	);
AnnaBridge	189:f392fc9709a3	2702	}
AnnaBridge	189:f392fc9709a3	2703	/**
AnnaBridge	189:f392fc9709a3	2704	* @brief Set ADC continuous conversion mode on ADC group regular.
AnnaBridge	189:f392fc9709a3	2705	* @note Description of ADC continuous conversion mode:
AnnaBridge	189:f392fc9709a3	2706	* - single mode: one conversion per trigger
AnnaBridge	189:f392fc9709a3	2707	* - continuous mode: after the first trigger, following
AnnaBridge	189:f392fc9709a3	2708	* conversions launched successively automatically.
AnnaBridge	189:f392fc9709a3	2709	* @note It is not possible to enable both ADC group regular
AnnaBridge	189:f392fc9709a3	2710	* continuous mode and sequencer discontinuous mode.
AnnaBridge	189:f392fc9709a3	2711	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	189:f392fc9709a3	2712	* ADC state:
AnnaBridge	189:f392fc9709a3	2713	* ADC must be disabled or enabled without conversion on going
AnnaBridge	189:f392fc9709a3	2714	* on group regular.
AnnaBridge	189:f392fc9709a3	2715	* @rmtoll CFGR1 CONT LL_ADC_REG_SetContinuousMode
AnnaBridge	189:f392fc9709a3	2716	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	2717	* @param Continuous This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	2718	* @arg @ref LL_ADC_REG_CONV_SINGLE
AnnaBridge	189:f392fc9709a3	2719	* @arg @ref LL_ADC_REG_CONV_CONTINUOUS
AnnaBridge	189:f392fc9709a3	2720	* @retval None
AnnaBridge	189:f392fc9709a3	2721	*/
AnnaBridge	189:f392fc9709a3	2722	__STATIC_INLINE void LL_ADC_REG_SetContinuousMode(ADC_TypeDef *ADCx, uint32_t Continuous)
AnnaBridge	189:f392fc9709a3	2723	{
AnnaBridge	189:f392fc9709a3	2724	MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_CONT, Continuous);
AnnaBridge	189:f392fc9709a3	2725	}
AnnaBridge	189:f392fc9709a3	2726
AnnaBridge	189:f392fc9709a3	2727	/**
AnnaBridge	189:f392fc9709a3	2728	* @brief Get ADC continuous conversion mode on ADC group regular.
AnnaBridge	189:f392fc9709a3	2729	* @note Description of ADC continuous conversion mode:
AnnaBridge	189:f392fc9709a3	2730	* - single mode: one conversion per trigger
AnnaBridge	189:f392fc9709a3	2731	* - continuous mode: after the first trigger, following
AnnaBridge	189:f392fc9709a3	2732	* conversions launched successively automatically.
AnnaBridge	189:f392fc9709a3	2733	* @rmtoll CFGR1 CONT LL_ADC_REG_GetContinuousMode
AnnaBridge	189:f392fc9709a3	2734	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	2735	* @retval Returned value can be one of the following values:
AnnaBridge	189:f392fc9709a3	2736	* @arg @ref LL_ADC_REG_CONV_SINGLE
AnnaBridge	189:f392fc9709a3	2737	* @arg @ref LL_ADC_REG_CONV_CONTINUOUS
AnnaBridge	189:f392fc9709a3	2738	*/
AnnaBridge	189:f392fc9709a3	2739	__STATIC_INLINE uint32_t LL_ADC_REG_GetContinuousMode(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	2740	{
AnnaBridge	189:f392fc9709a3	2741	return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_CONT));
AnnaBridge	189:f392fc9709a3	2742	}
AnnaBridge	189:f392fc9709a3	2743
AnnaBridge	189:f392fc9709a3	2744	/**
AnnaBridge	189:f392fc9709a3	2745	* @brief Set ADC group regular conversion data transfer: no transfer or
AnnaBridge	189:f392fc9709a3	2746	* transfer by DMA, and DMA requests mode.
AnnaBridge	189:f392fc9709a3	2747	* @note If transfer by DMA selected, specifies the DMA requests
AnnaBridge	189:f392fc9709a3	2748	* mode:
AnnaBridge	189:f392fc9709a3	2749	* - Limited mode (One shot mode): DMA transfer requests are stopped
AnnaBridge	189:f392fc9709a3	2750	* when number of DMA data transfers (number of
AnnaBridge	189:f392fc9709a3	2751	* ADC conversions) is reached.
AnnaBridge	189:f392fc9709a3	2752	* This ADC mode is intended to be used with DMA mode non-circular.
AnnaBridge	189:f392fc9709a3	2753	* - Unlimited mode: DMA transfer requests are unlimited,
AnnaBridge	189:f392fc9709a3	2754	* whatever number of DMA data transfers (number of
AnnaBridge	189:f392fc9709a3	2755	* ADC conversions).
AnnaBridge	189:f392fc9709a3	2756	* This ADC mode is intended to be used with DMA mode circular.
AnnaBridge	189:f392fc9709a3	2757	* @note If ADC DMA requests mode is set to unlimited and DMA is set to
AnnaBridge	189:f392fc9709a3	2758	* mode non-circular:
AnnaBridge	189:f392fc9709a3	2759	* when DMA transfers size will be reached, DMA will stop transfers of
AnnaBridge	189:f392fc9709a3	2760	* ADC conversions data ADC will raise an overrun error
AnnaBridge	189:f392fc9709a3	2761	* (overrun flag and interruption if enabled).
AnnaBridge	189:f392fc9709a3	2762	* @note To configure DMA source address (peripheral address),
AnnaBridge	189:f392fc9709a3	2763	* use function @ref LL_ADC_DMA_GetRegAddr().
AnnaBridge	189:f392fc9709a3	2764	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	189:f392fc9709a3	2765	* ADC state:
AnnaBridge	189:f392fc9709a3	2766	* ADC must be disabled or enabled without conversion on going
AnnaBridge	189:f392fc9709a3	2767	* on group regular.
AnnaBridge	189:f392fc9709a3	2768	* @rmtoll CFGR1 DMAEN LL_ADC_REG_SetDMATransfer\n
AnnaBridge	189:f392fc9709a3	2769	* CFGR1 DMACFG LL_ADC_REG_SetDMATransfer
AnnaBridge	189:f392fc9709a3	2770	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	2771	* @param DMATransfer This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	2772	* @arg @ref LL_ADC_REG_DMA_TRANSFER_NONE
AnnaBridge	189:f392fc9709a3	2773	* @arg @ref LL_ADC_REG_DMA_TRANSFER_LIMITED
AnnaBridge	189:f392fc9709a3	2774	* @arg @ref LL_ADC_REG_DMA_TRANSFER_UNLIMITED
AnnaBridge	189:f392fc9709a3	2775	* @retval None
AnnaBridge	189:f392fc9709a3	2776	*/
AnnaBridge	189:f392fc9709a3	2777	__STATIC_INLINE void LL_ADC_REG_SetDMATransfer(ADC_TypeDef *ADCx, uint32_t DMATransfer)
AnnaBridge	189:f392fc9709a3	2778	{
AnnaBridge	189:f392fc9709a3	2779	MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_DMAEN \| ADC_CFGR1_DMACFG, DMATransfer);
AnnaBridge	189:f392fc9709a3	2780	}
AnnaBridge	189:f392fc9709a3	2781
AnnaBridge	189:f392fc9709a3	2782	/**
AnnaBridge	189:f392fc9709a3	2783	* @brief Get ADC group regular conversion data transfer: no transfer or
AnnaBridge	189:f392fc9709a3	2784	* transfer by DMA, and DMA requests mode.
AnnaBridge	189:f392fc9709a3	2785	* @note If transfer by DMA selected, specifies the DMA requests
AnnaBridge	189:f392fc9709a3	2786	* mode:
AnnaBridge	189:f392fc9709a3	2787	* - Limited mode (One shot mode): DMA transfer requests are stopped
AnnaBridge	189:f392fc9709a3	2788	* when number of DMA data transfers (number of
AnnaBridge	189:f392fc9709a3	2789	* ADC conversions) is reached.
AnnaBridge	189:f392fc9709a3	2790	* This ADC mode is intended to be used with DMA mode non-circular.
AnnaBridge	189:f392fc9709a3	2791	* - Unlimited mode: DMA transfer requests are unlimited,
AnnaBridge	189:f392fc9709a3	2792	* whatever number of DMA data transfers (number of
AnnaBridge	189:f392fc9709a3	2793	* ADC conversions).
AnnaBridge	189:f392fc9709a3	2794	* This ADC mode is intended to be used with DMA mode circular.
AnnaBridge	189:f392fc9709a3	2795	* @note If ADC DMA requests mode is set to unlimited and DMA is set to
AnnaBridge	189:f392fc9709a3	2796	* mode non-circular:
AnnaBridge	189:f392fc9709a3	2797	* when DMA transfers size will be reached, DMA will stop transfers of
AnnaBridge	189:f392fc9709a3	2798	* ADC conversions data ADC will raise an overrun error
AnnaBridge	189:f392fc9709a3	2799	* (overrun flag and interruption if enabled).
AnnaBridge	189:f392fc9709a3	2800	* @note To configure DMA source address (peripheral address),
AnnaBridge	189:f392fc9709a3	2801	* use function @ref LL_ADC_DMA_GetRegAddr().
AnnaBridge	189:f392fc9709a3	2802	* @rmtoll CFGR1 DMAEN LL_ADC_REG_GetDMATransfer\n
AnnaBridge	189:f392fc9709a3	2803	* CFGR1 DMACFG LL_ADC_REG_GetDMATransfer
AnnaBridge	189:f392fc9709a3	2804	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	2805	* @retval Returned value can be one of the following values:
AnnaBridge	189:f392fc9709a3	2806	* @arg @ref LL_ADC_REG_DMA_TRANSFER_NONE
AnnaBridge	189:f392fc9709a3	2807	* @arg @ref LL_ADC_REG_DMA_TRANSFER_LIMITED
AnnaBridge	189:f392fc9709a3	2808	* @arg @ref LL_ADC_REG_DMA_TRANSFER_UNLIMITED
AnnaBridge	189:f392fc9709a3	2809	*/
AnnaBridge	189:f392fc9709a3	2810	__STATIC_INLINE uint32_t LL_ADC_REG_GetDMATransfer(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	2811	{
AnnaBridge	189:f392fc9709a3	2812	return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_DMAEN \| ADC_CFGR1_DMACFG));
AnnaBridge	189:f392fc9709a3	2813	}
AnnaBridge	189:f392fc9709a3	2814
AnnaBridge	189:f392fc9709a3	2815	/**
AnnaBridge	189:f392fc9709a3	2816	* @brief Set ADC group regular behavior in case of overrun:
AnnaBridge	189:f392fc9709a3	2817	* data preserved or overwritten.
AnnaBridge	189:f392fc9709a3	2818	* @note Compatibility with devices without feature overrun:
AnnaBridge	189:f392fc9709a3	2819	* other devices without this feature have a behavior
AnnaBridge	189:f392fc9709a3	2820	* equivalent to data overwritten.
AnnaBridge	189:f392fc9709a3	2821	* The default setting of overrun is data preserved.
AnnaBridge	189:f392fc9709a3	2822	* Therefore, for compatibility with all devices, parameter
AnnaBridge	189:f392fc9709a3	2823	* overrun should be set to data overwritten.
AnnaBridge	189:f392fc9709a3	2824	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	189:f392fc9709a3	2825	* ADC state:
AnnaBridge	189:f392fc9709a3	2826	* ADC must be disabled or enabled without conversion on going
AnnaBridge	189:f392fc9709a3	2827	* on group regular.
AnnaBridge	189:f392fc9709a3	2828	* @rmtoll CFGR1 OVRMOD LL_ADC_REG_SetOverrun
AnnaBridge	189:f392fc9709a3	2829	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	2830	* @param Overrun This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	2831	* @arg @ref LL_ADC_REG_OVR_DATA_PRESERVED
AnnaBridge	189:f392fc9709a3	2832	* @arg @ref LL_ADC_REG_OVR_DATA_OVERWRITTEN
AnnaBridge	189:f392fc9709a3	2833	* @retval None
AnnaBridge	189:f392fc9709a3	2834	*/
AnnaBridge	189:f392fc9709a3	2835	__STATIC_INLINE void LL_ADC_REG_SetOverrun(ADC_TypeDef *ADCx, uint32_t Overrun)
AnnaBridge	189:f392fc9709a3	2836	{
AnnaBridge	189:f392fc9709a3	2837	MODIFY_REG(ADCx->CFGR1, ADC_CFGR1_OVRMOD, Overrun);
AnnaBridge	189:f392fc9709a3	2838	}
AnnaBridge	189:f392fc9709a3	2839
AnnaBridge	189:f392fc9709a3	2840	/**
AnnaBridge	189:f392fc9709a3	2841	* @brief Get ADC group regular behavior in case of overrun:
AnnaBridge	189:f392fc9709a3	2842	* data preserved or overwritten.
AnnaBridge	189:f392fc9709a3	2843	* @rmtoll CFGR1 OVRMOD LL_ADC_REG_GetOverrun
AnnaBridge	189:f392fc9709a3	2844	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	2845	* @retval Returned value can be one of the following values:
AnnaBridge	189:f392fc9709a3	2846	* @arg @ref LL_ADC_REG_OVR_DATA_PRESERVED
AnnaBridge	189:f392fc9709a3	2847	* @arg @ref LL_ADC_REG_OVR_DATA_OVERWRITTEN
AnnaBridge	189:f392fc9709a3	2848	*/
AnnaBridge	189:f392fc9709a3	2849	__STATIC_INLINE uint32_t LL_ADC_REG_GetOverrun(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	2850	{
AnnaBridge	189:f392fc9709a3	2851	return (uint32_t)(READ_BIT(ADCx->CFGR1, ADC_CFGR1_OVRMOD));
AnnaBridge	189:f392fc9709a3	2852	}
AnnaBridge	189:f392fc9709a3	2853
AnnaBridge	189:f392fc9709a3	2854	/**
AnnaBridge	189:f392fc9709a3	2855	* @}
AnnaBridge	189:f392fc9709a3	2856	*/
AnnaBridge	189:f392fc9709a3	2857
AnnaBridge	189:f392fc9709a3	2858
AnnaBridge	189:f392fc9709a3	2859	/** @defgroup ADC_LL_EF_Configuration_ADC_AnalogWatchdog Configuration of ADC transversal scope: analog watchdog
AnnaBridge	189:f392fc9709a3	2860	* @{
AnnaBridge	189:f392fc9709a3	2861	*/
AnnaBridge	189:f392fc9709a3	2862
AnnaBridge	189:f392fc9709a3	2863	/**
AnnaBridge	189:f392fc9709a3	2864	* @brief Set ADC analog watchdog monitored channels:
AnnaBridge	189:f392fc9709a3	2865	* a single channel or all channels,
AnnaBridge	189:f392fc9709a3	2866	* on ADC group regular.
AnnaBridge	189:f392fc9709a3	2867	* @note Once monitored channels are selected, analog watchdog
AnnaBridge	189:f392fc9709a3	2868	* is enabled.
AnnaBridge	189:f392fc9709a3	2869	* @note In case of need to define a single channel to monitor
AnnaBridge	189:f392fc9709a3	2870	* with analog watchdog from sequencer channel definition,
AnnaBridge	189:f392fc9709a3	2871	* use helper macro @ref __LL_ADC_ANALOGWD_CHANNEL_GROUP().
AnnaBridge	189:f392fc9709a3	2872	* @note On this STM32 serie, there is only 1 kind of analog watchdog
AnnaBridge	189:f392fc9709a3	2873	* instance:
AnnaBridge	189:f392fc9709a3	2874	* - AWD standard (instance AWD1):
AnnaBridge	189:f392fc9709a3	2875	* - channels monitored: can monitor 1 channel or all channels.
AnnaBridge	189:f392fc9709a3	2876	* - groups monitored: ADC group regular.
AnnaBridge	189:f392fc9709a3	2877	* - resolution: resolution is not limited (corresponds to
AnnaBridge	189:f392fc9709a3	2878	* ADC resolution configured).
AnnaBridge	189:f392fc9709a3	2879	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	189:f392fc9709a3	2880	* ADC state:
AnnaBridge	189:f392fc9709a3	2881	* ADC must be disabled or enabled without conversion on going
AnnaBridge	189:f392fc9709a3	2882	* on group regular.
AnnaBridge	189:f392fc9709a3	2883	* @rmtoll CFGR1 AWDCH LL_ADC_SetAnalogWDMonitChannels\n
AnnaBridge	189:f392fc9709a3	2884	* CFGR1 AWDSGL LL_ADC_SetAnalogWDMonitChannels\n
AnnaBridge	189:f392fc9709a3	2885	* CFGR1 AWDEN LL_ADC_SetAnalogWDMonitChannels
AnnaBridge	189:f392fc9709a3	2886	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	2887	* @param AWDChannelGroup This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	2888	* @arg @ref LL_ADC_AWD_DISABLE
AnnaBridge	189:f392fc9709a3	2889	* @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG
AnnaBridge	189:f392fc9709a3	2890	* @arg @ref LL_ADC_AWD_CHANNEL_0_REG
AnnaBridge	189:f392fc9709a3	2891	* @arg @ref LL_ADC_AWD_CHANNEL_1_REG
AnnaBridge	189:f392fc9709a3	2892	* @arg @ref LL_ADC_AWD_CHANNEL_2_REG
AnnaBridge	189:f392fc9709a3	2893	* @arg @ref LL_ADC_AWD_CHANNEL_3_REG
AnnaBridge	189:f392fc9709a3	2894	* @arg @ref LL_ADC_AWD_CHANNEL_4_REG
AnnaBridge	189:f392fc9709a3	2895	* @arg @ref LL_ADC_AWD_CHANNEL_5_REG
AnnaBridge	189:f392fc9709a3	2896	* @arg @ref LL_ADC_AWD_CHANNEL_6_REG
AnnaBridge	189:f392fc9709a3	2897	* @arg @ref LL_ADC_AWD_CHANNEL_7_REG
AnnaBridge	189:f392fc9709a3	2898	* @arg @ref LL_ADC_AWD_CHANNEL_8_REG
AnnaBridge	189:f392fc9709a3	2899	* @arg @ref LL_ADC_AWD_CHANNEL_9_REG
AnnaBridge	189:f392fc9709a3	2900	* @arg @ref LL_ADC_AWD_CHANNEL_10_REG
AnnaBridge	189:f392fc9709a3	2901	* @arg @ref LL_ADC_AWD_CHANNEL_11_REG
AnnaBridge	189:f392fc9709a3	2902	* @arg @ref LL_ADC_AWD_CHANNEL_12_REG
AnnaBridge	189:f392fc9709a3	2903	* @arg @ref LL_ADC_AWD_CHANNEL_13_REG
AnnaBridge	189:f392fc9709a3	2904	* @arg @ref LL_ADC_AWD_CHANNEL_14_REG
AnnaBridge	189:f392fc9709a3	2905	* @arg @ref LL_ADC_AWD_CHANNEL_15_REG
AnnaBridge	189:f392fc9709a3	2906	* @arg @ref LL_ADC_AWD_CHANNEL_16_REG (1)
AnnaBridge	189:f392fc9709a3	2907	* @arg @ref LL_ADC_AWD_CHANNEL_17_REG
AnnaBridge	189:f392fc9709a3	2908	* @arg @ref LL_ADC_AWD_CHANNEL_18_REG
AnnaBridge	189:f392fc9709a3	2909	* @arg @ref LL_ADC_AWD_CH_VREFINT_REG
AnnaBridge	189:f392fc9709a3	2910	* @arg @ref LL_ADC_AWD_CH_TEMPSENSOR_REG
AnnaBridge	189:f392fc9709a3	2911	* @arg @ref LL_ADC_AWD_CH_VLCD_REG (1)
AnnaBridge	189:f392fc9709a3	2912	*
AnnaBridge	189:f392fc9709a3	2913	* (1) On STM32L0, parameter not available on all devices: only on STM32L053xx, STM32L063xx, STM32L073xx, STM32L083xx.
AnnaBridge	189:f392fc9709a3	2914	* @retval None
AnnaBridge	189:f392fc9709a3	2915	*/
AnnaBridge	189:f392fc9709a3	2916	__STATIC_INLINE void LL_ADC_SetAnalogWDMonitChannels(ADC_TypeDef *ADCx, uint32_t AWDChannelGroup)
AnnaBridge	189:f392fc9709a3	2917	{
AnnaBridge	189:f392fc9709a3	2918	MODIFY_REG(ADCx->CFGR1,
AnnaBridge	189:f392fc9709a3	2919	(ADC_CFGR1_AWDCH \| ADC_CFGR1_AWDSGL \| ADC_CFGR1_AWDEN),
AnnaBridge	189:f392fc9709a3	2920	(AWDChannelGroup & ADC_AWD_CR_ALL_CHANNEL_MASK));
AnnaBridge	189:f392fc9709a3	2921	}
AnnaBridge	189:f392fc9709a3	2922
AnnaBridge	189:f392fc9709a3	2923	/**
AnnaBridge	189:f392fc9709a3	2924	* @brief Get ADC analog watchdog monitored channel.
AnnaBridge	189:f392fc9709a3	2925	* @note Usage of the returned channel number:
AnnaBridge	189:f392fc9709a3	2926	* - To reinject this channel into another function LL_ADC_xxx:
AnnaBridge	189:f392fc9709a3	2927	* the returned channel number is only partly formatted on definition
AnnaBridge	189:f392fc9709a3	2928	* of literals LL_ADC_CHANNEL_x. Therefore, it has to be compared
AnnaBridge	189:f392fc9709a3	2929	* with parts of literals LL_ADC_CHANNEL_x or using
AnnaBridge	189:f392fc9709a3	2930	* helper macro @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB().
AnnaBridge	189:f392fc9709a3	2931	* Then the selected literal LL_ADC_CHANNEL_x can be used
AnnaBridge	189:f392fc9709a3	2932	* as parameter for another function.
AnnaBridge	189:f392fc9709a3	2933	* - To get the channel number in decimal format:
AnnaBridge	189:f392fc9709a3	2934	* process the returned value with the helper macro
AnnaBridge	189:f392fc9709a3	2935	* @ref __LL_ADC_CHANNEL_TO_DECIMAL_NB().
AnnaBridge	189:f392fc9709a3	2936	* Applicable only when the analog watchdog is set to monitor
AnnaBridge	189:f392fc9709a3	2937	* one channel.
AnnaBridge	189:f392fc9709a3	2938	* @note On this STM32 serie, there is only 1 kind of analog watchdog
AnnaBridge	189:f392fc9709a3	2939	* instance:
AnnaBridge	189:f392fc9709a3	2940	* - AWD standard (instance AWD1):
AnnaBridge	189:f392fc9709a3	2941	* - channels monitored: can monitor 1 channel or all channels.
AnnaBridge	189:f392fc9709a3	2942	* - groups monitored: ADC group regular.
AnnaBridge	189:f392fc9709a3	2943	* - resolution: resolution is not limited (corresponds to
AnnaBridge	189:f392fc9709a3	2944	* ADC resolution configured).
AnnaBridge	189:f392fc9709a3	2945	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	189:f392fc9709a3	2946	* ADC state:
AnnaBridge	189:f392fc9709a3	2947	* ADC must be disabled or enabled without conversion on going
AnnaBridge	189:f392fc9709a3	2948	* on group regular.
AnnaBridge	189:f392fc9709a3	2949	* @rmtoll CFGR1 AWDCH LL_ADC_GetAnalogWDMonitChannels\n
AnnaBridge	189:f392fc9709a3	2950	* CFGR1 AWDSGL LL_ADC_GetAnalogWDMonitChannels\n
AnnaBridge	189:f392fc9709a3	2951	* CFGR1 AWDEN LL_ADC_GetAnalogWDMonitChannels
AnnaBridge	189:f392fc9709a3	2952	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	2953	* @retval Returned value can be one of the following values:
AnnaBridge	189:f392fc9709a3	2954	* @arg @ref LL_ADC_AWD_DISABLE
AnnaBridge	189:f392fc9709a3	2955	* @arg @ref LL_ADC_AWD_ALL_CHANNELS_REG
AnnaBridge	189:f392fc9709a3	2956	* @arg @ref LL_ADC_AWD_CHANNEL_0_REG
AnnaBridge	189:f392fc9709a3	2957	* @arg @ref LL_ADC_AWD_CHANNEL_1_REG
AnnaBridge	189:f392fc9709a3	2958	* @arg @ref LL_ADC_AWD_CHANNEL_2_REG
AnnaBridge	189:f392fc9709a3	2959	* @arg @ref LL_ADC_AWD_CHANNEL_3_REG
AnnaBridge	189:f392fc9709a3	2960	* @arg @ref LL_ADC_AWD_CHANNEL_4_REG
AnnaBridge	189:f392fc9709a3	2961	* @arg @ref LL_ADC_AWD_CHANNEL_5_REG
AnnaBridge	189:f392fc9709a3	2962	* @arg @ref LL_ADC_AWD_CHANNEL_6_REG
AnnaBridge	189:f392fc9709a3	2963	* @arg @ref LL_ADC_AWD_CHANNEL_7_REG
AnnaBridge	189:f392fc9709a3	2964	* @arg @ref LL_ADC_AWD_CHANNEL_8_REG
AnnaBridge	189:f392fc9709a3	2965	* @arg @ref LL_ADC_AWD_CHANNEL_9_REG
AnnaBridge	189:f392fc9709a3	2966	* @arg @ref LL_ADC_AWD_CHANNEL_10_REG
AnnaBridge	189:f392fc9709a3	2967	* @arg @ref LL_ADC_AWD_CHANNEL_11_REG
AnnaBridge	189:f392fc9709a3	2968	* @arg @ref LL_ADC_AWD_CHANNEL_12_REG
AnnaBridge	189:f392fc9709a3	2969	* @arg @ref LL_ADC_AWD_CHANNEL_13_REG
AnnaBridge	189:f392fc9709a3	2970	* @arg @ref LL_ADC_AWD_CHANNEL_14_REG
AnnaBridge	189:f392fc9709a3	2971	* @arg @ref LL_ADC_AWD_CHANNEL_15_REG
AnnaBridge	189:f392fc9709a3	2972	* @arg @ref LL_ADC_AWD_CHANNEL_16_REG
AnnaBridge	189:f392fc9709a3	2973	* @arg @ref LL_ADC_AWD_CHANNEL_17_REG
AnnaBridge	189:f392fc9709a3	2974	* @arg @ref LL_ADC_AWD_CHANNEL_18_REG
AnnaBridge	189:f392fc9709a3	2975	*/
AnnaBridge	189:f392fc9709a3	2976	__STATIC_INLINE uint32_t LL_ADC_GetAnalogWDMonitChannels(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	2977	{
AnnaBridge	189:f392fc9709a3	2978	register uint32_t AWDChannelGroup = READ_BIT(ADCx->CFGR1, (ADC_CFGR1_AWDCH \| ADC_CFGR1_AWDSGL \| ADC_CFGR1_AWDEN));
AnnaBridge	189:f392fc9709a3	2979
AnnaBridge	189:f392fc9709a3	2980	/* Note: Set variable according to channel definition including channel ID */
AnnaBridge	189:f392fc9709a3	2981	/* with bitfield. */
AnnaBridge	189:f392fc9709a3	2982	register uint32_t AWDChannelSingle = ((AWDChannelGroup & ADC_CFGR1_AWDSGL) >> ADC_CFGR1_AWDSGL_BITOFFSET_POS);
AnnaBridge	189:f392fc9709a3	2983	register uint32_t AWDChannelBitField = (ADC_CHANNEL_0_BITFIELD << ((AWDChannelGroup & ADC_CHANNEL_ID_NUMBER_MASK) >> ADC_CHANNEL_ID_NUMBER_BITOFFSET_POS));
AnnaBridge	189:f392fc9709a3	2984
AnnaBridge	189:f392fc9709a3	2985	return (AWDChannelGroup \| (AWDChannelBitField * AWDChannelSingle));
AnnaBridge	189:f392fc9709a3	2986	}
AnnaBridge	189:f392fc9709a3	2987
AnnaBridge	189:f392fc9709a3	2988	/**
AnnaBridge	189:f392fc9709a3	2989	* @brief Set ADC analog watchdog thresholds value of both thresholds
AnnaBridge	189:f392fc9709a3	2990	* high and low.
AnnaBridge	189:f392fc9709a3	2991	* @note If value of only one threshold high or low must be set,
AnnaBridge	189:f392fc9709a3	2992	* use function @ref LL_ADC_SetAnalogWDThresholds().
AnnaBridge	189:f392fc9709a3	2993	* @note In case of ADC resolution different of 12 bits,
AnnaBridge	189:f392fc9709a3	2994	* analog watchdog thresholds data require a specific shift.
AnnaBridge	189:f392fc9709a3	2995	* Use helper macro @ref __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION().
AnnaBridge	189:f392fc9709a3	2996	* @note On this STM32 serie, there is only 1 kind of analog watchdog
AnnaBridge	189:f392fc9709a3	2997	* instance:
AnnaBridge	189:f392fc9709a3	2998	* - AWD standard (instance AWD1):
AnnaBridge	189:f392fc9709a3	2999	* - channels monitored: can monitor 1 channel or all channels.
AnnaBridge	189:f392fc9709a3	3000	* - groups monitored: ADC group regular.
AnnaBridge	189:f392fc9709a3	3001	* - resolution: resolution is not limited (corresponds to
AnnaBridge	189:f392fc9709a3	3002	* ADC resolution configured).
AnnaBridge	189:f392fc9709a3	3003	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	189:f392fc9709a3	3004	* ADC state:
AnnaBridge	189:f392fc9709a3	3005	* ADC must be disabled or enabled without conversion on going
AnnaBridge	189:f392fc9709a3	3006	* on group regular.
AnnaBridge	189:f392fc9709a3	3007	* @rmtoll TR HT LL_ADC_ConfigAnalogWDThresholds\n
AnnaBridge	189:f392fc9709a3	3008	* TR LT LL_ADC_ConfigAnalogWDThresholds
AnnaBridge	189:f392fc9709a3	3009	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3010	* @param AWDThresholdHighValue Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	189:f392fc9709a3	3011	* @param AWDThresholdLowValue Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	189:f392fc9709a3	3012	* @retval None
AnnaBridge	189:f392fc9709a3	3013	*/
AnnaBridge	189:f392fc9709a3	3014	__STATIC_INLINE void LL_ADC_ConfigAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDThresholdHighValue, uint32_t AWDThresholdLowValue)
AnnaBridge	189:f392fc9709a3	3015	{
AnnaBridge	189:f392fc9709a3	3016	MODIFY_REG(ADCx->TR,
AnnaBridge	189:f392fc9709a3	3017	ADC_TR_HT \| ADC_TR_LT,
AnnaBridge	189:f392fc9709a3	3018	(AWDThresholdHighValue << ADC_TR_HT_BITOFFSET_POS) \| AWDThresholdLowValue);
AnnaBridge	189:f392fc9709a3	3019	}
AnnaBridge	189:f392fc9709a3	3020
AnnaBridge	189:f392fc9709a3	3021	/**
AnnaBridge	189:f392fc9709a3	3022	* @brief Set ADC analog watchdog threshold value of threshold
AnnaBridge	189:f392fc9709a3	3023	* high or low.
AnnaBridge	189:f392fc9709a3	3024	* @note If values of both thresholds high or low must be set,
AnnaBridge	189:f392fc9709a3	3025	* use function @ref LL_ADC_ConfigAnalogWDThresholds().
AnnaBridge	189:f392fc9709a3	3026	* @note In case of ADC resolution different of 12 bits,
AnnaBridge	189:f392fc9709a3	3027	* analog watchdog thresholds data require a specific shift.
AnnaBridge	189:f392fc9709a3	3028	* Use helper macro @ref __LL_ADC_ANALOGWD_SET_THRESHOLD_RESOLUTION().
AnnaBridge	189:f392fc9709a3	3029	* @note On this STM32 serie, there is only 1 kind of analog watchdog
AnnaBridge	189:f392fc9709a3	3030	* instance:
AnnaBridge	189:f392fc9709a3	3031	* - AWD standard (instance AWD1):
AnnaBridge	189:f392fc9709a3	3032	* - channels monitored: can monitor 1 channel or all channels.
AnnaBridge	189:f392fc9709a3	3033	* - groups monitored: ADC group regular.
AnnaBridge	189:f392fc9709a3	3034	* - resolution: resolution is not limited (corresponds to
AnnaBridge	189:f392fc9709a3	3035	* ADC resolution configured).
AnnaBridge	189:f392fc9709a3	3036	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	189:f392fc9709a3	3037	* ADC state:
AnnaBridge	189:f392fc9709a3	3038	* ADC must be disabled or enabled without conversion on going
AnnaBridge	189:f392fc9709a3	3039	* on group regular.
AnnaBridge	189:f392fc9709a3	3040	* @rmtoll TR HT LL_ADC_SetAnalogWDThresholds\n
AnnaBridge	189:f392fc9709a3	3041	* TR LT LL_ADC_SetAnalogWDThresholds
AnnaBridge	189:f392fc9709a3	3042	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3043	* @param AWDThresholdsHighLow This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	3044	* @arg @ref LL_ADC_AWD_THRESHOLD_HIGH
AnnaBridge	189:f392fc9709a3	3045	* @arg @ref LL_ADC_AWD_THRESHOLD_LOW
AnnaBridge	189:f392fc9709a3	3046	* @param AWDThresholdValue: Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	189:f392fc9709a3	3047	* @retval None
AnnaBridge	189:f392fc9709a3	3048	*/
AnnaBridge	189:f392fc9709a3	3049	__STATIC_INLINE void LL_ADC_SetAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDThresholdsHighLow, uint32_t AWDThresholdValue)
AnnaBridge	189:f392fc9709a3	3050	{
AnnaBridge	189:f392fc9709a3	3051	/* Parameter "AWDThresholdsHighLow" is used with mask "0x00000010" */
AnnaBridge	189:f392fc9709a3	3052	/* to be equivalent to "POSITION_VAL(AWDThresholdsHighLow)": if threshold */
AnnaBridge	189:f392fc9709a3	3053	/* high is selected, then data is shifted to LSB. Else(threshold low), */
AnnaBridge	189:f392fc9709a3	3054	/* data is not shifted. */
AnnaBridge	189:f392fc9709a3	3055	MODIFY_REG(ADCx->TR,
AnnaBridge	189:f392fc9709a3	3056	AWDThresholdsHighLow,
AnnaBridge	189:f392fc9709a3	3057	AWDThresholdValue << ((AWDThresholdsHighLow >> ADC_TR_HT_BITOFFSET_POS) & ((uint32_t)0x00000010U)));
AnnaBridge	189:f392fc9709a3	3058	}
AnnaBridge	189:f392fc9709a3	3059
AnnaBridge	189:f392fc9709a3	3060	/**
AnnaBridge	189:f392fc9709a3	3061	* @brief Get ADC analog watchdog threshold value of threshold high,
AnnaBridge	189:f392fc9709a3	3062	* threshold low or raw data with ADC thresholds high and low
AnnaBridge	189:f392fc9709a3	3063	* concatenated.
AnnaBridge	189:f392fc9709a3	3064	* @note If raw data with ADC thresholds high and low is retrieved,
AnnaBridge	189:f392fc9709a3	3065	* the data of each threshold high or low can be isolated
AnnaBridge	189:f392fc9709a3	3066	* using helper macro:
AnnaBridge	189:f392fc9709a3	3067	* @ref __LL_ADC_ANALOGWD_THRESHOLDS_HIGH_LOW().
AnnaBridge	189:f392fc9709a3	3068	* @note In case of ADC resolution different of 12 bits,
AnnaBridge	189:f392fc9709a3	3069	* analog watchdog thresholds data require a specific shift.
AnnaBridge	189:f392fc9709a3	3070	* Use helper macro @ref __LL_ADC_ANALOGWD_GET_THRESHOLD_RESOLUTION().
AnnaBridge	189:f392fc9709a3	3071	* @rmtoll TR HT LL_ADC_GetAnalogWDThresholds\n
AnnaBridge	189:f392fc9709a3	3072	* TR LT LL_ADC_GetAnalogWDThresholds
AnnaBridge	189:f392fc9709a3	3073	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3074	* @param AWDThresholdsHighLow This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	3075	* @arg @ref LL_ADC_AWD_THRESHOLD_HIGH
AnnaBridge	189:f392fc9709a3	3076	* @arg @ref LL_ADC_AWD_THRESHOLD_LOW
AnnaBridge	189:f392fc9709a3	3077	* @arg @ref LL_ADC_AWD_THRESHOLDS_HIGH_LOW
AnnaBridge	189:f392fc9709a3	3078	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	189:f392fc9709a3	3079	*/
AnnaBridge	189:f392fc9709a3	3080	__STATIC_INLINE uint32_t LL_ADC_GetAnalogWDThresholds(ADC_TypeDef *ADCx, uint32_t AWDThresholdsHighLow)
AnnaBridge	189:f392fc9709a3	3081	{
AnnaBridge	189:f392fc9709a3	3082	/* Parameter "AWDThresholdsHighLow" is used with mask "0x00000010" */
AnnaBridge	189:f392fc9709a3	3083	/* to be equivalent to "POSITION_VAL(AWDThresholdsHighLow)": if threshold */
AnnaBridge	189:f392fc9709a3	3084	/* high is selected, then data is shifted to LSB. Else(threshold low or */
AnnaBridge	189:f392fc9709a3	3085	/* both thresholds), data is not shifted. */
AnnaBridge	189:f392fc9709a3	3086	return (uint32_t)(READ_BIT(ADCx->TR,
AnnaBridge	189:f392fc9709a3	3087	(AWDThresholdsHighLow \| ADC_TR_LT))
AnnaBridge	189:f392fc9709a3	3088	>> ((~AWDThresholdsHighLow) & ((uint32_t)0x00000010U))
AnnaBridge	189:f392fc9709a3	3089	);
AnnaBridge	189:f392fc9709a3	3090	}
AnnaBridge	189:f392fc9709a3	3091
AnnaBridge	189:f392fc9709a3	3092	/**
AnnaBridge	189:f392fc9709a3	3093	* @}
AnnaBridge	189:f392fc9709a3	3094	*/
AnnaBridge	189:f392fc9709a3	3095
AnnaBridge	189:f392fc9709a3	3096	/** @defgroup ADC_LL_EF_Configuration_ADC_oversampling Configuration of ADC transversal scope: oversampling
AnnaBridge	189:f392fc9709a3	3097	* @{
AnnaBridge	189:f392fc9709a3	3098	*/
AnnaBridge	189:f392fc9709a3	3099
AnnaBridge	189:f392fc9709a3	3100	/**
AnnaBridge	189:f392fc9709a3	3101	* @brief Set ADC oversampling scope.
AnnaBridge	189:f392fc9709a3	3102	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	189:f392fc9709a3	3103	* ADC state:
AnnaBridge	189:f392fc9709a3	3104	* ADC must be disabled or enabled without conversion on going
AnnaBridge	189:f392fc9709a3	3105	* on group regular.
AnnaBridge	189:f392fc9709a3	3106	* @rmtoll CFGR2 OVSE LL_ADC_SetOverSamplingScope
AnnaBridge	189:f392fc9709a3	3107	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3108	* @param OvsScope This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	3109	* @arg @ref LL_ADC_OVS_DISABLE
AnnaBridge	189:f392fc9709a3	3110	* @arg @ref LL_ADC_OVS_GRP_REGULAR_CONTINUED
AnnaBridge	189:f392fc9709a3	3111	* @retval None
AnnaBridge	189:f392fc9709a3	3112	*/
AnnaBridge	189:f392fc9709a3	3113	__STATIC_INLINE void LL_ADC_SetOverSamplingScope(ADC_TypeDef *ADCx, uint32_t OvsScope)
AnnaBridge	189:f392fc9709a3	3114	{
AnnaBridge	189:f392fc9709a3	3115	MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_OVSE, OvsScope);
AnnaBridge	189:f392fc9709a3	3116	}
AnnaBridge	189:f392fc9709a3	3117
AnnaBridge	189:f392fc9709a3	3118	/**
AnnaBridge	189:f392fc9709a3	3119	* @brief Get ADC oversampling scope.
AnnaBridge	189:f392fc9709a3	3120	* @rmtoll CFGR2 OVSE LL_ADC_GetOverSamplingScope
AnnaBridge	189:f392fc9709a3	3121	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3122	* @retval Returned value can be one of the following values:
AnnaBridge	189:f392fc9709a3	3123	* @arg @ref LL_ADC_OVS_DISABLE
AnnaBridge	189:f392fc9709a3	3124	* @arg @ref LL_ADC_OVS_GRP_REGULAR_CONTINUED
AnnaBridge	189:f392fc9709a3	3125	*/
AnnaBridge	189:f392fc9709a3	3126	__STATIC_INLINE uint32_t LL_ADC_GetOverSamplingScope(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3127	{
AnnaBridge	189:f392fc9709a3	3128	return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSE));
AnnaBridge	189:f392fc9709a3	3129	}
AnnaBridge	189:f392fc9709a3	3130
AnnaBridge	189:f392fc9709a3	3131	/**
AnnaBridge	189:f392fc9709a3	3132	* @brief Set ADC oversampling discontinuous mode (triggered mode)
AnnaBridge	189:f392fc9709a3	3133	* on the selected ADC group.
AnnaBridge	189:f392fc9709a3	3134	* @note Number of oversampled conversions are done either in:
AnnaBridge	189:f392fc9709a3	3135	* - continuous mode (all conversions of oversampling ratio
AnnaBridge	189:f392fc9709a3	3136	* are done from 1 trigger)
AnnaBridge	189:f392fc9709a3	3137	* - discontinuous mode (each conversion of oversampling ratio
AnnaBridge	189:f392fc9709a3	3138	* needs a trigger)
AnnaBridge	189:f392fc9709a3	3139	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	189:f392fc9709a3	3140	* ADC state:
AnnaBridge	189:f392fc9709a3	3141	* ADC must be disabled or enabled without conversion on going
AnnaBridge	189:f392fc9709a3	3142	* on group regular.
AnnaBridge	189:f392fc9709a3	3143	* @rmtoll CFGR2 TOVS LL_ADC_SetOverSamplingDiscont
AnnaBridge	189:f392fc9709a3	3144	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3145	* @param OverSamplingDiscont This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	3146	* @arg @ref LL_ADC_OVS_REG_CONT
AnnaBridge	189:f392fc9709a3	3147	* @arg @ref LL_ADC_OVS_REG_DISCONT
AnnaBridge	189:f392fc9709a3	3148	* @retval None
AnnaBridge	189:f392fc9709a3	3149	*/
AnnaBridge	189:f392fc9709a3	3150	__STATIC_INLINE void LL_ADC_SetOverSamplingDiscont(ADC_TypeDef *ADCx, uint32_t OverSamplingDiscont)
AnnaBridge	189:f392fc9709a3	3151	{
AnnaBridge	189:f392fc9709a3	3152	MODIFY_REG(ADCx->CFGR2, ADC_CFGR2_TOVS, OverSamplingDiscont);
AnnaBridge	189:f392fc9709a3	3153	}
AnnaBridge	189:f392fc9709a3	3154
AnnaBridge	189:f392fc9709a3	3155	/**
AnnaBridge	189:f392fc9709a3	3156	* @brief Get ADC oversampling discontinuous mode (triggered mode)
AnnaBridge	189:f392fc9709a3	3157	* on the selected ADC group.
AnnaBridge	189:f392fc9709a3	3158	* @note Number of oversampled conversions are done either in:
AnnaBridge	189:f392fc9709a3	3159	* - continuous mode (all conversions of oversampling ratio
AnnaBridge	189:f392fc9709a3	3160	* are done from 1 trigger)
AnnaBridge	189:f392fc9709a3	3161	* - discontinuous mode (each conversion of oversampling ratio
AnnaBridge	189:f392fc9709a3	3162	* needs a trigger)
AnnaBridge	189:f392fc9709a3	3163	* @rmtoll CFGR2 TOVS LL_ADC_GetOverSamplingDiscont
AnnaBridge	189:f392fc9709a3	3164	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3165	* @retval Returned value can be one of the following values:
AnnaBridge	189:f392fc9709a3	3166	* @arg @ref LL_ADC_OVS_REG_CONT
AnnaBridge	189:f392fc9709a3	3167	* @arg @ref LL_ADC_OVS_REG_DISCONT
AnnaBridge	189:f392fc9709a3	3168	*/
AnnaBridge	189:f392fc9709a3	3169	__STATIC_INLINE uint32_t LL_ADC_GetOverSamplingDiscont(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3170	{
AnnaBridge	189:f392fc9709a3	3171	return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_TOVS));
AnnaBridge	189:f392fc9709a3	3172	}
AnnaBridge	189:f392fc9709a3	3173
AnnaBridge	189:f392fc9709a3	3174	/**
AnnaBridge	189:f392fc9709a3	3175	* @brief Set ADC oversampling
AnnaBridge	189:f392fc9709a3	3176	* @note This function set the 2 items of oversampling configuration:
AnnaBridge	189:f392fc9709a3	3177	* - ratio
AnnaBridge	189:f392fc9709a3	3178	* - shift
AnnaBridge	189:f392fc9709a3	3179	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	189:f392fc9709a3	3180	* ADC state:
AnnaBridge	189:f392fc9709a3	3181	* ADC must be disabled or enabled without conversion on going
AnnaBridge	189:f392fc9709a3	3182	* on group regular.
AnnaBridge	189:f392fc9709a3	3183	* @rmtoll CFGR2 OVSS LL_ADC_ConfigOverSamplingRatioShift\n
AnnaBridge	189:f392fc9709a3	3184	* CFGR2 OVSR LL_ADC_ConfigOverSamplingRatioShift
AnnaBridge	189:f392fc9709a3	3185	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3186	* @param Ratio This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	3187	* @arg @ref LL_ADC_OVS_RATIO_2
AnnaBridge	189:f392fc9709a3	3188	* @arg @ref LL_ADC_OVS_RATIO_4
AnnaBridge	189:f392fc9709a3	3189	* @arg @ref LL_ADC_OVS_RATIO_8
AnnaBridge	189:f392fc9709a3	3190	* @arg @ref LL_ADC_OVS_RATIO_16
AnnaBridge	189:f392fc9709a3	3191	* @arg @ref LL_ADC_OVS_RATIO_32
AnnaBridge	189:f392fc9709a3	3192	* @arg @ref LL_ADC_OVS_RATIO_64
AnnaBridge	189:f392fc9709a3	3193	* @arg @ref LL_ADC_OVS_RATIO_128
AnnaBridge	189:f392fc9709a3	3194	* @arg @ref LL_ADC_OVS_RATIO_256
AnnaBridge	189:f392fc9709a3	3195	* @param Shift This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	3196	* @arg @ref LL_ADC_OVS_SHIFT_NONE
AnnaBridge	189:f392fc9709a3	3197	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_1
AnnaBridge	189:f392fc9709a3	3198	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_2
AnnaBridge	189:f392fc9709a3	3199	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_3
AnnaBridge	189:f392fc9709a3	3200	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_4
AnnaBridge	189:f392fc9709a3	3201	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_5
AnnaBridge	189:f392fc9709a3	3202	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_6
AnnaBridge	189:f392fc9709a3	3203	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_7
AnnaBridge	189:f392fc9709a3	3204	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_8
AnnaBridge	189:f392fc9709a3	3205	* @retval None
AnnaBridge	189:f392fc9709a3	3206	*/
AnnaBridge	189:f392fc9709a3	3207	__STATIC_INLINE void LL_ADC_ConfigOverSamplingRatioShift(ADC_TypeDef *ADCx, uint32_t Ratio, uint32_t Shift)
AnnaBridge	189:f392fc9709a3	3208	{
AnnaBridge	189:f392fc9709a3	3209	MODIFY_REG(ADCx->CFGR2, (ADC_CFGR2_OVSS \| ADC_CFGR2_OVSR), (Shift \| Ratio));
AnnaBridge	189:f392fc9709a3	3210	}
AnnaBridge	189:f392fc9709a3	3211
AnnaBridge	189:f392fc9709a3	3212	/**
AnnaBridge	189:f392fc9709a3	3213	* @brief Get ADC oversampling ratio
AnnaBridge	189:f392fc9709a3	3214	* @rmtoll CFGR2 OVSR LL_ADC_GetOverSamplingRatio
AnnaBridge	189:f392fc9709a3	3215	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3216	* @retval Ratio This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	3217	* @arg @ref LL_ADC_OVS_RATIO_2
AnnaBridge	189:f392fc9709a3	3218	* @arg @ref LL_ADC_OVS_RATIO_4
AnnaBridge	189:f392fc9709a3	3219	* @arg @ref LL_ADC_OVS_RATIO_8
AnnaBridge	189:f392fc9709a3	3220	* @arg @ref LL_ADC_OVS_RATIO_16
AnnaBridge	189:f392fc9709a3	3221	* @arg @ref LL_ADC_OVS_RATIO_32
AnnaBridge	189:f392fc9709a3	3222	* @arg @ref LL_ADC_OVS_RATIO_64
AnnaBridge	189:f392fc9709a3	3223	* @arg @ref LL_ADC_OVS_RATIO_128
AnnaBridge	189:f392fc9709a3	3224	* @arg @ref LL_ADC_OVS_RATIO_256
AnnaBridge	189:f392fc9709a3	3225	*/
AnnaBridge	189:f392fc9709a3	3226	__STATIC_INLINE uint32_t LL_ADC_GetOverSamplingRatio(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3227	{
AnnaBridge	189:f392fc9709a3	3228	return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSR));
AnnaBridge	189:f392fc9709a3	3229	}
AnnaBridge	189:f392fc9709a3	3230
AnnaBridge	189:f392fc9709a3	3231	/**
AnnaBridge	189:f392fc9709a3	3232	* @brief Get ADC oversampling shift
AnnaBridge	189:f392fc9709a3	3233	* @rmtoll CFGR2 OVSS LL_ADC_GetOverSamplingShift
AnnaBridge	189:f392fc9709a3	3234	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3235	* @retval Shift This parameter can be one of the following values:
AnnaBridge	189:f392fc9709a3	3236	* @arg @ref LL_ADC_OVS_SHIFT_NONE
AnnaBridge	189:f392fc9709a3	3237	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_1
AnnaBridge	189:f392fc9709a3	3238	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_2
AnnaBridge	189:f392fc9709a3	3239	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_3
AnnaBridge	189:f392fc9709a3	3240	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_4
AnnaBridge	189:f392fc9709a3	3241	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_5
AnnaBridge	189:f392fc9709a3	3242	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_6
AnnaBridge	189:f392fc9709a3	3243	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_7
AnnaBridge	189:f392fc9709a3	3244	* @arg @ref LL_ADC_OVS_SHIFT_RIGHT_8
AnnaBridge	189:f392fc9709a3	3245	*/
AnnaBridge	189:f392fc9709a3	3246	__STATIC_INLINE uint32_t LL_ADC_GetOverSamplingShift(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3247	{
AnnaBridge	189:f392fc9709a3	3248	return (uint32_t)(READ_BIT(ADCx->CFGR2, ADC_CFGR2_OVSS));
AnnaBridge	189:f392fc9709a3	3249	}
AnnaBridge	189:f392fc9709a3	3250
AnnaBridge	189:f392fc9709a3	3251	/**
AnnaBridge	189:f392fc9709a3	3252	* @}
AnnaBridge	189:f392fc9709a3	3253	*/
AnnaBridge	189:f392fc9709a3	3254
AnnaBridge	189:f392fc9709a3	3255	/** @defgroup ADC_LL_EF_Operation_ADC_Instance Operation on ADC hierarchical scope: ADC instance
AnnaBridge	189:f392fc9709a3	3256	* @{
AnnaBridge	189:f392fc9709a3	3257	*/
AnnaBridge	189:f392fc9709a3	3258
AnnaBridge	189:f392fc9709a3	3259	/**
AnnaBridge	189:f392fc9709a3	3260	* @brief Enable ADC instance internal voltage regulator.
AnnaBridge	189:f392fc9709a3	3261	* @note On this STM32 serie, there are three possibilities to enable
AnnaBridge	189:f392fc9709a3	3262	* the voltage regulator:
AnnaBridge	189:f392fc9709a3	3263	* - by enabling it manually
AnnaBridge	189:f392fc9709a3	3264	* using function @ref LL_ADC_EnableInternalRegulator().
AnnaBridge	189:f392fc9709a3	3265	* - by launching a calibration
AnnaBridge	189:f392fc9709a3	3266	* using function @ref LL_ADC_StartCalibration().
AnnaBridge	189:f392fc9709a3	3267	* - by enabling the ADC
AnnaBridge	189:f392fc9709a3	3268	* using function @ref LL_ADC_Enable().
AnnaBridge	189:f392fc9709a3	3269	* @note On this STM32 serie, after ADC internal voltage regulator enable,
AnnaBridge	189:f392fc9709a3	3270	* a delay for ADC internal voltage regulator stabilization
AnnaBridge	189:f392fc9709a3	3271	* is required before performing a ADC calibration or ADC enable.
AnnaBridge	189:f392fc9709a3	3272	* Refer to device datasheet, parameter "tUP_LDO".
AnnaBridge	189:f392fc9709a3	3273	* Refer to literal @ref LL_ADC_DELAY_INTERNAL_REGUL_STAB_US.
AnnaBridge	189:f392fc9709a3	3274	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	189:f392fc9709a3	3275	* ADC state:
AnnaBridge	189:f392fc9709a3	3276	* ADC must be ADC disabled.
AnnaBridge	189:f392fc9709a3	3277	* @rmtoll CR ADVREGEN LL_ADC_EnableInternalRegulator
AnnaBridge	189:f392fc9709a3	3278	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3279	* @retval None
AnnaBridge	189:f392fc9709a3	3280	*/
AnnaBridge	189:f392fc9709a3	3281	__STATIC_INLINE void LL_ADC_EnableInternalRegulator(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3282	{
AnnaBridge	189:f392fc9709a3	3283	/* Note: Write register with some additional bits forced to state reset */
AnnaBridge	189:f392fc9709a3	3284	/* instead of modifying only the selected bit for this function, */
AnnaBridge	189:f392fc9709a3	3285	/* to not interfere with bits with HW property "rs". */
AnnaBridge	189:f392fc9709a3	3286	MODIFY_REG(ADCx->CR,
AnnaBridge	189:f392fc9709a3	3287	ADC_CR_BITS_PROPERTY_RS,
AnnaBridge	189:f392fc9709a3	3288	ADC_CR_ADVREGEN);
AnnaBridge	189:f392fc9709a3	3289	}
AnnaBridge	189:f392fc9709a3	3290
AnnaBridge	189:f392fc9709a3	3291	/**
AnnaBridge	189:f392fc9709a3	3292	* @brief Disable ADC internal voltage regulator.
AnnaBridge	189:f392fc9709a3	3293	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	189:f392fc9709a3	3294	* ADC state:
AnnaBridge	189:f392fc9709a3	3295	* ADC must be ADC disabled.
AnnaBridge	189:f392fc9709a3	3296	* @rmtoll CR ADVREGEN LL_ADC_DisableInternalRegulator
AnnaBridge	189:f392fc9709a3	3297	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3298	* @retval None
AnnaBridge	189:f392fc9709a3	3299	*/
AnnaBridge	189:f392fc9709a3	3300	__STATIC_INLINE void LL_ADC_DisableInternalRegulator(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3301	{
AnnaBridge	189:f392fc9709a3	3302	CLEAR_BIT(ADCx->CR, (ADC_CR_ADVREGEN \| ADC_CR_BITS_PROPERTY_RS));
AnnaBridge	189:f392fc9709a3	3303	}
AnnaBridge	189:f392fc9709a3	3304
AnnaBridge	189:f392fc9709a3	3305	/**
AnnaBridge	189:f392fc9709a3	3306	* @brief Get the selected ADC instance internal voltage regulator state.
AnnaBridge	189:f392fc9709a3	3307	* @rmtoll CR ADVREGEN LL_ADC_IsInternalRegulatorEnabled
AnnaBridge	189:f392fc9709a3	3308	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3309	* @retval 0: internal regulator is disabled, 1: internal regulator is enabled.
AnnaBridge	189:f392fc9709a3	3310	*/
AnnaBridge	189:f392fc9709a3	3311	__STATIC_INLINE uint32_t LL_ADC_IsInternalRegulatorEnabled(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3312	{
AnnaBridge	189:f392fc9709a3	3313	return (READ_BIT(ADCx->CR, ADC_CR_ADVREGEN) == (ADC_CR_ADVREGEN));
AnnaBridge	189:f392fc9709a3	3314	}
AnnaBridge	189:f392fc9709a3	3315
AnnaBridge	189:f392fc9709a3	3316	/**
AnnaBridge	189:f392fc9709a3	3317	* @brief Enable the selected ADC instance.
AnnaBridge	189:f392fc9709a3	3318	* @note On this STM32 serie, after ADC enable, a delay for
AnnaBridge	189:f392fc9709a3	3319	* ADC internal analog stabilization is required before performing a
AnnaBridge	189:f392fc9709a3	3320	* ADC conversion start.
AnnaBridge	189:f392fc9709a3	3321	* Refer to device datasheet, parameter tSTAB.
AnnaBridge	189:f392fc9709a3	3322	* @note On this STM32 serie, flag LL_ADC_FLAG_ADRDY is raised when the ADC
AnnaBridge	189:f392fc9709a3	3323	* is enabled and when conversion clock is active.
AnnaBridge	189:f392fc9709a3	3324	* (not only core clock: this ADC has a dual clock domain)
AnnaBridge	189:f392fc9709a3	3325	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	189:f392fc9709a3	3326	* ADC state:
AnnaBridge	189:f392fc9709a3	3327	* ADC must be ADC disabled and ADC internal voltage regulator enabled.
AnnaBridge	189:f392fc9709a3	3328	* @rmtoll CR ADEN LL_ADC_Enable
AnnaBridge	189:f392fc9709a3	3329	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3330	* @retval None
AnnaBridge	189:f392fc9709a3	3331	*/
AnnaBridge	189:f392fc9709a3	3332	__STATIC_INLINE void LL_ADC_Enable(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3333	{
AnnaBridge	189:f392fc9709a3	3334	/* Note: Write register with some additional bits forced to state reset */
AnnaBridge	189:f392fc9709a3	3335	/* instead of modifying only the selected bit for this function, */
AnnaBridge	189:f392fc9709a3	3336	/* to not interfere with bits with HW property "rs". */
AnnaBridge	189:f392fc9709a3	3337	MODIFY_REG(ADCx->CR,
AnnaBridge	189:f392fc9709a3	3338	ADC_CR_BITS_PROPERTY_RS,
AnnaBridge	189:f392fc9709a3	3339	ADC_CR_ADEN);
AnnaBridge	189:f392fc9709a3	3340	}
AnnaBridge	189:f392fc9709a3	3341
AnnaBridge	189:f392fc9709a3	3342	/**
AnnaBridge	189:f392fc9709a3	3343	* @brief Disable the selected ADC instance.
AnnaBridge	189:f392fc9709a3	3344	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	189:f392fc9709a3	3345	* ADC state:
AnnaBridge	189:f392fc9709a3	3346	* ADC must be not disabled. Must be enabled without conversion on going
AnnaBridge	189:f392fc9709a3	3347	* on group regular.
AnnaBridge	189:f392fc9709a3	3348	* @rmtoll CR ADDIS LL_ADC_Disable
AnnaBridge	189:f392fc9709a3	3349	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3350	* @retval None
AnnaBridge	189:f392fc9709a3	3351	*/
AnnaBridge	189:f392fc9709a3	3352	__STATIC_INLINE void LL_ADC_Disable(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3353	{
AnnaBridge	189:f392fc9709a3	3354	/* Note: Write register with some additional bits forced to state reset */
AnnaBridge	189:f392fc9709a3	3355	/* instead of modifying only the selected bit for this function, */
AnnaBridge	189:f392fc9709a3	3356	/* to not interfere with bits with HW property "rs". */
AnnaBridge	189:f392fc9709a3	3357	MODIFY_REG(ADCx->CR,
AnnaBridge	189:f392fc9709a3	3358	ADC_CR_BITS_PROPERTY_RS,
AnnaBridge	189:f392fc9709a3	3359	ADC_CR_ADDIS);
AnnaBridge	189:f392fc9709a3	3360	}
AnnaBridge	189:f392fc9709a3	3361
AnnaBridge	189:f392fc9709a3	3362	/**
AnnaBridge	189:f392fc9709a3	3363	* @brief Get the selected ADC instance enable state.
AnnaBridge	189:f392fc9709a3	3364	* @note On this STM32 serie, flag LL_ADC_FLAG_ADRDY is raised when the ADC
AnnaBridge	189:f392fc9709a3	3365	* is enabled and when conversion clock is active.
AnnaBridge	189:f392fc9709a3	3366	* (not only core clock: this ADC has a dual clock domain)
AnnaBridge	189:f392fc9709a3	3367	* @rmtoll CR ADEN LL_ADC_IsEnabled
AnnaBridge	189:f392fc9709a3	3368	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3369	* @retval 0: ADC is disabled, 1: ADC is enabled.
AnnaBridge	189:f392fc9709a3	3370	*/
AnnaBridge	189:f392fc9709a3	3371	__STATIC_INLINE uint32_t LL_ADC_IsEnabled(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3372	{
AnnaBridge	189:f392fc9709a3	3373	return (READ_BIT(ADCx->CR, ADC_CR_ADEN) == (ADC_CR_ADEN));
AnnaBridge	189:f392fc9709a3	3374	}
AnnaBridge	189:f392fc9709a3	3375
AnnaBridge	189:f392fc9709a3	3376	/**
AnnaBridge	189:f392fc9709a3	3377	* @brief Get the selected ADC instance disable state.
AnnaBridge	189:f392fc9709a3	3378	* @rmtoll CR ADDIS LL_ADC_IsDisableOngoing
AnnaBridge	189:f392fc9709a3	3379	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3380	* @retval 0: no ADC disable command on going.
AnnaBridge	189:f392fc9709a3	3381	*/
AnnaBridge	189:f392fc9709a3	3382	__STATIC_INLINE uint32_t LL_ADC_IsDisableOngoing(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3383	{
AnnaBridge	189:f392fc9709a3	3384	return (READ_BIT(ADCx->CR, ADC_CR_ADDIS) == (ADC_CR_ADDIS));
AnnaBridge	189:f392fc9709a3	3385	}
AnnaBridge	189:f392fc9709a3	3386
AnnaBridge	189:f392fc9709a3	3387	/**
AnnaBridge	189:f392fc9709a3	3388	* @brief Start ADC calibration in the mode single-ended
AnnaBridge	189:f392fc9709a3	3389	* or differential (for devices with differential mode available).
AnnaBridge	189:f392fc9709a3	3390	* @note On this STM32 serie, a minimum number of ADC clock cycles
AnnaBridge	189:f392fc9709a3	3391	* are required between ADC end of calibration and ADC enable.
AnnaBridge	189:f392fc9709a3	3392	* Refer to literal @ref LL_ADC_DELAY_CALIB_ENABLE_ADC_CYCLES.
AnnaBridge	189:f392fc9709a3	3393	* @note In case of usage of ADC with DMA transfer:
AnnaBridge	189:f392fc9709a3	3394	* On this STM32 serie, ADC DMA transfer request should be disabled
AnnaBridge	189:f392fc9709a3	3395	* during calibration:
AnnaBridge	189:f392fc9709a3	3396	* Calibration factor is available in data register
AnnaBridge	189:f392fc9709a3	3397	* and also transfered by DMA.
AnnaBridge	189:f392fc9709a3	3398	* To not insert ADC calibration factor among ADC conversion data
AnnaBridge	189:f392fc9709a3	3399	* in array variable, DMA transfer must be disabled during
AnnaBridge	189:f392fc9709a3	3400	* calibration.
AnnaBridge	189:f392fc9709a3	3401	* (DMA transfer setting backup and disable before calibration,
AnnaBridge	189:f392fc9709a3	3402	* DMA transfer setting restore after calibration.
AnnaBridge	189:f392fc9709a3	3403	* Refer to functions @ref LL_ADC_REG_GetDMATransfer(),
AnnaBridge	189:f392fc9709a3	3404	* @ref LL_ADC_REG_SetDMATransfer() ).
AnnaBridge	189:f392fc9709a3	3405	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	189:f392fc9709a3	3406	* ADC state:
AnnaBridge	189:f392fc9709a3	3407	* ADC must be ADC disabled.
AnnaBridge	189:f392fc9709a3	3408	* @rmtoll CR ADCAL LL_ADC_StartCalibration
AnnaBridge	189:f392fc9709a3	3409	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3410	* @retval None
AnnaBridge	189:f392fc9709a3	3411	*/
AnnaBridge	189:f392fc9709a3	3412	__STATIC_INLINE void LL_ADC_StartCalibration(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3413	{
AnnaBridge	189:f392fc9709a3	3414	/* Note: Write register with some additional bits forced to state reset */
AnnaBridge	189:f392fc9709a3	3415	/* instead of modifying only the selected bit for this function, */
AnnaBridge	189:f392fc9709a3	3416	/* to not interfere with bits with HW property "rs". */
AnnaBridge	189:f392fc9709a3	3417	MODIFY_REG(ADCx->CR,
AnnaBridge	189:f392fc9709a3	3418	ADC_CR_BITS_PROPERTY_RS,
AnnaBridge	189:f392fc9709a3	3419	ADC_CR_ADCAL);
AnnaBridge	189:f392fc9709a3	3420	}
AnnaBridge	189:f392fc9709a3	3421
AnnaBridge	189:f392fc9709a3	3422	/**
AnnaBridge	189:f392fc9709a3	3423	* @brief Get ADC calibration state.
AnnaBridge	189:f392fc9709a3	3424	* @rmtoll CR ADCAL LL_ADC_IsCalibrationOnGoing
AnnaBridge	189:f392fc9709a3	3425	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3426	* @retval 0: calibration complete, 1: calibration in progress.
AnnaBridge	189:f392fc9709a3	3427	*/
AnnaBridge	189:f392fc9709a3	3428	__STATIC_INLINE uint32_t LL_ADC_IsCalibrationOnGoing(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3429	{
AnnaBridge	189:f392fc9709a3	3430	return (READ_BIT(ADCx->CR, ADC_CR_ADCAL) == (ADC_CR_ADCAL));
AnnaBridge	189:f392fc9709a3	3431	}
AnnaBridge	189:f392fc9709a3	3432
AnnaBridge	189:f392fc9709a3	3433	/**
AnnaBridge	189:f392fc9709a3	3434	* @}
AnnaBridge	189:f392fc9709a3	3435	*/
AnnaBridge	189:f392fc9709a3	3436
AnnaBridge	189:f392fc9709a3	3437	/** @defgroup ADC_LL_EF_Operation_ADC_Group_Regular Operation on ADC hierarchical scope: group regular
AnnaBridge	189:f392fc9709a3	3438	* @{
AnnaBridge	189:f392fc9709a3	3439	*/
AnnaBridge	189:f392fc9709a3	3440
AnnaBridge	189:f392fc9709a3	3441	/**
AnnaBridge	189:f392fc9709a3	3442	* @brief Start ADC group regular conversion.
AnnaBridge	189:f392fc9709a3	3443	* @note On this STM32 serie, this function is relevant for both
AnnaBridge	189:f392fc9709a3	3444	* internal trigger (SW start) and external trigger:
AnnaBridge	189:f392fc9709a3	3445	* - If ADC trigger has been set to software start, ADC conversion
AnnaBridge	189:f392fc9709a3	3446	* starts immediately.
AnnaBridge	189:f392fc9709a3	3447	* - If ADC trigger has been set to external trigger, ADC conversion
AnnaBridge	189:f392fc9709a3	3448	* will start at next trigger event (on the selected trigger edge)
AnnaBridge	189:f392fc9709a3	3449	* following the ADC start conversion command.
AnnaBridge	189:f392fc9709a3	3450	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	189:f392fc9709a3	3451	* ADC state:
AnnaBridge	189:f392fc9709a3	3452	* ADC must be enabled without conversion on going on group regular,
AnnaBridge	189:f392fc9709a3	3453	* without conversion stop command on going on group regular,
AnnaBridge	189:f392fc9709a3	3454	* without ADC disable command on going.
AnnaBridge	189:f392fc9709a3	3455	* @rmtoll CR ADSTART LL_ADC_REG_StartConversion
AnnaBridge	189:f392fc9709a3	3456	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3457	* @retval None
AnnaBridge	189:f392fc9709a3	3458	*/
AnnaBridge	189:f392fc9709a3	3459	__STATIC_INLINE void LL_ADC_REG_StartConversion(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3460	{
AnnaBridge	189:f392fc9709a3	3461	/* Note: Write register with some additional bits forced to state reset */
AnnaBridge	189:f392fc9709a3	3462	/* instead of modifying only the selected bit for this function, */
AnnaBridge	189:f392fc9709a3	3463	/* to not interfere with bits with HW property "rs". */
AnnaBridge	189:f392fc9709a3	3464	MODIFY_REG(ADCx->CR,
AnnaBridge	189:f392fc9709a3	3465	ADC_CR_BITS_PROPERTY_RS,
AnnaBridge	189:f392fc9709a3	3466	ADC_CR_ADSTART);
AnnaBridge	189:f392fc9709a3	3467	}
AnnaBridge	189:f392fc9709a3	3468
AnnaBridge	189:f392fc9709a3	3469	/**
AnnaBridge	189:f392fc9709a3	3470	* @brief Stop ADC group regular conversion.
AnnaBridge	189:f392fc9709a3	3471	* @note On this STM32 serie, setting of this feature is conditioned to
AnnaBridge	189:f392fc9709a3	3472	* ADC state:
AnnaBridge	189:f392fc9709a3	3473	* ADC must be enabled with conversion on going on group regular,
AnnaBridge	189:f392fc9709a3	3474	* without ADC disable command on going.
AnnaBridge	189:f392fc9709a3	3475	* @rmtoll CR ADSTP LL_ADC_REG_StopConversion
AnnaBridge	189:f392fc9709a3	3476	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3477	* @retval None
AnnaBridge	189:f392fc9709a3	3478	*/
AnnaBridge	189:f392fc9709a3	3479	__STATIC_INLINE void LL_ADC_REG_StopConversion(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3480	{
AnnaBridge	189:f392fc9709a3	3481	/* Note: Write register with some additional bits forced to state reset */
AnnaBridge	189:f392fc9709a3	3482	/* instead of modifying only the selected bit for this function, */
AnnaBridge	189:f392fc9709a3	3483	/* to not interfere with bits with HW property "rs". */
AnnaBridge	189:f392fc9709a3	3484	MODIFY_REG(ADCx->CR,
AnnaBridge	189:f392fc9709a3	3485	ADC_CR_BITS_PROPERTY_RS,
AnnaBridge	189:f392fc9709a3	3486	ADC_CR_ADSTP);
AnnaBridge	189:f392fc9709a3	3487	}
AnnaBridge	189:f392fc9709a3	3488
AnnaBridge	189:f392fc9709a3	3489	/**
AnnaBridge	189:f392fc9709a3	3490	* @brief Get ADC group regular conversion state.
AnnaBridge	189:f392fc9709a3	3491	* @rmtoll CR ADSTART LL_ADC_REG_IsConversionOngoing
AnnaBridge	189:f392fc9709a3	3492	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3493	* @retval 0: no conversion is on going on ADC group regular.
AnnaBridge	189:f392fc9709a3	3494	*/
AnnaBridge	189:f392fc9709a3	3495	__STATIC_INLINE uint32_t LL_ADC_REG_IsConversionOngoing(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3496	{
AnnaBridge	189:f392fc9709a3	3497	return (READ_BIT(ADCx->CR, ADC_CR_ADSTART) == (ADC_CR_ADSTART));
AnnaBridge	189:f392fc9709a3	3498	}
AnnaBridge	189:f392fc9709a3	3499
AnnaBridge	189:f392fc9709a3	3500	/**
AnnaBridge	189:f392fc9709a3	3501	* @brief Get ADC group regular command of conversion stop state
AnnaBridge	189:f392fc9709a3	3502	* @rmtoll CR ADSTP LL_ADC_REG_IsStopConversionOngoing
AnnaBridge	189:f392fc9709a3	3503	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3504	* @retval 0: no command of conversion stop is on going on ADC group regular.
AnnaBridge	189:f392fc9709a3	3505	*/
AnnaBridge	189:f392fc9709a3	3506	__STATIC_INLINE uint32_t LL_ADC_REG_IsStopConversionOngoing(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3507	{
AnnaBridge	189:f392fc9709a3	3508	return (READ_BIT(ADCx->CR, ADC_CR_ADSTP) == (ADC_CR_ADSTP));
AnnaBridge	189:f392fc9709a3	3509	}
AnnaBridge	189:f392fc9709a3	3510
AnnaBridge	189:f392fc9709a3	3511	/**
AnnaBridge	189:f392fc9709a3	3512	* @brief Get ADC group regular conversion data, range fit for
AnnaBridge	189:f392fc9709a3	3513	* all ADC configurations: all ADC resolutions and
AnnaBridge	189:f392fc9709a3	3514	* all oversampling increased data width (for devices
AnnaBridge	189:f392fc9709a3	3515	* with feature oversampling).
AnnaBridge	189:f392fc9709a3	3516	* @rmtoll DR DATA LL_ADC_REG_ReadConversionData32
AnnaBridge	189:f392fc9709a3	3517	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3518	* @retval Value between Min_Data=0x00000000 and Max_Data=0xFFFFFFFF
AnnaBridge	189:f392fc9709a3	3519	*/
AnnaBridge	189:f392fc9709a3	3520	__STATIC_INLINE uint32_t LL_ADC_REG_ReadConversionData32(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3521	{
AnnaBridge	189:f392fc9709a3	3522	return (uint32_t)(READ_BIT(ADCx->DR, ADC_DR_DATA));
AnnaBridge	189:f392fc9709a3	3523	}
AnnaBridge	189:f392fc9709a3	3524
AnnaBridge	189:f392fc9709a3	3525	/**
AnnaBridge	189:f392fc9709a3	3526	* @brief Get ADC group regular conversion data, range fit for
AnnaBridge	189:f392fc9709a3	3527	* ADC resolution 12 bits.
AnnaBridge	189:f392fc9709a3	3528	* @note For devices with feature oversampling: Oversampling
AnnaBridge	189:f392fc9709a3	3529	* can increase data width, function for extended range
AnnaBridge	189:f392fc9709a3	3530	* may be needed: @ref LL_ADC_REG_ReadConversionData32.
AnnaBridge	189:f392fc9709a3	3531	* @rmtoll DR DATA LL_ADC_REG_ReadConversionData12
AnnaBridge	189:f392fc9709a3	3532	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3533	* @retval Value between Min_Data=0x000 and Max_Data=0xFFF
AnnaBridge	189:f392fc9709a3	3534	*/
AnnaBridge	189:f392fc9709a3	3535	__STATIC_INLINE uint16_t LL_ADC_REG_ReadConversionData12(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3536	{
AnnaBridge	189:f392fc9709a3	3537	return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_DATA));
AnnaBridge	189:f392fc9709a3	3538	}
AnnaBridge	189:f392fc9709a3	3539
AnnaBridge	189:f392fc9709a3	3540	/**
AnnaBridge	189:f392fc9709a3	3541	* @brief Get ADC group regular conversion data, range fit for
AnnaBridge	189:f392fc9709a3	3542	* ADC resolution 10 bits.
AnnaBridge	189:f392fc9709a3	3543	* @note For devices with feature oversampling: Oversampling
AnnaBridge	189:f392fc9709a3	3544	* can increase data width, function for extended range
AnnaBridge	189:f392fc9709a3	3545	* may be needed: @ref LL_ADC_REG_ReadConversionData32.
AnnaBridge	189:f392fc9709a3	3546	* @rmtoll DR DATA LL_ADC_REG_ReadConversionData10
AnnaBridge	189:f392fc9709a3	3547	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3548	* @retval Value between Min_Data=0x000 and Max_Data=0x3FF
AnnaBridge	189:f392fc9709a3	3549	*/
AnnaBridge	189:f392fc9709a3	3550	__STATIC_INLINE uint16_t LL_ADC_REG_ReadConversionData10(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3551	{
AnnaBridge	189:f392fc9709a3	3552	return (uint16_t)(READ_BIT(ADCx->DR, ADC_DR_DATA));
AnnaBridge	189:f392fc9709a3	3553	}
AnnaBridge	189:f392fc9709a3	3554
AnnaBridge	189:f392fc9709a3	3555	/**
AnnaBridge	189:f392fc9709a3	3556	* @brief Get ADC group regular conversion data, range fit for
AnnaBridge	189:f392fc9709a3	3557	* ADC resolution 8 bits.
AnnaBridge	189:f392fc9709a3	3558	* @note For devices with feature oversampling: Oversampling
AnnaBridge	189:f392fc9709a3	3559	* can increase data width, function for extended range
AnnaBridge	189:f392fc9709a3	3560	* may be needed: @ref LL_ADC_REG_ReadConversionData32.
AnnaBridge	189:f392fc9709a3	3561	* @rmtoll DR DATA LL_ADC_REG_ReadConversionData8
AnnaBridge	189:f392fc9709a3	3562	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3563	* @retval Value between Min_Data=0x00 and Max_Data=0xFF
AnnaBridge	189:f392fc9709a3	3564	*/
AnnaBridge	189:f392fc9709a3	3565	__STATIC_INLINE uint8_t LL_ADC_REG_ReadConversionData8(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3566	{
AnnaBridge	189:f392fc9709a3	3567	return (uint8_t)(READ_BIT(ADCx->DR, ADC_DR_DATA));
AnnaBridge	189:f392fc9709a3	3568	}
AnnaBridge	189:f392fc9709a3	3569
AnnaBridge	189:f392fc9709a3	3570	/**
AnnaBridge	189:f392fc9709a3	3571	* @brief Get ADC group regular conversion data, range fit for
AnnaBridge	189:f392fc9709a3	3572	* ADC resolution 6 bits.
AnnaBridge	189:f392fc9709a3	3573	* @note For devices with feature oversampling: Oversampling
AnnaBridge	189:f392fc9709a3	3574	* can increase data width, function for extended range
AnnaBridge	189:f392fc9709a3	3575	* may be needed: @ref LL_ADC_REG_ReadConversionData32.
AnnaBridge	189:f392fc9709a3	3576	* @rmtoll DR DATA LL_ADC_REG_ReadConversionData6
AnnaBridge	189:f392fc9709a3	3577	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3578	* @retval Value between Min_Data=0x00 and Max_Data=0x3F
AnnaBridge	189:f392fc9709a3	3579	*/
AnnaBridge	189:f392fc9709a3	3580	__STATIC_INLINE uint8_t LL_ADC_REG_ReadConversionData6(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3581	{
AnnaBridge	189:f392fc9709a3	3582	return (uint8_t)(READ_BIT(ADCx->DR, ADC_DR_DATA));
AnnaBridge	189:f392fc9709a3	3583	}
AnnaBridge	189:f392fc9709a3	3584
AnnaBridge	189:f392fc9709a3	3585	/**
AnnaBridge	189:f392fc9709a3	3586	* @}
AnnaBridge	189:f392fc9709a3	3587	*/
AnnaBridge	189:f392fc9709a3	3588
AnnaBridge	189:f392fc9709a3	3589	/** @defgroup ADC_LL_EF_FLAG_Management ADC flag management
AnnaBridge	189:f392fc9709a3	3590	* @{
AnnaBridge	189:f392fc9709a3	3591	*/
AnnaBridge	189:f392fc9709a3	3592
AnnaBridge	189:f392fc9709a3	3593	/**
AnnaBridge	189:f392fc9709a3	3594	* @brief Get flag ADC ready.
AnnaBridge	189:f392fc9709a3	3595	* @note On this STM32 serie, flag LL_ADC_FLAG_ADRDY is raised when the ADC
AnnaBridge	189:f392fc9709a3	3596	* is enabled and when conversion clock is active.
AnnaBridge	189:f392fc9709a3	3597	* (not only core clock: this ADC has a dual clock domain)
AnnaBridge	189:f392fc9709a3	3598	* @rmtoll ISR ADRDY LL_ADC_IsActiveFlag_ADRDY
AnnaBridge	189:f392fc9709a3	3599	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3600	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	3601	*/
AnnaBridge	189:f392fc9709a3	3602	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_ADRDY(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3603	{
AnnaBridge	189:f392fc9709a3	3604	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_ADRDY) == (LL_ADC_FLAG_ADRDY));
AnnaBridge	189:f392fc9709a3	3605	}
AnnaBridge	189:f392fc9709a3	3606
AnnaBridge	189:f392fc9709a3	3607	/**
AnnaBridge	189:f392fc9709a3	3608	* @brief Get flag ADC group regular end of unitary conversion.
AnnaBridge	189:f392fc9709a3	3609	* @rmtoll ISR EOC LL_ADC_IsActiveFlag_EOC
AnnaBridge	189:f392fc9709a3	3610	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3611	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	3612	*/
AnnaBridge	189:f392fc9709a3	3613	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_EOC(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3614	{
AnnaBridge	189:f392fc9709a3	3615	return (READ_BIT(ADCx->ISR, ADC_ISR_EOC) == (ADC_ISR_EOC));
AnnaBridge	189:f392fc9709a3	3616	}
AnnaBridge	189:f392fc9709a3	3617
AnnaBridge	189:f392fc9709a3	3618	/**
AnnaBridge	189:f392fc9709a3	3619	* @brief Get flag ADC group regular end of sequence conversions.
AnnaBridge	189:f392fc9709a3	3620	* @rmtoll ISR EOSEQ LL_ADC_IsActiveFlag_EOS
AnnaBridge	189:f392fc9709a3	3621	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3622	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	3623	*/
AnnaBridge	189:f392fc9709a3	3624	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_EOS(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3625	{
AnnaBridge	189:f392fc9709a3	3626	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_EOS) == (LL_ADC_FLAG_EOS));
AnnaBridge	189:f392fc9709a3	3627	}
AnnaBridge	189:f392fc9709a3	3628
AnnaBridge	189:f392fc9709a3	3629	/**
AnnaBridge	189:f392fc9709a3	3630	* @brief Get flag ADC group regular overrun.
AnnaBridge	189:f392fc9709a3	3631	* @rmtoll ISR OVR LL_ADC_IsActiveFlag_OVR
AnnaBridge	189:f392fc9709a3	3632	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3633	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	3634	*/
AnnaBridge	189:f392fc9709a3	3635	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_OVR(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3636	{
AnnaBridge	189:f392fc9709a3	3637	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_OVR) == (LL_ADC_FLAG_OVR));
AnnaBridge	189:f392fc9709a3	3638	}
AnnaBridge	189:f392fc9709a3	3639
AnnaBridge	189:f392fc9709a3	3640	/**
AnnaBridge	189:f392fc9709a3	3641	* @brief Get flag ADC group regular end of sampling phase.
AnnaBridge	189:f392fc9709a3	3642	* @rmtoll ISR EOSMP LL_ADC_IsActiveFlag_EOSMP
AnnaBridge	189:f392fc9709a3	3643	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3644	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	3645	*/
AnnaBridge	189:f392fc9709a3	3646	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_EOSMP(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3647	{
AnnaBridge	189:f392fc9709a3	3648	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_EOSMP) == (LL_ADC_FLAG_EOSMP));
AnnaBridge	189:f392fc9709a3	3649	}
AnnaBridge	189:f392fc9709a3	3650
AnnaBridge	189:f392fc9709a3	3651	/**
AnnaBridge	189:f392fc9709a3	3652	* @brief Get flag ADC analog watchdog 1 flag
AnnaBridge	189:f392fc9709a3	3653	* @rmtoll ISR AWD LL_ADC_IsActiveFlag_AWD1
AnnaBridge	189:f392fc9709a3	3654	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3655	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	3656	*/
AnnaBridge	189:f392fc9709a3	3657	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_AWD1(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3658	{
AnnaBridge	189:f392fc9709a3	3659	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_AWD1) == (LL_ADC_FLAG_AWD1));
AnnaBridge	189:f392fc9709a3	3660	}
AnnaBridge	189:f392fc9709a3	3661
AnnaBridge	189:f392fc9709a3	3662	/**
AnnaBridge	189:f392fc9709a3	3663	* @brief Get flag ADC end of calibration.
AnnaBridge	189:f392fc9709a3	3664	* @rmtoll ISR EOCAL LL_ADC_IsActiveFlag_EOCAL
AnnaBridge	189:f392fc9709a3	3665	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3666	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	3667	*/
AnnaBridge	189:f392fc9709a3	3668	__STATIC_INLINE uint32_t LL_ADC_IsActiveFlag_EOCAL(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3669	{
AnnaBridge	189:f392fc9709a3	3670	return (READ_BIT(ADCx->ISR, LL_ADC_FLAG_EOCAL) == (LL_ADC_FLAG_EOCAL));
AnnaBridge	189:f392fc9709a3	3671	}
AnnaBridge	189:f392fc9709a3	3672
AnnaBridge	189:f392fc9709a3	3673	/**
AnnaBridge	189:f392fc9709a3	3674	* @brief Clear flag ADC ready.
AnnaBridge	189:f392fc9709a3	3675	* @note On this STM32 serie, flag LL_ADC_FLAG_ADRDY is raised when the ADC
AnnaBridge	189:f392fc9709a3	3676	* is enabled and when conversion clock is active.
AnnaBridge	189:f392fc9709a3	3677	* (not only core clock: this ADC has a dual clock domain)
AnnaBridge	189:f392fc9709a3	3678	* @rmtoll ISR ADRDY LL_ADC_ClearFlag_ADRDY
AnnaBridge	189:f392fc9709a3	3679	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3680	* @retval None
AnnaBridge	189:f392fc9709a3	3681	*/
AnnaBridge	189:f392fc9709a3	3682	__STATIC_INLINE void LL_ADC_ClearFlag_ADRDY(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3683	{
AnnaBridge	189:f392fc9709a3	3684	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_ADRDY);
AnnaBridge	189:f392fc9709a3	3685	}
AnnaBridge	189:f392fc9709a3	3686
AnnaBridge	189:f392fc9709a3	3687	/**
AnnaBridge	189:f392fc9709a3	3688	* @brief Clear flag ADC group regular end of unitary conversion.
AnnaBridge	189:f392fc9709a3	3689	* @rmtoll ISR EOC LL_ADC_ClearFlag_EOC
AnnaBridge	189:f392fc9709a3	3690	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3691	* @retval None
AnnaBridge	189:f392fc9709a3	3692	*/
AnnaBridge	189:f392fc9709a3	3693	__STATIC_INLINE void LL_ADC_ClearFlag_EOC(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3694	{
AnnaBridge	189:f392fc9709a3	3695	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_EOC);
AnnaBridge	189:f392fc9709a3	3696	}
AnnaBridge	189:f392fc9709a3	3697
AnnaBridge	189:f392fc9709a3	3698	/**
AnnaBridge	189:f392fc9709a3	3699	* @brief Clear flag ADC group regular end of sequence conversions.
AnnaBridge	189:f392fc9709a3	3700	* @rmtoll ISR EOSEQ LL_ADC_ClearFlag_EOS
AnnaBridge	189:f392fc9709a3	3701	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3702	* @retval None
AnnaBridge	189:f392fc9709a3	3703	*/
AnnaBridge	189:f392fc9709a3	3704	__STATIC_INLINE void LL_ADC_ClearFlag_EOS(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3705	{
AnnaBridge	189:f392fc9709a3	3706	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_EOS);
AnnaBridge	189:f392fc9709a3	3707	}
AnnaBridge	189:f392fc9709a3	3708
AnnaBridge	189:f392fc9709a3	3709	/**
AnnaBridge	189:f392fc9709a3	3710	* @brief Clear flag ADC group regular overrun.
AnnaBridge	189:f392fc9709a3	3711	* @rmtoll ISR OVR LL_ADC_ClearFlag_OVR
AnnaBridge	189:f392fc9709a3	3712	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3713	* @retval None
AnnaBridge	189:f392fc9709a3	3714	*/
AnnaBridge	189:f392fc9709a3	3715	__STATIC_INLINE void LL_ADC_ClearFlag_OVR(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3716	{
AnnaBridge	189:f392fc9709a3	3717	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_OVR);
AnnaBridge	189:f392fc9709a3	3718	}
AnnaBridge	189:f392fc9709a3	3719
AnnaBridge	189:f392fc9709a3	3720	/**
AnnaBridge	189:f392fc9709a3	3721	* @brief Clear flag ADC group regular end of sampling phase.
AnnaBridge	189:f392fc9709a3	3722	* @rmtoll ISR EOSMP LL_ADC_ClearFlag_EOSMP
AnnaBridge	189:f392fc9709a3	3723	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3724	* @retval None
AnnaBridge	189:f392fc9709a3	3725	*/
AnnaBridge	189:f392fc9709a3	3726	__STATIC_INLINE void LL_ADC_ClearFlag_EOSMP(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3727	{
AnnaBridge	189:f392fc9709a3	3728	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_EOSMP);
AnnaBridge	189:f392fc9709a3	3729	}
AnnaBridge	189:f392fc9709a3	3730
AnnaBridge	189:f392fc9709a3	3731	/**
AnnaBridge	189:f392fc9709a3	3732	* @brief Clear flag ADC analog watchdog 1.
AnnaBridge	189:f392fc9709a3	3733	* @rmtoll ISR AWD LL_ADC_ClearFlag_AWD1
AnnaBridge	189:f392fc9709a3	3734	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3735	* @retval None
AnnaBridge	189:f392fc9709a3	3736	*/
AnnaBridge	189:f392fc9709a3	3737	__STATIC_INLINE void LL_ADC_ClearFlag_AWD1(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3738	{
AnnaBridge	189:f392fc9709a3	3739	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_AWD1);
AnnaBridge	189:f392fc9709a3	3740	}
AnnaBridge	189:f392fc9709a3	3741
AnnaBridge	189:f392fc9709a3	3742	/**
AnnaBridge	189:f392fc9709a3	3743	* @brief Clear flag ADC end of calibration.
AnnaBridge	189:f392fc9709a3	3744	* @rmtoll ISR EOCAL LL_ADC_ClearFlag_EOCAL
AnnaBridge	189:f392fc9709a3	3745	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3746	* @retval None
AnnaBridge	189:f392fc9709a3	3747	*/
AnnaBridge	189:f392fc9709a3	3748	__STATIC_INLINE void LL_ADC_ClearFlag_EOCAL(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3749	{
AnnaBridge	189:f392fc9709a3	3750	WRITE_REG(ADCx->ISR, LL_ADC_FLAG_EOCAL);
AnnaBridge	189:f392fc9709a3	3751	}
AnnaBridge	189:f392fc9709a3	3752
AnnaBridge	189:f392fc9709a3	3753	/**
AnnaBridge	189:f392fc9709a3	3754	* @}
AnnaBridge	189:f392fc9709a3	3755	*/
AnnaBridge	189:f392fc9709a3	3756
AnnaBridge	189:f392fc9709a3	3757	/** @defgroup ADC_LL_EF_IT_Management ADC IT management
AnnaBridge	189:f392fc9709a3	3758	* @{
AnnaBridge	189:f392fc9709a3	3759	*/
AnnaBridge	189:f392fc9709a3	3760
AnnaBridge	189:f392fc9709a3	3761	/**
AnnaBridge	189:f392fc9709a3	3762	* @brief Enable ADC ready.
AnnaBridge	189:f392fc9709a3	3763	* @rmtoll IER ADRDYIE LL_ADC_EnableIT_ADRDY
AnnaBridge	189:f392fc9709a3	3764	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3765	* @retval None
AnnaBridge	189:f392fc9709a3	3766	*/
AnnaBridge	189:f392fc9709a3	3767	__STATIC_INLINE void LL_ADC_EnableIT_ADRDY(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3768	{
AnnaBridge	189:f392fc9709a3	3769	SET_BIT(ADCx->IER, LL_ADC_IT_ADRDY);
AnnaBridge	189:f392fc9709a3	3770	}
AnnaBridge	189:f392fc9709a3	3771
AnnaBridge	189:f392fc9709a3	3772	/**
AnnaBridge	189:f392fc9709a3	3773	* @brief Enable interruption ADC group regular end of unitary conversion.
AnnaBridge	189:f392fc9709a3	3774	* @rmtoll IER EOCIE LL_ADC_EnableIT_EOC
AnnaBridge	189:f392fc9709a3	3775	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3776	* @retval None
AnnaBridge	189:f392fc9709a3	3777	*/
AnnaBridge	189:f392fc9709a3	3778	__STATIC_INLINE void LL_ADC_EnableIT_EOC(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3779	{
AnnaBridge	189:f392fc9709a3	3780	SET_BIT(ADCx->IER, LL_ADC_IT_EOC);
AnnaBridge	189:f392fc9709a3	3781	}
AnnaBridge	189:f392fc9709a3	3782
AnnaBridge	189:f392fc9709a3	3783	/**
AnnaBridge	189:f392fc9709a3	3784	* @brief Enable interruption ADC group regular end of sequence conversions.
AnnaBridge	189:f392fc9709a3	3785	* @rmtoll IER EOSEQIE LL_ADC_EnableIT_EOS
AnnaBridge	189:f392fc9709a3	3786	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3787	* @retval None
AnnaBridge	189:f392fc9709a3	3788	*/
AnnaBridge	189:f392fc9709a3	3789	__STATIC_INLINE void LL_ADC_EnableIT_EOS(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3790	{
AnnaBridge	189:f392fc9709a3	3791	SET_BIT(ADCx->IER, LL_ADC_IT_EOS);
AnnaBridge	189:f392fc9709a3	3792	}
AnnaBridge	189:f392fc9709a3	3793
AnnaBridge	189:f392fc9709a3	3794	/**
AnnaBridge	189:f392fc9709a3	3795	* @brief Enable ADC group regular interruption overrun.
AnnaBridge	189:f392fc9709a3	3796	* @rmtoll IER OVRIE LL_ADC_EnableIT_OVR
AnnaBridge	189:f392fc9709a3	3797	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3798	* @retval None
AnnaBridge	189:f392fc9709a3	3799	*/
AnnaBridge	189:f392fc9709a3	3800	__STATIC_INLINE void LL_ADC_EnableIT_OVR(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3801	{
AnnaBridge	189:f392fc9709a3	3802	SET_BIT(ADCx->IER, LL_ADC_IT_OVR);
AnnaBridge	189:f392fc9709a3	3803	}
AnnaBridge	189:f392fc9709a3	3804
AnnaBridge	189:f392fc9709a3	3805	/**
AnnaBridge	189:f392fc9709a3	3806	* @brief Enable interruption ADC group regular end of sampling.
AnnaBridge	189:f392fc9709a3	3807	* @rmtoll IER EOSMPIE LL_ADC_EnableIT_EOSMP
AnnaBridge	189:f392fc9709a3	3808	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3809	* @retval None
AnnaBridge	189:f392fc9709a3	3810	*/
AnnaBridge	189:f392fc9709a3	3811	__STATIC_INLINE void LL_ADC_EnableIT_EOSMP(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3812	{
AnnaBridge	189:f392fc9709a3	3813	SET_BIT(ADCx->IER, LL_ADC_IT_EOSMP);
AnnaBridge	189:f392fc9709a3	3814	}
AnnaBridge	189:f392fc9709a3	3815
AnnaBridge	189:f392fc9709a3	3816	/**
AnnaBridge	189:f392fc9709a3	3817	* @brief Enable interruption ADC analog watchdog 1.
AnnaBridge	189:f392fc9709a3	3818	* @rmtoll IER AWDIE LL_ADC_EnableIT_AWD1
AnnaBridge	189:f392fc9709a3	3819	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3820	* @retval None
AnnaBridge	189:f392fc9709a3	3821	*/
AnnaBridge	189:f392fc9709a3	3822	__STATIC_INLINE void LL_ADC_EnableIT_AWD1(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3823	{
AnnaBridge	189:f392fc9709a3	3824	SET_BIT(ADCx->IER, LL_ADC_IT_AWD1);
AnnaBridge	189:f392fc9709a3	3825	}
AnnaBridge	189:f392fc9709a3	3826
AnnaBridge	189:f392fc9709a3	3827	/**
AnnaBridge	189:f392fc9709a3	3828	* @brief Enable interruption ADC end of calibration.
AnnaBridge	189:f392fc9709a3	3829	* @rmtoll IER EOCALIE LL_ADC_EnableIT_EOCAL
AnnaBridge	189:f392fc9709a3	3830	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3831	* @retval None
AnnaBridge	189:f392fc9709a3	3832	*/
AnnaBridge	189:f392fc9709a3	3833	__STATIC_INLINE void LL_ADC_EnableIT_EOCAL(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3834	{
AnnaBridge	189:f392fc9709a3	3835	SET_BIT(ADCx->IER, LL_ADC_IT_EOCAL);
AnnaBridge	189:f392fc9709a3	3836	}
AnnaBridge	189:f392fc9709a3	3837
AnnaBridge	189:f392fc9709a3	3838	/**
AnnaBridge	189:f392fc9709a3	3839	* @brief Disable interruption ADC ready.
AnnaBridge	189:f392fc9709a3	3840	* @rmtoll IER ADRDYIE LL_ADC_DisableIT_ADRDY
AnnaBridge	189:f392fc9709a3	3841	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3842	* @retval None
AnnaBridge	189:f392fc9709a3	3843	*/
AnnaBridge	189:f392fc9709a3	3844	__STATIC_INLINE void LL_ADC_DisableIT_ADRDY(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3845	{
AnnaBridge	189:f392fc9709a3	3846	CLEAR_BIT(ADCx->IER, LL_ADC_IT_ADRDY);
AnnaBridge	189:f392fc9709a3	3847	}
AnnaBridge	189:f392fc9709a3	3848
AnnaBridge	189:f392fc9709a3	3849	/**
AnnaBridge	189:f392fc9709a3	3850	* @brief Disable interruption ADC group regular end of unitary conversion.
AnnaBridge	189:f392fc9709a3	3851	* @rmtoll IER EOCIE LL_ADC_DisableIT_EOC
AnnaBridge	189:f392fc9709a3	3852	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3853	* @retval None
AnnaBridge	189:f392fc9709a3	3854	*/
AnnaBridge	189:f392fc9709a3	3855	__STATIC_INLINE void LL_ADC_DisableIT_EOC(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3856	{
AnnaBridge	189:f392fc9709a3	3857	CLEAR_BIT(ADCx->IER, LL_ADC_IT_EOC);
AnnaBridge	189:f392fc9709a3	3858	}
AnnaBridge	189:f392fc9709a3	3859
AnnaBridge	189:f392fc9709a3	3860	/**
AnnaBridge	189:f392fc9709a3	3861	* @brief Disable interruption ADC group regular end of sequence conversions.
AnnaBridge	189:f392fc9709a3	3862	* @rmtoll IER EOSEQIE LL_ADC_DisableIT_EOS
AnnaBridge	189:f392fc9709a3	3863	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3864	* @retval None
AnnaBridge	189:f392fc9709a3	3865	*/
AnnaBridge	189:f392fc9709a3	3866	__STATIC_INLINE void LL_ADC_DisableIT_EOS(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3867	{
AnnaBridge	189:f392fc9709a3	3868	CLEAR_BIT(ADCx->IER, LL_ADC_IT_EOS);
AnnaBridge	189:f392fc9709a3	3869	}
AnnaBridge	189:f392fc9709a3	3870
AnnaBridge	189:f392fc9709a3	3871	/**
AnnaBridge	189:f392fc9709a3	3872	* @brief Disable interruption ADC group regular overrun.
AnnaBridge	189:f392fc9709a3	3873	* @rmtoll IER OVRIE LL_ADC_DisableIT_OVR
AnnaBridge	189:f392fc9709a3	3874	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3875	* @retval None
AnnaBridge	189:f392fc9709a3	3876	*/
AnnaBridge	189:f392fc9709a3	3877	__STATIC_INLINE void LL_ADC_DisableIT_OVR(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3878	{
AnnaBridge	189:f392fc9709a3	3879	CLEAR_BIT(ADCx->IER, LL_ADC_IT_OVR);
AnnaBridge	189:f392fc9709a3	3880	}
AnnaBridge	189:f392fc9709a3	3881
AnnaBridge	189:f392fc9709a3	3882	/**
AnnaBridge	189:f392fc9709a3	3883	* @brief Disable interruption ADC group regular end of sampling.
AnnaBridge	189:f392fc9709a3	3884	* @rmtoll IER EOSMPIE LL_ADC_DisableIT_EOSMP
AnnaBridge	189:f392fc9709a3	3885	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3886	* @retval None
AnnaBridge	189:f392fc9709a3	3887	*/
AnnaBridge	189:f392fc9709a3	3888	__STATIC_INLINE void LL_ADC_DisableIT_EOSMP(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3889	{
AnnaBridge	189:f392fc9709a3	3890	CLEAR_BIT(ADCx->IER, LL_ADC_IT_EOSMP);
AnnaBridge	189:f392fc9709a3	3891	}
AnnaBridge	189:f392fc9709a3	3892
AnnaBridge	189:f392fc9709a3	3893	/**
AnnaBridge	189:f392fc9709a3	3894	* @brief Disable interruption ADC analog watchdog 1.
AnnaBridge	189:f392fc9709a3	3895	* @rmtoll IER AWDIE LL_ADC_DisableIT_AWD1
AnnaBridge	189:f392fc9709a3	3896	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3897	* @retval None
AnnaBridge	189:f392fc9709a3	3898	*/
AnnaBridge	189:f392fc9709a3	3899	__STATIC_INLINE void LL_ADC_DisableIT_AWD1(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3900	{
AnnaBridge	189:f392fc9709a3	3901	CLEAR_BIT(ADCx->IER, LL_ADC_IT_AWD1);
AnnaBridge	189:f392fc9709a3	3902	}
AnnaBridge	189:f392fc9709a3	3903
AnnaBridge	189:f392fc9709a3	3904	/**
AnnaBridge	189:f392fc9709a3	3905	* @brief Disable interruption ADC end of calibration.
AnnaBridge	189:f392fc9709a3	3906	* @rmtoll IER EOCALIE LL_ADC_DisableIT_EOCAL
AnnaBridge	189:f392fc9709a3	3907	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3908	* @retval None
AnnaBridge	189:f392fc9709a3	3909	*/
AnnaBridge	189:f392fc9709a3	3910	__STATIC_INLINE void LL_ADC_DisableIT_EOCAL(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3911	{
AnnaBridge	189:f392fc9709a3	3912	CLEAR_BIT(ADCx->IER, LL_ADC_IT_EOCAL);
AnnaBridge	189:f392fc9709a3	3913	}
AnnaBridge	189:f392fc9709a3	3914
AnnaBridge	189:f392fc9709a3	3915	/**
AnnaBridge	189:f392fc9709a3	3916	* @brief Get state of interruption ADC ready
AnnaBridge	189:f392fc9709a3	3917	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	189:f392fc9709a3	3918	* @rmtoll IER ADRDYIE LL_ADC_IsEnabledIT_ADRDY
AnnaBridge	189:f392fc9709a3	3919	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3920	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	3921	*/
AnnaBridge	189:f392fc9709a3	3922	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_ADRDY(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3923	{
AnnaBridge	189:f392fc9709a3	3924	return (READ_BIT(ADCx->IER, LL_ADC_IT_ADRDY) == (LL_ADC_IT_ADRDY));
AnnaBridge	189:f392fc9709a3	3925	}
AnnaBridge	189:f392fc9709a3	3926
AnnaBridge	189:f392fc9709a3	3927	/**
AnnaBridge	189:f392fc9709a3	3928	* @brief Get state of interruption ADC group regular end of unitary conversion
AnnaBridge	189:f392fc9709a3	3929	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	189:f392fc9709a3	3930	* @rmtoll IER EOCIE LL_ADC_IsEnabledIT_EOC
AnnaBridge	189:f392fc9709a3	3931	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3932	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	3933	*/
AnnaBridge	189:f392fc9709a3	3934	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_EOC(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3935	{
AnnaBridge	189:f392fc9709a3	3936	return (READ_BIT(ADCx->IER, LL_ADC_IT_EOC) == (LL_ADC_IT_EOC));
AnnaBridge	189:f392fc9709a3	3937	}
AnnaBridge	189:f392fc9709a3	3938
AnnaBridge	189:f392fc9709a3	3939	/**
AnnaBridge	189:f392fc9709a3	3940	* @brief Get state of interruption ADC group regular end of sequence conversions
AnnaBridge	189:f392fc9709a3	3941	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	189:f392fc9709a3	3942	* @rmtoll IER EOSEQIE LL_ADC_IsEnabledIT_EOS
AnnaBridge	189:f392fc9709a3	3943	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3944	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	3945	*/
AnnaBridge	189:f392fc9709a3	3946	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_EOS(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3947	{
AnnaBridge	189:f392fc9709a3	3948	return (READ_BIT(ADCx->IER, LL_ADC_IT_EOS) == (LL_ADC_IT_EOS));
AnnaBridge	189:f392fc9709a3	3949	}
AnnaBridge	189:f392fc9709a3	3950
AnnaBridge	189:f392fc9709a3	3951	/**
AnnaBridge	189:f392fc9709a3	3952	* @brief Get state of interruption ADC group regular overrun
AnnaBridge	189:f392fc9709a3	3953	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	189:f392fc9709a3	3954	* @rmtoll IER OVRIE LL_ADC_IsEnabledIT_OVR
AnnaBridge	189:f392fc9709a3	3955	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3956	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	3957	*/
AnnaBridge	189:f392fc9709a3	3958	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_OVR(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3959	{
AnnaBridge	189:f392fc9709a3	3960	return (READ_BIT(ADCx->IER, LL_ADC_IT_OVR) == (LL_ADC_IT_OVR));
AnnaBridge	189:f392fc9709a3	3961	}
AnnaBridge	189:f392fc9709a3	3962
AnnaBridge	189:f392fc9709a3	3963	/**
AnnaBridge	189:f392fc9709a3	3964	* @brief Get state of interruption ADC group regular end of sampling
AnnaBridge	189:f392fc9709a3	3965	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	189:f392fc9709a3	3966	* @rmtoll IER EOSMPIE LL_ADC_IsEnabledIT_EOSMP
AnnaBridge	189:f392fc9709a3	3967	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3968	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	3969	*/
AnnaBridge	189:f392fc9709a3	3970	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_EOSMP(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3971	{
AnnaBridge	189:f392fc9709a3	3972	return (READ_BIT(ADCx->IER, LL_ADC_IT_EOSMP) == (LL_ADC_IT_EOSMP));
AnnaBridge	189:f392fc9709a3	3973	}
AnnaBridge	189:f392fc9709a3	3974
AnnaBridge	189:f392fc9709a3	3975	/**
AnnaBridge	189:f392fc9709a3	3976	* @brief Get state of interruption ADC analog watchdog 1
AnnaBridge	189:f392fc9709a3	3977	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	189:f392fc9709a3	3978	* @rmtoll IER AWDIE LL_ADC_IsEnabledIT_AWD1
AnnaBridge	189:f392fc9709a3	3979	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3980	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	3981	*/
AnnaBridge	189:f392fc9709a3	3982	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_AWD1(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3983	{
AnnaBridge	189:f392fc9709a3	3984	return (READ_BIT(ADCx->IER, LL_ADC_IT_AWD1) == (LL_ADC_IT_AWD1));
AnnaBridge	189:f392fc9709a3	3985	}
AnnaBridge	189:f392fc9709a3	3986
AnnaBridge	189:f392fc9709a3	3987	/**
AnnaBridge	189:f392fc9709a3	3988	* @brief Get state of interruption ADC end of calibration
AnnaBridge	189:f392fc9709a3	3989	* (0: interrupt disabled, 1: interrupt enabled).
AnnaBridge	189:f392fc9709a3	3990	* @rmtoll IER EOCALIE LL_ADC_IsEnabledIT_EOCAL
AnnaBridge	189:f392fc9709a3	3991	* @param ADCx ADC instance
AnnaBridge	189:f392fc9709a3	3992	* @retval State of bit (1 or 0).
AnnaBridge	189:f392fc9709a3	3993	*/
AnnaBridge	189:f392fc9709a3	3994	__STATIC_INLINE uint32_t LL_ADC_IsEnabledIT_EOCAL(ADC_TypeDef *ADCx)
AnnaBridge	189:f392fc9709a3	3995	{
AnnaBridge	189:f392fc9709a3	3996	return (READ_BIT(ADCx->IER, LL_ADC_IT_EOCAL) == (LL_ADC_IT_EOCAL));
AnnaBridge	189:f392fc9709a3	3997	}
AnnaBridge	189:f392fc9709a3	3998
AnnaBridge	189:f392fc9709a3	3999	/**
AnnaBridge	189:f392fc9709a3	4000	* @}
AnnaBridge	189:f392fc9709a3	4001	*/
AnnaBridge	189:f392fc9709a3	4002
AnnaBridge	189:f392fc9709a3	4003	#if defined(USE_FULL_LL_DRIVER)
AnnaBridge	189:f392fc9709a3	4004	/** @defgroup ADC_LL_EF_Init Initialization and de-initialization functions
AnnaBridge	189:f392fc9709a3	4005	* @{
AnnaBridge	189:f392fc9709a3	4006	*/
AnnaBridge	189:f392fc9709a3	4007
AnnaBridge	189:f392fc9709a3	4008	/* Initialization of some features of ADC common parameters and multimode */
AnnaBridge	189:f392fc9709a3	4009	ErrorStatus LL_ADC_CommonDeInit(ADC_Common_TypeDef *ADCxy_COMMON);
AnnaBridge	189:f392fc9709a3	4010	ErrorStatus LL_ADC_CommonInit(ADC_Common_TypeDef ADCxy_COMMON, LL_ADC_CommonInitTypeDef ADC_CommonInitStruct);
AnnaBridge	189:f392fc9709a3	4011	void LL_ADC_CommonStructInit(LL_ADC_CommonInitTypeDef *ADC_CommonInitStruct);
AnnaBridge	189:f392fc9709a3	4012
AnnaBridge	189:f392fc9709a3	4013	/* De-initialization of ADC instance */
AnnaBridge	189:f392fc9709a3	4014	ErrorStatus LL_ADC_DeInit(ADC_TypeDef *ADCx);
AnnaBridge	189:f392fc9709a3	4015
AnnaBridge	189:f392fc9709a3	4016	/* Initialization of some features of ADC instance */
AnnaBridge	189:f392fc9709a3	4017	ErrorStatus LL_ADC_Init(ADC_TypeDef ADCx, LL_ADC_InitTypeDef ADC_InitStruct);
AnnaBridge	189:f392fc9709a3	4018	void LL_ADC_StructInit(LL_ADC_InitTypeDef *ADC_InitStruct);
AnnaBridge	189:f392fc9709a3	4019
AnnaBridge	189:f392fc9709a3	4020	/* Initialization of some features of ADC instance and ADC group regular */
AnnaBridge	189:f392fc9709a3	4021	ErrorStatus LL_ADC_REG_Init(ADC_TypeDef ADCx, LL_ADC_REG_InitTypeDef ADC_REG_InitStruct);
AnnaBridge	189:f392fc9709a3	4022	void LL_ADC_REG_StructInit(LL_ADC_REG_InitTypeDef *ADC_REG_InitStruct);
AnnaBridge	189:f392fc9709a3	4023
AnnaBridge	189:f392fc9709a3	4024	/**
AnnaBridge	189:f392fc9709a3	4025	* @}
AnnaBridge	189:f392fc9709a3	4026	*/
AnnaBridge	189:f392fc9709a3	4027	#endif /* USE_FULL_LL_DRIVER */
AnnaBridge	189:f392fc9709a3	4028
AnnaBridge	189:f392fc9709a3	4029	/**
AnnaBridge	189:f392fc9709a3	4030	* @}
AnnaBridge	189:f392fc9709a3	4031	*/
AnnaBridge	189:f392fc9709a3	4032
AnnaBridge	189:f392fc9709a3	4033	/**
AnnaBridge	189:f392fc9709a3	4034	* @}
AnnaBridge	189:f392fc9709a3	4035	*/
AnnaBridge	189:f392fc9709a3	4036
AnnaBridge	189:f392fc9709a3	4037	#endif /* ADC1 */
AnnaBridge	189:f392fc9709a3	4038
AnnaBridge	189:f392fc9709a3	4039	/**
AnnaBridge	189:f392fc9709a3	4040	* @}
AnnaBridge	189:f392fc9709a3	4041	*/
AnnaBridge	189:f392fc9709a3	4042
AnnaBridge	189:f392fc9709a3	4043	#ifdef __cplusplus
AnnaBridge	189:f392fc9709a3	4044	}
AnnaBridge	189:f392fc9709a3	4045	#endif
AnnaBridge	189:f392fc9709a3	4046
AnnaBridge	189:f392fc9709a3	4047	#endif /* __STM32L0xx_LL_ADC_H */
AnnaBridge	189:f392fc9709a3	4048
AnnaBridge	189:f392fc9709a3	4049	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/