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cmsis/BUILD/mbed/TARGET_DISCO_L072CZ_LRWAN1/TOOLCHAIN_IAR/stm32l0xx_hal_dac.h@189:f392fc9709a3, 2019-02-20 (annotated)
- Committer:
- AnnaBridge
- Date:
- Wed Feb 20 22:31:08 2019 +0000
- Revision:
- 189:f392fc9709a3
mbed library release version 165
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| AnnaBridge | 189:f392fc9709a3 | 1 | /** |
| AnnaBridge | 189:f392fc9709a3 | 2 | ****************************************************************************** |
| AnnaBridge | 189:f392fc9709a3 | 3 | * @file stm32l0xx_hal_dac.h |
| AnnaBridge | 189:f392fc9709a3 | 4 | * @author MCD Application Team |
| AnnaBridge | 189:f392fc9709a3 | 5 | * @brief Header file of DAC HAL module. |
| AnnaBridge | 189:f392fc9709a3 | 6 | ****************************************************************************** |
| AnnaBridge | 189:f392fc9709a3 | 7 | * @attention |
| AnnaBridge | 189:f392fc9709a3 | 8 | * |
| AnnaBridge | 189:f392fc9709a3 | 9 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
| AnnaBridge | 189:f392fc9709a3 | 10 | * |
| AnnaBridge | 189:f392fc9709a3 | 11 | * Redistribution and use in source and binary forms, with or without modification, |
| AnnaBridge | 189:f392fc9709a3 | 12 | * are permitted provided that the following conditions are met: |
| AnnaBridge | 189:f392fc9709a3 | 13 | * 1. Redistributions of source code must retain the above copyright notice, |
| AnnaBridge | 189:f392fc9709a3 | 14 | * this list of conditions and the following disclaimer. |
| AnnaBridge | 189:f392fc9709a3 | 15 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| AnnaBridge | 189:f392fc9709a3 | 16 | * this list of conditions and the following disclaimer in the documentation |
| AnnaBridge | 189:f392fc9709a3 | 17 | * and/or other materials provided with the distribution. |
| AnnaBridge | 189:f392fc9709a3 | 18 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| AnnaBridge | 189:f392fc9709a3 | 19 | * may be used to endorse or promote products derived from this software |
| AnnaBridge | 189:f392fc9709a3 | 20 | * without specific prior written permission. |
| AnnaBridge | 189:f392fc9709a3 | 21 | * |
| AnnaBridge | 189:f392fc9709a3 | 22 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| AnnaBridge | 189:f392fc9709a3 | 23 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| AnnaBridge | 189:f392fc9709a3 | 24 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| AnnaBridge | 189:f392fc9709a3 | 25 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| AnnaBridge | 189:f392fc9709a3 | 26 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| AnnaBridge | 189:f392fc9709a3 | 27 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| AnnaBridge | 189:f392fc9709a3 | 28 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| AnnaBridge | 189:f392fc9709a3 | 29 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| AnnaBridge | 189:f392fc9709a3 | 30 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| AnnaBridge | 189:f392fc9709a3 | 31 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| AnnaBridge | 189:f392fc9709a3 | 32 | * |
| AnnaBridge | 189:f392fc9709a3 | 33 | ****************************************************************************** |
| AnnaBridge | 189:f392fc9709a3 | 34 | */ |
| AnnaBridge | 189:f392fc9709a3 | 35 | |
| AnnaBridge | 189:f392fc9709a3 | 36 | /* Define to prevent recursive inclusion -------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 37 | #ifndef __STM32L0xx_HAL_DAC_H |
| AnnaBridge | 189:f392fc9709a3 | 38 | #define __STM32L0xx_HAL_DAC_H |
| AnnaBridge | 189:f392fc9709a3 | 39 | |
| AnnaBridge | 189:f392fc9709a3 | 40 | #ifdef __cplusplus |
| AnnaBridge | 189:f392fc9709a3 | 41 | extern "C" { |
| AnnaBridge | 189:f392fc9709a3 | 42 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 43 | |
| AnnaBridge | 189:f392fc9709a3 | 44 | #if !defined (STM32L011xx) && !defined (STM32L021xx) && !defined (STM32L031xx) && !defined (STM32L041xx) && !defined (STM32L051xx) && !defined (STM32L061xx) && !defined (STM32L071xx) && !defined (STM32L081xx) |
| AnnaBridge | 189:f392fc9709a3 | 45 | |
| AnnaBridge | 189:f392fc9709a3 | 46 | /* Includes ------------------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 47 | #include "stm32l0xx_hal_def.h" |
| AnnaBridge | 189:f392fc9709a3 | 48 | |
| AnnaBridge | 189:f392fc9709a3 | 49 | /** @addtogroup STM32L0xx_HAL_Driver |
| AnnaBridge | 189:f392fc9709a3 | 50 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 51 | */ |
| AnnaBridge | 189:f392fc9709a3 | 52 | |
| AnnaBridge | 189:f392fc9709a3 | 53 | /** @defgroup DAC DAC |
| AnnaBridge | 189:f392fc9709a3 | 54 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 55 | */ |
| AnnaBridge | 189:f392fc9709a3 | 56 | |
| AnnaBridge | 189:f392fc9709a3 | 57 | /* Exported types ------------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 58 | |
| AnnaBridge | 189:f392fc9709a3 | 59 | /** @defgroup DAC_Exported_Types DAC Exported Types |
| AnnaBridge | 189:f392fc9709a3 | 60 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 61 | */ |
| AnnaBridge | 189:f392fc9709a3 | 62 | |
| AnnaBridge | 189:f392fc9709a3 | 63 | /** |
| AnnaBridge | 189:f392fc9709a3 | 64 | * @brief HAL State structures definition |
| AnnaBridge | 189:f392fc9709a3 | 65 | */ |
| AnnaBridge | 189:f392fc9709a3 | 66 | typedef enum |
| AnnaBridge | 189:f392fc9709a3 | 67 | { |
| AnnaBridge | 189:f392fc9709a3 | 68 | HAL_DAC_STATE_RESET = 0x00U, /*!< DAC not yet initialized or disabled */ |
| AnnaBridge | 189:f392fc9709a3 | 69 | HAL_DAC_STATE_READY = 0x01U, /*!< DAC initialized and ready for use */ |
| AnnaBridge | 189:f392fc9709a3 | 70 | HAL_DAC_STATE_BUSY = 0x02U, /*!< DAC internal processing is ongoing */ |
| AnnaBridge | 189:f392fc9709a3 | 71 | HAL_DAC_STATE_TIMEOUT = 0x03U, /*!< DAC timeout state */ |
| AnnaBridge | 189:f392fc9709a3 | 72 | HAL_DAC_STATE_ERROR = 0x04U /*!< DAC error state */ |
| AnnaBridge | 189:f392fc9709a3 | 73 | |
| AnnaBridge | 189:f392fc9709a3 | 74 | }HAL_DAC_StateTypeDef; |
| AnnaBridge | 189:f392fc9709a3 | 75 | |
| AnnaBridge | 189:f392fc9709a3 | 76 | /** |
| AnnaBridge | 189:f392fc9709a3 | 77 | * @brief DAC handle Structure definition |
| AnnaBridge | 189:f392fc9709a3 | 78 | */ |
| AnnaBridge | 189:f392fc9709a3 | 79 | typedef struct |
| AnnaBridge | 189:f392fc9709a3 | 80 | { |
| AnnaBridge | 189:f392fc9709a3 | 81 | DAC_TypeDef *Instance; /*!< Register base address */ |
| AnnaBridge | 189:f392fc9709a3 | 82 | |
| AnnaBridge | 189:f392fc9709a3 | 83 | __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */ |
| AnnaBridge | 189:f392fc9709a3 | 84 | |
| AnnaBridge | 189:f392fc9709a3 | 85 | HAL_LockTypeDef Lock; /*!< DAC locking object */ |
| AnnaBridge | 189:f392fc9709a3 | 86 | |
| AnnaBridge | 189:f392fc9709a3 | 87 | DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */ |
| AnnaBridge | 189:f392fc9709a3 | 88 | |
| AnnaBridge | 189:f392fc9709a3 | 89 | #if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) |
| AnnaBridge | 189:f392fc9709a3 | 90 | DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */ |
| AnnaBridge | 189:f392fc9709a3 | 91 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 92 | |
| AnnaBridge | 189:f392fc9709a3 | 93 | __IO uint32_t ErrorCode; /*!< DAC Error code */ |
| AnnaBridge | 189:f392fc9709a3 | 94 | |
| AnnaBridge | 189:f392fc9709a3 | 95 | }DAC_HandleTypeDef; |
| AnnaBridge | 189:f392fc9709a3 | 96 | |
| AnnaBridge | 189:f392fc9709a3 | 97 | /** |
| AnnaBridge | 189:f392fc9709a3 | 98 | * @brief DAC Configuration regular Channel structure definition |
| AnnaBridge | 189:f392fc9709a3 | 99 | */ |
| AnnaBridge | 189:f392fc9709a3 | 100 | typedef struct |
| AnnaBridge | 189:f392fc9709a3 | 101 | { |
| AnnaBridge | 189:f392fc9709a3 | 102 | uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel. |
| AnnaBridge | 189:f392fc9709a3 | 103 | This parameter can be a value of @ref DAC_trigger_selection */ |
| AnnaBridge | 189:f392fc9709a3 | 104 | |
| AnnaBridge | 189:f392fc9709a3 | 105 | uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled. |
| AnnaBridge | 189:f392fc9709a3 | 106 | This parameter can be a value of @ref DAC_output_buffer */ |
| AnnaBridge | 189:f392fc9709a3 | 107 | |
| AnnaBridge | 189:f392fc9709a3 | 108 | }DAC_ChannelConfTypeDef; |
| AnnaBridge | 189:f392fc9709a3 | 109 | |
| AnnaBridge | 189:f392fc9709a3 | 110 | /** |
| AnnaBridge | 189:f392fc9709a3 | 111 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 112 | */ |
| AnnaBridge | 189:f392fc9709a3 | 113 | |
| AnnaBridge | 189:f392fc9709a3 | 114 | /* Exported constants --------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 115 | |
| AnnaBridge | 189:f392fc9709a3 | 116 | /** @defgroup DAC_Exported_Constants DAC Exported Constants |
| AnnaBridge | 189:f392fc9709a3 | 117 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 118 | */ |
| AnnaBridge | 189:f392fc9709a3 | 119 | |
| AnnaBridge | 189:f392fc9709a3 | 120 | /** @defgroup DAC_Error_Code DAC Error Code |
| AnnaBridge | 189:f392fc9709a3 | 121 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 122 | */ |
| AnnaBridge | 189:f392fc9709a3 | 123 | #define HAL_DAC_ERROR_NONE 0x00U /*!< No error */ |
| AnnaBridge | 189:f392fc9709a3 | 124 | #define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01U /*!< DAC channel1 DAM underrun error */ |
| AnnaBridge | 189:f392fc9709a3 | 125 | #if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) |
| AnnaBridge | 189:f392fc9709a3 | 126 | #define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02U /*!< DAC channel2 DAM underrun error */ |
| AnnaBridge | 189:f392fc9709a3 | 127 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 128 | #define HAL_DAC_ERROR_DMA 0x04U /*!< DMA error */ |
| AnnaBridge | 189:f392fc9709a3 | 129 | /** |
| AnnaBridge | 189:f392fc9709a3 | 130 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 131 | */ |
| AnnaBridge | 189:f392fc9709a3 | 132 | |
| AnnaBridge | 189:f392fc9709a3 | 133 | /** @defgroup DAC_trigger_selection DAC trigger selection |
| AnnaBridge | 189:f392fc9709a3 | 134 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 135 | */ |
| AnnaBridge | 189:f392fc9709a3 | 136 | #define DAC_TRIGGER_NONE ((uint32_t)0x00000000U) /*!< Conversion is automatic once the DAC1_DHRxxxx register has been loaded, and not by external trigger */ |
| AnnaBridge | 189:f392fc9709a3 | 137 | #define DAC_TRIGGER_T6_TRGO ((uint32_t) DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */ |
| AnnaBridge | 189:f392fc9709a3 | 138 | #define DAC_TRIGGER_T21_TRGO ((uint32_t)( DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM21 TRGO selected as external conversion trigger for DAC channel */ |
| AnnaBridge | 189:f392fc9709a3 | 139 | #define DAC_TRIGGER_T2_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TEN1)) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */ |
| AnnaBridge | 189:f392fc9709a3 | 140 | #define DAC_TRIGGER_EXT_IT9 ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */ |
| AnnaBridge | 189:f392fc9709a3 | 141 | #define DAC_TRIGGER_SOFTWARE ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< Conversion started by software trigger for DAC channel */ |
| AnnaBridge | 189:f392fc9709a3 | 142 | |
| AnnaBridge | 189:f392fc9709a3 | 143 | #if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) |
| AnnaBridge | 189:f392fc9709a3 | 144 | #define DAC_TRIGGER_T3_TRGO ((uint32_t)( DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM3 TRGO selected as external conversion trigger for DAC channel */ |
| AnnaBridge | 189:f392fc9709a3 | 145 | #define DAC_TRIGGER_T3_CH3 ((uint32_t)( DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< TIM3 CH3 selected as external conversion trigger for DAC channel */ |
| AnnaBridge | 189:f392fc9709a3 | 146 | #define DAC_TRIGGER_T7_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */ |
| AnnaBridge | 189:f392fc9709a3 | 147 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 148 | |
| AnnaBridge | 189:f392fc9709a3 | 149 | #if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) |
| AnnaBridge | 189:f392fc9709a3 | 150 | #define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \ |
| AnnaBridge | 189:f392fc9709a3 | 151 | ((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \ |
| AnnaBridge | 189:f392fc9709a3 | 152 | ((TRIGGER) == DAC_TRIGGER_T3_TRGO) || \ |
| AnnaBridge | 189:f392fc9709a3 | 153 | ((TRIGGER) == DAC_TRIGGER_T3_CH3) || \ |
| AnnaBridge | 189:f392fc9709a3 | 154 | ((TRIGGER) == DAC_TRIGGER_T7_TRGO) || \ |
| AnnaBridge | 189:f392fc9709a3 | 155 | ((TRIGGER) == DAC_TRIGGER_T21_TRGO) || \ |
| AnnaBridge | 189:f392fc9709a3 | 156 | ((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \ |
| AnnaBridge | 189:f392fc9709a3 | 157 | ((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \ |
| AnnaBridge | 189:f392fc9709a3 | 158 | ((TRIGGER) == DAC_TRIGGER_SOFTWARE)) |
| AnnaBridge | 189:f392fc9709a3 | 159 | #else /* STM32L072xx || STM32L073xx || STM32L082xx || STM32L083xx */ |
| AnnaBridge | 189:f392fc9709a3 | 160 | #define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \ |
| AnnaBridge | 189:f392fc9709a3 | 161 | ((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \ |
| AnnaBridge | 189:f392fc9709a3 | 162 | ((TRIGGER) == DAC_TRIGGER_T21_TRGO) || \ |
| AnnaBridge | 189:f392fc9709a3 | 163 | ((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \ |
| AnnaBridge | 189:f392fc9709a3 | 164 | ((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \ |
| AnnaBridge | 189:f392fc9709a3 | 165 | ((TRIGGER) == DAC_TRIGGER_SOFTWARE)) |
| AnnaBridge | 189:f392fc9709a3 | 166 | #endif /* STM32L072xx || STM32L073xx || STM32L082xx || STM32L083xx */ |
| AnnaBridge | 189:f392fc9709a3 | 167 | /** |
| AnnaBridge | 189:f392fc9709a3 | 168 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 169 | */ |
| AnnaBridge | 189:f392fc9709a3 | 170 | |
| AnnaBridge | 189:f392fc9709a3 | 171 | /** @defgroup DAC_output_buffer DAC output buffer |
| AnnaBridge | 189:f392fc9709a3 | 172 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 173 | */ |
| AnnaBridge | 189:f392fc9709a3 | 174 | #define DAC_OUTPUTBUFFER_ENABLE ((uint32_t)0x00000000U) |
| AnnaBridge | 189:f392fc9709a3 | 175 | #define DAC_OUTPUTBUFFER_DISABLE ((uint32_t)DAC_CR_BOFF1) |
| AnnaBridge | 189:f392fc9709a3 | 176 | |
| AnnaBridge | 189:f392fc9709a3 | 177 | #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \ |
| AnnaBridge | 189:f392fc9709a3 | 178 | ((STATE) == DAC_OUTPUTBUFFER_DISABLE)) |
| AnnaBridge | 189:f392fc9709a3 | 179 | /** |
| AnnaBridge | 189:f392fc9709a3 | 180 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 181 | */ |
| AnnaBridge | 189:f392fc9709a3 | 182 | |
| AnnaBridge | 189:f392fc9709a3 | 183 | /** @defgroup DAC_Channel_selection DAC Channel selection |
| AnnaBridge | 189:f392fc9709a3 | 184 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 185 | */ |
| AnnaBridge | 189:f392fc9709a3 | 186 | #define DAC_CHANNEL_1 ((uint32_t)0x00000000U) |
| AnnaBridge | 189:f392fc9709a3 | 187 | #if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) |
| AnnaBridge | 189:f392fc9709a3 | 188 | #define DAC_CHANNEL_2 ((uint32_t)0x00000010U) |
| AnnaBridge | 189:f392fc9709a3 | 189 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 190 | |
| AnnaBridge | 189:f392fc9709a3 | 191 | #if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) |
| AnnaBridge | 189:f392fc9709a3 | 192 | #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \ |
| AnnaBridge | 189:f392fc9709a3 | 193 | ((CHANNEL) == DAC_CHANNEL_2)) |
| AnnaBridge | 189:f392fc9709a3 | 194 | #else |
| AnnaBridge | 189:f392fc9709a3 | 195 | #define IS_DAC_CHANNEL(CHANNEL) ((CHANNEL) == DAC_CHANNEL_1) |
| AnnaBridge | 189:f392fc9709a3 | 196 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 197 | /** |
| AnnaBridge | 189:f392fc9709a3 | 198 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 199 | */ |
| AnnaBridge | 189:f392fc9709a3 | 200 | |
| AnnaBridge | 189:f392fc9709a3 | 201 | /** @defgroup DAC_data_alignement DAC data alignement |
| AnnaBridge | 189:f392fc9709a3 | 202 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 203 | */ |
| AnnaBridge | 189:f392fc9709a3 | 204 | #define DAC_ALIGN_12B_R ((uint32_t)0x00000000U) |
| AnnaBridge | 189:f392fc9709a3 | 205 | #define DAC_ALIGN_12B_L ((uint32_t)0x00000004U) |
| AnnaBridge | 189:f392fc9709a3 | 206 | #define DAC_ALIGN_8B_R ((uint32_t)0x00000008U) |
| AnnaBridge | 189:f392fc9709a3 | 207 | |
| AnnaBridge | 189:f392fc9709a3 | 208 | #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \ |
| AnnaBridge | 189:f392fc9709a3 | 209 | ((ALIGN) == DAC_ALIGN_12B_L) || \ |
| AnnaBridge | 189:f392fc9709a3 | 210 | ((ALIGN) == DAC_ALIGN_8B_R)) |
| AnnaBridge | 189:f392fc9709a3 | 211 | /** |
| AnnaBridge | 189:f392fc9709a3 | 212 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 213 | */ |
| AnnaBridge | 189:f392fc9709a3 | 214 | |
| AnnaBridge | 189:f392fc9709a3 | 215 | /** @defgroup DAC_data DAC data |
| AnnaBridge | 189:f392fc9709a3 | 216 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 217 | */ |
| AnnaBridge | 189:f392fc9709a3 | 218 | #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0U) |
| AnnaBridge | 189:f392fc9709a3 | 219 | /** |
| AnnaBridge | 189:f392fc9709a3 | 220 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 221 | */ |
| AnnaBridge | 189:f392fc9709a3 | 222 | |
| AnnaBridge | 189:f392fc9709a3 | 223 | /** @defgroup DAC_flags_definition DAC flags definition |
| AnnaBridge | 189:f392fc9709a3 | 224 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 225 | */ |
| AnnaBridge | 189:f392fc9709a3 | 226 | #define DAC_FLAG_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1) |
| AnnaBridge | 189:f392fc9709a3 | 227 | #if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) |
| AnnaBridge | 189:f392fc9709a3 | 228 | #define DAC_FLAG_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2) |
| AnnaBridge | 189:f392fc9709a3 | 229 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 230 | |
| AnnaBridge | 189:f392fc9709a3 | 231 | /** |
| AnnaBridge | 189:f392fc9709a3 | 232 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 233 | */ |
| AnnaBridge | 189:f392fc9709a3 | 234 | |
| AnnaBridge | 189:f392fc9709a3 | 235 | /** @defgroup DAC_IT_definition DAC IT definition |
| AnnaBridge | 189:f392fc9709a3 | 236 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 237 | */ |
| AnnaBridge | 189:f392fc9709a3 | 238 | #define DAC_IT_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1) |
| AnnaBridge | 189:f392fc9709a3 | 239 | #if defined (STM32L072xx) || defined (STM32L073xx) || defined (STM32L082xx) || defined (STM32L083xx) |
| AnnaBridge | 189:f392fc9709a3 | 240 | #define DAC_IT_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2) |
| AnnaBridge | 189:f392fc9709a3 | 241 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 242 | |
| AnnaBridge | 189:f392fc9709a3 | 243 | /** |
| AnnaBridge | 189:f392fc9709a3 | 244 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 245 | */ |
| AnnaBridge | 189:f392fc9709a3 | 246 | |
| AnnaBridge | 189:f392fc9709a3 | 247 | /** |
| AnnaBridge | 189:f392fc9709a3 | 248 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 249 | */ |
| AnnaBridge | 189:f392fc9709a3 | 250 | |
| AnnaBridge | 189:f392fc9709a3 | 251 | /* Exported macro ------------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 252 | |
| AnnaBridge | 189:f392fc9709a3 | 253 | /** @defgroup DAC_Exported_Macros DAC Exported Macros |
| AnnaBridge | 189:f392fc9709a3 | 254 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 255 | */ |
| AnnaBridge | 189:f392fc9709a3 | 256 | |
| AnnaBridge | 189:f392fc9709a3 | 257 | /** @brief Reset DAC handle state |
| AnnaBridge | 189:f392fc9709a3 | 258 | * @param __HANDLE__: specifies the DAC handle. |
| AnnaBridge | 189:f392fc9709a3 | 259 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 260 | */ |
| AnnaBridge | 189:f392fc9709a3 | 261 | #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET) |
| AnnaBridge | 189:f392fc9709a3 | 262 | |
| AnnaBridge | 189:f392fc9709a3 | 263 | /** @brief Enable the DAC channel |
| AnnaBridge | 189:f392fc9709a3 | 264 | * @param __HANDLE__: specifies the DAC handle. |
| AnnaBridge | 189:f392fc9709a3 | 265 | * @param __DAC_CHANNEL__: specifies the DAC channel |
| AnnaBridge | 189:f392fc9709a3 | 266 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 267 | */ |
| AnnaBridge | 189:f392fc9709a3 | 268 | #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_CHANNEL__) \ |
| AnnaBridge | 189:f392fc9709a3 | 269 | SET_BIT((__HANDLE__)->Instance->CR, (DAC_CR_EN1 << (__DAC_CHANNEL__))) |
| AnnaBridge | 189:f392fc9709a3 | 270 | |
| AnnaBridge | 189:f392fc9709a3 | 271 | /** @brief Disable the DAC channel |
| AnnaBridge | 189:f392fc9709a3 | 272 | * @param __HANDLE__: specifies the DAC handle |
| AnnaBridge | 189:f392fc9709a3 | 273 | * @param __DAC_CHANNEL__: specifies the DAC channel. |
| AnnaBridge | 189:f392fc9709a3 | 274 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 275 | */ |
| AnnaBridge | 189:f392fc9709a3 | 276 | #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_CHANNEL__) \ |
| AnnaBridge | 189:f392fc9709a3 | 277 | CLEAR_BIT((__HANDLE__)->Instance->CR, (DAC_CR_EN1 << (__DAC_CHANNEL__))) |
| AnnaBridge | 189:f392fc9709a3 | 278 | |
| AnnaBridge | 189:f392fc9709a3 | 279 | |
| AnnaBridge | 189:f392fc9709a3 | 280 | #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) \ |
| AnnaBridge | 189:f392fc9709a3 | 281 | SET_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__)) |
| AnnaBridge | 189:f392fc9709a3 | 282 | |
| AnnaBridge | 189:f392fc9709a3 | 283 | |
| AnnaBridge | 189:f392fc9709a3 | 284 | /** @brief Disable the DAC interrupt |
| AnnaBridge | 189:f392fc9709a3 | 285 | * @param __HANDLE__: specifies the DAC handle |
| AnnaBridge | 189:f392fc9709a3 | 286 | * @param __INTERRUPT__: specifies the DAC interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 287 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 288 | */ |
| AnnaBridge | 189:f392fc9709a3 | 289 | #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) \ |
| AnnaBridge | 189:f392fc9709a3 | 290 | CLEAR_BIT((__HANDLE__)->Instance->CR, (__INTERRUPT__)) |
| AnnaBridge | 189:f392fc9709a3 | 291 | |
| AnnaBridge | 189:f392fc9709a3 | 292 | /** @brief Check whether the specified DAC interrupt source is enabled or not. |
| AnnaBridge | 189:f392fc9709a3 | 293 | * @param __HANDLE__: DAC handle |
| AnnaBridge | 189:f392fc9709a3 | 294 | * @param __INTERRUPT__: DAC interrupt source to check |
| AnnaBridge | 189:f392fc9709a3 | 295 | * This parameter can be any combination of the following values: |
| AnnaBridge | 189:f392fc9709a3 | 296 | * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt |
| AnnaBridge | 189:f392fc9709a3 | 297 | * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt (STM32L072xx STM32L073xx STM32L082xx STM32L083xx only) |
| AnnaBridge | 189:f392fc9709a3 | 298 | * @retval State of interruption (SET or RESET) |
| AnnaBridge | 189:f392fc9709a3 | 299 | */ |
| AnnaBridge | 189:f392fc9709a3 | 300 | #define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) \ |
| AnnaBridge | 189:f392fc9709a3 | 301 | (((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__)) |
| AnnaBridge | 189:f392fc9709a3 | 302 | |
| AnnaBridge | 189:f392fc9709a3 | 303 | /** @brief Get the selected DAC's flag status. |
| AnnaBridge | 189:f392fc9709a3 | 304 | * @param __HANDLE__: specifies the DAC handle. |
| AnnaBridge | 189:f392fc9709a3 | 305 | * @param __FLAG__: specifies the FLAG. |
| AnnaBridge | 189:f392fc9709a3 | 306 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 307 | */ |
| AnnaBridge | 189:f392fc9709a3 | 308 | #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) \ |
| AnnaBridge | 189:f392fc9709a3 | 309 | ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__)) |
| AnnaBridge | 189:f392fc9709a3 | 310 | |
| AnnaBridge | 189:f392fc9709a3 | 311 | /** @brief Clear the DAC's flag. |
| AnnaBridge | 189:f392fc9709a3 | 312 | * @param __HANDLE__: specifies the DAC handle. |
| AnnaBridge | 189:f392fc9709a3 | 313 | * @param __FLAG__: specifies the FLAG. |
| AnnaBridge | 189:f392fc9709a3 | 314 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 315 | */ |
| AnnaBridge | 189:f392fc9709a3 | 316 | #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) \ |
| AnnaBridge | 189:f392fc9709a3 | 317 | (((__HANDLE__)->Instance->SR) = (__FLAG__)) |
| AnnaBridge | 189:f392fc9709a3 | 318 | |
| AnnaBridge | 189:f392fc9709a3 | 319 | /** |
| AnnaBridge | 189:f392fc9709a3 | 320 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 321 | */ |
| AnnaBridge | 189:f392fc9709a3 | 322 | |
| AnnaBridge | 189:f392fc9709a3 | 323 | /* Private macro ------------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 324 | |
| AnnaBridge | 189:f392fc9709a3 | 325 | /** @defgroup DAC_Private_Macros DAC Private Macros |
| AnnaBridge | 189:f392fc9709a3 | 326 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 327 | */ |
| AnnaBridge | 189:f392fc9709a3 | 328 | |
| AnnaBridge | 189:f392fc9709a3 | 329 | /** @brief Set DHR12R1 alignment |
| AnnaBridge | 189:f392fc9709a3 | 330 | * @param __ALIGNEMENT__: specifies the DAC alignement |
| AnnaBridge | 189:f392fc9709a3 | 331 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 332 | */ |
| AnnaBridge | 189:f392fc9709a3 | 333 | #define DAC_DHR12R1_ALIGNEMENT(__ALIGNEMENT__) (((uint32_t)0x00000008U) + (__ALIGNEMENT__)) |
| AnnaBridge | 189:f392fc9709a3 | 334 | |
| AnnaBridge | 189:f392fc9709a3 | 335 | /** @brief Set DHR12R2 alignment |
| AnnaBridge | 189:f392fc9709a3 | 336 | * @param __ALIGNEMENT__: specifies the DAC alignement |
| AnnaBridge | 189:f392fc9709a3 | 337 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 338 | */ |
| AnnaBridge | 189:f392fc9709a3 | 339 | #define DAC_DHR12R2_ALIGNEMENT(__ALIGNEMENT__) (((uint32_t)0x00000014U) + (__ALIGNEMENT__)) |
| AnnaBridge | 189:f392fc9709a3 | 340 | |
| AnnaBridge | 189:f392fc9709a3 | 341 | /** @brief Set DHR12RD alignment |
| AnnaBridge | 189:f392fc9709a3 | 342 | * @param __ALIGNEMENT__: specifies the DAC alignement |
| AnnaBridge | 189:f392fc9709a3 | 343 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 344 | */ |
| AnnaBridge | 189:f392fc9709a3 | 345 | #define DAC_DHR12RD_ALIGNEMENT(__ALIGNEMENT__) (((uint32_t)0x00000020U) + (__ALIGNEMENT__)) |
| AnnaBridge | 189:f392fc9709a3 | 346 | |
| AnnaBridge | 189:f392fc9709a3 | 347 | /** @brief Enable the DAC interrupt |
| AnnaBridge | 189:f392fc9709a3 | 348 | * @param __HANDLE__: specifies the DAC handle |
| AnnaBridge | 189:f392fc9709a3 | 349 | * @param __INTERRUPT__: specifies the DAC interrupt. |
| AnnaBridge | 189:f392fc9709a3 | 350 | * @retval None |
| AnnaBridge | 189:f392fc9709a3 | 351 | */ |
| AnnaBridge | 189:f392fc9709a3 | 352 | |
| AnnaBridge | 189:f392fc9709a3 | 353 | /** |
| AnnaBridge | 189:f392fc9709a3 | 354 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 355 | */ |
| AnnaBridge | 189:f392fc9709a3 | 356 | |
| AnnaBridge | 189:f392fc9709a3 | 357 | |
| AnnaBridge | 189:f392fc9709a3 | 358 | /* Include DAC HAL Extension module */ |
| AnnaBridge | 189:f392fc9709a3 | 359 | #include "stm32l0xx_hal_dac_ex.h" |
| AnnaBridge | 189:f392fc9709a3 | 360 | |
| AnnaBridge | 189:f392fc9709a3 | 361 | /* Exported functions --------------------------------------------------------*/ |
| AnnaBridge | 189:f392fc9709a3 | 362 | |
| AnnaBridge | 189:f392fc9709a3 | 363 | /** @defgroup DAC_Exported_Functions DAC Exported Functions |
| AnnaBridge | 189:f392fc9709a3 | 364 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 365 | */ |
| AnnaBridge | 189:f392fc9709a3 | 366 | |
| AnnaBridge | 189:f392fc9709a3 | 367 | /** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions |
| AnnaBridge | 189:f392fc9709a3 | 368 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 369 | */ |
| AnnaBridge | 189:f392fc9709a3 | 370 | /* Initialization and de-initialization functions *****************************/ |
| AnnaBridge | 189:f392fc9709a3 | 371 | HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac); |
| AnnaBridge | 189:f392fc9709a3 | 372 | HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac); |
| AnnaBridge | 189:f392fc9709a3 | 373 | void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac); |
| AnnaBridge | 189:f392fc9709a3 | 374 | void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac); |
| AnnaBridge | 189:f392fc9709a3 | 375 | |
| AnnaBridge | 189:f392fc9709a3 | 376 | /** |
| AnnaBridge | 189:f392fc9709a3 | 377 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 378 | */ |
| AnnaBridge | 189:f392fc9709a3 | 379 | |
| AnnaBridge | 189:f392fc9709a3 | 380 | /** @defgroup DAC_Exported_Functions_Group2 IO operation functions |
| AnnaBridge | 189:f392fc9709a3 | 381 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 382 | */ |
| AnnaBridge | 189:f392fc9709a3 | 383 | /* IO operation functions *****************************************************/ |
| AnnaBridge | 189:f392fc9709a3 | 384 | HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel); |
| AnnaBridge | 189:f392fc9709a3 | 385 | HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel); |
| AnnaBridge | 189:f392fc9709a3 | 386 | HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment); |
| AnnaBridge | 189:f392fc9709a3 | 387 | HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel); |
| AnnaBridge | 189:f392fc9709a3 | 388 | HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data); |
| AnnaBridge | 189:f392fc9709a3 | 389 | uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel); |
| AnnaBridge | 189:f392fc9709a3 | 390 | void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac); |
| AnnaBridge | 189:f392fc9709a3 | 391 | void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac); |
| AnnaBridge | 189:f392fc9709a3 | 392 | void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac); |
| AnnaBridge | 189:f392fc9709a3 | 393 | void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac); |
| AnnaBridge | 189:f392fc9709a3 | 394 | void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac); |
| AnnaBridge | 189:f392fc9709a3 | 395 | |
| AnnaBridge | 189:f392fc9709a3 | 396 | /** |
| AnnaBridge | 189:f392fc9709a3 | 397 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 398 | */ |
| AnnaBridge | 189:f392fc9709a3 | 399 | |
| AnnaBridge | 189:f392fc9709a3 | 400 | /** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions |
| AnnaBridge | 189:f392fc9709a3 | 401 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 402 | */ |
| AnnaBridge | 189:f392fc9709a3 | 403 | /* Peripheral Control functions ***********************************************/ |
| AnnaBridge | 189:f392fc9709a3 | 404 | HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel); |
| AnnaBridge | 189:f392fc9709a3 | 405 | |
| AnnaBridge | 189:f392fc9709a3 | 406 | /** |
| AnnaBridge | 189:f392fc9709a3 | 407 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 408 | */ |
| AnnaBridge | 189:f392fc9709a3 | 409 | |
| AnnaBridge | 189:f392fc9709a3 | 410 | /** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions |
| AnnaBridge | 189:f392fc9709a3 | 411 | * @{ |
| AnnaBridge | 189:f392fc9709a3 | 412 | */ |
| AnnaBridge | 189:f392fc9709a3 | 413 | /* Peripheral State functions ***************************************************/ |
| AnnaBridge | 189:f392fc9709a3 | 414 | HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac); |
| AnnaBridge | 189:f392fc9709a3 | 415 | uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac); |
| AnnaBridge | 189:f392fc9709a3 | 416 | |
| AnnaBridge | 189:f392fc9709a3 | 417 | /** |
| AnnaBridge | 189:f392fc9709a3 | 418 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 419 | */ |
| AnnaBridge | 189:f392fc9709a3 | 420 | |
| AnnaBridge | 189:f392fc9709a3 | 421 | /** |
| AnnaBridge | 189:f392fc9709a3 | 422 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 423 | */ |
| AnnaBridge | 189:f392fc9709a3 | 424 | |
| AnnaBridge | 189:f392fc9709a3 | 425 | /** |
| AnnaBridge | 189:f392fc9709a3 | 426 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 427 | */ |
| AnnaBridge | 189:f392fc9709a3 | 428 | |
| AnnaBridge | 189:f392fc9709a3 | 429 | /** |
| AnnaBridge | 189:f392fc9709a3 | 430 | * @} |
| AnnaBridge | 189:f392fc9709a3 | 431 | */ |
| AnnaBridge | 189:f392fc9709a3 | 432 | |
| AnnaBridge | 189:f392fc9709a3 | 433 | #endif /* STM32L011xx && STM32L021xx && STM32L031xx && STM32L041xx && STM32L061xx && STM32L071xx && STM32L081xx*/ |
| AnnaBridge | 189:f392fc9709a3 | 434 | |
| AnnaBridge | 189:f392fc9709a3 | 435 | #ifdef __cplusplus |
| AnnaBridge | 189:f392fc9709a3 | 436 | } |
| AnnaBridge | 189:f392fc9709a3 | 437 | #endif |
| AnnaBridge | 189:f392fc9709a3 | 438 | |
| AnnaBridge | 189:f392fc9709a3 | 439 | #endif /*__STM32L0xx_HAL_DAC_H */ |
| AnnaBridge | 189:f392fc9709a3 | 440 | |
| AnnaBridge | 189:f392fc9709a3 | 441 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
