mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

cmsis/BUILD/mbed/TARGET_DISCO_L072CZ_LRWAN1/TOOLCHAIN_IAR/mbed_rtx.h@189:f392fc9709a3, 2019-02-20 (annotated)

Committer:
AnnaBridge
Date:
Wed Feb 20 22:31:08 2019 +0000
Revision:
189:f392fc9709a3
mbed library release version 165

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 189:f392fc9709a3 1 /* mbed Microcontroller Library
AnnaBridge 189:f392fc9709a3 2 * Copyright (c) 2017 ARM Limited
AnnaBridge 189:f392fc9709a3 3 *
AnnaBridge 189:f392fc9709a3 4 * Licensed under the Apache License, Version 2.0 (the "License");
AnnaBridge 189:f392fc9709a3 5 * you may not use this file except in compliance with the License.
AnnaBridge 189:f392fc9709a3 6 * You may obtain a copy of the License at
AnnaBridge 189:f392fc9709a3 7 *
AnnaBridge 189:f392fc9709a3 8 * http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 189:f392fc9709a3 9 *
AnnaBridge 189:f392fc9709a3 10 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 189:f392fc9709a3 11 * distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 189:f392fc9709a3 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 189:f392fc9709a3 13 * See the License for the specific language governing permissions and
AnnaBridge 189:f392fc9709a3 14 * limitations under the License.
AnnaBridge 189:f392fc9709a3 15 */
AnnaBridge 189:f392fc9709a3 16
AnnaBridge 189:f392fc9709a3 17 #ifndef MBED_MBED_RTX_H
AnnaBridge 189:f392fc9709a3 18 #define MBED_MBED_RTX_H
AnnaBridge 189:f392fc9709a3 19
AnnaBridge 189:f392fc9709a3 20 #include <stdint.h>
AnnaBridge 189:f392fc9709a3 21
AnnaBridge 189:f392fc9709a3 22 #ifndef INITIAL_SP
AnnaBridge 189:f392fc9709a3 23
AnnaBridge 189:f392fc9709a3 24 #if (defined(TARGET_STM32L475VG) ||\
AnnaBridge 189:f392fc9709a3 25 defined(TARGET_STM32L476RG) ||\
AnnaBridge 189:f392fc9709a3 26 defined(TARGET_STM32L476JG) ||\
AnnaBridge 189:f392fc9709a3 27 defined(TARGET_STM32L476VG) ||\
AnnaBridge 189:f392fc9709a3 28 defined(TARGET_STM32L486RG) ||\
AnnaBridge 189:f392fc9709a3 29 defined(TARGET_STM32L471QG))
AnnaBridge 189:f392fc9709a3 30 /* only GCC_ARM and IAR toolchains have the stack on SRAM2 */
AnnaBridge 189:f392fc9709a3 31 #if (((defined(__GNUC__) && !defined(__CC_ARM)) ||\
AnnaBridge 189:f392fc9709a3 32 defined(__IAR_SYSTEMS_ICC__ )) &&\
AnnaBridge 189:f392fc9709a3 33 defined(TWO_RAM_REGIONS))
AnnaBridge 189:f392fc9709a3 34 #define INITIAL_SP (0x10008000UL)
AnnaBridge 189:f392fc9709a3 35 #else
AnnaBridge 189:f392fc9709a3 36 #define INITIAL_SP (0x20018000UL)
AnnaBridge 189:f392fc9709a3 37 #endif /* toolchains */
AnnaBridge 189:f392fc9709a3 38
AnnaBridge 189:f392fc9709a3 39 #elif (defined(TARGET_STM32F051R8) ||\
AnnaBridge 189:f392fc9709a3 40 defined(TARGET_STM32F100RB) ||\
AnnaBridge 189:f392fc9709a3 41 defined(TARGET_STM32L031K6) ||\
AnnaBridge 189:f392fc9709a3 42 defined(TARGET_STM32L053C8) ||\
AnnaBridge 189:f392fc9709a3 43 defined(TARGET_STM32L053R8))
AnnaBridge 189:f392fc9709a3 44 #define INITIAL_SP (0x20002000UL)
AnnaBridge 189:f392fc9709a3 45
AnnaBridge 189:f392fc9709a3 46 #elif (defined(TARGET_STM32F303K8) ||\
AnnaBridge 189:f392fc9709a3 47 defined(TARGET_STM32F334C8) ||\
AnnaBridge 189:f392fc9709a3 48 defined(TARGET_STM32F334R8))
AnnaBridge 189:f392fc9709a3 49 #define INITIAL_SP (0x20003000UL)
AnnaBridge 189:f392fc9709a3 50
AnnaBridge 189:f392fc9709a3 51 #elif (defined(TARGET_STM32F070RB) ||\
AnnaBridge 189:f392fc9709a3 52 defined(TARGET_STM32F072RB) ||\
AnnaBridge 189:f392fc9709a3 53 defined(TARGET_STM32F302R8))
AnnaBridge 189:f392fc9709a3 54 #define INITIAL_SP (0x20004000UL)
AnnaBridge 189:f392fc9709a3 55
AnnaBridge 189:f392fc9709a3 56 #elif (defined(TARGET_STM32F103RB) ||\
AnnaBridge 189:f392fc9709a3 57 defined(TARGET_STM32F103C8) ||\
AnnaBridge 189:f392fc9709a3 58 defined(TARGET_STM32L072CZ) ||\
AnnaBridge 189:f392fc9709a3 59 defined(TARGET_STM32L073RZ) ||\
AnnaBridge 189:f392fc9709a3 60 defined(TARGET_STM32L0x2xZ))
AnnaBridge 189:f392fc9709a3 61 #define INITIAL_SP (0x20005000UL)
AnnaBridge 189:f392fc9709a3 62
AnnaBridge 189:f392fc9709a3 63 #elif (defined(TARGET_STM32F091RC) ||\
AnnaBridge 189:f392fc9709a3 64 defined(TARGET_STM32F410RB) ||\
AnnaBridge 189:f392fc9709a3 65 defined(TARGET_STM32L151CBA)||\
AnnaBridge 189:f392fc9709a3 66 defined(TARGET_STM32L151CC) ||\
AnnaBridge 189:f392fc9709a3 67 defined(TARGET_STM32L151RC) ||\
AnnaBridge 189:f392fc9709a3 68 defined(TARGET_STM32L152RC))
AnnaBridge 189:f392fc9709a3 69 #define INITIAL_SP (0x20008000UL)
AnnaBridge 189:f392fc9709a3 70
AnnaBridge 189:f392fc9709a3 71 #elif defined(TARGET_STM32F303VC)
AnnaBridge 189:f392fc9709a3 72 #define INITIAL_SP (0x2000A000UL)
AnnaBridge 189:f392fc9709a3 73
AnnaBridge 189:f392fc9709a3 74 #elif defined(TARGET_STM32L443RC)
AnnaBridge 189:f392fc9709a3 75 #define INITIAL_SP (0x2000C000UL)
AnnaBridge 189:f392fc9709a3 76
AnnaBridge 189:f392fc9709a3 77 #elif (defined(TARGET_STM32F303RE) ||\
AnnaBridge 189:f392fc9709a3 78 defined(TARGET_STM32F303ZE) ||\
AnnaBridge 189:f392fc9709a3 79 defined(TARGET_STM32F401VC) ||\
AnnaBridge 189:f392fc9709a3 80 defined(TARGET_STM32L432KC) ||\
AnnaBridge 189:f392fc9709a3 81 defined(TARGET_STM32L433RC))
AnnaBridge 189:f392fc9709a3 82 #define INITIAL_SP (0x20010000UL)
AnnaBridge 189:f392fc9709a3 83
AnnaBridge 189:f392fc9709a3 84 #elif defined(TARGET_STM32L152RE)
AnnaBridge 189:f392fc9709a3 85 #define INITIAL_SP (0x20014000UL)
AnnaBridge 189:f392fc9709a3 86
AnnaBridge 189:f392fc9709a3 87 #elif (defined(TARGET_STM32F401RE) ||\
AnnaBridge 189:f392fc9709a3 88 defined(TARGET_STM32F401VE))
AnnaBridge 189:f392fc9709a3 89 #define INITIAL_SP (0x20018000UL)
AnnaBridge 189:f392fc9709a3 90
AnnaBridge 189:f392fc9709a3 91 #elif (defined(TARGET_STM32F207ZG) ||\
AnnaBridge 189:f392fc9709a3 92 defined(TARGET_STM32F405RG) ||\
AnnaBridge 189:f392fc9709a3 93 defined(TARGET_STM32F407VG) ||\
AnnaBridge 189:f392fc9709a3 94 defined(TARGET_STM32F411RE) ||\
AnnaBridge 189:f392fc9709a3 95 defined(TARGET_STM32F446RE) ||\
AnnaBridge 189:f392fc9709a3 96 defined(TARGET_STM32F446VE) ||\
AnnaBridge 189:f392fc9709a3 97 defined(TARGET_STM32F446ZE) ||\
AnnaBridge 189:f392fc9709a3 98 defined(TARGET_STM32H743ZI) ||\
AnnaBridge 189:f392fc9709a3 99 defined(TARGET_STM32H753ZI))
AnnaBridge 189:f392fc9709a3 100 #define INITIAL_SP (0x20020000UL)
AnnaBridge 189:f392fc9709a3 101
AnnaBridge 189:f392fc9709a3 102 #elif (defined(TARGET_STM32F429ZI) ||\
AnnaBridge 189:f392fc9709a3 103 defined(TARGET_STM32F437VG) ||\
AnnaBridge 189:f392fc9709a3 104 defined(TARGET_STM32F439VI) ||\
AnnaBridge 189:f392fc9709a3 105 defined(TARGET_STM32F439ZI))
AnnaBridge 189:f392fc9709a3 106 #define INITIAL_SP (0x20030000UL)
AnnaBridge 189:f392fc9709a3 107
AnnaBridge 189:f392fc9709a3 108 #elif defined(TARGET_STM32F412ZG)
AnnaBridge 189:f392fc9709a3 109 #define INITIAL_SP (0x20040000UL)
AnnaBridge 189:f392fc9709a3 110
AnnaBridge 189:f392fc9709a3 111 #elif (defined(TARGET_STM32F413ZH) ||\
AnnaBridge 189:f392fc9709a3 112 defined(TARGET_STM32F469NI) ||\
AnnaBridge 189:f392fc9709a3 113 defined(TARGET_STM32F746NG) ||\
AnnaBridge 189:f392fc9709a3 114 defined(TARGET_STM32F746ZG) ||\
AnnaBridge 189:f392fc9709a3 115 defined(TARGET_STM32F756ZG) ||\
AnnaBridge 189:f392fc9709a3 116 defined(TARGET_STM32L496AG) ||\
AnnaBridge 189:f392fc9709a3 117 defined(TARGET_STM32L496ZG))
AnnaBridge 189:f392fc9709a3 118 #define INITIAL_SP (0x20050000UL)
AnnaBridge 189:f392fc9709a3 119
AnnaBridge 189:f392fc9709a3 120 #elif (defined(TARGET_STM32F767ZI) ||\
AnnaBridge 189:f392fc9709a3 121 defined(TARGET_STM32F769NI))
AnnaBridge 189:f392fc9709a3 122 #define INITIAL_SP (0x20080000UL)
AnnaBridge 189:f392fc9709a3 123
AnnaBridge 189:f392fc9709a3 124 #elif defined(TARGET_STM32L4R5ZI)
AnnaBridge 189:f392fc9709a3 125 #define INITIAL_SP (0x200A0000UL)
AnnaBridge 189:f392fc9709a3 126
AnnaBridge 189:f392fc9709a3 127 #else
AnnaBridge 189:f392fc9709a3 128 #error "INITIAL_SP is not defined for this target in the mbed_rtx.h file"
AnnaBridge 189:f392fc9709a3 129 #endif
AnnaBridge 189:f392fc9709a3 130
AnnaBridge 189:f392fc9709a3 131 #endif // INITIAL_SP
AnnaBridge 189:f392fc9709a3 132 #if (defined(__GNUC__) && !defined(__CC_ARM) && !defined(__ARMCC_VERSION) && defined(TWO_RAM_REGIONS))
AnnaBridge 189:f392fc9709a3 133 extern uint32_t __StackLimit[];
AnnaBridge 189:f392fc9709a3 134 extern uint32_t __StackTop[];
AnnaBridge 189:f392fc9709a3 135 extern uint32_t __end__[];
AnnaBridge 189:f392fc9709a3 136 extern uint32_t __HeapLimit[];
AnnaBridge 189:f392fc9709a3 137 #define HEAP_START ((unsigned char*)__end__)
AnnaBridge 189:f392fc9709a3 138 #define HEAP_SIZE ((uint32_t)((uint32_t)__HeapLimit - (uint32_t)HEAP_START))
AnnaBridge 189:f392fc9709a3 139 #define ISR_STACK_START ((unsigned char*)__StackLimit)
AnnaBridge 189:f392fc9709a3 140 #define ISR_STACK_SIZE ((uint32_t)((uint32_t)__StackTop - (uint32_t)__StackLimit))
AnnaBridge 189:f392fc9709a3 141 #endif
AnnaBridge 189:f392fc9709a3 142
AnnaBridge 189:f392fc9709a3 143 #if (defined(TARGET_STM32F070RB) || defined(TARGET_STM32F072RB))
AnnaBridge 189:f392fc9709a3 144 #if (defined(__GNUC__) && !defined(__CC_ARM) && !defined(__ARMCC_VERSION))
AnnaBridge 189:f392fc9709a3 145 extern uint32_t __StackLimit;
AnnaBridge 189:f392fc9709a3 146 extern uint32_t __StackTop;
AnnaBridge 189:f392fc9709a3 147 extern uint32_t __end__;
AnnaBridge 189:f392fc9709a3 148 extern uint32_t __HeapLimit;
AnnaBridge 189:f392fc9709a3 149 #define HEAP_START ((unsigned char*) &__end__)
AnnaBridge 189:f392fc9709a3 150 #define HEAP_SIZE ((uint32_t)((uint32_t) &__HeapLimit - (uint32_t) HEAP_START))
AnnaBridge 189:f392fc9709a3 151 #define ISR_STACK_START ((unsigned char*) &__StackLimit)
AnnaBridge 189:f392fc9709a3 152 #define ISR_STACK_SIZE ((uint32_t)((uint32_t) &__StackTop - (uint32_t) &__StackLimit))
AnnaBridge 189:f392fc9709a3 153 #endif
AnnaBridge 189:f392fc9709a3 154
AnnaBridge 189:f392fc9709a3 155 #ifdef MBED_CONF_RTOS_MAIN_THREAD_STACK_SIZE
AnnaBridge 189:f392fc9709a3 156 #undef MBED_CONF_RTOS_MAIN_THREAD_STACK_SIZE
AnnaBridge 189:f392fc9709a3 157 #endif
AnnaBridge 189:f392fc9709a3 158 #define MBED_CONF_RTOS_MAIN_THREAD_STACK_SIZE 3072
AnnaBridge 189:f392fc9709a3 159
AnnaBridge 189:f392fc9709a3 160 #endif
AnnaBridge 189:f392fc9709a3 161
AnnaBridge 189:f392fc9709a3 162 #endif // MBED_MBED_RTX_H