mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/hal/TARGET_ONSEMI/TARGET_NCS36510/gpio_api.c@144:ef7eb2e8f9f7, 2016-09-02 (annotated)

Committer:
<>
Date:
Fri Sep 02 15:07:44 2016 +0100
Revision:
144:ef7eb2e8f9f7
Child:
147:30b64687e01f
This updates the lib to the mbed lib v125

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file gpio_api.c
<> 144:ef7eb2e8f9f7 4 * @brief Implementation of a GPIO driver
<> 144:ef7eb2e8f9f7 5 * @internal
<> 144:ef7eb2e8f9f7 6 * @author ON Semiconductor
<> 144:ef7eb2e8f9f7 7 * $Rev:
<> 144:ef7eb2e8f9f7 8 * $Date: 2015-11-04 $
<> 144:ef7eb2e8f9f7 9 ******************************************************************************
<> 144:ef7eb2e8f9f7 10 * @copyright (c) 2012 ON Semiconductor. All rights reserved.
<> 144:ef7eb2e8f9f7 11 * ON Semiconductor is supplying this software for use with ON Semiconductor
<> 144:ef7eb2e8f9f7 12 * processor based microcontrollers only.
<> 144:ef7eb2e8f9f7 13 *
<> 144:ef7eb2e8f9f7 14 * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
<> 144:ef7eb2e8f9f7 15 * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
<> 144:ef7eb2e8f9f7 16 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
<> 144:ef7eb2e8f9f7 17 * ON SEMICONDUCTOR SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL,
<> 144:ef7eb2e8f9f7 18 * INCIDENTAL, OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
<> 144:ef7eb2e8f9f7 19 * @endinternal
<> 144:ef7eb2e8f9f7 20 *
<> 144:ef7eb2e8f9f7 21 * @ingroup gpio
<> 144:ef7eb2e8f9f7 22 *
<> 144:ef7eb2e8f9f7 23 * @details
<> 144:ef7eb2e8f9f7 24 *
<> 144:ef7eb2e8f9f7 25 * @internal
<> 144:ef7eb2e8f9f7 26 * <h1> Reference document(s) </h1>
<> 144:ef7eb2e8f9f7 27 * <p>
<> 144:ef7eb2e8f9f7 28 * Reference document: IPC7203 APB GPIO Design Specification v1.2</a>
<> 144:ef7eb2e8f9f7 29 * </p>
<> 144:ef7eb2e8f9f7 30 * @endinternal
<> 144:ef7eb2e8f9f7 31 *
<> 144:ef7eb2e8f9f7 32 * <h1> Functional description (internal) </h1>
<> 144:ef7eb2e8f9f7 33 * <p>
<> 144:ef7eb2e8f9f7 34 * Each GPIO line can be independently programmed as an input or an output. Separate Set
<> 144:ef7eb2e8f9f7 35 * and Clear registers are provided since it is likely that different software tasks may be
<> 144:ef7eb2e8f9f7 36 * servicing different I/O signals. Inputs are synchronized to the system clock
<> 144:ef7eb2e8f9f7 37 * through a pair of flip-flops. Each input can be programmed
<> 144:ef7eb2e8f9f7 38 * to cause an interrupt to be generated. The interrupt can be programmed to be level-sensitive
<> 144:ef7eb2e8f9f7 39 * or edge-sensitive and the level (high or low) or edge (rising, falling or either) that causes
<> 144:ef7eb2e8f9f7 40 * the interrupt can be selected. Interrupts can be individually enabled or disabled.
<> 144:ef7eb2e8f9f7 41 * Level-sensitive interrupts stay asserted until the interrupting condition is cleared.
<> 144:ef7eb2e8f9f7 42 * Edge-triggered interrupts are cleared by writing to the GPIO interrupt clear register.
<> 144:ef7eb2e8f9f7 43 * </p>
<> 144:ef7eb2e8f9f7 44 *
<> 144:ef7eb2e8f9f7 45 * <h1> Use of GPIO driver in SW </h1>
<> 144:ef7eb2e8f9f7 46 * <p>
<> 144:ef7eb2e8f9f7 47 * The user of the GPIO driver should set the pin as GPIO, using crossbar.
<> 144:ef7eb2e8f9f7 48 * Init the GPIO and configure the mode and direction.This will return a device pointer. One device controls all GPIO's. It is not
<> 144:ef7eb2e8f9f7 49 * needed nor supported to create a device per GPIO.
<> 144:ef7eb2e8f9f7 50 * Next, the user should call the fGpioOpen function with the device and options as paramter.
<> 144:ef7eb2e8f9f7 51 * </p>
<> 144:ef7eb2e8f9f7 52 * <p>
<> 144:ef7eb2e8f9f7 53 * Use the device driver fGpioIoctl function to change the behavior of the GPIO's and to register an
<> 144:ef7eb2e8f9f7 54 * interrupt handler for each IO that has an interrupt enabled. There is one interrupt for all GPIO's.
<> 144:ef7eb2e8f9f7 55 * The GPIO driver will look up what IO caused the interrupt and call the respective interrupt handler.
<> 144:ef7eb2e8f9f7 56 * </p>
<> 144:ef7eb2e8f9f7 57 */
<> 144:ef7eb2e8f9f7 58
<> 144:ef7eb2e8f9f7 59 #include "gpio.h"
<> 144:ef7eb2e8f9f7 60
<> 144:ef7eb2e8f9f7 61 /* Include from the mbed-hal layer */
<> 144:ef7eb2e8f9f7 62 #include "gpio_api.h"
<> 144:ef7eb2e8f9f7 63 #include "pinmap.h"
<> 144:ef7eb2e8f9f7 64
<> 144:ef7eb2e8f9f7 65
<> 144:ef7eb2e8f9f7 66 /** Set the given pin as GPIO
<> 144:ef7eb2e8f9f7 67 *
<> 144:ef7eb2e8f9f7 68 * @param pin The pin to be set as GPIO
<> 144:ef7eb2e8f9f7 69 * @return The GPIO port mask for this pin
<> 144:ef7eb2e8f9f7 70 **/
<> 144:ef7eb2e8f9f7 71 uint32_t gpio_set(PinName pin)
<> 144:ef7eb2e8f9f7 72 {
<> 144:ef7eb2e8f9f7 73 if (pin != NC) {
<> 144:ef7eb2e8f9f7 74 /* Configure to GPIO using pin function API*/
<> 144:ef7eb2e8f9f7 75 pin_function(pin, CONFIGURE_AS_GPIO);
<> 144:ef7eb2e8f9f7 76
<> 144:ef7eb2e8f9f7 77 return ((uint32_t) 0x1 << pin);
<> 144:ef7eb2e8f9f7 78
<> 144:ef7eb2e8f9f7 79 }
<> 144:ef7eb2e8f9f7 80
<> 144:ef7eb2e8f9f7 81 return(0x00000000);
<> 144:ef7eb2e8f9f7 82
<> 144:ef7eb2e8f9f7 83 }
<> 144:ef7eb2e8f9f7 84
<> 144:ef7eb2e8f9f7 85 /** Initialize the GPIO pin
<> 144:ef7eb2e8f9f7 86 *
<> 144:ef7eb2e8f9f7 87 * @param obj The GPIO object to initialize
<> 144:ef7eb2e8f9f7 88 * @param pin The GPIO pin to initialize
<> 144:ef7eb2e8f9f7 89 */
<> 144:ef7eb2e8f9f7 90 void gpio_init(gpio_t *obj, PinName pin)
<> 144:ef7eb2e8f9f7 91 {
<> 144:ef7eb2e8f9f7 92 /* Initialize the GPIO membase */
<> 144:ef7eb2e8f9f7 93 obj->GPIOMEMBASE = GPIOREG;
<> 144:ef7eb2e8f9f7 94
<> 144:ef7eb2e8f9f7 95 /* Initialize the pin to be GPIO */
<> 144:ef7eb2e8f9f7 96 obj->gpioPin = pin;
<> 144:ef7eb2e8f9f7 97 obj->gpioMask = gpio_set(pin);
<> 144:ef7eb2e8f9f7 98
<> 144:ef7eb2e8f9f7 99 /* Enable the GPIO clock */
<> 144:ef7eb2e8f9f7 100 CLOCK_ENABLE(CLOCK_GPIO);
<> 144:ef7eb2e8f9f7 101
<> 144:ef7eb2e8f9f7 102 /* Set the drive strength of the pin to 1 by default */
<> 144:ef7eb2e8f9f7 103 /** - Get PAD IO register address for the PAD number */
<> 144:ef7eb2e8f9f7 104 PadReg_t *PadRegOffset = (PadReg_t*)(PADREG_BASE + (pin * PAD_REG_ADRS_BYTE_SIZE));
<> 144:ef7eb2e8f9f7 105
<> 144:ef7eb2e8f9f7 106 /* - Disable the GPIO clock */
<> 144:ef7eb2e8f9f7 107 CLOCK_DISABLE(CLOCK_GPIO);
<> 144:ef7eb2e8f9f7 108
<> 144:ef7eb2e8f9f7 109 /** - Enable the clock for PAD peripheral device */
<> 144:ef7eb2e8f9f7 110 CLOCK_ENABLE(CLOCK_PAD);
<> 144:ef7eb2e8f9f7 111
<> 144:ef7eb2e8f9f7 112 /** - Set drive type, pulltype & drive strength */
<> 144:ef7eb2e8f9f7 113 PadRegOffset->PADIO0.BITS.POWER = 1;
<> 144:ef7eb2e8f9f7 114
<> 144:ef7eb2e8f9f7 115 /** - Disable the clock for PAD peripheral device */
<> 144:ef7eb2e8f9f7 116 CLOCK_DISABLE(CLOCK_PAD);
<> 144:ef7eb2e8f9f7 117 }
<> 144:ef7eb2e8f9f7 118
<> 144:ef7eb2e8f9f7 119 /** Set the input pin mode
<> 144:ef7eb2e8f9f7 120 *
<> 144:ef7eb2e8f9f7 121 * @param obj The GPIO object
<> 144:ef7eb2e8f9f7 122 * @param mode The pin mode to be set
<> 144:ef7eb2e8f9f7 123 */
<> 144:ef7eb2e8f9f7 124 void gpio_mode(gpio_t *obj, PinMode mode)
<> 144:ef7eb2e8f9f7 125 {
<> 144:ef7eb2e8f9f7 126 uint32_t pin = obj->gpioPin;
<> 144:ef7eb2e8f9f7 127
<> 144:ef7eb2e8f9f7 128 /* Set the mode for the pin */
<> 144:ef7eb2e8f9f7 129 pin_mode((PinName)pin, mode);
<> 144:ef7eb2e8f9f7 130 }
<> 144:ef7eb2e8f9f7 131
<> 144:ef7eb2e8f9f7 132 /** Set the pin direction
<> 144:ef7eb2e8f9f7 133 *
<> 144:ef7eb2e8f9f7 134 * @param obj The GPIO object
<> 144:ef7eb2e8f9f7 135 * @param direction The pin direction to be set
<> 144:ef7eb2e8f9f7 136 */
<> 144:ef7eb2e8f9f7 137 void gpio_dir(gpio_t *obj, PinDirection direction)
<> 144:ef7eb2e8f9f7 138 {
<> 144:ef7eb2e8f9f7 139 /* Enable the GPIO clock */
<> 144:ef7eb2e8f9f7 140 CLOCK_ENABLE(CLOCK_GPIO);
<> 144:ef7eb2e8f9f7 141
<> 144:ef7eb2e8f9f7 142 if (direction == PIN_INPUT) {
<> 144:ef7eb2e8f9f7 143 obj->GPIOMEMBASE->W_IN = obj->gpioMask;
<> 144:ef7eb2e8f9f7 144 } else if (direction == PIN_OUTPUT) {
<> 144:ef7eb2e8f9f7 145 obj->GPIOMEMBASE->W_OUT = obj->gpioMask;
<> 144:ef7eb2e8f9f7 146 }
<> 144:ef7eb2e8f9f7 147
<> 144:ef7eb2e8f9f7 148 /* - Disable the GPIO clock */
<> 144:ef7eb2e8f9f7 149 CLOCK_DISABLE(CLOCK_GPIO);
<> 144:ef7eb2e8f9f7 150 }
<> 144:ef7eb2e8f9f7 151
<> 144:ef7eb2e8f9f7 152 /** Set the output value
<> 144:ef7eb2e8f9f7 153 *
<> 144:ef7eb2e8f9f7 154 * @param obj The GPIO object
<> 144:ef7eb2e8f9f7 155 * @param value The value to be set
<> 144:ef7eb2e8f9f7 156 */
<> 144:ef7eb2e8f9f7 157 void gpio_write(gpio_t *obj, int value)
<> 144:ef7eb2e8f9f7 158 {
<> 144:ef7eb2e8f9f7 159 /* Enable the GPIO clock */
<> 144:ef7eb2e8f9f7 160 CLOCK_ENABLE(CLOCK_GPIO);
<> 144:ef7eb2e8f9f7 161
<> 144:ef7eb2e8f9f7 162 /* Set the GPIO based on value */
<> 144:ef7eb2e8f9f7 163 if (value) {
<> 144:ef7eb2e8f9f7 164 obj->GPIOMEMBASE->R_STATE_W_SET = obj->gpioMask;
<> 144:ef7eb2e8f9f7 165 } else {
<> 144:ef7eb2e8f9f7 166 obj->GPIOMEMBASE->R_IRQ_W_CLEAR = obj->gpioMask;
<> 144:ef7eb2e8f9f7 167 }
<> 144:ef7eb2e8f9f7 168
<> 144:ef7eb2e8f9f7 169 /* - Disable the GPIO clock */
<> 144:ef7eb2e8f9f7 170 CLOCK_DISABLE(CLOCK_GPIO);
<> 144:ef7eb2e8f9f7 171 }
<> 144:ef7eb2e8f9f7 172
<> 144:ef7eb2e8f9f7 173 /** Read the input value
<> 144:ef7eb2e8f9f7 174 *
<> 144:ef7eb2e8f9f7 175 * @param obj The GPIO object
<> 144:ef7eb2e8f9f7 176 * @return An integer value 1 or 0
<> 144:ef7eb2e8f9f7 177 */
<> 144:ef7eb2e8f9f7 178 int gpio_read(gpio_t *obj)
<> 144:ef7eb2e8f9f7 179 {
<> 144:ef7eb2e8f9f7 180 int ret;
<> 144:ef7eb2e8f9f7 181
<> 144:ef7eb2e8f9f7 182 /* Enable the GPIO clock */
<> 144:ef7eb2e8f9f7 183 CLOCK_ENABLE(CLOCK_GPIO);
<> 144:ef7eb2e8f9f7 184
<> 144:ef7eb2e8f9f7 185 ret = (obj->GPIOMEMBASE->R_STATE_W_SET & obj->gpioMask) ? 1: 0;
<> 144:ef7eb2e8f9f7 186
<> 144:ef7eb2e8f9f7 187 /* - Disable the GPIO clock */
<> 144:ef7eb2e8f9f7 188 CLOCK_DISABLE(CLOCK_GPIO);
<> 144:ef7eb2e8f9f7 189
<> 144:ef7eb2e8f9f7 190 return ret;
<> 144:ef7eb2e8f9f7 191 }