mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/cmsis/TARGET_STM/TARGET_STM32F0/stm32f0xx_hal_uart.c@144:ef7eb2e8f9f7, 2016-09-02 (annotated)

Committer:
<>
Date:
Fri Sep 02 15:07:44 2016 +0100
Revision:
144:ef7eb2e8f9f7
Parent:
0:9b334a45a8ff 
This updates the lib to the mbed lib v125

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f0xx_hal_uart.c
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @version V1.4.0
<> 144:ef7eb2e8f9f7 6 * @date 27-May-2016
<> 144:ef7eb2e8f9f7 7 * @brief UART HAL module driver.
<> 144:ef7eb2e8f9f7 8 * This file provides firmware functions to manage the following
<> 144:ef7eb2e8f9f7 9 * functionalities of the Universal Asynchronous Receiver Transmitter (UART) peripheral:
<> 144:ef7eb2e8f9f7 10 * + Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 11 * + IO operation functions
<> 144:ef7eb2e8f9f7 12 * + Peripheral Control functions
<> 144:ef7eb2e8f9f7 13 * + Peripheral State and Errors functions
<> 144:ef7eb2e8f9f7 14 *
<> 144:ef7eb2e8f9f7 15 @verbatim
<> 144:ef7eb2e8f9f7 16 ===============================================================================
<> 144:ef7eb2e8f9f7 17 ##### How to use this driver #####
<> 144:ef7eb2e8f9f7 18 ===============================================================================
<> 144:ef7eb2e8f9f7 19 [..]
<> 144:ef7eb2e8f9f7 20 The UART HAL driver can be used as follows:
<> 144:ef7eb2e8f9f7 21
<> 144:ef7eb2e8f9f7 22 (#) Declare a UART_HandleTypeDef handle structure (eg. UART_HandleTypeDef huart).
<> 144:ef7eb2e8f9f7 23 (#) Initialize the UART low level resources by implementing the HAL_UART_MspInit() API:
<> 144:ef7eb2e8f9f7 24 (++) Enable the USARTx interface clock.
<> 144:ef7eb2e8f9f7 25 (++) UART pins configuration:
<> 144:ef7eb2e8f9f7 26 (+++) Enable the clock for the UART GPIOs.
<> 144:ef7eb2e8f9f7 27 (+++) Configure these UART pins as alternate function pull-up.
<> 144:ef7eb2e8f9f7 28 (++) NVIC configuration if you need to use interrupt process (HAL_UART_Transmit_IT()
<> 144:ef7eb2e8f9f7 29 and HAL_UART_Receive_IT() APIs):
<> 144:ef7eb2e8f9f7 30 (+++) Configure the USARTx interrupt priority.
<> 144:ef7eb2e8f9f7 31 (+++) Enable the NVIC USART IRQ handle.
<> 144:ef7eb2e8f9f7 32 (++) UART interrupts handling:
<> 144:ef7eb2e8f9f7 33 -@@- The specific UART interrupts (Transmission complete interrupt,
<> 144:ef7eb2e8f9f7 34 RXNE interrupt and Error Interrupts) are managed using the macros
<> 144:ef7eb2e8f9f7 35 __HAL_UART_ENABLE_IT() and __HAL_UART_DISABLE_IT() inside the transmit and receive processes.
<> 144:ef7eb2e8f9f7 36 (++) DMA Configuration if you need to use DMA process (HAL_UART_Transmit_DMA()
<> 144:ef7eb2e8f9f7 37 and HAL_UART_Receive_DMA() APIs):
<> 144:ef7eb2e8f9f7 38 (+++) Declare a DMA handle structure for the Tx/Rx channel.
<> 144:ef7eb2e8f9f7 39 (+++) Enable the DMAx interface clock.
<> 144:ef7eb2e8f9f7 40 (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.
<> 144:ef7eb2e8f9f7 41 (+++) Configure the DMA Tx/Rx channel.
<> 144:ef7eb2e8f9f7 42 (+++) Associate the initialized DMA handle to the UART DMA Tx/Rx handle.
<> 144:ef7eb2e8f9f7 43 (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx/Rx channel.
<> 144:ef7eb2e8f9f7 44
<> 144:ef7eb2e8f9f7 45 (#) Program the Baud Rate, Word Length, Stop Bit, Parity, Hardware
<> 144:ef7eb2e8f9f7 46 flow control and Mode (Receiver/Transmitter) in the huart handle Init structure.
<> 144:ef7eb2e8f9f7 47
<> 144:ef7eb2e8f9f7 48 (#) If required, program UART advanced features (TX/RX pins swap, auto Baud rate detection,...)
<> 144:ef7eb2e8f9f7 49 in the huart handle AdvancedInit structure.
<> 144:ef7eb2e8f9f7 50
<> 144:ef7eb2e8f9f7 51 (#) For the UART asynchronous mode, initialize the UART registers by calling
<> 144:ef7eb2e8f9f7 52 the HAL_UART_Init() API.
<> 144:ef7eb2e8f9f7 53
<> 144:ef7eb2e8f9f7 54 (#) For the UART Half duplex mode, initialize the UART registers by calling
<> 144:ef7eb2e8f9f7 55 the HAL_HalfDuplex_Init() API.
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 (#) For the UART Multiprocessor mode, initialize the UART registers
<> 144:ef7eb2e8f9f7 58 by calling the HAL_MultiProcessor_Init() API.
<> 144:ef7eb2e8f9f7 59
<> 144:ef7eb2e8f9f7 60 (#) For the UART RS485 Driver Enabled mode, initialize the UART registers
<> 144:ef7eb2e8f9f7 61 by calling the HAL_RS485Ex_Init() API.
<> 144:ef7eb2e8f9f7 62
<> 144:ef7eb2e8f9f7 63 [..]
<> 144:ef7eb2e8f9f7 64 (@) These APIs(HAL_UART_Init(), HAL_HalfDuplex_Init(), HAL_MultiProcessor_Init(),
<> 144:ef7eb2e8f9f7 65 also configure the low level Hardware GPIO, CLOCK, CORTEX...etc) by
<> 144:ef7eb2e8f9f7 66 calling the customized HAL_UART_MspInit() API.
<> 144:ef7eb2e8f9f7 67
<> 144:ef7eb2e8f9f7 68 Three operation modes are available within this driver :
<> 144:ef7eb2e8f9f7 69
<> 144:ef7eb2e8f9f7 70 *** Polling mode IO operation ***
<> 144:ef7eb2e8f9f7 71 =================================
<> 144:ef7eb2e8f9f7 72 [..]
<> 144:ef7eb2e8f9f7 73 (+) Send an amount of data in blocking mode using HAL_UART_Transmit()
<> 144:ef7eb2e8f9f7 74 (+) Receive an amount of data in blocking mode using HAL_UART_Receive()
<> 144:ef7eb2e8f9f7 75
<> 144:ef7eb2e8f9f7 76 *** Interrupt mode IO operation ***
<> 144:ef7eb2e8f9f7 77 ===================================
<> 144:ef7eb2e8f9f7 78 [..]
<> 144:ef7eb2e8f9f7 79 (+) Send an amount of data in non blocking mode using HAL_UART_Transmit_IT()
<> 144:ef7eb2e8f9f7 80 (+) At transmission end of half transfer HAL_UART_TxHalfCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 81 add his own code by customization of function pointer HAL_UART_TxHalfCpltCallback
<> 144:ef7eb2e8f9f7 82 (+) At transmission end of transfer HAL_UART_TxCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 83 add his own code by customization of function pointer HAL_UART_TxCpltCallback
<> 144:ef7eb2e8f9f7 84 (+) Receive an amount of data in non blocking mode using HAL_UART_Receive_IT()
<> 144:ef7eb2e8f9f7 85 (+) At reception end of half transfer HAL_UART_RxHalfCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 86 add his own code by customization of function pointer HAL_UART_RxHalfCpltCallback
<> 144:ef7eb2e8f9f7 87 (+) At reception end of transfer HAL_UART_RxCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 88 add his own code by customization of function pointer HAL_UART_RxCpltCallback
<> 144:ef7eb2e8f9f7 89 (+) In case of transfer Error, HAL_UART_ErrorCallback() function is executed and user can
<> 144:ef7eb2e8f9f7 90 add his own code by customization of function pointer HAL_UART_ErrorCallback
<> 144:ef7eb2e8f9f7 91
<> 144:ef7eb2e8f9f7 92 *** DMA mode IO operation ***
<> 144:ef7eb2e8f9f7 93 ==============================
<> 144:ef7eb2e8f9f7 94 [..]
<> 144:ef7eb2e8f9f7 95 (+) Send an amount of data in non blocking mode (DMA) using HAL_UART_Transmit_DMA()
<> 144:ef7eb2e8f9f7 96 (+) At transmission end of half transfer HAL_UART_TxHalfCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 97 add his own code by customization of function pointer HAL_UART_TxHalfCpltCallback
<> 144:ef7eb2e8f9f7 98 (+) At transmission end of transfer HAL_UART_TxCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 99 add his own code by customization of function pointer HAL_UART_TxCpltCallback
<> 144:ef7eb2e8f9f7 100 (+) Receive an amount of data in non blocking mode (DMA) using HAL_UART_Receive_DMA()
<> 144:ef7eb2e8f9f7 101 (+) At reception end of half transfer HAL_UART_RxHalfCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 102 add his own code by customization of function pointer HAL_UART_RxHalfCpltCallback
<> 144:ef7eb2e8f9f7 103 (+) At reception end of transfer HAL_UART_RxCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 104 add his own code by customization of function pointer HAL_UART_RxCpltCallback
<> 144:ef7eb2e8f9f7 105 (+) In case of transfer Error, HAL_UART_ErrorCallback() function is executed and user can
<> 144:ef7eb2e8f9f7 106 add his own code by customization of function pointer HAL_UART_ErrorCallback
<> 144:ef7eb2e8f9f7 107 (+) Pause the DMA Transfer using HAL_UART_DMAPause()
<> 144:ef7eb2e8f9f7 108 (+) Resume the DMA Transfer using HAL_UART_DMAResume()
<> 144:ef7eb2e8f9f7 109 (+) Stop the DMA Transfer using HAL_UART_DMAStop()
<> 144:ef7eb2e8f9f7 110
<> 144:ef7eb2e8f9f7 111 *** UART HAL driver macros list ***
<> 144:ef7eb2e8f9f7 112 =============================================
<> 144:ef7eb2e8f9f7 113 [..]
<> 144:ef7eb2e8f9f7 114 Below the list of most used macros in UART HAL driver.
<> 144:ef7eb2e8f9f7 115
<> 144:ef7eb2e8f9f7 116 (+) __HAL_UART_ENABLE: Enable the UART peripheral
<> 144:ef7eb2e8f9f7 117 (+) __HAL_UART_DISABLE: Disable the UART peripheral
<> 144:ef7eb2e8f9f7 118 (+) __HAL_UART_GET_FLAG : Check whether the specified UART flag is set or not
<> 144:ef7eb2e8f9f7 119 (+) __HAL_UART_CLEAR_FLAG : Clear the specified UART pending flag
<> 144:ef7eb2e8f9f7 120 (+) __HAL_UART_ENABLE_IT: Enable the specified UART interrupt
<> 144:ef7eb2e8f9f7 121 (+) __HAL_UART_DISABLE_IT: Disable the specified UART interrupt
<> 144:ef7eb2e8f9f7 122
<> 144:ef7eb2e8f9f7 123 [..]
<> 144:ef7eb2e8f9f7 124 (@) You can refer to the UART HAL driver header file for more useful macros
<> 144:ef7eb2e8f9f7 125
<> 144:ef7eb2e8f9f7 126 @endverbatim
<> 144:ef7eb2e8f9f7 127 ******************************************************************************
<> 144:ef7eb2e8f9f7 128 * @attention
<> 144:ef7eb2e8f9f7 129 *
<> 144:ef7eb2e8f9f7 130 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 131 *
<> 144:ef7eb2e8f9f7 132 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 133 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 134 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 135 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 136 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 137 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 138 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 139 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 140 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 141 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 142 *
<> 144:ef7eb2e8f9f7 143 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 144 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 145 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 146 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 147 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 148 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 149 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 150 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 151 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 152 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 153 *
<> 144:ef7eb2e8f9f7 154 ******************************************************************************
<> 144:ef7eb2e8f9f7 155 */
<> 144:ef7eb2e8f9f7 156
<> 144:ef7eb2e8f9f7 157 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 158 #include "stm32f0xx_hal.h"
<> 144:ef7eb2e8f9f7 159
<> 144:ef7eb2e8f9f7 160 /** @addtogroup STM32F0xx_HAL_Driver
<> 144:ef7eb2e8f9f7 161 * @{
<> 144:ef7eb2e8f9f7 162 */
<> 144:ef7eb2e8f9f7 163
<> 144:ef7eb2e8f9f7 164 /** @defgroup UART UART
<> 144:ef7eb2e8f9f7 165 * @brief HAL UART module driver
<> 144:ef7eb2e8f9f7 166 * @{
<> 144:ef7eb2e8f9f7 167 */
<> 144:ef7eb2e8f9f7 168
<> 144:ef7eb2e8f9f7 169 #ifdef HAL_UART_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 170
<> 144:ef7eb2e8f9f7 171 /* Private typedef -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 172 /* Private define ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 173 /** @defgroup UART_Private_Constants UART Private Constants
<> 144:ef7eb2e8f9f7 174 * @{
<> 144:ef7eb2e8f9f7 175 */
<> 144:ef7eb2e8f9f7 176 #define UART_TEACK_REACK_TIMEOUT ((uint32_t) 1000) /*!< UART TX or RX enable acknowledge time-out value */
<> 144:ef7eb2e8f9f7 177 #define UART_CR1_FIELDS ((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | \
<> 144:ef7eb2e8f9f7 178 USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8)) /*!< UART or USART CR1 fields of parameters set by UART_SetConfig API */
<> 144:ef7eb2e8f9f7 179 /**
<> 144:ef7eb2e8f9f7 180 * @}
<> 144:ef7eb2e8f9f7 181 */
<> 144:ef7eb2e8f9f7 182
<> 144:ef7eb2e8f9f7 183 /* Private macros ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 184 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 185 /* Private function prototypes -----------------------------------------------*/
<> 144:ef7eb2e8f9f7 186 /** @addtogroup UART_Private_Functions UART Private Functions
<> 144:ef7eb2e8f9f7 187 * @{
<> 144:ef7eb2e8f9f7 188 */
<> 144:ef7eb2e8f9f7 189 static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 190 static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 191 static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 192 static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 193 static void UART_DMAError(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 194 /**
<> 144:ef7eb2e8f9f7 195 * @}
<> 144:ef7eb2e8f9f7 196 */
<> 144:ef7eb2e8f9f7 197
<> 144:ef7eb2e8f9f7 198 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 199
<> 144:ef7eb2e8f9f7 200 /** @defgroup UART_Exported_Functions UART Exported Functions
<> 144:ef7eb2e8f9f7 201 * @{
<> 144:ef7eb2e8f9f7 202 */
<> 144:ef7eb2e8f9f7 203
<> 144:ef7eb2e8f9f7 204 /** @defgroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 205 * @brief Initialization and Configuration functions
<> 144:ef7eb2e8f9f7 206 *
<> 144:ef7eb2e8f9f7 207 @verbatim
<> 144:ef7eb2e8f9f7 208 ===============================================================================
<> 144:ef7eb2e8f9f7 209 ##### Initialization and Configuration functions #####
<> 144:ef7eb2e8f9f7 210 ===============================================================================
<> 144:ef7eb2e8f9f7 211 [..]
<> 144:ef7eb2e8f9f7 212 This subsection provides a set of functions allowing to initialize the USARTx or the UARTy
<> 144:ef7eb2e8f9f7 213 in asynchronous mode.
<> 144:ef7eb2e8f9f7 214 (+) For the asynchronous mode the parameters below can be configured:
<> 144:ef7eb2e8f9f7 215 (++) Baud Rate
<> 144:ef7eb2e8f9f7 216 (++) Word Length
<> 144:ef7eb2e8f9f7 217 (++) Stop Bit
<> 144:ef7eb2e8f9f7 218 (++) Parity
<> 144:ef7eb2e8f9f7 219 (++) Hardware flow control
<> 144:ef7eb2e8f9f7 220 (++) Receiver/transmitter modes
<> 144:ef7eb2e8f9f7 221 (++) Over Sampling Method
<> 144:ef7eb2e8f9f7 222 (++) One-Bit Sampling Method
<> 144:ef7eb2e8f9f7 223 (+) For the asynchronous mode, the following advanced features can be configured as well:
<> 144:ef7eb2e8f9f7 224 (++) TX and/or RX pin level inversion
<> 144:ef7eb2e8f9f7 225 (++) data logical level inversion
<> 144:ef7eb2e8f9f7 226 (++) RX and TX pins swap
<> 144:ef7eb2e8f9f7 227 (++) RX overrun detection disabling
<> 144:ef7eb2e8f9f7 228 (++) DMA disabling on RX error
<> 144:ef7eb2e8f9f7 229 (++) MSB first on communication line
<> 144:ef7eb2e8f9f7 230 (++) auto Baud rate detection
<> 144:ef7eb2e8f9f7 231 [..]
<> 144:ef7eb2e8f9f7 232 The HAL_UART_Init(), HAL_HalfDuplex_Init() and HAL_MultiProcessor_Init()
<> 144:ef7eb2e8f9f7 233 API follow respectively the UART asynchronous, UART Half duplex and multiprocessor mode
<> 144:ef7eb2e8f9f7 234 configuration procedures (details for the procedures are available in reference manual).
<> 144:ef7eb2e8f9f7 235
<> 144:ef7eb2e8f9f7 236 @endverbatim
<> 144:ef7eb2e8f9f7 237 * @{
<> 144:ef7eb2e8f9f7 238 */
<> 144:ef7eb2e8f9f7 239
<> 144:ef7eb2e8f9f7 240 /*
<> 144:ef7eb2e8f9f7 241 Additional Table: If the parity is enabled, then the MSB bit of the data written
<> 144:ef7eb2e8f9f7 242 in the data register is transmitted but is changed by the parity bit.
<> 144:ef7eb2e8f9f7 243 According to device capability (support or not of 7-bit word length),
<> 144:ef7eb2e8f9f7 244 frame length is either defined by the M bit (8-bits or 9-bits)
<> 144:ef7eb2e8f9f7 245 or by the M1 and M0 bits (7-bit, 8-bit or 9-bit).
<> 144:ef7eb2e8f9f7 246 Possible UART frame formats are as listed in the following table:
<> 144:ef7eb2e8f9f7 247
<> 144:ef7eb2e8f9f7 248 Table 1. UART frame format.
<> 144:ef7eb2e8f9f7 249 +-----------------------------------------------------------------------+
<> 144:ef7eb2e8f9f7 250 | M bit | PCE bit | UART frame |
<> 144:ef7eb2e8f9f7 251 |-------------------|-----------|---------------------------------------|
<> 144:ef7eb2e8f9f7 252 | 0 | 0 | | SB | 8-bit data | STB | |
<> 144:ef7eb2e8f9f7 253 |-------------------|-----------|---------------------------------------|
<> 144:ef7eb2e8f9f7 254 | 0 | 1 | | SB | 7-bit data | PB | STB | |
<> 144:ef7eb2e8f9f7 255 |-------------------|-----------|---------------------------------------|
<> 144:ef7eb2e8f9f7 256 | 1 | 0 | | SB | 9-bit data | STB | |
<> 144:ef7eb2e8f9f7 257 |-------------------|-----------|---------------------------------------|
<> 144:ef7eb2e8f9f7 258 | 1 | 1 | | SB | 8-bit data | PB | STB | |
<> 144:ef7eb2e8f9f7 259 +-----------------------------------------------------------------------+
<> 144:ef7eb2e8f9f7 260 | M1 bit | M0 bit | PCE bit | UART frame |
<> 144:ef7eb2e8f9f7 261 |---------|---------|-----------|---------------------------------------|
<> 144:ef7eb2e8f9f7 262 | 0 | 0 | 0 | | SB | 8 bit data | STB | |
<> 144:ef7eb2e8f9f7 263 |---------|---------|-----------|---------------------------------------|
<> 144:ef7eb2e8f9f7 264 | 0 | 0 | 1 | | SB | 7 bit data | PB | STB | |
<> 144:ef7eb2e8f9f7 265 |---------|---------|-----------|---------------------------------------|
<> 144:ef7eb2e8f9f7 266 | 0 | 1 | 0 | | SB | 9 bit data | STB | |
<> 144:ef7eb2e8f9f7 267 |---------|---------|-----------|---------------------------------------|
<> 144:ef7eb2e8f9f7 268 | 0 | 1 | 1 | | SB | 8 bit data | PB | STB | |
<> 144:ef7eb2e8f9f7 269 |---------|---------|-----------|---------------------------------------|
<> 144:ef7eb2e8f9f7 270 | 1 | 0 | 0 | | SB | 7 bit data | STB | |
<> 144:ef7eb2e8f9f7 271 |---------|---------|-----------|---------------------------------------|
<> 144:ef7eb2e8f9f7 272 | 1 | 0 | 1 | | SB | 6 bit data | PB | STB | |
<> 144:ef7eb2e8f9f7 273 +-----------------------------------------------------------------------+
<> 144:ef7eb2e8f9f7 274
<> 144:ef7eb2e8f9f7 275 */
<> 144:ef7eb2e8f9f7 276
<> 144:ef7eb2e8f9f7 277 /**
<> 144:ef7eb2e8f9f7 278 * @brief Initialize the UART mode according to the specified
<> 144:ef7eb2e8f9f7 279 * parameters in the UART_InitTypeDef and initialize the associated handle.
<> 144:ef7eb2e8f9f7 280 * @param huart: UART handle.
<> 144:ef7eb2e8f9f7 281 * @retval HAL status
<> 144:ef7eb2e8f9f7 282 */
<> 144:ef7eb2e8f9f7 283 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 284 {
<> 144:ef7eb2e8f9f7 285 /* Check the UART handle allocation */
<> 144:ef7eb2e8f9f7 286 if(huart == NULL)
<> 144:ef7eb2e8f9f7 287 {
<> 144:ef7eb2e8f9f7 288 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 289 }
<> 144:ef7eb2e8f9f7 290
<> 144:ef7eb2e8f9f7 291 if(huart->Init.HwFlowCtl != UART_HWCONTROL_NONE)
<> 144:ef7eb2e8f9f7 292 {
<> 144:ef7eb2e8f9f7 293 /* Check the parameters */
<> 144:ef7eb2e8f9f7 294 assert_param(IS_UART_HWFLOW_INSTANCE(huart->Instance));
<> 144:ef7eb2e8f9f7 295 }
<> 144:ef7eb2e8f9f7 296 else
<> 144:ef7eb2e8f9f7 297 {
<> 144:ef7eb2e8f9f7 298 /* Check the parameters */
<> 144:ef7eb2e8f9f7 299 assert_param(IS_UART_INSTANCE(huart->Instance));
<> 144:ef7eb2e8f9f7 300 }
<> 144:ef7eb2e8f9f7 301
<> 144:ef7eb2e8f9f7 302 if(huart->gState == HAL_UART_STATE_RESET)
<> 144:ef7eb2e8f9f7 303 {
<> 144:ef7eb2e8f9f7 304 /* Allocate lock resource and initialize it */
<> 144:ef7eb2e8f9f7 305 huart->Lock = HAL_UNLOCKED;
<> 144:ef7eb2e8f9f7 306
<> 144:ef7eb2e8f9f7 307 /* Init the low level hardware : GPIO, CLOCK */
<> 144:ef7eb2e8f9f7 308 HAL_UART_MspInit(huart);
<> 144:ef7eb2e8f9f7 309 }
<> 144:ef7eb2e8f9f7 310
<> 144:ef7eb2e8f9f7 311 huart->gState = HAL_UART_STATE_BUSY;
<> 144:ef7eb2e8f9f7 312
<> 144:ef7eb2e8f9f7 313 /* Disable the Peripheral */
<> 144:ef7eb2e8f9f7 314 __HAL_UART_DISABLE(huart);
<> 144:ef7eb2e8f9f7 315
<> 144:ef7eb2e8f9f7 316 /* Set the UART Communication parameters */
<> 144:ef7eb2e8f9f7 317 if (UART_SetConfig(huart) == HAL_ERROR)
<> 144:ef7eb2e8f9f7 318 {
<> 144:ef7eb2e8f9f7 319 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 320 }
<> 144:ef7eb2e8f9f7 321
<> 144:ef7eb2e8f9f7 322 if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
<> 144:ef7eb2e8f9f7 323 {
<> 144:ef7eb2e8f9f7 324 UART_AdvFeatureConfig(huart);
<> 144:ef7eb2e8f9f7 325 }
<> 144:ef7eb2e8f9f7 326
<> 144:ef7eb2e8f9f7 327 /* In asynchronous mode, the following bits must be kept cleared:
<> 144:ef7eb2e8f9f7 328 - LINEN (if LIN is supported) and CLKEN bits in the USART_CR2 register,
<> 144:ef7eb2e8f9f7 329 - SCEN (if Smartcard is supported), HDSEL and IREN (if IrDA is supported) bits in the USART_CR3 register. */
<> 144:ef7eb2e8f9f7 330 #if defined (USART_CR2_LINEN)
<> 144:ef7eb2e8f9f7 331 huart->Instance->CR2 &= ~(USART_CR2_LINEN | USART_CR2_CLKEN);
<> 144:ef7eb2e8f9f7 332 #else
<> 144:ef7eb2e8f9f7 333 huart->Instance->CR2 &= ~(USART_CR2_CLKEN);
<> 144:ef7eb2e8f9f7 334 #endif
<> 144:ef7eb2e8f9f7 335 #if defined (USART_CR3_SCEN)
<> 144:ef7eb2e8f9f7 336 #if defined (USART_CR3_IREN)
<> 144:ef7eb2e8f9f7 337 huart->Instance->CR3 &= ~(USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN);
<> 144:ef7eb2e8f9f7 338 #else
<> 144:ef7eb2e8f9f7 339 huart->Instance->CR3 &= ~(USART_CR3_SCEN | USART_CR3_HDSEL);
<> 144:ef7eb2e8f9f7 340 #endif
<> 144:ef7eb2e8f9f7 341 #else
<> 144:ef7eb2e8f9f7 342 #if defined (USART_CR3_IREN)
<> 144:ef7eb2e8f9f7 343 huart->Instance->CR3 &= ~(USART_CR3_HDSEL | USART_CR3_IREN);
<> 144:ef7eb2e8f9f7 344 #else
<> 144:ef7eb2e8f9f7 345 huart->Instance->CR3 &= ~(USART_CR3_HDSEL);
<> 144:ef7eb2e8f9f7 346 #endif
<> 144:ef7eb2e8f9f7 347 #endif
<> 144:ef7eb2e8f9f7 348
<> 144:ef7eb2e8f9f7 349 /* Enable the Peripheral */
<> 144:ef7eb2e8f9f7 350 __HAL_UART_ENABLE(huart);
<> 144:ef7eb2e8f9f7 351
<> 144:ef7eb2e8f9f7 352 /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
<> 144:ef7eb2e8f9f7 353 return (UART_CheckIdleState(huart));
<> 144:ef7eb2e8f9f7 354 }
<> 144:ef7eb2e8f9f7 355
<> 144:ef7eb2e8f9f7 356 /**
<> 144:ef7eb2e8f9f7 357 * @brief Initialize the half-duplex mode according to the specified
<> 144:ef7eb2e8f9f7 358 * parameters in the UART_InitTypeDef and creates the associated handle.
<> 144:ef7eb2e8f9f7 359 * @param huart: UART handle.
<> 144:ef7eb2e8f9f7 360 * @retval HAL status
<> 144:ef7eb2e8f9f7 361 */
<> 144:ef7eb2e8f9f7 362 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 363 {
<> 144:ef7eb2e8f9f7 364 /* Check the UART handle allocation */
<> 144:ef7eb2e8f9f7 365 if(huart == NULL)
<> 144:ef7eb2e8f9f7 366 {
<> 144:ef7eb2e8f9f7 367 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 368 }
<> 144:ef7eb2e8f9f7 369
<> 144:ef7eb2e8f9f7 370 /* Check UART instance */
<> 144:ef7eb2e8f9f7 371 assert_param(IS_UART_HALFDUPLEX_INSTANCE(huart->Instance));
<> 144:ef7eb2e8f9f7 372
<> 144:ef7eb2e8f9f7 373 if(huart->gState == HAL_UART_STATE_RESET)
<> 144:ef7eb2e8f9f7 374 {
<> 144:ef7eb2e8f9f7 375 /* Allocate lock resource and initialize it */
<> 144:ef7eb2e8f9f7 376 huart->Lock = HAL_UNLOCKED;
<> 144:ef7eb2e8f9f7 377
<> 144:ef7eb2e8f9f7 378 /* Init the low level hardware : GPIO, CLOCK */
<> 144:ef7eb2e8f9f7 379 HAL_UART_MspInit(huart);
<> 144:ef7eb2e8f9f7 380 }
<> 144:ef7eb2e8f9f7 381
<> 144:ef7eb2e8f9f7 382 huart->gState = HAL_UART_STATE_BUSY;
<> 144:ef7eb2e8f9f7 383
<> 144:ef7eb2e8f9f7 384 /* Disable the Peripheral */
<> 144:ef7eb2e8f9f7 385 __HAL_UART_DISABLE(huart);
<> 144:ef7eb2e8f9f7 386
<> 144:ef7eb2e8f9f7 387 /* Set the UART Communication parameters */
<> 144:ef7eb2e8f9f7 388 if (UART_SetConfig(huart) == HAL_ERROR)
<> 144:ef7eb2e8f9f7 389 {
<> 144:ef7eb2e8f9f7 390 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 391 }
<> 144:ef7eb2e8f9f7 392
<> 144:ef7eb2e8f9f7 393 if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
<> 144:ef7eb2e8f9f7 394 {
<> 144:ef7eb2e8f9f7 395 UART_AdvFeatureConfig(huart);
<> 144:ef7eb2e8f9f7 396 }
<> 144:ef7eb2e8f9f7 397
<> 144:ef7eb2e8f9f7 398 /* In half-duplex mode, the following bits must be kept cleared:
<> 144:ef7eb2e8f9f7 399 - LINEN (if LIN is supported) and CLKEN bits in the USART_CR2 register,
<> 144:ef7eb2e8f9f7 400 - SCEN (if Smartcard is supported), and IREN (if IrDA is supported) bits in the USART_CR3 register. */
<> 144:ef7eb2e8f9f7 401 #if defined (USART_CR2_LINEN)
<> 144:ef7eb2e8f9f7 402 huart->Instance->CR2 &= ~(USART_CR2_LINEN | USART_CR2_CLKEN);
<> 144:ef7eb2e8f9f7 403 #else
<> 144:ef7eb2e8f9f7 404 huart->Instance->CR2 &= ~(USART_CR2_CLKEN);
<> 144:ef7eb2e8f9f7 405 #endif
<> 144:ef7eb2e8f9f7 406 #if defined (USART_CR3_SCEN)
<> 144:ef7eb2e8f9f7 407 #if defined (USART_CR3_IREN)
<> 144:ef7eb2e8f9f7 408 huart->Instance->CR3 &= ~(USART_CR3_SCEN | USART_CR3_IREN);
<> 144:ef7eb2e8f9f7 409 #else
<> 144:ef7eb2e8f9f7 410 huart->Instance->CR3 &= ~(USART_CR3_SCEN);
<> 144:ef7eb2e8f9f7 411 #endif
<> 144:ef7eb2e8f9f7 412 #else
<> 144:ef7eb2e8f9f7 413 #if defined (USART_CR3_IREN)
<> 144:ef7eb2e8f9f7 414 huart->Instance->CR3 &= ~(USART_CR3_IREN);
<> 144:ef7eb2e8f9f7 415 #endif
<> 144:ef7eb2e8f9f7 416 #endif
<> 144:ef7eb2e8f9f7 417
<> 144:ef7eb2e8f9f7 418 /* Enable the Half-Duplex mode by setting the HDSEL bit in the CR3 register */
<> 144:ef7eb2e8f9f7 419 huart->Instance->CR3 |= USART_CR3_HDSEL;
<> 144:ef7eb2e8f9f7 420
<> 144:ef7eb2e8f9f7 421 /* Enable the Peripheral */
<> 144:ef7eb2e8f9f7 422 __HAL_UART_ENABLE(huart);
<> 144:ef7eb2e8f9f7 423
<> 144:ef7eb2e8f9f7 424 /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
<> 144:ef7eb2e8f9f7 425 return (UART_CheckIdleState(huart));
<> 144:ef7eb2e8f9f7 426 }
<> 144:ef7eb2e8f9f7 427
<> 144:ef7eb2e8f9f7 428
<> 144:ef7eb2e8f9f7 429 /**
<> 144:ef7eb2e8f9f7 430 * @brief Initialize the multiprocessor mode according to the specified
<> 144:ef7eb2e8f9f7 431 * parameters in the UART_InitTypeDef and initialize the associated handle.
<> 144:ef7eb2e8f9f7 432 * @param huart: UART handle.
<> 144:ef7eb2e8f9f7 433 * @param Address: UART node address (4-, 6-, 7- or 8-bit long).
<> 144:ef7eb2e8f9f7 434 * @param WakeUpMethod: specifies the UART wakeup method.
<> 144:ef7eb2e8f9f7 435 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 436 * @arg UART_WAKEUPMETHOD_IDLELINE: WakeUp by an idle line detection
<> 144:ef7eb2e8f9f7 437 * @arg UART_WAKEUPMETHOD_ADDRESSMARK: WakeUp by an address mark
<> 144:ef7eb2e8f9f7 438 * @note If the user resorts to idle line detection wake up, the Address parameter
<> 144:ef7eb2e8f9f7 439 * is useless and ignored by the initialization function.
<> 144:ef7eb2e8f9f7 440 * @note If the user resorts to address mark wake up, the address length detection
<> 144:ef7eb2e8f9f7 441 * is configured by default to 4 bits only. For the UART to be able to
<> 144:ef7eb2e8f9f7 442 * manage 6-, 7- or 8-bit long addresses detection, the API
<> 144:ef7eb2e8f9f7 443 * HAL_MultiProcessorEx_AddressLength_Set() must be called after
<> 144:ef7eb2e8f9f7 444 * HAL_MultiProcessor_Init().
<> 144:ef7eb2e8f9f7 445 * @retval HAL status
<> 144:ef7eb2e8f9f7 446 */
<> 144:ef7eb2e8f9f7 447 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod)
<> 144:ef7eb2e8f9f7 448 {
<> 144:ef7eb2e8f9f7 449 /* Check the UART handle allocation */
<> 144:ef7eb2e8f9f7 450 if(huart == NULL)
<> 144:ef7eb2e8f9f7 451 {
<> 144:ef7eb2e8f9f7 452 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 453 }
<> 144:ef7eb2e8f9f7 454
<> 144:ef7eb2e8f9f7 455 /* Check the wake up method parameter */
<> 144:ef7eb2e8f9f7 456 assert_param(IS_UART_WAKEUPMETHOD(WakeUpMethod));
<> 144:ef7eb2e8f9f7 457
<> 144:ef7eb2e8f9f7 458 if(huart->gState == HAL_UART_STATE_RESET)
<> 144:ef7eb2e8f9f7 459 {
<> 144:ef7eb2e8f9f7 460 /* Allocate lock resource and initialize it */
<> 144:ef7eb2e8f9f7 461 huart->Lock = HAL_UNLOCKED;
<> 144:ef7eb2e8f9f7 462
<> 144:ef7eb2e8f9f7 463 /* Init the low level hardware : GPIO, CLOCK */
<> 144:ef7eb2e8f9f7 464 HAL_UART_MspInit(huart);
<> 144:ef7eb2e8f9f7 465 }
<> 144:ef7eb2e8f9f7 466
<> 144:ef7eb2e8f9f7 467 huart->gState = HAL_UART_STATE_BUSY;
<> 144:ef7eb2e8f9f7 468
<> 144:ef7eb2e8f9f7 469 /* Disable the Peripheral */
<> 144:ef7eb2e8f9f7 470 __HAL_UART_DISABLE(huart);
<> 144:ef7eb2e8f9f7 471
<> 144:ef7eb2e8f9f7 472 /* Set the UART Communication parameters */
<> 144:ef7eb2e8f9f7 473 if (UART_SetConfig(huart) == HAL_ERROR)
<> 144:ef7eb2e8f9f7 474 {
<> 144:ef7eb2e8f9f7 475 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 476 }
<> 144:ef7eb2e8f9f7 477
<> 144:ef7eb2e8f9f7 478 if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT)
<> 144:ef7eb2e8f9f7 479 {
<> 144:ef7eb2e8f9f7 480 UART_AdvFeatureConfig(huart);
<> 144:ef7eb2e8f9f7 481 }
<> 144:ef7eb2e8f9f7 482
<> 144:ef7eb2e8f9f7 483 /* In multiprocessor mode, the following bits must be kept cleared:
<> 144:ef7eb2e8f9f7 484 - LINEN (if LIN is supported) and CLKEN bits in the USART_CR2 register,
<> 144:ef7eb2e8f9f7 485 - SCEN (if Smartcard is supported), HDSEL and IREN (if IrDA is supported) bits in the USART_CR3 register. */
<> 144:ef7eb2e8f9f7 486 #if defined (USART_CR2_LINEN)
<> 144:ef7eb2e8f9f7 487 huart->Instance->CR2 &= ~(USART_CR2_LINEN | USART_CR2_CLKEN);
<> 144:ef7eb2e8f9f7 488 #else
<> 144:ef7eb2e8f9f7 489 huart->Instance->CR2 &= ~(USART_CR2_CLKEN);
<> 144:ef7eb2e8f9f7 490 #endif
<> 144:ef7eb2e8f9f7 491 #if defined (USART_CR3_SCEN)
<> 144:ef7eb2e8f9f7 492 #if defined (USART_CR3_IREN)
<> 144:ef7eb2e8f9f7 493 huart->Instance->CR3 &= ~(USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN);
<> 144:ef7eb2e8f9f7 494 #else
<> 144:ef7eb2e8f9f7 495 huart->Instance->CR3 &= ~(USART_CR3_SCEN | USART_CR3_HDSEL);
<> 144:ef7eb2e8f9f7 496 #endif
<> 144:ef7eb2e8f9f7 497 #else
<> 144:ef7eb2e8f9f7 498 #if defined (USART_CR3_IREN)
<> 144:ef7eb2e8f9f7 499 huart->Instance->CR3 &= ~(USART_CR3_HDSEL | USART_CR3_IREN);
<> 144:ef7eb2e8f9f7 500 #else
<> 144:ef7eb2e8f9f7 501 huart->Instance->CR3 &= ~(USART_CR3_HDSEL);
<> 144:ef7eb2e8f9f7 502 #endif
<> 144:ef7eb2e8f9f7 503 #endif
<> 144:ef7eb2e8f9f7 504
<> 144:ef7eb2e8f9f7 505 if (WakeUpMethod == UART_WAKEUPMETHOD_ADDRESSMARK)
<> 144:ef7eb2e8f9f7 506 {
<> 144:ef7eb2e8f9f7 507 /* If address mark wake up method is chosen, set the USART address node */
<> 144:ef7eb2e8f9f7 508 MODIFY_REG(huart->Instance->CR2, USART_CR2_ADD, ((uint32_t)Address << UART_CR2_ADDRESS_LSB_POS));
<> 144:ef7eb2e8f9f7 509 }
<> 144:ef7eb2e8f9f7 510
<> 144:ef7eb2e8f9f7 511 /* Set the wake up method by setting the WAKE bit in the CR1 register */
<> 144:ef7eb2e8f9f7 512 MODIFY_REG(huart->Instance->CR1, USART_CR1_WAKE, WakeUpMethod);
<> 144:ef7eb2e8f9f7 513
<> 144:ef7eb2e8f9f7 514 /* Enable the Peripheral */
<> 144:ef7eb2e8f9f7 515 __HAL_UART_ENABLE(huart);
<> 144:ef7eb2e8f9f7 516
<> 144:ef7eb2e8f9f7 517 /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */
<> 144:ef7eb2e8f9f7 518 return (UART_CheckIdleState(huart));
<> 144:ef7eb2e8f9f7 519 }
<> 144:ef7eb2e8f9f7 520
<> 144:ef7eb2e8f9f7 521 /**
<> 144:ef7eb2e8f9f7 522 * @brief DeInitialize the UART peripheral.
<> 144:ef7eb2e8f9f7 523 * @param huart: UART handle.
<> 144:ef7eb2e8f9f7 524 * @retval HAL status
<> 144:ef7eb2e8f9f7 525 */
<> 144:ef7eb2e8f9f7 526 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 527 {
<> 144:ef7eb2e8f9f7 528 /* Check the UART handle allocation */
<> 144:ef7eb2e8f9f7 529 if(huart == NULL)
<> 144:ef7eb2e8f9f7 530 {
<> 144:ef7eb2e8f9f7 531 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 532 }
<> 144:ef7eb2e8f9f7 533
<> 144:ef7eb2e8f9f7 534 /* Check the parameters */
<> 144:ef7eb2e8f9f7 535 assert_param(IS_UART_INSTANCE(huart->Instance));
<> 144:ef7eb2e8f9f7 536
<> 144:ef7eb2e8f9f7 537 huart->gState = HAL_UART_STATE_BUSY;
<> 144:ef7eb2e8f9f7 538
<> 144:ef7eb2e8f9f7 539 /* Disable the Peripheral */
<> 144:ef7eb2e8f9f7 540 __HAL_UART_DISABLE(huart);
<> 144:ef7eb2e8f9f7 541
<> 144:ef7eb2e8f9f7 542 huart->Instance->CR1 = 0x0;
<> 144:ef7eb2e8f9f7 543 huart->Instance->CR2 = 0x0;
<> 144:ef7eb2e8f9f7 544 huart->Instance->CR3 = 0x0;
<> 144:ef7eb2e8f9f7 545
<> 144:ef7eb2e8f9f7 546 /* DeInit the low level hardware */
<> 144:ef7eb2e8f9f7 547 HAL_UART_MspDeInit(huart);
<> 144:ef7eb2e8f9f7 548
<> 144:ef7eb2e8f9f7 549 huart->ErrorCode = HAL_UART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 550 huart->gState = HAL_UART_STATE_RESET;
<> 144:ef7eb2e8f9f7 551 huart->RxState = HAL_UART_STATE_RESET;
<> 144:ef7eb2e8f9f7 552
<> 144:ef7eb2e8f9f7 553 /* Process Unlock */
<> 144:ef7eb2e8f9f7 554 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 555
<> 144:ef7eb2e8f9f7 556 return HAL_OK;
<> 144:ef7eb2e8f9f7 557 }
<> 144:ef7eb2e8f9f7 558
<> 144:ef7eb2e8f9f7 559 /**
<> 144:ef7eb2e8f9f7 560 * @brief Initialize the UART MSP.
<> 144:ef7eb2e8f9f7 561 * @param huart: UART handle.
<> 144:ef7eb2e8f9f7 562 * @retval None
<> 144:ef7eb2e8f9f7 563 */
<> 144:ef7eb2e8f9f7 564 __weak void HAL_UART_MspInit(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 565 {
<> 144:ef7eb2e8f9f7 566 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 567 UNUSED(huart);
<> 144:ef7eb2e8f9f7 568
<> 144:ef7eb2e8f9f7 569 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 570 the HAL_UART_MspInit can be implemented in the user file
<> 144:ef7eb2e8f9f7 571 */
<> 144:ef7eb2e8f9f7 572 }
<> 144:ef7eb2e8f9f7 573
<> 144:ef7eb2e8f9f7 574 /**
<> 144:ef7eb2e8f9f7 575 * @brief DeInitialize the UART MSP.
<> 144:ef7eb2e8f9f7 576 * @param huart: UART handle.
<> 144:ef7eb2e8f9f7 577 * @retval None
<> 144:ef7eb2e8f9f7 578 */
<> 144:ef7eb2e8f9f7 579 __weak void HAL_UART_MspDeInit(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 580 {
<> 144:ef7eb2e8f9f7 581 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 582 UNUSED(huart);
<> 144:ef7eb2e8f9f7 583
<> 144:ef7eb2e8f9f7 584 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 585 the HAL_UART_MspDeInit can be implemented in the user file
<> 144:ef7eb2e8f9f7 586 */
<> 144:ef7eb2e8f9f7 587 }
<> 144:ef7eb2e8f9f7 588
<> 144:ef7eb2e8f9f7 589 /**
<> 144:ef7eb2e8f9f7 590 * @}
<> 144:ef7eb2e8f9f7 591 */
<> 144:ef7eb2e8f9f7 592
<> 144:ef7eb2e8f9f7 593 /** @defgroup UART_Exported_Functions_Group2 IO operation functions
<> 144:ef7eb2e8f9f7 594 * @brief UART Transmit/Receive functions
<> 144:ef7eb2e8f9f7 595 *
<> 144:ef7eb2e8f9f7 596 @verbatim
<> 144:ef7eb2e8f9f7 597 ===============================================================================
<> 144:ef7eb2e8f9f7 598 ##### IO operation functions #####
<> 144:ef7eb2e8f9f7 599 ===============================================================================
<> 144:ef7eb2e8f9f7 600 This subsection provides a set of functions allowing to manage the UART asynchronous
<> 144:ef7eb2e8f9f7 601 and Half duplex data transfers.
<> 144:ef7eb2e8f9f7 602
<> 144:ef7eb2e8f9f7 603 (#) There are two mode of transfer:
<> 144:ef7eb2e8f9f7 604 (+) Blocking mode: The communication is performed in polling mode.
<> 144:ef7eb2e8f9f7 605 The HAL status of all data processing is returned by the same function
<> 144:ef7eb2e8f9f7 606 after finishing transfer.
<> 144:ef7eb2e8f9f7 607 (+) No-Blocking mode: The communication is performed using Interrupts
<> 144:ef7eb2e8f9f7 608 or DMA, These API's return the HAL status.
<> 144:ef7eb2e8f9f7 609 The end of the data processing will be indicated through the
<> 144:ef7eb2e8f9f7 610 dedicated UART IRQ when using Interrupt mode or the DMA IRQ when
<> 144:ef7eb2e8f9f7 611 using DMA mode.
<> 144:ef7eb2e8f9f7 612 The HAL_UART_TxCpltCallback(), HAL_UART_RxCpltCallback() user callbacks
<> 144:ef7eb2e8f9f7 613 will be executed respectively at the end of the transmit or Receive process
<> 144:ef7eb2e8f9f7 614 The HAL_UART_ErrorCallback()user callback will be executed when a communication error is detected
<> 144:ef7eb2e8f9f7 615
<> 144:ef7eb2e8f9f7 616 (#) Blocking mode API's are :
<> 144:ef7eb2e8f9f7 617 (+) HAL_UART_Transmit()
<> 144:ef7eb2e8f9f7 618 (+) HAL_UART_Receive()
<> 144:ef7eb2e8f9f7 619
<> 144:ef7eb2e8f9f7 620 (#) Non-Blocking mode API's with Interrupt are :
<> 144:ef7eb2e8f9f7 621 (+) HAL_UART_Transmit_IT()
<> 144:ef7eb2e8f9f7 622 (+) HAL_UART_Receive_IT()
<> 144:ef7eb2e8f9f7 623 (+) HAL_UART_IRQHandler()
<> 144:ef7eb2e8f9f7 624
<> 144:ef7eb2e8f9f7 625 (#) No-Blocking mode API's with DMA are :
<> 144:ef7eb2e8f9f7 626 (+) HAL_UART_Transmit_DMA()
<> 144:ef7eb2e8f9f7 627 (+) HAL_UART_Receive_DMA()
<> 144:ef7eb2e8f9f7 628 (+) HAL_UART_DMAPause()
<> 144:ef7eb2e8f9f7 629 (+) HAL_UART_DMAResume()
<> 144:ef7eb2e8f9f7 630 (+) HAL_UART_DMAStop()
<> 144:ef7eb2e8f9f7 631
<> 144:ef7eb2e8f9f7 632 (#) A set of Transfer Complete Callbacks are provided in No_Blocking mode:
<> 144:ef7eb2e8f9f7 633 (+) HAL_UART_TxHalfCpltCallback()
<> 144:ef7eb2e8f9f7 634 (+) HAL_UART_TxCpltCallback()
<> 144:ef7eb2e8f9f7 635 (+) HAL_UART_RxHalfCpltCallback()
<> 144:ef7eb2e8f9f7 636 (+) HAL_UART_RxCpltCallback()
<> 144:ef7eb2e8f9f7 637 (+) HAL_UART_ErrorCallback()
<> 144:ef7eb2e8f9f7 638
<> 144:ef7eb2e8f9f7 639
<> 144:ef7eb2e8f9f7 640 -@- In the Half duplex communication, it is forbidden to run the transmit
<> 144:ef7eb2e8f9f7 641 and receive process in parallel, the UART state HAL_UART_STATE_BUSY_TX_RX can't be useful.
<> 144:ef7eb2e8f9f7 642
<> 144:ef7eb2e8f9f7 643 @endverbatim
<> 144:ef7eb2e8f9f7 644 * @{
<> 144:ef7eb2e8f9f7 645 */
<> 144:ef7eb2e8f9f7 646
<> 144:ef7eb2e8f9f7 647 /**
<> 144:ef7eb2e8f9f7 648 * @brief Send an amount of data in blocking mode.
<> 144:ef7eb2e8f9f7 649 * @param huart: UART handle.
<> 144:ef7eb2e8f9f7 650 * @param pData: Pointer to data buffer.
<> 144:ef7eb2e8f9f7 651 * @param Size: Amount of data to be sent.
<> 144:ef7eb2e8f9f7 652 * @param Timeout: Timeout duration.
<> 144:ef7eb2e8f9f7 653 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
<> 144:ef7eb2e8f9f7 654 * address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
<> 144:ef7eb2e8f9f7 655 * (as sent data will be handled using u16 pointer cast). Depending on compilation chain,
<> 144:ef7eb2e8f9f7 656 * use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData.
<> 144:ef7eb2e8f9f7 657 * @retval HAL status
<> 144:ef7eb2e8f9f7 658 */
<> 144:ef7eb2e8f9f7 659 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 660 {
<> 144:ef7eb2e8f9f7 661 uint16_t* tmp;
<> 144:ef7eb2e8f9f7 662
<> 144:ef7eb2e8f9f7 663 /* Check that a Tx process is not already ongoing */
<> 144:ef7eb2e8f9f7 664 if(huart->gState == HAL_UART_STATE_READY)
<> 144:ef7eb2e8f9f7 665 {
<> 144:ef7eb2e8f9f7 666 if((pData == NULL ) || (Size == 0))
<> 144:ef7eb2e8f9f7 667 {
<> 144:ef7eb2e8f9f7 668 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 669 }
<> 144:ef7eb2e8f9f7 670
<> 144:ef7eb2e8f9f7 671 /* In case of 9bits/No Parity transfer, pData buffer provided as input paramter
<> 144:ef7eb2e8f9f7 672 should be aligned on a u16 frontier, as data to be filled into TDR will be
<> 144:ef7eb2e8f9f7 673 handled through a u16 cast. */
<> 144:ef7eb2e8f9f7 674 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
<> 144:ef7eb2e8f9f7 675 {
<> 144:ef7eb2e8f9f7 676 if((((uint32_t)pData)&1) != 0)
<> 144:ef7eb2e8f9f7 677 {
<> 144:ef7eb2e8f9f7 678 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 679 }
<> 144:ef7eb2e8f9f7 680 }
<> 144:ef7eb2e8f9f7 681
<> 144:ef7eb2e8f9f7 682 /* Process Locked */
<> 144:ef7eb2e8f9f7 683 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 684
<> 144:ef7eb2e8f9f7 685 huart->ErrorCode = HAL_UART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 686 huart->gState = HAL_UART_STATE_BUSY_TX;
<> 144:ef7eb2e8f9f7 687
<> 144:ef7eb2e8f9f7 688 huart->TxXferSize = Size;
<> 144:ef7eb2e8f9f7 689 huart->TxXferCount = Size;
<> 144:ef7eb2e8f9f7 690 while(huart->TxXferCount > 0)
<> 144:ef7eb2e8f9f7 691 {
<> 144:ef7eb2e8f9f7 692 huart->TxXferCount--;
<> 144:ef7eb2e8f9f7 693 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 694 {
<> 144:ef7eb2e8f9f7 695 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 696 }
<> 144:ef7eb2e8f9f7 697 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
<> 144:ef7eb2e8f9f7 698 {
<> 144:ef7eb2e8f9f7 699 tmp = (uint16_t*) pData;
<> 144:ef7eb2e8f9f7 700 huart->Instance->TDR = (*tmp & (uint16_t)0x01FF);
<> 144:ef7eb2e8f9f7 701 pData += 2;
<> 144:ef7eb2e8f9f7 702 }
<> 144:ef7eb2e8f9f7 703 else
<> 144:ef7eb2e8f9f7 704 {
<> 144:ef7eb2e8f9f7 705 huart->Instance->TDR = (*pData++ & (uint8_t)0xFF);
<> 144:ef7eb2e8f9f7 706 }
<> 144:ef7eb2e8f9f7 707 }
<> 144:ef7eb2e8f9f7 708 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 709 {
<> 144:ef7eb2e8f9f7 710 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 711 }
<> 144:ef7eb2e8f9f7 712
<> 144:ef7eb2e8f9f7 713 /* At end of Tx process, restore huart->gState to Ready */
<> 144:ef7eb2e8f9f7 714 huart->gState = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 715
<> 144:ef7eb2e8f9f7 716 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 717 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 718
<> 144:ef7eb2e8f9f7 719 return HAL_OK;
<> 144:ef7eb2e8f9f7 720 }
<> 144:ef7eb2e8f9f7 721 else
<> 144:ef7eb2e8f9f7 722 {
<> 144:ef7eb2e8f9f7 723 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 724 }
<> 144:ef7eb2e8f9f7 725 }
<> 144:ef7eb2e8f9f7 726
<> 144:ef7eb2e8f9f7 727 /**
<> 144:ef7eb2e8f9f7 728 * @brief Receive an amount of data in blocking mode.
<> 144:ef7eb2e8f9f7 729 * @param huart: UART handle.
<> 144:ef7eb2e8f9f7 730 * @param pData: pointer to data buffer.
<> 144:ef7eb2e8f9f7 731 * @param Size: amount of data to be received.
<> 144:ef7eb2e8f9f7 732 * @param Timeout: Timeout duration.
<> 144:ef7eb2e8f9f7 733 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
<> 144:ef7eb2e8f9f7 734 * address of user data buffer for storing data to be received, should be aligned on a half word frontier (16 bits)
<> 144:ef7eb2e8f9f7 735 * (as received data will be handled using u16 pointer cast). Depending on compilation chain,
<> 144:ef7eb2e8f9f7 736 * use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData.
<> 144:ef7eb2e8f9f7 737 * @retval HAL status
<> 144:ef7eb2e8f9f7 738 */
<> 144:ef7eb2e8f9f7 739 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 740 {
<> 144:ef7eb2e8f9f7 741 uint16_t* tmp;
<> 144:ef7eb2e8f9f7 742 uint16_t uhMask;
<> 144:ef7eb2e8f9f7 743
<> 144:ef7eb2e8f9f7 744 /* Check that a Rx process is not already ongoing */
<> 144:ef7eb2e8f9f7 745 if(huart->RxState == HAL_UART_STATE_READY)
<> 144:ef7eb2e8f9f7 746 {
<> 144:ef7eb2e8f9f7 747 if((pData == NULL ) || (Size == 0))
<> 144:ef7eb2e8f9f7 748 {
<> 144:ef7eb2e8f9f7 749 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 750 }
<> 144:ef7eb2e8f9f7 751
<> 144:ef7eb2e8f9f7 752 /* In case of 9bits/No Parity transfer, pData buffer provided as input paramter
<> 144:ef7eb2e8f9f7 753 should be aligned on a u16 frontier, as data to be received from RDR will be
<> 144:ef7eb2e8f9f7 754 handled through a u16 cast. */
<> 144:ef7eb2e8f9f7 755 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
<> 144:ef7eb2e8f9f7 756 {
<> 144:ef7eb2e8f9f7 757 if((((uint32_t)pData)&1) != 0)
<> 144:ef7eb2e8f9f7 758 {
<> 144:ef7eb2e8f9f7 759 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 760 }
<> 144:ef7eb2e8f9f7 761 }
<> 144:ef7eb2e8f9f7 762
<> 144:ef7eb2e8f9f7 763 /* Process Locked */
<> 144:ef7eb2e8f9f7 764 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 765
<> 144:ef7eb2e8f9f7 766 huart->ErrorCode = HAL_UART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 767 huart->RxState = HAL_UART_STATE_BUSY_RX;
<> 144:ef7eb2e8f9f7 768
<> 144:ef7eb2e8f9f7 769 huart->RxXferSize = Size;
<> 144:ef7eb2e8f9f7 770 huart->RxXferCount = Size;
<> 144:ef7eb2e8f9f7 771
<> 144:ef7eb2e8f9f7 772 /* Computation of UART mask to apply to RDR register */
<> 144:ef7eb2e8f9f7 773 UART_MASK_COMPUTATION(huart);
<> 144:ef7eb2e8f9f7 774 uhMask = huart->Mask;
<> 144:ef7eb2e8f9f7 775
<> 144:ef7eb2e8f9f7 776 /* as long as data have to be received */
<> 144:ef7eb2e8f9f7 777 while(huart->RxXferCount > 0)
<> 144:ef7eb2e8f9f7 778 {
<> 144:ef7eb2e8f9f7 779 huart->RxXferCount--;
<> 144:ef7eb2e8f9f7 780 if(UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_RXNE, RESET, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 781 {
<> 144:ef7eb2e8f9f7 782 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 783 }
<> 144:ef7eb2e8f9f7 784 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
<> 144:ef7eb2e8f9f7 785 {
<> 144:ef7eb2e8f9f7 786 tmp = (uint16_t*) pData ;
<> 144:ef7eb2e8f9f7 787 *tmp = (uint16_t)(huart->Instance->RDR & uhMask);
<> 144:ef7eb2e8f9f7 788 pData +=2;
<> 144:ef7eb2e8f9f7 789 }
<> 144:ef7eb2e8f9f7 790 else
<> 144:ef7eb2e8f9f7 791 {
<> 144:ef7eb2e8f9f7 792 *pData++ = (uint8_t)(huart->Instance->RDR & (uint8_t)uhMask);
<> 144:ef7eb2e8f9f7 793 }
<> 144:ef7eb2e8f9f7 794 }
<> 144:ef7eb2e8f9f7 795
<> 144:ef7eb2e8f9f7 796 /* At end of Rx process, restore huart->RxState to Ready */
<> 144:ef7eb2e8f9f7 797 huart->RxState = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 798
<> 144:ef7eb2e8f9f7 799 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 800 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 801
<> 144:ef7eb2e8f9f7 802 return HAL_OK;
<> 144:ef7eb2e8f9f7 803 }
<> 144:ef7eb2e8f9f7 804 else
<> 144:ef7eb2e8f9f7 805 {
<> 144:ef7eb2e8f9f7 806 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 807 }
<> 144:ef7eb2e8f9f7 808 }
<> 144:ef7eb2e8f9f7 809
<> 144:ef7eb2e8f9f7 810 /**
<> 144:ef7eb2e8f9f7 811 * @brief Send an amount of data in interrupt mode.
<> 144:ef7eb2e8f9f7 812 * @param huart: UART handle.
<> 144:ef7eb2e8f9f7 813 * @param pData: pointer to data buffer.
<> 144:ef7eb2e8f9f7 814 * @param Size: amount of data to be sent.
<> 144:ef7eb2e8f9f7 815 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
<> 144:ef7eb2e8f9f7 816 * address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
<> 144:ef7eb2e8f9f7 817 * (as sent data will be handled using u16 pointer cast). Depending on compilation chain,
<> 144:ef7eb2e8f9f7 818 * use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData.
<> 144:ef7eb2e8f9f7 819 * @retval HAL status
<> 144:ef7eb2e8f9f7 820 */
<> 144:ef7eb2e8f9f7 821 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
<> 144:ef7eb2e8f9f7 822 {
<> 144:ef7eb2e8f9f7 823 /* Check that a Tx process is not already ongoing */
<> 144:ef7eb2e8f9f7 824 if(huart->gState == HAL_UART_STATE_READY)
<> 144:ef7eb2e8f9f7 825 {
<> 144:ef7eb2e8f9f7 826 if((pData == NULL ) || (Size == 0))
<> 144:ef7eb2e8f9f7 827 {
<> 144:ef7eb2e8f9f7 828 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 829 }
<> 144:ef7eb2e8f9f7 830
<> 144:ef7eb2e8f9f7 831 /* In case of 9bits/No Parity transfer, pData buffer provided as input paramter
<> 144:ef7eb2e8f9f7 832 should be aligned on a u16 frontier, as data to be filled into TDR will be
<> 144:ef7eb2e8f9f7 833 handled through a u16 cast. */
<> 144:ef7eb2e8f9f7 834 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
<> 144:ef7eb2e8f9f7 835 {
<> 144:ef7eb2e8f9f7 836 if((((uint32_t)pData)&1) != 0)
<> 144:ef7eb2e8f9f7 837 {
<> 144:ef7eb2e8f9f7 838 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 839 }
<> 144:ef7eb2e8f9f7 840 }
<> 144:ef7eb2e8f9f7 841
<> 144:ef7eb2e8f9f7 842 /* Process Locked */
<> 144:ef7eb2e8f9f7 843 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 844
<> 144:ef7eb2e8f9f7 845 huart->pTxBuffPtr = pData;
<> 144:ef7eb2e8f9f7 846 huart->TxXferSize = Size;
<> 144:ef7eb2e8f9f7 847 huart->TxXferCount = Size;
<> 144:ef7eb2e8f9f7 848
<> 144:ef7eb2e8f9f7 849 huart->ErrorCode = HAL_UART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 850 huart->gState = HAL_UART_STATE_BUSY_TX;
<> 144:ef7eb2e8f9f7 851
<> 144:ef7eb2e8f9f7 852 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 853 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 854
<> 144:ef7eb2e8f9f7 855 /* Enable the UART Transmit Data Register Empty Interrupt */
<> 144:ef7eb2e8f9f7 856 __HAL_UART_ENABLE_IT(huart, UART_IT_TXE);
<> 144:ef7eb2e8f9f7 857
<> 144:ef7eb2e8f9f7 858 return HAL_OK;
<> 144:ef7eb2e8f9f7 859 }
<> 144:ef7eb2e8f9f7 860 else
<> 144:ef7eb2e8f9f7 861 {
<> 144:ef7eb2e8f9f7 862 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 863 }
<> 144:ef7eb2e8f9f7 864 }
<> 144:ef7eb2e8f9f7 865
<> 144:ef7eb2e8f9f7 866 /**
<> 144:ef7eb2e8f9f7 867 * @brief Receive an amount of data in interrupt mode.
<> 144:ef7eb2e8f9f7 868 * @param huart: UART handle.
<> 144:ef7eb2e8f9f7 869 * @param pData: pointer to data buffer.
<> 144:ef7eb2e8f9f7 870 * @param Size: amount of data to be received.
<> 144:ef7eb2e8f9f7 871 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
<> 144:ef7eb2e8f9f7 872 * address of user data buffer for storing data to be received, should be aligned on a half word frontier (16 bits)
<> 144:ef7eb2e8f9f7 873 * (as received data will be handled using u16 pointer cast). Depending on compilation chain,
<> 144:ef7eb2e8f9f7 874 * use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData.
<> 144:ef7eb2e8f9f7 875 * @retval HAL status
<> 144:ef7eb2e8f9f7 876 */
<> 144:ef7eb2e8f9f7 877 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
<> 144:ef7eb2e8f9f7 878 {
<> 144:ef7eb2e8f9f7 879 /* Check that a Rx process is not already ongoing */
<> 144:ef7eb2e8f9f7 880 if(huart->RxState == HAL_UART_STATE_READY)
<> 144:ef7eb2e8f9f7 881 {
<> 144:ef7eb2e8f9f7 882 if((pData == NULL ) || (Size == 0))
<> 144:ef7eb2e8f9f7 883 {
<> 144:ef7eb2e8f9f7 884 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 885 }
<> 144:ef7eb2e8f9f7 886
<> 144:ef7eb2e8f9f7 887 /* In case of 9bits/No Parity transfer, pData buffer provided as input paramter
<> 144:ef7eb2e8f9f7 888 should be aligned on a u16 frontier, as data to be received from RDR will be
<> 144:ef7eb2e8f9f7 889 handled through a u16 cast. */
<> 144:ef7eb2e8f9f7 890 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
<> 144:ef7eb2e8f9f7 891 {
<> 144:ef7eb2e8f9f7 892 if((((uint32_t)pData)&1) != 0)
<> 144:ef7eb2e8f9f7 893 {
<> 144:ef7eb2e8f9f7 894 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 895 }
<> 144:ef7eb2e8f9f7 896 }
<> 144:ef7eb2e8f9f7 897
<> 144:ef7eb2e8f9f7 898 /* Process Locked */
<> 144:ef7eb2e8f9f7 899 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 900
<> 144:ef7eb2e8f9f7 901 huart->pRxBuffPtr = pData;
<> 144:ef7eb2e8f9f7 902 huart->RxXferSize = Size;
<> 144:ef7eb2e8f9f7 903 huart->RxXferCount = Size;
<> 144:ef7eb2e8f9f7 904
<> 144:ef7eb2e8f9f7 905 /* Computation of UART mask to apply to RDR register */
<> 144:ef7eb2e8f9f7 906 UART_MASK_COMPUTATION(huart);
<> 144:ef7eb2e8f9f7 907
<> 144:ef7eb2e8f9f7 908 huart->ErrorCode = HAL_UART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 909 huart->RxState = HAL_UART_STATE_BUSY_RX;
<> 144:ef7eb2e8f9f7 910
<> 144:ef7eb2e8f9f7 911 /* Enable the UART Parity Error Interrupt */
<> 144:ef7eb2e8f9f7 912 __HAL_UART_ENABLE_IT(huart, UART_IT_PE);
<> 144:ef7eb2e8f9f7 913
<> 144:ef7eb2e8f9f7 914 /* Enable the UART Error Interrupt: (Frame error, noise error, overrun error) */
<> 144:ef7eb2e8f9f7 915 __HAL_UART_ENABLE_IT(huart, UART_IT_ERR);
<> 144:ef7eb2e8f9f7 916
<> 144:ef7eb2e8f9f7 917 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 918 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 919
<> 144:ef7eb2e8f9f7 920 /* Enable the UART Data Register not empty Interrupt */
<> 144:ef7eb2e8f9f7 921 __HAL_UART_ENABLE_IT(huart, UART_IT_RXNE);
<> 144:ef7eb2e8f9f7 922
<> 144:ef7eb2e8f9f7 923 return HAL_OK;
<> 144:ef7eb2e8f9f7 924 }
<> 144:ef7eb2e8f9f7 925 else
<> 144:ef7eb2e8f9f7 926 {
<> 144:ef7eb2e8f9f7 927 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 928 }
<> 144:ef7eb2e8f9f7 929 }
<> 144:ef7eb2e8f9f7 930
<> 144:ef7eb2e8f9f7 931 /**
<> 144:ef7eb2e8f9f7 932 * @brief Handle UART interrupt request.
<> 144:ef7eb2e8f9f7 933 * @param huart: UART handle.
<> 144:ef7eb2e8f9f7 934 * @retval None
<> 144:ef7eb2e8f9f7 935 */
<> 144:ef7eb2e8f9f7 936 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 937 {
<> 144:ef7eb2e8f9f7 938 /* UART parity error interrupt occurred -------------------------------------*/
<> 144:ef7eb2e8f9f7 939 if((__HAL_UART_GET_IT(huart, UART_IT_PE) != RESET) && (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_PE) != RESET))
<> 144:ef7eb2e8f9f7 940 {
<> 144:ef7eb2e8f9f7 941 __HAL_UART_CLEAR_IT(huart, UART_CLEAR_PEF);
<> 144:ef7eb2e8f9f7 942
<> 144:ef7eb2e8f9f7 943 huart->ErrorCode |= HAL_UART_ERROR_PE;
<> 144:ef7eb2e8f9f7 944 }
<> 144:ef7eb2e8f9f7 945
<> 144:ef7eb2e8f9f7 946 /* UART frame error interrupt occurred --------------------------------------*/
<> 144:ef7eb2e8f9f7 947 if((__HAL_UART_GET_IT(huart, UART_IT_FE) != RESET) && (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_ERR) != RESET))
<> 144:ef7eb2e8f9f7 948 {
<> 144:ef7eb2e8f9f7 949 __HAL_UART_CLEAR_IT(huart, UART_CLEAR_FEF);
<> 144:ef7eb2e8f9f7 950
<> 144:ef7eb2e8f9f7 951 huart->ErrorCode |= HAL_UART_ERROR_FE;
<> 144:ef7eb2e8f9f7 952 }
<> 144:ef7eb2e8f9f7 953
<> 144:ef7eb2e8f9f7 954 /* UART noise error interrupt occurred --------------------------------------*/
<> 144:ef7eb2e8f9f7 955 if((__HAL_UART_GET_IT(huart, UART_IT_NE) != RESET) && (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_ERR) != RESET))
<> 144:ef7eb2e8f9f7 956 {
<> 144:ef7eb2e8f9f7 957 __HAL_UART_CLEAR_IT(huart, UART_CLEAR_NEF);
<> 144:ef7eb2e8f9f7 958
<> 144:ef7eb2e8f9f7 959 huart->ErrorCode |= HAL_UART_ERROR_NE;
<> 144:ef7eb2e8f9f7 960 }
<> 144:ef7eb2e8f9f7 961
<> 144:ef7eb2e8f9f7 962 /* UART Over-Run interrupt occurred -----------------------------------------*/
<> 144:ef7eb2e8f9f7 963 if((__HAL_UART_GET_IT(huart, UART_IT_ORE) != RESET) && (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_ERR) != RESET))
<> 144:ef7eb2e8f9f7 964 {
<> 144:ef7eb2e8f9f7 965 __HAL_UART_CLEAR_IT(huart, UART_CLEAR_OREF);
<> 144:ef7eb2e8f9f7 966
<> 144:ef7eb2e8f9f7 967 huart->ErrorCode |= HAL_UART_ERROR_ORE;
<> 144:ef7eb2e8f9f7 968 }
<> 144:ef7eb2e8f9f7 969
<> 144:ef7eb2e8f9f7 970 #if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC)
<> 144:ef7eb2e8f9f7 971 /* UART wakeup from Stop mode interrupt occurred -------------------------------------*/
<> 144:ef7eb2e8f9f7 972 if((__HAL_UART_GET_IT(huart, UART_IT_WUF) != RESET) && (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_WUF) != RESET))
<> 144:ef7eb2e8f9f7 973 {
<> 144:ef7eb2e8f9f7 974 __HAL_UART_CLEAR_IT(huart, UART_CLEAR_WUF);
<> 144:ef7eb2e8f9f7 975 /* Set the UART state ready to be able to start again the process */
<> 144:ef7eb2e8f9f7 976 huart->gState = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 977 huart->RxState = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 978 HAL_UARTEx_WakeupCallback(huart);
<> 144:ef7eb2e8f9f7 979 }
<> 144:ef7eb2e8f9f7 980 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC) */
<> 144:ef7eb2e8f9f7 981
<> 144:ef7eb2e8f9f7 982 /* UART in mode Receiver ---------------------------------------------------*/
<> 144:ef7eb2e8f9f7 983 if((__HAL_UART_GET_IT(huart, UART_IT_RXNE) != RESET) && (__HAL_UART_GET_IT_SOURCE(huart, UART_IT_RXNE) != RESET))
<> 144:ef7eb2e8f9f7 984 {
<> 144:ef7eb2e8f9f7 985 UART_Receive_IT(huart);
<> 144:ef7eb2e8f9f7 986 }
<> 144:ef7eb2e8f9f7 987
<> 144:ef7eb2e8f9f7 988
<> 144:ef7eb2e8f9f7 989 /* UART in mode Transmitter ------------------------------------------------*/
<> 144:ef7eb2e8f9f7 990 if((__HAL_UART_GET_IT(huart, UART_IT_TXE) != RESET) &&(__HAL_UART_GET_IT_SOURCE(huart, UART_IT_TXE) != RESET))
<> 144:ef7eb2e8f9f7 991 {
<> 144:ef7eb2e8f9f7 992 UART_Transmit_IT(huart);
<> 144:ef7eb2e8f9f7 993 }
<> 144:ef7eb2e8f9f7 994
<> 144:ef7eb2e8f9f7 995 /* UART in mode Transmitter (transmission end) -----------------------------*/
<> 144:ef7eb2e8f9f7 996 if((__HAL_UART_GET_IT(huart, UART_IT_TC) != RESET) &&(__HAL_UART_GET_IT_SOURCE(huart, UART_IT_TC) != RESET))
<> 144:ef7eb2e8f9f7 997 {
<> 144:ef7eb2e8f9f7 998 UART_EndTransmit_IT(huart);
<> 144:ef7eb2e8f9f7 999 }
<> 144:ef7eb2e8f9f7 1000
<> 144:ef7eb2e8f9f7 1001 if(huart->ErrorCode != HAL_UART_ERROR_NONE)
<> 144:ef7eb2e8f9f7 1002 {
<> 144:ef7eb2e8f9f7 1003 /* Set the UART state ready to be able to start again the Tx/Rx process */
<> 144:ef7eb2e8f9f7 1004 huart->gState = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1005 huart->RxState = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1006
<> 144:ef7eb2e8f9f7 1007 HAL_UART_ErrorCallback(huart);
<> 144:ef7eb2e8f9f7 1008 }
<> 144:ef7eb2e8f9f7 1009 }
<> 144:ef7eb2e8f9f7 1010
<> 144:ef7eb2e8f9f7 1011 /**
<> 144:ef7eb2e8f9f7 1012 * @brief Send an amount of data in DMA mode.
<> 144:ef7eb2e8f9f7 1013 * @param huart: UART handle.
<> 144:ef7eb2e8f9f7 1014 * @param pData: pointer to data buffer.
<> 144:ef7eb2e8f9f7 1015 * @param Size: amount of data to be sent.
<> 144:ef7eb2e8f9f7 1016 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
<> 144:ef7eb2e8f9f7 1017 * address of user data buffer containing data to be sent, should be aligned on a half word frontier (16 bits)
<> 144:ef7eb2e8f9f7 1018 * (as sent data will be handled by DMA from halfword frontier). Depending on compilation chain,
<> 144:ef7eb2e8f9f7 1019 * use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData.
<> 144:ef7eb2e8f9f7 1020 * @retval HAL status
<> 144:ef7eb2e8f9f7 1021 */
<> 144:ef7eb2e8f9f7 1022 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
<> 144:ef7eb2e8f9f7 1023 {
<> 144:ef7eb2e8f9f7 1024 uint32_t *tmp;
<> 144:ef7eb2e8f9f7 1025
<> 144:ef7eb2e8f9f7 1026 /* Check that a Tx process is not already ongoing */
<> 144:ef7eb2e8f9f7 1027 if(huart->gState == HAL_UART_STATE_READY)
<> 144:ef7eb2e8f9f7 1028 {
<> 144:ef7eb2e8f9f7 1029 if((pData == NULL ) || (Size == 0))
<> 144:ef7eb2e8f9f7 1030 {
<> 144:ef7eb2e8f9f7 1031 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 1032 }
<> 144:ef7eb2e8f9f7 1033
<> 144:ef7eb2e8f9f7 1034 /* In case of 9bits/No Parity transfer, pData buffer provided as input paramter
<> 144:ef7eb2e8f9f7 1035 should be aligned on a u16 frontier, as data copy into TDR will be
<> 144:ef7eb2e8f9f7 1036 handled by DMA from a u16 frontier. */
<> 144:ef7eb2e8f9f7 1037 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
<> 144:ef7eb2e8f9f7 1038 {
<> 144:ef7eb2e8f9f7 1039 if((((uint32_t)pData)&1) != 0)
<> 144:ef7eb2e8f9f7 1040 {
<> 144:ef7eb2e8f9f7 1041 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 1042 }
<> 144:ef7eb2e8f9f7 1043 }
<> 144:ef7eb2e8f9f7 1044
<> 144:ef7eb2e8f9f7 1045 /* Process Locked */
<> 144:ef7eb2e8f9f7 1046 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 1047
<> 144:ef7eb2e8f9f7 1048 huart->pTxBuffPtr = pData;
<> 144:ef7eb2e8f9f7 1049 huart->TxXferSize = Size;
<> 144:ef7eb2e8f9f7 1050 huart->TxXferCount = Size;
<> 144:ef7eb2e8f9f7 1051
<> 144:ef7eb2e8f9f7 1052 huart->ErrorCode = HAL_UART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 1053 huart->gState = HAL_UART_STATE_BUSY_TX;
<> 144:ef7eb2e8f9f7 1054
<> 144:ef7eb2e8f9f7 1055 /* Set the UART DMA transfer complete callback */
<> 144:ef7eb2e8f9f7 1056 huart->hdmatx->XferCpltCallback = UART_DMATransmitCplt;
<> 144:ef7eb2e8f9f7 1057
<> 144:ef7eb2e8f9f7 1058 /* Set the UART DMA Half transfer complete callback */
<> 144:ef7eb2e8f9f7 1059 huart->hdmatx->XferHalfCpltCallback = UART_DMATxHalfCplt;
<> 144:ef7eb2e8f9f7 1060
<> 144:ef7eb2e8f9f7 1061 /* Set the DMA error callback */
<> 144:ef7eb2e8f9f7 1062 huart->hdmatx->XferErrorCallback = UART_DMAError;
<> 144:ef7eb2e8f9f7 1063
<> 144:ef7eb2e8f9f7 1064 /* Enable the UART transmit DMA channel */
<> 144:ef7eb2e8f9f7 1065 tmp = (uint32_t*)&pData;
<> 144:ef7eb2e8f9f7 1066 HAL_DMA_Start_IT(huart->hdmatx, *(uint32_t*)tmp, (uint32_t)&huart->Instance->TDR, Size);
<> 144:ef7eb2e8f9f7 1067
<> 144:ef7eb2e8f9f7 1068 /* Clear the TC flag in the ICR register */
<> 144:ef7eb2e8f9f7 1069 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_TCF);
<> 144:ef7eb2e8f9f7 1070
<> 144:ef7eb2e8f9f7 1071 /* Enable the DMA transfer for transmit request by setting the DMAT bit
<> 144:ef7eb2e8f9f7 1072 in the UART CR3 register */
<> 144:ef7eb2e8f9f7 1073 huart->Instance->CR3 |= USART_CR3_DMAT;
<> 144:ef7eb2e8f9f7 1074
<> 144:ef7eb2e8f9f7 1075 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1076 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 1077
<> 144:ef7eb2e8f9f7 1078 return HAL_OK;
<> 144:ef7eb2e8f9f7 1079 }
<> 144:ef7eb2e8f9f7 1080 else
<> 144:ef7eb2e8f9f7 1081 {
<> 144:ef7eb2e8f9f7 1082 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 1083 }
<> 144:ef7eb2e8f9f7 1084 }
<> 144:ef7eb2e8f9f7 1085
<> 144:ef7eb2e8f9f7 1086 /**
<> 144:ef7eb2e8f9f7 1087 * @brief Receive an amount of data in DMA mode.
<> 144:ef7eb2e8f9f7 1088 * @param huart: UART handle.
<> 144:ef7eb2e8f9f7 1089 * @param pData: pointer to data buffer.
<> 144:ef7eb2e8f9f7 1090 * @param Size: amount of data to be received.
<> 144:ef7eb2e8f9f7 1091 * @note When UART parity is not enabled (PCE = 0), and Word Length is configured to 9 bits (M1-M0 = 01),
<> 144:ef7eb2e8f9f7 1092 * address of user data buffer for storing data to be received, should be aligned on a half word frontier (16 bits)
<> 144:ef7eb2e8f9f7 1093 * (as received data will be handled by DMA from halfword frontier). Depending on compilation chain,
<> 144:ef7eb2e8f9f7 1094 * use of specific alignment compilation directives or pragmas might be required to ensure proper alignment for pData.
<> 144:ef7eb2e8f9f7 1095 * @retval HAL status
<> 144:ef7eb2e8f9f7 1096 */
<> 144:ef7eb2e8f9f7 1097 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size)
<> 144:ef7eb2e8f9f7 1098 {
<> 144:ef7eb2e8f9f7 1099 uint32_t *tmp;
<> 144:ef7eb2e8f9f7 1100
<> 144:ef7eb2e8f9f7 1101 /* Check that a Rx process is not already ongoing */
<> 144:ef7eb2e8f9f7 1102 if(huart->RxState == HAL_UART_STATE_READY)
<> 144:ef7eb2e8f9f7 1103 {
<> 144:ef7eb2e8f9f7 1104 if((pData == NULL ) || (Size == 0))
<> 144:ef7eb2e8f9f7 1105 {
<> 144:ef7eb2e8f9f7 1106 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 1107 }
<> 144:ef7eb2e8f9f7 1108
<> 144:ef7eb2e8f9f7 1109 /* In case of 9bits/No Parity transfer, pData buffer provided as input paramter
<> 144:ef7eb2e8f9f7 1110 should be aligned on a u16 frontier, as data copy from RDR will be
<> 144:ef7eb2e8f9f7 1111 handled by DMA from a u16 frontier. */
<> 144:ef7eb2e8f9f7 1112 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
<> 144:ef7eb2e8f9f7 1113 {
<> 144:ef7eb2e8f9f7 1114 if((((uint32_t)pData)&1) != 0)
<> 144:ef7eb2e8f9f7 1115 {
<> 144:ef7eb2e8f9f7 1116 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 1117 }
<> 144:ef7eb2e8f9f7 1118 }
<> 144:ef7eb2e8f9f7 1119
<> 144:ef7eb2e8f9f7 1120 /* Process Locked */
<> 144:ef7eb2e8f9f7 1121 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 1122
<> 144:ef7eb2e8f9f7 1123 huart->pRxBuffPtr = pData;
<> 144:ef7eb2e8f9f7 1124 huart->RxXferSize = Size;
<> 144:ef7eb2e8f9f7 1125
<> 144:ef7eb2e8f9f7 1126 huart->ErrorCode = HAL_UART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 1127 huart->RxState = HAL_UART_STATE_BUSY_RX;
<> 144:ef7eb2e8f9f7 1128
<> 144:ef7eb2e8f9f7 1129 /* Set the UART DMA transfer complete callback */
<> 144:ef7eb2e8f9f7 1130 huart->hdmarx->XferCpltCallback = UART_DMAReceiveCplt;
<> 144:ef7eb2e8f9f7 1131
<> 144:ef7eb2e8f9f7 1132 /* Set the UART DMA Half transfer complete callback */
<> 144:ef7eb2e8f9f7 1133 huart->hdmarx->XferHalfCpltCallback = UART_DMARxHalfCplt;
<> 144:ef7eb2e8f9f7 1134
<> 144:ef7eb2e8f9f7 1135 /* Set the DMA error callback */
<> 144:ef7eb2e8f9f7 1136 huart->hdmarx->XferErrorCallback = UART_DMAError;
<> 144:ef7eb2e8f9f7 1137
<> 144:ef7eb2e8f9f7 1138 /* Enable the DMA channel */
<> 144:ef7eb2e8f9f7 1139 tmp = (uint32_t*)&pData;
<> 144:ef7eb2e8f9f7 1140 HAL_DMA_Start_IT(huart->hdmarx, (uint32_t)&huart->Instance->RDR, *(uint32_t*)tmp, Size);
<> 144:ef7eb2e8f9f7 1141
<> 144:ef7eb2e8f9f7 1142 /* Enable the DMA transfer for the receiver request by setting the DMAR bit
<> 144:ef7eb2e8f9f7 1143 in the UART CR3 register */
<> 144:ef7eb2e8f9f7 1144 huart->Instance->CR3 |= USART_CR3_DMAR;
<> 144:ef7eb2e8f9f7 1145
<> 144:ef7eb2e8f9f7 1146 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1147 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 1148
<> 144:ef7eb2e8f9f7 1149 return HAL_OK;
<> 144:ef7eb2e8f9f7 1150 }
<> 144:ef7eb2e8f9f7 1151 else
<> 144:ef7eb2e8f9f7 1152 {
<> 144:ef7eb2e8f9f7 1153 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 1154 }
<> 144:ef7eb2e8f9f7 1155 }
<> 144:ef7eb2e8f9f7 1156
<> 144:ef7eb2e8f9f7 1157 /**
<> 144:ef7eb2e8f9f7 1158 * @brief Pause the DMA Transfer.
<> 144:ef7eb2e8f9f7 1159 * @param huart: UART handle.
<> 144:ef7eb2e8f9f7 1160 * @retval HAL status
<> 144:ef7eb2e8f9f7 1161 */
<> 144:ef7eb2e8f9f7 1162 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1163 {
<> 144:ef7eb2e8f9f7 1164 /* Process Locked */
<> 144:ef7eb2e8f9f7 1165 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 1166
<> 144:ef7eb2e8f9f7 1167 if(huart->gState == HAL_UART_STATE_BUSY_TX)
<> 144:ef7eb2e8f9f7 1168 {
<> 144:ef7eb2e8f9f7 1169 /* Disable the UART DMA Tx request */
<> 144:ef7eb2e8f9f7 1170 huart->Instance->CR3 &= (uint32_t)(~USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 1171 }
<> 144:ef7eb2e8f9f7 1172 if(huart->RxState == HAL_UART_STATE_BUSY_RX)
<> 144:ef7eb2e8f9f7 1173 {
<> 144:ef7eb2e8f9f7 1174 /* Disable the UART DMA Rx request */
<> 144:ef7eb2e8f9f7 1175 huart->Instance->CR3 &= (uint32_t)(~USART_CR3_DMAR);
<> 144:ef7eb2e8f9f7 1176 }
<> 144:ef7eb2e8f9f7 1177
<> 144:ef7eb2e8f9f7 1178 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1179 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 1180
<> 144:ef7eb2e8f9f7 1181 return HAL_OK;
<> 144:ef7eb2e8f9f7 1182 }
<> 144:ef7eb2e8f9f7 1183
<> 144:ef7eb2e8f9f7 1184 /**
<> 144:ef7eb2e8f9f7 1185 * @brief Resume the DMA Transfer.
<> 144:ef7eb2e8f9f7 1186 * @param huart: UART handle.
<> 144:ef7eb2e8f9f7 1187 * @retval HAL status
<> 144:ef7eb2e8f9f7 1188 */
<> 144:ef7eb2e8f9f7 1189 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1190 {
<> 144:ef7eb2e8f9f7 1191 /* Process Locked */
<> 144:ef7eb2e8f9f7 1192 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 1193
<> 144:ef7eb2e8f9f7 1194 if(huart->gState == HAL_UART_STATE_BUSY_TX)
<> 144:ef7eb2e8f9f7 1195 {
<> 144:ef7eb2e8f9f7 1196 /* Enable the UART DMA Tx request */
<> 144:ef7eb2e8f9f7 1197 huart->Instance->CR3 |= USART_CR3_DMAT;
<> 144:ef7eb2e8f9f7 1198 }
<> 144:ef7eb2e8f9f7 1199 if(huart->RxState == HAL_UART_STATE_BUSY_RX)
<> 144:ef7eb2e8f9f7 1200 {
<> 144:ef7eb2e8f9f7 1201 /* Clear the Overrun flag before resumming the Rx transfer*/
<> 144:ef7eb2e8f9f7 1202 __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF);
<> 144:ef7eb2e8f9f7 1203
<> 144:ef7eb2e8f9f7 1204 /* Enable the UART DMA Rx request */
<> 144:ef7eb2e8f9f7 1205 huart->Instance->CR3 |= USART_CR3_DMAR;
<> 144:ef7eb2e8f9f7 1206 }
<> 144:ef7eb2e8f9f7 1207
<> 144:ef7eb2e8f9f7 1208 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1209 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 1210
<> 144:ef7eb2e8f9f7 1211 return HAL_OK;
<> 144:ef7eb2e8f9f7 1212 }
<> 144:ef7eb2e8f9f7 1213
<> 144:ef7eb2e8f9f7 1214 /**
<> 144:ef7eb2e8f9f7 1215 * @brief Stop the DMA Transfer.
<> 144:ef7eb2e8f9f7 1216 * @param huart: UART handle.
<> 144:ef7eb2e8f9f7 1217 * @retval HAL status
<> 144:ef7eb2e8f9f7 1218 */
<> 144:ef7eb2e8f9f7 1219 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1220 {
<> 144:ef7eb2e8f9f7 1221 /* The Lock is not implemented on this API to allow the user application
<> 144:ef7eb2e8f9f7 1222 to call the HAL UART API under callbacks HAL_UART_TxCpltCallback() / HAL_UART_RxCpltCallback() /
<> 144:ef7eb2e8f9f7 1223 HAL_UART_TxHalfCpltCallback() / HAL_UART_RxHalfCpltCallback ():
<> 144:ef7eb2e8f9f7 1224 indeed, when HAL_DMA_Abort() API is called, the DMA TX/RX Transfer or Half Transfer complete interrupt is
<> 144:ef7eb2e8f9f7 1225 generated if the DMA transfer interruption occurs at the middle or at the end of the stream
<> 144:ef7eb2e8f9f7 1226 and the corresponding call back is executed.
<> 144:ef7eb2e8f9f7 1227 */
<> 144:ef7eb2e8f9f7 1228
<> 144:ef7eb2e8f9f7 1229 /* Disable the UART Tx/Rx DMA requests */
<> 144:ef7eb2e8f9f7 1230 huart->Instance->CR3 &= ~USART_CR3_DMAT;
<> 144:ef7eb2e8f9f7 1231 huart->Instance->CR3 &= ~USART_CR3_DMAR;
<> 144:ef7eb2e8f9f7 1232
<> 144:ef7eb2e8f9f7 1233 /* Abort the UART DMA tx channel */
<> 144:ef7eb2e8f9f7 1234 if(huart->hdmatx != NULL)
<> 144:ef7eb2e8f9f7 1235 {
<> 144:ef7eb2e8f9f7 1236 HAL_DMA_Abort(huart->hdmatx);
<> 144:ef7eb2e8f9f7 1237 }
<> 144:ef7eb2e8f9f7 1238 /* Abort the UART DMA rx channel */
<> 144:ef7eb2e8f9f7 1239 if(huart->hdmarx != NULL)
<> 144:ef7eb2e8f9f7 1240 {
<> 144:ef7eb2e8f9f7 1241 HAL_DMA_Abort(huart->hdmarx);
<> 144:ef7eb2e8f9f7 1242 }
<> 144:ef7eb2e8f9f7 1243
<> 144:ef7eb2e8f9f7 1244 huart->gState = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1245 huart->RxState = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1246
<> 144:ef7eb2e8f9f7 1247 return HAL_OK;
<> 144:ef7eb2e8f9f7 1248 }
<> 144:ef7eb2e8f9f7 1249
<> 144:ef7eb2e8f9f7 1250 /**
<> 144:ef7eb2e8f9f7 1251 * @brief Tx Transfer completed callback.
<> 144:ef7eb2e8f9f7 1252 * @param huart: UART handle.
<> 144:ef7eb2e8f9f7 1253 * @retval None
<> 144:ef7eb2e8f9f7 1254 */
<> 144:ef7eb2e8f9f7 1255 __weak void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1256 {
<> 144:ef7eb2e8f9f7 1257 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1258 UNUSED(huart);
<> 144:ef7eb2e8f9f7 1259
<> 144:ef7eb2e8f9f7 1260 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1261 the HAL_UART_TxCpltCallback can be implemented in the user file.
<> 144:ef7eb2e8f9f7 1262 */
<> 144:ef7eb2e8f9f7 1263 }
<> 144:ef7eb2e8f9f7 1264
<> 144:ef7eb2e8f9f7 1265 /**
<> 144:ef7eb2e8f9f7 1266 * @brief Tx Half Transfer completed callback.
<> 144:ef7eb2e8f9f7 1267 * @param huart: UART handle.
<> 144:ef7eb2e8f9f7 1268 * @retval None
<> 144:ef7eb2e8f9f7 1269 */
<> 144:ef7eb2e8f9f7 1270 __weak void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1271 {
<> 144:ef7eb2e8f9f7 1272 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1273 UNUSED(huart);
<> 144:ef7eb2e8f9f7 1274
<> 144:ef7eb2e8f9f7 1275 /* NOTE: This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1276 the HAL_UART_TxHalfCpltCallback can be implemented in the user file.
<> 144:ef7eb2e8f9f7 1277 */
<> 144:ef7eb2e8f9f7 1278 }
<> 144:ef7eb2e8f9f7 1279
<> 144:ef7eb2e8f9f7 1280 /**
<> 144:ef7eb2e8f9f7 1281 * @brief Rx Transfer completed callback.
<> 144:ef7eb2e8f9f7 1282 * @param huart: UART handle.
<> 144:ef7eb2e8f9f7 1283 * @retval None
<> 144:ef7eb2e8f9f7 1284 */
<> 144:ef7eb2e8f9f7 1285 __weak void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1286 {
<> 144:ef7eb2e8f9f7 1287 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1288 UNUSED(huart);
<> 144:ef7eb2e8f9f7 1289
<> 144:ef7eb2e8f9f7 1290 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1291 the HAL_UART_RxCpltCallback can be implemented in the user file.
<> 144:ef7eb2e8f9f7 1292 */
<> 144:ef7eb2e8f9f7 1293 }
<> 144:ef7eb2e8f9f7 1294
<> 144:ef7eb2e8f9f7 1295 /**
<> 144:ef7eb2e8f9f7 1296 * @brief Rx Half Transfer completed callback.
<> 144:ef7eb2e8f9f7 1297 * @param huart: UART handle.
<> 144:ef7eb2e8f9f7 1298 * @retval None
<> 144:ef7eb2e8f9f7 1299 */
<> 144:ef7eb2e8f9f7 1300 __weak void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1301 {
<> 144:ef7eb2e8f9f7 1302 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1303 UNUSED(huart);
<> 144:ef7eb2e8f9f7 1304
<> 144:ef7eb2e8f9f7 1305 /* NOTE: This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1306 the HAL_UART_RxHalfCpltCallback can be implemented in the user file.
<> 144:ef7eb2e8f9f7 1307 */
<> 144:ef7eb2e8f9f7 1308 }
<> 144:ef7eb2e8f9f7 1309
<> 144:ef7eb2e8f9f7 1310 /**
<> 144:ef7eb2e8f9f7 1311 * @brief UART error callback.
<> 144:ef7eb2e8f9f7 1312 * @param huart: UART handle.
<> 144:ef7eb2e8f9f7 1313 * @retval None
<> 144:ef7eb2e8f9f7 1314 */
<> 144:ef7eb2e8f9f7 1315 __weak void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1316 {
<> 144:ef7eb2e8f9f7 1317 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1318 UNUSED(huart);
<> 144:ef7eb2e8f9f7 1319
<> 144:ef7eb2e8f9f7 1320 /* NOTE : This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1321 the HAL_UART_ErrorCallback can be implemented in the user file.
<> 144:ef7eb2e8f9f7 1322 */
<> 144:ef7eb2e8f9f7 1323 }
<> 144:ef7eb2e8f9f7 1324
<> 144:ef7eb2e8f9f7 1325 /**
<> 144:ef7eb2e8f9f7 1326 * @}
<> 144:ef7eb2e8f9f7 1327 */
<> 144:ef7eb2e8f9f7 1328
<> 144:ef7eb2e8f9f7 1329 /** @defgroup UART_Exported_Functions_Group3 Peripheral Control functions
<> 144:ef7eb2e8f9f7 1330 * @brief UART control functions
<> 144:ef7eb2e8f9f7 1331 *
<> 144:ef7eb2e8f9f7 1332 @verbatim
<> 144:ef7eb2e8f9f7 1333 ===============================================================================
<> 144:ef7eb2e8f9f7 1334 ##### Peripheral Control functions #####
<> 144:ef7eb2e8f9f7 1335 ===============================================================================
<> 144:ef7eb2e8f9f7 1336 [..]
<> 144:ef7eb2e8f9f7 1337 This subsection provides a set of functions allowing to control the UART.
<> 144:ef7eb2e8f9f7 1338 (+) HAL_MultiProcessor_EnableMuteMode() API enables mute mode
<> 144:ef7eb2e8f9f7 1339 (+) HAL_MultiProcessor_DisableMuteMode() API disables mute mode
<> 144:ef7eb2e8f9f7 1340 (+) HAL_MultiProcessor_EnterMuteMode() API enters mute mode
<> 144:ef7eb2e8f9f7 1341 (+) HAL_HalfDuplex_EnableTransmitter() API disables receiver and enables transmitter
<> 144:ef7eb2e8f9f7 1342 (+) HAL_HalfDuplex_EnableReceiver() API disables transmitter and enables receiver
<> 144:ef7eb2e8f9f7 1343 @endverbatim
<> 144:ef7eb2e8f9f7 1344 * @{
<> 144:ef7eb2e8f9f7 1345 */
<> 144:ef7eb2e8f9f7 1346
<> 144:ef7eb2e8f9f7 1347 /**
<> 144:ef7eb2e8f9f7 1348 * @brief Enable UART in mute mode (does not mean UART enters mute mode;
<> 144:ef7eb2e8f9f7 1349 * to enter mute mode, HAL_MultiProcessor_EnterMuteMode() API must be called).
<> 144:ef7eb2e8f9f7 1350 * @param huart: UART handle.
<> 144:ef7eb2e8f9f7 1351 * @retval HAL status
<> 144:ef7eb2e8f9f7 1352 */
<> 144:ef7eb2e8f9f7 1353 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1354 {
<> 144:ef7eb2e8f9f7 1355 /* Process Locked */
<> 144:ef7eb2e8f9f7 1356 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 1357
<> 144:ef7eb2e8f9f7 1358 huart->gState = HAL_UART_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1359
<> 144:ef7eb2e8f9f7 1360 /* Enable USART mute mode by setting the MME bit in the CR1 register */
<> 144:ef7eb2e8f9f7 1361 huart->Instance->CR1 |= USART_CR1_MME;
<> 144:ef7eb2e8f9f7 1362
<> 144:ef7eb2e8f9f7 1363 huart->gState = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1364
<> 144:ef7eb2e8f9f7 1365 return (UART_CheckIdleState(huart));
<> 144:ef7eb2e8f9f7 1366 }
<> 144:ef7eb2e8f9f7 1367
<> 144:ef7eb2e8f9f7 1368 /**
<> 144:ef7eb2e8f9f7 1369 * @brief Disable UART mute mode (does not mean the UART actually exits mute mode
<> 144:ef7eb2e8f9f7 1370 * as it may not have been in mute mode at this very moment).
<> 144:ef7eb2e8f9f7 1371 * @param huart: UART handle.
<> 144:ef7eb2e8f9f7 1372 * @retval HAL status
<> 144:ef7eb2e8f9f7 1373 */
<> 144:ef7eb2e8f9f7 1374 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1375 {
<> 144:ef7eb2e8f9f7 1376 /* Process Locked */
<> 144:ef7eb2e8f9f7 1377 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 1378
<> 144:ef7eb2e8f9f7 1379 huart->gState = HAL_UART_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1380
<> 144:ef7eb2e8f9f7 1381 /* Disable USART mute mode by clearing the MME bit in the CR1 register */
<> 144:ef7eb2e8f9f7 1382 huart->Instance->CR1 &= ~(USART_CR1_MME);
<> 144:ef7eb2e8f9f7 1383
<> 144:ef7eb2e8f9f7 1384 huart->gState = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1385
<> 144:ef7eb2e8f9f7 1386 return (UART_CheckIdleState(huart));
<> 144:ef7eb2e8f9f7 1387 }
<> 144:ef7eb2e8f9f7 1388
<> 144:ef7eb2e8f9f7 1389 /**
<> 144:ef7eb2e8f9f7 1390 * @brief Enter UART mute mode (means UART actually enters mute mode).
<> 144:ef7eb2e8f9f7 1391 * @note To exit from mute mode, HAL_MultiProcessor_DisableMuteMode() API must be called.
<> 144:ef7eb2e8f9f7 1392 * @param huart: UART handle.
<> 144:ef7eb2e8f9f7 1393 * @retval None
<> 144:ef7eb2e8f9f7 1394 */
<> 144:ef7eb2e8f9f7 1395 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1396 {
<> 144:ef7eb2e8f9f7 1397 __HAL_UART_SEND_REQ(huart, UART_MUTE_MODE_REQUEST);
<> 144:ef7eb2e8f9f7 1398 }
<> 144:ef7eb2e8f9f7 1399
<> 144:ef7eb2e8f9f7 1400 /**
<> 144:ef7eb2e8f9f7 1401 * @brief Enable the UART transmitter and disable the UART receiver.
<> 144:ef7eb2e8f9f7 1402 * @param huart: UART handle.
<> 144:ef7eb2e8f9f7 1403 * @retval HAL status
<> 144:ef7eb2e8f9f7 1404 */
<> 144:ef7eb2e8f9f7 1405 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1406 {
<> 144:ef7eb2e8f9f7 1407 /* Process Locked */
<> 144:ef7eb2e8f9f7 1408 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 1409 huart->gState = HAL_UART_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1410
<> 144:ef7eb2e8f9f7 1411 /* Clear TE and RE bits */
<> 144:ef7eb2e8f9f7 1412 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE));
<> 144:ef7eb2e8f9f7 1413 /* Enable the USART's transmit interface by setting the TE bit in the USART CR1 register */
<> 144:ef7eb2e8f9f7 1414 SET_BIT(huart->Instance->CR1, USART_CR1_TE);
<> 144:ef7eb2e8f9f7 1415
<> 144:ef7eb2e8f9f7 1416 huart->gState = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1417
<> 144:ef7eb2e8f9f7 1418 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1419 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 1420
<> 144:ef7eb2e8f9f7 1421 return HAL_OK;
<> 144:ef7eb2e8f9f7 1422 }
<> 144:ef7eb2e8f9f7 1423
<> 144:ef7eb2e8f9f7 1424 /**
<> 144:ef7eb2e8f9f7 1425 * @brief Enable the UART receiver and disable the UART transmitter.
<> 144:ef7eb2e8f9f7 1426 * @param huart: UART handle.
<> 144:ef7eb2e8f9f7 1427 * @retval HAL status.
<> 144:ef7eb2e8f9f7 1428 */
<> 144:ef7eb2e8f9f7 1429 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1430 {
<> 144:ef7eb2e8f9f7 1431 /* Process Locked */
<> 144:ef7eb2e8f9f7 1432 __HAL_LOCK(huart);
<> 144:ef7eb2e8f9f7 1433 huart->gState = HAL_UART_STATE_BUSY;
<> 144:ef7eb2e8f9f7 1434
<> 144:ef7eb2e8f9f7 1435 /* Clear TE and RE bits */
<> 144:ef7eb2e8f9f7 1436 CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE));
<> 144:ef7eb2e8f9f7 1437 /* Enable the USART's receive interface by setting the RE bit in the USART CR1 register */
<> 144:ef7eb2e8f9f7 1438 SET_BIT(huart->Instance->CR1, USART_CR1_RE);
<> 144:ef7eb2e8f9f7 1439
<> 144:ef7eb2e8f9f7 1440 huart->gState = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1441 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1442 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 1443
<> 144:ef7eb2e8f9f7 1444 return HAL_OK;
<> 144:ef7eb2e8f9f7 1445 }
<> 144:ef7eb2e8f9f7 1446
<> 144:ef7eb2e8f9f7 1447 /**
<> 144:ef7eb2e8f9f7 1448 * @}
<> 144:ef7eb2e8f9f7 1449 */
<> 144:ef7eb2e8f9f7 1450
<> 144:ef7eb2e8f9f7 1451 /** @defgroup UART_Exported_Functions_Group4 Peripheral State and Error functions
<> 144:ef7eb2e8f9f7 1452 * @brief UART Peripheral State functions
<> 144:ef7eb2e8f9f7 1453 *
<> 144:ef7eb2e8f9f7 1454 @verbatim
<> 144:ef7eb2e8f9f7 1455 ==============================================================================
<> 144:ef7eb2e8f9f7 1456 ##### Peripheral State and Error functions #####
<> 144:ef7eb2e8f9f7 1457 ==============================================================================
<> 144:ef7eb2e8f9f7 1458 [..]
<> 144:ef7eb2e8f9f7 1459 This subsection provides functions allowing to :
<> 144:ef7eb2e8f9f7 1460 (+) Return the UART handle state.
<> 144:ef7eb2e8f9f7 1461 (+) Return the UART handle error code
<> 144:ef7eb2e8f9f7 1462
<> 144:ef7eb2e8f9f7 1463 @endverbatim
<> 144:ef7eb2e8f9f7 1464 * @{
<> 144:ef7eb2e8f9f7 1465 */
<> 144:ef7eb2e8f9f7 1466
<> 144:ef7eb2e8f9f7 1467 /**
<> 144:ef7eb2e8f9f7 1468 * @brief Return the UART handle state.
<> 144:ef7eb2e8f9f7 1469 * @param huart Pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1470 * the configuration information for the specified UART.
<> 144:ef7eb2e8f9f7 1471 * @retval HAL state
<> 144:ef7eb2e8f9f7 1472 */
<> 144:ef7eb2e8f9f7 1473 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1474 {
<> 144:ef7eb2e8f9f7 1475 uint32_t temp1= 0x00, temp2 = 0x00;
<> 144:ef7eb2e8f9f7 1476 temp1 = huart->gState;
<> 144:ef7eb2e8f9f7 1477 temp2 = huart->RxState;
<> 144:ef7eb2e8f9f7 1478
<> 144:ef7eb2e8f9f7 1479 return (HAL_UART_StateTypeDef)(temp1 | temp2);
<> 144:ef7eb2e8f9f7 1480 }
<> 144:ef7eb2e8f9f7 1481
<> 144:ef7eb2e8f9f7 1482 /**
<> 144:ef7eb2e8f9f7 1483 * @brief Return the UART handle error code.
<> 144:ef7eb2e8f9f7 1484 * @param huart Pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1485 * the configuration information for the specified UART.
<> 144:ef7eb2e8f9f7 1486 * @retval UART Error Code
<> 144:ef7eb2e8f9f7 1487 */
<> 144:ef7eb2e8f9f7 1488 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1489 {
<> 144:ef7eb2e8f9f7 1490 return huart->ErrorCode;
<> 144:ef7eb2e8f9f7 1491 }
<> 144:ef7eb2e8f9f7 1492 /**
<> 144:ef7eb2e8f9f7 1493 * @}
<> 144:ef7eb2e8f9f7 1494 */
<> 144:ef7eb2e8f9f7 1495
<> 144:ef7eb2e8f9f7 1496 /**
<> 144:ef7eb2e8f9f7 1497 * @}
<> 144:ef7eb2e8f9f7 1498 */
<> 144:ef7eb2e8f9f7 1499
<> 144:ef7eb2e8f9f7 1500 /** @defgroup UART_Private_Functions UART Private Functions
<> 144:ef7eb2e8f9f7 1501 * @{
<> 144:ef7eb2e8f9f7 1502 */
<> 144:ef7eb2e8f9f7 1503
<> 144:ef7eb2e8f9f7 1504 /**
<> 144:ef7eb2e8f9f7 1505 * @brief Configure the UART peripheral.
<> 144:ef7eb2e8f9f7 1506 * @param huart: UART handle.
<> 144:ef7eb2e8f9f7 1507 * @retval HAL status
<> 144:ef7eb2e8f9f7 1508 */
<> 144:ef7eb2e8f9f7 1509 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1510 {
<> 144:ef7eb2e8f9f7 1511 uint32_t tmpreg = 0x00000000;
<> 144:ef7eb2e8f9f7 1512 UART_ClockSourceTypeDef clocksource = UART_CLOCKSOURCE_UNDEFINED;
<> 144:ef7eb2e8f9f7 1513 uint16_t brrtemp = 0x0000;
<> 144:ef7eb2e8f9f7 1514 uint16_t usartdiv = 0x0000;
<> 144:ef7eb2e8f9f7 1515 HAL_StatusTypeDef ret = HAL_OK;
<> 144:ef7eb2e8f9f7 1516
<> 144:ef7eb2e8f9f7 1517 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1518 assert_param(IS_UART_BAUDRATE(huart->Init.BaudRate));
<> 144:ef7eb2e8f9f7 1519 assert_param(IS_UART_WORD_LENGTH(huart->Init.WordLength));
<> 144:ef7eb2e8f9f7 1520 assert_param(IS_UART_STOPBITS(huart->Init.StopBits));
<> 144:ef7eb2e8f9f7 1521 assert_param(IS_UART_PARITY(huart->Init.Parity));
<> 144:ef7eb2e8f9f7 1522 assert_param(IS_UART_MODE(huart->Init.Mode));
<> 144:ef7eb2e8f9f7 1523 assert_param(IS_UART_HARDWARE_FLOW_CONTROL(huart->Init.HwFlowCtl));
<> 144:ef7eb2e8f9f7 1524 assert_param(IS_UART_ONE_BIT_SAMPLE(huart->Init.OneBitSampling));
<> 144:ef7eb2e8f9f7 1525 assert_param(IS_UART_OVERSAMPLING(huart->Init.OverSampling));
<> 144:ef7eb2e8f9f7 1526
<> 144:ef7eb2e8f9f7 1527
<> 144:ef7eb2e8f9f7 1528 /*-------------------------- USART CR1 Configuration -----------------------*/
<> 144:ef7eb2e8f9f7 1529 /* Clear M, PCE, PS, TE, RE and OVER8 bits and configure
<> 144:ef7eb2e8f9f7 1530 * the UART Word Length, Parity, Mode and oversampling:
<> 144:ef7eb2e8f9f7 1531 * set the M bits according to huart->Init.WordLength value
<> 144:ef7eb2e8f9f7 1532 * set PCE and PS bits according to huart->Init.Parity value
<> 144:ef7eb2e8f9f7 1533 * set TE and RE bits according to huart->Init.Mode value
<> 144:ef7eb2e8f9f7 1534 * set OVER8 bit according to huart->Init.OverSampling value */
<> 144:ef7eb2e8f9f7 1535 tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ;
<> 144:ef7eb2e8f9f7 1536 MODIFY_REG(huart->Instance->CR1, UART_CR1_FIELDS, tmpreg);
<> 144:ef7eb2e8f9f7 1537
<> 144:ef7eb2e8f9f7 1538 /*-------------------------- USART CR2 Configuration -----------------------*/
<> 144:ef7eb2e8f9f7 1539 /* Configure the UART Stop Bits: Set STOP[13:12] bits according
<> 144:ef7eb2e8f9f7 1540 * to huart->Init.StopBits value */
<> 144:ef7eb2e8f9f7 1541 MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits);
<> 144:ef7eb2e8f9f7 1542
<> 144:ef7eb2e8f9f7 1543 /*-------------------------- USART CR3 Configuration -----------------------*/
<> 144:ef7eb2e8f9f7 1544 /* Configure
<> 144:ef7eb2e8f9f7 1545 * - UART HardWare Flow Control: set CTSE and RTSE bits according
<> 144:ef7eb2e8f9f7 1546 * to huart->Init.HwFlowCtl value
<> 144:ef7eb2e8f9f7 1547 * - one-bit sampling method versus three samples' majority rule according
<> 144:ef7eb2e8f9f7 1548 * to huart->Init.OneBitSampling */
<> 144:ef7eb2e8f9f7 1549 tmpreg = (uint32_t)huart->Init.HwFlowCtl | huart->Init.OneBitSampling ;
<> 144:ef7eb2e8f9f7 1550 MODIFY_REG(huart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE | USART_CR3_ONEBIT), tmpreg);
<> 144:ef7eb2e8f9f7 1551
<> 144:ef7eb2e8f9f7 1552 /*-------------------------- USART BRR Configuration -----------------------*/
<> 144:ef7eb2e8f9f7 1553 UART_GETCLOCKSOURCE(huart, clocksource);
<> 144:ef7eb2e8f9f7 1554
<> 144:ef7eb2e8f9f7 1555 /* Check UART Over Sampling to set Baud Rate Register */
<> 144:ef7eb2e8f9f7 1556 if (huart->Init.OverSampling == UART_OVERSAMPLING_8)
<> 144:ef7eb2e8f9f7 1557 {
<> 144:ef7eb2e8f9f7 1558 switch (clocksource)
<> 144:ef7eb2e8f9f7 1559 {
<> 144:ef7eb2e8f9f7 1560 case UART_CLOCKSOURCE_PCLK1:
<> 144:ef7eb2e8f9f7 1561 usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate));
<> 144:ef7eb2e8f9f7 1562 break;
<> 144:ef7eb2e8f9f7 1563 case UART_CLOCKSOURCE_HSI:
<> 144:ef7eb2e8f9f7 1564 usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HSI_VALUE, huart->Init.BaudRate));
<> 144:ef7eb2e8f9f7 1565 break;
<> 144:ef7eb2e8f9f7 1566 case UART_CLOCKSOURCE_SYSCLK:
<> 144:ef7eb2e8f9f7 1567 usartdiv = (uint16_t)(UART_DIV_SAMPLING8(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate));
<> 144:ef7eb2e8f9f7 1568 break;
<> 144:ef7eb2e8f9f7 1569 case UART_CLOCKSOURCE_LSE:
<> 144:ef7eb2e8f9f7 1570 usartdiv = (uint16_t)(UART_DIV_SAMPLING8(LSE_VALUE, huart->Init.BaudRate));
<> 144:ef7eb2e8f9f7 1571 break;
<> 144:ef7eb2e8f9f7 1572 case UART_CLOCKSOURCE_UNDEFINED:
<> 144:ef7eb2e8f9f7 1573 default:
<> 144:ef7eb2e8f9f7 1574 ret = HAL_ERROR;
<> 144:ef7eb2e8f9f7 1575 break;
<> 144:ef7eb2e8f9f7 1576 }
<> 144:ef7eb2e8f9f7 1577
<> 144:ef7eb2e8f9f7 1578 brrtemp = usartdiv & 0xFFF0;
<> 144:ef7eb2e8f9f7 1579 brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000F) >> 1U);
<> 144:ef7eb2e8f9f7 1580 huart->Instance->BRR = brrtemp;
<> 144:ef7eb2e8f9f7 1581 }
<> 144:ef7eb2e8f9f7 1582 else
<> 144:ef7eb2e8f9f7 1583 {
<> 144:ef7eb2e8f9f7 1584 switch (clocksource)
<> 144:ef7eb2e8f9f7 1585 {
<> 144:ef7eb2e8f9f7 1586 case UART_CLOCKSOURCE_PCLK1:
<> 144:ef7eb2e8f9f7 1587 huart->Instance->BRR = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetPCLK1Freq(), huart->Init.BaudRate));
<> 144:ef7eb2e8f9f7 1588 break;
<> 144:ef7eb2e8f9f7 1589 case UART_CLOCKSOURCE_HSI:
<> 144:ef7eb2e8f9f7 1590 huart->Instance->BRR = (uint16_t)(UART_DIV_SAMPLING16(HSI_VALUE, huart->Init.BaudRate));
<> 144:ef7eb2e8f9f7 1591 break;
<> 144:ef7eb2e8f9f7 1592 case UART_CLOCKSOURCE_SYSCLK:
<> 144:ef7eb2e8f9f7 1593 huart->Instance->BRR = (uint16_t)(UART_DIV_SAMPLING16(HAL_RCC_GetSysClockFreq(), huart->Init.BaudRate));
<> 144:ef7eb2e8f9f7 1594 break;
<> 144:ef7eb2e8f9f7 1595 case UART_CLOCKSOURCE_LSE:
<> 144:ef7eb2e8f9f7 1596 huart->Instance->BRR = (uint16_t)(UART_DIV_SAMPLING16(LSE_VALUE, huart->Init.BaudRate));
<> 144:ef7eb2e8f9f7 1597 break;
<> 144:ef7eb2e8f9f7 1598 case UART_CLOCKSOURCE_UNDEFINED:
<> 144:ef7eb2e8f9f7 1599 default:
<> 144:ef7eb2e8f9f7 1600 ret = HAL_ERROR;
<> 144:ef7eb2e8f9f7 1601 break;
<> 144:ef7eb2e8f9f7 1602 }
<> 144:ef7eb2e8f9f7 1603 }
<> 144:ef7eb2e8f9f7 1604
<> 144:ef7eb2e8f9f7 1605 return ret;
<> 144:ef7eb2e8f9f7 1606
<> 144:ef7eb2e8f9f7 1607 }
<> 144:ef7eb2e8f9f7 1608
<> 144:ef7eb2e8f9f7 1609 /**
<> 144:ef7eb2e8f9f7 1610 * @brief Configure the UART peripheral advanced features.
<> 144:ef7eb2e8f9f7 1611 * @param huart: UART handle.
<> 144:ef7eb2e8f9f7 1612 * @retval None
<> 144:ef7eb2e8f9f7 1613 */
<> 144:ef7eb2e8f9f7 1614 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1615 {
<> 144:ef7eb2e8f9f7 1616 /* Check whether the set of advanced features to configure is properly set */
<> 144:ef7eb2e8f9f7 1617 assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit));
<> 144:ef7eb2e8f9f7 1618
<> 144:ef7eb2e8f9f7 1619 /* if required, configure TX pin active level inversion */
<> 144:ef7eb2e8f9f7 1620 if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT))
<> 144:ef7eb2e8f9f7 1621 {
<> 144:ef7eb2e8f9f7 1622 assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert));
<> 144:ef7eb2e8f9f7 1623 MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert);
<> 144:ef7eb2e8f9f7 1624 }
<> 144:ef7eb2e8f9f7 1625
<> 144:ef7eb2e8f9f7 1626 /* if required, configure RX pin active level inversion */
<> 144:ef7eb2e8f9f7 1627 if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT))
<> 144:ef7eb2e8f9f7 1628 {
<> 144:ef7eb2e8f9f7 1629 assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert));
<> 144:ef7eb2e8f9f7 1630 MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert);
<> 144:ef7eb2e8f9f7 1631 }
<> 144:ef7eb2e8f9f7 1632
<> 144:ef7eb2e8f9f7 1633 /* if required, configure data inversion */
<> 144:ef7eb2e8f9f7 1634 if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT))
<> 144:ef7eb2e8f9f7 1635 {
<> 144:ef7eb2e8f9f7 1636 assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert));
<> 144:ef7eb2e8f9f7 1637 MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert);
<> 144:ef7eb2e8f9f7 1638 }
<> 144:ef7eb2e8f9f7 1639
<> 144:ef7eb2e8f9f7 1640 /* if required, configure RX/TX pins swap */
<> 144:ef7eb2e8f9f7 1641 if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT))
<> 144:ef7eb2e8f9f7 1642 {
<> 144:ef7eb2e8f9f7 1643 assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap));
<> 144:ef7eb2e8f9f7 1644 MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap);
<> 144:ef7eb2e8f9f7 1645 }
<> 144:ef7eb2e8f9f7 1646
<> 144:ef7eb2e8f9f7 1647 /* if required, configure RX overrun detection disabling */
<> 144:ef7eb2e8f9f7 1648 if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT))
<> 144:ef7eb2e8f9f7 1649 {
<> 144:ef7eb2e8f9f7 1650 assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable));
<> 144:ef7eb2e8f9f7 1651 MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable);
<> 144:ef7eb2e8f9f7 1652 }
<> 144:ef7eb2e8f9f7 1653
<> 144:ef7eb2e8f9f7 1654 /* if required, configure DMA disabling on reception error */
<> 144:ef7eb2e8f9f7 1655 if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT))
<> 144:ef7eb2e8f9f7 1656 {
<> 144:ef7eb2e8f9f7 1657 assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError));
<> 144:ef7eb2e8f9f7 1658 MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError);
<> 144:ef7eb2e8f9f7 1659 }
<> 144:ef7eb2e8f9f7 1660
<> 144:ef7eb2e8f9f7 1661 /* if required, configure auto Baud rate detection scheme */
<> 144:ef7eb2e8f9f7 1662 if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT))
<> 144:ef7eb2e8f9f7 1663 {
<> 144:ef7eb2e8f9f7 1664 assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance));
<> 144:ef7eb2e8f9f7 1665 assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable));
<> 144:ef7eb2e8f9f7 1666 MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable);
<> 144:ef7eb2e8f9f7 1667 /* set auto Baudrate detection parameters if detection is enabled */
<> 144:ef7eb2e8f9f7 1668 if(huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE)
<> 144:ef7eb2e8f9f7 1669 {
<> 144:ef7eb2e8f9f7 1670 assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode));
<> 144:ef7eb2e8f9f7 1671 MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode);
<> 144:ef7eb2e8f9f7 1672 }
<> 144:ef7eb2e8f9f7 1673 }
<> 144:ef7eb2e8f9f7 1674
<> 144:ef7eb2e8f9f7 1675 /* if required, configure MSB first on communication line */
<> 144:ef7eb2e8f9f7 1676 if(HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT))
<> 144:ef7eb2e8f9f7 1677 {
<> 144:ef7eb2e8f9f7 1678 assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst));
<> 144:ef7eb2e8f9f7 1679 MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst);
<> 144:ef7eb2e8f9f7 1680 }
<> 144:ef7eb2e8f9f7 1681 }
<> 144:ef7eb2e8f9f7 1682
<> 144:ef7eb2e8f9f7 1683 /**
<> 144:ef7eb2e8f9f7 1684 * @brief Check the UART Idle State.
<> 144:ef7eb2e8f9f7 1685 * @param huart: UART handle.
<> 144:ef7eb2e8f9f7 1686 * @retval HAL status
<> 144:ef7eb2e8f9f7 1687 */
<> 144:ef7eb2e8f9f7 1688 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1689 {
<> 144:ef7eb2e8f9f7 1690 /* Initialize the UART ErrorCode */
<> 144:ef7eb2e8f9f7 1691 huart->ErrorCode = HAL_UART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 1692
<> 144:ef7eb2e8f9f7 1693 /* TEACK and REACK bits in ISR are checked only when available (not available on all F0 devices).
<> 144:ef7eb2e8f9f7 1694 Bits are defined for some specific devices, and are available only for UART instances supporting WakeUp from Stop Mode feature.
<> 144:ef7eb2e8f9f7 1695 */
<> 144:ef7eb2e8f9f7 1696 #if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC)
<> 144:ef7eb2e8f9f7 1697 if (IS_UART_WAKEUP_FROMSTOP_INSTANCE(huart->Instance))
<> 144:ef7eb2e8f9f7 1698 {
<> 144:ef7eb2e8f9f7 1699 /* Check if the Transmitter is enabled */
<> 144:ef7eb2e8f9f7 1700 if((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE)
<> 144:ef7eb2e8f9f7 1701 {
<> 144:ef7eb2e8f9f7 1702 /* Wait until TEACK flag is set */
<> 144:ef7eb2e8f9f7 1703 if(UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, UART_TEACK_REACK_TIMEOUT) != HAL_OK)
<> 144:ef7eb2e8f9f7 1704 {
<> 144:ef7eb2e8f9f7 1705 /* Timeout occurred */
<> 144:ef7eb2e8f9f7 1706 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1707 }
<> 144:ef7eb2e8f9f7 1708 }
<> 144:ef7eb2e8f9f7 1709
<> 144:ef7eb2e8f9f7 1710 /* Check if the Receiver is enabled */
<> 144:ef7eb2e8f9f7 1711 if((huart->Instance->CR1 & USART_CR1_RE) == USART_CR1_RE)
<> 144:ef7eb2e8f9f7 1712 {
<> 144:ef7eb2e8f9f7 1713 /* Wait until REACK flag is set */
<> 144:ef7eb2e8f9f7 1714 if(UART_WaitOnFlagUntilTimeout(huart, USART_ISR_REACK, RESET, UART_TEACK_REACK_TIMEOUT) != HAL_OK)
<> 144:ef7eb2e8f9f7 1715 {
<> 144:ef7eb2e8f9f7 1716 /* Timeout occurred */
<> 144:ef7eb2e8f9f7 1717 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1718 }
<> 144:ef7eb2e8f9f7 1719 }
<> 144:ef7eb2e8f9f7 1720 }
<> 144:ef7eb2e8f9f7 1721 #endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC) */
<> 144:ef7eb2e8f9f7 1722
<> 144:ef7eb2e8f9f7 1723 /* Initialize the UART State */
<> 144:ef7eb2e8f9f7 1724 huart->gState= HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1725 huart->RxState= HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1726
<> 144:ef7eb2e8f9f7 1727 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1728 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 1729
<> 144:ef7eb2e8f9f7 1730 return HAL_OK;
<> 144:ef7eb2e8f9f7 1731 }
<> 144:ef7eb2e8f9f7 1732
<> 144:ef7eb2e8f9f7 1733
<> 144:ef7eb2e8f9f7 1734 /**
<> 144:ef7eb2e8f9f7 1735 * @brief Handle UART Communication Timeout.
<> 144:ef7eb2e8f9f7 1736 * @param huart: UART handle.
<> 144:ef7eb2e8f9f7 1737 * @param Flag: specifies the UART flag to check.
<> 144:ef7eb2e8f9f7 1738 * @param Status: the Flag status (SET or RESET).
<> 144:ef7eb2e8f9f7 1739 * @param Timeout: Timeout duration.
<> 144:ef7eb2e8f9f7 1740 * @retval HAL status
<> 144:ef7eb2e8f9f7 1741 */
<> 144:ef7eb2e8f9f7 1742 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 1743 {
<> 144:ef7eb2e8f9f7 1744 uint32_t tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 1745
<> 144:ef7eb2e8f9f7 1746 /* Wait until flag is set */
<> 144:ef7eb2e8f9f7 1747 if(Status == RESET)
<> 144:ef7eb2e8f9f7 1748 {
<> 144:ef7eb2e8f9f7 1749 while(__HAL_UART_GET_FLAG(huart, Flag) == RESET)
<> 144:ef7eb2e8f9f7 1750 {
<> 144:ef7eb2e8f9f7 1751 /* Check for the Timeout */
<> 144:ef7eb2e8f9f7 1752 if(Timeout != HAL_MAX_DELAY)
<> 144:ef7eb2e8f9f7 1753 {
<> 144:ef7eb2e8f9f7 1754 if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
<> 144:ef7eb2e8f9f7 1755 {
<> 144:ef7eb2e8f9f7 1756 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
<> 144:ef7eb2e8f9f7 1757 __HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
<> 144:ef7eb2e8f9f7 1758 __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
<> 144:ef7eb2e8f9f7 1759 __HAL_UART_DISABLE_IT(huart, UART_IT_PE);
<> 144:ef7eb2e8f9f7 1760 __HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
<> 144:ef7eb2e8f9f7 1761
<> 144:ef7eb2e8f9f7 1762 huart->gState = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1763 huart->RxState = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1764
<> 144:ef7eb2e8f9f7 1765 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1766 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 1767
<> 144:ef7eb2e8f9f7 1768 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1769 }
<> 144:ef7eb2e8f9f7 1770 }
<> 144:ef7eb2e8f9f7 1771 }
<> 144:ef7eb2e8f9f7 1772 }
<> 144:ef7eb2e8f9f7 1773 else
<> 144:ef7eb2e8f9f7 1774 {
<> 144:ef7eb2e8f9f7 1775 while(__HAL_UART_GET_FLAG(huart, Flag) != RESET)
<> 144:ef7eb2e8f9f7 1776 {
<> 144:ef7eb2e8f9f7 1777 /* Check for the Timeout */
<> 144:ef7eb2e8f9f7 1778 if(Timeout != HAL_MAX_DELAY)
<> 144:ef7eb2e8f9f7 1779 {
<> 144:ef7eb2e8f9f7 1780 if((Timeout == 0) || ((HAL_GetTick()-tickstart) > Timeout))
<> 144:ef7eb2e8f9f7 1781 {
<> 144:ef7eb2e8f9f7 1782 /* Disable TXE, RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts for the interrupt process */
<> 144:ef7eb2e8f9f7 1783 __HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
<> 144:ef7eb2e8f9f7 1784 __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
<> 144:ef7eb2e8f9f7 1785 __HAL_UART_DISABLE_IT(huart, UART_IT_PE);
<> 144:ef7eb2e8f9f7 1786 __HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
<> 144:ef7eb2e8f9f7 1787
<> 144:ef7eb2e8f9f7 1788 huart->gState = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1789 huart->RxState = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1790
<> 144:ef7eb2e8f9f7 1791 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1792 __HAL_UNLOCK(huart);
<> 144:ef7eb2e8f9f7 1793
<> 144:ef7eb2e8f9f7 1794 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1795 }
<> 144:ef7eb2e8f9f7 1796 }
<> 144:ef7eb2e8f9f7 1797 }
<> 144:ef7eb2e8f9f7 1798 }
<> 144:ef7eb2e8f9f7 1799 return HAL_OK;
<> 144:ef7eb2e8f9f7 1800 }
<> 144:ef7eb2e8f9f7 1801
<> 144:ef7eb2e8f9f7 1802 /**
<> 144:ef7eb2e8f9f7 1803 * @brief DMA UART transmit process complete callback.
<> 144:ef7eb2e8f9f7 1804 * @param hdma: DMA handle.
<> 144:ef7eb2e8f9f7 1805 * @retval None
<> 144:ef7eb2e8f9f7 1806 */
<> 144:ef7eb2e8f9f7 1807 static void UART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
<> 144:ef7eb2e8f9f7 1808 {
<> 144:ef7eb2e8f9f7 1809 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
<> 144:ef7eb2e8f9f7 1810
<> 144:ef7eb2e8f9f7 1811 /* DMA Normal mode */
<> 144:ef7eb2e8f9f7 1812 if ( HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC) )
<> 144:ef7eb2e8f9f7 1813 {
<> 144:ef7eb2e8f9f7 1814 huart->TxXferCount = 0;
<> 144:ef7eb2e8f9f7 1815
<> 144:ef7eb2e8f9f7 1816 /* Disable the DMA transfer for transmit request by resetting the DMAT bit
<> 144:ef7eb2e8f9f7 1817 in the UART CR3 register */
<> 144:ef7eb2e8f9f7 1818 huart->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 1819
<> 144:ef7eb2e8f9f7 1820 /* Enable the UART Transmit Complete Interrupt */
<> 144:ef7eb2e8f9f7 1821 __HAL_UART_ENABLE_IT(huart, UART_IT_TC);
<> 144:ef7eb2e8f9f7 1822 }
<> 144:ef7eb2e8f9f7 1823 /* DMA Circular mode */
<> 144:ef7eb2e8f9f7 1824 else
<> 144:ef7eb2e8f9f7 1825 {
<> 144:ef7eb2e8f9f7 1826 HAL_UART_TxCpltCallback(huart);
<> 144:ef7eb2e8f9f7 1827 }
<> 144:ef7eb2e8f9f7 1828
<> 144:ef7eb2e8f9f7 1829 }
<> 144:ef7eb2e8f9f7 1830
<> 144:ef7eb2e8f9f7 1831 /**
<> 144:ef7eb2e8f9f7 1832 * @brief DMA UART transmit process half complete callback.
<> 144:ef7eb2e8f9f7 1833 * @param hdma : DMA handle.
<> 144:ef7eb2e8f9f7 1834 * @retval None
<> 144:ef7eb2e8f9f7 1835 */
<> 144:ef7eb2e8f9f7 1836 static void UART_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
<> 144:ef7eb2e8f9f7 1837 {
<> 144:ef7eb2e8f9f7 1838 UART_HandleTypeDef* huart = (UART_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
<> 144:ef7eb2e8f9f7 1839
<> 144:ef7eb2e8f9f7 1840 HAL_UART_TxHalfCpltCallback(huart);
<> 144:ef7eb2e8f9f7 1841 }
<> 144:ef7eb2e8f9f7 1842
<> 144:ef7eb2e8f9f7 1843 /**
<> 144:ef7eb2e8f9f7 1844 * @brief DMA UART receive process complete callback.
<> 144:ef7eb2e8f9f7 1845 * @param hdma: DMA handle.
<> 144:ef7eb2e8f9f7 1846 * @retval None
<> 144:ef7eb2e8f9f7 1847 */
<> 144:ef7eb2e8f9f7 1848 static void UART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
<> 144:ef7eb2e8f9f7 1849 {
<> 144:ef7eb2e8f9f7 1850 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
<> 144:ef7eb2e8f9f7 1851
<> 144:ef7eb2e8f9f7 1852 /* DMA Normal mode */
<> 144:ef7eb2e8f9f7 1853 if ( HAL_IS_BIT_CLR(hdma->Instance->CCR, DMA_CCR_CIRC) )
<> 144:ef7eb2e8f9f7 1854 {
<> 144:ef7eb2e8f9f7 1855 huart->RxXferCount = 0;
<> 144:ef7eb2e8f9f7 1856
<> 144:ef7eb2e8f9f7 1857 /* Disable the DMA transfer for the receiver request by resetting the DMAR bit
<> 144:ef7eb2e8f9f7 1858 in the UART CR3 register */
<> 144:ef7eb2e8f9f7 1859 huart->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_DMAR);
<> 144:ef7eb2e8f9f7 1860
<> 144:ef7eb2e8f9f7 1861 /* At end of Rx process, restore huart->RxState to Ready */
<> 144:ef7eb2e8f9f7 1862 huart->RxState = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1863 }
<> 144:ef7eb2e8f9f7 1864
<> 144:ef7eb2e8f9f7 1865 HAL_UART_RxCpltCallback(huart);
<> 144:ef7eb2e8f9f7 1866 }
<> 144:ef7eb2e8f9f7 1867
<> 144:ef7eb2e8f9f7 1868 /**
<> 144:ef7eb2e8f9f7 1869 * @brief DMA UART receive process half complete callback.
<> 144:ef7eb2e8f9f7 1870 * @param hdma : DMA handle.
<> 144:ef7eb2e8f9f7 1871 * @retval None
<> 144:ef7eb2e8f9f7 1872 */
<> 144:ef7eb2e8f9f7 1873 static void UART_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
<> 144:ef7eb2e8f9f7 1874 {
<> 144:ef7eb2e8f9f7 1875 UART_HandleTypeDef* huart = (UART_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
<> 144:ef7eb2e8f9f7 1876
<> 144:ef7eb2e8f9f7 1877 HAL_UART_RxHalfCpltCallback(huart);
<> 144:ef7eb2e8f9f7 1878 }
<> 144:ef7eb2e8f9f7 1879
<> 144:ef7eb2e8f9f7 1880 /**
<> 144:ef7eb2e8f9f7 1881 * @brief DMA UART communication error callback.
<> 144:ef7eb2e8f9f7 1882 * @param hdma: DMA handle.
<> 144:ef7eb2e8f9f7 1883 * @retval None
<> 144:ef7eb2e8f9f7 1884 */
<> 144:ef7eb2e8f9f7 1885 static void UART_DMAError(DMA_HandleTypeDef *hdma)
<> 144:ef7eb2e8f9f7 1886 {
<> 144:ef7eb2e8f9f7 1887 UART_HandleTypeDef* huart = ( UART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
<> 144:ef7eb2e8f9f7 1888 huart->RxXferCount = 0;
<> 144:ef7eb2e8f9f7 1889 huart->TxXferCount = 0;
<> 144:ef7eb2e8f9f7 1890 huart->gState= HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1891 huart->RxState= HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1892 huart->ErrorCode |= HAL_UART_ERROR_DMA;
<> 144:ef7eb2e8f9f7 1893 HAL_UART_ErrorCallback(huart);
<> 144:ef7eb2e8f9f7 1894 }
<> 144:ef7eb2e8f9f7 1895
<> 144:ef7eb2e8f9f7 1896 /**
<> 144:ef7eb2e8f9f7 1897 * @brief Send an amount of data in interrupt mode.
<> 144:ef7eb2e8f9f7 1898 * @note Function is called under interruption only, once
<> 144:ef7eb2e8f9f7 1899 * interruptions have been enabled by HAL_UART_Transmit_IT().
<> 144:ef7eb2e8f9f7 1900 * @param huart: UART handle.
<> 144:ef7eb2e8f9f7 1901 * @retval HAL status
<> 144:ef7eb2e8f9f7 1902 */
<> 144:ef7eb2e8f9f7 1903 HAL_StatusTypeDef UART_Transmit_IT(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1904 {
<> 144:ef7eb2e8f9f7 1905 uint16_t* tmp;
<> 144:ef7eb2e8f9f7 1906
<> 144:ef7eb2e8f9f7 1907 /* Check that a Tx process is ongoing */
<> 144:ef7eb2e8f9f7 1908 if (huart->gState == HAL_UART_STATE_BUSY_TX)
<> 144:ef7eb2e8f9f7 1909 {
<> 144:ef7eb2e8f9f7 1910 if(huart->TxXferCount == 0)
<> 144:ef7eb2e8f9f7 1911 {
<> 144:ef7eb2e8f9f7 1912 /* Disable the UART Transmit Data Register Empty Interrupt */
<> 144:ef7eb2e8f9f7 1913 __HAL_UART_DISABLE_IT(huart, UART_IT_TXE);
<> 144:ef7eb2e8f9f7 1914
<> 144:ef7eb2e8f9f7 1915 /* Enable the UART Transmit Complete Interrupt */
<> 144:ef7eb2e8f9f7 1916 __HAL_UART_ENABLE_IT(huart, UART_IT_TC);
<> 144:ef7eb2e8f9f7 1917
<> 144:ef7eb2e8f9f7 1918 return HAL_OK;
<> 144:ef7eb2e8f9f7 1919 }
<> 144:ef7eb2e8f9f7 1920 else
<> 144:ef7eb2e8f9f7 1921 {
<> 144:ef7eb2e8f9f7 1922 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
<> 144:ef7eb2e8f9f7 1923 {
<> 144:ef7eb2e8f9f7 1924 tmp = (uint16_t*) huart->pTxBuffPtr;
<> 144:ef7eb2e8f9f7 1925 huart->Instance->TDR = (*tmp & (uint16_t)0x01FF);
<> 144:ef7eb2e8f9f7 1926 huart->pTxBuffPtr += 2;
<> 144:ef7eb2e8f9f7 1927 }
<> 144:ef7eb2e8f9f7 1928 else
<> 144:ef7eb2e8f9f7 1929 {
<> 144:ef7eb2e8f9f7 1930 huart->Instance->TDR = (uint8_t)(*huart->pTxBuffPtr++ & (uint8_t)0xFF);
<> 144:ef7eb2e8f9f7 1931 }
<> 144:ef7eb2e8f9f7 1932
<> 144:ef7eb2e8f9f7 1933 huart->TxXferCount--;
<> 144:ef7eb2e8f9f7 1934
<> 144:ef7eb2e8f9f7 1935 return HAL_OK;
<> 144:ef7eb2e8f9f7 1936 }
<> 144:ef7eb2e8f9f7 1937 }
<> 144:ef7eb2e8f9f7 1938 else
<> 144:ef7eb2e8f9f7 1939 {
<> 144:ef7eb2e8f9f7 1940 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 1941 }
<> 144:ef7eb2e8f9f7 1942 }
<> 144:ef7eb2e8f9f7 1943
<> 144:ef7eb2e8f9f7 1944
<> 144:ef7eb2e8f9f7 1945 /**
<> 144:ef7eb2e8f9f7 1946 * @brief Wrap up transmission in non-blocking mode.
<> 144:ef7eb2e8f9f7 1947 * @param huart: pointer to a UART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1948 * the configuration information for the specified UART module.
<> 144:ef7eb2e8f9f7 1949 * @retval HAL status
<> 144:ef7eb2e8f9f7 1950 */
<> 144:ef7eb2e8f9f7 1951 HAL_StatusTypeDef UART_EndTransmit_IT(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1952 {
<> 144:ef7eb2e8f9f7 1953 /* Disable the UART Transmit Complete Interrupt */
<> 144:ef7eb2e8f9f7 1954 __HAL_UART_DISABLE_IT(huart, UART_IT_TC);
<> 144:ef7eb2e8f9f7 1955
<> 144:ef7eb2e8f9f7 1956 /* Tx process is ended, restore huart->gState to Ready */
<> 144:ef7eb2e8f9f7 1957 huart->gState = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 1958
<> 144:ef7eb2e8f9f7 1959 HAL_UART_TxCpltCallback(huart);
<> 144:ef7eb2e8f9f7 1960
<> 144:ef7eb2e8f9f7 1961 return HAL_OK;
<> 144:ef7eb2e8f9f7 1962 }
<> 144:ef7eb2e8f9f7 1963
<> 144:ef7eb2e8f9f7 1964
<> 144:ef7eb2e8f9f7 1965 /**
<> 144:ef7eb2e8f9f7 1966 * @brief Receive an amount of data in interrupt mode.
<> 144:ef7eb2e8f9f7 1967 * @note Function is called under interruption only, once
<> 144:ef7eb2e8f9f7 1968 * interruptions have been enabled by HAL_UART_Receive_IT()
<> 144:ef7eb2e8f9f7 1969 * @param huart: UART handle.
<> 144:ef7eb2e8f9f7 1970 * @retval HAL status
<> 144:ef7eb2e8f9f7 1971 */
<> 144:ef7eb2e8f9f7 1972 HAL_StatusTypeDef UART_Receive_IT(UART_HandleTypeDef *huart)
<> 144:ef7eb2e8f9f7 1973 {
<> 144:ef7eb2e8f9f7 1974 uint16_t* tmp;
<> 144:ef7eb2e8f9f7 1975 uint16_t uhMask = huart->Mask;
<> 144:ef7eb2e8f9f7 1976
<> 144:ef7eb2e8f9f7 1977 /* Check that a Rx process is ongoing */
<> 144:ef7eb2e8f9f7 1978 if(huart->RxState == HAL_UART_STATE_BUSY_RX)
<> 144:ef7eb2e8f9f7 1979 {
<> 144:ef7eb2e8f9f7 1980 if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE))
<> 144:ef7eb2e8f9f7 1981 {
<> 144:ef7eb2e8f9f7 1982 tmp = (uint16_t*) huart->pRxBuffPtr ;
<> 144:ef7eb2e8f9f7 1983 *tmp = (uint16_t)(huart->Instance->RDR & uhMask);
<> 144:ef7eb2e8f9f7 1984 huart->pRxBuffPtr +=2;
<> 144:ef7eb2e8f9f7 1985 }
<> 144:ef7eb2e8f9f7 1986 else
<> 144:ef7eb2e8f9f7 1987 {
<> 144:ef7eb2e8f9f7 1988 *huart->pRxBuffPtr++ = (uint8_t)(huart->Instance->RDR & (uint8_t)uhMask);
<> 144:ef7eb2e8f9f7 1989 }
<> 144:ef7eb2e8f9f7 1990
<> 144:ef7eb2e8f9f7 1991 if(--huart->RxXferCount == 0)
<> 144:ef7eb2e8f9f7 1992 {
<> 144:ef7eb2e8f9f7 1993 __HAL_UART_DISABLE_IT(huart, UART_IT_RXNE);
<> 144:ef7eb2e8f9f7 1994
<> 144:ef7eb2e8f9f7 1995 /* Disable the UART Parity Error Interrupt */
<> 144:ef7eb2e8f9f7 1996 __HAL_UART_DISABLE_IT(huart, UART_IT_PE);
<> 144:ef7eb2e8f9f7 1997
<> 144:ef7eb2e8f9f7 1998 /* Disable the UART Error Interrupt: (Frame error, noise error, overrun error) */
<> 144:ef7eb2e8f9f7 1999 __HAL_UART_DISABLE_IT(huart, UART_IT_ERR);
<> 144:ef7eb2e8f9f7 2000
<> 144:ef7eb2e8f9f7 2001 /* Rx process is completed, restore huart->RxState to Ready */
<> 144:ef7eb2e8f9f7 2002 huart->RxState = HAL_UART_STATE_READY;
<> 144:ef7eb2e8f9f7 2003
<> 144:ef7eb2e8f9f7 2004 HAL_UART_RxCpltCallback(huart);
<> 144:ef7eb2e8f9f7 2005
<> 144:ef7eb2e8f9f7 2006 return HAL_OK;
<> 144:ef7eb2e8f9f7 2007 }
<> 144:ef7eb2e8f9f7 2008
<> 144:ef7eb2e8f9f7 2009 return HAL_OK;
<> 144:ef7eb2e8f9f7 2010 }
<> 144:ef7eb2e8f9f7 2011 else
<> 144:ef7eb2e8f9f7 2012 {
<> 144:ef7eb2e8f9f7 2013 /* Clear RXNE interrupt flag */
<> 144:ef7eb2e8f9f7 2014 __HAL_UART_SEND_REQ(huart, UART_RXDATA_FLUSH_REQUEST);
<> 144:ef7eb2e8f9f7 2015
<> 144:ef7eb2e8f9f7 2016 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 2017 }
<> 144:ef7eb2e8f9f7 2018 }
<> 144:ef7eb2e8f9f7 2019
<> 144:ef7eb2e8f9f7 2020 /**
<> 144:ef7eb2e8f9f7 2021 * @}
<> 144:ef7eb2e8f9f7 2022 */
<> 144:ef7eb2e8f9f7 2023
<> 144:ef7eb2e8f9f7 2024 #endif /* HAL_UART_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 2025 /**
<> 144:ef7eb2e8f9f7 2026 * @}
<> 144:ef7eb2e8f9f7 2027 */
<> 144:ef7eb2e8f9f7 2028
<> 144:ef7eb2e8f9f7 2029 /**
<> 144:ef7eb2e8f9f7 2030 * @}
<> 144:ef7eb2e8f9f7 2031 */
<> 144:ef7eb2e8f9f7 2032
<> 144:ef7eb2e8f9f7 2033 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/