mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_gpio_ex.h@167:e84263d55307, 2017-06-21 (annotated)

Committer:
AnnaBridge
Date:
Wed Jun 21 17:46:44 2017 +0100
Revision:
167:e84263d55307
Parent:
149:156823d33999
Child:
181:57724642e740
This updates the lib to the mbed lib v 145

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32l4xx_hal_gpio_ex.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
AnnaBridge 167:e84263d55307 5 * @version V1.7.1
AnnaBridge 167:e84263d55307 6 * @date 21-April-2017
<> 144:ef7eb2e8f9f7 7 * @brief Header file of GPIO HAL Extended module.
<> 144:ef7eb2e8f9f7 8 ******************************************************************************
<> 144:ef7eb2e8f9f7 9 * @attention
<> 144:ef7eb2e8f9f7 10 *
AnnaBridge 167:e84263d55307 11 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 14 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 18 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 19 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 21 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 22 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 34 *
<> 144:ef7eb2e8f9f7 35 ******************************************************************************
<> 144:ef7eb2e8f9f7 36 */
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 39 #ifndef __STM32L4xx_HAL_GPIO_EX_H
<> 144:ef7eb2e8f9f7 40 #define __STM32L4xx_HAL_GPIO_EX_H
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 43 extern "C" {
<> 144:ef7eb2e8f9f7 44 #endif
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 47 #include "stm32l4xx_hal_def.h"
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 /** @addtogroup STM32L4xx_HAL_Driver
<> 144:ef7eb2e8f9f7 50 * @{
<> 144:ef7eb2e8f9f7 51 */
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 /** @defgroup GPIOEx GPIOEx
<> 144:ef7eb2e8f9f7 54 * @brief GPIO Extended HAL module driver
<> 144:ef7eb2e8f9f7 55 * @{
<> 144:ef7eb2e8f9f7 56 */
<> 144:ef7eb2e8f9f7 57
<> 144:ef7eb2e8f9f7 58 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 59 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 60 /** @defgroup GPIOEx_Exported_Constants GPIOEx Exported Constants
<> 144:ef7eb2e8f9f7 61 * @{
<> 144:ef7eb2e8f9f7 62 */
<> 144:ef7eb2e8f9f7 63
<> 144:ef7eb2e8f9f7 64 /** @defgroup GPIOEx_Alternate_function_selection GPIOEx Alternate function selection
<> 144:ef7eb2e8f9f7 65 * @{
<> 144:ef7eb2e8f9f7 66 */
<> 144:ef7eb2e8f9f7 67
AnnaBridge 167:e84263d55307 68 #if defined(STM32L431xx) || defined(STM32L432xx) || defined(STM32L433xx) || defined(STM32L442xx) || defined(STM32L443xx)
AnnaBridge 167:e84263d55307 69 /*--------------STM32L431xx/STM32L432xx/STM32L433xx/STM32L442xx/STM32L443xx---*/
AnnaBridge 167:e84263d55307 70 /**
AnnaBridge 167:e84263d55307 71 * @brief AF 0 selection
AnnaBridge 167:e84263d55307 72 */
AnnaBridge 167:e84263d55307 73 #define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */
AnnaBridge 167:e84263d55307 74 #define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */
AnnaBridge 167:e84263d55307 75 #define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */
AnnaBridge 167:e84263d55307 76 #if defined(STM32L433xx) || defined(STM32L443xx)
AnnaBridge 167:e84263d55307 77 #define GPIO_AF0_LCDBIAS ((uint8_t)0x00) /* LCDBIAS Alternate Function mapping */
AnnaBridge 167:e84263d55307 78 #endif /* STM32L433xx || STM32L443xx */
AnnaBridge 167:e84263d55307 79 #define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */
AnnaBridge 167:e84263d55307 80
AnnaBridge 167:e84263d55307 81 /**
AnnaBridge 167:e84263d55307 82 * @brief AF 1 selection
AnnaBridge 167:e84263d55307 83 */
AnnaBridge 167:e84263d55307 84 #define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 85 #define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */
AnnaBridge 167:e84263d55307 86 #define GPIO_AF1_LPTIM1 ((uint8_t)0x01) /* LPTIM1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 87 #define GPIO_AF1_IR ((uint8_t)0x01) /* IR Alternate Function mapping */
AnnaBridge 167:e84263d55307 88
AnnaBridge 167:e84263d55307 89 /**
AnnaBridge 167:e84263d55307 90 * @brief AF 2 selection
AnnaBridge 167:e84263d55307 91 */
AnnaBridge 167:e84263d55307 92 #define GPIO_AF2_TIM1 ((uint8_t)0x02) /* TIM1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 93 #define GPIO_AF2_TIM2 ((uint8_t)0x02) /* TIM2 Alternate Function mapping */
AnnaBridge 167:e84263d55307 94
AnnaBridge 167:e84263d55307 95 /**
AnnaBridge 167:e84263d55307 96 * @brief AF 3 selection
AnnaBridge 167:e84263d55307 97 */
AnnaBridge 167:e84263d55307 98 #define GPIO_AF3_USART2 ((uint8_t)0x03) /* USART1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 99 #define GPIO_AF3_TIM1_COMP2 ((uint8_t)0x03) /* TIM1/COMP2 Break in Alternate Function mapping */
AnnaBridge 167:e84263d55307 100 #define GPIO_AF3_TIM1_COMP1 ((uint8_t)0x03) /* TIM1/COMP1 Break in Alternate Function mapping */
AnnaBridge 167:e84263d55307 101
AnnaBridge 167:e84263d55307 102 /**
AnnaBridge 167:e84263d55307 103 * @brief AF 4 selection
AnnaBridge 167:e84263d55307 104 */
AnnaBridge 167:e84263d55307 105 #define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 106 #define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */
AnnaBridge 167:e84263d55307 107 #define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */
AnnaBridge 167:e84263d55307 108
AnnaBridge 167:e84263d55307 109 /**
AnnaBridge 167:e84263d55307 110 * @brief AF 5 selection
AnnaBridge 167:e84263d55307 111 */
AnnaBridge 167:e84263d55307 112 #define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 113 #define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2 Alternate Function mapping */
AnnaBridge 167:e84263d55307 114
AnnaBridge 167:e84263d55307 115 /**
AnnaBridge 167:e84263d55307 116 * @brief AF 6 selection
AnnaBridge 167:e84263d55307 117 */
AnnaBridge 167:e84263d55307 118 #define GPIO_AF6_SPI3 ((uint8_t)0x06) /* SPI3 Alternate Function mapping */
AnnaBridge 167:e84263d55307 119 #define GPIO_AF6_COMP1 ((uint8_t)0x06) /* COMP1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 120
AnnaBridge 167:e84263d55307 121 /**
AnnaBridge 167:e84263d55307 122 * @brief AF 7 selection
AnnaBridge 167:e84263d55307 123 */
AnnaBridge 167:e84263d55307 124 #define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 125 #define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */
AnnaBridge 167:e84263d55307 126 #define GPIO_AF7_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */
AnnaBridge 167:e84263d55307 127
AnnaBridge 167:e84263d55307 128 /**
AnnaBridge 167:e84263d55307 129 * @brief AF 8 selection
AnnaBridge 167:e84263d55307 130 */
AnnaBridge 167:e84263d55307 131 #define GPIO_AF8_LPUART1 ((uint8_t)0x08) /* LPUART1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 132
AnnaBridge 167:e84263d55307 133 /**
AnnaBridge 167:e84263d55307 134 * @brief AF 9 selection
AnnaBridge 167:e84263d55307 135 */
AnnaBridge 167:e84263d55307 136 #define GPIO_AF9_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 137 #define GPIO_AF9_TSC ((uint8_t)0x09) /* TSC Alternate Function mapping */
AnnaBridge 167:e84263d55307 138
AnnaBridge 167:e84263d55307 139 /**
AnnaBridge 167:e84263d55307 140 * @brief AF 10 selection
AnnaBridge 167:e84263d55307 141 */
AnnaBridge 167:e84263d55307 142 #if defined(STM32L432xx) || defined(STM32L433xx) || defined(STM32L442xx) || defined(STM32L443xx)
AnnaBridge 167:e84263d55307 143 #define GPIO_AF10_USB_FS ((uint8_t)0x0A) /* USB_FS Alternate Function mapping */
AnnaBridge 167:e84263d55307 144 #endif /* STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx */
AnnaBridge 167:e84263d55307 145 #define GPIO_AF10_QUADSPI ((uint8_t)0x0A) /* QUADSPI Alternate Function mapping */
AnnaBridge 167:e84263d55307 146
AnnaBridge 167:e84263d55307 147 #if defined(STM32L433xx) || defined(STM32L443xx)
AnnaBridge 167:e84263d55307 148 /**
AnnaBridge 167:e84263d55307 149 * @brief AF 11 selection
AnnaBridge 167:e84263d55307 150 */
AnnaBridge 167:e84263d55307 151 #define GPIO_AF11_LCD ((uint8_t)0x0B) /* LCD Alternate Function mapping */
AnnaBridge 167:e84263d55307 152 #endif /* STM32L433xx || STM32L443xx */
AnnaBridge 167:e84263d55307 153
AnnaBridge 167:e84263d55307 154 /**
AnnaBridge 167:e84263d55307 155 * @brief AF 12 selection
AnnaBridge 167:e84263d55307 156 */
AnnaBridge 167:e84263d55307 157 #define GPIO_AF12_SWPMI1 ((uint8_t)0x0C) /* SWPMI1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 158 #define GPIO_AF12_COMP1 ((uint8_t)0x0C) /* COMP1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 159 #define GPIO_AF12_COMP2 ((uint8_t)0x0C) /* COMP2 Alternate Function mapping */
AnnaBridge 167:e84263d55307 160 #define GPIO_AF12_SDMMC1 ((uint8_t)0x0C) /* SDMMC1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 161
AnnaBridge 167:e84263d55307 162 /**
AnnaBridge 167:e84263d55307 163 * @brief AF 13 selection
AnnaBridge 167:e84263d55307 164 */
AnnaBridge 167:e84263d55307 165 #define GPIO_AF13_SAI1 ((uint8_t)0x0D) /* SAI1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 166
AnnaBridge 167:e84263d55307 167 /**
AnnaBridge 167:e84263d55307 168 * @brief AF 14 selection
AnnaBridge 167:e84263d55307 169 */
AnnaBridge 167:e84263d55307 170 #define GPIO_AF14_TIM2 ((uint8_t)0x0E) /* TIM2 Alternate Function mapping */
AnnaBridge 167:e84263d55307 171 #define GPIO_AF14_TIM15 ((uint8_t)0x0E) /* TIM15 Alternate Function mapping */
AnnaBridge 167:e84263d55307 172 #define GPIO_AF14_TIM16 ((uint8_t)0x0E) /* TIM16 Alternate Function mapping */
AnnaBridge 167:e84263d55307 173 #define GPIO_AF14_LPTIM2 ((uint8_t)0x0E) /* LPTIM2 Alternate Function mapping */
AnnaBridge 167:e84263d55307 174
AnnaBridge 167:e84263d55307 175 /**
AnnaBridge 167:e84263d55307 176 * @brief AF 15 selection
AnnaBridge 167:e84263d55307 177 */
AnnaBridge 167:e84263d55307 178 #define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */
AnnaBridge 167:e84263d55307 179
AnnaBridge 167:e84263d55307 180 #define IS_GPIO_AF(AF) ((AF) <= (uint8_t)0x0F)
AnnaBridge 167:e84263d55307 181
AnnaBridge 167:e84263d55307 182 #endif /* STM32L431xx || STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx */
AnnaBridge 167:e84263d55307 183
AnnaBridge 167:e84263d55307 184 #if defined(STM32L451xx) || defined(STM32L452xx) || defined(STM32L462xx)
AnnaBridge 167:e84263d55307 185 /*--------------STM32L451xx/STM32L452xx/STM32L462xx---------------------------*/
AnnaBridge 167:e84263d55307 186 /**
AnnaBridge 167:e84263d55307 187 * @brief AF 0 selection
AnnaBridge 167:e84263d55307 188 */
AnnaBridge 167:e84263d55307 189 #define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */
AnnaBridge 167:e84263d55307 190 #define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */
AnnaBridge 167:e84263d55307 191 #define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */
AnnaBridge 167:e84263d55307 192 #define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */
AnnaBridge 167:e84263d55307 193
AnnaBridge 167:e84263d55307 194 /**
AnnaBridge 167:e84263d55307 195 * @brief AF 1 selection
AnnaBridge 167:e84263d55307 196 */
AnnaBridge 167:e84263d55307 197 #define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 198 #define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */
AnnaBridge 167:e84263d55307 199 #define GPIO_AF1_LPTIM1 ((uint8_t)0x01) /* LPTIM1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 200 #define GPIO_AF1_IR ((uint8_t)0x01) /* IR Alternate Function mapping */
AnnaBridge 167:e84263d55307 201
AnnaBridge 167:e84263d55307 202 /**
AnnaBridge 167:e84263d55307 203 * @brief AF 2 selection
AnnaBridge 167:e84263d55307 204 */
AnnaBridge 167:e84263d55307 205 #define GPIO_AF2_TIM1 ((uint8_t)0x02) /* TIM1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 206 #define GPIO_AF2_TIM2 ((uint8_t)0x02) /* TIM2 Alternate Function mapping */
AnnaBridge 167:e84263d55307 207 #define GPIO_AF2_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */
AnnaBridge 167:e84263d55307 208 #define GPIO_AF2_I2C4 ((uint8_t)0x02) /* I2C4 Alternate Function mapping */
AnnaBridge 167:e84263d55307 209
AnnaBridge 167:e84263d55307 210 /**
AnnaBridge 167:e84263d55307 211 * @brief AF 3 selection
AnnaBridge 167:e84263d55307 212 */
AnnaBridge 167:e84263d55307 213 #define GPIO_AF3_TIM1_COMP2 ((uint8_t)0x03) /* TIM1/COMP2 Break in Alternate Function mapping */
AnnaBridge 167:e84263d55307 214 #define GPIO_AF3_TIM1_COMP1 ((uint8_t)0x03) /* TIM1/COMP1 Break in Alternate Function mapping */
AnnaBridge 167:e84263d55307 215 #define GPIO_AF3_USART2 ((uint8_t)0x03) /* USART2 Alternate Function mapping */
AnnaBridge 167:e84263d55307 216 #define GPIO_AF3_CAN1 ((uint8_t)0x03) /* CAN1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 217 #define GPIO_AF3_I2C4 ((uint8_t)0x03) /* I2C4 Alternate Function mapping */
AnnaBridge 167:e84263d55307 218
AnnaBridge 167:e84263d55307 219 /**
AnnaBridge 167:e84263d55307 220 * @brief AF 4 selection
AnnaBridge 167:e84263d55307 221 */
AnnaBridge 167:e84263d55307 222 #define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 223 #define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */
AnnaBridge 167:e84263d55307 224 #define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */
AnnaBridge 167:e84263d55307 225 #define GPIO_AF4_I2C4 ((uint8_t)0x04) /* I2C4 Alternate Function mapping */
AnnaBridge 167:e84263d55307 226
AnnaBridge 167:e84263d55307 227 /**
AnnaBridge 167:e84263d55307 228 * @brief AF 5 selection
AnnaBridge 167:e84263d55307 229 */
AnnaBridge 167:e84263d55307 230 #define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 231 #define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2 Alternate Function mapping */
AnnaBridge 167:e84263d55307 232 #define GPIO_AF5_I2C4 ((uint8_t)0x05) /* I2C4 Alternate Function mapping */
AnnaBridge 167:e84263d55307 233
AnnaBridge 167:e84263d55307 234 /**
AnnaBridge 167:e84263d55307 235 * @brief AF 6 selection
AnnaBridge 167:e84263d55307 236 */
AnnaBridge 167:e84263d55307 237 #define GPIO_AF6_SPI3 ((uint8_t)0x06) /* SPI3 Alternate Function mapping */
AnnaBridge 167:e84263d55307 238 #define GPIO_AF6_DFSDM1 ((uint8_t)0x06) /* DFSDM1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 239 #define GPIO_AF6_COMP1 ((uint8_t)0x06) /* COMP1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 240
AnnaBridge 167:e84263d55307 241 /**
AnnaBridge 167:e84263d55307 242 * @brief AF 7 selection
AnnaBridge 167:e84263d55307 243 */
AnnaBridge 167:e84263d55307 244 #define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 245 #define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */
AnnaBridge 167:e84263d55307 246 #define GPIO_AF7_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */
AnnaBridge 167:e84263d55307 247
AnnaBridge 167:e84263d55307 248 /**
AnnaBridge 167:e84263d55307 249 * @brief AF 8 selection
AnnaBridge 167:e84263d55307 250 */
AnnaBridge 167:e84263d55307 251 #define GPIO_AF8_UART4 ((uint8_t)0x08) /* UART4 Alternate Function mapping */
AnnaBridge 167:e84263d55307 252 #define GPIO_AF8_LPUART1 ((uint8_t)0x08) /* LPUART1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 253 #define GPIO_AF8_CAN1 ((uint8_t)0x08) /* CAN1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 254
AnnaBridge 167:e84263d55307 255
AnnaBridge 167:e84263d55307 256 /**
AnnaBridge 167:e84263d55307 257 * @brief AF 9 selection
AnnaBridge 167:e84263d55307 258 */
AnnaBridge 167:e84263d55307 259 #define GPIO_AF9_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 260 #define GPIO_AF9_TSC ((uint8_t)0x09) /* TSC Alternate Function mapping */
AnnaBridge 167:e84263d55307 261
AnnaBridge 167:e84263d55307 262 /**
AnnaBridge 167:e84263d55307 263 * @brief AF 10 selection
AnnaBridge 167:e84263d55307 264 */
AnnaBridge 167:e84263d55307 265 #if defined(STM32L452xx) || defined(STM32L462xx)
AnnaBridge 167:e84263d55307 266 #define GPIO_AF10_USB_FS ((uint8_t)0x0A) /* USB_FS Alternate Function mapping */
AnnaBridge 167:e84263d55307 267 #endif /* STM32L452xx || STM32L462xx */
AnnaBridge 167:e84263d55307 268 #define GPIO_AF10_QUADSPI ((uint8_t)0x0A) /* QUADSPI Alternate Function mapping */
AnnaBridge 167:e84263d55307 269 #define GPIO_AF10_CAN1 ((uint8_t)0x0A) /* CAN1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 270
AnnaBridge 167:e84263d55307 271 /**
AnnaBridge 167:e84263d55307 272 * @brief AF 11 selection
AnnaBridge 167:e84263d55307 273 */
AnnaBridge 167:e84263d55307 274
AnnaBridge 167:e84263d55307 275 /**
AnnaBridge 167:e84263d55307 276 * @brief AF 12 selection
AnnaBridge 167:e84263d55307 277 */
AnnaBridge 167:e84263d55307 278 #define GPIO_AF12_COMP1 ((uint8_t)0x0C) /* COMP1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 279 #define GPIO_AF12_COMP2 ((uint8_t)0x0C) /* COMP2 Alternate Function mapping */
AnnaBridge 167:e84263d55307 280 #define GPIO_AF12_SDMMC1 ((uint8_t)0x0C) /* SDMMC1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 281
AnnaBridge 167:e84263d55307 282 /**
AnnaBridge 167:e84263d55307 283 * @brief AF 13 selection
AnnaBridge 167:e84263d55307 284 */
AnnaBridge 167:e84263d55307 285 #define GPIO_AF13_SAI1 ((uint8_t)0x0D) /* SAI1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 286
AnnaBridge 167:e84263d55307 287 /**
AnnaBridge 167:e84263d55307 288 * @brief AF 14 selection
AnnaBridge 167:e84263d55307 289 */
AnnaBridge 167:e84263d55307 290 #define GPIO_AF14_TIM2 ((uint8_t)0x0E) /* TIM2 Alternate Function mapping */
AnnaBridge 167:e84263d55307 291 #define GPIO_AF14_TIM15 ((uint8_t)0x0E) /* TIM15 Alternate Function mapping */
AnnaBridge 167:e84263d55307 292 #define GPIO_AF14_TIM16 ((uint8_t)0x0E) /* TIM16 Alternate Function mapping */
AnnaBridge 167:e84263d55307 293 #define GPIO_AF14_TIM17 ((uint8_t)0x0E) /* TIM17 Alternate Function mapping */
AnnaBridge 167:e84263d55307 294 #define GPIO_AF14_LPTIM2 ((uint8_t)0x0E) /* LPTIM2 Alternate Function mapping */
AnnaBridge 167:e84263d55307 295
AnnaBridge 167:e84263d55307 296 /**
AnnaBridge 167:e84263d55307 297 * @brief AF 15 selection
AnnaBridge 167:e84263d55307 298 */
AnnaBridge 167:e84263d55307 299 #define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */
AnnaBridge 167:e84263d55307 300
AnnaBridge 167:e84263d55307 301 #define IS_GPIO_AF(AF) ((AF) <= (uint8_t)0x0F)
AnnaBridge 167:e84263d55307 302
AnnaBridge 167:e84263d55307 303 #endif /* STM32L451xx || STM32L452xx || STM32L462xx */
AnnaBridge 167:e84263d55307 304
<> 144:ef7eb2e8f9f7 305 #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx)
<> 144:ef7eb2e8f9f7 306 /*--------------STM32L471xx/STM32L475xx/STM32L476xx/STM32L485xx/STM32L486xx---*/
<> 144:ef7eb2e8f9f7 307 /**
<> 144:ef7eb2e8f9f7 308 * @brief AF 0 selection
<> 144:ef7eb2e8f9f7 309 */
<> 144:ef7eb2e8f9f7 310 #define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */
<> 144:ef7eb2e8f9f7 311 #define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */
<> 144:ef7eb2e8f9f7 312 #define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */
<> 144:ef7eb2e8f9f7 313 #if defined(STM32L476xx) || defined(STM32L486xx)
<> 144:ef7eb2e8f9f7 314 #define GPIO_AF0_LCDBIAS ((uint8_t)0x00) /* LCDBIAS Alternate Function mapping */
<> 144:ef7eb2e8f9f7 315 #endif /* STM32L476xx || STM32L486xx */
<> 144:ef7eb2e8f9f7 316 #define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */
<> 144:ef7eb2e8f9f7 317
<> 144:ef7eb2e8f9f7 318 /**
<> 144:ef7eb2e8f9f7 319 * @brief AF 1 selection
<> 144:ef7eb2e8f9f7 320 */
<> 144:ef7eb2e8f9f7 321 #define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 322 #define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 323 #define GPIO_AF1_TIM5 ((uint8_t)0x01) /* TIM5 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 324 #define GPIO_AF1_TIM8 ((uint8_t)0x01) /* TIM8 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 325 #define GPIO_AF1_LPTIM1 ((uint8_t)0x01) /* LPTIM1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 326 #define GPIO_AF1_IR ((uint8_t)0x01) /* IR Alternate Function mapping */
<> 144:ef7eb2e8f9f7 327
<> 144:ef7eb2e8f9f7 328 /**
<> 144:ef7eb2e8f9f7 329 * @brief AF 2 selection
<> 144:ef7eb2e8f9f7 330 */
<> 144:ef7eb2e8f9f7 331 #define GPIO_AF2_TIM1 ((uint8_t)0x02) /* TIM1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 332 #define GPIO_AF2_TIM2 ((uint8_t)0x02) /* TIM2 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 333 #define GPIO_AF2_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 334 #define GPIO_AF2_TIM4 ((uint8_t)0x02) /* TIM4 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 335 #define GPIO_AF2_TIM5 ((uint8_t)0x02) /* TIM5 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 336
<> 144:ef7eb2e8f9f7 337 /**
<> 144:ef7eb2e8f9f7 338 * @brief AF 3 selection
<> 144:ef7eb2e8f9f7 339 */
<> 144:ef7eb2e8f9f7 340 #define GPIO_AF3_TIM8 ((uint8_t)0x03) /* TIM8 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 341 #define GPIO_AF3_TIM1_COMP2 ((uint8_t)0x03) /* TIM1/COMP2 Break in Alternate Function mapping */
<> 144:ef7eb2e8f9f7 342 #define GPIO_AF3_TIM1_COMP1 ((uint8_t)0x03) /* TIM1/COMP1 Break in Alternate Function mapping */
<> 144:ef7eb2e8f9f7 343
<> 144:ef7eb2e8f9f7 344 /**
<> 144:ef7eb2e8f9f7 345 * @brief AF 4 selection
<> 144:ef7eb2e8f9f7 346 */
<> 144:ef7eb2e8f9f7 347 #define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 348 #define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 349 #define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 350
<> 144:ef7eb2e8f9f7 351 /**
<> 144:ef7eb2e8f9f7 352 * @brief AF 5 selection
<> 144:ef7eb2e8f9f7 353 */
<> 144:ef7eb2e8f9f7 354 #define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 355 #define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 356
<> 144:ef7eb2e8f9f7 357 /**
<> 144:ef7eb2e8f9f7 358 * @brief AF 6 selection
<> 144:ef7eb2e8f9f7 359 */
<> 144:ef7eb2e8f9f7 360 #define GPIO_AF6_SPI3 ((uint8_t)0x06) /* SPI3 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 361 #define GPIO_AF6_DFSDM1 ((uint8_t)0x06) /* DFSDM1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 362
<> 144:ef7eb2e8f9f7 363 /**
<> 144:ef7eb2e8f9f7 364 * @brief AF 7 selection
<> 144:ef7eb2e8f9f7 365 */
<> 144:ef7eb2e8f9f7 366 #define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 367 #define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 368 #define GPIO_AF7_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 369
<> 144:ef7eb2e8f9f7 370 /**
<> 144:ef7eb2e8f9f7 371 * @brief AF 8 selection
<> 144:ef7eb2e8f9f7 372 */
<> 144:ef7eb2e8f9f7 373 #define GPIO_AF8_UART4 ((uint8_t)0x08) /* UART4 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 374 #define GPIO_AF8_UART5 ((uint8_t)0x08) /* UART5 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 375 #define GPIO_AF8_LPUART1 ((uint8_t)0x08) /* LPUART1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 376
<> 144:ef7eb2e8f9f7 377
<> 144:ef7eb2e8f9f7 378 /**
<> 144:ef7eb2e8f9f7 379 * @brief AF 9 selection
<> 144:ef7eb2e8f9f7 380 */
<> 144:ef7eb2e8f9f7 381 #define GPIO_AF9_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 382 #define GPIO_AF9_TSC ((uint8_t)0x09) /* TSC Alternate Function mapping */
<> 144:ef7eb2e8f9f7 383
<> 144:ef7eb2e8f9f7 384 /**
<> 144:ef7eb2e8f9f7 385 * @brief AF 10 selection
<> 144:ef7eb2e8f9f7 386 */
<> 144:ef7eb2e8f9f7 387 #if defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx)
AnnaBridge 167:e84263d55307 388 #define GPIO_AF10_OTG_FS ((uint8_t)0x0A) /* OTG_FS Alternate Function mapping */
<> 144:ef7eb2e8f9f7 389 #endif /* STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */
AnnaBridge 167:e84263d55307 390 #define GPIO_AF10_QUADSPI ((uint8_t)0x0A) /* QUADSPI Alternate Function mapping */
<> 144:ef7eb2e8f9f7 391
<> 144:ef7eb2e8f9f7 392 #if defined(STM32L476xx) || defined(STM32L486xx)
<> 144:ef7eb2e8f9f7 393 /**
<> 144:ef7eb2e8f9f7 394 * @brief AF 11 selection
<> 144:ef7eb2e8f9f7 395 */
AnnaBridge 167:e84263d55307 396 #define GPIO_AF11_LCD ((uint8_t)0x0B) /* LCD Alternate Function mapping */
<> 144:ef7eb2e8f9f7 397 #endif /* STM32L476xx || STM32L486xx */
<> 144:ef7eb2e8f9f7 398
<> 144:ef7eb2e8f9f7 399 /**
<> 144:ef7eb2e8f9f7 400 * @brief AF 12 selection
<> 144:ef7eb2e8f9f7 401 */
AnnaBridge 167:e84263d55307 402 #define GPIO_AF12_FMC ((uint8_t)0x0C) /* FMC Alternate Function mapping */
AnnaBridge 167:e84263d55307 403 #define GPIO_AF12_SWPMI1 ((uint8_t)0x0C) /* SWPMI1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 404 #define GPIO_AF12_COMP1 ((uint8_t)0x0C) /* COMP1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 405 #define GPIO_AF12_COMP2 ((uint8_t)0x0C) /* COMP2 Alternate Function mapping */
AnnaBridge 167:e84263d55307 406 #define GPIO_AF12_SDMMC1 ((uint8_t)0x0C) /* SDMMC1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 407
<> 144:ef7eb2e8f9f7 408 /**
<> 144:ef7eb2e8f9f7 409 * @brief AF 13 selection
<> 144:ef7eb2e8f9f7 410 */
AnnaBridge 167:e84263d55307 411 #define GPIO_AF13_SAI1 ((uint8_t)0x0D) /* SAI1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 412 #define GPIO_AF13_SAI2 ((uint8_t)0x0D) /* SAI2 Alternate Function mapping */
AnnaBridge 167:e84263d55307 413 #define GPIO_AF13_TIM8_COMP2 ((uint8_t)0x0D) /* TIM8/COMP2 Break in Alternate Function mapping */
AnnaBridge 167:e84263d55307 414 #define GPIO_AF13_TIM8_COMP1 ((uint8_t)0x0D) /* TIM8/COMP1 Break in Alternate Function mapping */
<> 144:ef7eb2e8f9f7 415
<> 144:ef7eb2e8f9f7 416 /**
<> 144:ef7eb2e8f9f7 417 * @brief AF 14 selection
<> 144:ef7eb2e8f9f7 418 */
AnnaBridge 167:e84263d55307 419 #define GPIO_AF14_TIM2 ((uint8_t)0x0E) /* TIM2 Alternate Function mapping */
AnnaBridge 167:e84263d55307 420 #define GPIO_AF14_TIM15 ((uint8_t)0x0E) /* TIM15 Alternate Function mapping */
AnnaBridge 167:e84263d55307 421 #define GPIO_AF14_TIM16 ((uint8_t)0x0E) /* TIM16 Alternate Function mapping */
AnnaBridge 167:e84263d55307 422 #define GPIO_AF14_TIM17 ((uint8_t)0x0E) /* TIM17 Alternate Function mapping */
AnnaBridge 167:e84263d55307 423 #define GPIO_AF14_LPTIM2 ((uint8_t)0x0E) /* LPTIM2 Alternate Function mapping */
AnnaBridge 167:e84263d55307 424 #define GPIO_AF14_TIM8_COMP1 ((uint8_t)0x0E) /* TIM8/COMP1 Break in Alternate Function mapping */
<> 144:ef7eb2e8f9f7 425
<> 144:ef7eb2e8f9f7 426 /**
<> 144:ef7eb2e8f9f7 427 * @brief AF 15 selection
<> 144:ef7eb2e8f9f7 428 */
AnnaBridge 167:e84263d55307 429 #define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */
<> 144:ef7eb2e8f9f7 430
<> 144:ef7eb2e8f9f7 431 #define IS_GPIO_AF(AF) ((AF) <= (uint8_t)0x0F)
<> 144:ef7eb2e8f9f7 432
<> 144:ef7eb2e8f9f7 433 #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */
<> 144:ef7eb2e8f9f7 434
AnnaBridge 167:e84263d55307 435 #if defined(STM32L496xx) || defined(STM32L4A6xx)
AnnaBridge 167:e84263d55307 436 /*--------------------------------STM32L496xx/STM32L4A6xx---------------------*/
<> 144:ef7eb2e8f9f7 437 /**
<> 144:ef7eb2e8f9f7 438 * @brief AF 0 selection
<> 144:ef7eb2e8f9f7 439 */
<> 144:ef7eb2e8f9f7 440 #define GPIO_AF0_RTC_50Hz ((uint8_t)0x00) /* RTC_50Hz Alternate Function mapping */
<> 144:ef7eb2e8f9f7 441 #define GPIO_AF0_MCO ((uint8_t)0x00) /* MCO (MCO1 and MCO2) Alternate Function mapping */
<> 144:ef7eb2e8f9f7 442 #define GPIO_AF0_SWJ ((uint8_t)0x00) /* SWJ (SWD and JTAG) Alternate Function mapping */
<> 144:ef7eb2e8f9f7 443 #define GPIO_AF0_TRACE ((uint8_t)0x00) /* TRACE Alternate Function mapping */
<> 144:ef7eb2e8f9f7 444
<> 144:ef7eb2e8f9f7 445 /**
<> 144:ef7eb2e8f9f7 446 * @brief AF 1 selection
<> 144:ef7eb2e8f9f7 447 */
<> 144:ef7eb2e8f9f7 448 #define GPIO_AF1_TIM1 ((uint8_t)0x01) /* TIM1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 449 #define GPIO_AF1_TIM2 ((uint8_t)0x01) /* TIM2 Alternate Function mapping */
AnnaBridge 167:e84263d55307 450 #define GPIO_AF1_TIM5 ((uint8_t)0x01) /* TIM5 Alternate Function mapping */
AnnaBridge 167:e84263d55307 451 #define GPIO_AF1_TIM8 ((uint8_t)0x01) /* TIM8 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 452 #define GPIO_AF1_LPTIM1 ((uint8_t)0x01) /* LPTIM1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 453 #define GPIO_AF1_IR ((uint8_t)0x01) /* IR Alternate Function mapping */
<> 144:ef7eb2e8f9f7 454
<> 144:ef7eb2e8f9f7 455 /**
<> 144:ef7eb2e8f9f7 456 * @brief AF 2 selection
<> 144:ef7eb2e8f9f7 457 */
<> 144:ef7eb2e8f9f7 458 #define GPIO_AF2_TIM1 ((uint8_t)0x02) /* TIM1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 459 #define GPIO_AF2_TIM2 ((uint8_t)0x02) /* TIM2 Alternate Function mapping */
AnnaBridge 167:e84263d55307 460 #define GPIO_AF2_TIM3 ((uint8_t)0x02) /* TIM3 Alternate Function mapping */
AnnaBridge 167:e84263d55307 461 #define GPIO_AF2_TIM4 ((uint8_t)0x02) /* TIM4 Alternate Function mapping */
AnnaBridge 167:e84263d55307 462 #define GPIO_AF2_TIM5 ((uint8_t)0x02) /* TIM5 Alternate Function mapping */
AnnaBridge 167:e84263d55307 463 #define GPIO_AF2_I2C4 ((uint8_t)0x02) /* I2C4 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 464
<> 144:ef7eb2e8f9f7 465 /**
<> 144:ef7eb2e8f9f7 466 * @brief AF 3 selection
<> 144:ef7eb2e8f9f7 467 */
AnnaBridge 167:e84263d55307 468 #define GPIO_AF3_TIM8 ((uint8_t)0x03) /* TIM8 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 469 #define GPIO_AF3_TIM1_COMP2 ((uint8_t)0x03) /* TIM1/COMP2 Break in Alternate Function mapping */
<> 144:ef7eb2e8f9f7 470 #define GPIO_AF3_TIM1_COMP1 ((uint8_t)0x03) /* TIM1/COMP1 Break in Alternate Function mapping */
AnnaBridge 167:e84263d55307 471 #define GPIO_AF3_CAN2 ((uint8_t)0x03) /* CAN2 Alternate Function mapping */
AnnaBridge 167:e84263d55307 472 #define GPIO_AF3_I2C4 ((uint8_t)0x03) /* I2C4 Alternate Function mapping */
AnnaBridge 167:e84263d55307 473 #define GPIO_AF3_QUADSPI ((uint8_t)0x03) /* QUADSPI Alternate Function mapping */
AnnaBridge 167:e84263d55307 474 #define GPIO_AF3_SPI2 ((uint8_t)0x03) /* SPI2 Alternate Function mapping */
AnnaBridge 167:e84263d55307 475 #define GPIO_AF3_USART2 ((uint8_t)0x03) /* USART2 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 476
<> 144:ef7eb2e8f9f7 477 /**
<> 144:ef7eb2e8f9f7 478 * @brief AF 4 selection
<> 144:ef7eb2e8f9f7 479 */
<> 144:ef7eb2e8f9f7 480 #define GPIO_AF4_I2C1 ((uint8_t)0x04) /* I2C1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 481 #define GPIO_AF4_I2C2 ((uint8_t)0x04) /* I2C2 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 482 #define GPIO_AF4_I2C3 ((uint8_t)0x04) /* I2C3 Alternate Function mapping */
AnnaBridge 167:e84263d55307 483 #define GPIO_AF4_I2C4 ((uint8_t)0x04) /* I2C4 Alternate Function mapping */
AnnaBridge 167:e84263d55307 484 #define GPIO_AF4_DCMI ((uint8_t)0x04) /* DCMI Alternate Function mapping */
<> 144:ef7eb2e8f9f7 485
<> 144:ef7eb2e8f9f7 486 /**
<> 144:ef7eb2e8f9f7 487 * @brief AF 5 selection
<> 144:ef7eb2e8f9f7 488 */
<> 144:ef7eb2e8f9f7 489 #define GPIO_AF5_SPI1 ((uint8_t)0x05) /* SPI1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 490 #define GPIO_AF5_SPI2 ((uint8_t)0x05) /* SPI2 Alternate Function mapping */
AnnaBridge 167:e84263d55307 491 #define GPIO_AF5_DCMI ((uint8_t)0x05) /* DCMI Alternate Function mapping */
AnnaBridge 167:e84263d55307 492 #define GPIO_AF5_I2C4 ((uint8_t)0x05) /* I2C4 Alternate Function mapping */
AnnaBridge 167:e84263d55307 493 #define GPIO_AF5_QUADSPI ((uint8_t)0x05) /* QUADSPI Alternate Function mapping */
<> 144:ef7eb2e8f9f7 494
<> 144:ef7eb2e8f9f7 495 /**
<> 144:ef7eb2e8f9f7 496 * @brief AF 6 selection
<> 144:ef7eb2e8f9f7 497 */
<> 144:ef7eb2e8f9f7 498 #define GPIO_AF6_SPI3 ((uint8_t)0x06) /* SPI3 Alternate Function mapping */
AnnaBridge 167:e84263d55307 499 #define GPIO_AF6_DFSDM1 ((uint8_t)0x06) /* DFSDM1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 500 #define GPIO_AF6_I2C3 ((uint8_t)0x06) /* I2C3 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 501
<> 144:ef7eb2e8f9f7 502 /**
<> 144:ef7eb2e8f9f7 503 * @brief AF 7 selection
<> 144:ef7eb2e8f9f7 504 */
<> 144:ef7eb2e8f9f7 505 #define GPIO_AF7_USART1 ((uint8_t)0x07) /* USART1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 506 #define GPIO_AF7_USART2 ((uint8_t)0x07) /* USART2 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 507 #define GPIO_AF7_USART3 ((uint8_t)0x07) /* USART3 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 508
<> 144:ef7eb2e8f9f7 509 /**
<> 144:ef7eb2e8f9f7 510 * @brief AF 8 selection
<> 144:ef7eb2e8f9f7 511 */
AnnaBridge 167:e84263d55307 512 #define GPIO_AF8_UART4 ((uint8_t)0x08) /* UART4 Alternate Function mapping */
AnnaBridge 167:e84263d55307 513 #define GPIO_AF8_UART5 ((uint8_t)0x08) /* UART5 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 514 #define GPIO_AF8_LPUART1 ((uint8_t)0x08) /* LPUART1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 515 #define GPIO_AF8_CAN2 ((uint8_t)0x08) /* CAN2 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 516
<> 144:ef7eb2e8f9f7 517 /**
<> 144:ef7eb2e8f9f7 518 * @brief AF 9 selection
<> 144:ef7eb2e8f9f7 519 */
AnnaBridge 167:e84263d55307 520 #define GPIO_AF9_CAN1 ((uint8_t)0x09) /* CAN1 Alternate Function mapping */
<> 144:ef7eb2e8f9f7 521 #define GPIO_AF9_TSC ((uint8_t)0x09) /* TSC Alternate Function mapping */
<> 144:ef7eb2e8f9f7 522
<> 144:ef7eb2e8f9f7 523 /**
<> 144:ef7eb2e8f9f7 524 * @brief AF 10 selection
<> 144:ef7eb2e8f9f7 525 */
AnnaBridge 167:e84263d55307 526 #define GPIO_AF10_OTG_FS ((uint8_t)0x0A) /* OTG_FS Alternate Function mapping */
AnnaBridge 167:e84263d55307 527 #define GPIO_AF10_QUADSPI ((uint8_t)0x0A) /* QUADSPI Alternate Function mapping */
AnnaBridge 167:e84263d55307 528 #define GPIO_AF10_CAN2 ((uint8_t)0x0A) /* CAN2 Alternate Function mapping */
AnnaBridge 167:e84263d55307 529 #define GPIO_AF10_DCMI ((uint8_t)0x0A) /* DCMI Alternate Function mapping */
<> 144:ef7eb2e8f9f7 530
<> 144:ef7eb2e8f9f7 531 /**
<> 144:ef7eb2e8f9f7 532 * @brief AF 11 selection
<> 144:ef7eb2e8f9f7 533 */
AnnaBridge 167:e84263d55307 534 #define GPIO_AF11_LCD ((uint8_t)0x0B) /* LCD Alternate Function mapping */
<> 144:ef7eb2e8f9f7 535
<> 144:ef7eb2e8f9f7 536 /**
<> 144:ef7eb2e8f9f7 537 * @brief AF 12 selection
<> 144:ef7eb2e8f9f7 538 */
AnnaBridge 167:e84263d55307 539 #define GPIO_AF12_FMC ((uint8_t)0x0C) /* FMC Alternate Function mapping */
AnnaBridge 167:e84263d55307 540 #define GPIO_AF12_SWPMI1 ((uint8_t)0x0C) /* SWPMI1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 541 #define GPIO_AF12_COMP1 ((uint8_t)0x0C) /* COMP1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 542 #define GPIO_AF12_COMP2 ((uint8_t)0x0C) /* COMP2 Alternate Function mapping */
AnnaBridge 167:e84263d55307 543 #define GPIO_AF12_SDMMC1 ((uint8_t)0x0C) /* SDMMC1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 544 #define GPIO_AF12_TIM1_COMP2 ((uint8_t)0x0C) /* TIM1/COMP2 Break in Alternate Function mapping */
AnnaBridge 167:e84263d55307 545 #define GPIO_AF12_TIM1_COMP1 ((uint8_t)0x0C) /* TIM1/COMP1 Break in Alternate Function mapping */
AnnaBridge 167:e84263d55307 546 #define GPIO_AF12_TIM8_COMP2 ((uint8_t)0x0C) /* TIM8/COMP2 Break in Alternate Function mapping */
<> 144:ef7eb2e8f9f7 547
<> 144:ef7eb2e8f9f7 548 /**
<> 144:ef7eb2e8f9f7 549 * @brief AF 13 selection
<> 144:ef7eb2e8f9f7 550 */
AnnaBridge 167:e84263d55307 551 #define GPIO_AF13_SAI1 ((uint8_t)0x0D) /* SAI1 Alternate Function mapping */
AnnaBridge 167:e84263d55307 552 #define GPIO_AF13_SAI2 ((uint8_t)0x0D) /* SAI2 Alternate Function mapping */
AnnaBridge 167:e84263d55307 553 #define GPIO_AF13_TIM8_COMP2 ((uint8_t)0x0D) /* TIM8/COMP2 Break in Alternate Function mapping */
AnnaBridge 167:e84263d55307 554 #define GPIO_AF13_TIM8_COMP1 ((uint8_t)0x0D) /* TIM8/COMP1 Break in Alternate Function mapping */
<> 144:ef7eb2e8f9f7 555
<> 144:ef7eb2e8f9f7 556 /**
<> 144:ef7eb2e8f9f7 557 * @brief AF 14 selection
<> 144:ef7eb2e8f9f7 558 */
AnnaBridge 167:e84263d55307 559 #define GPIO_AF14_TIM2 ((uint8_t)0x0E) /* TIM2 Alternate Function mapping */
AnnaBridge 167:e84263d55307 560 #define GPIO_AF14_TIM15 ((uint8_t)0x0E) /* TIM15 Alternate Function mapping */
AnnaBridge 167:e84263d55307 561 #define GPIO_AF14_TIM16 ((uint8_t)0x0E) /* TIM16 Alternate Function mapping */
AnnaBridge 167:e84263d55307 562 #define GPIO_AF14_TIM17 ((uint8_t)0x0E) /* TIM17 Alternate Function mapping */
AnnaBridge 167:e84263d55307 563 #define GPIO_AF14_LPTIM2 ((uint8_t)0x0E) /* LPTIM2 Alternate Function mapping */
AnnaBridge 167:e84263d55307 564 #define GPIO_AF14_TIM8_COMP1 ((uint8_t)0x0E) /* TIM8/COMP1 Break in Alternate Function mapping */
<> 144:ef7eb2e8f9f7 565
<> 144:ef7eb2e8f9f7 566 /**
<> 144:ef7eb2e8f9f7 567 * @brief AF 15 selection
<> 144:ef7eb2e8f9f7 568 */
AnnaBridge 167:e84263d55307 569 #define GPIO_AF15_EVENTOUT ((uint8_t)0x0F) /* EVENTOUT Alternate Function mapping */
<> 144:ef7eb2e8f9f7 570
<> 144:ef7eb2e8f9f7 571 #define IS_GPIO_AF(AF) ((AF) <= (uint8_t)0x0F)
<> 144:ef7eb2e8f9f7 572
AnnaBridge 167:e84263d55307 573 #endif /* STM32L496xx || STM32L4A6xx */
<> 144:ef7eb2e8f9f7 574
<> 144:ef7eb2e8f9f7 575 /**
<> 144:ef7eb2e8f9f7 576 * @}
<> 144:ef7eb2e8f9f7 577 */
<> 144:ef7eb2e8f9f7 578
<> 144:ef7eb2e8f9f7 579 /**
<> 144:ef7eb2e8f9f7 580 * @}
<> 144:ef7eb2e8f9f7 581 */
<> 144:ef7eb2e8f9f7 582
<> 144:ef7eb2e8f9f7 583 /* Exported macro ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 584 /** @defgroup GPIOEx_Exported_Macros GPIOEx Exported Macros
<> 144:ef7eb2e8f9f7 585 * @{
<> 144:ef7eb2e8f9f7 586 */
<> 144:ef7eb2e8f9f7 587
<> 144:ef7eb2e8f9f7 588 /** @defgroup GPIOEx_Get_Port_Index GPIOEx_Get Port Index
<> 144:ef7eb2e8f9f7 589 * @{
<> 144:ef7eb2e8f9f7 590 */
<> 144:ef7eb2e8f9f7 591 #if defined(STM32L431xx) || defined(STM32L433xx) || defined(STM32L443xx)
<> 144:ef7eb2e8f9f7 592
<> 144:ef7eb2e8f9f7 593 #define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0U :\
<> 144:ef7eb2e8f9f7 594 ((__GPIOx__) == (GPIOB))? 1U :\
<> 144:ef7eb2e8f9f7 595 ((__GPIOx__) == (GPIOC))? 2U :\
<> 144:ef7eb2e8f9f7 596 ((__GPIOx__) == (GPIOD))? 3U :\
<> 144:ef7eb2e8f9f7 597 ((__GPIOx__) == (GPIOE))? 4U : 7U)
<> 144:ef7eb2e8f9f7 598
<> 144:ef7eb2e8f9f7 599 #endif /* STM32L431xx || STM32L433xx || STM32L443xx */
<> 144:ef7eb2e8f9f7 600
<> 144:ef7eb2e8f9f7 601 #if defined(STM32L432xx) || defined(STM32L442xx)
<> 144:ef7eb2e8f9f7 602
<> 144:ef7eb2e8f9f7 603 #define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0U :\
<> 144:ef7eb2e8f9f7 604 ((__GPIOx__) == (GPIOB))? 1U :\
<> 144:ef7eb2e8f9f7 605 ((__GPIOx__) == (GPIOC))? 2U : 7U)
<> 144:ef7eb2e8f9f7 606
<> 144:ef7eb2e8f9f7 607 #endif /* STM32L432xx || STM32L442xx */
<> 144:ef7eb2e8f9f7 608
AnnaBridge 167:e84263d55307 609 #if defined(STM32L451xx) || defined(STM32L452xx) || defined(STM32L462xx)
AnnaBridge 167:e84263d55307 610
AnnaBridge 167:e84263d55307 611 #define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0U :\
AnnaBridge 167:e84263d55307 612 ((__GPIOx__) == (GPIOB))? 1U :\
AnnaBridge 167:e84263d55307 613 ((__GPIOx__) == (GPIOC))? 2U :\
AnnaBridge 167:e84263d55307 614 ((__GPIOx__) == (GPIOD))? 3U :\
AnnaBridge 167:e84263d55307 615 ((__GPIOx__) == (GPIOE))? 4U : 7U)
AnnaBridge 167:e84263d55307 616
AnnaBridge 167:e84263d55307 617 #endif /* STM32L451xx || STM32L452xx || STM32L462xx */
AnnaBridge 167:e84263d55307 618
<> 144:ef7eb2e8f9f7 619 #if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx)
<> 144:ef7eb2e8f9f7 620
<> 144:ef7eb2e8f9f7 621 #define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0U :\
<> 144:ef7eb2e8f9f7 622 ((__GPIOx__) == (GPIOB))? 1U :\
<> 144:ef7eb2e8f9f7 623 ((__GPIOx__) == (GPIOC))? 2U :\
<> 144:ef7eb2e8f9f7 624 ((__GPIOx__) == (GPIOD))? 3U :\
<> 144:ef7eb2e8f9f7 625 ((__GPIOx__) == (GPIOE))? 4U :\
<> 144:ef7eb2e8f9f7 626 ((__GPIOx__) == (GPIOF))? 5U :\
<> 144:ef7eb2e8f9f7 627 ((__GPIOx__) == (GPIOG))? 6U : 7U)
<> 144:ef7eb2e8f9f7 628
<> 144:ef7eb2e8f9f7 629 #endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx */
<> 144:ef7eb2e8f9f7 630
AnnaBridge 167:e84263d55307 631 #if defined(STM32L496xx) || defined(STM32L4A6xx)
AnnaBridge 167:e84263d55307 632
AnnaBridge 167:e84263d55307 633 #define GPIO_GET_INDEX(__GPIOx__) (((__GPIOx__) == (GPIOA))? 0U :\
AnnaBridge 167:e84263d55307 634 ((__GPIOx__) == (GPIOB))? 1U :\
AnnaBridge 167:e84263d55307 635 ((__GPIOx__) == (GPIOC))? 2U :\
AnnaBridge 167:e84263d55307 636 ((__GPIOx__) == (GPIOD))? 3U :\
AnnaBridge 167:e84263d55307 637 ((__GPIOx__) == (GPIOE))? 4U :\
AnnaBridge 167:e84263d55307 638 ((__GPIOx__) == (GPIOF))? 5U :\
AnnaBridge 167:e84263d55307 639 ((__GPIOx__) == (GPIOG))? 6U :\
AnnaBridge 167:e84263d55307 640 ((__GPIOx__) == (GPIOH))? 7U : 8U)
AnnaBridge 167:e84263d55307 641
AnnaBridge 167:e84263d55307 642 #endif /* STM32L496xx || STM32L4A6xx */
AnnaBridge 167:e84263d55307 643
AnnaBridge 167:e84263d55307 644
<> 144:ef7eb2e8f9f7 645 /**
<> 144:ef7eb2e8f9f7 646 * @}
<> 144:ef7eb2e8f9f7 647 */
<> 144:ef7eb2e8f9f7 648
<> 144:ef7eb2e8f9f7 649 /**
<> 144:ef7eb2e8f9f7 650 * @}
<> 144:ef7eb2e8f9f7 651 */
<> 144:ef7eb2e8f9f7 652
<> 144:ef7eb2e8f9f7 653 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 654 /**
<> 144:ef7eb2e8f9f7 655 * @}
<> 144:ef7eb2e8f9f7 656 */
<> 144:ef7eb2e8f9f7 657
<> 144:ef7eb2e8f9f7 658 /**
<> 144:ef7eb2e8f9f7 659 * @}
<> 144:ef7eb2e8f9f7 660 */
<> 144:ef7eb2e8f9f7 661
<> 144:ef7eb2e8f9f7 662 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 663 }
<> 144:ef7eb2e8f9f7 664 #endif
<> 144:ef7eb2e8f9f7 665
<> 144:ef7eb2e8f9f7 666 #endif /* __STM32L4xx_HAL_GPIO_EX_H */
<> 144:ef7eb2e8f9f7 667
<> 144:ef7eb2e8f9f7 668 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/