mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_IAR/rtl8195a.icf@167:e84263d55307, 2017-06-21 (annotated)

Committer:
AnnaBridge
Date:
Wed Jun 21 17:46:44 2017 +0100
Revision:
167:e84263d55307
Child:
173:e131a1973e81
This updates the lib to the mbed lib v 145

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 167:e84263d55307 1 /*###ICF### Section handled by ICF editor, don't touch! ****/
AnnaBridge 167:e84263d55307 2 /*-Editor annotation file-*/
AnnaBridge 167:e84263d55307 3 /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
AnnaBridge 167:e84263d55307 4 /*-Specials-*/
AnnaBridge 167:e84263d55307 5 //define symbol __ICFEDIT_intvec_start__ = 0x00000000;
AnnaBridge 167:e84263d55307 6
AnnaBridge 167:e84263d55307 7 //include "main.icf";
AnnaBridge 167:e84263d55307 8
AnnaBridge 167:e84263d55307 9 /*-Memory Regions-*/
AnnaBridge 167:e84263d55307 10 define symbol __ICFEDIT_region_ROM_start__ = 0x00000000;
AnnaBridge 167:e84263d55307 11 define symbol __ICFEDIT_region_ROM_end__ = 0x000FFFFF;
AnnaBridge 167:e84263d55307 12 define symbol __ICFEDIT_region_TCM_start__ = 0x1FFF0000;
AnnaBridge 167:e84263d55307 13 define symbol __ICFEDIT_region_TCM_end__ = 0x1FFFFFFF;
AnnaBridge 167:e84263d55307 14 define symbol __ICFEDIT_region_ROM_USED_RAM_start__ = 0x10000000;
AnnaBridge 167:e84263d55307 15 define symbol __ICFEDIT_region_ROM_USED_RAM_end__ = 0x10005FFF;
AnnaBridge 167:e84263d55307 16 //define symbol __ICFEDIT_region_RECY_RAM_start__ = 0x10002090;
AnnaBridge 167:e84263d55307 17 //define symbol __ICFEDIT_region_RECY_RAM_end__ = 0x100037FF;
AnnaBridge 167:e84263d55307 18 if( !isdefinedsymbol( __ICFEDIT_region_BD_RAM_start__ ) ) {
AnnaBridge 167:e84263d55307 19 define symbol __ICFEDIT_region_BD_RAM_start__ = 0x10006000;
AnnaBridge 167:e84263d55307 20 }
AnnaBridge 167:e84263d55307 21 if( !isdefinedsymbol( __ICFEDIT_region_BD_RAM_end__ ) ) {
AnnaBridge 167:e84263d55307 22 define symbol __ICFEDIT_region_BD_RAM_end__ = 0x1006FFFF;
AnnaBridge 167:e84263d55307 23 }
AnnaBridge 167:e84263d55307 24 define symbol __ICFEDIT_region_SDRAM_RAM_start__ = 0x30000000;
AnnaBridge 167:e84263d55307 25 define symbol __ICFEDIT_region_SDRAM_RAM_end__ = 0x301FFFFF;
AnnaBridge 167:e84263d55307 26
AnnaBridge 167:e84263d55307 27 /*-Sizes-*/
AnnaBridge 167:e84263d55307 28 define symbol __ICFEDIT_size_cstack__ = 0x1000;
AnnaBridge 167:e84263d55307 29 define symbol __ICFEDIT_size_heap__ = 0x19000;
AnnaBridge 167:e84263d55307 30 /**** End of ICF editor section. ###ICF###*/
AnnaBridge 167:e84263d55307 31
AnnaBridge 167:e84263d55307 32
AnnaBridge 167:e84263d55307 33 define memory mem with size = 4G;
AnnaBridge 167:e84263d55307 34 define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__];
AnnaBridge 167:e84263d55307 35 define region TCM_region = mem:[from __ICFEDIT_region_TCM_start__ to __ICFEDIT_region_TCM_end__];
AnnaBridge 167:e84263d55307 36 define region ROM_USED_RAM_region = mem:[from __ICFEDIT_region_ROM_USED_RAM_start__ to __ICFEDIT_region_ROM_USED_RAM_end__];
AnnaBridge 167:e84263d55307 37 //define region RECY_RAM_region = mem:[from __ICFEDIT_region_RECY_RAM_start__ to __ICFEDIT_region_RECY_RAM_end__];
AnnaBridge 167:e84263d55307 38 define region BD_RAM_region = mem:[from __ICFEDIT_region_BD_RAM_start__ to __ICFEDIT_region_BD_RAM_end__];
AnnaBridge 167:e84263d55307 39 define region SDRAM_RAM_region = mem:[from __ICFEDIT_region_SDRAM_RAM_start__ to __ICFEDIT_region_SDRAM_RAM_end__];
AnnaBridge 167:e84263d55307 40
AnnaBridge 167:e84263d55307 41 define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { };
AnnaBridge 167:e84263d55307 42 define block HEAP with alignment = 8, size = __ICFEDIT_size_heap__ { };
AnnaBridge 167:e84263d55307 43
AnnaBridge 167:e84263d55307 44 //initialize by copy { readwrite };
AnnaBridge 167:e84263d55307 45 //initialize by copy with packing = none { section __DLIB_PERTHREAD }; // Required in a multi-threaded application
AnnaBridge 167:e84263d55307 46
AnnaBridge 167:e84263d55307 47 //do not initialize { section * };
AnnaBridge 167:e84263d55307 48
AnnaBridge 167:e84263d55307 49 //place at address mem:__ICFEDIT_intvec_start__ { readonly section .vectors_table };
AnnaBridge 167:e84263d55307 50
AnnaBridge 167:e84263d55307 51
AnnaBridge 167:e84263d55307 52 /*place in RAM_region { readwrite, block CSTACK, block HEAP };*/
AnnaBridge 167:e84263d55307 53 //place in TCM_region { readwrite };
AnnaBridge 167:e84263d55307 54
AnnaBridge 167:e84263d55307 55 /****************************************
AnnaBridge 167:e84263d55307 56 * ROM Section config *
AnnaBridge 167:e84263d55307 57 ****************************************/
AnnaBridge 167:e84263d55307 58 keep { section .rom };
AnnaBridge 167:e84263d55307 59 place at start of ROM_region { section .rom };
AnnaBridge 167:e84263d55307 60
AnnaBridge 167:e84263d55307 61 /****************************************
AnnaBridge 167:e84263d55307 62 * BD RAM Section config *
AnnaBridge 167:e84263d55307 63 ****************************************/
AnnaBridge 167:e84263d55307 64 keep { section .ram_dedecated_vector_table* };
AnnaBridge 167:e84263d55307 65 define block .vector_table with fixed order{section .ram_dedecated_vector_table*};
AnnaBridge 167:e84263d55307 66
AnnaBridge 167:e84263d55307 67 keep { section .ram_user_define_irq_table* };
AnnaBridge 167:e84263d55307 68 define block .user_vector_table with fixed order{section .ram_user_define_irq_table*};
AnnaBridge 167:e84263d55307 69
AnnaBridge 167:e84263d55307 70 keep { section .ram_user_define_data_table* };
AnnaBridge 167:e84263d55307 71 define block .user_data_table with fixed order{section .ram_user_define_data_table*};
AnnaBridge 167:e84263d55307 72
AnnaBridge 167:e84263d55307 73 define block .rom.bss with fixed order{ section .hal.ram.bss* object hal_misc.o,
AnnaBridge 167:e84263d55307 74 section .hal.ram.bss* object hal_pinmux.o,
AnnaBridge 167:e84263d55307 75 section .hal.ram.bss* object diag.o,
AnnaBridge 167:e84263d55307 76 section .hal.ram.bss* object rtl8195a_ssi_rom.o,
AnnaBridge 167:e84263d55307 77 section .hal.ram.bss* object rtl8195a_gpio.o,
AnnaBridge 167:e84263d55307 78 section .hal.ram.bss*,
AnnaBridge 167:e84263d55307 79 section .timer2_7_vector_table.data*,
AnnaBridge 167:e84263d55307 80 section .infra.ram.bss*,
AnnaBridge 167:e84263d55307 81 section .mon.ram.bss*,
AnnaBridge 167:e84263d55307 82 section .wlan_ram_map* object rom_wlan_ram_map.o,
AnnaBridge 167:e84263d55307 83 section .wlan_ram_map*,
AnnaBridge 167:e84263d55307 84 section .libc.ram.bss*,
AnnaBridge 167:e84263d55307 85 };
AnnaBridge 167:e84263d55307 86
AnnaBridge 167:e84263d55307 87 keep { section .start.ram.data* };
AnnaBridge 167:e84263d55307 88 define block .ram.start.table with fixed order{ section .start.ram.data* };
AnnaBridge 167:e84263d55307 89
AnnaBridge 167:e84263d55307 90 keep { section .image1.validate.rodata* };
AnnaBridge 167:e84263d55307 91 keep { section .infra.ram.data* };
AnnaBridge 167:e84263d55307 92 keep { section .timer.ram.data* };
AnnaBridge 167:e84263d55307 93 keep { section .hal.ram.data* };
AnnaBridge 167:e84263d55307 94 define block .ram_image1.data with fixed order{ section .image1.validate.rodata*,
AnnaBridge 167:e84263d55307 95 section .infra.ram.data*,
AnnaBridge 167:e84263d55307 96 section .timer.ram.data*,
AnnaBridge 167:e84263d55307 97 section .cutb.ram.data*,
AnnaBridge 167:e84263d55307 98 section .hal.ram.data* object rom.o, // for standard libaray __impure_data_ptr
AnnaBridge 167:e84263d55307 99 section .cutc.ram.data*,
AnnaBridge 167:e84263d55307 100 section .hal.ram.data*
AnnaBridge 167:e84263d55307 101 };
AnnaBridge 167:e84263d55307 102 define block .ram_image1.bss with fixed order{ //section .hal.flash.data*,
AnnaBridge 167:e84263d55307 103 section .hal.sdrc.data*
AnnaBridge 167:e84263d55307 104 };
AnnaBridge 167:e84263d55307 105
AnnaBridge 167:e84263d55307 106 define block .ram_image1.text with fixed order{ section .hal.ram.text*,
AnnaBridge 167:e84263d55307 107 section .hal.sdrc.text*,
AnnaBridge 167:e84263d55307 108 //section .text* object startup.o,
AnnaBridge 167:e84263d55307 109 section .infra.ram.text*,
AnnaBridge 167:e84263d55307 110 };
AnnaBridge 167:e84263d55307 111
AnnaBridge 167:e84263d55307 112 define block IMAGE1 with fixed order { section LOADER };
AnnaBridge 167:e84263d55307 113 define block IMAGE1_DBG with fixed order { block .ram.start.table, block .ram_image1.data, block .ram_image1.bss, block .ram_image1.text };
AnnaBridge 167:e84263d55307 114
AnnaBridge 167:e84263d55307 115 place at start of ROM_USED_RAM_region {
AnnaBridge 167:e84263d55307 116 block .vector_table,
AnnaBridge 167:e84263d55307 117 block .user_vector_table,
AnnaBridge 167:e84263d55307 118 block .user_data_table,
AnnaBridge 167:e84263d55307 119 block .rom.bss,
AnnaBridge 167:e84263d55307 120 block IMAGE1
AnnaBridge 167:e84263d55307 121 };
AnnaBridge 167:e84263d55307 122
AnnaBridge 167:e84263d55307 123 keep { section .image2.ram.data* };
AnnaBridge 167:e84263d55307 124 define block .image2.start.table1 with fixed order{ section .image2.ram.data* };
AnnaBridge 167:e84263d55307 125
AnnaBridge 167:e84263d55307 126 keep { section .image2.validate.rodata*, section .custom.validate.rodata* };
AnnaBridge 167:e84263d55307 127 define block .image2.start.table2 with fixed order{ section .image2.validate.rodata*, section .custom.validate.rodata* };
AnnaBridge 167:e84263d55307 128
AnnaBridge 167:e84263d55307 129 define block SHT$$PREINIT_ARRAY { preinit_array };
AnnaBridge 167:e84263d55307 130 define block SHT$$INIT_ARRAY { init_array };
AnnaBridge 167:e84263d55307 131 define block CPP_INIT with alignment = 8, fixed order {
AnnaBridge 167:e84263d55307 132 block SHT$$PREINIT_ARRAY,
AnnaBridge 167:e84263d55307 133 block SHT$$INIT_ARRAY
AnnaBridge 167:e84263d55307 134 };
AnnaBridge 167:e84263d55307 135 define block FPB_REMAP with alignment = 256,fixed order {
AnnaBridge 167:e84263d55307 136 section .fpb.remap*
AnnaBridge 167:e84263d55307 137 };
AnnaBridge 167:e84263d55307 138 define block .ram_image2.text with fixed order{ section .infra.ram.start*,
AnnaBridge 167:e84263d55307 139 section .rodata*,
AnnaBridge 167:e84263d55307 140 block CPP_INIT,
AnnaBridge 167:e84263d55307 141 section .mon.ram.text*,
AnnaBridge 167:e84263d55307 142 section .hal.flash.text*,
AnnaBridge 167:e84263d55307 143 section .hal.gpio.text*,
AnnaBridge 167:e84263d55307 144 section .text* object main.o,
AnnaBridge 167:e84263d55307 145 section .text*,
AnnaBridge 167:e84263d55307 146 section .wlan.text,
AnnaBridge 167:e84263d55307 147 section .wps.text,
AnnaBridge 167:e84263d55307 148 section CODE,
AnnaBridge 167:e84263d55307 149 section .otg.rom.text,
AnnaBridge 167:e84263d55307 150 section Veneer object startup.o,
AnnaBridge 167:e84263d55307 151 section __DLIB_PERTHREAD,
AnnaBridge 167:e84263d55307 152 section .iar.dynexit*,
AnnaBridge 167:e84263d55307 153 //section .mdns.text
AnnaBridge 167:e84263d55307 154 };
AnnaBridge 167:e84263d55307 155
AnnaBridge 167:e84263d55307 156 define block .ram.data with fixed order{ readwrite, readonly,
AnnaBridge 167:e84263d55307 157 section .data*,
AnnaBridge 167:e84263d55307 158 section .wlan.data,
AnnaBridge 167:e84263d55307 159 section .wps.data,
AnnaBridge 167:e84263d55307 160 section DATA,
AnnaBridge 167:e84263d55307 161 section .ram.otg.data.a,
AnnaBridge 167:e84263d55307 162 section .iar.init_table,
AnnaBridge 167:e84263d55307 163 //section .mdns.data
AnnaBridge 167:e84263d55307 164 };
AnnaBridge 167:e84263d55307 165
AnnaBridge 167:e84263d55307 166 define block IMAGE2 with fixed order { block .image2.start.table1, block .image2.start.table2, block .ram_image2.text, block .ram.data };
AnnaBridge 167:e84263d55307 167
AnnaBridge 167:e84263d55307 168 define block .ram.bss with fixed order{ section .bss*,
AnnaBridge 167:e84263d55307 169 section .ssl_ram_map,
AnnaBridge 167:e84263d55307 170 section .hal.flash.data*,
AnnaBridge 167:e84263d55307 171 section .hal.gpio.data*,
AnnaBridge 167:e84263d55307 172 section COMMON,
AnnaBridge 167:e84263d55307 173 section .bdsram.data*,
AnnaBridge 167:e84263d55307 174 section .bss* object heap_4.o
AnnaBridge 167:e84263d55307 175 };
AnnaBridge 167:e84263d55307 176 define block .bf_data with fixed order{ section .bfsram.data* };
AnnaBridge 167:e84263d55307 177 define block .heap with fixed order{ section .heap* };
AnnaBridge 167:e84263d55307 178 define block .stack_dummy with fixed order { section .stack };
AnnaBridge 167:e84263d55307 179 place at start of BD_RAM_region {
AnnaBridge 167:e84263d55307 180 block IMAGE2,
AnnaBridge 167:e84263d55307 181 //block IMAGE1_DBG,
AnnaBridge 167:e84263d55307 182 block .ram.bss,
AnnaBridge 167:e84263d55307 183 //block .bf_data,
AnnaBridge 167:e84263d55307 184 };
AnnaBridge 167:e84263d55307 185
AnnaBridge 167:e84263d55307 186 //place at address mem:0x10052b00 { readwrite,
AnnaBridge 167:e84263d55307 187 place at end of BD_RAM_region {
AnnaBridge 167:e84263d55307 188 block .bf_data,
AnnaBridge 167:e84263d55307 189 block HEAP,
AnnaBridge 167:e84263d55307 190 };
AnnaBridge 167:e84263d55307 191
AnnaBridge 167:e84263d55307 192 define block SDRAM with fixed order{ section .sdram.text*,
AnnaBridge 167:e84263d55307 193 section .sdram.data*,
AnnaBridge 167:e84263d55307 194 section .mdns.text*,
AnnaBridge 167:e84263d55307 195 section .mdns.data*,
AnnaBridge 167:e84263d55307 196 block FPB_REMAP
AnnaBridge 167:e84263d55307 197 };
AnnaBridge 167:e84263d55307 198 define block SDRBSS with fixed order{
AnnaBridge 167:e84263d55307 199 section .sdram.bss*
AnnaBridge 167:e84263d55307 200 };
AnnaBridge 167:e84263d55307 201
AnnaBridge 167:e84263d55307 202 place at start of SDRAM_RAM_region {
AnnaBridge 167:e84263d55307 203 block SDRAM,
AnnaBridge 167:e84263d55307 204 block SDRBSS,
AnnaBridge 167:e84263d55307 205 //block IMAGE1_DBG
AnnaBridge 167:e84263d55307 206 };
AnnaBridge 167:e84263d55307 207
AnnaBridge 167:e84263d55307 208
AnnaBridge 167:e84263d55307 209 /* TCM placement */
AnnaBridge 167:e84263d55307 210 define overlay TCM_overlay {
AnnaBridge 167:e84263d55307 211 section .tcm.heap,
AnnaBridge 167:e84263d55307 212 section .bss object lwip_mem.o,
AnnaBridge 167:e84263d55307 213 section .bss object lwip_memp.o,
AnnaBridge 167:e84263d55307 214 block .heap,
AnnaBridge 167:e84263d55307 215 block .stack_dummy
AnnaBridge 167:e84263d55307 216 };
AnnaBridge 167:e84263d55307 217 /* dummy code placement */
AnnaBridge 167:e84263d55307 218 define overlay TCM_overlay { block IMAGE1_DBG };
AnnaBridge 167:e84263d55307 219 place at start of TCM_region { overlay TCM_overlay };
AnnaBridge 167:e84263d55307 220 place at end of TCM_region { block CSTACK};
AnnaBridge 167:e84263d55307 221
AnnaBridge 167:e84263d55307 222 define exported symbol __rom_bss_start__ = 0x10000300; // use in rom
AnnaBridge 167:e84263d55307 223 define exported symbol __rom_bss_end__ = 0x10000bc8; // use in rom
AnnaBridge 167:e84263d55307 224 define exported symbol __ram_start_table_start__= 0x10000bc8; // use in rom
AnnaBridge 167:e84263d55307 225 define exported symbol __image1_validate_code__= 0x10000bdc; // needed by ram code
AnnaBridge 167:e84263d55307 226 define exported symbol _rtl_impure_ptr = 0x10001c60; // for standard library
AnnaBridge 167:e84263d55307 227
AnnaBridge 167:e84263d55307 228 define exported symbol __sdio_rom_bss_start__ = 0x1006D000;
AnnaBridge 167:e84263d55307 229 define exported symbol __sdio_rom_bss_end__ = 0x1006fa10;