mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

Committer:
AnnaBridge
Date:
Fri May 26 12:39:01 2017 +0100
Revision:
165:e614a9f1c9e2
Parent:
154:37f96f9d4de2
Child:
187:0387e8f68319
This updates the lib to the mbed lib v 143

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f1xx_hal_flash_ex.c
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
AnnaBridge 165:e614a9f1c9e2 5 * @version V1.1.0
AnnaBridge 165:e614a9f1c9e2 6 * @date 14-April-2017
<> 144:ef7eb2e8f9f7 7 * @brief Extended FLASH HAL module driver.
<> 144:ef7eb2e8f9f7 8 *
<> 144:ef7eb2e8f9f7 9 * This file provides firmware functions to manage the following
<> 144:ef7eb2e8f9f7 10 * functionalities of the FLASH peripheral:
<> 144:ef7eb2e8f9f7 11 * + Extended Initialization/de-initialization functions
<> 144:ef7eb2e8f9f7 12 * + Extended I/O operation functions
<> 144:ef7eb2e8f9f7 13 * + Extended Peripheral Control functions
<> 144:ef7eb2e8f9f7 14 *
<> 144:ef7eb2e8f9f7 15 @verbatim
<> 144:ef7eb2e8f9f7 16 ==============================================================================
<> 144:ef7eb2e8f9f7 17 ##### Flash peripheral extended features #####
<> 144:ef7eb2e8f9f7 18 ==============================================================================
<> 144:ef7eb2e8f9f7 19
<> 144:ef7eb2e8f9f7 20 ##### How to use this driver #####
<> 144:ef7eb2e8f9f7 21 ==============================================================================
<> 144:ef7eb2e8f9f7 22 [..] This driver provides functions to configure and program the FLASH memory
<> 144:ef7eb2e8f9f7 23 of all STM32F1xxx devices. It includes
<> 144:ef7eb2e8f9f7 24
<> 144:ef7eb2e8f9f7 25 (++) Set/Reset the write protection
<> 144:ef7eb2e8f9f7 26 (++) Program the user Option Bytes
<> 144:ef7eb2e8f9f7 27 (++) Get the Read protection Level
<> 144:ef7eb2e8f9f7 28
<> 144:ef7eb2e8f9f7 29 @endverbatim
<> 144:ef7eb2e8f9f7 30 ******************************************************************************
<> 144:ef7eb2e8f9f7 31 * @attention
<> 144:ef7eb2e8f9f7 32 *
<> 144:ef7eb2e8f9f7 33 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 34 *
<> 144:ef7eb2e8f9f7 35 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 36 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 37 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 38 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 39 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 40 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 41 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 42 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 43 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 44 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 45 *
<> 144:ef7eb2e8f9f7 46 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 47 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 48 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 49 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 50 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 51 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 52 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 53 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 54 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 55 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 56 *
<> 144:ef7eb2e8f9f7 57 ******************************************************************************
<> 144:ef7eb2e8f9f7 58 */
<> 144:ef7eb2e8f9f7 59
<> 144:ef7eb2e8f9f7 60 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 61 #include "stm32f1xx_hal.h"
<> 144:ef7eb2e8f9f7 62
<> 144:ef7eb2e8f9f7 63 /** @addtogroup STM32F1xx_HAL_Driver
<> 144:ef7eb2e8f9f7 64 * @{
<> 144:ef7eb2e8f9f7 65 */
<> 144:ef7eb2e8f9f7 66 #ifdef HAL_FLASH_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 67
<> 144:ef7eb2e8f9f7 68 /** @addtogroup FLASH
<> 144:ef7eb2e8f9f7 69 * @{
<> 144:ef7eb2e8f9f7 70 */
<> 144:ef7eb2e8f9f7 71 /** @addtogroup FLASH_Private_Variables
<> 144:ef7eb2e8f9f7 72 * @{
<> 144:ef7eb2e8f9f7 73 */
<> 144:ef7eb2e8f9f7 74 /* Variables used for Erase pages under interruption*/
<> 144:ef7eb2e8f9f7 75 extern FLASH_ProcessTypeDef pFlash;
<> 144:ef7eb2e8f9f7 76 /**
<> 144:ef7eb2e8f9f7 77 * @}
<> 144:ef7eb2e8f9f7 78 */
<> 144:ef7eb2e8f9f7 79
<> 144:ef7eb2e8f9f7 80 /**
<> 144:ef7eb2e8f9f7 81 * @}
<> 144:ef7eb2e8f9f7 82 */
<> 144:ef7eb2e8f9f7 83
<> 144:ef7eb2e8f9f7 84 /** @defgroup FLASHEx FLASHEx
<> 144:ef7eb2e8f9f7 85 * @brief FLASH HAL Extension module driver
<> 144:ef7eb2e8f9f7 86 * @{
<> 144:ef7eb2e8f9f7 87 */
<> 144:ef7eb2e8f9f7 88
<> 144:ef7eb2e8f9f7 89 /* Private typedef -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 90 /* Private define ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 91 /** @defgroup FLASHEx_Private_Constants FLASHEx Private Constants
<> 144:ef7eb2e8f9f7 92 * @{
<> 144:ef7eb2e8f9f7 93 */
AnnaBridge 165:e614a9f1c9e2 94 #define FLASH_POSITION_IWDGSW_BIT FLASH_OBR_IWDG_SW_Pos
AnnaBridge 165:e614a9f1c9e2 95 #define FLASH_POSITION_OB_USERDATA0_BIT FLASH_OBR_DATA0_Pos
AnnaBridge 165:e614a9f1c9e2 96 #define FLASH_POSITION_OB_USERDATA1_BIT FLASH_OBR_DATA1_Pos
<> 144:ef7eb2e8f9f7 97 /**
<> 144:ef7eb2e8f9f7 98 * @}
<> 144:ef7eb2e8f9f7 99 */
<> 144:ef7eb2e8f9f7 100
<> 144:ef7eb2e8f9f7 101 /* Private macro -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 102 /** @defgroup FLASHEx_Private_Macros FLASHEx Private Macros
<> 144:ef7eb2e8f9f7 103 * @{
<> 144:ef7eb2e8f9f7 104 */
<> 144:ef7eb2e8f9f7 105 /**
<> 144:ef7eb2e8f9f7 106 * @}
<> 144:ef7eb2e8f9f7 107 */
<> 144:ef7eb2e8f9f7 108
<> 144:ef7eb2e8f9f7 109 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 110 /* Private function prototypes -----------------------------------------------*/
<> 144:ef7eb2e8f9f7 111 /** @defgroup FLASHEx_Private_Functions FLASHEx Private Functions
<> 144:ef7eb2e8f9f7 112 * @{
<> 144:ef7eb2e8f9f7 113 */
<> 144:ef7eb2e8f9f7 114 /* Erase operations */
<> 144:ef7eb2e8f9f7 115 static void FLASH_MassErase(uint32_t Banks);
AnnaBridge 165:e614a9f1c9e2 116 void FLASH_PageErase(uint32_t PageAddress);
<> 144:ef7eb2e8f9f7 117
<> 144:ef7eb2e8f9f7 118 /* Option bytes control */
<> 144:ef7eb2e8f9f7 119 static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WriteProtectPage);
<> 144:ef7eb2e8f9f7 120 static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WriteProtectPage);
<> 144:ef7eb2e8f9f7 121 static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t ReadProtectLevel);
<> 144:ef7eb2e8f9f7 122 static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t UserConfig);
<> 144:ef7eb2e8f9f7 123 static HAL_StatusTypeDef FLASH_OB_ProgramData(uint32_t Address, uint8_t Data);
<> 144:ef7eb2e8f9f7 124 static uint32_t FLASH_OB_GetWRP(void);
<> 144:ef7eb2e8f9f7 125 static uint32_t FLASH_OB_GetRDP(void);
<> 144:ef7eb2e8f9f7 126 static uint8_t FLASH_OB_GetUser(void);
<> 144:ef7eb2e8f9f7 127
<> 144:ef7eb2e8f9f7 128 /**
<> 144:ef7eb2e8f9f7 129 * @}
<> 144:ef7eb2e8f9f7 130 */
<> 144:ef7eb2e8f9f7 131
<> 144:ef7eb2e8f9f7 132 /* Exported functions ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 133 /** @defgroup FLASHEx_Exported_Functions FLASHEx Exported Functions
<> 144:ef7eb2e8f9f7 134 * @{
<> 144:ef7eb2e8f9f7 135 */
<> 144:ef7eb2e8f9f7 136
<> 144:ef7eb2e8f9f7 137 /** @defgroup FLASHEx_Exported_Functions_Group1 FLASHEx Memory Erasing functions
<> 144:ef7eb2e8f9f7 138 * @brief FLASH Memory Erasing functions
<> 144:ef7eb2e8f9f7 139 *
<> 144:ef7eb2e8f9f7 140 @verbatim
<> 144:ef7eb2e8f9f7 141 ==============================================================================
<> 144:ef7eb2e8f9f7 142 ##### FLASH Erasing Programming functions #####
<> 144:ef7eb2e8f9f7 143 ==============================================================================
<> 144:ef7eb2e8f9f7 144
<> 144:ef7eb2e8f9f7 145 [..] The FLASH Memory Erasing functions, includes the following functions:
<> 144:ef7eb2e8f9f7 146 (+) @ref HAL_FLASHEx_Erase: return only when erase has been done
<> 144:ef7eb2e8f9f7 147 (+) @ref HAL_FLASHEx_Erase_IT: end of erase is done when @ref HAL_FLASH_EndOfOperationCallback
<> 144:ef7eb2e8f9f7 148 is called with parameter 0xFFFFFFFF
<> 144:ef7eb2e8f9f7 149
<> 144:ef7eb2e8f9f7 150 [..] Any operation of erase should follow these steps:
<> 144:ef7eb2e8f9f7 151 (#) Call the @ref HAL_FLASH_Unlock() function to enable the flash control register and
<> 144:ef7eb2e8f9f7 152 program memory access.
<> 144:ef7eb2e8f9f7 153 (#) Call the desired function to erase page.
<> 144:ef7eb2e8f9f7 154 (#) Call the @ref HAL_FLASH_Lock() to disable the flash program memory access
<> 144:ef7eb2e8f9f7 155 (recommended to protect the FLASH memory against possible unwanted operation).
<> 144:ef7eb2e8f9f7 156
<> 144:ef7eb2e8f9f7 157 @endverbatim
<> 144:ef7eb2e8f9f7 158 * @{
<> 144:ef7eb2e8f9f7 159 */
<> 144:ef7eb2e8f9f7 160
<> 144:ef7eb2e8f9f7 161
<> 144:ef7eb2e8f9f7 162 /**
<> 144:ef7eb2e8f9f7 163 * @brief Perform a mass erase or erase the specified FLASH memory pages
<> 144:ef7eb2e8f9f7 164 * @note To correctly run this function, the @ref HAL_FLASH_Unlock() function
<> 144:ef7eb2e8f9f7 165 * must be called before.
<> 144:ef7eb2e8f9f7 166 * Call the @ref HAL_FLASH_Lock() to disable the flash memory access
<> 144:ef7eb2e8f9f7 167 * (recommended to protect the FLASH memory against possible unwanted operation)
<> 144:ef7eb2e8f9f7 168 * @param[in] pEraseInit pointer to an FLASH_EraseInitTypeDef structure that
<> 144:ef7eb2e8f9f7 169 * contains the configuration information for the erasing.
<> 144:ef7eb2e8f9f7 170 *
<> 144:ef7eb2e8f9f7 171 * @param[out] PageError pointer to variable that
<> 144:ef7eb2e8f9f7 172 * contains the configuration information on faulty page in case of error
<> 144:ef7eb2e8f9f7 173 * (0xFFFFFFFF means that all the pages have been correctly erased)
<> 144:ef7eb2e8f9f7 174 *
<> 144:ef7eb2e8f9f7 175 * @retval HAL_StatusTypeDef HAL Status
<> 144:ef7eb2e8f9f7 176 */
<> 144:ef7eb2e8f9f7 177 HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError)
<> 144:ef7eb2e8f9f7 178 {
<> 144:ef7eb2e8f9f7 179 HAL_StatusTypeDef status = HAL_ERROR;
AnnaBridge 165:e614a9f1c9e2 180 uint32_t address = 0U;
<> 144:ef7eb2e8f9f7 181
<> 144:ef7eb2e8f9f7 182 /* Process Locked */
<> 144:ef7eb2e8f9f7 183 __HAL_LOCK(&pFlash);
<> 144:ef7eb2e8f9f7 184
<> 144:ef7eb2e8f9f7 185 /* Check the parameters */
<> 144:ef7eb2e8f9f7 186 assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
<> 144:ef7eb2e8f9f7 187
<> 144:ef7eb2e8f9f7 188 if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
<> 144:ef7eb2e8f9f7 189 {
<> 144:ef7eb2e8f9f7 190 #if defined(FLASH_BANK2_END)
<> 144:ef7eb2e8f9f7 191 if (pEraseInit->Banks == FLASH_BANK_BOTH)
<> 144:ef7eb2e8f9f7 192 {
<> 144:ef7eb2e8f9f7 193 /* Mass Erase requested for Bank1 and Bank2 */
<> 144:ef7eb2e8f9f7 194 /* Wait for last operation to be completed */
<> 144:ef7eb2e8f9f7 195 if ((FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) && \
<> 144:ef7eb2e8f9f7 196 (FLASH_WaitForLastOperationBank2((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK))
<> 144:ef7eb2e8f9f7 197 {
<> 144:ef7eb2e8f9f7 198 /*Mass erase to be done*/
<> 144:ef7eb2e8f9f7 199 FLASH_MassErase(FLASH_BANK_BOTH);
<> 144:ef7eb2e8f9f7 200
<> 144:ef7eb2e8f9f7 201 /* Wait for last operation to be completed */
<> 144:ef7eb2e8f9f7 202 if ((FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK) && \
<> 144:ef7eb2e8f9f7 203 (FLASH_WaitForLastOperationBank2((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK))
<> 144:ef7eb2e8f9f7 204 {
<> 144:ef7eb2e8f9f7 205 status = HAL_OK;
<> 144:ef7eb2e8f9f7 206 }
<> 144:ef7eb2e8f9f7 207
<> 144:ef7eb2e8f9f7 208 /* If the erase operation is completed, disable the MER Bit */
<> 144:ef7eb2e8f9f7 209 CLEAR_BIT(FLASH->CR, FLASH_CR_MER);
<> 144:ef7eb2e8f9f7 210 CLEAR_BIT(FLASH->CR2, FLASH_CR2_MER);
<> 144:ef7eb2e8f9f7 211 }
<> 144:ef7eb2e8f9f7 212 }
<> 144:ef7eb2e8f9f7 213 else if (pEraseInit->Banks == FLASH_BANK_2)
<> 144:ef7eb2e8f9f7 214 {
<> 144:ef7eb2e8f9f7 215 /* Mass Erase requested for Bank2 */
<> 144:ef7eb2e8f9f7 216 /* Wait for last operation to be completed */
<> 144:ef7eb2e8f9f7 217 if (FLASH_WaitForLastOperationBank2((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
<> 144:ef7eb2e8f9f7 218 {
<> 144:ef7eb2e8f9f7 219 /*Mass erase to be done*/
<> 144:ef7eb2e8f9f7 220 FLASH_MassErase(FLASH_BANK_2);
<> 144:ef7eb2e8f9f7 221
<> 144:ef7eb2e8f9f7 222 /* Wait for last operation to be completed */
<> 144:ef7eb2e8f9f7 223 status = FLASH_WaitForLastOperationBank2((uint32_t)FLASH_TIMEOUT_VALUE);
<> 144:ef7eb2e8f9f7 224
<> 144:ef7eb2e8f9f7 225 /* If the erase operation is completed, disable the MER Bit */
<> 144:ef7eb2e8f9f7 226 CLEAR_BIT(FLASH->CR2, FLASH_CR2_MER);
<> 144:ef7eb2e8f9f7 227 }
<> 144:ef7eb2e8f9f7 228 }
<> 144:ef7eb2e8f9f7 229 else
<> 144:ef7eb2e8f9f7 230 #endif /* FLASH_BANK2_END */
<> 144:ef7eb2e8f9f7 231 {
<> 144:ef7eb2e8f9f7 232 /* Mass Erase requested for Bank1 */
<> 144:ef7eb2e8f9f7 233 /* Wait for last operation to be completed */
<> 144:ef7eb2e8f9f7 234 if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
<> 144:ef7eb2e8f9f7 235 {
<> 144:ef7eb2e8f9f7 236 /*Mass erase to be done*/
<> 144:ef7eb2e8f9f7 237 FLASH_MassErase(FLASH_BANK_1);
<> 144:ef7eb2e8f9f7 238
<> 144:ef7eb2e8f9f7 239 /* Wait for last operation to be completed */
<> 144:ef7eb2e8f9f7 240 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
<> 144:ef7eb2e8f9f7 241
<> 144:ef7eb2e8f9f7 242 /* If the erase operation is completed, disable the MER Bit */
<> 144:ef7eb2e8f9f7 243 CLEAR_BIT(FLASH->CR, FLASH_CR_MER);
<> 144:ef7eb2e8f9f7 244 }
<> 144:ef7eb2e8f9f7 245 }
<> 144:ef7eb2e8f9f7 246 }
<> 144:ef7eb2e8f9f7 247 else
<> 144:ef7eb2e8f9f7 248 {
<> 144:ef7eb2e8f9f7 249 /* Page Erase is requested */
<> 144:ef7eb2e8f9f7 250 /* Check the parameters */
<> 144:ef7eb2e8f9f7 251 assert_param(IS_FLASH_PROGRAM_ADDRESS(pEraseInit->PageAddress));
<> 144:ef7eb2e8f9f7 252 assert_param(IS_FLASH_NB_PAGES(pEraseInit->PageAddress, pEraseInit->NbPages));
<> 144:ef7eb2e8f9f7 253
<> 144:ef7eb2e8f9f7 254 #if defined(FLASH_BANK2_END)
<> 144:ef7eb2e8f9f7 255 /* Page Erase requested on address located on bank2 */
<> 144:ef7eb2e8f9f7 256 if(pEraseInit->PageAddress > FLASH_BANK1_END)
<> 144:ef7eb2e8f9f7 257 {
<> 144:ef7eb2e8f9f7 258 /* Wait for last operation to be completed */
<> 144:ef7eb2e8f9f7 259 if (FLASH_WaitForLastOperationBank2((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
<> 144:ef7eb2e8f9f7 260 {
<> 144:ef7eb2e8f9f7 261 /*Initialization of PageError variable*/
AnnaBridge 165:e614a9f1c9e2 262 *PageError = 0xFFFFFFFFU;
<> 144:ef7eb2e8f9f7 263
<> 144:ef7eb2e8f9f7 264 /* Erase by page by page to be done*/
<> 144:ef7eb2e8f9f7 265 for(address = pEraseInit->PageAddress;
<> 144:ef7eb2e8f9f7 266 address < (pEraseInit->PageAddress + (pEraseInit->NbPages)*FLASH_PAGE_SIZE);
<> 144:ef7eb2e8f9f7 267 address += FLASH_PAGE_SIZE)
<> 144:ef7eb2e8f9f7 268 {
<> 144:ef7eb2e8f9f7 269 FLASH_PageErase(address);
<> 144:ef7eb2e8f9f7 270
<> 144:ef7eb2e8f9f7 271 /* Wait for last operation to be completed */
<> 144:ef7eb2e8f9f7 272 status = FLASH_WaitForLastOperationBank2((uint32_t)FLASH_TIMEOUT_VALUE);
<> 144:ef7eb2e8f9f7 273
<> 144:ef7eb2e8f9f7 274 /* If the erase operation is completed, disable the PER Bit */
<> 144:ef7eb2e8f9f7 275 CLEAR_BIT(FLASH->CR2, FLASH_CR2_PER);
<> 144:ef7eb2e8f9f7 276
<> 144:ef7eb2e8f9f7 277 if (status != HAL_OK)
<> 144:ef7eb2e8f9f7 278 {
<> 144:ef7eb2e8f9f7 279 /* In case of error, stop erase procedure and return the faulty address */
<> 144:ef7eb2e8f9f7 280 *PageError = address;
<> 144:ef7eb2e8f9f7 281 break;
<> 144:ef7eb2e8f9f7 282 }
<> 144:ef7eb2e8f9f7 283 }
<> 144:ef7eb2e8f9f7 284 }
<> 144:ef7eb2e8f9f7 285 }
<> 144:ef7eb2e8f9f7 286 else
<> 144:ef7eb2e8f9f7 287 #endif /* FLASH_BANK2_END */
<> 144:ef7eb2e8f9f7 288 {
<> 144:ef7eb2e8f9f7 289 /* Page Erase requested on address located on bank1 */
<> 144:ef7eb2e8f9f7 290 /* Wait for last operation to be completed */
<> 144:ef7eb2e8f9f7 291 if (FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE) == HAL_OK)
<> 144:ef7eb2e8f9f7 292 {
<> 144:ef7eb2e8f9f7 293 /*Initialization of PageError variable*/
AnnaBridge 165:e614a9f1c9e2 294 *PageError = 0xFFFFFFFFU;
<> 144:ef7eb2e8f9f7 295
<> 144:ef7eb2e8f9f7 296 /* Erase page by page to be done*/
<> 144:ef7eb2e8f9f7 297 for(address = pEraseInit->PageAddress;
<> 144:ef7eb2e8f9f7 298 address < ((pEraseInit->NbPages * FLASH_PAGE_SIZE) + pEraseInit->PageAddress);
<> 144:ef7eb2e8f9f7 299 address += FLASH_PAGE_SIZE)
<> 144:ef7eb2e8f9f7 300 {
<> 144:ef7eb2e8f9f7 301 FLASH_PageErase(address);
<> 144:ef7eb2e8f9f7 302
<> 144:ef7eb2e8f9f7 303 /* Wait for last operation to be completed */
<> 144:ef7eb2e8f9f7 304 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
<> 144:ef7eb2e8f9f7 305
<> 144:ef7eb2e8f9f7 306 /* If the erase operation is completed, disable the PER Bit */
<> 144:ef7eb2e8f9f7 307 CLEAR_BIT(FLASH->CR, FLASH_CR_PER);
<> 144:ef7eb2e8f9f7 308
<> 144:ef7eb2e8f9f7 309 if (status != HAL_OK)
<> 144:ef7eb2e8f9f7 310 {
<> 144:ef7eb2e8f9f7 311 /* In case of error, stop erase procedure and return the faulty address */
<> 144:ef7eb2e8f9f7 312 *PageError = address;
<> 144:ef7eb2e8f9f7 313 break;
<> 144:ef7eb2e8f9f7 314 }
<> 144:ef7eb2e8f9f7 315 }
<> 144:ef7eb2e8f9f7 316 }
<> 144:ef7eb2e8f9f7 317 }
<> 144:ef7eb2e8f9f7 318 }
<> 144:ef7eb2e8f9f7 319
<> 144:ef7eb2e8f9f7 320 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 321 __HAL_UNLOCK(&pFlash);
<> 144:ef7eb2e8f9f7 322
<> 144:ef7eb2e8f9f7 323 return status;
<> 144:ef7eb2e8f9f7 324 }
<> 144:ef7eb2e8f9f7 325
<> 144:ef7eb2e8f9f7 326 /**
<> 144:ef7eb2e8f9f7 327 * @brief Perform a mass erase or erase the specified FLASH memory pages with interrupt enabled
<> 144:ef7eb2e8f9f7 328 * @note To correctly run this function, the @ref HAL_FLASH_Unlock() function
<> 144:ef7eb2e8f9f7 329 * must be called before.
<> 144:ef7eb2e8f9f7 330 * Call the @ref HAL_FLASH_Lock() to disable the flash memory access
<> 144:ef7eb2e8f9f7 331 * (recommended to protect the FLASH memory against possible unwanted operation)
<> 144:ef7eb2e8f9f7 332 * @param pEraseInit pointer to an FLASH_EraseInitTypeDef structure that
<> 144:ef7eb2e8f9f7 333 * contains the configuration information for the erasing.
<> 144:ef7eb2e8f9f7 334 *
<> 144:ef7eb2e8f9f7 335 * @retval HAL_StatusTypeDef HAL Status
<> 144:ef7eb2e8f9f7 336 */
<> 144:ef7eb2e8f9f7 337 HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit)
<> 144:ef7eb2e8f9f7 338 {
<> 144:ef7eb2e8f9f7 339 HAL_StatusTypeDef status = HAL_OK;
<> 144:ef7eb2e8f9f7 340
<> 144:ef7eb2e8f9f7 341 /* Process Locked */
<> 144:ef7eb2e8f9f7 342 __HAL_LOCK(&pFlash);
<> 144:ef7eb2e8f9f7 343
<> 144:ef7eb2e8f9f7 344 /* If procedure already ongoing, reject the next one */
<> 144:ef7eb2e8f9f7 345 if (pFlash.ProcedureOnGoing != FLASH_PROC_NONE)
<> 144:ef7eb2e8f9f7 346 {
<> 144:ef7eb2e8f9f7 347 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 348 }
<> 144:ef7eb2e8f9f7 349
<> 144:ef7eb2e8f9f7 350 /* Check the parameters */
<> 144:ef7eb2e8f9f7 351 assert_param(IS_FLASH_TYPEERASE(pEraseInit->TypeErase));
<> 144:ef7eb2e8f9f7 352
<> 144:ef7eb2e8f9f7 353 /* Enable End of FLASH Operation and Error source interrupts */
<> 144:ef7eb2e8f9f7 354 __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP | FLASH_IT_ERR);
<> 144:ef7eb2e8f9f7 355
<> 144:ef7eb2e8f9f7 356 #if defined(FLASH_BANK2_END)
<> 144:ef7eb2e8f9f7 357 /* Enable End of FLASH Operation and Error source interrupts */
<> 144:ef7eb2e8f9f7 358 __HAL_FLASH_ENABLE_IT(FLASH_IT_EOP_BANK2 | FLASH_IT_ERR_BANK2);
<> 144:ef7eb2e8f9f7 359
<> 144:ef7eb2e8f9f7 360 #endif
<> 144:ef7eb2e8f9f7 361 if (pEraseInit->TypeErase == FLASH_TYPEERASE_MASSERASE)
<> 144:ef7eb2e8f9f7 362 {
<> 144:ef7eb2e8f9f7 363 /*Mass erase to be done*/
<> 144:ef7eb2e8f9f7 364 pFlash.ProcedureOnGoing = FLASH_PROC_MASSERASE;
<> 144:ef7eb2e8f9f7 365 FLASH_MassErase(pEraseInit->Banks);
<> 144:ef7eb2e8f9f7 366 }
<> 144:ef7eb2e8f9f7 367 else
<> 144:ef7eb2e8f9f7 368 {
<> 144:ef7eb2e8f9f7 369 /* Erase by page to be done*/
<> 144:ef7eb2e8f9f7 370
<> 144:ef7eb2e8f9f7 371 /* Check the parameters */
<> 144:ef7eb2e8f9f7 372 assert_param(IS_FLASH_PROGRAM_ADDRESS(pEraseInit->PageAddress));
<> 144:ef7eb2e8f9f7 373 assert_param(IS_FLASH_NB_PAGES(pEraseInit->PageAddress, pEraseInit->NbPages));
<> 144:ef7eb2e8f9f7 374
<> 144:ef7eb2e8f9f7 375 pFlash.ProcedureOnGoing = FLASH_PROC_PAGEERASE;
<> 144:ef7eb2e8f9f7 376 pFlash.DataRemaining = pEraseInit->NbPages;
<> 144:ef7eb2e8f9f7 377 pFlash.Address = pEraseInit->PageAddress;
<> 144:ef7eb2e8f9f7 378
<> 144:ef7eb2e8f9f7 379 /*Erase 1st page and wait for IT*/
<> 144:ef7eb2e8f9f7 380 FLASH_PageErase(pEraseInit->PageAddress);
<> 144:ef7eb2e8f9f7 381 }
<> 144:ef7eb2e8f9f7 382
<> 144:ef7eb2e8f9f7 383 return status;
<> 144:ef7eb2e8f9f7 384 }
<> 144:ef7eb2e8f9f7 385
<> 144:ef7eb2e8f9f7 386 /**
<> 144:ef7eb2e8f9f7 387 * @}
<> 144:ef7eb2e8f9f7 388 */
<> 144:ef7eb2e8f9f7 389
<> 144:ef7eb2e8f9f7 390 /** @defgroup FLASHEx_Exported_Functions_Group2 Option Bytes Programming functions
<> 144:ef7eb2e8f9f7 391 * @brief Option Bytes Programming functions
<> 144:ef7eb2e8f9f7 392 *
<> 144:ef7eb2e8f9f7 393 @verbatim
<> 144:ef7eb2e8f9f7 394 ==============================================================================
<> 144:ef7eb2e8f9f7 395 ##### Option Bytes Programming functions #####
<> 144:ef7eb2e8f9f7 396 ==============================================================================
<> 144:ef7eb2e8f9f7 397 [..]
<> 144:ef7eb2e8f9f7 398 This subsection provides a set of functions allowing to control the FLASH
<> 144:ef7eb2e8f9f7 399 option bytes operations.
<> 144:ef7eb2e8f9f7 400
<> 144:ef7eb2e8f9f7 401 @endverbatim
<> 144:ef7eb2e8f9f7 402 * @{
<> 144:ef7eb2e8f9f7 403 */
<> 144:ef7eb2e8f9f7 404
<> 144:ef7eb2e8f9f7 405 /**
<> 144:ef7eb2e8f9f7 406 * @brief Erases the FLASH option bytes.
<> 144:ef7eb2e8f9f7 407 * @note This functions erases all option bytes except the Read protection (RDP).
<> 144:ef7eb2e8f9f7 408 * The function @ref HAL_FLASH_Unlock() should be called before to unlock the FLASH interface
<> 144:ef7eb2e8f9f7 409 * The function @ref HAL_FLASH_OB_Unlock() should be called before to unlock the options bytes
<> 144:ef7eb2e8f9f7 410 * The function @ref HAL_FLASH_OB_Launch() should be called after to force the reload of the options bytes
<> 144:ef7eb2e8f9f7 411 * (system reset will occur)
<> 144:ef7eb2e8f9f7 412 * @retval HAL status
<> 144:ef7eb2e8f9f7 413 */
<> 144:ef7eb2e8f9f7 414
<> 144:ef7eb2e8f9f7 415 HAL_StatusTypeDef HAL_FLASHEx_OBErase(void)
<> 144:ef7eb2e8f9f7 416 {
<> 144:ef7eb2e8f9f7 417 uint8_t rdptmp = OB_RDP_LEVEL_0;
<> 144:ef7eb2e8f9f7 418 HAL_StatusTypeDef status = HAL_ERROR;
<> 144:ef7eb2e8f9f7 419
<> 144:ef7eb2e8f9f7 420 /* Get the actual read protection Option Byte value */
<> 144:ef7eb2e8f9f7 421 rdptmp = FLASH_OB_GetRDP();
<> 144:ef7eb2e8f9f7 422
<> 144:ef7eb2e8f9f7 423 /* Wait for last operation to be completed */
<> 144:ef7eb2e8f9f7 424 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
<> 144:ef7eb2e8f9f7 425
<> 144:ef7eb2e8f9f7 426 if(status == HAL_OK)
<> 144:ef7eb2e8f9f7 427 {
<> 144:ef7eb2e8f9f7 428 /* Clean the error context */
<> 144:ef7eb2e8f9f7 429 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
<> 144:ef7eb2e8f9f7 430
<> 144:ef7eb2e8f9f7 431 /* If the previous operation is completed, proceed to erase the option bytes */
<> 144:ef7eb2e8f9f7 432 SET_BIT(FLASH->CR, FLASH_CR_OPTER);
<> 144:ef7eb2e8f9f7 433 SET_BIT(FLASH->CR, FLASH_CR_STRT);
<> 144:ef7eb2e8f9f7 434
<> 144:ef7eb2e8f9f7 435 /* Wait for last operation to be completed */
<> 144:ef7eb2e8f9f7 436 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
<> 144:ef7eb2e8f9f7 437
<> 144:ef7eb2e8f9f7 438 /* If the erase operation is completed, disable the OPTER Bit */
<> 144:ef7eb2e8f9f7 439 CLEAR_BIT(FLASH->CR, FLASH_CR_OPTER);
<> 144:ef7eb2e8f9f7 440
<> 144:ef7eb2e8f9f7 441 if(status == HAL_OK)
<> 144:ef7eb2e8f9f7 442 {
<> 144:ef7eb2e8f9f7 443 /* Restore the last read protection Option Byte value */
<> 144:ef7eb2e8f9f7 444 status = FLASH_OB_RDP_LevelConfig(rdptmp);
<> 144:ef7eb2e8f9f7 445 }
<> 144:ef7eb2e8f9f7 446 }
<> 144:ef7eb2e8f9f7 447
<> 144:ef7eb2e8f9f7 448 /* Return the erase status */
<> 144:ef7eb2e8f9f7 449 return status;
<> 144:ef7eb2e8f9f7 450 }
<> 144:ef7eb2e8f9f7 451
<> 144:ef7eb2e8f9f7 452 /**
<> 144:ef7eb2e8f9f7 453 * @brief Program option bytes
<> 144:ef7eb2e8f9f7 454 * @note The function @ref HAL_FLASH_Unlock() should be called before to unlock the FLASH interface
<> 144:ef7eb2e8f9f7 455 * The function @ref HAL_FLASH_OB_Unlock() should be called before to unlock the options bytes
<> 144:ef7eb2e8f9f7 456 * The function @ref HAL_FLASH_OB_Launch() should be called after to force the reload of the options bytes
<> 144:ef7eb2e8f9f7 457 * (system reset will occur)
<> 144:ef7eb2e8f9f7 458 *
<> 144:ef7eb2e8f9f7 459 * @param pOBInit pointer to an FLASH_OBInitStruct structure that
<> 144:ef7eb2e8f9f7 460 * contains the configuration information for the programming.
<> 144:ef7eb2e8f9f7 461 *
<> 144:ef7eb2e8f9f7 462 * @retval HAL_StatusTypeDef HAL Status
<> 144:ef7eb2e8f9f7 463 */
<> 144:ef7eb2e8f9f7 464 HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit)
<> 144:ef7eb2e8f9f7 465 {
<> 144:ef7eb2e8f9f7 466 HAL_StatusTypeDef status = HAL_ERROR;
<> 144:ef7eb2e8f9f7 467
<> 144:ef7eb2e8f9f7 468 /* Process Locked */
<> 144:ef7eb2e8f9f7 469 __HAL_LOCK(&pFlash);
<> 144:ef7eb2e8f9f7 470
<> 144:ef7eb2e8f9f7 471 /* Check the parameters */
<> 144:ef7eb2e8f9f7 472 assert_param(IS_OPTIONBYTE(pOBInit->OptionType));
<> 144:ef7eb2e8f9f7 473
<> 144:ef7eb2e8f9f7 474 /* Write protection configuration */
<> 144:ef7eb2e8f9f7 475 if((pOBInit->OptionType & OPTIONBYTE_WRP) == OPTIONBYTE_WRP)
<> 144:ef7eb2e8f9f7 476 {
<> 144:ef7eb2e8f9f7 477 assert_param(IS_WRPSTATE(pOBInit->WRPState));
<> 144:ef7eb2e8f9f7 478 if (pOBInit->WRPState == OB_WRPSTATE_ENABLE)
<> 144:ef7eb2e8f9f7 479 {
<> 144:ef7eb2e8f9f7 480 /* Enable of Write protection on the selected page */
<> 144:ef7eb2e8f9f7 481 status = FLASH_OB_EnableWRP(pOBInit->WRPPage);
<> 144:ef7eb2e8f9f7 482 }
<> 144:ef7eb2e8f9f7 483 else
<> 144:ef7eb2e8f9f7 484 {
<> 144:ef7eb2e8f9f7 485 /* Disable of Write protection on the selected page */
<> 144:ef7eb2e8f9f7 486 status = FLASH_OB_DisableWRP(pOBInit->WRPPage);
<> 144:ef7eb2e8f9f7 487 }
<> 144:ef7eb2e8f9f7 488 if (status != HAL_OK)
<> 144:ef7eb2e8f9f7 489 {
<> 144:ef7eb2e8f9f7 490 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 491 __HAL_UNLOCK(&pFlash);
<> 144:ef7eb2e8f9f7 492 return status;
<> 144:ef7eb2e8f9f7 493 }
<> 144:ef7eb2e8f9f7 494 }
<> 144:ef7eb2e8f9f7 495
<> 144:ef7eb2e8f9f7 496 /* Read protection configuration */
<> 144:ef7eb2e8f9f7 497 if((pOBInit->OptionType & OPTIONBYTE_RDP) == OPTIONBYTE_RDP)
<> 144:ef7eb2e8f9f7 498 {
<> 144:ef7eb2e8f9f7 499 status = FLASH_OB_RDP_LevelConfig(pOBInit->RDPLevel);
<> 144:ef7eb2e8f9f7 500 if (status != HAL_OK)
<> 144:ef7eb2e8f9f7 501 {
<> 144:ef7eb2e8f9f7 502 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 503 __HAL_UNLOCK(&pFlash);
<> 144:ef7eb2e8f9f7 504 return status;
<> 144:ef7eb2e8f9f7 505 }
<> 144:ef7eb2e8f9f7 506 }
<> 144:ef7eb2e8f9f7 507
<> 144:ef7eb2e8f9f7 508 /* USER configuration */
<> 144:ef7eb2e8f9f7 509 if((pOBInit->OptionType & OPTIONBYTE_USER) == OPTIONBYTE_USER)
<> 144:ef7eb2e8f9f7 510 {
<> 144:ef7eb2e8f9f7 511 status = FLASH_OB_UserConfig(pOBInit->USERConfig);
<> 144:ef7eb2e8f9f7 512 if (status != HAL_OK)
<> 144:ef7eb2e8f9f7 513 {
<> 144:ef7eb2e8f9f7 514 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 515 __HAL_UNLOCK(&pFlash);
<> 144:ef7eb2e8f9f7 516 return status;
<> 144:ef7eb2e8f9f7 517 }
<> 144:ef7eb2e8f9f7 518 }
<> 144:ef7eb2e8f9f7 519
<> 144:ef7eb2e8f9f7 520 /* DATA configuration*/
<> 144:ef7eb2e8f9f7 521 if((pOBInit->OptionType & OPTIONBYTE_DATA) == OPTIONBYTE_DATA)
<> 144:ef7eb2e8f9f7 522 {
<> 144:ef7eb2e8f9f7 523 status = FLASH_OB_ProgramData(pOBInit->DATAAddress, pOBInit->DATAData);
<> 144:ef7eb2e8f9f7 524 if (status != HAL_OK)
<> 144:ef7eb2e8f9f7 525 {
<> 144:ef7eb2e8f9f7 526 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 527 __HAL_UNLOCK(&pFlash);
<> 144:ef7eb2e8f9f7 528 return status;
<> 144:ef7eb2e8f9f7 529 }
<> 144:ef7eb2e8f9f7 530 }
<> 144:ef7eb2e8f9f7 531
<> 144:ef7eb2e8f9f7 532 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 533 __HAL_UNLOCK(&pFlash);
<> 144:ef7eb2e8f9f7 534
<> 144:ef7eb2e8f9f7 535 return status;
<> 144:ef7eb2e8f9f7 536 }
<> 144:ef7eb2e8f9f7 537
<> 144:ef7eb2e8f9f7 538 /**
<> 144:ef7eb2e8f9f7 539 * @brief Get the Option byte configuration
<> 144:ef7eb2e8f9f7 540 * @param pOBInit pointer to an FLASH_OBInitStruct structure that
<> 144:ef7eb2e8f9f7 541 * contains the configuration information for the programming.
<> 144:ef7eb2e8f9f7 542 *
<> 144:ef7eb2e8f9f7 543 * @retval None
<> 144:ef7eb2e8f9f7 544 */
<> 144:ef7eb2e8f9f7 545 void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit)
<> 144:ef7eb2e8f9f7 546 {
<> 144:ef7eb2e8f9f7 547 pOBInit->OptionType = OPTIONBYTE_WRP | OPTIONBYTE_RDP | OPTIONBYTE_USER;
<> 144:ef7eb2e8f9f7 548
<> 144:ef7eb2e8f9f7 549 /*Get WRP*/
<> 144:ef7eb2e8f9f7 550 pOBInit->WRPPage = FLASH_OB_GetWRP();
<> 144:ef7eb2e8f9f7 551
<> 144:ef7eb2e8f9f7 552 /*Get RDP Level*/
<> 144:ef7eb2e8f9f7 553 pOBInit->RDPLevel = FLASH_OB_GetRDP();
<> 144:ef7eb2e8f9f7 554
<> 144:ef7eb2e8f9f7 555 /*Get USER*/
<> 144:ef7eb2e8f9f7 556 pOBInit->USERConfig = FLASH_OB_GetUser();
<> 144:ef7eb2e8f9f7 557 }
<> 144:ef7eb2e8f9f7 558
<> 144:ef7eb2e8f9f7 559 /**
<> 144:ef7eb2e8f9f7 560 * @brief Get the Option byte user data
<> 144:ef7eb2e8f9f7 561 * @param DATAAdress Address of the option byte DATA
<> 144:ef7eb2e8f9f7 562 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 563 * @arg @ref OB_DATA_ADDRESS_DATA0
<> 144:ef7eb2e8f9f7 564 * @arg @ref OB_DATA_ADDRESS_DATA1
<> 144:ef7eb2e8f9f7 565 * @retval Value programmed in USER data
<> 144:ef7eb2e8f9f7 566 */
<> 144:ef7eb2e8f9f7 567 uint32_t HAL_FLASHEx_OBGetUserData(uint32_t DATAAdress)
<> 144:ef7eb2e8f9f7 568 {
<> 144:ef7eb2e8f9f7 569 uint32_t value = 0;
<> 144:ef7eb2e8f9f7 570
<> 144:ef7eb2e8f9f7 571 if (DATAAdress == OB_DATA_ADDRESS_DATA0)
<> 144:ef7eb2e8f9f7 572 {
<> 144:ef7eb2e8f9f7 573 /* Get value programmed in OB USER Data0 */
<> 144:ef7eb2e8f9f7 574 value = READ_BIT(FLASH->OBR, FLASH_OBR_DATA0) >> FLASH_POSITION_OB_USERDATA0_BIT;
<> 144:ef7eb2e8f9f7 575 }
<> 144:ef7eb2e8f9f7 576 else
<> 144:ef7eb2e8f9f7 577 {
<> 144:ef7eb2e8f9f7 578 /* Get value programmed in OB USER Data1 */
<> 144:ef7eb2e8f9f7 579 value = READ_BIT(FLASH->OBR, FLASH_OBR_DATA1) >> FLASH_POSITION_OB_USERDATA1_BIT;
<> 144:ef7eb2e8f9f7 580 }
<> 144:ef7eb2e8f9f7 581
<> 144:ef7eb2e8f9f7 582 return value;
<> 144:ef7eb2e8f9f7 583 }
<> 144:ef7eb2e8f9f7 584
<> 144:ef7eb2e8f9f7 585 /**
<> 144:ef7eb2e8f9f7 586 * @}
<> 144:ef7eb2e8f9f7 587 */
<> 144:ef7eb2e8f9f7 588
<> 144:ef7eb2e8f9f7 589 /**
<> 144:ef7eb2e8f9f7 590 * @}
<> 144:ef7eb2e8f9f7 591 */
<> 144:ef7eb2e8f9f7 592
<> 144:ef7eb2e8f9f7 593 /** @addtogroup FLASHEx_Private_Functions
<> 144:ef7eb2e8f9f7 594 * @{
<> 144:ef7eb2e8f9f7 595 */
<> 144:ef7eb2e8f9f7 596
<> 144:ef7eb2e8f9f7 597 /**
<> 144:ef7eb2e8f9f7 598 * @brief Full erase of FLASH memory Bank
<> 144:ef7eb2e8f9f7 599 * @param Banks Banks to be erased
<> 144:ef7eb2e8f9f7 600 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 601 * @arg @ref FLASH_BANK_1 Bank1 to be erased
<> 144:ef7eb2e8f9f7 602 @if STM32F101xG
<> 144:ef7eb2e8f9f7 603 * @arg @ref FLASH_BANK_2 Bank2 to be erased
<> 144:ef7eb2e8f9f7 604 * @arg @ref FLASH_BANK_BOTH Bank1 and Bank2 to be erased
<> 144:ef7eb2e8f9f7 605 @endif
<> 144:ef7eb2e8f9f7 606 @if STM32F103xG
<> 144:ef7eb2e8f9f7 607 * @arg @ref FLASH_BANK_2 Bank2 to be erased
<> 144:ef7eb2e8f9f7 608 * @arg @ref FLASH_BANK_BOTH Bank1 and Bank2 to be erased
<> 144:ef7eb2e8f9f7 609 @endif
<> 144:ef7eb2e8f9f7 610 *
<> 144:ef7eb2e8f9f7 611 * @retval None
<> 144:ef7eb2e8f9f7 612 */
<> 144:ef7eb2e8f9f7 613 static void FLASH_MassErase(uint32_t Banks)
<> 144:ef7eb2e8f9f7 614 {
<> 144:ef7eb2e8f9f7 615 /* Check the parameters */
<> 144:ef7eb2e8f9f7 616 assert_param(IS_FLASH_BANK(Banks));
<> 144:ef7eb2e8f9f7 617
<> 144:ef7eb2e8f9f7 618 /* Clean the error context */
<> 144:ef7eb2e8f9f7 619 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
<> 144:ef7eb2e8f9f7 620
<> 144:ef7eb2e8f9f7 621 #if defined(FLASH_BANK2_END)
<> 144:ef7eb2e8f9f7 622 if(Banks == FLASH_BANK_BOTH)
<> 144:ef7eb2e8f9f7 623 {
<> 144:ef7eb2e8f9f7 624 /* bank1 & bank2 will be erased*/
<> 144:ef7eb2e8f9f7 625 SET_BIT(FLASH->CR, FLASH_CR_MER);
<> 144:ef7eb2e8f9f7 626 SET_BIT(FLASH->CR2, FLASH_CR2_MER);
<> 144:ef7eb2e8f9f7 627 SET_BIT(FLASH->CR, FLASH_CR_STRT);
<> 144:ef7eb2e8f9f7 628 SET_BIT(FLASH->CR2, FLASH_CR2_STRT);
<> 144:ef7eb2e8f9f7 629 }
<> 144:ef7eb2e8f9f7 630 else if(Banks == FLASH_BANK_2)
<> 144:ef7eb2e8f9f7 631 {
<> 144:ef7eb2e8f9f7 632 /*Only bank2 will be erased*/
<> 144:ef7eb2e8f9f7 633 SET_BIT(FLASH->CR2, FLASH_CR2_MER);
<> 144:ef7eb2e8f9f7 634 SET_BIT(FLASH->CR2, FLASH_CR2_STRT);
<> 144:ef7eb2e8f9f7 635 }
<> 144:ef7eb2e8f9f7 636 else
<> 144:ef7eb2e8f9f7 637 {
<> 144:ef7eb2e8f9f7 638 #endif /* FLASH_BANK2_END */
AnnaBridge 165:e614a9f1c9e2 639 #if !defined(FLASH_BANK2_END)
AnnaBridge 165:e614a9f1c9e2 640 /* Prevent unused argument(s) compilation warning */
AnnaBridge 165:e614a9f1c9e2 641 UNUSED(Banks);
AnnaBridge 165:e614a9f1c9e2 642 #endif /* FLASH_BANK2_END */
<> 144:ef7eb2e8f9f7 643 /* Only bank1 will be erased*/
<> 144:ef7eb2e8f9f7 644 SET_BIT(FLASH->CR, FLASH_CR_MER);
<> 144:ef7eb2e8f9f7 645 SET_BIT(FLASH->CR, FLASH_CR_STRT);
<> 144:ef7eb2e8f9f7 646 #if defined(FLASH_BANK2_END)
<> 144:ef7eb2e8f9f7 647 }
<> 144:ef7eb2e8f9f7 648 #endif /* FLASH_BANK2_END */
<> 144:ef7eb2e8f9f7 649 }
<> 144:ef7eb2e8f9f7 650
<> 144:ef7eb2e8f9f7 651 /**
<> 144:ef7eb2e8f9f7 652 * @brief Enable the write protection of the desired pages
<> 144:ef7eb2e8f9f7 653 * @note An option byte erase is done automatically in this function.
<> 144:ef7eb2e8f9f7 654 * @note When the memory read protection level is selected (RDP level = 1),
<> 144:ef7eb2e8f9f7 655 * it is not possible to program or erase the flash page i if
<> 144:ef7eb2e8f9f7 656 * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
<> 144:ef7eb2e8f9f7 657 *
<> 144:ef7eb2e8f9f7 658 * @param WriteProtectPage specifies the page(s) to be write protected.
<> 144:ef7eb2e8f9f7 659 * The value of this parameter depend on device used within the same series
<> 144:ef7eb2e8f9f7 660 * @retval HAL status
<> 144:ef7eb2e8f9f7 661 */
<> 144:ef7eb2e8f9f7 662 static HAL_StatusTypeDef FLASH_OB_EnableWRP(uint32_t WriteProtectPage)
<> 144:ef7eb2e8f9f7 663 {
<> 144:ef7eb2e8f9f7 664 HAL_StatusTypeDef status = HAL_OK;
<> 144:ef7eb2e8f9f7 665 uint16_t WRP0_Data = 0xFFFF;
<> 144:ef7eb2e8f9f7 666 #if defined(FLASH_WRP1_WRP1)
<> 144:ef7eb2e8f9f7 667 uint16_t WRP1_Data = 0xFFFF;
<> 144:ef7eb2e8f9f7 668 #endif /* FLASH_WRP1_WRP1 */
<> 144:ef7eb2e8f9f7 669 #if defined(FLASH_WRP2_WRP2)
<> 144:ef7eb2e8f9f7 670 uint16_t WRP2_Data = 0xFFFF;
<> 144:ef7eb2e8f9f7 671 #endif /* FLASH_WRP2_WRP2 */
<> 144:ef7eb2e8f9f7 672 #if defined(FLASH_WRP3_WRP3)
<> 144:ef7eb2e8f9f7 673 uint16_t WRP3_Data = 0xFFFF;
<> 144:ef7eb2e8f9f7 674 #endif /* FLASH_WRP3_WRP3 */
<> 144:ef7eb2e8f9f7 675
<> 144:ef7eb2e8f9f7 676 /* Check the parameters */
<> 144:ef7eb2e8f9f7 677 assert_param(IS_OB_WRP(WriteProtectPage));
<> 144:ef7eb2e8f9f7 678
<> 144:ef7eb2e8f9f7 679 /* Get current write protected pages and the new pages to be protected ******/
<> 144:ef7eb2e8f9f7 680 WriteProtectPage = (uint32_t)(~((~FLASH_OB_GetWRP()) | WriteProtectPage));
<> 144:ef7eb2e8f9f7 681
<> 144:ef7eb2e8f9f7 682 #if defined(OB_WRP_PAGES0TO15MASK)
<> 144:ef7eb2e8f9f7 683 WRP0_Data = (uint16_t)(WriteProtectPage & OB_WRP_PAGES0TO15MASK);
<> 144:ef7eb2e8f9f7 684 #elif defined(OB_WRP_PAGES0TO31MASK)
<> 144:ef7eb2e8f9f7 685 WRP0_Data = (uint16_t)(WriteProtectPage & OB_WRP_PAGES0TO31MASK);
<> 144:ef7eb2e8f9f7 686 #endif /* OB_WRP_PAGES0TO31MASK */
<> 144:ef7eb2e8f9f7 687
<> 144:ef7eb2e8f9f7 688 #if defined(OB_WRP_PAGES16TO31MASK)
AnnaBridge 165:e614a9f1c9e2 689 WRP1_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES16TO31MASK) >> 8U);
<> 144:ef7eb2e8f9f7 690 #elif defined(OB_WRP_PAGES32TO63MASK)
AnnaBridge 165:e614a9f1c9e2 691 WRP1_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES32TO63MASK) >> 8U);
<> 144:ef7eb2e8f9f7 692 #endif /* OB_WRP_PAGES32TO63MASK */
<> 144:ef7eb2e8f9f7 693
<> 144:ef7eb2e8f9f7 694 #if defined(OB_WRP_PAGES64TO95MASK)
AnnaBridge 165:e614a9f1c9e2 695 WRP2_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES64TO95MASK) >> 16U);
<> 144:ef7eb2e8f9f7 696 #endif /* OB_WRP_PAGES64TO95MASK */
<> 144:ef7eb2e8f9f7 697 #if defined(OB_WRP_PAGES32TO47MASK)
AnnaBridge 165:e614a9f1c9e2 698 WRP2_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES32TO47MASK) >> 16U);
<> 144:ef7eb2e8f9f7 699 #endif /* OB_WRP_PAGES32TO47MASK */
<> 144:ef7eb2e8f9f7 700
<> 144:ef7eb2e8f9f7 701 #if defined(OB_WRP_PAGES96TO127MASK)
AnnaBridge 165:e614a9f1c9e2 702 WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES96TO127MASK) >> 24U);
<> 144:ef7eb2e8f9f7 703 #elif defined(OB_WRP_PAGES48TO255MASK)
AnnaBridge 165:e614a9f1c9e2 704 WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO255MASK) >> 24U);
<> 144:ef7eb2e8f9f7 705 #elif defined(OB_WRP_PAGES48TO511MASK)
AnnaBridge 165:e614a9f1c9e2 706 WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO511MASK) >> 24U);
<> 144:ef7eb2e8f9f7 707 #elif defined(OB_WRP_PAGES48TO127MASK)
AnnaBridge 165:e614a9f1c9e2 708 WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO127MASK) >> 24U);
<> 144:ef7eb2e8f9f7 709 #endif /* OB_WRP_PAGES96TO127MASK */
<> 144:ef7eb2e8f9f7 710
<> 144:ef7eb2e8f9f7 711 /* Wait for last operation to be completed */
<> 144:ef7eb2e8f9f7 712 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
<> 144:ef7eb2e8f9f7 713
<> 144:ef7eb2e8f9f7 714 if(status == HAL_OK)
<> 144:ef7eb2e8f9f7 715 {
<> 144:ef7eb2e8f9f7 716 /* Clean the error context */
<> 144:ef7eb2e8f9f7 717 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
<> 144:ef7eb2e8f9f7 718
<> 144:ef7eb2e8f9f7 719 /* To be able to write again option byte, need to perform a option byte erase */
<> 144:ef7eb2e8f9f7 720 status = HAL_FLASHEx_OBErase();
<> 144:ef7eb2e8f9f7 721 if (status == HAL_OK)
<> 144:ef7eb2e8f9f7 722 {
<> 144:ef7eb2e8f9f7 723 /* Enable write protection */
<> 144:ef7eb2e8f9f7 724 SET_BIT(FLASH->CR, FLASH_CR_OPTPG);
<> 144:ef7eb2e8f9f7 725
<> 144:ef7eb2e8f9f7 726 #if defined(FLASH_WRP0_WRP0)
AnnaBridge 165:e614a9f1c9e2 727 if(WRP0_Data != 0xFFU)
<> 144:ef7eb2e8f9f7 728 {
<> 144:ef7eb2e8f9f7 729 OB->WRP0 &= WRP0_Data;
<> 144:ef7eb2e8f9f7 730
<> 144:ef7eb2e8f9f7 731 /* Wait for last operation to be completed */
<> 144:ef7eb2e8f9f7 732 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
<> 144:ef7eb2e8f9f7 733 }
<> 144:ef7eb2e8f9f7 734 #endif /* FLASH_WRP0_WRP0 */
<> 144:ef7eb2e8f9f7 735
<> 144:ef7eb2e8f9f7 736 #if defined(FLASH_WRP1_WRP1)
AnnaBridge 165:e614a9f1c9e2 737 if((status == HAL_OK) && (WRP1_Data != 0xFFU))
<> 144:ef7eb2e8f9f7 738 {
<> 144:ef7eb2e8f9f7 739 OB->WRP1 &= WRP1_Data;
<> 144:ef7eb2e8f9f7 740
<> 144:ef7eb2e8f9f7 741 /* Wait for last operation to be completed */
<> 144:ef7eb2e8f9f7 742 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
<> 144:ef7eb2e8f9f7 743 }
<> 144:ef7eb2e8f9f7 744 #endif /* FLASH_WRP1_WRP1 */
<> 144:ef7eb2e8f9f7 745
<> 144:ef7eb2e8f9f7 746 #if defined(FLASH_WRP2_WRP2)
AnnaBridge 165:e614a9f1c9e2 747 if((status == HAL_OK) && (WRP2_Data != 0xFFU))
<> 144:ef7eb2e8f9f7 748 {
<> 144:ef7eb2e8f9f7 749 OB->WRP2 &= WRP2_Data;
<> 144:ef7eb2e8f9f7 750
<> 144:ef7eb2e8f9f7 751 /* Wait for last operation to be completed */
<> 144:ef7eb2e8f9f7 752 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
<> 144:ef7eb2e8f9f7 753 }
<> 144:ef7eb2e8f9f7 754 #endif /* FLASH_WRP2_WRP2 */
<> 144:ef7eb2e8f9f7 755
<> 144:ef7eb2e8f9f7 756 #if defined(FLASH_WRP3_WRP3)
AnnaBridge 165:e614a9f1c9e2 757 if((status == HAL_OK) && (WRP3_Data != 0xFFU))
<> 144:ef7eb2e8f9f7 758 {
<> 144:ef7eb2e8f9f7 759 OB->WRP3 &= WRP3_Data;
<> 144:ef7eb2e8f9f7 760
<> 144:ef7eb2e8f9f7 761 /* Wait for last operation to be completed */
<> 144:ef7eb2e8f9f7 762 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
<> 144:ef7eb2e8f9f7 763 }
<> 144:ef7eb2e8f9f7 764 #endif /* FLASH_WRP3_WRP3 */
<> 144:ef7eb2e8f9f7 765
<> 144:ef7eb2e8f9f7 766 /* if the program operation is completed, disable the OPTPG Bit */
<> 144:ef7eb2e8f9f7 767 CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG);
<> 144:ef7eb2e8f9f7 768 }
<> 144:ef7eb2e8f9f7 769 }
<> 144:ef7eb2e8f9f7 770
<> 144:ef7eb2e8f9f7 771 return status;
<> 144:ef7eb2e8f9f7 772 }
<> 144:ef7eb2e8f9f7 773
<> 144:ef7eb2e8f9f7 774 /**
<> 144:ef7eb2e8f9f7 775 * @brief Disable the write protection of the desired pages
<> 144:ef7eb2e8f9f7 776 * @note An option byte erase is done automatically in this function.
<> 144:ef7eb2e8f9f7 777 * @note When the memory read protection level is selected (RDP level = 1),
<> 144:ef7eb2e8f9f7 778 * it is not possible to program or erase the flash page i if
<> 144:ef7eb2e8f9f7 779 * debug features are connected or boot code is executed in RAM, even if nWRPi = 1
<> 144:ef7eb2e8f9f7 780 *
<> 144:ef7eb2e8f9f7 781 * @param WriteProtectPage specifies the page(s) to be write unprotected.
<> 144:ef7eb2e8f9f7 782 * The value of this parameter depend on device used within the same series
<> 144:ef7eb2e8f9f7 783 * @retval HAL status
<> 144:ef7eb2e8f9f7 784 */
<> 144:ef7eb2e8f9f7 785 static HAL_StatusTypeDef FLASH_OB_DisableWRP(uint32_t WriteProtectPage)
<> 144:ef7eb2e8f9f7 786 {
<> 144:ef7eb2e8f9f7 787 HAL_StatusTypeDef status = HAL_OK;
<> 144:ef7eb2e8f9f7 788 uint16_t WRP0_Data = 0xFFFF;
<> 144:ef7eb2e8f9f7 789 #if defined(FLASH_WRP1_WRP1)
<> 144:ef7eb2e8f9f7 790 uint16_t WRP1_Data = 0xFFFF;
<> 144:ef7eb2e8f9f7 791 #endif /* FLASH_WRP1_WRP1 */
<> 144:ef7eb2e8f9f7 792 #if defined(FLASH_WRP2_WRP2)
<> 144:ef7eb2e8f9f7 793 uint16_t WRP2_Data = 0xFFFF;
<> 144:ef7eb2e8f9f7 794 #endif /* FLASH_WRP2_WRP2 */
<> 144:ef7eb2e8f9f7 795 #if defined(FLASH_WRP3_WRP3)
<> 144:ef7eb2e8f9f7 796 uint16_t WRP3_Data = 0xFFFF;
<> 144:ef7eb2e8f9f7 797 #endif /* FLASH_WRP3_WRP3 */
<> 144:ef7eb2e8f9f7 798
<> 144:ef7eb2e8f9f7 799 /* Check the parameters */
<> 144:ef7eb2e8f9f7 800 assert_param(IS_OB_WRP(WriteProtectPage));
<> 144:ef7eb2e8f9f7 801
<> 144:ef7eb2e8f9f7 802 /* Get current write protected pages and the new pages to be unprotected ******/
<> 144:ef7eb2e8f9f7 803 WriteProtectPage = (FLASH_OB_GetWRP() | WriteProtectPage);
<> 144:ef7eb2e8f9f7 804
<> 144:ef7eb2e8f9f7 805 #if defined(OB_WRP_PAGES0TO15MASK)
<> 144:ef7eb2e8f9f7 806 WRP0_Data = (uint16_t)(WriteProtectPage & OB_WRP_PAGES0TO15MASK);
<> 144:ef7eb2e8f9f7 807 #elif defined(OB_WRP_PAGES0TO31MASK)
<> 144:ef7eb2e8f9f7 808 WRP0_Data = (uint16_t)(WriteProtectPage & OB_WRP_PAGES0TO31MASK);
<> 144:ef7eb2e8f9f7 809 #endif /* OB_WRP_PAGES0TO31MASK */
<> 144:ef7eb2e8f9f7 810
<> 144:ef7eb2e8f9f7 811 #if defined(OB_WRP_PAGES16TO31MASK)
AnnaBridge 165:e614a9f1c9e2 812 WRP1_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES16TO31MASK) >> 8U);
<> 144:ef7eb2e8f9f7 813 #elif defined(OB_WRP_PAGES32TO63MASK)
AnnaBridge 165:e614a9f1c9e2 814 WRP1_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES32TO63MASK) >> 8U);
<> 144:ef7eb2e8f9f7 815 #endif /* OB_WRP_PAGES32TO63MASK */
<> 144:ef7eb2e8f9f7 816
<> 144:ef7eb2e8f9f7 817 #if defined(OB_WRP_PAGES64TO95MASK)
AnnaBridge 165:e614a9f1c9e2 818 WRP2_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES64TO95MASK) >> 16U);
<> 144:ef7eb2e8f9f7 819 #endif /* OB_WRP_PAGES64TO95MASK */
<> 144:ef7eb2e8f9f7 820 #if defined(OB_WRP_PAGES32TO47MASK)
AnnaBridge 165:e614a9f1c9e2 821 WRP2_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES32TO47MASK) >> 16U);
<> 144:ef7eb2e8f9f7 822 #endif /* OB_WRP_PAGES32TO47MASK */
<> 144:ef7eb2e8f9f7 823
<> 144:ef7eb2e8f9f7 824 #if defined(OB_WRP_PAGES96TO127MASK)
AnnaBridge 165:e614a9f1c9e2 825 WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES96TO127MASK) >> 24U);
<> 144:ef7eb2e8f9f7 826 #elif defined(OB_WRP_PAGES48TO255MASK)
AnnaBridge 165:e614a9f1c9e2 827 WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO255MASK) >> 24U);
<> 144:ef7eb2e8f9f7 828 #elif defined(OB_WRP_PAGES48TO511MASK)
AnnaBridge 165:e614a9f1c9e2 829 WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO511MASK) >> 24U);
<> 144:ef7eb2e8f9f7 830 #elif defined(OB_WRP_PAGES48TO127MASK)
AnnaBridge 165:e614a9f1c9e2 831 WRP3_Data = (uint16_t)((WriteProtectPage & OB_WRP_PAGES48TO127MASK) >> 24U);
<> 144:ef7eb2e8f9f7 832 #endif /* OB_WRP_PAGES96TO127MASK */
<> 144:ef7eb2e8f9f7 833
<> 144:ef7eb2e8f9f7 834
<> 144:ef7eb2e8f9f7 835 /* Wait for last operation to be completed */
<> 144:ef7eb2e8f9f7 836 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
<> 144:ef7eb2e8f9f7 837
<> 144:ef7eb2e8f9f7 838 if(status == HAL_OK)
<> 144:ef7eb2e8f9f7 839 {
<> 144:ef7eb2e8f9f7 840 /* Clean the error context */
<> 144:ef7eb2e8f9f7 841 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
<> 144:ef7eb2e8f9f7 842
<> 144:ef7eb2e8f9f7 843 /* To be able to write again option byte, need to perform a option byte erase */
<> 144:ef7eb2e8f9f7 844 status = HAL_FLASHEx_OBErase();
<> 144:ef7eb2e8f9f7 845 if (status == HAL_OK)
<> 144:ef7eb2e8f9f7 846 {
<> 144:ef7eb2e8f9f7 847 SET_BIT(FLASH->CR, FLASH_CR_OPTPG);
<> 144:ef7eb2e8f9f7 848
<> 144:ef7eb2e8f9f7 849 #if defined(FLASH_WRP0_WRP0)
AnnaBridge 165:e614a9f1c9e2 850 if(WRP0_Data != 0xFFU)
<> 144:ef7eb2e8f9f7 851 {
<> 144:ef7eb2e8f9f7 852 OB->WRP0 |= WRP0_Data;
<> 144:ef7eb2e8f9f7 853
<> 144:ef7eb2e8f9f7 854 /* Wait for last operation to be completed */
<> 144:ef7eb2e8f9f7 855 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
<> 144:ef7eb2e8f9f7 856 }
<> 144:ef7eb2e8f9f7 857 #endif /* FLASH_WRP0_WRP0 */
<> 144:ef7eb2e8f9f7 858
<> 144:ef7eb2e8f9f7 859 #if defined(FLASH_WRP1_WRP1)
AnnaBridge 165:e614a9f1c9e2 860 if((status == HAL_OK) && (WRP1_Data != 0xFFU))
<> 144:ef7eb2e8f9f7 861 {
<> 144:ef7eb2e8f9f7 862 OB->WRP1 |= WRP1_Data;
<> 144:ef7eb2e8f9f7 863
<> 144:ef7eb2e8f9f7 864 /* Wait for last operation to be completed */
<> 144:ef7eb2e8f9f7 865 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
<> 144:ef7eb2e8f9f7 866 }
<> 144:ef7eb2e8f9f7 867 #endif /* FLASH_WRP1_WRP1 */
<> 144:ef7eb2e8f9f7 868
<> 144:ef7eb2e8f9f7 869 #if defined(FLASH_WRP2_WRP2)
AnnaBridge 165:e614a9f1c9e2 870 if((status == HAL_OK) && (WRP2_Data != 0xFFU))
<> 144:ef7eb2e8f9f7 871 {
<> 144:ef7eb2e8f9f7 872 OB->WRP2 |= WRP2_Data;
<> 144:ef7eb2e8f9f7 873
<> 144:ef7eb2e8f9f7 874 /* Wait for last operation to be completed */
<> 144:ef7eb2e8f9f7 875 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
<> 144:ef7eb2e8f9f7 876 }
<> 144:ef7eb2e8f9f7 877 #endif /* FLASH_WRP2_WRP2 */
<> 144:ef7eb2e8f9f7 878
<> 144:ef7eb2e8f9f7 879 #if defined(FLASH_WRP3_WRP3)
AnnaBridge 165:e614a9f1c9e2 880 if((status == HAL_OK) && (WRP3_Data != 0xFFU))
<> 144:ef7eb2e8f9f7 881 {
<> 144:ef7eb2e8f9f7 882 OB->WRP3 |= WRP3_Data;
<> 144:ef7eb2e8f9f7 883
<> 144:ef7eb2e8f9f7 884 /* Wait for last operation to be completed */
<> 144:ef7eb2e8f9f7 885 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
<> 144:ef7eb2e8f9f7 886 }
<> 144:ef7eb2e8f9f7 887 #endif /* FLASH_WRP3_WRP3 */
<> 144:ef7eb2e8f9f7 888
<> 144:ef7eb2e8f9f7 889 /* if the program operation is completed, disable the OPTPG Bit */
<> 144:ef7eb2e8f9f7 890 CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG);
<> 144:ef7eb2e8f9f7 891 }
<> 144:ef7eb2e8f9f7 892 }
<> 144:ef7eb2e8f9f7 893 return status;
<> 144:ef7eb2e8f9f7 894 }
<> 144:ef7eb2e8f9f7 895
<> 144:ef7eb2e8f9f7 896 /**
<> 144:ef7eb2e8f9f7 897 * @brief Set the read protection level.
<> 144:ef7eb2e8f9f7 898 * @param ReadProtectLevel specifies the read protection level.
<> 144:ef7eb2e8f9f7 899 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 900 * @arg @ref OB_RDP_LEVEL_0 No protection
<> 144:ef7eb2e8f9f7 901 * @arg @ref OB_RDP_LEVEL_1 Read protection of the memory
<> 144:ef7eb2e8f9f7 902 * @retval HAL status
<> 144:ef7eb2e8f9f7 903 */
<> 144:ef7eb2e8f9f7 904 static HAL_StatusTypeDef FLASH_OB_RDP_LevelConfig(uint8_t ReadProtectLevel)
<> 144:ef7eb2e8f9f7 905 {
<> 144:ef7eb2e8f9f7 906 HAL_StatusTypeDef status = HAL_OK;
<> 144:ef7eb2e8f9f7 907
<> 144:ef7eb2e8f9f7 908 /* Check the parameters */
<> 144:ef7eb2e8f9f7 909 assert_param(IS_OB_RDP_LEVEL(ReadProtectLevel));
<> 144:ef7eb2e8f9f7 910
<> 144:ef7eb2e8f9f7 911 /* Wait for last operation to be completed */
<> 144:ef7eb2e8f9f7 912 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
<> 144:ef7eb2e8f9f7 913
<> 144:ef7eb2e8f9f7 914 if(status == HAL_OK)
<> 144:ef7eb2e8f9f7 915 {
<> 144:ef7eb2e8f9f7 916 /* Clean the error context */
<> 144:ef7eb2e8f9f7 917 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
<> 144:ef7eb2e8f9f7 918
<> 144:ef7eb2e8f9f7 919 /* If the previous operation is completed, proceed to erase the option bytes */
<> 144:ef7eb2e8f9f7 920 SET_BIT(FLASH->CR, FLASH_CR_OPTER);
<> 144:ef7eb2e8f9f7 921 SET_BIT(FLASH->CR, FLASH_CR_STRT);
<> 144:ef7eb2e8f9f7 922
<> 144:ef7eb2e8f9f7 923 /* Wait for last operation to be completed */
<> 144:ef7eb2e8f9f7 924 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
<> 144:ef7eb2e8f9f7 925
<> 144:ef7eb2e8f9f7 926 /* If the erase operation is completed, disable the OPTER Bit */
<> 144:ef7eb2e8f9f7 927 CLEAR_BIT(FLASH->CR, FLASH_CR_OPTER);
<> 144:ef7eb2e8f9f7 928
<> 144:ef7eb2e8f9f7 929 if(status == HAL_OK)
<> 144:ef7eb2e8f9f7 930 {
<> 144:ef7eb2e8f9f7 931 /* Enable the Option Bytes Programming operation */
<> 144:ef7eb2e8f9f7 932 SET_BIT(FLASH->CR, FLASH_CR_OPTPG);
<> 144:ef7eb2e8f9f7 933
<> 144:ef7eb2e8f9f7 934 WRITE_REG(OB->RDP, ReadProtectLevel);
<> 144:ef7eb2e8f9f7 935
<> 144:ef7eb2e8f9f7 936 /* Wait for last operation to be completed */
<> 144:ef7eb2e8f9f7 937 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
<> 144:ef7eb2e8f9f7 938
<> 144:ef7eb2e8f9f7 939 /* if the program operation is completed, disable the OPTPG Bit */
<> 144:ef7eb2e8f9f7 940 CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG);
<> 144:ef7eb2e8f9f7 941 }
<> 144:ef7eb2e8f9f7 942 }
<> 144:ef7eb2e8f9f7 943
<> 144:ef7eb2e8f9f7 944 return status;
<> 144:ef7eb2e8f9f7 945 }
<> 144:ef7eb2e8f9f7 946
<> 144:ef7eb2e8f9f7 947 /**
<> 144:ef7eb2e8f9f7 948 * @brief Program the FLASH User Option Byte.
<> 144:ef7eb2e8f9f7 949 * @note Programming of the OB should be performed only after an erase (otherwise PGERR occurs)
<> 144:ef7eb2e8f9f7 950 * @param UserConfig The FLASH User Option Bytes values FLASH_OBR_IWDG_SW(Bit2),
<> 144:ef7eb2e8f9f7 951 * FLASH_OBR_nRST_STOP(Bit3),FLASH_OBR_nRST_STDBY(Bit4).
<> 144:ef7eb2e8f9f7 952 * And BFBF2(Bit5) for STM32F101xG and STM32F103xG .
<> 144:ef7eb2e8f9f7 953 * @retval HAL status
<> 144:ef7eb2e8f9f7 954 */
<> 144:ef7eb2e8f9f7 955 static HAL_StatusTypeDef FLASH_OB_UserConfig(uint8_t UserConfig)
<> 144:ef7eb2e8f9f7 956 {
<> 144:ef7eb2e8f9f7 957 HAL_StatusTypeDef status = HAL_OK;
<> 144:ef7eb2e8f9f7 958
<> 144:ef7eb2e8f9f7 959 /* Check the parameters */
<> 144:ef7eb2e8f9f7 960 assert_param(IS_OB_IWDG_SOURCE((UserConfig&OB_IWDG_SW)));
<> 144:ef7eb2e8f9f7 961 assert_param(IS_OB_STOP_SOURCE((UserConfig&OB_STOP_NO_RST)));
<> 144:ef7eb2e8f9f7 962 assert_param(IS_OB_STDBY_SOURCE((UserConfig&OB_STDBY_NO_RST)));
<> 144:ef7eb2e8f9f7 963 #if defined(FLASH_BANK2_END)
<> 144:ef7eb2e8f9f7 964 assert_param(IS_OB_BOOT1((UserConfig&OB_BOOT1_SET)));
<> 144:ef7eb2e8f9f7 965 #endif /* FLASH_BANK2_END */
<> 144:ef7eb2e8f9f7 966
<> 144:ef7eb2e8f9f7 967 /* Wait for last operation to be completed */
<> 144:ef7eb2e8f9f7 968 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
<> 144:ef7eb2e8f9f7 969
<> 144:ef7eb2e8f9f7 970 if(status == HAL_OK)
<> 144:ef7eb2e8f9f7 971 {
<> 144:ef7eb2e8f9f7 972 /* Clean the error context */
<> 144:ef7eb2e8f9f7 973 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
<> 144:ef7eb2e8f9f7 974
<> 144:ef7eb2e8f9f7 975 /* Enable the Option Bytes Programming operation */
<> 144:ef7eb2e8f9f7 976 SET_BIT(FLASH->CR, FLASH_CR_OPTPG);
<> 144:ef7eb2e8f9f7 977
<> 144:ef7eb2e8f9f7 978 #if defined(FLASH_BANK2_END)
AnnaBridge 165:e614a9f1c9e2 979 OB->USER = (UserConfig | 0xF0U);
<> 144:ef7eb2e8f9f7 980 #else
AnnaBridge 165:e614a9f1c9e2 981 OB->USER = (UserConfig | 0x88U);
<> 144:ef7eb2e8f9f7 982 #endif /* FLASH_BANK2_END */
<> 144:ef7eb2e8f9f7 983
<> 144:ef7eb2e8f9f7 984 /* Wait for last operation to be completed */
<> 144:ef7eb2e8f9f7 985 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
<> 144:ef7eb2e8f9f7 986
<> 144:ef7eb2e8f9f7 987 /* if the program operation is completed, disable the OPTPG Bit */
<> 144:ef7eb2e8f9f7 988 CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG);
<> 144:ef7eb2e8f9f7 989 }
<> 144:ef7eb2e8f9f7 990
<> 144:ef7eb2e8f9f7 991 return status;
<> 144:ef7eb2e8f9f7 992 }
<> 144:ef7eb2e8f9f7 993
<> 144:ef7eb2e8f9f7 994 /**
<> 144:ef7eb2e8f9f7 995 * @brief Programs a half word at a specified Option Byte Data address.
<> 144:ef7eb2e8f9f7 996 * @note The function @ref HAL_FLASH_Unlock() should be called before to unlock the FLASH interface
<> 144:ef7eb2e8f9f7 997 * The function @ref HAL_FLASH_OB_Unlock() should be called before to unlock the options bytes
<> 144:ef7eb2e8f9f7 998 * The function @ref HAL_FLASH_OB_Launch() should be called after to force the reload of the options bytes
<> 144:ef7eb2e8f9f7 999 * (system reset will occur)
<> 144:ef7eb2e8f9f7 1000 * Programming of the OB should be performed only after an erase (otherwise PGERR occurs)
<> 144:ef7eb2e8f9f7 1001 * @param Address specifies the address to be programmed.
<> 144:ef7eb2e8f9f7 1002 * This parameter can be 0x1FFFF804 or 0x1FFFF806.
<> 144:ef7eb2e8f9f7 1003 * @param Data specifies the data to be programmed.
<> 144:ef7eb2e8f9f7 1004 * @retval HAL status
<> 144:ef7eb2e8f9f7 1005 */
<> 144:ef7eb2e8f9f7 1006 static HAL_StatusTypeDef FLASH_OB_ProgramData(uint32_t Address, uint8_t Data)
<> 144:ef7eb2e8f9f7 1007 {
<> 144:ef7eb2e8f9f7 1008 HAL_StatusTypeDef status = HAL_ERROR;
<> 144:ef7eb2e8f9f7 1009
<> 144:ef7eb2e8f9f7 1010 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1011 assert_param(IS_OB_DATA_ADDRESS(Address));
<> 144:ef7eb2e8f9f7 1012
<> 144:ef7eb2e8f9f7 1013 /* Wait for last operation to be completed */
<> 144:ef7eb2e8f9f7 1014 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
<> 144:ef7eb2e8f9f7 1015
<> 144:ef7eb2e8f9f7 1016 if(status == HAL_OK)
<> 144:ef7eb2e8f9f7 1017 {
<> 144:ef7eb2e8f9f7 1018 /* Clean the error context */
<> 144:ef7eb2e8f9f7 1019 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
<> 144:ef7eb2e8f9f7 1020
<> 144:ef7eb2e8f9f7 1021 /* Enables the Option Bytes Programming operation */
<> 144:ef7eb2e8f9f7 1022 SET_BIT(FLASH->CR, FLASH_CR_OPTPG);
<> 144:ef7eb2e8f9f7 1023 *(__IO uint16_t*)Address = Data;
<> 144:ef7eb2e8f9f7 1024
<> 144:ef7eb2e8f9f7 1025 /* Wait for last operation to be completed */
<> 144:ef7eb2e8f9f7 1026 status = FLASH_WaitForLastOperation((uint32_t)FLASH_TIMEOUT_VALUE);
<> 144:ef7eb2e8f9f7 1027
<> 144:ef7eb2e8f9f7 1028 /* If the program operation is completed, disable the OPTPG Bit */
<> 144:ef7eb2e8f9f7 1029 CLEAR_BIT(FLASH->CR, FLASH_CR_OPTPG);
<> 144:ef7eb2e8f9f7 1030 }
<> 144:ef7eb2e8f9f7 1031 /* Return the Option Byte Data Program Status */
<> 144:ef7eb2e8f9f7 1032 return status;
<> 144:ef7eb2e8f9f7 1033 }
<> 144:ef7eb2e8f9f7 1034
<> 144:ef7eb2e8f9f7 1035 /**
<> 144:ef7eb2e8f9f7 1036 * @brief Return the FLASH Write Protection Option Bytes value.
<> 144:ef7eb2e8f9f7 1037 * @retval The FLASH Write Protection Option Bytes value
<> 144:ef7eb2e8f9f7 1038 */
<> 144:ef7eb2e8f9f7 1039 static uint32_t FLASH_OB_GetWRP(void)
<> 144:ef7eb2e8f9f7 1040 {
<> 144:ef7eb2e8f9f7 1041 /* Return the FLASH write protection Register value */
<> 144:ef7eb2e8f9f7 1042 return (uint32_t)(READ_REG(FLASH->WRPR));
<> 144:ef7eb2e8f9f7 1043 }
<> 144:ef7eb2e8f9f7 1044
<> 144:ef7eb2e8f9f7 1045 /**
<> 144:ef7eb2e8f9f7 1046 * @brief Returns the FLASH Read Protection level.
AnnaBridge 165:e614a9f1c9e2 1047 * @retval FLASH RDP level
<> 144:ef7eb2e8f9f7 1048 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 1049 * @arg @ref OB_RDP_LEVEL_0 No protection
<> 144:ef7eb2e8f9f7 1050 * @arg @ref OB_RDP_LEVEL_1 Read protection of the memory
<> 144:ef7eb2e8f9f7 1051 */
<> 144:ef7eb2e8f9f7 1052 static uint32_t FLASH_OB_GetRDP(void)
<> 144:ef7eb2e8f9f7 1053 {
<> 144:ef7eb2e8f9f7 1054 uint32_t readstatus = OB_RDP_LEVEL_0;
AnnaBridge 165:e614a9f1c9e2 1055 uint32_t tmp_reg = 0U;
<> 144:ef7eb2e8f9f7 1056
<> 144:ef7eb2e8f9f7 1057 /* Read RDP level bits */
<> 144:ef7eb2e8f9f7 1058 tmp_reg = READ_BIT(FLASH->OBR, FLASH_OBR_RDPRT);
<> 144:ef7eb2e8f9f7 1059
<> 144:ef7eb2e8f9f7 1060 if (tmp_reg == FLASH_OBR_RDPRT)
<> 144:ef7eb2e8f9f7 1061 {
<> 144:ef7eb2e8f9f7 1062 readstatus = OB_RDP_LEVEL_1;
<> 144:ef7eb2e8f9f7 1063 }
<> 144:ef7eb2e8f9f7 1064 else
<> 144:ef7eb2e8f9f7 1065 {
<> 144:ef7eb2e8f9f7 1066 readstatus = OB_RDP_LEVEL_0;
<> 144:ef7eb2e8f9f7 1067 }
<> 144:ef7eb2e8f9f7 1068
<> 144:ef7eb2e8f9f7 1069 return readstatus;
<> 144:ef7eb2e8f9f7 1070 }
<> 144:ef7eb2e8f9f7 1071
<> 144:ef7eb2e8f9f7 1072 /**
<> 144:ef7eb2e8f9f7 1073 * @brief Return the FLASH User Option Byte value.
<> 144:ef7eb2e8f9f7 1074 * @retval The FLASH User Option Bytes values: FLASH_OBR_IWDG_SW(Bit2),
<> 144:ef7eb2e8f9f7 1075 * FLASH_OBR_nRST_STOP(Bit3),FLASH_OBR_nRST_STDBY(Bit4).
<> 144:ef7eb2e8f9f7 1076 * And FLASH_OBR_BFB2(Bit5) for STM32F101xG and STM32F103xG .
<> 144:ef7eb2e8f9f7 1077 */
<> 144:ef7eb2e8f9f7 1078 static uint8_t FLASH_OB_GetUser(void)
<> 144:ef7eb2e8f9f7 1079 {
<> 144:ef7eb2e8f9f7 1080 /* Return the User Option Byte */
<> 144:ef7eb2e8f9f7 1081 return (uint8_t)((READ_REG(FLASH->OBR) & FLASH_OBR_USER) >> FLASH_POSITION_IWDGSW_BIT);
<> 144:ef7eb2e8f9f7 1082 }
<> 144:ef7eb2e8f9f7 1083
<> 144:ef7eb2e8f9f7 1084 /**
<> 144:ef7eb2e8f9f7 1085 * @}
<> 144:ef7eb2e8f9f7 1086 */
<> 144:ef7eb2e8f9f7 1087
<> 144:ef7eb2e8f9f7 1088 /**
<> 144:ef7eb2e8f9f7 1089 * @}
<> 144:ef7eb2e8f9f7 1090 */
<> 144:ef7eb2e8f9f7 1091
<> 144:ef7eb2e8f9f7 1092 /** @addtogroup FLASH
<> 144:ef7eb2e8f9f7 1093 * @{
<> 144:ef7eb2e8f9f7 1094 */
<> 144:ef7eb2e8f9f7 1095
<> 144:ef7eb2e8f9f7 1096 /** @addtogroup FLASH_Private_Functions
<> 144:ef7eb2e8f9f7 1097 * @{
<> 144:ef7eb2e8f9f7 1098 */
<> 144:ef7eb2e8f9f7 1099
<> 144:ef7eb2e8f9f7 1100 /**
<> 144:ef7eb2e8f9f7 1101 * @brief Erase the specified FLASH memory page
<> 144:ef7eb2e8f9f7 1102 * @param PageAddress FLASH page to erase
<> 144:ef7eb2e8f9f7 1103 * The value of this parameter depend on device used within the same series
<> 144:ef7eb2e8f9f7 1104 *
<> 144:ef7eb2e8f9f7 1105 * @retval None
<> 144:ef7eb2e8f9f7 1106 */
<> 144:ef7eb2e8f9f7 1107 void FLASH_PageErase(uint32_t PageAddress)
<> 144:ef7eb2e8f9f7 1108 {
<> 144:ef7eb2e8f9f7 1109 /* Clean the error context */
<> 144:ef7eb2e8f9f7 1110 pFlash.ErrorCode = HAL_FLASH_ERROR_NONE;
<> 144:ef7eb2e8f9f7 1111
<> 144:ef7eb2e8f9f7 1112 #if defined(FLASH_BANK2_END)
<> 144:ef7eb2e8f9f7 1113 if(PageAddress > FLASH_BANK1_END)
<> 144:ef7eb2e8f9f7 1114 {
<> 144:ef7eb2e8f9f7 1115 /* Proceed to erase the page */
<> 144:ef7eb2e8f9f7 1116 SET_BIT(FLASH->CR2, FLASH_CR2_PER);
<> 144:ef7eb2e8f9f7 1117 WRITE_REG(FLASH->AR2, PageAddress);
<> 144:ef7eb2e8f9f7 1118 SET_BIT(FLASH->CR2, FLASH_CR2_STRT);
<> 144:ef7eb2e8f9f7 1119 }
<> 144:ef7eb2e8f9f7 1120 else
<> 144:ef7eb2e8f9f7 1121 {
<> 144:ef7eb2e8f9f7 1122 #endif /* FLASH_BANK2_END */
<> 144:ef7eb2e8f9f7 1123 /* Proceed to erase the page */
<> 144:ef7eb2e8f9f7 1124 SET_BIT(FLASH->CR, FLASH_CR_PER);
<> 144:ef7eb2e8f9f7 1125 WRITE_REG(FLASH->AR, PageAddress);
<> 144:ef7eb2e8f9f7 1126 SET_BIT(FLASH->CR, FLASH_CR_STRT);
<> 144:ef7eb2e8f9f7 1127 #if defined(FLASH_BANK2_END)
<> 144:ef7eb2e8f9f7 1128 }
<> 144:ef7eb2e8f9f7 1129 #endif /* FLASH_BANK2_END */
<> 144:ef7eb2e8f9f7 1130 }
<> 144:ef7eb2e8f9f7 1131
<> 144:ef7eb2e8f9f7 1132 /**
<> 144:ef7eb2e8f9f7 1133 * @}
<> 144:ef7eb2e8f9f7 1134 */
<> 144:ef7eb2e8f9f7 1135
<> 144:ef7eb2e8f9f7 1136 /**
<> 144:ef7eb2e8f9f7 1137 * @}
<> 144:ef7eb2e8f9f7 1138 */
<> 144:ef7eb2e8f9f7 1139
<> 144:ef7eb2e8f9f7 1140 #endif /* HAL_FLASH_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 1141 /**
<> 144:ef7eb2e8f9f7 1142 * @}
<> 144:ef7eb2e8f9f7 1143 */
<> 144:ef7eb2e8f9f7 1144
<> 144:ef7eb2e8f9f7 1145 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/