mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/cmsis/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/TOOLCHAIN_ARM_STD/startup_MKL25Z4.S@142:d6373279a6f1, 2016-05-26 (annotated)

Committer:
mbed_official
Date:
Thu May 26 10:00:14 2016 +0100
Revision:
142:d6373279a6f1
Parent:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Synchronized with git revision db49c1edebc3516ee61197641f7cfbdeaea5482f



Full URL: https://github.com/mbedmicro/mbed/commit/db49c1edebc3516ee61197641f7cfbdeaea5482f/



Release v121

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 ;/*****************************************************************************
bogdanm 0:9b334a45a8ff 2 ; * @file: startup_MKL25Z4.s
bogdanm 0:9b334a45a8ff 3 ; * @purpose: CMSIS Cortex-M0plus Core Device Startup File for the
bogdanm 0:9b334a45a8ff 4 ; * MKL25Z4
bogdanm 0:9b334a45a8ff 5 ; * @version: 1.1
bogdanm 0:9b334a45a8ff 6 ; * @date: 2012-6-21
bogdanm 0:9b334a45a8ff 7 ; *
bogdanm 0:9b334a45a8ff 8 ; * Copyright: 1997 - 2012 Freescale Semiconductor, Inc. All Rights Reserved.
bogdanm 0:9b334a45a8ff 9 ;*
bogdanm 0:9b334a45a8ff 10 ; *------- <<< Use Configuration Wizard in Context Menu >>> ------------------
bogdanm 0:9b334a45a8ff 11 ; *
bogdanm 0:9b334a45a8ff 12 ; *****************************************************************************/
bogdanm 0:9b334a45a8ff 13
bogdanm 0:9b334a45a8ff 14
bogdanm 0:9b334a45a8ff 15 __initial_sp EQU 0x20003000 ; Top of RAM
bogdanm 0:9b334a45a8ff 16
bogdanm 0:9b334a45a8ff 17 PRESERVE8
bogdanm 0:9b334a45a8ff 18 THUMB
bogdanm 0:9b334a45a8ff 19
bogdanm 0:9b334a45a8ff 20
bogdanm 0:9b334a45a8ff 21 ; Vector Table Mapped to Address 0 at Reset
bogdanm 0:9b334a45a8ff 22
bogdanm 0:9b334a45a8ff 23 AREA RESET, DATA, READONLY
bogdanm 0:9b334a45a8ff 24 EXPORT __Vectors
bogdanm 0:9b334a45a8ff 25 EXPORT __Vectors_End
bogdanm 0:9b334a45a8ff 26 EXPORT __Vectors_Size
bogdanm 0:9b334a45a8ff 27
bogdanm 0:9b334a45a8ff 28 __Vectors DCD __initial_sp ; Top of Stack
bogdanm 0:9b334a45a8ff 29 DCD Reset_Handler ; Reset Handler
bogdanm 0:9b334a45a8ff 30 DCD NMI_Handler ; NMI Handler
bogdanm 0:9b334a45a8ff 31 DCD HardFault_Handler ; Hard Fault Handler
bogdanm 0:9b334a45a8ff 32 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 33 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 34 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 35 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 36 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 37 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 38 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 39 DCD SVC_Handler ; SVCall Handler
bogdanm 0:9b334a45a8ff 40 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 41 DCD 0 ; Reserved
bogdanm 0:9b334a45a8ff 42 DCD PendSV_Handler ; PendSV Handler
bogdanm 0:9b334a45a8ff 43 DCD SysTick_Handler ; SysTick Handler
bogdanm 0:9b334a45a8ff 44
bogdanm 0:9b334a45a8ff 45 ; External Interrupts
bogdanm 0:9b334a45a8ff 46 DCD DMA0_IRQHandler ; DMA channel 0 transfer complete interrupt
bogdanm 0:9b334a45a8ff 47 DCD DMA1_IRQHandler ; DMA channel 1 transfer complete interrupt
bogdanm 0:9b334a45a8ff 48 DCD DMA2_IRQHandler ; DMA channel 2 transfer complete interrupt
bogdanm 0:9b334a45a8ff 49 DCD DMA3_IRQHandler ; DMA channel 3 transfer complete interrupt
bogdanm 0:9b334a45a8ff 50 DCD Reserved20_IRQHandler ; Reserved interrupt 20
bogdanm 0:9b334a45a8ff 51 DCD FTFA_IRQHandler ; FTFA interrupt
bogdanm 0:9b334a45a8ff 52 DCD LVD_LVW_IRQHandler ; Low Voltage Detect, Low Voltage Warning
bogdanm 0:9b334a45a8ff 53 DCD LLW_IRQHandler ; Low Leakage Wakeup
bogdanm 0:9b334a45a8ff 54 DCD I2C0_IRQHandler ; I2C0 interrupt
bogdanm 0:9b334a45a8ff 55 DCD I2C1_IRQHandler ; I2C0 interrupt 25
bogdanm 0:9b334a45a8ff 56 DCD SPI0_IRQHandler ; SPI0 interrupt
bogdanm 0:9b334a45a8ff 57 DCD SPI1_IRQHandler ; SPI1 interrupt
bogdanm 0:9b334a45a8ff 58 DCD UART0_IRQHandler ; UART0 status/error interrupt
bogdanm 0:9b334a45a8ff 59 DCD UART1_IRQHandler ; UART1 status/error interrupt
bogdanm 0:9b334a45a8ff 60 DCD UART2_IRQHandler ; UART2 status/error interrupt
bogdanm 0:9b334a45a8ff 61 DCD ADC0_IRQHandler ; ADC0 interrupt
bogdanm 0:9b334a45a8ff 62 DCD CMP0_IRQHandler ; CMP0 interrupt
bogdanm 0:9b334a45a8ff 63 DCD TPM0_IRQHandler ; TPM0 fault, overflow and channels interrupt
bogdanm 0:9b334a45a8ff 64 DCD TPM1_IRQHandler ; TPM1 fault, overflow and channels interrupt
bogdanm 0:9b334a45a8ff 65 DCD TPM2_IRQHandler ; TPM2 fault, overflow and channels interrupt
bogdanm 0:9b334a45a8ff 66 DCD RTC_IRQHandler ; RTC interrupt
bogdanm 0:9b334a45a8ff 67 DCD RTC_Seconds_IRQHandler ; RTC seconds interrupt
bogdanm 0:9b334a45a8ff 68 DCD PIT_IRQHandler ; PIT timer interrupt
bogdanm 0:9b334a45a8ff 69 DCD Reserved39_IRQHandler ; Reserved interrupt 39
bogdanm 0:9b334a45a8ff 70 DCD USB0_IRQHandler ; USB0 interrupt
bogdanm 0:9b334a45a8ff 71 DCD DAC0_IRQHandler ; DAC interrupt
bogdanm 0:9b334a45a8ff 72 DCD TSI0_IRQHandler ; TSI0 interrupt
bogdanm 0:9b334a45a8ff 73 DCD MCG_IRQHandler ; MCG interrupt
bogdanm 0:9b334a45a8ff 74 DCD LPTimer_IRQHandler ; LPTimer interrupt
bogdanm 0:9b334a45a8ff 75 DCD Reserved45_IRQHandler ; Reserved interrupt 45
bogdanm 0:9b334a45a8ff 76 DCD PORTA_IRQHandler ; Port A interrupt
bogdanm 0:9b334a45a8ff 77 DCD PORTD_IRQHandler ; Port D interrupt
bogdanm 0:9b334a45a8ff 78 __Vectors_End
bogdanm 0:9b334a45a8ff 79
bogdanm 0:9b334a45a8ff 80 __Vectors_Size EQU __Vectors_End - __Vectors
bogdanm 0:9b334a45a8ff 81
bogdanm 0:9b334a45a8ff 82 ; <h> Flash Configuration
bogdanm 0:9b334a45a8ff 83 ; <i> 16-byte flash configuration field that stores default protection settings (loaded on reset)
bogdanm 0:9b334a45a8ff 84 ; <i> and security information that allows the MCU to restrict acces to the FTFL module.
bogdanm 0:9b334a45a8ff 85 ; <h> Backdoor Comparison Key
bogdanm 0:9b334a45a8ff 86 ; <o0> Backdoor Key 0 <0x0-0xFF:2>
bogdanm 0:9b334a45a8ff 87 ; <o1> Backdoor Key 1 <0x0-0xFF:2>
bogdanm 0:9b334a45a8ff 88 ; <o2> Backdoor Key 2 <0x0-0xFF:2>
bogdanm 0:9b334a45a8ff 89 ; <o3> Backdoor Key 3 <0x0-0xFF:2>
bogdanm 0:9b334a45a8ff 90 ; <o4> Backdoor Key 4 <0x0-0xFF:2>
bogdanm 0:9b334a45a8ff 91 ; <o5> Backdoor Key 5 <0x0-0xFF:2>
bogdanm 0:9b334a45a8ff 92 ; <o6> Backdoor Key 6 <0x0-0xFF:2>
bogdanm 0:9b334a45a8ff 93 ; <o7> Backdoor Key 7 <0x0-0xFF:2>
bogdanm 0:9b334a45a8ff 94 BackDoorK0 EQU 0xFF
bogdanm 0:9b334a45a8ff 95 BackDoorK1 EQU 0xFF
bogdanm 0:9b334a45a8ff 96 BackDoorK2 EQU 0xFF
bogdanm 0:9b334a45a8ff 97 BackDoorK3 EQU 0xFF
bogdanm 0:9b334a45a8ff 98 BackDoorK4 EQU 0xFF
bogdanm 0:9b334a45a8ff 99 BackDoorK5 EQU 0xFF
bogdanm 0:9b334a45a8ff 100 BackDoorK6 EQU 0xFF
bogdanm 0:9b334a45a8ff 101 BackDoorK7 EQU 0xFF
bogdanm 0:9b334a45a8ff 102 ; </h>
bogdanm 0:9b334a45a8ff 103 ; <h> Program flash protection bytes (FPROT)
bogdanm 0:9b334a45a8ff 104 ; <i> Each program flash region can be protected from program and erase operation by setting the associated PROT bit.
bogdanm 0:9b334a45a8ff 105 ; <i> Each bit protects a 1/32 region of the program flash memory.
bogdanm 0:9b334a45a8ff 106 ; <h> FPROT0
bogdanm 0:9b334a45a8ff 107 ; <i> Program flash protection bytes
bogdanm 0:9b334a45a8ff 108 ; <i> 1/32 - 8/32 region
bogdanm 0:9b334a45a8ff 109 ; <o.0> FPROT0.0
bogdanm 0:9b334a45a8ff 110 ; <o.1> FPROT0.1
bogdanm 0:9b334a45a8ff 111 ; <o.2> FPROT0.2
bogdanm 0:9b334a45a8ff 112 ; <o.3> FPROT0.3
bogdanm 0:9b334a45a8ff 113 ; <o.4> FPROT0.4
bogdanm 0:9b334a45a8ff 114 ; <o.5> FPROT0.5
bogdanm 0:9b334a45a8ff 115 ; <o.6> FPROT0.6
bogdanm 0:9b334a45a8ff 116 ; <o.7> FPROT0.7
bogdanm 0:9b334a45a8ff 117 nFPROT0 EQU 0x00
bogdanm 0:9b334a45a8ff 118 FPROT0 EQU nFPROT0:EOR:0xFF
bogdanm 0:9b334a45a8ff 119 ; </h>
bogdanm 0:9b334a45a8ff 120 ; <h> FPROT1
bogdanm 0:9b334a45a8ff 121 ; <i> Program Flash Region Protect Register 1
bogdanm 0:9b334a45a8ff 122 ; <i> 9/32 - 16/32 region
bogdanm 0:9b334a45a8ff 123 ; <o.0> FPROT1.0
bogdanm 0:9b334a45a8ff 124 ; <o.1> FPROT1.1
bogdanm 0:9b334a45a8ff 125 ; <o.2> FPROT1.2
bogdanm 0:9b334a45a8ff 126 ; <o.3> FPROT1.3
bogdanm 0:9b334a45a8ff 127 ; <o.4> FPROT1.4
bogdanm 0:9b334a45a8ff 128 ; <o.5> FPROT1.5
bogdanm 0:9b334a45a8ff 129 ; <o.6> FPROT1.6
bogdanm 0:9b334a45a8ff 130 ; <o.7> FPROT1.7
bogdanm 0:9b334a45a8ff 131 nFPROT1 EQU 0x00
bogdanm 0:9b334a45a8ff 132 FPROT1 EQU nFPROT1:EOR:0xFF
bogdanm 0:9b334a45a8ff 133 ; </h>
bogdanm 0:9b334a45a8ff 134 ; <h> FPROT2
bogdanm 0:9b334a45a8ff 135 ; <i> Program Flash Region Protect Register 2
bogdanm 0:9b334a45a8ff 136 ; <i> 17/32 - 24/32 region
bogdanm 0:9b334a45a8ff 137 ; <o.0> FPROT2.0
bogdanm 0:9b334a45a8ff 138 ; <o.1> FPROT2.1
bogdanm 0:9b334a45a8ff 139 ; <o.2> FPROT2.2
bogdanm 0:9b334a45a8ff 140 ; <o.3> FPROT2.3
bogdanm 0:9b334a45a8ff 141 ; <o.4> FPROT2.4
bogdanm 0:9b334a45a8ff 142 ; <o.5> FPROT2.5
bogdanm 0:9b334a45a8ff 143 ; <o.6> FPROT2.6
bogdanm 0:9b334a45a8ff 144 ; <o.7> FPROT2.7
bogdanm 0:9b334a45a8ff 145 nFPROT2 EQU 0x00
bogdanm 0:9b334a45a8ff 146 FPROT2 EQU nFPROT2:EOR:0xFF
bogdanm 0:9b334a45a8ff 147 ; </h>
bogdanm 0:9b334a45a8ff 148 ; <h> FPROT3
bogdanm 0:9b334a45a8ff 149 ; <i> Program Flash Region Protect Register 3
bogdanm 0:9b334a45a8ff 150 ; <i> 25/32 - 32/32 region
bogdanm 0:9b334a45a8ff 151 ; <o.0> FPROT3.0
bogdanm 0:9b334a45a8ff 152 ; <o.1> FPROT3.1
bogdanm 0:9b334a45a8ff 153 ; <o.2> FPROT3.2
bogdanm 0:9b334a45a8ff 154 ; <o.3> FPROT3.3
bogdanm 0:9b334a45a8ff 155 ; <o.4> FPROT3.4
bogdanm 0:9b334a45a8ff 156 ; <o.5> FPROT3.5
bogdanm 0:9b334a45a8ff 157 ; <o.6> FPROT3.6
bogdanm 0:9b334a45a8ff 158 ; <o.7> FPROT3.7
bogdanm 0:9b334a45a8ff 159 nFPROT3 EQU 0x00
bogdanm 0:9b334a45a8ff 160 FPROT3 EQU nFPROT3:EOR:0xFF
bogdanm 0:9b334a45a8ff 161 ; </h>
bogdanm 0:9b334a45a8ff 162 ; </h>
bogdanm 0:9b334a45a8ff 163 ; </h>
bogdanm 0:9b334a45a8ff 164 ; <h> Flash nonvolatile option byte (FOPT)
bogdanm 0:9b334a45a8ff 165 ; <i> Allows the user to customize the operation of the MCU at boot time.
bogdanm 0:9b334a45a8ff 166 ; <o.0> LPBOOT0
bogdanm 0:9b334a45a8ff 167 ; <0=> Core and system clock divider (OUTDIV1) is 0x7 (divide by 8) or 0x3 (divide by 4)
bogdanm 0:9b334a45a8ff 168 ; <1=> Core and system clock divider (OUTDIV1) is 0x1 (divide by 2) or 0x0 (divide by 1)
bogdanm 0:9b334a45a8ff 169 ; <o.4> LPBOOT1
bogdanm 0:9b334a45a8ff 170 ; <0=> Core and system clock divider (OUTDIV1) is 0x7 (divide by 8) or 0x1 (divide by 2)
bogdanm 0:9b334a45a8ff 171 ; <1=> Core and system clock divider (OUTDIV1) is 0x3 (divide by 4) or 0x0 (divide by 1)
bogdanm 0:9b334a45a8ff 172 ; <o.2> NMI_DIS
bogdanm 0:9b334a45a8ff 173 ; <0=> NMI interrupts are always blocked
bogdanm 0:9b334a45a8ff 174 ; <1=> NMI pin/interrupts reset default to enabled
bogdanm 0:9b334a45a8ff 175 ; <o.3> RESET_PIN_CFG
bogdanm 0:9b334a45a8ff 176 ; <0=> RESET pin is disabled following a POR and cannot be enabled as RESET function
bogdanm 0:9b334a45a8ff 177 ; <1=> RESET pin is dedicated
bogdanm 0:9b334a45a8ff 178 ; <o.3> FAST_INIT
bogdanm 0:9b334a45a8ff 179 ; <0=> Slower initialization
bogdanm 0:9b334a45a8ff 180 ; <1=> Fast Initialization
bogdanm 0:9b334a45a8ff 181 FOPT EQU 0xFF
bogdanm 0:9b334a45a8ff 182 ; </h>
bogdanm 0:9b334a45a8ff 183 ; <h> Flash security byte (FSEC)
bogdanm 0:9b334a45a8ff 184 ; <i> WARNING: If SEC field is configured as "MCU security status is secure" and MEEN field is configured as "Mass erase is disabled",
bogdanm 0:9b334a45a8ff 185 ; <i> MCU's security status cannot be set back to unsecure state since Mass erase via the debugger is blocked !!!
bogdanm 0:9b334a45a8ff 186 ; <o.0..1> SEC
bogdanm 0:9b334a45a8ff 187 ; <2=> MCU security status is unsecure
bogdanm 0:9b334a45a8ff 188 ; <3=> MCU security status is secure
bogdanm 0:9b334a45a8ff 189 ; <i> Flash Security
bogdanm 0:9b334a45a8ff 190 ; <i> This bits define the security state of the MCU.
bogdanm 0:9b334a45a8ff 191 ; <o.2..3> FSLACC
bogdanm 0:9b334a45a8ff 192 ; <2=> Freescale factory access denied
bogdanm 0:9b334a45a8ff 193 ; <3=> Freescale factory access granted
bogdanm 0:9b334a45a8ff 194 ; <i> Freescale Failure Analysis Access Code
bogdanm 0:9b334a45a8ff 195 ; <i> This bits define the security state of the MCU.
bogdanm 0:9b334a45a8ff 196 ; <o.4..5> MEEN
bogdanm 0:9b334a45a8ff 197 ; <2=> Mass erase is disabled
bogdanm 0:9b334a45a8ff 198 ; <3=> Mass erase is enabled
bogdanm 0:9b334a45a8ff 199 ; <i> Mass Erase Enable Bits
bogdanm 0:9b334a45a8ff 200 ; <i> Enables and disables mass erase capability of the FTFL module
bogdanm 0:9b334a45a8ff 201 ; <o.6..7> KEYEN
bogdanm 0:9b334a45a8ff 202 ; <2=> Backdoor key access enabled
bogdanm 0:9b334a45a8ff 203 ; <3=> Backdoor key access disabled
bogdanm 0:9b334a45a8ff 204 ; <i> Backdoor key Security Enable
bogdanm 0:9b334a45a8ff 205 ; <i> These bits enable and disable backdoor key access to the FTFL module.
bogdanm 0:9b334a45a8ff 206 FSEC EQU 0xFE
bogdanm 0:9b334a45a8ff 207 ; </h>
bogdanm 0:9b334a45a8ff 208
bogdanm 0:9b334a45a8ff 209 IF :LNOT::DEF:RAM_TARGET
bogdanm 0:9b334a45a8ff 210 AREA |.ARM.__at_0x400|, CODE, READONLY
bogdanm 0:9b334a45a8ff 211 DCB BackDoorK0, BackDoorK1, BackDoorK2, BackDoorK3
bogdanm 0:9b334a45a8ff 212 DCB BackDoorK4, BackDoorK5, BackDoorK6, BackDoorK7
bogdanm 0:9b334a45a8ff 213 DCB FPROT0, FPROT1, FPROT2, FPROT3
bogdanm 0:9b334a45a8ff 214 DCB FSEC, FOPT, 0xFF, 0xFF
bogdanm 0:9b334a45a8ff 215 ENDIF
bogdanm 0:9b334a45a8ff 216
bogdanm 0:9b334a45a8ff 217 AREA |.text|, CODE, READONLY
bogdanm 0:9b334a45a8ff 218
bogdanm 0:9b334a45a8ff 219
bogdanm 0:9b334a45a8ff 220 ; Reset Handler
bogdanm 0:9b334a45a8ff 221
bogdanm 0:9b334a45a8ff 222 Reset_Handler PROC
bogdanm 0:9b334a45a8ff 223 EXPORT Reset_Handler [WEAK]
bogdanm 0:9b334a45a8ff 224 IMPORT SystemInit
bogdanm 0:9b334a45a8ff 225 IMPORT __main
bogdanm 0:9b334a45a8ff 226 LDR R0, =SystemInit
bogdanm 0:9b334a45a8ff 227 BLX R0
bogdanm 0:9b334a45a8ff 228 LDR R0, =__main
bogdanm 0:9b334a45a8ff 229 BX R0
bogdanm 0:9b334a45a8ff 230 ENDP
bogdanm 0:9b334a45a8ff 231
bogdanm 0:9b334a45a8ff 232
bogdanm 0:9b334a45a8ff 233 ; Dummy Exception Handlers (infinite loops which can be modified)
bogdanm 0:9b334a45a8ff 234
bogdanm 0:9b334a45a8ff 235 NMI_Handler PROC
bogdanm 0:9b334a45a8ff 236 EXPORT NMI_Handler [WEAK]
bogdanm 0:9b334a45a8ff 237 B .
bogdanm 0:9b334a45a8ff 238 ENDP
bogdanm 0:9b334a45a8ff 239 HardFault_Handler\
bogdanm 0:9b334a45a8ff 240 PROC
bogdanm 0:9b334a45a8ff 241 EXPORT HardFault_Handler [WEAK]
bogdanm 0:9b334a45a8ff 242 B .
bogdanm 0:9b334a45a8ff 243 ENDP
bogdanm 0:9b334a45a8ff 244 SVC_Handler PROC
bogdanm 0:9b334a45a8ff 245 EXPORT SVC_Handler [WEAK]
bogdanm 0:9b334a45a8ff 246 B .
bogdanm 0:9b334a45a8ff 247 ENDP
bogdanm 0:9b334a45a8ff 248 PendSV_Handler PROC
bogdanm 0:9b334a45a8ff 249 EXPORT PendSV_Handler [WEAK]
bogdanm 0:9b334a45a8ff 250 B .
bogdanm 0:9b334a45a8ff 251 ENDP
bogdanm 0:9b334a45a8ff 252 SysTick_Handler PROC
bogdanm 0:9b334a45a8ff 253 EXPORT SysTick_Handler [WEAK]
bogdanm 0:9b334a45a8ff 254 B .
bogdanm 0:9b334a45a8ff 255 ENDP
bogdanm 0:9b334a45a8ff 256
bogdanm 0:9b334a45a8ff 257 Default_Handler PROC
bogdanm 0:9b334a45a8ff 258 EXPORT DMA0_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 259 EXPORT DMA1_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 260 EXPORT DMA2_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 261 EXPORT DMA3_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 262 EXPORT Reserved20_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 263 EXPORT FTFA_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 264 EXPORT LVD_LVW_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 265 EXPORT LLW_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 266 EXPORT I2C0_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 267 EXPORT I2C1_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 268 EXPORT SPI0_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 269 EXPORT SPI1_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 270 EXPORT UART0_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 271 EXPORT UART1_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 272 EXPORT UART2_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 273 EXPORT ADC0_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 274 EXPORT CMP0_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 275 EXPORT TPM0_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 276 EXPORT TPM1_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 277 EXPORT TPM2_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 278 EXPORT RTC_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 279 EXPORT RTC_Seconds_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 280 EXPORT PIT_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 281 EXPORT Reserved39_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 282 EXPORT USB0_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 283 EXPORT DAC0_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 284 EXPORT TSI0_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 285 EXPORT MCG_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 286 EXPORT LPTimer_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 287 EXPORT Reserved45_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 288 EXPORT PORTA_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 289 EXPORT PORTD_IRQHandler [WEAK]
bogdanm 0:9b334a45a8ff 290 EXPORT DefaultISR [WEAK]
bogdanm 0:9b334a45a8ff 291
bogdanm 0:9b334a45a8ff 292 DMA0_IRQHandler
bogdanm 0:9b334a45a8ff 293 DMA1_IRQHandler
bogdanm 0:9b334a45a8ff 294 DMA2_IRQHandler
bogdanm 0:9b334a45a8ff 295 DMA3_IRQHandler
bogdanm 0:9b334a45a8ff 296 Reserved20_IRQHandler
bogdanm 0:9b334a45a8ff 297 FTFA_IRQHandler
bogdanm 0:9b334a45a8ff 298 LVD_LVW_IRQHandler
bogdanm 0:9b334a45a8ff 299 LLW_IRQHandler
bogdanm 0:9b334a45a8ff 300 I2C0_IRQHandler
bogdanm 0:9b334a45a8ff 301 I2C1_IRQHandler
bogdanm 0:9b334a45a8ff 302 SPI0_IRQHandler
bogdanm 0:9b334a45a8ff 303 SPI1_IRQHandler
bogdanm 0:9b334a45a8ff 304 UART0_IRQHandler
bogdanm 0:9b334a45a8ff 305 UART1_IRQHandler
bogdanm 0:9b334a45a8ff 306 UART2_IRQHandler
bogdanm 0:9b334a45a8ff 307 ADC0_IRQHandler
bogdanm 0:9b334a45a8ff 308 CMP0_IRQHandler
bogdanm 0:9b334a45a8ff 309 TPM0_IRQHandler
bogdanm 0:9b334a45a8ff 310 TPM1_IRQHandler
bogdanm 0:9b334a45a8ff 311 TPM2_IRQHandler
bogdanm 0:9b334a45a8ff 312 RTC_IRQHandler
bogdanm 0:9b334a45a8ff 313 RTC_Seconds_IRQHandler
bogdanm 0:9b334a45a8ff 314 PIT_IRQHandler
bogdanm 0:9b334a45a8ff 315 Reserved39_IRQHandler
bogdanm 0:9b334a45a8ff 316 USB0_IRQHandler
bogdanm 0:9b334a45a8ff 317 DAC0_IRQHandler
bogdanm 0:9b334a45a8ff 318 TSI0_IRQHandler
bogdanm 0:9b334a45a8ff 319 MCG_IRQHandler
bogdanm 0:9b334a45a8ff 320 LPTimer_IRQHandler
bogdanm 0:9b334a45a8ff 321 Reserved45_IRQHandler
bogdanm 0:9b334a45a8ff 322 PORTA_IRQHandler
bogdanm 0:9b334a45a8ff 323 PORTD_IRQHandler
bogdanm 0:9b334a45a8ff 324 DefaultISR
bogdanm 0:9b334a45a8ff 325
bogdanm 0:9b334a45a8ff 326 B .
bogdanm 0:9b334a45a8ff 327
bogdanm 0:9b334a45a8ff 328 ENDP
bogdanm 0:9b334a45a8ff 329
bogdanm 0:9b334a45a8ff 330
bogdanm 0:9b334a45a8ff 331 ALIGN
bogdanm 0:9b334a45a8ff 332 END