mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

Committer:
<>
Date:
Tue Mar 14 16:40:56 2017 +0000
Revision:
160:d5399cc887bb
Parent:
157:ff67d9f36b67
Child:
187:0387e8f68319
This updates the lib to the mbed lib v138

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 157:ff67d9f36b67 1 /* mbed Microcontroller Library
<> 157:ff67d9f36b67 2 *******************************************************************************
<> 157:ff67d9f36b67 3 * Copyright (c) 2016, STMicroelectronics
<> 157:ff67d9f36b67 4 * All rights reserved.
<> 157:ff67d9f36b67 5 *
<> 157:ff67d9f36b67 6 * Redistribution and use in source and binary forms, with or without
<> 157:ff67d9f36b67 7 * modification, are permitted provided that the following conditions are met:
<> 157:ff67d9f36b67 8 *
<> 157:ff67d9f36b67 9 * 1. Redistributions of source code must retain the above copyright notice,
<> 157:ff67d9f36b67 10 * this list of conditions and the following disclaimer.
<> 157:ff67d9f36b67 11 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 157:ff67d9f36b67 12 * this list of conditions and the following disclaimer in the documentation
<> 157:ff67d9f36b67 13 * and/or other materials provided with the distribution.
<> 157:ff67d9f36b67 14 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 157:ff67d9f36b67 15 * may be used to endorse or promote products derived from this software
<> 157:ff67d9f36b67 16 * without specific prior written permission.
<> 157:ff67d9f36b67 17 *
<> 157:ff67d9f36b67 18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 157:ff67d9f36b67 19 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 157:ff67d9f36b67 20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 157:ff67d9f36b67 21 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 157:ff67d9f36b67 22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 157:ff67d9f36b67 23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 157:ff67d9f36b67 24 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 157:ff67d9f36b67 25 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 157:ff67d9f36b67 26 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 157:ff67d9f36b67 27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 157:ff67d9f36b67 28 *******************************************************************************
<> 157:ff67d9f36b67 29 */
<> 157:ff67d9f36b67 30 #ifndef MBED_PINNAMESTYPES_H
<> 157:ff67d9f36b67 31 #define MBED_PINNAMESTYPES_H
<> 157:ff67d9f36b67 32
<> 157:ff67d9f36b67 33 #include "cmsis.h"
<> 157:ff67d9f36b67 34
<> 157:ff67d9f36b67 35 #ifdef __cplusplus
<> 157:ff67d9f36b67 36 extern "C" {
<> 157:ff67d9f36b67 37 #endif
<> 157:ff67d9f36b67 38
<> 160:d5399cc887bb 39 /* STM PIN data as used in pin_function is coded on 32 bits as below
<> 160:d5399cc887bb 40 * [2:0] Function (like in MODER reg) : Input / Output / Alt / Analog
<> 160:d5399cc887bb 41 * [3] Output Push-Pull / Open Drain (as in OTYPER reg)
<> 160:d5399cc887bb 42 * [5:4] as in PUPDR reg: No Pull, Pull-up, Pull-Donc
<> 160:d5399cc887bb 43 * [7:6] Reserved for speed config (as in OSPEEDR), but not used yet
<> 160:d5399cc887bb 44 * [11:8] Alternate Num (as in AFRL/AFRG reg)
<> 160:d5399cc887bb 45 * [16:12] Channel (Analog/Timer specific)
<> 160:d5399cc887bb 46 * [17] Inverted (Analog/Timer specific)
<> 160:d5399cc887bb 47 * [18] Analog ADC control - Only valid for specific families
<> 160:d5399cc887bb 48 * [32:19] Reserved
<> 160:d5399cc887bb 49 */
<> 160:d5399cc887bb 50
<> 160:d5399cc887bb 51 #define STM_PIN_FUNCTION_MASK 0x07
<> 160:d5399cc887bb 52 #define STM_PIN_FUNCTION_SHIFT 0
<> 160:d5399cc887bb 53 #define STM_PIN_FUNCTION_BITS (STM_PIN_FUNCTION_MASK << STM_PIN_FUNCTION_SHIFT)
<> 160:d5399cc887bb 54
<> 160:d5399cc887bb 55 #define STM_PIN_OD_MASK 0x01
<> 160:d5399cc887bb 56 #define STM_PIN_OD_SHIFT 3
<> 160:d5399cc887bb 57 #define STM_PIN_OD_BITS (STM_PIN_OD_MASK << STM_PIN_OD_SHIFT)
<> 157:ff67d9f36b67 58
<> 160:d5399cc887bb 59 #define STM_PIN_PUPD_MASK 0x03
<> 160:d5399cc887bb 60 #define STM_PIN_PUPD_SHIFT 4
<> 160:d5399cc887bb 61 #define STM_PIN_PUPD_BITS (STM_PIN_PUPD_MASK << STM_PIN_PUPD_SHIFT)
<> 160:d5399cc887bb 62
<> 160:d5399cc887bb 63 #define STM_PIN_SPEED_MASK 0x03
<> 160:d5399cc887bb 64 #define STM_PIN_SPEED_SHIFT 6
<> 160:d5399cc887bb 65 #define STM_PIN_SPEED_BITS (STM_PIN_SPEED_MASK << STM_PIN_SPEED_SHIFT)
<> 160:d5399cc887bb 66
<> 160:d5399cc887bb 67 #define STM_PIN_AFNUM_MASK 0x0F
<> 160:d5399cc887bb 68 #define STM_PIN_AFNUM_SHIFT 8
<> 160:d5399cc887bb 69 #define STM_PIN_AFNUM_BITS (STM_PIN_AFNUM_MASK << STM_PIN_AFNUM_SHIFT)
<> 157:ff67d9f36b67 70
<> 160:d5399cc887bb 71 #define STM_PIN_CHAN_MASK 0x1F
<> 160:d5399cc887bb 72 #define STM_PIN_CHAN_SHIFT 12
<> 160:d5399cc887bb 73 #define STM_PIN_CHANNEL_BIT (STM_PIN_CHAN_MASK << STM_PIN_CHAN_SHIFT)
<> 160:d5399cc887bb 74
<> 160:d5399cc887bb 75 #define STM_PIN_INV_MASK 0x01
<> 160:d5399cc887bb 76 #define STM_PIN_INV_SHIFT 17
<> 160:d5399cc887bb 77 #define STM_PIN_INV_BIT (STM_PIN_INV_MASK << STM_PIN_INV_SHIFT)
<> 160:d5399cc887bb 78
<> 160:d5399cc887bb 79 #define STM_PIN_AN_CTRL_MASK 0x01
<> 160:d5399cc887bb 80 #define STM_PIN_AN_CTRL_SHIFT 18
<> 160:d5399cc887bb 81 #define STM_PIN_ANALOG_CONTROL_BIT (STM_PIN_AN_CTRL_MASK << STM_PIN_AN_CTRL_SHIFT)
<> 157:ff67d9f36b67 82
<> 160:d5399cc887bb 83 #define STM_PIN_FUNCTION(X) (((X) >> STM_PIN_FUNCTION_SHIFT) & STM_PIN_FUNCTION_MASK)
<> 160:d5399cc887bb 84 #define STM_PIN_OD(X) (((X) >> STM_PIN_OD_SHIFT) & STM_PIN_OD_MASK)
<> 160:d5399cc887bb 85 #define STM_PIN_PUPD(X) (((X) >> STM_PIN_PUPD_SHIFT) & STM_PIN_PUPD_MASK)
<> 160:d5399cc887bb 86 #define STM_PIN_SPEED(X) (((X) >> STM_PIN_SPEED_SHIFT) & STM_PIN_SPEED_MASK)
<> 160:d5399cc887bb 87 #define STM_PIN_AFNUM(X) (((X) >> STM_PIN_AFNUM_SHIFT) & STM_PIN_AFNUM_MASK)
<> 160:d5399cc887bb 88 #define STM_PIN_CHANNEL(X) (((X) >> STM_PIN_CHAN_SHIFT) & STM_PIN_CHAN_MASK)
<> 160:d5399cc887bb 89 #define STM_PIN_INVERTED(X) (((X) >> STM_PIN_INV_SHIFT) & STM_PIN_INV_MASK)
<> 160:d5399cc887bb 90 #define STM_PIN_ANALOG_CONTROL(X) (((X) >> STM_PIN_AN_CTRL_SHIFT) & STM_PIN_AN_CTRL_MASK)
<> 160:d5399cc887bb 91
<> 160:d5399cc887bb 92 #define STM_PIN_DEFINE(FUNC_OD, PUPD, AFNUM) ((int)(FUNC_OD) |\
<> 160:d5399cc887bb 93 ((PUPD & STM_PIN_PUPD_MASK) << STM_PIN_PUPD_SHIFT) |\
<> 160:d5399cc887bb 94 ((AFNUM & STM_PIN_AFNUM_MASK) << STM_PIN_AFNUM_SHIFT))
<> 160:d5399cc887bb 95
<> 160:d5399cc887bb 96 #define STM_PIN_DEFINE_EXT(FUNC_OD, PUPD, AFNUM, CHAN, INV) \
<> 160:d5399cc887bb 97 ((int)(FUNC_OD) |\
<> 160:d5399cc887bb 98 ((PUPD & STM_PIN_PUPD_MASK) << STM_PIN_PUPD_SHIFT) |\
<> 160:d5399cc887bb 99 ((AFNUM & STM_PIN_AFNUM_MASK) << STM_PIN_AFNUM_SHIFT) |\
<> 160:d5399cc887bb 100 ((CHAN & STM_PIN_CHAN_MASK) << STM_PIN_CHAN_SHIFT) |\
<> 160:d5399cc887bb 101 ((INV & STM_PIN_INV_MASK) << STM_PIN_INV_SHIFT))
<> 160:d5399cc887bb 102
<> 160:d5399cc887bb 103 /*
<> 160:d5399cc887bb 104 * MACROS to support the legacy definition of PIN formats
<> 160:d5399cc887bb 105 * The STM_MODE_ defines contain the function and the Push-pull/OpenDrain
<> 160:d5399cc887bb 106 * configuration (legacy inheritance).
<> 160:d5399cc887bb 107 */
<> 160:d5399cc887bb 108 #define STM_PIN_DATA(FUNC_OD, PUPD, AFNUM) \
<> 160:d5399cc887bb 109 STM_PIN_DEFINE(FUNC_OD, PUPD, AFNUM)
<> 160:d5399cc887bb 110 #define STM_PIN_DATA_EXT(FUNC_OD, PUPD, AFNUM, CHANNEL, INVERTED) \
<> 160:d5399cc887bb 111 STM_PIN_DEFINE_EXT(FUNC_OD, PUPD, AFNUM, CHANNEL, INVERTED)
<> 160:d5399cc887bb 112
<> 160:d5399cc887bb 113 typedef enum {
<> 160:d5399cc887bb 114 STM_PIN_INPUT = 0,
<> 160:d5399cc887bb 115 STM_PIN_OUTPUT = 1,
<> 160:d5399cc887bb 116 STM_PIN_ALTERNATE = 2,
<> 160:d5399cc887bb 117 STM_PIN_ANALOG = 3,
<> 160:d5399cc887bb 118 } StmPinFunction;
<> 160:d5399cc887bb 119
<> 160:d5399cc887bb 120 #define STM_MODE_INPUT (STM_PIN_INPUT)
<> 160:d5399cc887bb 121 #define STM_MODE_OUTPUT_PP (STM_PIN_OUTPUT)
<> 160:d5399cc887bb 122 #define STM_MODE_OUTPUT_OD (STM_PIN_OUTPUT | STM_PIN_OD_BITS)
<> 160:d5399cc887bb 123 #define STM_MODE_AF_PP (STM_PIN_ALTERNATE)
<> 160:d5399cc887bb 124 #define STM_MODE_AF_OD (STM_PIN_ALTERNATE | STM_PIN_OD_BITS)
<> 160:d5399cc887bb 125 #define STM_MODE_ANALOG (STM_PIN_ANALOG)
<> 160:d5399cc887bb 126 #define STM_MODE_ANALOG_ADC_CONTROL (STM_PIN_ANALOG | STM_PIN_ANALOG_CONTROL_BIT)
<> 157:ff67d9f36b67 127
<> 157:ff67d9f36b67 128 // High nibble = port number (0=A, 1=B, 2=C, 3=D, 4=E, 5=F, 6=G, 7=H)
<> 157:ff67d9f36b67 129 // Low nibble = pin number
<> 157:ff67d9f36b67 130 #define STM_PORT(X) (((uint32_t)(X) >> 4) & 0xF)
<> 157:ff67d9f36b67 131 #define STM_PIN(X) ((uint32_t)(X) & 0xF)
<> 157:ff67d9f36b67 132
<> 160:d5399cc887bb 133 /* Defines to be used by application */
<> 157:ff67d9f36b67 134 typedef enum {
<> 160:d5399cc887bb 135 PIN_INPUT = 0,
<> 157:ff67d9f36b67 136 PIN_OUTPUT
<> 157:ff67d9f36b67 137 } PinDirection;
<> 157:ff67d9f36b67 138
<> 157:ff67d9f36b67 139 typedef enum {
<> 160:d5399cc887bb 140 PullNone = 0,
<> 160:d5399cc887bb 141 PullUp = 1,
<> 160:d5399cc887bb 142 PullDown = 2,
<> 160:d5399cc887bb 143 OpenDrainPullUp = 3,
<> 160:d5399cc887bb 144 OpenDrainNoPull = 4,
<> 160:d5399cc887bb 145 OpenDrainPullDown = 5,
<> 160:d5399cc887bb 146 PushPullNoPull = PullNone,
<> 160:d5399cc887bb 147 PushPullPullUp = PullUp,
<> 160:d5399cc887bb 148 PushPullPullDown = PullDown,
<> 160:d5399cc887bb 149 OpenDrain = OpenDrainPullUp,
<> 160:d5399cc887bb 150 PullDefault = PullNone
<> 157:ff67d9f36b67 151 } PinMode;
<> 157:ff67d9f36b67 152
<> 157:ff67d9f36b67 153 #ifdef __cplusplus
<> 157:ff67d9f36b67 154 }
<> 157:ff67d9f36b67 155 #endif
<> 157:ff67d9f36b67 156
<> 157:ff67d9f36b67 157 #endif
<> 160:d5399cc887bb 158