mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_TOSHIBA/TARGET_TMPM4G9/serial_api.c@188:bcfe06ba3d64, 2018-11-08 (annotated)
- Committer:
- AnnaBridge
- Date:
- Thu Nov 08 11:46:34 2018 +0000
- Revision:
- 188:bcfe06ba3d64
mbed-dev library. Release version 164
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
AnnaBridge | 188:bcfe06ba3d64 | 1 | /* mbed Microcontroller Library |
AnnaBridge | 188:bcfe06ba3d64 | 2 | * (C)Copyright TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION 2018 All rights reserved |
AnnaBridge | 188:bcfe06ba3d64 | 3 | * |
AnnaBridge | 188:bcfe06ba3d64 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
AnnaBridge | 188:bcfe06ba3d64 | 5 | * you may not use this file except in compliance with the License. |
AnnaBridge | 188:bcfe06ba3d64 | 6 | * You may obtain a copy of the License at |
AnnaBridge | 188:bcfe06ba3d64 | 7 | * |
AnnaBridge | 188:bcfe06ba3d64 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
AnnaBridge | 188:bcfe06ba3d64 | 9 | * |
AnnaBridge | 188:bcfe06ba3d64 | 10 | * Unless required by applicable law or agreed to in writing, software |
AnnaBridge | 188:bcfe06ba3d64 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
AnnaBridge | 188:bcfe06ba3d64 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
AnnaBridge | 188:bcfe06ba3d64 | 13 | * See the License for the specific language governing permissions and |
AnnaBridge | 188:bcfe06ba3d64 | 14 | * limitations under the License. |
AnnaBridge | 188:bcfe06ba3d64 | 15 | */ |
AnnaBridge | 188:bcfe06ba3d64 | 16 | #include <string.h> |
AnnaBridge | 188:bcfe06ba3d64 | 17 | #include "mbed_error.h" |
AnnaBridge | 188:bcfe06ba3d64 | 18 | #include "serial_api.h" |
AnnaBridge | 188:bcfe06ba3d64 | 19 | #include "pinmap.h" |
AnnaBridge | 188:bcfe06ba3d64 | 20 | |
AnnaBridge | 188:bcfe06ba3d64 | 21 | #define UART_NUM 8 |
AnnaBridge | 188:bcfe06ba3d64 | 22 | #define UART_ENABLE_RX ((uint32_t)0x00000001) |
AnnaBridge | 188:bcfe06ba3d64 | 23 | #define UART_ENABLE_TX ((uint32_t)0x00000002) |
AnnaBridge | 188:bcfe06ba3d64 | 24 | #define UARTxFIFOCLR_TFCLR_CLEAR ((uint32_t)0x00000002) |
AnnaBridge | 188:bcfe06ba3d64 | 25 | #define UARTxFIFOCLR_RFCLR_CLEAR ((uint32_t)0x00000001) |
AnnaBridge | 188:bcfe06ba3d64 | 26 | #define UARTxSWRST_SWRSTF_MASK ((uint32_t)0x00000080) |
AnnaBridge | 188:bcfe06ba3d64 | 27 | #define UARTxSWRST_SWRSTF_RUN ((uint32_t)0x00000080) |
AnnaBridge | 188:bcfe06ba3d64 | 28 | #define UARTxSWRST_SWRST_10 ((uint32_t)0x00000002) |
AnnaBridge | 188:bcfe06ba3d64 | 29 | #define UARTxSWRST_SWRST_01 ((uint32_t)0x00000001) |
AnnaBridge | 188:bcfe06ba3d64 | 30 | #define UART_RX_FIFO_FILL_LEVEL ((uint32_t)0x00000100) |
AnnaBridge | 188:bcfe06ba3d64 | 31 | #define FUART_ENABLE_RX ((uint32_t)0x00000200) |
AnnaBridge | 188:bcfe06ba3d64 | 32 | #define FUART_ENABLE_TX ((uint32_t)0x00000100) |
AnnaBridge | 188:bcfe06ba3d64 | 33 | #define BAUDRATE_DEFAULT (9600) |
AnnaBridge | 188:bcfe06ba3d64 | 34 | #define CLR_REGISTER (0x00) |
AnnaBridge | 188:bcfe06ba3d64 | 35 | |
AnnaBridge | 188:bcfe06ba3d64 | 36 | static const PinMap PinMap_UART_TX[] = { |
AnnaBridge | 188:bcfe06ba3d64 | 37 | {PE3, SERIAL_0, PIN_DATA(7, 1)}, |
AnnaBridge | 188:bcfe06ba3d64 | 38 | {PH1, SERIAL_1, PIN_DATA(3, 1)}, |
AnnaBridge | 188:bcfe06ba3d64 | 39 | {PG1, SERIAL_2, PIN_DATA(3, 1)}, |
AnnaBridge | 188:bcfe06ba3d64 | 40 | {PU7, SERIAL_3, PIN_DATA(7, 1)}, |
AnnaBridge | 188:bcfe06ba3d64 | 41 | {PU0, SERIAL_4, PIN_DATA(7, 1)}, |
AnnaBridge | 188:bcfe06ba3d64 | 42 | {PJ1, SERIAL_5, PIN_DATA(3, 1)}, |
AnnaBridge | 188:bcfe06ba3d64 | 43 | {NC, NC, 0} |
AnnaBridge | 188:bcfe06ba3d64 | 44 | }; |
AnnaBridge | 188:bcfe06ba3d64 | 45 | |
AnnaBridge | 188:bcfe06ba3d64 | 46 | static const PinMap PinMap_UART_RX[] = { |
AnnaBridge | 188:bcfe06ba3d64 | 47 | {PE2, SERIAL_0, PIN_DATA(7, 0)}, |
AnnaBridge | 188:bcfe06ba3d64 | 48 | {PH0, SERIAL_1, PIN_DATA(3, 0)}, |
AnnaBridge | 188:bcfe06ba3d64 | 49 | {PG0, SERIAL_2, PIN_DATA(3, 0)}, |
AnnaBridge | 188:bcfe06ba3d64 | 50 | {PU6, SERIAL_3, PIN_DATA(7, 0)}, |
AnnaBridge | 188:bcfe06ba3d64 | 51 | {PU1, SERIAL_4, PIN_DATA(7, 0)}, |
AnnaBridge | 188:bcfe06ba3d64 | 52 | {PJ0, SERIAL_5, PIN_DATA(3, 0)}, |
AnnaBridge | 188:bcfe06ba3d64 | 53 | {NC, NC, 0} |
AnnaBridge | 188:bcfe06ba3d64 | 54 | }; |
AnnaBridge | 188:bcfe06ba3d64 | 55 | |
AnnaBridge | 188:bcfe06ba3d64 | 56 | static int serial_irq_ids[UART_NUM] = {0}; |
AnnaBridge | 188:bcfe06ba3d64 | 57 | static uart_irq_handler irq_handler; |
AnnaBridge | 188:bcfe06ba3d64 | 58 | |
AnnaBridge | 188:bcfe06ba3d64 | 59 | int stdio_uart_inited = 0; |
AnnaBridge | 188:bcfe06ba3d64 | 60 | serial_t stdio_uart; |
AnnaBridge | 188:bcfe06ba3d64 | 61 | |
AnnaBridge | 188:bcfe06ba3d64 | 62 | static void uart_swreset(TSB_UART_TypeDef *UARTx); |
AnnaBridge | 188:bcfe06ba3d64 | 63 | void serial_init(serial_t *obj, PinName tx, PinName rx) |
AnnaBridge | 188:bcfe06ba3d64 | 64 | { |
AnnaBridge | 188:bcfe06ba3d64 | 65 | int is_stdio_uart = 0; |
AnnaBridge | 188:bcfe06ba3d64 | 66 | obj->mode = 0; |
AnnaBridge | 188:bcfe06ba3d64 | 67 | cg_t paramCG; |
AnnaBridge | 188:bcfe06ba3d64 | 68 | paramCG.p_instance = TSB_CG; |
AnnaBridge | 188:bcfe06ba3d64 | 69 | uart_clock_t prescal = {0}; |
AnnaBridge | 188:bcfe06ba3d64 | 70 | |
AnnaBridge | 188:bcfe06ba3d64 | 71 | UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX); |
AnnaBridge | 188:bcfe06ba3d64 | 72 | UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX); |
AnnaBridge | 188:bcfe06ba3d64 | 73 | UARTName uart_name = (UARTName)pinmap_merge(uart_tx, uart_rx); |
AnnaBridge | 188:bcfe06ba3d64 | 74 | |
AnnaBridge | 188:bcfe06ba3d64 | 75 | MBED_ASSERT((int)uart_name != NC); |
AnnaBridge | 188:bcfe06ba3d64 | 76 | |
AnnaBridge | 188:bcfe06ba3d64 | 77 | obj->index = uart_name; |
AnnaBridge | 188:bcfe06ba3d64 | 78 | // Initialize UART instance |
AnnaBridge | 188:bcfe06ba3d64 | 79 | switch (uart_name) { |
AnnaBridge | 188:bcfe06ba3d64 | 80 | case SERIAL_0: |
AnnaBridge | 188:bcfe06ba3d64 | 81 | obj->UARTx = TSB_UART0; |
AnnaBridge | 188:bcfe06ba3d64 | 82 | // Enable clock for UART0 and Port E |
AnnaBridge | 188:bcfe06ba3d64 | 83 | TSB_CG_FSYSMENA_IPMENA23 = TXZ_ENABLE; |
AnnaBridge | 188:bcfe06ba3d64 | 84 | TSB_CG_FSYSMENB_IPMENB06 = TXZ_ENABLE; |
AnnaBridge | 188:bcfe06ba3d64 | 85 | break; |
AnnaBridge | 188:bcfe06ba3d64 | 86 | case SERIAL_1: |
AnnaBridge | 188:bcfe06ba3d64 | 87 | obj->UARTx = TSB_UART1; |
AnnaBridge | 188:bcfe06ba3d64 | 88 | // Enable clock for UART1 and Port H |
AnnaBridge | 188:bcfe06ba3d64 | 89 | TSB_CG_FSYSMENA_IPMENA24 = TXZ_ENABLE; |
AnnaBridge | 188:bcfe06ba3d64 | 90 | TSB_CG_FSYSMENB_IPMENB09 = TXZ_ENABLE; |
AnnaBridge | 188:bcfe06ba3d64 | 91 | break; |
AnnaBridge | 188:bcfe06ba3d64 | 92 | case SERIAL_2: |
AnnaBridge | 188:bcfe06ba3d64 | 93 | obj->UARTx = TSB_UART2; |
AnnaBridge | 188:bcfe06ba3d64 | 94 | // Enable clock for UART2 and Port G |
AnnaBridge | 188:bcfe06ba3d64 | 95 | TSB_CG_FSYSMENA_IPMENA25 = TXZ_ENABLE; |
AnnaBridge | 188:bcfe06ba3d64 | 96 | TSB_CG_FSYSMENB_IPMENB08 = TXZ_ENABLE; |
AnnaBridge | 188:bcfe06ba3d64 | 97 | break; |
AnnaBridge | 188:bcfe06ba3d64 | 98 | case SERIAL_3: |
AnnaBridge | 188:bcfe06ba3d64 | 99 | obj->UARTx = TSB_UART3; |
AnnaBridge | 188:bcfe06ba3d64 | 100 | // Enable clock for UART3 and Port U |
AnnaBridge | 188:bcfe06ba3d64 | 101 | TSB_CG_FSYSMENA_IPMENA26 = TXZ_ENABLE; |
AnnaBridge | 188:bcfe06ba3d64 | 102 | TSB_CG_FSYSMENB_IPMENB18 = TXZ_ENABLE; |
AnnaBridge | 188:bcfe06ba3d64 | 103 | break; |
AnnaBridge | 188:bcfe06ba3d64 | 104 | case SERIAL_4: |
AnnaBridge | 188:bcfe06ba3d64 | 105 | obj->UARTx = TSB_UART4; |
AnnaBridge | 188:bcfe06ba3d64 | 106 | // Enable clock for UART4 and Port U |
AnnaBridge | 188:bcfe06ba3d64 | 107 | TSB_CG_FSYSMENA_IPMENA27 = TXZ_ENABLE; |
AnnaBridge | 188:bcfe06ba3d64 | 108 | TSB_CG_FSYSMENB_IPMENB18 = TXZ_ENABLE; |
AnnaBridge | 188:bcfe06ba3d64 | 109 | break; |
AnnaBridge | 188:bcfe06ba3d64 | 110 | case SERIAL_5: |
AnnaBridge | 188:bcfe06ba3d64 | 111 | obj->UARTx = TSB_UART5; |
AnnaBridge | 188:bcfe06ba3d64 | 112 | // Enable clock for UART5 and Port J |
AnnaBridge | 188:bcfe06ba3d64 | 113 | TSB_CG_FSYSMENA_IPMENA28 = TXZ_ENABLE; |
AnnaBridge | 188:bcfe06ba3d64 | 114 | TSB_CG_FSYSMENB_IPMENB10 = TXZ_ENABLE; |
AnnaBridge | 188:bcfe06ba3d64 | 115 | break; |
AnnaBridge | 188:bcfe06ba3d64 | 116 | default: |
AnnaBridge | 188:bcfe06ba3d64 | 117 | break; |
AnnaBridge | 188:bcfe06ba3d64 | 118 | } |
AnnaBridge | 188:bcfe06ba3d64 | 119 | |
AnnaBridge | 188:bcfe06ba3d64 | 120 | // Set alternate function |
AnnaBridge | 188:bcfe06ba3d64 | 121 | pinmap_pinout(tx, PinMap_UART_TX); |
AnnaBridge | 188:bcfe06ba3d64 | 122 | pinmap_pinout(rx, PinMap_UART_RX); |
AnnaBridge | 188:bcfe06ba3d64 | 123 | |
AnnaBridge | 188:bcfe06ba3d64 | 124 | if (tx != NC && rx != NC) { |
AnnaBridge | 188:bcfe06ba3d64 | 125 | obj->mode = UART_ENABLE_RX | UART_ENABLE_TX; |
AnnaBridge | 188:bcfe06ba3d64 | 126 | } else { |
AnnaBridge | 188:bcfe06ba3d64 | 127 | if (tx != NC) { |
AnnaBridge | 188:bcfe06ba3d64 | 128 | obj->mode = UART_ENABLE_TX; |
AnnaBridge | 188:bcfe06ba3d64 | 129 | } else { |
AnnaBridge | 188:bcfe06ba3d64 | 130 | if (rx != NC) { |
AnnaBridge | 188:bcfe06ba3d64 | 131 | obj->mode = UART_ENABLE_RX; |
AnnaBridge | 188:bcfe06ba3d64 | 132 | } |
AnnaBridge | 188:bcfe06ba3d64 | 133 | } |
AnnaBridge | 188:bcfe06ba3d64 | 134 | } |
AnnaBridge | 188:bcfe06ba3d64 | 135 | |
AnnaBridge | 188:bcfe06ba3d64 | 136 | // Software reset |
AnnaBridge | 188:bcfe06ba3d64 | 137 | uart_swreset(obj->UARTx); |
AnnaBridge | 188:bcfe06ba3d64 | 138 | |
AnnaBridge | 188:bcfe06ba3d64 | 139 | // Mbed default configurations |
AnnaBridge | 188:bcfe06ba3d64 | 140 | obj->UARTx->CR0 |= (1U); // Data lengh 8 bit No parity one stop bit |
AnnaBridge | 188:bcfe06ba3d64 | 141 | prescal.prsel = UART_PLESCALER_1; |
AnnaBridge | 188:bcfe06ba3d64 | 142 | uart_get_boudrate_setting(cg_get_mphyt0(¶mCG), &prescal, BAUDRATE_DEFAULT, &obj->boud_obj); |
AnnaBridge | 188:bcfe06ba3d64 | 143 | |
AnnaBridge | 188:bcfe06ba3d64 | 144 | obj->UARTx->BRD |= ((obj->boud_obj.ken) | (obj->boud_obj.brk << 16) | (obj->boud_obj.brn)); |
AnnaBridge | 188:bcfe06ba3d64 | 145 | obj->UARTx->FIFOCLR = (UARTxFIFOCLR_TFCLR_CLEAR | UARTxFIFOCLR_RFCLR_CLEAR); // Clear FIFO |
AnnaBridge | 188:bcfe06ba3d64 | 146 | obj->UARTx->TRANS |= obj->mode; // Enable TX RX block. |
AnnaBridge | 188:bcfe06ba3d64 | 147 | obj->UARTx->CR1 = (UART_RX_FIFO_FILL_LEVEL | UART_TX_INT_ENABLE | UART_RX_INT_ENABLE); |
AnnaBridge | 188:bcfe06ba3d64 | 148 | |
AnnaBridge | 188:bcfe06ba3d64 | 149 | is_stdio_uart = (uart_name == STDIO_UART) ? (1) : (0); |
AnnaBridge | 188:bcfe06ba3d64 | 150 | if (is_stdio_uart) { |
AnnaBridge | 188:bcfe06ba3d64 | 151 | stdio_uart_inited = 1; |
AnnaBridge | 188:bcfe06ba3d64 | 152 | memcpy(&stdio_uart, obj, sizeof(serial_t)); |
AnnaBridge | 188:bcfe06ba3d64 | 153 | } |
AnnaBridge | 188:bcfe06ba3d64 | 154 | } |
AnnaBridge | 188:bcfe06ba3d64 | 155 | |
AnnaBridge | 188:bcfe06ba3d64 | 156 | void serial_free(serial_t *obj) |
AnnaBridge | 188:bcfe06ba3d64 | 157 | { |
AnnaBridge | 188:bcfe06ba3d64 | 158 | obj->UARTx->TRANS = CLR_REGISTER; |
AnnaBridge | 188:bcfe06ba3d64 | 159 | obj->UARTx->CR0 = CLR_REGISTER; |
AnnaBridge | 188:bcfe06ba3d64 | 160 | obj->UARTx->CR1 = CLR_REGISTER; |
AnnaBridge | 188:bcfe06ba3d64 | 161 | obj->UARTx = CLR_REGISTER; |
AnnaBridge | 188:bcfe06ba3d64 | 162 | uart_swreset(obj->UARTx); |
AnnaBridge | 188:bcfe06ba3d64 | 163 | obj->index = (uint32_t)NC; |
AnnaBridge | 188:bcfe06ba3d64 | 164 | } |
AnnaBridge | 188:bcfe06ba3d64 | 165 | |
AnnaBridge | 188:bcfe06ba3d64 | 166 | void serial_baud(serial_t *obj, int baudrate) |
AnnaBridge | 188:bcfe06ba3d64 | 167 | { |
AnnaBridge | 188:bcfe06ba3d64 | 168 | cg_t paramCG; |
AnnaBridge | 188:bcfe06ba3d64 | 169 | paramCG.p_instance = TSB_CG; |
AnnaBridge | 188:bcfe06ba3d64 | 170 | uart_clock_t prescal; |
AnnaBridge | 188:bcfe06ba3d64 | 171 | prescal.prsel = UART_PLESCALER_1; |
AnnaBridge | 188:bcfe06ba3d64 | 172 | uart_get_boudrate_setting(cg_get_mphyt0(¶mCG), &prescal, baudrate, &obj->boud_obj); |
AnnaBridge | 188:bcfe06ba3d64 | 173 | obj->UARTx->BRD = CLR_REGISTER; // Clear BRD register |
AnnaBridge | 188:bcfe06ba3d64 | 174 | obj->UARTx->BRD |= ((obj->boud_obj.ken) | (obj->boud_obj.brk << 16) | (obj->boud_obj.brn)); |
AnnaBridge | 188:bcfe06ba3d64 | 175 | } |
AnnaBridge | 188:bcfe06ba3d64 | 176 | |
AnnaBridge | 188:bcfe06ba3d64 | 177 | void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) |
AnnaBridge | 188:bcfe06ba3d64 | 178 | { |
AnnaBridge | 188:bcfe06ba3d64 | 179 | uint32_t parity_check = 0; |
AnnaBridge | 188:bcfe06ba3d64 | 180 | uint32_t data_length = 0; |
AnnaBridge | 188:bcfe06ba3d64 | 181 | uint32_t tmp = 0; |
AnnaBridge | 188:bcfe06ba3d64 | 182 | uint32_t sblen = 0; |
AnnaBridge | 188:bcfe06ba3d64 | 183 | |
AnnaBridge | 188:bcfe06ba3d64 | 184 | MBED_ASSERT((stop_bits == 1) || (stop_bits == 2)); |
AnnaBridge | 188:bcfe06ba3d64 | 185 | MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven)); |
AnnaBridge | 188:bcfe06ba3d64 | 186 | MBED_ASSERT((data_bits > 6) && (data_bits < 10)); // 0: 7 data bits ... 2: 9 data bits |
AnnaBridge | 188:bcfe06ba3d64 | 187 | |
AnnaBridge | 188:bcfe06ba3d64 | 188 | parity_check = ((parity == ParityOdd) ? 1 :((parity == ParityEven) ? 3 : 0)); |
AnnaBridge | 188:bcfe06ba3d64 | 189 | data_length = (data_bits == 8 ? 1 :((data_bits == 7) ? 0 : 2)); |
AnnaBridge | 188:bcfe06ba3d64 | 190 | sblen = (stop_bits == 1) ? 0 : 1; // 0: 1 stop bits, 1: 2 stop bits |
AnnaBridge | 188:bcfe06ba3d64 | 191 | tmp = ((sblen << 4) |(parity_check << 2) | data_length); |
AnnaBridge | 188:bcfe06ba3d64 | 192 | obj->UARTx->CR0 = tmp; |
AnnaBridge | 188:bcfe06ba3d64 | 193 | } |
AnnaBridge | 188:bcfe06ba3d64 | 194 | |
AnnaBridge | 188:bcfe06ba3d64 | 195 | // INTERRUPT HANDLING |
AnnaBridge | 188:bcfe06ba3d64 | 196 | void INTUART0RX_IRQHandler(void) |
AnnaBridge | 188:bcfe06ba3d64 | 197 | { |
AnnaBridge | 188:bcfe06ba3d64 | 198 | irq_handler(serial_irq_ids[SERIAL_0], RxIrq); |
AnnaBridge | 188:bcfe06ba3d64 | 199 | } |
AnnaBridge | 188:bcfe06ba3d64 | 200 | |
AnnaBridge | 188:bcfe06ba3d64 | 201 | void INTUART0TX_IRQHandler(void) |
AnnaBridge | 188:bcfe06ba3d64 | 202 | { |
AnnaBridge | 188:bcfe06ba3d64 | 203 | irq_handler(serial_irq_ids[SERIAL_0], TxIrq); |
AnnaBridge | 188:bcfe06ba3d64 | 204 | } |
AnnaBridge | 188:bcfe06ba3d64 | 205 | |
AnnaBridge | 188:bcfe06ba3d64 | 206 | void INTUART1RX_IRQHandler(void) |
AnnaBridge | 188:bcfe06ba3d64 | 207 | { |
AnnaBridge | 188:bcfe06ba3d64 | 208 | irq_handler(serial_irq_ids[SERIAL_1], RxIrq); |
AnnaBridge | 188:bcfe06ba3d64 | 209 | } |
AnnaBridge | 188:bcfe06ba3d64 | 210 | |
AnnaBridge | 188:bcfe06ba3d64 | 211 | void INTUART1TX_IRQHandler(void) |
AnnaBridge | 188:bcfe06ba3d64 | 212 | { |
AnnaBridge | 188:bcfe06ba3d64 | 213 | irq_handler(serial_irq_ids[SERIAL_1], TxIrq); |
AnnaBridge | 188:bcfe06ba3d64 | 214 | } |
AnnaBridge | 188:bcfe06ba3d64 | 215 | |
AnnaBridge | 188:bcfe06ba3d64 | 216 | void INTUART2RX_IRQHandler(void) |
AnnaBridge | 188:bcfe06ba3d64 | 217 | { |
AnnaBridge | 188:bcfe06ba3d64 | 218 | irq_handler(serial_irq_ids[SERIAL_2], RxIrq); |
AnnaBridge | 188:bcfe06ba3d64 | 219 | } |
AnnaBridge | 188:bcfe06ba3d64 | 220 | |
AnnaBridge | 188:bcfe06ba3d64 | 221 | void INTUART2TX_IRQHandler(void) |
AnnaBridge | 188:bcfe06ba3d64 | 222 | { |
AnnaBridge | 188:bcfe06ba3d64 | 223 | irq_handler(serial_irq_ids[SERIAL_2], TxIrq); |
AnnaBridge | 188:bcfe06ba3d64 | 224 | } |
AnnaBridge | 188:bcfe06ba3d64 | 225 | |
AnnaBridge | 188:bcfe06ba3d64 | 226 | void INTUART3RX_IRQHandler(void) |
AnnaBridge | 188:bcfe06ba3d64 | 227 | { |
AnnaBridge | 188:bcfe06ba3d64 | 228 | irq_handler(serial_irq_ids[SERIAL_3], RxIrq); |
AnnaBridge | 188:bcfe06ba3d64 | 229 | } |
AnnaBridge | 188:bcfe06ba3d64 | 230 | |
AnnaBridge | 188:bcfe06ba3d64 | 231 | void INTUART3TX_IRQHandler(void) |
AnnaBridge | 188:bcfe06ba3d64 | 232 | { |
AnnaBridge | 188:bcfe06ba3d64 | 233 | irq_handler(serial_irq_ids[SERIAL_3], TxIrq); |
AnnaBridge | 188:bcfe06ba3d64 | 234 | } |
AnnaBridge | 188:bcfe06ba3d64 | 235 | |
AnnaBridge | 188:bcfe06ba3d64 | 236 | void INTUART4RX_IRQHandler(void) |
AnnaBridge | 188:bcfe06ba3d64 | 237 | { |
AnnaBridge | 188:bcfe06ba3d64 | 238 | irq_handler(serial_irq_ids[SERIAL_4], RxIrq); |
AnnaBridge | 188:bcfe06ba3d64 | 239 | } |
AnnaBridge | 188:bcfe06ba3d64 | 240 | |
AnnaBridge | 188:bcfe06ba3d64 | 241 | void INTUART4TX_IRQHandler(void) |
AnnaBridge | 188:bcfe06ba3d64 | 242 | { |
AnnaBridge | 188:bcfe06ba3d64 | 243 | irq_handler(serial_irq_ids[SERIAL_4], TxIrq); |
AnnaBridge | 188:bcfe06ba3d64 | 244 | } |
AnnaBridge | 188:bcfe06ba3d64 | 245 | |
AnnaBridge | 188:bcfe06ba3d64 | 246 | void INTUART5RX_IRQHandler(void) |
AnnaBridge | 188:bcfe06ba3d64 | 247 | { |
AnnaBridge | 188:bcfe06ba3d64 | 248 | irq_handler(serial_irq_ids[SERIAL_5], RxIrq); |
AnnaBridge | 188:bcfe06ba3d64 | 249 | } |
AnnaBridge | 188:bcfe06ba3d64 | 250 | |
AnnaBridge | 188:bcfe06ba3d64 | 251 | void INTUART5TX_IRQHandler(void) |
AnnaBridge | 188:bcfe06ba3d64 | 252 | { |
AnnaBridge | 188:bcfe06ba3d64 | 253 | irq_handler(serial_irq_ids[SERIAL_5], TxIrq); |
AnnaBridge | 188:bcfe06ba3d64 | 254 | } |
AnnaBridge | 188:bcfe06ba3d64 | 255 | |
AnnaBridge | 188:bcfe06ba3d64 | 256 | void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) |
AnnaBridge | 188:bcfe06ba3d64 | 257 | { |
AnnaBridge | 188:bcfe06ba3d64 | 258 | irq_handler = handler; |
AnnaBridge | 188:bcfe06ba3d64 | 259 | serial_irq_ids[obj->index] = id; |
AnnaBridge | 188:bcfe06ba3d64 | 260 | } |
AnnaBridge | 188:bcfe06ba3d64 | 261 | |
AnnaBridge | 188:bcfe06ba3d64 | 262 | void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) |
AnnaBridge | 188:bcfe06ba3d64 | 263 | { |
AnnaBridge | 188:bcfe06ba3d64 | 264 | IRQn_Type irq_n = (IRQn_Type)0; |
AnnaBridge | 188:bcfe06ba3d64 | 265 | |
AnnaBridge | 188:bcfe06ba3d64 | 266 | switch (obj->index) { |
AnnaBridge | 188:bcfe06ba3d64 | 267 | case SERIAL_0: |
AnnaBridge | 188:bcfe06ba3d64 | 268 | if (irq == RxIrq) { |
AnnaBridge | 188:bcfe06ba3d64 | 269 | irq_n = INTUART0RX_IRQn; |
AnnaBridge | 188:bcfe06ba3d64 | 270 | } else { |
AnnaBridge | 188:bcfe06ba3d64 | 271 | irq_n = INTUART0TX_IRQn; |
AnnaBridge | 188:bcfe06ba3d64 | 272 | } |
AnnaBridge | 188:bcfe06ba3d64 | 273 | break; |
AnnaBridge | 188:bcfe06ba3d64 | 274 | case SERIAL_1: |
AnnaBridge | 188:bcfe06ba3d64 | 275 | if (irq == RxIrq) { |
AnnaBridge | 188:bcfe06ba3d64 | 276 | irq_n = INTUART1RX_IRQn; |
AnnaBridge | 188:bcfe06ba3d64 | 277 | } else { |
AnnaBridge | 188:bcfe06ba3d64 | 278 | irq_n = INTUART1TX_IRQn; |
AnnaBridge | 188:bcfe06ba3d64 | 279 | } |
AnnaBridge | 188:bcfe06ba3d64 | 280 | break; |
AnnaBridge | 188:bcfe06ba3d64 | 281 | case SERIAL_2: |
AnnaBridge | 188:bcfe06ba3d64 | 282 | if (irq == RxIrq) { |
AnnaBridge | 188:bcfe06ba3d64 | 283 | irq_n = INTUART2RX_IRQn; |
AnnaBridge | 188:bcfe06ba3d64 | 284 | } else { |
AnnaBridge | 188:bcfe06ba3d64 | 285 | irq_n = INTUART2TX_IRQn; |
AnnaBridge | 188:bcfe06ba3d64 | 286 | } |
AnnaBridge | 188:bcfe06ba3d64 | 287 | break; |
AnnaBridge | 188:bcfe06ba3d64 | 288 | case SERIAL_3: |
AnnaBridge | 188:bcfe06ba3d64 | 289 | if (irq == RxIrq) { |
AnnaBridge | 188:bcfe06ba3d64 | 290 | irq_n = INTUART3RX_IRQn; |
AnnaBridge | 188:bcfe06ba3d64 | 291 | } else { |
AnnaBridge | 188:bcfe06ba3d64 | 292 | irq_n = INTUART3TX_IRQn; |
AnnaBridge | 188:bcfe06ba3d64 | 293 | } |
AnnaBridge | 188:bcfe06ba3d64 | 294 | break; |
AnnaBridge | 188:bcfe06ba3d64 | 295 | case SERIAL_4: |
AnnaBridge | 188:bcfe06ba3d64 | 296 | if (irq == RxIrq) { |
AnnaBridge | 188:bcfe06ba3d64 | 297 | irq_n = INTUART4RX_IRQn; |
AnnaBridge | 188:bcfe06ba3d64 | 298 | } else { |
AnnaBridge | 188:bcfe06ba3d64 | 299 | irq_n = INTUART4TX_IRQn; |
AnnaBridge | 188:bcfe06ba3d64 | 300 | } |
AnnaBridge | 188:bcfe06ba3d64 | 301 | break; |
AnnaBridge | 188:bcfe06ba3d64 | 302 | case SERIAL_5: |
AnnaBridge | 188:bcfe06ba3d64 | 303 | if (irq == RxIrq) { |
AnnaBridge | 188:bcfe06ba3d64 | 304 | irq_n = INTUART5RX_IRQn; |
AnnaBridge | 188:bcfe06ba3d64 | 305 | } else { |
AnnaBridge | 188:bcfe06ba3d64 | 306 | irq_n = INTUART5TX_IRQn; |
AnnaBridge | 188:bcfe06ba3d64 | 307 | } |
AnnaBridge | 188:bcfe06ba3d64 | 308 | break; |
AnnaBridge | 188:bcfe06ba3d64 | 309 | default: |
AnnaBridge | 188:bcfe06ba3d64 | 310 | break; |
AnnaBridge | 188:bcfe06ba3d64 | 311 | } |
AnnaBridge | 188:bcfe06ba3d64 | 312 | |
AnnaBridge | 188:bcfe06ba3d64 | 313 | NVIC_ClearPendingIRQ(irq_n); |
AnnaBridge | 188:bcfe06ba3d64 | 314 | |
AnnaBridge | 188:bcfe06ba3d64 | 315 | if (enable) { |
AnnaBridge | 188:bcfe06ba3d64 | 316 | NVIC_EnableIRQ(irq_n); |
AnnaBridge | 188:bcfe06ba3d64 | 317 | } else { |
AnnaBridge | 188:bcfe06ba3d64 | 318 | NVIC_DisableIRQ(irq_n); |
AnnaBridge | 188:bcfe06ba3d64 | 319 | } |
AnnaBridge | 188:bcfe06ba3d64 | 320 | } |
AnnaBridge | 188:bcfe06ba3d64 | 321 | |
AnnaBridge | 188:bcfe06ba3d64 | 322 | int serial_getc(serial_t *obj) |
AnnaBridge | 188:bcfe06ba3d64 | 323 | { |
AnnaBridge | 188:bcfe06ba3d64 | 324 | int data = 0; |
AnnaBridge | 188:bcfe06ba3d64 | 325 | |
AnnaBridge | 188:bcfe06ba3d64 | 326 | while (!serial_readable(obj)) { // Wait until Rx buffer is full |
AnnaBridge | 188:bcfe06ba3d64 | 327 | // Do nothing |
AnnaBridge | 188:bcfe06ba3d64 | 328 | } |
AnnaBridge | 188:bcfe06ba3d64 | 329 | |
AnnaBridge | 188:bcfe06ba3d64 | 330 | // Read Data Register |
AnnaBridge | 188:bcfe06ba3d64 | 331 | data = (obj->UARTx->DR & 0xFFU); |
AnnaBridge | 188:bcfe06ba3d64 | 332 | obj->UARTx->SR |= (1U << 6); // Clear RXEND flag |
AnnaBridge | 188:bcfe06ba3d64 | 333 | |
AnnaBridge | 188:bcfe06ba3d64 | 334 | return data; |
AnnaBridge | 188:bcfe06ba3d64 | 335 | } |
AnnaBridge | 188:bcfe06ba3d64 | 336 | |
AnnaBridge | 188:bcfe06ba3d64 | 337 | void serial_putc(serial_t *obj, int c) |
AnnaBridge | 188:bcfe06ba3d64 | 338 | { |
AnnaBridge | 188:bcfe06ba3d64 | 339 | while (!serial_writable(obj)) { |
AnnaBridge | 188:bcfe06ba3d64 | 340 | // Do nothing |
AnnaBridge | 188:bcfe06ba3d64 | 341 | } |
AnnaBridge | 188:bcfe06ba3d64 | 342 | |
AnnaBridge | 188:bcfe06ba3d64 | 343 | // Write Data Register |
AnnaBridge | 188:bcfe06ba3d64 | 344 | obj->UARTx->DR = (c & 0xFF); |
AnnaBridge | 188:bcfe06ba3d64 | 345 | |
AnnaBridge | 188:bcfe06ba3d64 | 346 | while ((obj->UARTx->SR & (1U << 14)) == 0) { |
AnnaBridge | 188:bcfe06ba3d64 | 347 | // Do nothing |
AnnaBridge | 188:bcfe06ba3d64 | 348 | } |
AnnaBridge | 188:bcfe06ba3d64 | 349 | |
AnnaBridge | 188:bcfe06ba3d64 | 350 | obj->UARTx->SR |= (1U << 14); // Clear TXEND flag |
AnnaBridge | 188:bcfe06ba3d64 | 351 | } |
AnnaBridge | 188:bcfe06ba3d64 | 352 | |
AnnaBridge | 188:bcfe06ba3d64 | 353 | int serial_readable(serial_t *obj) |
AnnaBridge | 188:bcfe06ba3d64 | 354 | { |
AnnaBridge | 188:bcfe06ba3d64 | 355 | int ret = 0; |
AnnaBridge | 188:bcfe06ba3d64 | 356 | |
AnnaBridge | 188:bcfe06ba3d64 | 357 | if ((obj->UARTx->SR & 0x000F) != 0) { |
AnnaBridge | 188:bcfe06ba3d64 | 358 | ret = 1; |
AnnaBridge | 188:bcfe06ba3d64 | 359 | } |
AnnaBridge | 188:bcfe06ba3d64 | 360 | |
AnnaBridge | 188:bcfe06ba3d64 | 361 | return ret; |
AnnaBridge | 188:bcfe06ba3d64 | 362 | } |
AnnaBridge | 188:bcfe06ba3d64 | 363 | |
AnnaBridge | 188:bcfe06ba3d64 | 364 | int serial_writable(serial_t *obj) |
AnnaBridge | 188:bcfe06ba3d64 | 365 | { |
AnnaBridge | 188:bcfe06ba3d64 | 366 | int ret = 0; |
AnnaBridge | 188:bcfe06ba3d64 | 367 | |
AnnaBridge | 188:bcfe06ba3d64 | 368 | if ((obj->UARTx->SR & 0x8000) == 0) { |
AnnaBridge | 188:bcfe06ba3d64 | 369 | ret = 1; |
AnnaBridge | 188:bcfe06ba3d64 | 370 | } |
AnnaBridge | 188:bcfe06ba3d64 | 371 | |
AnnaBridge | 188:bcfe06ba3d64 | 372 | return ret; |
AnnaBridge | 188:bcfe06ba3d64 | 373 | } |
AnnaBridge | 188:bcfe06ba3d64 | 374 | |
AnnaBridge | 188:bcfe06ba3d64 | 375 | // Pause transmission |
AnnaBridge | 188:bcfe06ba3d64 | 376 | void serial_break_set(serial_t *obj) |
AnnaBridge | 188:bcfe06ba3d64 | 377 | { |
AnnaBridge | 188:bcfe06ba3d64 | 378 | obj->UARTx->TRANS |= 0x08; |
AnnaBridge | 188:bcfe06ba3d64 | 379 | } |
AnnaBridge | 188:bcfe06ba3d64 | 380 | |
AnnaBridge | 188:bcfe06ba3d64 | 381 | // Switch to normal transmission |
AnnaBridge | 188:bcfe06ba3d64 | 382 | void serial_break_clear(serial_t *obj) |
AnnaBridge | 188:bcfe06ba3d64 | 383 | { |
AnnaBridge | 188:bcfe06ba3d64 | 384 | obj->UARTx->TRANS &= ~(0x08); |
AnnaBridge | 188:bcfe06ba3d64 | 385 | } |
AnnaBridge | 188:bcfe06ba3d64 | 386 | |
AnnaBridge | 188:bcfe06ba3d64 | 387 | static void uart_swreset(TSB_UART_TypeDef *UARTx) |
AnnaBridge | 188:bcfe06ba3d64 | 388 | { |
AnnaBridge | 188:bcfe06ba3d64 | 389 | while (((UARTx->SWRST) & UARTxSWRST_SWRSTF_MASK) == UARTxSWRST_SWRSTF_RUN) { |
AnnaBridge | 188:bcfe06ba3d64 | 390 | // No process |
AnnaBridge | 188:bcfe06ba3d64 | 391 | } |
AnnaBridge | 188:bcfe06ba3d64 | 392 | |
AnnaBridge | 188:bcfe06ba3d64 | 393 | UARTx->SWRST = UARTxSWRST_SWRST_10; |
AnnaBridge | 188:bcfe06ba3d64 | 394 | UARTx->SWRST = UARTxSWRST_SWRST_01; |
AnnaBridge | 188:bcfe06ba3d64 | 395 | |
AnnaBridge | 188:bcfe06ba3d64 | 396 | while (((UARTx->SWRST) & UARTxSWRST_SWRSTF_MASK) == UARTxSWRST_SWRSTF_RUN) { |
AnnaBridge | 188:bcfe06ba3d64 | 397 | // No process |
AnnaBridge | 188:bcfe06ba3d64 | 398 | } |
AnnaBridge | 188:bcfe06ba3d64 | 399 | } |