mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_NUVOTON/TARGET_M451/us_ticker.c@188:bcfe06ba3d64, 2018-11-08 (annotated)
- Committer:
- AnnaBridge
- Date:
- Thu Nov 08 11:46:34 2018 +0000
- Revision:
- 188:bcfe06ba3d64
- Parent:
- 187:0387e8f68319
mbed-dev library. Release version 164
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 149:156823d33999 | 1 | /* mbed Microcontroller Library |
<> | 149:156823d33999 | 2 | * Copyright (c) 2015-2016 Nuvoton |
<> | 149:156823d33999 | 3 | * |
<> | 149:156823d33999 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
<> | 149:156823d33999 | 5 | * you may not use this file except in compliance with the License. |
<> | 149:156823d33999 | 6 | * You may obtain a copy of the License at |
<> | 149:156823d33999 | 7 | * |
<> | 149:156823d33999 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
<> | 149:156823d33999 | 9 | * |
<> | 149:156823d33999 | 10 | * Unless required by applicable law or agreed to in writing, software |
<> | 149:156823d33999 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
<> | 149:156823d33999 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
<> | 149:156823d33999 | 13 | * See the License for the specific language governing permissions and |
<> | 149:156823d33999 | 14 | * limitations under the License. |
<> | 149:156823d33999 | 15 | */ |
AnnaBridge | 182:a56a73fd2a6f | 16 | |
<> | 149:156823d33999 | 17 | #include "us_ticker_api.h" |
AnnaBridge | 187:0387e8f68319 | 18 | |
AnnaBridge | 187:0387e8f68319 | 19 | #if DEVICE_USTICKER |
AnnaBridge | 187:0387e8f68319 | 20 | |
<> | 149:156823d33999 | 21 | #include "sleep_api.h" |
<> | 149:156823d33999 | 22 | #include "mbed_assert.h" |
<> | 149:156823d33999 | 23 | #include "nu_modutil.h" |
<> | 149:156823d33999 | 24 | #include "nu_miscutil.h" |
<> | 149:156823d33999 | 25 | |
AnnaBridge | 182:a56a73fd2a6f | 26 | /* Micro seconds per second */ |
AnnaBridge | 182:a56a73fd2a6f | 27 | #define NU_US_PER_SEC 1000000 |
AnnaBridge | 182:a56a73fd2a6f | 28 | /* Timer clock per us_ticker tick */ |
AnnaBridge | 182:a56a73fd2a6f | 29 | #define NU_TMRCLK_PER_TICK 1 |
AnnaBridge | 182:a56a73fd2a6f | 30 | /* Timer clock per second */ |
AnnaBridge | 182:a56a73fd2a6f | 31 | #define NU_TMRCLK_PER_SEC (1000 * 1000) |
AnnaBridge | 182:a56a73fd2a6f | 32 | /* Timer max counter bit size */ |
AnnaBridge | 182:a56a73fd2a6f | 33 | #define NU_TMR_MAXCNT_BITSIZE 24 |
AnnaBridge | 182:a56a73fd2a6f | 34 | /* Timer max counter */ |
AnnaBridge | 182:a56a73fd2a6f | 35 | #define NU_TMR_MAXCNT ((1 << NU_TMR_MAXCNT_BITSIZE) - 1) |
<> | 149:156823d33999 | 36 | |
<> | 149:156823d33999 | 37 | static void tmr0_vec(void); |
<> | 149:156823d33999 | 38 | |
AnnaBridge | 182:a56a73fd2a6f | 39 | static const struct nu_modinit_s timer0_modinit = {TIMER_0, TMR0_MODULE, CLK_CLKSEL1_TMR0SEL_PCLK0, 0, TMR0_RST, TMR0_IRQn, (void *) tmr0_vec}; |
<> | 149:156823d33999 | 40 | |
AnnaBridge | 182:a56a73fd2a6f | 41 | #define TIMER_MODINIT timer0_modinit |
AnnaBridge | 182:a56a73fd2a6f | 42 | |
AnnaBridge | 187:0387e8f68319 | 43 | /* Track ticker status */ |
AnnaBridge | 187:0387e8f68319 | 44 | static volatile uint16_t ticker_inited = 0; |
<> | 149:156823d33999 | 45 | |
<> | 149:156823d33999 | 46 | #define TMR_CMP_MIN 2 |
<> | 149:156823d33999 | 47 | #define TMR_CMP_MAX 0xFFFFFFu |
<> | 149:156823d33999 | 48 | |
<> | 149:156823d33999 | 49 | void us_ticker_init(void) |
<> | 149:156823d33999 | 50 | { |
AnnaBridge | 182:a56a73fd2a6f | 51 | if (ticker_inited) { |
AnnaBridge | 187:0387e8f68319 | 52 | /* By HAL spec, ticker_init allows the ticker to keep counting and disables the |
AnnaBridge | 187:0387e8f68319 | 53 | * ticker interrupt. */ |
AnnaBridge | 187:0387e8f68319 | 54 | us_ticker_disable_interrupt(); |
<> | 149:156823d33999 | 55 | return; |
<> | 149:156823d33999 | 56 | } |
AnnaBridge | 182:a56a73fd2a6f | 57 | ticker_inited = 1; |
AnnaBridge | 182:a56a73fd2a6f | 58 | |
<> | 149:156823d33999 | 59 | // Reset IP |
AnnaBridge | 182:a56a73fd2a6f | 60 | SYS_ResetModule(TIMER_MODINIT.rsetidx); |
AnnaBridge | 182:a56a73fd2a6f | 61 | |
<> | 149:156823d33999 | 62 | // Select IP clock source |
AnnaBridge | 182:a56a73fd2a6f | 63 | CLK_SetModuleClock(TIMER_MODINIT.clkidx, TIMER_MODINIT.clksrc, TIMER_MODINIT.clkdiv); |
AnnaBridge | 182:a56a73fd2a6f | 64 | |
<> | 149:156823d33999 | 65 | // Enable IP clock |
AnnaBridge | 182:a56a73fd2a6f | 66 | CLK_EnableModuleClock(TIMER_MODINIT.clkidx); |
<> | 149:156823d33999 | 67 | |
AnnaBridge | 184:08ed48f1de7f | 68 | TIMER_T *timer_base = (TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname); |
AnnaBridge | 184:08ed48f1de7f | 69 | |
<> | 149:156823d33999 | 70 | // Timer for normal counter |
AnnaBridge | 184:08ed48f1de7f | 71 | uint32_t clk_timer = TIMER_GetModuleClock(timer_base); |
AnnaBridge | 182:a56a73fd2a6f | 72 | uint32_t prescale_timer = clk_timer / NU_TMRCLK_PER_SEC - 1; |
AnnaBridge | 182:a56a73fd2a6f | 73 | MBED_ASSERT((prescale_timer != (uint32_t) -1) && prescale_timer <= 127); |
AnnaBridge | 182:a56a73fd2a6f | 74 | MBED_ASSERT((clk_timer % NU_TMRCLK_PER_SEC) == 0); |
AnnaBridge | 182:a56a73fd2a6f | 75 | uint32_t cmp_timer = TMR_CMP_MAX; |
AnnaBridge | 182:a56a73fd2a6f | 76 | MBED_ASSERT(cmp_timer >= TMR_CMP_MIN && cmp_timer <= TMR_CMP_MAX); |
<> | 149:156823d33999 | 77 | // NOTE: TIMER_CTL_CNTDATEN_Msk exists in NUC472, but not in M451. In M451, TIMER_CNT is updated continuously by default. |
AnnaBridge | 184:08ed48f1de7f | 78 | timer_base->CTL = TIMER_CONTINUOUS_MODE | prescale_timer/* | TIMER_CTL_CNTDATEN_Msk*/; |
AnnaBridge | 184:08ed48f1de7f | 79 | timer_base->CMP = cmp_timer; |
AnnaBridge | 182:a56a73fd2a6f | 80 | |
AnnaBridge | 182:a56a73fd2a6f | 81 | NVIC_SetVector(TIMER_MODINIT.irq_n, (uint32_t) TIMER_MODINIT.var); |
AnnaBridge | 182:a56a73fd2a6f | 82 | |
AnnaBridge | 187:0387e8f68319 | 83 | NVIC_DisableIRQ(TIMER_MODINIT.irq_n); |
AnnaBridge | 182:a56a73fd2a6f | 84 | |
AnnaBridge | 184:08ed48f1de7f | 85 | TIMER_EnableInt(timer_base); |
AnnaBridge | 184:08ed48f1de7f | 86 | |
AnnaBridge | 184:08ed48f1de7f | 87 | TIMER_Start(timer_base); |
AnnaBridge | 184:08ed48f1de7f | 88 | /* Wait for timer to start counting and raise active flag */ |
AnnaBridge | 184:08ed48f1de7f | 89 | while(! (timer_base->CTL & TIMER_CTL_ACTSTS_Msk)); |
<> | 149:156823d33999 | 90 | } |
<> | 149:156823d33999 | 91 | |
AnnaBridge | 187:0387e8f68319 | 92 | void us_ticker_free(void) |
AnnaBridge | 187:0387e8f68319 | 93 | { |
AnnaBridge | 187:0387e8f68319 | 94 | /* Disable interrupt */ |
AnnaBridge | 187:0387e8f68319 | 95 | NVIC_DisableIRQ(TIMER_MODINIT.irq_n); |
AnnaBridge | 187:0387e8f68319 | 96 | |
AnnaBridge | 187:0387e8f68319 | 97 | /* Disable IP clock */ |
AnnaBridge | 187:0387e8f68319 | 98 | CLK_DisableModuleClock(TIMER_MODINIT.clkidx); |
AnnaBridge | 187:0387e8f68319 | 99 | |
AnnaBridge | 187:0387e8f68319 | 100 | ticker_inited = 0; |
AnnaBridge | 187:0387e8f68319 | 101 | } |
AnnaBridge | 187:0387e8f68319 | 102 | |
<> | 149:156823d33999 | 103 | uint32_t us_ticker_read() |
<> | 149:156823d33999 | 104 | { |
AnnaBridge | 182:a56a73fd2a6f | 105 | if (! ticker_inited) { |
<> | 149:156823d33999 | 106 | us_ticker_init(); |
<> | 149:156823d33999 | 107 | } |
<> | 149:156823d33999 | 108 | |
AnnaBridge | 184:08ed48f1de7f | 109 | TIMER_T *timer_base = (TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname); |
<> | 149:156823d33999 | 110 | |
AnnaBridge | 182:a56a73fd2a6f | 111 | return (TIMER_GetCounter(timer_base) / NU_TMRCLK_PER_TICK); |
<> | 149:156823d33999 | 112 | } |
<> | 149:156823d33999 | 113 | |
<> | 149:156823d33999 | 114 | void us_ticker_set_interrupt(timestamp_t timestamp) |
<> | 149:156823d33999 | 115 | { |
AnnaBridge | 188:bcfe06ba3d64 | 116 | /* Clear any previously pending interrupts */ |
AnnaBridge | 188:bcfe06ba3d64 | 117 | us_ticker_clear_interrupt(); |
AnnaBridge | 188:bcfe06ba3d64 | 118 | NVIC_ClearPendingIRQ(TIMER_MODINIT.irq_n); |
AnnaBridge | 188:bcfe06ba3d64 | 119 | |
AnnaBridge | 182:a56a73fd2a6f | 120 | /* In continuous mode, counter will be reset to zero with the following sequence: |
AnnaBridge | 182:a56a73fd2a6f | 121 | * 1. Stop counting |
AnnaBridge | 182:a56a73fd2a6f | 122 | * 2. Configure new CMP value |
AnnaBridge | 182:a56a73fd2a6f | 123 | * 3. Restart counting |
AnnaBridge | 182:a56a73fd2a6f | 124 | * |
AnnaBridge | 182:a56a73fd2a6f | 125 | * This behavior is not what we want. To fix it, we could configure new CMP value |
AnnaBridge | 182:a56a73fd2a6f | 126 | * without stopping counting first. |
AnnaBridge | 182:a56a73fd2a6f | 127 | */ |
AnnaBridge | 184:08ed48f1de7f | 128 | TIMER_T *timer_base = (TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname); |
AnnaBridge | 182:a56a73fd2a6f | 129 | |
AnnaBridge | 182:a56a73fd2a6f | 130 | /* NOTE: Because H/W timer requests min compare value, our implementation would have alarm delay of |
AnnaBridge | 182:a56a73fd2a6f | 131 | * (TMR_CMP_MIN - interval_clk) clocks when interval_clk is between [1, TMR_CMP_MIN). */ |
AnnaBridge | 182:a56a73fd2a6f | 132 | uint32_t cmp_timer = timestamp * NU_TMRCLK_PER_TICK; |
AnnaBridge | 182:a56a73fd2a6f | 133 | cmp_timer = NU_CLAMP(cmp_timer, TMR_CMP_MIN, TMR_CMP_MAX); |
AnnaBridge | 182:a56a73fd2a6f | 134 | timer_base->CMP = cmp_timer; |
AnnaBridge | 187:0387e8f68319 | 135 | |
AnnaBridge | 187:0387e8f68319 | 136 | /* We can call ticker_irq_handler now. */ |
AnnaBridge | 187:0387e8f68319 | 137 | NVIC_EnableIRQ(TIMER_MODINIT.irq_n); |
AnnaBridge | 182:a56a73fd2a6f | 138 | } |
AnnaBridge | 182:a56a73fd2a6f | 139 | |
AnnaBridge | 182:a56a73fd2a6f | 140 | void us_ticker_disable_interrupt(void) |
AnnaBridge | 182:a56a73fd2a6f | 141 | { |
AnnaBridge | 187:0387e8f68319 | 142 | /* We cannot call ticker_irq_handler now. */ |
AnnaBridge | 187:0387e8f68319 | 143 | NVIC_DisableIRQ(TIMER_MODINIT.irq_n); |
AnnaBridge | 182:a56a73fd2a6f | 144 | } |
AnnaBridge | 182:a56a73fd2a6f | 145 | |
AnnaBridge | 182:a56a73fd2a6f | 146 | void us_ticker_clear_interrupt(void) |
AnnaBridge | 182:a56a73fd2a6f | 147 | { |
AnnaBridge | 182:a56a73fd2a6f | 148 | TIMER_ClearIntFlag((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname)); |
AnnaBridge | 174:b96e65c34a4d | 149 | } |
AnnaBridge | 174:b96e65c34a4d | 150 | |
AnnaBridge | 174:b96e65c34a4d | 151 | void us_ticker_fire_interrupt(void) |
AnnaBridge | 174:b96e65c34a4d | 152 | { |
AnnaBridge | 182:a56a73fd2a6f | 153 | // NOTE: This event was in the past. Set the interrupt as pending, but don't process it here. |
AnnaBridge | 182:a56a73fd2a6f | 154 | // This prevents a recursive loop under heavy load which can lead to a stack overflow. |
AnnaBridge | 182:a56a73fd2a6f | 155 | NVIC_SetPendingIRQ(TIMER_MODINIT.irq_n); |
AnnaBridge | 187:0387e8f68319 | 156 | |
AnnaBridge | 187:0387e8f68319 | 157 | /* We can call ticker_irq_handler now. */ |
AnnaBridge | 187:0387e8f68319 | 158 | NVIC_EnableIRQ(TIMER_MODINIT.irq_n); |
AnnaBridge | 182:a56a73fd2a6f | 159 | } |
AnnaBridge | 182:a56a73fd2a6f | 160 | |
AnnaBridge | 182:a56a73fd2a6f | 161 | const ticker_info_t* us_ticker_get_info() |
AnnaBridge | 182:a56a73fd2a6f | 162 | { |
AnnaBridge | 182:a56a73fd2a6f | 163 | static const ticker_info_t info = { |
AnnaBridge | 182:a56a73fd2a6f | 164 | NU_TMRCLK_PER_SEC / NU_TMRCLK_PER_TICK, |
AnnaBridge | 182:a56a73fd2a6f | 165 | NU_TMR_MAXCNT_BITSIZE |
AnnaBridge | 182:a56a73fd2a6f | 166 | }; |
AnnaBridge | 182:a56a73fd2a6f | 167 | return &info; |
<> | 149:156823d33999 | 168 | } |
<> | 149:156823d33999 | 169 | |
<> | 149:156823d33999 | 170 | static void tmr0_vec(void) |
<> | 149:156823d33999 | 171 | { |
AnnaBridge | 187:0387e8f68319 | 172 | us_ticker_clear_interrupt(); |
AnnaBridge | 187:0387e8f68319 | 173 | |
AnnaBridge | 182:a56a73fd2a6f | 174 | // NOTE: us_ticker_set_interrupt() may get called in us_ticker_irq_handler(); |
AnnaBridge | 182:a56a73fd2a6f | 175 | us_ticker_irq_handler(); |
<> | 149:156823d33999 | 176 | } |
AnnaBridge | 187:0387e8f68319 | 177 | |
AnnaBridge | 187:0387e8f68319 | 178 | #endif |