mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

drivers/QSPI.cpp@188:bcfe06ba3d64, 2018-11-08 (annotated)

Committer:
AnnaBridge
Date:
Thu Nov 08 11:46:34 2018 +0000
Revision:
188:bcfe06ba3d64
Child:
189:f392fc9709a3
mbed-dev library. Release version 164

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 188:bcfe06ba3d64 1 /* mbed Microcontroller Library
AnnaBridge 188:bcfe06ba3d64 2 * Copyright (c) 2006-2018 ARM Limited
AnnaBridge 188:bcfe06ba3d64 3 *
AnnaBridge 188:bcfe06ba3d64 4 * Licensed under the Apache License, Version 2.0 (the "License");
AnnaBridge 188:bcfe06ba3d64 5 * you may not use this file except in compliance with the License.
AnnaBridge 188:bcfe06ba3d64 6 * You may obtain a copy of the License at
AnnaBridge 188:bcfe06ba3d64 7 *
AnnaBridge 188:bcfe06ba3d64 8 * http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 188:bcfe06ba3d64 9 *
AnnaBridge 188:bcfe06ba3d64 10 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 188:bcfe06ba3d64 11 * distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 188:bcfe06ba3d64 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 188:bcfe06ba3d64 13 * See the License for the specific language governing permissions and
AnnaBridge 188:bcfe06ba3d64 14 * limitations under the License.
AnnaBridge 188:bcfe06ba3d64 15 */
AnnaBridge 188:bcfe06ba3d64 16
AnnaBridge 188:bcfe06ba3d64 17 #include "drivers/QSPI.h"
AnnaBridge 188:bcfe06ba3d64 18 #include "platform/mbed_critical.h"
AnnaBridge 188:bcfe06ba3d64 19 #include <string.h>
AnnaBridge 188:bcfe06ba3d64 20
AnnaBridge 188:bcfe06ba3d64 21 #if DEVICE_QSPI
AnnaBridge 188:bcfe06ba3d64 22
AnnaBridge 188:bcfe06ba3d64 23 namespace mbed {
AnnaBridge 188:bcfe06ba3d64 24
AnnaBridge 188:bcfe06ba3d64 25 QSPI *QSPI::_owner = NULL;
AnnaBridge 188:bcfe06ba3d64 26 SingletonPtr<PlatformMutex> QSPI::_mutex;
AnnaBridge 188:bcfe06ba3d64 27
AnnaBridge 188:bcfe06ba3d64 28 QSPI::QSPI(PinName io0, PinName io1, PinName io2, PinName io3, PinName sclk, PinName ssel, int mode) : _qspi()
AnnaBridge 188:bcfe06ba3d64 29 {
AnnaBridge 188:bcfe06ba3d64 30 _qspi_io0 = io0;
AnnaBridge 188:bcfe06ba3d64 31 _qspi_io1 = io1;
AnnaBridge 188:bcfe06ba3d64 32 _qspi_io2 = io2;
AnnaBridge 188:bcfe06ba3d64 33 _qspi_io3 = io3;
AnnaBridge 188:bcfe06ba3d64 34 _qspi_clk = sclk;
AnnaBridge 188:bcfe06ba3d64 35 _qspi_cs = ssel;
AnnaBridge 188:bcfe06ba3d64 36 _inst_width = QSPI_CFG_BUS_SINGLE;
AnnaBridge 188:bcfe06ba3d64 37 _address_width = QSPI_CFG_BUS_SINGLE;
AnnaBridge 188:bcfe06ba3d64 38 _address_size = QSPI_CFG_ADDR_SIZE_24;
AnnaBridge 188:bcfe06ba3d64 39 _alt_width = QSPI_CFG_BUS_SINGLE;
AnnaBridge 188:bcfe06ba3d64 40 _alt_size = QSPI_CFG_ALT_SIZE_8;
AnnaBridge 188:bcfe06ba3d64 41 _data_width = QSPI_CFG_BUS_SINGLE;
AnnaBridge 188:bcfe06ba3d64 42 _num_dummy_cycles = 0;
AnnaBridge 188:bcfe06ba3d64 43 _mode = mode;
AnnaBridge 188:bcfe06ba3d64 44 _hz = ONE_MHZ;
AnnaBridge 188:bcfe06ba3d64 45 _initialized = false;
AnnaBridge 188:bcfe06ba3d64 46
AnnaBridge 188:bcfe06ba3d64 47 //Go ahead init the device here with the default config
AnnaBridge 188:bcfe06ba3d64 48 bool success = _initialize();
AnnaBridge 188:bcfe06ba3d64 49 MBED_ASSERT(success);
AnnaBridge 188:bcfe06ba3d64 50 }
AnnaBridge 188:bcfe06ba3d64 51
AnnaBridge 188:bcfe06ba3d64 52 qspi_status_t QSPI::configure_format(qspi_bus_width_t inst_width, qspi_bus_width_t address_width, qspi_address_size_t address_size, qspi_bus_width_t alt_width, qspi_alt_size_t alt_size, qspi_bus_width_t data_width, int dummy_cycles)
AnnaBridge 188:bcfe06ba3d64 53 {
AnnaBridge 188:bcfe06ba3d64 54 qspi_status_t ret_status = QSPI_STATUS_OK;
AnnaBridge 188:bcfe06ba3d64 55
AnnaBridge 188:bcfe06ba3d64 56 lock();
AnnaBridge 188:bcfe06ba3d64 57 _inst_width = inst_width;
AnnaBridge 188:bcfe06ba3d64 58 _address_width = address_width;
AnnaBridge 188:bcfe06ba3d64 59 _address_size = address_size;
AnnaBridge 188:bcfe06ba3d64 60 _alt_width = alt_width;
AnnaBridge 188:bcfe06ba3d64 61 _alt_size = alt_size;
AnnaBridge 188:bcfe06ba3d64 62 _data_width = data_width;
AnnaBridge 188:bcfe06ba3d64 63 _num_dummy_cycles = dummy_cycles;
AnnaBridge 188:bcfe06ba3d64 64
AnnaBridge 188:bcfe06ba3d64 65 unlock();
AnnaBridge 188:bcfe06ba3d64 66
AnnaBridge 188:bcfe06ba3d64 67 return ret_status;
AnnaBridge 188:bcfe06ba3d64 68 }
AnnaBridge 188:bcfe06ba3d64 69
AnnaBridge 188:bcfe06ba3d64 70 qspi_status_t QSPI::set_frequency(int hz)
AnnaBridge 188:bcfe06ba3d64 71 {
AnnaBridge 188:bcfe06ba3d64 72 qspi_status_t ret_status = QSPI_STATUS_OK;
AnnaBridge 188:bcfe06ba3d64 73
AnnaBridge 188:bcfe06ba3d64 74 if (_initialized) {
AnnaBridge 188:bcfe06ba3d64 75 lock();
AnnaBridge 188:bcfe06ba3d64 76 _hz = hz;
AnnaBridge 188:bcfe06ba3d64 77 //If the same owner, just change freq.
AnnaBridge 188:bcfe06ba3d64 78 //Otherwise we may have to change mode as well, so call _acquire
AnnaBridge 188:bcfe06ba3d64 79 if (_owner == this) {
AnnaBridge 188:bcfe06ba3d64 80 if (QSPI_STATUS_OK != qspi_frequency(&_qspi, _hz)) {
AnnaBridge 188:bcfe06ba3d64 81 ret_status = QSPI_STATUS_ERROR;
AnnaBridge 188:bcfe06ba3d64 82 }
AnnaBridge 188:bcfe06ba3d64 83 } else {
AnnaBridge 188:bcfe06ba3d64 84 _acquire();
AnnaBridge 188:bcfe06ba3d64 85 }
AnnaBridge 188:bcfe06ba3d64 86 unlock();
AnnaBridge 188:bcfe06ba3d64 87 } else {
AnnaBridge 188:bcfe06ba3d64 88 ret_status = QSPI_STATUS_ERROR;
AnnaBridge 188:bcfe06ba3d64 89 }
AnnaBridge 188:bcfe06ba3d64 90
AnnaBridge 188:bcfe06ba3d64 91 return ret_status;
AnnaBridge 188:bcfe06ba3d64 92 }
AnnaBridge 188:bcfe06ba3d64 93
AnnaBridge 188:bcfe06ba3d64 94 qspi_status_t QSPI::read(int address, char *rx_buffer, size_t *rx_length)
AnnaBridge 188:bcfe06ba3d64 95 {
AnnaBridge 188:bcfe06ba3d64 96 qspi_status_t ret_status = QSPI_STATUS_ERROR;
AnnaBridge 188:bcfe06ba3d64 97
AnnaBridge 188:bcfe06ba3d64 98 if (_initialized) {
AnnaBridge 188:bcfe06ba3d64 99 if ((rx_length != NULL) && (rx_buffer != NULL)) {
AnnaBridge 188:bcfe06ba3d64 100 if (*rx_length != 0) {
AnnaBridge 188:bcfe06ba3d64 101 lock();
AnnaBridge 188:bcfe06ba3d64 102 if (true == _acquire()) {
AnnaBridge 188:bcfe06ba3d64 103 _build_qspi_command(-1, address, -1);
AnnaBridge 188:bcfe06ba3d64 104 if (QSPI_STATUS_OK == qspi_read(&_qspi, &_qspi_command, rx_buffer, rx_length)) {
AnnaBridge 188:bcfe06ba3d64 105 ret_status = QSPI_STATUS_OK;
AnnaBridge 188:bcfe06ba3d64 106 }
AnnaBridge 188:bcfe06ba3d64 107 }
AnnaBridge 188:bcfe06ba3d64 108 unlock();
AnnaBridge 188:bcfe06ba3d64 109 }
AnnaBridge 188:bcfe06ba3d64 110 } else {
AnnaBridge 188:bcfe06ba3d64 111 ret_status = QSPI_STATUS_INVALID_PARAMETER;
AnnaBridge 188:bcfe06ba3d64 112 }
AnnaBridge 188:bcfe06ba3d64 113 }
AnnaBridge 188:bcfe06ba3d64 114
AnnaBridge 188:bcfe06ba3d64 115 return ret_status;
AnnaBridge 188:bcfe06ba3d64 116 }
AnnaBridge 188:bcfe06ba3d64 117
AnnaBridge 188:bcfe06ba3d64 118 qspi_status_t QSPI::write(int address, const char *tx_buffer, size_t *tx_length)
AnnaBridge 188:bcfe06ba3d64 119 {
AnnaBridge 188:bcfe06ba3d64 120 qspi_status_t ret_status = QSPI_STATUS_ERROR;
AnnaBridge 188:bcfe06ba3d64 121
AnnaBridge 188:bcfe06ba3d64 122 if (_initialized) {
AnnaBridge 188:bcfe06ba3d64 123 if ((tx_length != NULL) && (tx_buffer != NULL)) {
AnnaBridge 188:bcfe06ba3d64 124 if (*tx_length != 0) {
AnnaBridge 188:bcfe06ba3d64 125 lock();
AnnaBridge 188:bcfe06ba3d64 126 if (true == _acquire()) {
AnnaBridge 188:bcfe06ba3d64 127 _build_qspi_command(-1, address, -1);
AnnaBridge 188:bcfe06ba3d64 128 if (QSPI_STATUS_OK == qspi_write(&_qspi, &_qspi_command, tx_buffer, tx_length)) {
AnnaBridge 188:bcfe06ba3d64 129 ret_status = QSPI_STATUS_OK;
AnnaBridge 188:bcfe06ba3d64 130 }
AnnaBridge 188:bcfe06ba3d64 131 }
AnnaBridge 188:bcfe06ba3d64 132 unlock();
AnnaBridge 188:bcfe06ba3d64 133 }
AnnaBridge 188:bcfe06ba3d64 134 } else {
AnnaBridge 188:bcfe06ba3d64 135 ret_status = QSPI_STATUS_INVALID_PARAMETER;
AnnaBridge 188:bcfe06ba3d64 136 }
AnnaBridge 188:bcfe06ba3d64 137 }
AnnaBridge 188:bcfe06ba3d64 138
AnnaBridge 188:bcfe06ba3d64 139 return ret_status;
AnnaBridge 188:bcfe06ba3d64 140 }
AnnaBridge 188:bcfe06ba3d64 141
AnnaBridge 188:bcfe06ba3d64 142 qspi_status_t QSPI::read(int instruction, int alt, int address, char *rx_buffer, size_t *rx_length)
AnnaBridge 188:bcfe06ba3d64 143 {
AnnaBridge 188:bcfe06ba3d64 144 qspi_status_t ret_status = QSPI_STATUS_ERROR;
AnnaBridge 188:bcfe06ba3d64 145
AnnaBridge 188:bcfe06ba3d64 146 if (_initialized) {
AnnaBridge 188:bcfe06ba3d64 147 if ((rx_length != NULL) && (rx_buffer != NULL)) {
AnnaBridge 188:bcfe06ba3d64 148 if (*rx_length != 0) {
AnnaBridge 188:bcfe06ba3d64 149 lock();
AnnaBridge 188:bcfe06ba3d64 150 if (true == _acquire()) {
AnnaBridge 188:bcfe06ba3d64 151 _build_qspi_command(instruction, address, alt);
AnnaBridge 188:bcfe06ba3d64 152 if (QSPI_STATUS_OK == qspi_read(&_qspi, &_qspi_command, rx_buffer, rx_length)) {
AnnaBridge 188:bcfe06ba3d64 153 ret_status = QSPI_STATUS_OK;
AnnaBridge 188:bcfe06ba3d64 154 }
AnnaBridge 188:bcfe06ba3d64 155 }
AnnaBridge 188:bcfe06ba3d64 156 unlock();
AnnaBridge 188:bcfe06ba3d64 157 }
AnnaBridge 188:bcfe06ba3d64 158 } else {
AnnaBridge 188:bcfe06ba3d64 159 ret_status = QSPI_STATUS_INVALID_PARAMETER;
AnnaBridge 188:bcfe06ba3d64 160 }
AnnaBridge 188:bcfe06ba3d64 161 }
AnnaBridge 188:bcfe06ba3d64 162
AnnaBridge 188:bcfe06ba3d64 163 return ret_status;
AnnaBridge 188:bcfe06ba3d64 164 }
AnnaBridge 188:bcfe06ba3d64 165
AnnaBridge 188:bcfe06ba3d64 166 qspi_status_t QSPI::write(int instruction, int alt, int address, const char *tx_buffer, size_t *tx_length)
AnnaBridge 188:bcfe06ba3d64 167 {
AnnaBridge 188:bcfe06ba3d64 168 qspi_status_t ret_status = QSPI_STATUS_ERROR;
AnnaBridge 188:bcfe06ba3d64 169
AnnaBridge 188:bcfe06ba3d64 170 if (_initialized) {
AnnaBridge 188:bcfe06ba3d64 171 if ((tx_length != NULL) && (tx_buffer != NULL)) {
AnnaBridge 188:bcfe06ba3d64 172 if (*tx_length != 0) {
AnnaBridge 188:bcfe06ba3d64 173 lock();
AnnaBridge 188:bcfe06ba3d64 174 if (true == _acquire()) {
AnnaBridge 188:bcfe06ba3d64 175 _build_qspi_command(instruction, address, alt);
AnnaBridge 188:bcfe06ba3d64 176 if (QSPI_STATUS_OK == qspi_write(&_qspi, &_qspi_command, tx_buffer, tx_length)) {
AnnaBridge 188:bcfe06ba3d64 177 ret_status = QSPI_STATUS_OK;
AnnaBridge 188:bcfe06ba3d64 178 }
AnnaBridge 188:bcfe06ba3d64 179 }
AnnaBridge 188:bcfe06ba3d64 180 unlock();
AnnaBridge 188:bcfe06ba3d64 181 }
AnnaBridge 188:bcfe06ba3d64 182 } else {
AnnaBridge 188:bcfe06ba3d64 183 ret_status = QSPI_STATUS_INVALID_PARAMETER;
AnnaBridge 188:bcfe06ba3d64 184 }
AnnaBridge 188:bcfe06ba3d64 185 }
AnnaBridge 188:bcfe06ba3d64 186
AnnaBridge 188:bcfe06ba3d64 187 return ret_status;
AnnaBridge 188:bcfe06ba3d64 188 }
AnnaBridge 188:bcfe06ba3d64 189
AnnaBridge 188:bcfe06ba3d64 190 qspi_status_t QSPI::command_transfer(int instruction, int address, const char *tx_buffer, size_t tx_length, const char *rx_buffer, size_t rx_length)
AnnaBridge 188:bcfe06ba3d64 191 {
AnnaBridge 188:bcfe06ba3d64 192 qspi_status_t ret_status = QSPI_STATUS_ERROR;
AnnaBridge 188:bcfe06ba3d64 193
AnnaBridge 188:bcfe06ba3d64 194 if (_initialized) {
AnnaBridge 188:bcfe06ba3d64 195 lock();
AnnaBridge 188:bcfe06ba3d64 196 if (true == _acquire()) {
AnnaBridge 188:bcfe06ba3d64 197 _build_qspi_command(instruction, address, -1); //We just need the command
AnnaBridge 188:bcfe06ba3d64 198 if (QSPI_STATUS_OK == qspi_command_transfer(&_qspi, &_qspi_command, (const void *)tx_buffer, tx_length, (void *)rx_buffer, rx_length)) {
AnnaBridge 188:bcfe06ba3d64 199 ret_status = QSPI_STATUS_OK;
AnnaBridge 188:bcfe06ba3d64 200 }
AnnaBridge 188:bcfe06ba3d64 201 }
AnnaBridge 188:bcfe06ba3d64 202 unlock();
AnnaBridge 188:bcfe06ba3d64 203 }
AnnaBridge 188:bcfe06ba3d64 204
AnnaBridge 188:bcfe06ba3d64 205 return ret_status;
AnnaBridge 188:bcfe06ba3d64 206 }
AnnaBridge 188:bcfe06ba3d64 207
AnnaBridge 188:bcfe06ba3d64 208 void QSPI::lock()
AnnaBridge 188:bcfe06ba3d64 209 {
AnnaBridge 188:bcfe06ba3d64 210 _mutex->lock();
AnnaBridge 188:bcfe06ba3d64 211 }
AnnaBridge 188:bcfe06ba3d64 212
AnnaBridge 188:bcfe06ba3d64 213 void QSPI::unlock()
AnnaBridge 188:bcfe06ba3d64 214 {
AnnaBridge 188:bcfe06ba3d64 215 _mutex->unlock();
AnnaBridge 188:bcfe06ba3d64 216 }
AnnaBridge 188:bcfe06ba3d64 217
AnnaBridge 188:bcfe06ba3d64 218 // Note: Private helper function to initialize qspi HAL
AnnaBridge 188:bcfe06ba3d64 219 bool QSPI::_initialize()
AnnaBridge 188:bcfe06ba3d64 220 {
AnnaBridge 188:bcfe06ba3d64 221 if (_mode != 0 && _mode != 1) {
AnnaBridge 188:bcfe06ba3d64 222 _initialized = false;
AnnaBridge 188:bcfe06ba3d64 223 return _initialized;
AnnaBridge 188:bcfe06ba3d64 224 }
AnnaBridge 188:bcfe06ba3d64 225
AnnaBridge 188:bcfe06ba3d64 226 qspi_status_t ret = qspi_init(&_qspi, _qspi_io0, _qspi_io1, _qspi_io2, _qspi_io3, _qspi_clk, _qspi_cs, _hz, _mode);
AnnaBridge 188:bcfe06ba3d64 227 if (QSPI_STATUS_OK == ret) {
AnnaBridge 188:bcfe06ba3d64 228 _initialized = true;
AnnaBridge 188:bcfe06ba3d64 229 } else {
AnnaBridge 188:bcfe06ba3d64 230 _initialized = false;
AnnaBridge 188:bcfe06ba3d64 231 }
AnnaBridge 188:bcfe06ba3d64 232
AnnaBridge 188:bcfe06ba3d64 233 return _initialized;
AnnaBridge 188:bcfe06ba3d64 234 }
AnnaBridge 188:bcfe06ba3d64 235
AnnaBridge 188:bcfe06ba3d64 236 // Note: Private function with no locking
AnnaBridge 188:bcfe06ba3d64 237 bool QSPI::_acquire()
AnnaBridge 188:bcfe06ba3d64 238 {
AnnaBridge 188:bcfe06ba3d64 239 if (_owner != this) {
AnnaBridge 188:bcfe06ba3d64 240 //This will set freq as well
AnnaBridge 188:bcfe06ba3d64 241 _initialize();
AnnaBridge 188:bcfe06ba3d64 242 _owner = this;
AnnaBridge 188:bcfe06ba3d64 243 }
AnnaBridge 188:bcfe06ba3d64 244
AnnaBridge 188:bcfe06ba3d64 245 return _initialized;
AnnaBridge 188:bcfe06ba3d64 246 }
AnnaBridge 188:bcfe06ba3d64 247
AnnaBridge 188:bcfe06ba3d64 248 void QSPI::_build_qspi_command(int instruction, int address, int alt)
AnnaBridge 188:bcfe06ba3d64 249 {
AnnaBridge 188:bcfe06ba3d64 250 memset(&_qspi_command, 0, sizeof(qspi_command_t));
AnnaBridge 188:bcfe06ba3d64 251 //Set up instruction phase parameters
AnnaBridge 188:bcfe06ba3d64 252 _qspi_command.instruction.bus_width = _inst_width;
AnnaBridge 188:bcfe06ba3d64 253 if (instruction != -1) {
AnnaBridge 188:bcfe06ba3d64 254 _qspi_command.instruction.value = instruction;
AnnaBridge 188:bcfe06ba3d64 255 _qspi_command.instruction.disabled = false;
AnnaBridge 188:bcfe06ba3d64 256 } else {
AnnaBridge 188:bcfe06ba3d64 257 _qspi_command.instruction.disabled = true;
AnnaBridge 188:bcfe06ba3d64 258 }
AnnaBridge 188:bcfe06ba3d64 259
AnnaBridge 188:bcfe06ba3d64 260 //Set up address phase parameters
AnnaBridge 188:bcfe06ba3d64 261 _qspi_command.address.bus_width = _address_width;
AnnaBridge 188:bcfe06ba3d64 262 _qspi_command.address.size = _address_size;
AnnaBridge 188:bcfe06ba3d64 263 if (address != -1) {
AnnaBridge 188:bcfe06ba3d64 264 _qspi_command.address.value = address;
AnnaBridge 188:bcfe06ba3d64 265 _qspi_command.address.disabled = false;
AnnaBridge 188:bcfe06ba3d64 266 } else {
AnnaBridge 188:bcfe06ba3d64 267 _qspi_command.address.disabled = true;
AnnaBridge 188:bcfe06ba3d64 268 }
AnnaBridge 188:bcfe06ba3d64 269
AnnaBridge 188:bcfe06ba3d64 270 //Set up alt phase parameters
AnnaBridge 188:bcfe06ba3d64 271 _qspi_command.alt.bus_width = _alt_width;
AnnaBridge 188:bcfe06ba3d64 272 _qspi_command.alt.size = _alt_size;
AnnaBridge 188:bcfe06ba3d64 273 if (alt != -1) {
AnnaBridge 188:bcfe06ba3d64 274 _qspi_command.alt.value = alt;
AnnaBridge 188:bcfe06ba3d64 275 _qspi_command.alt.disabled = false;
AnnaBridge 188:bcfe06ba3d64 276 } else {
AnnaBridge 188:bcfe06ba3d64 277 _qspi_command.alt.disabled = true;
AnnaBridge 188:bcfe06ba3d64 278 }
AnnaBridge 188:bcfe06ba3d64 279
AnnaBridge 188:bcfe06ba3d64 280 _qspi_command.dummy_count = _num_dummy_cycles;
AnnaBridge 188:bcfe06ba3d64 281
AnnaBridge 188:bcfe06ba3d64 282 //Set up bus width for data phase
AnnaBridge 188:bcfe06ba3d64 283 _qspi_command.data.bus_width = _data_width;
AnnaBridge 188:bcfe06ba3d64 284 }
AnnaBridge 188:bcfe06ba3d64 285
AnnaBridge 188:bcfe06ba3d64 286 } // namespace mbed
AnnaBridge 188:bcfe06ba3d64 287
AnnaBridge 188:bcfe06ba3d64 288 #endif