mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_NUVOTON/TARGET_NANO100/i2c_api.c@174:b96e65c34a4d, 2017-10-02 (annotated)

Committer:
AnnaBridge
Date:
Mon Oct 02 15:33:19 2017 +0100
Revision:
174:b96e65c34a4d
Child:
176:447f873cad2f
This updates the lib to the mbed lib v 152

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 174:b96e65c34a4d 1 /* mbed Microcontroller Library
AnnaBridge 174:b96e65c34a4d 2 * Copyright (c) 2015-2017 Nuvoton
AnnaBridge 174:b96e65c34a4d 3 *
AnnaBridge 174:b96e65c34a4d 4 * Licensed under the Apache License, Version 2.0 (the "License");
AnnaBridge 174:b96e65c34a4d 5 * you may not use this file except in compliance with the License.
AnnaBridge 174:b96e65c34a4d 6 * You may obtain a copy of the License at
AnnaBridge 174:b96e65c34a4d 7 *
AnnaBridge 174:b96e65c34a4d 8 * http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 174:b96e65c34a4d 9 *
AnnaBridge 174:b96e65c34a4d 10 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 174:b96e65c34a4d 11 * distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 174:b96e65c34a4d 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 174:b96e65c34a4d 13 * See the License for the specific language governing permissions and
AnnaBridge 174:b96e65c34a4d 14 * limitations under the License.
AnnaBridge 174:b96e65c34a4d 15 */
AnnaBridge 174:b96e65c34a4d 16
AnnaBridge 174:b96e65c34a4d 17 #include "i2c_api.h"
AnnaBridge 174:b96e65c34a4d 18
AnnaBridge 174:b96e65c34a4d 19 #if DEVICE_I2C
AnnaBridge 174:b96e65c34a4d 20
AnnaBridge 174:b96e65c34a4d 21 #include "cmsis.h"
AnnaBridge 174:b96e65c34a4d 22 #include "pinmap.h"
AnnaBridge 174:b96e65c34a4d 23 #include "PeripheralPins.h"
AnnaBridge 174:b96e65c34a4d 24 #include "nu_modutil.h"
AnnaBridge 174:b96e65c34a4d 25 #include "nu_miscutil.h"
AnnaBridge 174:b96e65c34a4d 26 #include "nu_bitutil.h"
AnnaBridge 174:b96e65c34a4d 27 #include "mbed_critical.h"
AnnaBridge 174:b96e65c34a4d 28
AnnaBridge 174:b96e65c34a4d 29 #define NU_I2C_DEBUG 0
AnnaBridge 174:b96e65c34a4d 30
AnnaBridge 174:b96e65c34a4d 31 #if NU_I2C_DEBUG
AnnaBridge 174:b96e65c34a4d 32 struct i2c_s MY_I2C;
AnnaBridge 174:b96e65c34a4d 33 struct i2c_s MY_I2C_2;
AnnaBridge 174:b96e65c34a4d 34 char MY_I2C_STATUS[64];
AnnaBridge 174:b96e65c34a4d 35 int MY_I2C_STATUS_POS = 0;
AnnaBridge 174:b96e65c34a4d 36 uint32_t MY_I2C_TIMEOUT;
AnnaBridge 174:b96e65c34a4d 37 uint32_t MY_I2C_ELAPSED;
AnnaBridge 174:b96e65c34a4d 38 uint32_t MY_I2C_T1;
AnnaBridge 174:b96e65c34a4d 39 uint32_t MY_I2C_T2;
AnnaBridge 174:b96e65c34a4d 40 #endif
AnnaBridge 174:b96e65c34a4d 41
AnnaBridge 174:b96e65c34a4d 42 struct nu_i2c_var {
AnnaBridge 174:b96e65c34a4d 43 i2c_t * obj;
AnnaBridge 174:b96e65c34a4d 44 void (*vec)(void);
AnnaBridge 174:b96e65c34a4d 45 };
AnnaBridge 174:b96e65c34a4d 46
AnnaBridge 174:b96e65c34a4d 47 // NOTE: NANO130 doesn't support relocating vector table. ISR vector passed into NVIC_SetVector() can only be weak symbol defined in startup_Nano100Series.c.
AnnaBridge 174:b96e65c34a4d 48 void I2C0_IRQHandler(void);
AnnaBridge 174:b96e65c34a4d 49 void I2C1_IRQHandler(void);
AnnaBridge 174:b96e65c34a4d 50 static void i2c_irq(i2c_t *obj);
AnnaBridge 174:b96e65c34a4d 51 static void i2c_fsm_reset(i2c_t *obj, uint32_t i2c_ctl);
AnnaBridge 174:b96e65c34a4d 52 static void i2c_fsm_tranfini(i2c_t *obj, int lastdatanaked);
AnnaBridge 174:b96e65c34a4d 53
AnnaBridge 174:b96e65c34a4d 54 static struct nu_i2c_var i2c0_var = {
AnnaBridge 174:b96e65c34a4d 55 .obj = NULL,
AnnaBridge 174:b96e65c34a4d 56 .vec = I2C0_IRQHandler,
AnnaBridge 174:b96e65c34a4d 57 };
AnnaBridge 174:b96e65c34a4d 58 static struct nu_i2c_var i2c1_var = {
AnnaBridge 174:b96e65c34a4d 59 .obj = NULL,
AnnaBridge 174:b96e65c34a4d 60 .vec = I2C1_IRQHandler,
AnnaBridge 174:b96e65c34a4d 61 };
AnnaBridge 174:b96e65c34a4d 62
AnnaBridge 174:b96e65c34a4d 63 static uint32_t i2c_modinit_mask = 0;
AnnaBridge 174:b96e65c34a4d 64
AnnaBridge 174:b96e65c34a4d 65 static const struct nu_modinit_s i2c_modinit_tab[] = {
AnnaBridge 174:b96e65c34a4d 66 {I2C_0, I2C0_MODULE, 0, 0, I2C0_RST, I2C0_IRQn, &i2c0_var},
AnnaBridge 174:b96e65c34a4d 67 {I2C_1, I2C1_MODULE, 0, 0, I2C1_RST, I2C1_IRQn, &i2c1_var},
AnnaBridge 174:b96e65c34a4d 68
AnnaBridge 174:b96e65c34a4d 69 {NC, 0, 0, 0, 0, (IRQn_Type) 0, NULL}
AnnaBridge 174:b96e65c34a4d 70 };
AnnaBridge 174:b96e65c34a4d 71
AnnaBridge 174:b96e65c34a4d 72 static int i2c_do_tran(i2c_t *obj, char *buf, int length, int read, int naklastdata);
AnnaBridge 174:b96e65c34a4d 73 static int i2c_do_trsn(i2c_t *obj, uint32_t i2c_ctl, int sync);
AnnaBridge 174:b96e65c34a4d 74 #define NU_I2C_TIMEOUT_STAT_INT 500000
AnnaBridge 174:b96e65c34a4d 75 #define NU_I2C_TIMEOUT_STOP 500000
AnnaBridge 174:b96e65c34a4d 76 static int i2c_poll_status_timeout(i2c_t *obj, int (*is_status)(i2c_t *obj), uint32_t timeout);
AnnaBridge 174:b96e65c34a4d 77 static int i2c_poll_tran_heatbeat_timeout(i2c_t *obj, uint32_t timeout);
AnnaBridge 174:b96e65c34a4d 78 static int i2c_is_trsn_done(i2c_t *obj);
AnnaBridge 174:b96e65c34a4d 79 static int i2c_is_tran_started(i2c_t *obj);
AnnaBridge 174:b96e65c34a4d 80 static int i2c_addr2data(int address, int read);
AnnaBridge 174:b96e65c34a4d 81
AnnaBridge 174:b96e65c34a4d 82 /*
AnnaBridge 174:b96e65c34a4d 83 * Wrapper for I2C_SET_CONTROL_REG. Clear new state IF before state change is triggered.
AnnaBridge 174:b96e65c34a4d 84 *
AnnaBridge 174:b96e65c34a4d 85 * NOTE:
AnnaBridge 174:b96e65c34a4d 86 * NUC472/M453/M487: I2C_T::CTL.SI for both I2C new state IF and trigger state change
AnnaBridge 174:b96e65c34a4d 87 * NANO130: I2C_T::INTSTS.INTSTS for I2C new state IF and I2C_T::CON.I2C_STS for trigger state change
AnnaBridge 174:b96e65c34a4d 88 */
AnnaBridge 174:b96e65c34a4d 89 __STATIC_INLINE void i2c_set_control_reg(I2C_T *i2c_base, uint8_t i2c_ctrl)
AnnaBridge 174:b96e65c34a4d 90 {
AnnaBridge 174:b96e65c34a4d 91 if ((i2c_ctrl & I2C_CON_I2C_STS_Msk) && (i2c_base->INTSTS & I2C_INTSTS_INTSTS_Msk)) {
AnnaBridge 174:b96e65c34a4d 92 i2c_base->INTSTS = I2C_INTSTS_INTSTS_Msk;
AnnaBridge 174:b96e65c34a4d 93 }
AnnaBridge 174:b96e65c34a4d 94 I2C_SET_CONTROL_REG(i2c_base, i2c_ctrl);
AnnaBridge 174:b96e65c34a4d 95 }
AnnaBridge 174:b96e65c34a4d 96
AnnaBridge 174:b96e65c34a4d 97 #if DEVICE_I2CSLAVE
AnnaBridge 174:b96e65c34a4d 98 // Convert mbed address to BSP address.
AnnaBridge 174:b96e65c34a4d 99 static int i2c_addr2bspaddr(int address);
AnnaBridge 174:b96e65c34a4d 100 #endif // #if DEVICE_I2CSLAVE
AnnaBridge 174:b96e65c34a4d 101 static void i2c_enable_int(i2c_t *obj);
AnnaBridge 174:b96e65c34a4d 102 static void i2c_disable_int(i2c_t *obj);
AnnaBridge 174:b96e65c34a4d 103 static int i2c_set_int(i2c_t *obj, int inten);
AnnaBridge 174:b96e65c34a4d 104
AnnaBridge 174:b96e65c34a4d 105
AnnaBridge 174:b96e65c34a4d 106 #if DEVICE_I2C_ASYNCH
AnnaBridge 174:b96e65c34a4d 107 static void i2c_buffer_set(i2c_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length);
AnnaBridge 174:b96e65c34a4d 108 static void i2c_enable_vector_interrupt(i2c_t *obj, uint32_t handler, int enable);
AnnaBridge 174:b96e65c34a4d 109 static void i2c_teardown_async(i2c_t *obj);
AnnaBridge 174:b96e65c34a4d 110 #endif
AnnaBridge 174:b96e65c34a4d 111
AnnaBridge 174:b96e65c34a4d 112 #define TRANCTRL_STARTED (1)
AnnaBridge 174:b96e65c34a4d 113 #define TRANCTRL_NAKLASTDATA (1 << 1)
AnnaBridge 174:b96e65c34a4d 114 #define TRANCTRL_LASTDATANAKED (1 << 2)
AnnaBridge 174:b96e65c34a4d 115
AnnaBridge 174:b96e65c34a4d 116 uint32_t us_ticker_read(void);
AnnaBridge 174:b96e65c34a4d 117
AnnaBridge 174:b96e65c34a4d 118 void i2c_init(i2c_t *obj, PinName sda, PinName scl)
AnnaBridge 174:b96e65c34a4d 119 {
AnnaBridge 174:b96e65c34a4d 120 uint32_t i2c_sda = pinmap_peripheral(sda, PinMap_I2C_SDA);
AnnaBridge 174:b96e65c34a4d 121 uint32_t i2c_scl = pinmap_peripheral(scl, PinMap_I2C_SCL);
AnnaBridge 174:b96e65c34a4d 122 obj->i2c.i2c = (I2CName) pinmap_merge(i2c_sda, i2c_scl);
AnnaBridge 174:b96e65c34a4d 123 MBED_ASSERT((int)obj->i2c.i2c != NC);
AnnaBridge 174:b96e65c34a4d 124
AnnaBridge 174:b96e65c34a4d 125 const struct nu_modinit_s *modinit = get_modinit(obj->i2c.i2c, i2c_modinit_tab);
AnnaBridge 174:b96e65c34a4d 126 MBED_ASSERT(modinit != NULL);
AnnaBridge 174:b96e65c34a4d 127 MBED_ASSERT((I2CName) modinit->modname == obj->i2c.i2c);
AnnaBridge 174:b96e65c34a4d 128
AnnaBridge 174:b96e65c34a4d 129 // Reset this module
AnnaBridge 174:b96e65c34a4d 130 SYS_ResetModule(modinit->rsetidx);
AnnaBridge 174:b96e65c34a4d 131
AnnaBridge 174:b96e65c34a4d 132 // Enable IP clock
AnnaBridge 174:b96e65c34a4d 133 CLK_EnableModuleClock(modinit->clkidx);
AnnaBridge 174:b96e65c34a4d 134
AnnaBridge 174:b96e65c34a4d 135 pinmap_pinout(sda, PinMap_I2C_SDA);
AnnaBridge 174:b96e65c34a4d 136 pinmap_pinout(scl, PinMap_I2C_SCL);
AnnaBridge 174:b96e65c34a4d 137
AnnaBridge 174:b96e65c34a4d 138 #if DEVICE_I2C_ASYNCH
AnnaBridge 174:b96e65c34a4d 139 obj->i2c.dma_usage = DMA_USAGE_NEVER;
AnnaBridge 174:b96e65c34a4d 140 obj->i2c.event = 0;
AnnaBridge 174:b96e65c34a4d 141 obj->i2c.stop = 0;
AnnaBridge 174:b96e65c34a4d 142 obj->i2c.address = 0;
AnnaBridge 174:b96e65c34a4d 143 #endif
AnnaBridge 174:b96e65c34a4d 144
AnnaBridge 174:b96e65c34a4d 145 // NOTE: Setting I2C bus clock to 100 KHz is required. See I2C::I2C in common/I2C.cpp.
AnnaBridge 174:b96e65c34a4d 146 I2C_Open((I2C_T *) NU_MODBASE(obj->i2c.i2c), 100000);
AnnaBridge 174:b96e65c34a4d 147 // NOTE: INTEN bit and FSM control bits (STA, STO, SI, AA) are packed in one register CTL0. We cannot control interrupt through
AnnaBridge 174:b96e65c34a4d 148 // INTEN bit without impacting FSM control bits. Use NVIC_EnableIRQ/NVIC_DisableIRQ instead for interrupt control.
AnnaBridge 174:b96e65c34a4d 149 I2C_T *i2c_base = (I2C_T *) NU_MODBASE(obj->i2c.i2c);
AnnaBridge 174:b96e65c34a4d 150 i2c_base->CON |= (I2C_CON_INTEN_Msk | I2C_CON_IPEN_Msk);
AnnaBridge 174:b96e65c34a4d 151
AnnaBridge 174:b96e65c34a4d 152 // Enable sync-mode vector interrupt.
AnnaBridge 174:b96e65c34a4d 153 struct nu_i2c_var *var = (struct nu_i2c_var *) modinit->var;
AnnaBridge 174:b96e65c34a4d 154 var->obj = obj;
AnnaBridge 174:b96e65c34a4d 155 obj->i2c.tran_ctrl = 0;
AnnaBridge 174:b96e65c34a4d 156 obj->i2c.stop = 0;
AnnaBridge 174:b96e65c34a4d 157 obj->i2c.hdlr_async = 0;
AnnaBridge 174:b96e65c34a4d 158 i2c_enable_vector_interrupt(obj, (uint32_t) var->vec, 1);
AnnaBridge 174:b96e65c34a4d 159
AnnaBridge 174:b96e65c34a4d 160 // Mark this module to be inited.
AnnaBridge 174:b96e65c34a4d 161 int i = modinit - i2c_modinit_tab;
AnnaBridge 174:b96e65c34a4d 162 i2c_modinit_mask |= 1 << i;
AnnaBridge 174:b96e65c34a4d 163 }
AnnaBridge 174:b96e65c34a4d 164
AnnaBridge 174:b96e65c34a4d 165 int i2c_start(i2c_t *obj)
AnnaBridge 174:b96e65c34a4d 166 {
AnnaBridge 174:b96e65c34a4d 167 return i2c_do_trsn(obj, I2C_CON_START_Msk | I2C_CON_I2C_STS_Msk, 1);
AnnaBridge 174:b96e65c34a4d 168 }
AnnaBridge 174:b96e65c34a4d 169
AnnaBridge 174:b96e65c34a4d 170 int i2c_stop(i2c_t *obj)
AnnaBridge 174:b96e65c34a4d 171 {
AnnaBridge 174:b96e65c34a4d 172 return i2c_do_trsn(obj, I2C_CON_STOP_Msk | I2C_CON_I2C_STS_Msk, 1);
AnnaBridge 174:b96e65c34a4d 173 }
AnnaBridge 174:b96e65c34a4d 174
AnnaBridge 174:b96e65c34a4d 175 void i2c_frequency(i2c_t *obj, int hz)
AnnaBridge 174:b96e65c34a4d 176 {
AnnaBridge 174:b96e65c34a4d 177 I2C_SetBusClockFreq((I2C_T *) NU_MODBASE(obj->i2c.i2c), hz);
AnnaBridge 174:b96e65c34a4d 178 }
AnnaBridge 174:b96e65c34a4d 179
AnnaBridge 174:b96e65c34a4d 180 int i2c_read(i2c_t *obj, int address, char *data, int length, int stop)
AnnaBridge 174:b96e65c34a4d 181 {
AnnaBridge 174:b96e65c34a4d 182 if (i2c_start(obj)) {
AnnaBridge 174:b96e65c34a4d 183 i2c_stop(obj);
AnnaBridge 174:b96e65c34a4d 184 return I2C_ERROR_BUS_BUSY;
AnnaBridge 174:b96e65c34a4d 185 }
AnnaBridge 174:b96e65c34a4d 186
AnnaBridge 174:b96e65c34a4d 187 if (i2c_byte_write(obj, i2c_addr2data(address, 1)) != 1) {
AnnaBridge 174:b96e65c34a4d 188 i2c_stop(obj);
AnnaBridge 174:b96e65c34a4d 189 return I2C_ERROR_NO_SLAVE;
AnnaBridge 174:b96e65c34a4d 190 }
AnnaBridge 174:b96e65c34a4d 191
AnnaBridge 174:b96e65c34a4d 192 // Read in bytes
AnnaBridge 174:b96e65c34a4d 193 length = i2c_do_tran(obj, data, length, 1, 1);
AnnaBridge 174:b96e65c34a4d 194
AnnaBridge 174:b96e65c34a4d 195 // If not repeated start, send stop.
AnnaBridge 174:b96e65c34a4d 196 if (stop) {
AnnaBridge 174:b96e65c34a4d 197 i2c_stop(obj);
AnnaBridge 174:b96e65c34a4d 198 }
AnnaBridge 174:b96e65c34a4d 199
AnnaBridge 174:b96e65c34a4d 200 return length;
AnnaBridge 174:b96e65c34a4d 201 }
AnnaBridge 174:b96e65c34a4d 202
AnnaBridge 174:b96e65c34a4d 203 int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop)
AnnaBridge 174:b96e65c34a4d 204 {
AnnaBridge 174:b96e65c34a4d 205 if (i2c_start(obj)) {
AnnaBridge 174:b96e65c34a4d 206 i2c_stop(obj);
AnnaBridge 174:b96e65c34a4d 207 return I2C_ERROR_BUS_BUSY;
AnnaBridge 174:b96e65c34a4d 208 }
AnnaBridge 174:b96e65c34a4d 209
AnnaBridge 174:b96e65c34a4d 210 if (i2c_byte_write(obj, i2c_addr2data(address, 0)) != 1) {
AnnaBridge 174:b96e65c34a4d 211 i2c_stop(obj);
AnnaBridge 174:b96e65c34a4d 212 return I2C_ERROR_NO_SLAVE;
AnnaBridge 174:b96e65c34a4d 213 }
AnnaBridge 174:b96e65c34a4d 214
AnnaBridge 174:b96e65c34a4d 215 // Write out bytes
AnnaBridge 174:b96e65c34a4d 216 length = i2c_do_tran(obj, (char *) data, length, 0, 1);
AnnaBridge 174:b96e65c34a4d 217
AnnaBridge 174:b96e65c34a4d 218 if (stop) {
AnnaBridge 174:b96e65c34a4d 219 i2c_stop(obj);
AnnaBridge 174:b96e65c34a4d 220 }
AnnaBridge 174:b96e65c34a4d 221
AnnaBridge 174:b96e65c34a4d 222 return length;
AnnaBridge 174:b96e65c34a4d 223 }
AnnaBridge 174:b96e65c34a4d 224
AnnaBridge 174:b96e65c34a4d 225 void i2c_reset(i2c_t *obj)
AnnaBridge 174:b96e65c34a4d 226 {
AnnaBridge 174:b96e65c34a4d 227 i2c_stop(obj);
AnnaBridge 174:b96e65c34a4d 228 }
AnnaBridge 174:b96e65c34a4d 229
AnnaBridge 174:b96e65c34a4d 230 int i2c_byte_read(i2c_t *obj, int last)
AnnaBridge 174:b96e65c34a4d 231 {
AnnaBridge 174:b96e65c34a4d 232 char data = 0;
AnnaBridge 174:b96e65c34a4d 233 i2c_do_tran(obj, &data, 1, 1, last);
AnnaBridge 174:b96e65c34a4d 234 return data;
AnnaBridge 174:b96e65c34a4d 235 }
AnnaBridge 174:b96e65c34a4d 236
AnnaBridge 174:b96e65c34a4d 237 int i2c_byte_write(i2c_t *obj, int data)
AnnaBridge 174:b96e65c34a4d 238 {
AnnaBridge 174:b96e65c34a4d 239 char data_[1];
AnnaBridge 174:b96e65c34a4d 240 data_[0] = data & 0xFF;
AnnaBridge 174:b96e65c34a4d 241
AnnaBridge 174:b96e65c34a4d 242 if (i2c_do_tran(obj, data_, 1, 0, 0) == 1 &&
AnnaBridge 174:b96e65c34a4d 243 ! (obj->i2c.tran_ctrl & TRANCTRL_LASTDATANAKED)) {
AnnaBridge 174:b96e65c34a4d 244 return 1;
AnnaBridge 174:b96e65c34a4d 245 }
AnnaBridge 174:b96e65c34a4d 246 else {
AnnaBridge 174:b96e65c34a4d 247 return 0;
AnnaBridge 174:b96e65c34a4d 248 }
AnnaBridge 174:b96e65c34a4d 249 }
AnnaBridge 174:b96e65c34a4d 250
AnnaBridge 174:b96e65c34a4d 251 #if DEVICE_I2CSLAVE
AnnaBridge 174:b96e65c34a4d 252
AnnaBridge 174:b96e65c34a4d 253 // See I2CSlave.h
AnnaBridge 174:b96e65c34a4d 254 #define NoData 0 // the slave has not been addressed
AnnaBridge 174:b96e65c34a4d 255 #define ReadAddressed 1 // the master has requested a read from this slave (slave = transmitter)
AnnaBridge 174:b96e65c34a4d 256 #define WriteGeneral 2 // the master is writing to all slave
AnnaBridge 174:b96e65c34a4d 257 #define WriteAddressed 3 // the master is writing to this slave (slave = receiver)
AnnaBridge 174:b96e65c34a4d 258
AnnaBridge 174:b96e65c34a4d 259 void i2c_slave_mode(i2c_t *obj, int enable_slave)
AnnaBridge 174:b96e65c34a4d 260 {
AnnaBridge 174:b96e65c34a4d 261 I2C_T *i2c_base = (I2C_T *) NU_MODBASE(obj->i2c.i2c);
AnnaBridge 174:b96e65c34a4d 262
AnnaBridge 174:b96e65c34a4d 263 i2c_disable_int(obj);
AnnaBridge 174:b96e65c34a4d 264
AnnaBridge 174:b96e65c34a4d 265 obj->i2c.slaveaddr_state = NoData;
AnnaBridge 174:b96e65c34a4d 266 obj->i2c.hdlr_async = 0;
AnnaBridge 174:b96e65c34a4d 267
AnnaBridge 174:b96e65c34a4d 268 // Switch to not addressed mode
AnnaBridge 174:b96e65c34a4d 269 i2c_set_control_reg(i2c_base, I2C_CON_I2C_STS_Msk | I2C_CON_ACK_Msk);
AnnaBridge 174:b96e65c34a4d 270
AnnaBridge 174:b96e65c34a4d 271 i2c_enable_int(obj);
AnnaBridge 174:b96e65c34a4d 272 }
AnnaBridge 174:b96e65c34a4d 273
AnnaBridge 174:b96e65c34a4d 274 int i2c_slave_receive(i2c_t *obj)
AnnaBridge 174:b96e65c34a4d 275 {
AnnaBridge 174:b96e65c34a4d 276 int slaveaddr_state;
AnnaBridge 174:b96e65c34a4d 277
AnnaBridge 174:b96e65c34a4d 278 i2c_disable_int(obj);
AnnaBridge 174:b96e65c34a4d 279 slaveaddr_state = obj->i2c.slaveaddr_state;
AnnaBridge 174:b96e65c34a4d 280 i2c_enable_int(obj);
AnnaBridge 174:b96e65c34a4d 281
AnnaBridge 174:b96e65c34a4d 282 return slaveaddr_state;
AnnaBridge 174:b96e65c34a4d 283 }
AnnaBridge 174:b96e65c34a4d 284
AnnaBridge 174:b96e65c34a4d 285 int i2c_slave_read(i2c_t *obj, char *data, int length)
AnnaBridge 174:b96e65c34a4d 286 {
AnnaBridge 174:b96e65c34a4d 287 return i2c_do_tran(obj, data, length, 1, 1);
AnnaBridge 174:b96e65c34a4d 288 }
AnnaBridge 174:b96e65c34a4d 289
AnnaBridge 174:b96e65c34a4d 290 int i2c_slave_write(i2c_t *obj, const char *data, int length)
AnnaBridge 174:b96e65c34a4d 291 {
AnnaBridge 174:b96e65c34a4d 292 return i2c_do_tran(obj, (char *) data, length, 0, 1);
AnnaBridge 174:b96e65c34a4d 293 }
AnnaBridge 174:b96e65c34a4d 294
AnnaBridge 174:b96e65c34a4d 295 void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask)
AnnaBridge 174:b96e65c34a4d 296 {
AnnaBridge 174:b96e65c34a4d 297 I2C_T *i2c_base = (I2C_T *) NU_MODBASE(obj->i2c.i2c);
AnnaBridge 174:b96e65c34a4d 298
AnnaBridge 174:b96e65c34a4d 299 i2c_disable_int(obj);
AnnaBridge 174:b96e65c34a4d 300
AnnaBridge 174:b96e65c34a4d 301 // NOTE: On NUC472/M451, non-zero slave address can still work as GC mode is enabled.
AnnaBridge 174:b96e65c34a4d 302 // On M480, non-zero slave address won't work as GC mode is enabled.
AnnaBridge 174:b96e65c34a4d 303 I2C_SetSlaveAddr(i2c_base, 0, i2c_addr2bspaddr(address), I2C_GCMODE_DISABLE);
AnnaBridge 174:b96e65c34a4d 304
AnnaBridge 174:b96e65c34a4d 305 i2c_enable_int(obj);
AnnaBridge 174:b96e65c34a4d 306 }
AnnaBridge 174:b96e65c34a4d 307
AnnaBridge 174:b96e65c34a4d 308 static int i2c_addr2bspaddr(int address)
AnnaBridge 174:b96e65c34a4d 309 {
AnnaBridge 174:b96e65c34a4d 310 return (address >> 1);
AnnaBridge 174:b96e65c34a4d 311 }
AnnaBridge 174:b96e65c34a4d 312
AnnaBridge 174:b96e65c34a4d 313 #endif // #if DEVICE_I2CSLAVE
AnnaBridge 174:b96e65c34a4d 314
AnnaBridge 174:b96e65c34a4d 315 static void i2c_enable_int(i2c_t *obj)
AnnaBridge 174:b96e65c34a4d 316 {
AnnaBridge 174:b96e65c34a4d 317 const struct nu_modinit_s *modinit = get_modinit(obj->i2c.i2c, i2c_modinit_tab);
AnnaBridge 174:b96e65c34a4d 318
AnnaBridge 174:b96e65c34a4d 319 core_util_critical_section_enter();
AnnaBridge 174:b96e65c34a4d 320
AnnaBridge 174:b96e65c34a4d 321 // Enable I2C interrupt
AnnaBridge 174:b96e65c34a4d 322 NVIC_EnableIRQ(modinit->irq_n);
AnnaBridge 174:b96e65c34a4d 323 obj->i2c.inten = 1;
AnnaBridge 174:b96e65c34a4d 324
AnnaBridge 174:b96e65c34a4d 325 core_util_critical_section_exit();
AnnaBridge 174:b96e65c34a4d 326 }
AnnaBridge 174:b96e65c34a4d 327
AnnaBridge 174:b96e65c34a4d 328 static void i2c_disable_int(i2c_t *obj)
AnnaBridge 174:b96e65c34a4d 329 {
AnnaBridge 174:b96e65c34a4d 330 const struct nu_modinit_s *modinit = get_modinit(obj->i2c.i2c, i2c_modinit_tab);
AnnaBridge 174:b96e65c34a4d 331
AnnaBridge 174:b96e65c34a4d 332 core_util_critical_section_enter();
AnnaBridge 174:b96e65c34a4d 333
AnnaBridge 174:b96e65c34a4d 334 // Disable I2C interrupt
AnnaBridge 174:b96e65c34a4d 335 NVIC_DisableIRQ(modinit->irq_n);
AnnaBridge 174:b96e65c34a4d 336 obj->i2c.inten = 0;
AnnaBridge 174:b96e65c34a4d 337
AnnaBridge 174:b96e65c34a4d 338 core_util_critical_section_exit();
AnnaBridge 174:b96e65c34a4d 339 }
AnnaBridge 174:b96e65c34a4d 340
AnnaBridge 174:b96e65c34a4d 341 static int i2c_set_int(i2c_t *obj, int inten)
AnnaBridge 174:b96e65c34a4d 342 {
AnnaBridge 174:b96e65c34a4d 343 int inten_back;
AnnaBridge 174:b96e65c34a4d 344
AnnaBridge 174:b96e65c34a4d 345 core_util_critical_section_enter();
AnnaBridge 174:b96e65c34a4d 346
AnnaBridge 174:b96e65c34a4d 347 inten_back = obj->i2c.inten;
AnnaBridge 174:b96e65c34a4d 348
AnnaBridge 174:b96e65c34a4d 349 core_util_critical_section_exit();
AnnaBridge 174:b96e65c34a4d 350
AnnaBridge 174:b96e65c34a4d 351 if (inten) {
AnnaBridge 174:b96e65c34a4d 352 i2c_enable_int(obj);
AnnaBridge 174:b96e65c34a4d 353 }
AnnaBridge 174:b96e65c34a4d 354 else {
AnnaBridge 174:b96e65c34a4d 355 i2c_disable_int(obj);
AnnaBridge 174:b96e65c34a4d 356 }
AnnaBridge 174:b96e65c34a4d 357
AnnaBridge 174:b96e65c34a4d 358 return inten_back;
AnnaBridge 174:b96e65c34a4d 359 }
AnnaBridge 174:b96e65c34a4d 360
AnnaBridge 174:b96e65c34a4d 361 int i2c_allow_powerdown(void)
AnnaBridge 174:b96e65c34a4d 362 {
AnnaBridge 174:b96e65c34a4d 363 uint32_t modinit_mask = i2c_modinit_mask;
AnnaBridge 174:b96e65c34a4d 364 while (modinit_mask) {
AnnaBridge 174:b96e65c34a4d 365 int i2c_idx = nu_ctz(modinit_mask);
AnnaBridge 174:b96e65c34a4d 366 const struct nu_modinit_s *modinit = i2c_modinit_tab + i2c_idx;
AnnaBridge 174:b96e65c34a4d 367 struct nu_i2c_var *var = (struct nu_i2c_var *) modinit->var;
AnnaBridge 174:b96e65c34a4d 368 if (var->obj) {
AnnaBridge 174:b96e65c34a4d 369 // Disallow entering power-down mode if I2C transfer is enabled.
AnnaBridge 174:b96e65c34a4d 370 if (i2c_active(var->obj)) {
AnnaBridge 174:b96e65c34a4d 371 return 0;
AnnaBridge 174:b96e65c34a4d 372 }
AnnaBridge 174:b96e65c34a4d 373 }
AnnaBridge 174:b96e65c34a4d 374 modinit_mask &= ~(1 << i2c_idx);
AnnaBridge 174:b96e65c34a4d 375 }
AnnaBridge 174:b96e65c34a4d 376
AnnaBridge 174:b96e65c34a4d 377 return 1;
AnnaBridge 174:b96e65c34a4d 378 }
AnnaBridge 174:b96e65c34a4d 379
AnnaBridge 174:b96e65c34a4d 380 static int i2c_do_tran(i2c_t *obj, char *buf, int length, int read, int naklastdata)
AnnaBridge 174:b96e65c34a4d 381 {
AnnaBridge 174:b96e65c34a4d 382 if (! buf || ! length) {
AnnaBridge 174:b96e65c34a4d 383 return 0;
AnnaBridge 174:b96e65c34a4d 384 }
AnnaBridge 174:b96e65c34a4d 385
AnnaBridge 174:b96e65c34a4d 386 int tran_len = 0;
AnnaBridge 174:b96e65c34a4d 387
AnnaBridge 174:b96e65c34a4d 388 i2c_disable_int(obj);
AnnaBridge 174:b96e65c34a4d 389 obj->i2c.tran_ctrl = naklastdata ? (TRANCTRL_STARTED | TRANCTRL_NAKLASTDATA) : TRANCTRL_STARTED;
AnnaBridge 174:b96e65c34a4d 390 obj->i2c.tran_beg = buf;
AnnaBridge 174:b96e65c34a4d 391 obj->i2c.tran_pos = buf;
AnnaBridge 174:b96e65c34a4d 392 obj->i2c.tran_end = buf + length;
AnnaBridge 174:b96e65c34a4d 393 obj->i2c.hdlr_async = 0;
AnnaBridge 174:b96e65c34a4d 394 i2c_enable_int(obj);
AnnaBridge 174:b96e65c34a4d 395
AnnaBridge 174:b96e65c34a4d 396 if (i2c_poll_tran_heatbeat_timeout(obj, NU_I2C_TIMEOUT_STAT_INT)) {
AnnaBridge 174:b96e65c34a4d 397 #if NU_I2C_DEBUG
AnnaBridge 174:b96e65c34a4d 398 MY_I2C_2 = obj->i2c;
AnnaBridge 174:b96e65c34a4d 399 while (1);
AnnaBridge 174:b96e65c34a4d 400 #endif
AnnaBridge 174:b96e65c34a4d 401 }
AnnaBridge 174:b96e65c34a4d 402 else {
AnnaBridge 174:b96e65c34a4d 403 i2c_disable_int(obj);
AnnaBridge 174:b96e65c34a4d 404 tran_len = obj->i2c.tran_pos - obj->i2c.tran_beg;
AnnaBridge 174:b96e65c34a4d 405 obj->i2c.tran_beg = NULL;
AnnaBridge 174:b96e65c34a4d 406 obj->i2c.tran_pos = NULL;
AnnaBridge 174:b96e65c34a4d 407 obj->i2c.tran_end = NULL;
AnnaBridge 174:b96e65c34a4d 408 i2c_enable_int(obj);
AnnaBridge 174:b96e65c34a4d 409 }
AnnaBridge 174:b96e65c34a4d 410
AnnaBridge 174:b96e65c34a4d 411 return tran_len;
AnnaBridge 174:b96e65c34a4d 412 }
AnnaBridge 174:b96e65c34a4d 413
AnnaBridge 174:b96e65c34a4d 414 static int i2c_do_trsn(i2c_t *obj, uint32_t i2c_ctl, int sync)
AnnaBridge 174:b96e65c34a4d 415 {
AnnaBridge 174:b96e65c34a4d 416 I2C_T *i2c_base = (I2C_T *) NU_MODBASE(obj->i2c.i2c);
AnnaBridge 174:b96e65c34a4d 417 int err = 0;
AnnaBridge 174:b96e65c34a4d 418
AnnaBridge 174:b96e65c34a4d 419 i2c_disable_int(obj);
AnnaBridge 174:b96e65c34a4d 420
AnnaBridge 174:b96e65c34a4d 421 if (i2c_poll_status_timeout(obj, i2c_is_trsn_done, NU_I2C_TIMEOUT_STAT_INT)) {
AnnaBridge 174:b96e65c34a4d 422 err = I2C_ERROR_BUS_BUSY;
AnnaBridge 174:b96e65c34a4d 423 #if NU_I2C_DEBUG
AnnaBridge 174:b96e65c34a4d 424 MY_I2C_2 = obj->i2c;
AnnaBridge 174:b96e65c34a4d 425 while (1);
AnnaBridge 174:b96e65c34a4d 426 #endif
AnnaBridge 174:b96e65c34a4d 427 }
AnnaBridge 174:b96e65c34a4d 428 else {
AnnaBridge 174:b96e65c34a4d 429 #if 1
AnnaBridge 174:b96e65c34a4d 430 // NOTE: Avoid duplicate Start/Stop. Otherwise, we may meet strange error.
AnnaBridge 174:b96e65c34a4d 431 uint32_t status = I2C_GET_STATUS(i2c_base);
AnnaBridge 174:b96e65c34a4d 432
AnnaBridge 174:b96e65c34a4d 433 switch (status) {
AnnaBridge 174:b96e65c34a4d 434 case 0x08: // Start
AnnaBridge 174:b96e65c34a4d 435 case 0x10: // Master Repeat Start
AnnaBridge 174:b96e65c34a4d 436 if (i2c_ctl & I2C_CON_START_Msk) {
AnnaBridge 174:b96e65c34a4d 437 return 0;
AnnaBridge 174:b96e65c34a4d 438 }
AnnaBridge 174:b96e65c34a4d 439 else {
AnnaBridge 174:b96e65c34a4d 440 break;
AnnaBridge 174:b96e65c34a4d 441 }
AnnaBridge 174:b96e65c34a4d 442 case 0xF8: // Bus Released
AnnaBridge 174:b96e65c34a4d 443 if ((i2c_ctl & (I2C_CON_START_Msk | I2C_CON_STOP_Msk)) == I2C_CON_STOP_Msk) {
AnnaBridge 174:b96e65c34a4d 444 return 0;
AnnaBridge 174:b96e65c34a4d 445 }
AnnaBridge 174:b96e65c34a4d 446 else {
AnnaBridge 174:b96e65c34a4d 447 break;
AnnaBridge 174:b96e65c34a4d 448 }
AnnaBridge 174:b96e65c34a4d 449 }
AnnaBridge 174:b96e65c34a4d 450 #endif
AnnaBridge 174:b96e65c34a4d 451 i2c_set_control_reg(i2c_base, i2c_ctl);
AnnaBridge 174:b96e65c34a4d 452 if (sync && i2c_poll_status_timeout(obj, i2c_is_trsn_done, NU_I2C_TIMEOUT_STAT_INT)) {
AnnaBridge 174:b96e65c34a4d 453 err = I2C_ERROR_BUS_BUSY;
AnnaBridge 174:b96e65c34a4d 454 #if NU_I2C_DEBUG
AnnaBridge 174:b96e65c34a4d 455 MY_I2C_2 = obj->i2c;
AnnaBridge 174:b96e65c34a4d 456 while (1);
AnnaBridge 174:b96e65c34a4d 457 #endif
AnnaBridge 174:b96e65c34a4d 458 }
AnnaBridge 174:b96e65c34a4d 459 }
AnnaBridge 174:b96e65c34a4d 460
AnnaBridge 174:b96e65c34a4d 461 i2c_enable_int(obj);
AnnaBridge 174:b96e65c34a4d 462
AnnaBridge 174:b96e65c34a4d 463 return err;
AnnaBridge 174:b96e65c34a4d 464 }
AnnaBridge 174:b96e65c34a4d 465
AnnaBridge 174:b96e65c34a4d 466 static int i2c_poll_status_timeout(i2c_t *obj, int (*is_status)(i2c_t *obj), uint32_t timeout)
AnnaBridge 174:b96e65c34a4d 467 {
AnnaBridge 174:b96e65c34a4d 468 uint32_t t1, t2, elapsed = 0;
AnnaBridge 174:b96e65c34a4d 469 int status_assert = 0;
AnnaBridge 174:b96e65c34a4d 470
AnnaBridge 174:b96e65c34a4d 471 t1 = us_ticker_read();
AnnaBridge 174:b96e65c34a4d 472 while (1) {
AnnaBridge 174:b96e65c34a4d 473 status_assert = is_status(obj);
AnnaBridge 174:b96e65c34a4d 474 if (status_assert) {
AnnaBridge 174:b96e65c34a4d 475 break;
AnnaBridge 174:b96e65c34a4d 476 }
AnnaBridge 174:b96e65c34a4d 477
AnnaBridge 174:b96e65c34a4d 478 t2 = us_ticker_read();
AnnaBridge 174:b96e65c34a4d 479 elapsed = (t2 > t1) ? (t2 - t1) : ((uint64_t) t2 + 0xFFFFFFFF - t1 + 1);
AnnaBridge 174:b96e65c34a4d 480 if (elapsed >= timeout) {
AnnaBridge 174:b96e65c34a4d 481 #if NU_I2C_DEBUG
AnnaBridge 174:b96e65c34a4d 482 MY_I2C_T1 = t1;
AnnaBridge 174:b96e65c34a4d 483 MY_I2C_T2 = t2;
AnnaBridge 174:b96e65c34a4d 484 MY_I2C_ELAPSED = elapsed;
AnnaBridge 174:b96e65c34a4d 485 MY_I2C_TIMEOUT = timeout;
AnnaBridge 174:b96e65c34a4d 486 MY_I2C_2 = obj->i2c;
AnnaBridge 174:b96e65c34a4d 487 while (1);
AnnaBridge 174:b96e65c34a4d 488 #endif
AnnaBridge 174:b96e65c34a4d 489 break;
AnnaBridge 174:b96e65c34a4d 490 }
AnnaBridge 174:b96e65c34a4d 491 }
AnnaBridge 174:b96e65c34a4d 492
AnnaBridge 174:b96e65c34a4d 493 return (elapsed >= timeout);
AnnaBridge 174:b96e65c34a4d 494 }
AnnaBridge 174:b96e65c34a4d 495
AnnaBridge 174:b96e65c34a4d 496 static int i2c_poll_tran_heatbeat_timeout(i2c_t *obj, uint32_t timeout)
AnnaBridge 174:b96e65c34a4d 497 {
AnnaBridge 174:b96e65c34a4d 498 uint32_t t1, t2, elapsed = 0;
AnnaBridge 174:b96e65c34a4d 499 int tran_started;
AnnaBridge 174:b96e65c34a4d 500 char *tran_pos = NULL;
AnnaBridge 174:b96e65c34a4d 501 char *tran_pos2 = NULL;
AnnaBridge 174:b96e65c34a4d 502
AnnaBridge 174:b96e65c34a4d 503 i2c_disable_int(obj);
AnnaBridge 174:b96e65c34a4d 504 tran_pos = obj->i2c.tran_pos;
AnnaBridge 174:b96e65c34a4d 505 i2c_enable_int(obj);
AnnaBridge 174:b96e65c34a4d 506 t1 = us_ticker_read();
AnnaBridge 174:b96e65c34a4d 507 while (1) {
AnnaBridge 174:b96e65c34a4d 508 i2c_disable_int(obj);
AnnaBridge 174:b96e65c34a4d 509 tran_started = i2c_is_tran_started(obj);
AnnaBridge 174:b96e65c34a4d 510 i2c_enable_int(obj);
AnnaBridge 174:b96e65c34a4d 511 if (! tran_started) { // Transfer completed or stopped
AnnaBridge 174:b96e65c34a4d 512 break;
AnnaBridge 174:b96e65c34a4d 513 }
AnnaBridge 174:b96e65c34a4d 514
AnnaBridge 174:b96e65c34a4d 515 i2c_disable_int(obj);
AnnaBridge 174:b96e65c34a4d 516 tran_pos2 = obj->i2c.tran_pos;
AnnaBridge 174:b96e65c34a4d 517 i2c_enable_int(obj);
AnnaBridge 174:b96e65c34a4d 518 t2 = us_ticker_read();
AnnaBridge 174:b96e65c34a4d 519 if (tran_pos2 != tran_pos) { // Transfer on-going
AnnaBridge 174:b96e65c34a4d 520 t1 = t2;
AnnaBridge 174:b96e65c34a4d 521 tran_pos = tran_pos2;
AnnaBridge 174:b96e65c34a4d 522 continue;
AnnaBridge 174:b96e65c34a4d 523 }
AnnaBridge 174:b96e65c34a4d 524
AnnaBridge 174:b96e65c34a4d 525 elapsed = (t2 > t1) ? (t2 - t1) : ((uint64_t) t2 + 0xFFFFFFFF - t1 + 1);
AnnaBridge 174:b96e65c34a4d 526 if (elapsed >= timeout) { // Transfer idle
AnnaBridge 174:b96e65c34a4d 527 #if NU_I2C_DEBUG
AnnaBridge 174:b96e65c34a4d 528 MY_I2C = obj->i2c;
AnnaBridge 174:b96e65c34a4d 529 MY_I2C_T1 = t1;
AnnaBridge 174:b96e65c34a4d 530 MY_I2C_T2 = t2;
AnnaBridge 174:b96e65c34a4d 531 MY_I2C_ELAPSED = elapsed;
AnnaBridge 174:b96e65c34a4d 532 MY_I2C_TIMEOUT = timeout;
AnnaBridge 174:b96e65c34a4d 533 MY_I2C_2 = obj->i2c;
AnnaBridge 174:b96e65c34a4d 534 while (1);
AnnaBridge 174:b96e65c34a4d 535 #endif
AnnaBridge 174:b96e65c34a4d 536 break;
AnnaBridge 174:b96e65c34a4d 537 }
AnnaBridge 174:b96e65c34a4d 538 }
AnnaBridge 174:b96e65c34a4d 539
AnnaBridge 174:b96e65c34a4d 540 return (elapsed >= timeout);
AnnaBridge 174:b96e65c34a4d 541 }
AnnaBridge 174:b96e65c34a4d 542
AnnaBridge 174:b96e65c34a4d 543
AnnaBridge 174:b96e65c34a4d 544 static int i2c_is_trsn_done(i2c_t *obj)
AnnaBridge 174:b96e65c34a4d 545 {
AnnaBridge 174:b96e65c34a4d 546 I2C_T *i2c_base = (I2C_T *) NU_MODBASE(obj->i2c.i2c);
AnnaBridge 174:b96e65c34a4d 547 int i2c_int;
AnnaBridge 174:b96e65c34a4d 548 uint32_t status;
AnnaBridge 174:b96e65c34a4d 549 int inten_back;
AnnaBridge 174:b96e65c34a4d 550
AnnaBridge 174:b96e65c34a4d 551 inten_back = i2c_set_int(obj, 0);
AnnaBridge 174:b96e65c34a4d 552 // NANO130
AnnaBridge 174:b96e65c34a4d 553 i2c_int = !! (i2c_base->INTSTS & I2C_INTSTS_INTSTS_Msk);
AnnaBridge 174:b96e65c34a4d 554 status = I2C_GET_STATUS(i2c_base);
AnnaBridge 174:b96e65c34a4d 555 i2c_set_int(obj, inten_back);
AnnaBridge 174:b96e65c34a4d 556
AnnaBridge 174:b96e65c34a4d 557 return (i2c_int || status == 0xF8);
AnnaBridge 174:b96e65c34a4d 558 }
AnnaBridge 174:b96e65c34a4d 559
AnnaBridge 174:b96e65c34a4d 560 static int i2c_is_tran_started(i2c_t *obj)
AnnaBridge 174:b96e65c34a4d 561 {
AnnaBridge 174:b96e65c34a4d 562 int started;
AnnaBridge 174:b96e65c34a4d 563 int inten_back;
AnnaBridge 174:b96e65c34a4d 564
AnnaBridge 174:b96e65c34a4d 565 inten_back = i2c_set_int(obj, 0);
AnnaBridge 174:b96e65c34a4d 566 started = !! (obj->i2c.tran_ctrl & TRANCTRL_STARTED);
AnnaBridge 174:b96e65c34a4d 567 i2c_set_int(obj, inten_back);
AnnaBridge 174:b96e65c34a4d 568
AnnaBridge 174:b96e65c34a4d 569 return started;
AnnaBridge 174:b96e65c34a4d 570 }
AnnaBridge 174:b96e65c34a4d 571
AnnaBridge 174:b96e65c34a4d 572 static int i2c_addr2data(int address, int read)
AnnaBridge 174:b96e65c34a4d 573 {
AnnaBridge 174:b96e65c34a4d 574 return read ? (address | 1) : (address & 0xFE);
AnnaBridge 174:b96e65c34a4d 575 }
AnnaBridge 174:b96e65c34a4d 576
AnnaBridge 174:b96e65c34a4d 577 void I2C0_IRQHandler(void)
AnnaBridge 174:b96e65c34a4d 578 {
AnnaBridge 174:b96e65c34a4d 579 i2c_irq(i2c0_var.obj);
AnnaBridge 174:b96e65c34a4d 580 }
AnnaBridge 174:b96e65c34a4d 581 void I2C1_IRQHandler(void)
AnnaBridge 174:b96e65c34a4d 582 {
AnnaBridge 174:b96e65c34a4d 583 i2c_irq(i2c1_var.obj);
AnnaBridge 174:b96e65c34a4d 584 }
AnnaBridge 174:b96e65c34a4d 585
AnnaBridge 174:b96e65c34a4d 586 static void i2c_irq(i2c_t *obj)
AnnaBridge 174:b96e65c34a4d 587 {
AnnaBridge 174:b96e65c34a4d 588 if (obj->i2c.hdlr_async) {
AnnaBridge 174:b96e65c34a4d 589 void (*hdlr_async)(void) = (void(*)(void))(obj->i2c.hdlr_async);
AnnaBridge 174:b96e65c34a4d 590 hdlr_async();
AnnaBridge 174:b96e65c34a4d 591 return;
AnnaBridge 174:b96e65c34a4d 592 }
AnnaBridge 174:b96e65c34a4d 593
AnnaBridge 174:b96e65c34a4d 594 I2C_T *i2c_base = (I2C_T *) NU_MODBASE(obj->i2c.i2c);
AnnaBridge 174:b96e65c34a4d 595 uint32_t status;
AnnaBridge 174:b96e65c34a4d 596
AnnaBridge 174:b96e65c34a4d 597 if (I2C_GET_TIMEOUT_FLAG(i2c_base)) {
AnnaBridge 174:b96e65c34a4d 598 I2C_ClearTimeoutFlag(i2c_base);
AnnaBridge 174:b96e65c34a4d 599 return;
AnnaBridge 174:b96e65c34a4d 600 }
AnnaBridge 174:b96e65c34a4d 601
AnnaBridge 174:b96e65c34a4d 602 status = I2C_GET_STATUS(i2c_base);
AnnaBridge 174:b96e65c34a4d 603 #if NU_I2C_DEBUG
AnnaBridge 174:b96e65c34a4d 604 if (MY_I2C_STATUS_POS < (sizeof (MY_I2C_STATUS) / sizeof (MY_I2C_STATUS[0]))) {
AnnaBridge 174:b96e65c34a4d 605 MY_I2C_STATUS[MY_I2C_STATUS_POS ++] = status;
AnnaBridge 174:b96e65c34a4d 606 }
AnnaBridge 174:b96e65c34a4d 607 else {
AnnaBridge 174:b96e65c34a4d 608 memset(MY_I2C_STATUS, 0x00, sizeof (MY_I2C_STATUS));
AnnaBridge 174:b96e65c34a4d 609 MY_I2C_STATUS_POS = 0;
AnnaBridge 174:b96e65c34a4d 610 }
AnnaBridge 174:b96e65c34a4d 611 #endif
AnnaBridge 174:b96e65c34a4d 612
AnnaBridge 174:b96e65c34a4d 613 switch (status) {
AnnaBridge 174:b96e65c34a4d 614 // Master Transmit
AnnaBridge 174:b96e65c34a4d 615 case 0x28: // Master Transmit Data ACK
AnnaBridge 174:b96e65c34a4d 616 case 0x18: // Master Transmit Address ACK
AnnaBridge 174:b96e65c34a4d 617 case 0x08: // Start
AnnaBridge 174:b96e65c34a4d 618 case 0x10: // Master Repeat Start
AnnaBridge 174:b96e65c34a4d 619 if ((obj->i2c.tran_ctrl & TRANCTRL_STARTED) && obj->i2c.tran_pos) {
AnnaBridge 174:b96e65c34a4d 620 if (obj->i2c.tran_pos < obj->i2c.tran_end) {
AnnaBridge 174:b96e65c34a4d 621 I2C_SET_DATA(i2c_base, *obj->i2c.tran_pos ++);
AnnaBridge 174:b96e65c34a4d 622 i2c_set_control_reg(i2c_base, I2C_CON_I2C_STS_Msk | I2C_CON_ACK_Msk);
AnnaBridge 174:b96e65c34a4d 623 }
AnnaBridge 174:b96e65c34a4d 624 else {
AnnaBridge 174:b96e65c34a4d 625 i2c_fsm_tranfini(obj, 0);
AnnaBridge 174:b96e65c34a4d 626 }
AnnaBridge 174:b96e65c34a4d 627 }
AnnaBridge 174:b96e65c34a4d 628 else {
AnnaBridge 174:b96e65c34a4d 629 i2c_disable_int(obj);
AnnaBridge 174:b96e65c34a4d 630 }
AnnaBridge 174:b96e65c34a4d 631 break;
AnnaBridge 174:b96e65c34a4d 632
AnnaBridge 174:b96e65c34a4d 633 case 0x30: // Master Transmit Data NACK
AnnaBridge 174:b96e65c34a4d 634 i2c_fsm_tranfini(obj, 1);
AnnaBridge 174:b96e65c34a4d 635 break;
AnnaBridge 174:b96e65c34a4d 636
AnnaBridge 174:b96e65c34a4d 637 case 0x20: // Master Transmit Address NACK
AnnaBridge 174:b96e65c34a4d 638 i2c_fsm_tranfini(obj, 1);
AnnaBridge 174:b96e65c34a4d 639 break;
AnnaBridge 174:b96e65c34a4d 640
AnnaBridge 174:b96e65c34a4d 641 case 0x38: // Master Arbitration Lost
AnnaBridge 174:b96e65c34a4d 642 i2c_fsm_reset(obj, I2C_CON_I2C_STS_Msk | I2C_CON_ACK_Msk);
AnnaBridge 174:b96e65c34a4d 643 break;
AnnaBridge 174:b96e65c34a4d 644
AnnaBridge 174:b96e65c34a4d 645 case 0x48: // Master Receive Address NACK
AnnaBridge 174:b96e65c34a4d 646 i2c_fsm_tranfini(obj, 1);
AnnaBridge 174:b96e65c34a4d 647 break;
AnnaBridge 174:b96e65c34a4d 648
AnnaBridge 174:b96e65c34a4d 649 case 0x40: // Master Receive Address ACK
AnnaBridge 174:b96e65c34a4d 650 case 0x50: // Master Receive Data ACK
AnnaBridge 174:b96e65c34a4d 651 case 0x58: // Master Receive Data NACK
AnnaBridge 174:b96e65c34a4d 652 if ((obj->i2c.tran_ctrl & TRANCTRL_STARTED) && obj->i2c.tran_pos) {
AnnaBridge 174:b96e65c34a4d 653 if (obj->i2c.tran_pos < obj->i2c.tran_end) {
AnnaBridge 174:b96e65c34a4d 654 if (status == 0x50 || status == 0x58) {
AnnaBridge 174:b96e65c34a4d 655 *obj->i2c.tran_pos ++ = I2C_GET_DATA(i2c_base);
AnnaBridge 174:b96e65c34a4d 656 }
AnnaBridge 174:b96e65c34a4d 657
AnnaBridge 174:b96e65c34a4d 658 if (status == 0x58) {
AnnaBridge 174:b96e65c34a4d 659 #if NU_I2C_DEBUG
AnnaBridge 174:b96e65c34a4d 660 if (obj->i2c.tran_pos != obj->i2c.tran_end) {
AnnaBridge 174:b96e65c34a4d 661 MY_I2C = obj->i2c;
AnnaBridge 174:b96e65c34a4d 662 while (1);
AnnaBridge 174:b96e65c34a4d 663 }
AnnaBridge 174:b96e65c34a4d 664 #endif
AnnaBridge 174:b96e65c34a4d 665 i2c_fsm_tranfini(obj, 1);
AnnaBridge 174:b96e65c34a4d 666 }
AnnaBridge 174:b96e65c34a4d 667 else {
AnnaBridge 174:b96e65c34a4d 668 uint32_t i2c_ctl = I2C_CON_I2C_STS_Msk | I2C_CON_ACK_Msk;
AnnaBridge 174:b96e65c34a4d 669 if ((obj->i2c.tran_end - obj->i2c.tran_pos) == 1 &&
AnnaBridge 174:b96e65c34a4d 670 obj->i2c.tran_ctrl & TRANCTRL_NAKLASTDATA) {
AnnaBridge 174:b96e65c34a4d 671 // Last data
AnnaBridge 174:b96e65c34a4d 672 i2c_ctl &= ~I2C_CON_ACK_Msk;
AnnaBridge 174:b96e65c34a4d 673 }
AnnaBridge 174:b96e65c34a4d 674 i2c_set_control_reg(i2c_base, i2c_ctl);
AnnaBridge 174:b96e65c34a4d 675 }
AnnaBridge 174:b96e65c34a4d 676 }
AnnaBridge 174:b96e65c34a4d 677 else {
AnnaBridge 174:b96e65c34a4d 678 obj->i2c.tran_ctrl &= ~TRANCTRL_STARTED;
AnnaBridge 174:b96e65c34a4d 679 i2c_disable_int(obj);
AnnaBridge 174:b96e65c34a4d 680 break;
AnnaBridge 174:b96e65c34a4d 681 }
AnnaBridge 174:b96e65c34a4d 682 }
AnnaBridge 174:b96e65c34a4d 683 else {
AnnaBridge 174:b96e65c34a4d 684 i2c_disable_int(obj);
AnnaBridge 174:b96e65c34a4d 685 }
AnnaBridge 174:b96e65c34a4d 686 break;
AnnaBridge 174:b96e65c34a4d 687
AnnaBridge 174:b96e65c34a4d 688 //case 0x00: // Bus error
AnnaBridge 174:b96e65c34a4d 689
AnnaBridge 174:b96e65c34a4d 690 // Slave Transmit
AnnaBridge 174:b96e65c34a4d 691 case 0xB8: // Slave Transmit Data ACK
AnnaBridge 174:b96e65c34a4d 692 case 0xA8: // Slave Transmit Address ACK
AnnaBridge 174:b96e65c34a4d 693 case 0xB0: // Slave Transmit Arbitration Lost
AnnaBridge 174:b96e65c34a4d 694 if ((obj->i2c.tran_ctrl & TRANCTRL_STARTED) && obj->i2c.tran_pos) {
AnnaBridge 174:b96e65c34a4d 695 if (obj->i2c.tran_pos < obj->i2c.tran_end) {
AnnaBridge 174:b96e65c34a4d 696 uint32_t i2c_ctl = I2C_CON_I2C_STS_Msk | I2C_CON_ACK_Msk;
AnnaBridge 174:b96e65c34a4d 697
AnnaBridge 174:b96e65c34a4d 698 I2C_SET_DATA(i2c_base, *obj->i2c.tran_pos ++);
AnnaBridge 174:b96e65c34a4d 699 if (obj->i2c.tran_pos == obj->i2c.tran_end &&
AnnaBridge 174:b96e65c34a4d 700 obj->i2c.tran_ctrl & TRANCTRL_NAKLASTDATA) {
AnnaBridge 174:b96e65c34a4d 701 // Last data
AnnaBridge 174:b96e65c34a4d 702 i2c_ctl &= ~I2C_CON_ACK_Msk;
AnnaBridge 174:b96e65c34a4d 703 }
AnnaBridge 174:b96e65c34a4d 704 i2c_set_control_reg(i2c_base, i2c_ctl);
AnnaBridge 174:b96e65c34a4d 705 }
AnnaBridge 174:b96e65c34a4d 706 else {
AnnaBridge 174:b96e65c34a4d 707 obj->i2c.tran_ctrl &= ~TRANCTRL_STARTED;
AnnaBridge 174:b96e65c34a4d 708 i2c_disable_int(obj);
AnnaBridge 174:b96e65c34a4d 709 break;
AnnaBridge 174:b96e65c34a4d 710 }
AnnaBridge 174:b96e65c34a4d 711 }
AnnaBridge 174:b96e65c34a4d 712 else {
AnnaBridge 174:b96e65c34a4d 713 i2c_disable_int(obj);
AnnaBridge 174:b96e65c34a4d 714 }
AnnaBridge 174:b96e65c34a4d 715 obj->i2c.slaveaddr_state = ReadAddressed;
AnnaBridge 174:b96e65c34a4d 716 break;
AnnaBridge 174:b96e65c34a4d 717 //case 0xA0: // Slave Transmit Repeat Start or Stop
AnnaBridge 174:b96e65c34a4d 718 case 0xC0: // Slave Transmit Data NACK
AnnaBridge 174:b96e65c34a4d 719 case 0xC8: // Slave Transmit Last Data ACK
AnnaBridge 174:b96e65c34a4d 720 obj->i2c.slaveaddr_state = NoData;
AnnaBridge 174:b96e65c34a4d 721 i2c_fsm_reset(obj, I2C_CON_I2C_STS_Msk | I2C_CON_ACK_Msk);
AnnaBridge 174:b96e65c34a4d 722 break;
AnnaBridge 174:b96e65c34a4d 723
AnnaBridge 174:b96e65c34a4d 724 // Slave Receive
AnnaBridge 174:b96e65c34a4d 725 case 0x80: // Slave Receive Data ACK
AnnaBridge 174:b96e65c34a4d 726 case 0x88: // Slave Receive Data NACK
AnnaBridge 174:b96e65c34a4d 727 case 0x60: // Slave Receive Address ACK
AnnaBridge 174:b96e65c34a4d 728 case 0x68: // Slave Receive Arbitration Lost
AnnaBridge 174:b96e65c34a4d 729 obj->i2c.slaveaddr_state = WriteAddressed;
AnnaBridge 174:b96e65c34a4d 730 if ((obj->i2c.tran_ctrl & TRANCTRL_STARTED) && obj->i2c.tran_pos) {
AnnaBridge 174:b96e65c34a4d 731 if (obj->i2c.tran_pos < obj->i2c.tran_end) {
AnnaBridge 174:b96e65c34a4d 732 if (status == 0x80 || status == 0x88) {
AnnaBridge 174:b96e65c34a4d 733 *obj->i2c.tran_pos ++ = I2C_GET_DATA(i2c_base);
AnnaBridge 174:b96e65c34a4d 734 }
AnnaBridge 174:b96e65c34a4d 735
AnnaBridge 174:b96e65c34a4d 736 if (status == 0x88) {
AnnaBridge 174:b96e65c34a4d 737 #if NU_I2C_DEBUG
AnnaBridge 174:b96e65c34a4d 738 if (obj->i2c.tran_pos != obj->i2c.tran_end) {
AnnaBridge 174:b96e65c34a4d 739 MY_I2C = obj->i2c;
AnnaBridge 174:b96e65c34a4d 740 while (1);
AnnaBridge 174:b96e65c34a4d 741 }
AnnaBridge 174:b96e65c34a4d 742 #endif
AnnaBridge 174:b96e65c34a4d 743 obj->i2c.slaveaddr_state = NoData;
AnnaBridge 174:b96e65c34a4d 744 i2c_fsm_reset(obj, I2C_CON_I2C_STS_Msk | I2C_CON_ACK_Msk);
AnnaBridge 174:b96e65c34a4d 745 }
AnnaBridge 174:b96e65c34a4d 746 else {
AnnaBridge 174:b96e65c34a4d 747 uint32_t i2c_ctl = I2C_CON_I2C_STS_Msk | I2C_CON_ACK_Msk;
AnnaBridge 174:b96e65c34a4d 748 if ((obj->i2c.tran_end - obj->i2c.tran_pos) == 1 &&
AnnaBridge 174:b96e65c34a4d 749 obj->i2c.tran_ctrl & TRANCTRL_NAKLASTDATA) {
AnnaBridge 174:b96e65c34a4d 750 // Last data
AnnaBridge 174:b96e65c34a4d 751 i2c_ctl &= ~I2C_CON_ACK_Msk;
AnnaBridge 174:b96e65c34a4d 752 }
AnnaBridge 174:b96e65c34a4d 753 i2c_set_control_reg(i2c_base, i2c_ctl);
AnnaBridge 174:b96e65c34a4d 754 }
AnnaBridge 174:b96e65c34a4d 755 }
AnnaBridge 174:b96e65c34a4d 756 else {
AnnaBridge 174:b96e65c34a4d 757 obj->i2c.tran_ctrl &= ~TRANCTRL_STARTED;
AnnaBridge 174:b96e65c34a4d 758 i2c_disable_int(obj);
AnnaBridge 174:b96e65c34a4d 759 break;
AnnaBridge 174:b96e65c34a4d 760 }
AnnaBridge 174:b96e65c34a4d 761 }
AnnaBridge 174:b96e65c34a4d 762 else {
AnnaBridge 174:b96e65c34a4d 763 i2c_disable_int(obj);
AnnaBridge 174:b96e65c34a4d 764 }
AnnaBridge 174:b96e65c34a4d 765 break;
AnnaBridge 174:b96e65c34a4d 766 //case 0xA0: // Slave Receive Repeat Start or Stop
AnnaBridge 174:b96e65c34a4d 767
AnnaBridge 174:b96e65c34a4d 768 // GC mode
AnnaBridge 174:b96e65c34a4d 769 //case 0xA0: // GC mode Repeat Start or Stop
AnnaBridge 174:b96e65c34a4d 770 case 0x90: // GC mode Data ACK
AnnaBridge 174:b96e65c34a4d 771 case 0x98: // GC mode Data NACK
AnnaBridge 174:b96e65c34a4d 772 case 0x70: // GC mode Address ACK
AnnaBridge 174:b96e65c34a4d 773 case 0x78: // GC mode Arbitration Lost
AnnaBridge 174:b96e65c34a4d 774 obj->i2c.slaveaddr_state = WriteAddressed;
AnnaBridge 174:b96e65c34a4d 775 if ((obj->i2c.tran_ctrl & TRANCTRL_STARTED) && obj->i2c.tran_pos) {
AnnaBridge 174:b96e65c34a4d 776 if (obj->i2c.tran_pos < obj->i2c.tran_end) {
AnnaBridge 174:b96e65c34a4d 777 if (status == 0x90 || status == 0x98) {
AnnaBridge 174:b96e65c34a4d 778 *obj->i2c.tran_pos ++ = I2C_GET_DATA(i2c_base);
AnnaBridge 174:b96e65c34a4d 779 }
AnnaBridge 174:b96e65c34a4d 780
AnnaBridge 174:b96e65c34a4d 781 if (status == 0x98) {
AnnaBridge 174:b96e65c34a4d 782 #if NU_I2C_DEBUG
AnnaBridge 174:b96e65c34a4d 783 if (obj->i2c.tran_pos != obj->i2c.tran_end) {
AnnaBridge 174:b96e65c34a4d 784 MY_I2C = obj->i2c;
AnnaBridge 174:b96e65c34a4d 785 while (1);
AnnaBridge 174:b96e65c34a4d 786 }
AnnaBridge 174:b96e65c34a4d 787 #endif
AnnaBridge 174:b96e65c34a4d 788 obj->i2c.slaveaddr_state = NoData;
AnnaBridge 174:b96e65c34a4d 789 i2c_fsm_reset(obj, I2C_CON_I2C_STS_Msk | I2C_CON_ACK_Msk);
AnnaBridge 174:b96e65c34a4d 790 }
AnnaBridge 174:b96e65c34a4d 791 else {
AnnaBridge 174:b96e65c34a4d 792 uint32_t i2c_ctl = I2C_CON_I2C_STS_Msk | I2C_CON_ACK_Msk;
AnnaBridge 174:b96e65c34a4d 793 if ((obj->i2c.tran_end - obj->i2c.tran_pos) == 1 &&
AnnaBridge 174:b96e65c34a4d 794 obj->i2c.tran_ctrl & TRANCTRL_NAKLASTDATA) {
AnnaBridge 174:b96e65c34a4d 795 // Last data
AnnaBridge 174:b96e65c34a4d 796 i2c_ctl &= ~I2C_CON_ACK_Msk;
AnnaBridge 174:b96e65c34a4d 797 }
AnnaBridge 174:b96e65c34a4d 798 i2c_set_control_reg(i2c_base, i2c_ctl);
AnnaBridge 174:b96e65c34a4d 799 }
AnnaBridge 174:b96e65c34a4d 800 }
AnnaBridge 174:b96e65c34a4d 801 else {
AnnaBridge 174:b96e65c34a4d 802 obj->i2c.tran_ctrl &= ~TRANCTRL_STARTED;
AnnaBridge 174:b96e65c34a4d 803 i2c_disable_int(obj);
AnnaBridge 174:b96e65c34a4d 804 break;
AnnaBridge 174:b96e65c34a4d 805 }
AnnaBridge 174:b96e65c34a4d 806 }
AnnaBridge 174:b96e65c34a4d 807 else {
AnnaBridge 174:b96e65c34a4d 808 i2c_disable_int(obj);
AnnaBridge 174:b96e65c34a4d 809 }
AnnaBridge 174:b96e65c34a4d 810 break;
AnnaBridge 174:b96e65c34a4d 811
AnnaBridge 174:b96e65c34a4d 812 case 0xF8: // Bus Released
AnnaBridge 174:b96e65c34a4d 813 break;
AnnaBridge 174:b96e65c34a4d 814
AnnaBridge 174:b96e65c34a4d 815 default:
AnnaBridge 174:b96e65c34a4d 816 i2c_fsm_reset(obj, I2C_CON_I2C_STS_Msk | I2C_CON_ACK_Msk);
AnnaBridge 174:b96e65c34a4d 817 }
AnnaBridge 174:b96e65c34a4d 818 }
AnnaBridge 174:b96e65c34a4d 819
AnnaBridge 174:b96e65c34a4d 820 static void i2c_fsm_reset(i2c_t *obj, uint32_t i2c_ctl)
AnnaBridge 174:b96e65c34a4d 821 {
AnnaBridge 174:b96e65c34a4d 822 I2C_T *i2c_base = (I2C_T *) NU_MODBASE(obj->i2c.i2c);
AnnaBridge 174:b96e65c34a4d 823
AnnaBridge 174:b96e65c34a4d 824 obj->i2c.stop = 0;
AnnaBridge 174:b96e65c34a4d 825
AnnaBridge 174:b96e65c34a4d 826 obj->i2c.tran_ctrl = 0;
AnnaBridge 174:b96e65c34a4d 827
AnnaBridge 174:b96e65c34a4d 828 i2c_set_control_reg(i2c_base, i2c_ctl);
AnnaBridge 174:b96e65c34a4d 829 obj->i2c.slaveaddr_state = NoData;
AnnaBridge 174:b96e65c34a4d 830 }
AnnaBridge 174:b96e65c34a4d 831
AnnaBridge 174:b96e65c34a4d 832 static void i2c_fsm_tranfini(i2c_t *obj, int lastdatanaked)
AnnaBridge 174:b96e65c34a4d 833 {
AnnaBridge 174:b96e65c34a4d 834 if (lastdatanaked) {
AnnaBridge 174:b96e65c34a4d 835 obj->i2c.tran_ctrl |= TRANCTRL_LASTDATANAKED;
AnnaBridge 174:b96e65c34a4d 836 }
AnnaBridge 174:b96e65c34a4d 837
AnnaBridge 174:b96e65c34a4d 838 obj->i2c.tran_ctrl &= ~TRANCTRL_STARTED;
AnnaBridge 174:b96e65c34a4d 839 i2c_disable_int(obj);
AnnaBridge 174:b96e65c34a4d 840 }
AnnaBridge 174:b96e65c34a4d 841
AnnaBridge 174:b96e65c34a4d 842 #if DEVICE_I2C_ASYNCH
AnnaBridge 174:b96e65c34a4d 843
AnnaBridge 174:b96e65c34a4d 844 void i2c_transfer_asynch(i2c_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint32_t address, uint32_t stop, uint32_t handler, uint32_t event, DMAUsage hint)
AnnaBridge 174:b96e65c34a4d 845 {
AnnaBridge 174:b96e65c34a4d 846 // NOTE: M451 I2C only supports 7-bit slave address. The mbed I2C address passed in is shifted left by 1 bit (7-bit addr << 1).
AnnaBridge 174:b96e65c34a4d 847 MBED_ASSERT((address & 0xFFFFFF00) == 0);
AnnaBridge 174:b96e65c34a4d 848
AnnaBridge 174:b96e65c34a4d 849 // NOTE: First transmit and then receive.
AnnaBridge 174:b96e65c34a4d 850
AnnaBridge 174:b96e65c34a4d 851 (void) hint;
AnnaBridge 174:b96e65c34a4d 852 obj->i2c.dma_usage = DMA_USAGE_NEVER;
AnnaBridge 174:b96e65c34a4d 853 obj->i2c.stop = stop;
AnnaBridge 174:b96e65c34a4d 854 obj->i2c.address = address;
AnnaBridge 174:b96e65c34a4d 855 obj->i2c.event = event;
AnnaBridge 174:b96e65c34a4d 856 i2c_buffer_set(obj, tx, tx_length, rx, rx_length);
AnnaBridge 174:b96e65c34a4d 857
AnnaBridge 174:b96e65c34a4d 858 obj->i2c.hdlr_async = handler;
AnnaBridge 174:b96e65c34a4d 859 i2c_start(obj);
AnnaBridge 174:b96e65c34a4d 860 }
AnnaBridge 174:b96e65c34a4d 861
AnnaBridge 174:b96e65c34a4d 862 uint32_t i2c_irq_handler_asynch(i2c_t *obj)
AnnaBridge 174:b96e65c34a4d 863 {
AnnaBridge 174:b96e65c34a4d 864 int event = 0;
AnnaBridge 174:b96e65c34a4d 865
AnnaBridge 174:b96e65c34a4d 866 I2C_T *i2c_base = (I2C_T *) NU_MODBASE(obj->i2c.i2c);
AnnaBridge 174:b96e65c34a4d 867 uint32_t status = I2C_GET_STATUS(i2c_base);
AnnaBridge 174:b96e65c34a4d 868 switch (status) {
AnnaBridge 174:b96e65c34a4d 869 case 0x08: // Start
AnnaBridge 174:b96e65c34a4d 870 case 0x10: {// Master Repeat Start
AnnaBridge 174:b96e65c34a4d 871 if (obj->tx_buff.buffer && obj->tx_buff.pos < obj->tx_buff.length) {
AnnaBridge 174:b96e65c34a4d 872 I2C_SET_DATA(i2c_base, (i2c_addr2data(obj->i2c.address, 0)));
AnnaBridge 174:b96e65c34a4d 873 i2c_set_control_reg(i2c_base, I2C_CON_I2C_STS_Msk);
AnnaBridge 174:b96e65c34a4d 874 }
AnnaBridge 174:b96e65c34a4d 875 else if (obj->rx_buff.buffer && obj->rx_buff.pos < obj->rx_buff.length) {
AnnaBridge 174:b96e65c34a4d 876 I2C_SET_DATA(i2c_base, (i2c_addr2data(obj->i2c.address, 1)));
AnnaBridge 174:b96e65c34a4d 877 i2c_set_control_reg(i2c_base, I2C_CON_I2C_STS_Msk);
AnnaBridge 174:b96e65c34a4d 878 }
AnnaBridge 174:b96e65c34a4d 879 else {
AnnaBridge 174:b96e65c34a4d 880 event = I2C_EVENT_TRANSFER_COMPLETE;
AnnaBridge 174:b96e65c34a4d 881 if (obj->i2c.stop) {
AnnaBridge 174:b96e65c34a4d 882 i2c_set_control_reg(i2c_base, I2C_CON_STOP_Msk | I2C_CON_I2C_STS_Msk);
AnnaBridge 174:b96e65c34a4d 883 }
AnnaBridge 174:b96e65c34a4d 884 }
AnnaBridge 174:b96e65c34a4d 885 break;
AnnaBridge 174:b96e65c34a4d 886 }
AnnaBridge 174:b96e65c34a4d 887
AnnaBridge 174:b96e65c34a4d 888 case 0x18: // Master Transmit Address ACK
AnnaBridge 174:b96e65c34a4d 889 case 0x28: // Master Transmit Data ACK
AnnaBridge 174:b96e65c34a4d 890 if (obj->tx_buff.buffer && obj->tx_buff.pos < obj->tx_buff.length) {
AnnaBridge 174:b96e65c34a4d 891 uint8_t *tx = (uint8_t *)obj->tx_buff.buffer;
AnnaBridge 174:b96e65c34a4d 892 I2C_SET_DATA(i2c_base, tx[obj->tx_buff.pos ++]);
AnnaBridge 174:b96e65c34a4d 893 i2c_set_control_reg(i2c_base, I2C_CON_I2C_STS_Msk);
AnnaBridge 174:b96e65c34a4d 894 }
AnnaBridge 174:b96e65c34a4d 895 else if (obj->rx_buff.buffer && obj->rx_buff.pos < obj->rx_buff.length) {
AnnaBridge 174:b96e65c34a4d 896 i2c_set_control_reg(i2c_base, I2C_CON_START_Msk | I2C_CON_I2C_STS_Msk);
AnnaBridge 174:b96e65c34a4d 897 }
AnnaBridge 174:b96e65c34a4d 898 else {
AnnaBridge 174:b96e65c34a4d 899 event = I2C_EVENT_TRANSFER_COMPLETE;
AnnaBridge 174:b96e65c34a4d 900 if (obj->i2c.stop) {
AnnaBridge 174:b96e65c34a4d 901 i2c_set_control_reg(i2c_base, I2C_CON_STOP_Msk | I2C_CON_I2C_STS_Msk);
AnnaBridge 174:b96e65c34a4d 902 }
AnnaBridge 174:b96e65c34a4d 903 }
AnnaBridge 174:b96e65c34a4d 904 break;
AnnaBridge 174:b96e65c34a4d 905
AnnaBridge 174:b96e65c34a4d 906 case 0x20: // Master Transmit Address NACK
AnnaBridge 174:b96e65c34a4d 907 event = I2C_EVENT_ERROR_NO_SLAVE;
AnnaBridge 174:b96e65c34a4d 908 if (obj->i2c.stop) {
AnnaBridge 174:b96e65c34a4d 909 i2c_set_control_reg(i2c_base, I2C_CON_STOP_Msk | I2C_CON_I2C_STS_Msk);
AnnaBridge 174:b96e65c34a4d 910 }
AnnaBridge 174:b96e65c34a4d 911 break;
AnnaBridge 174:b96e65c34a4d 912
AnnaBridge 174:b96e65c34a4d 913 case 0x30: // Master Transmit Data NACK
AnnaBridge 174:b96e65c34a4d 914 if (obj->tx_buff.buffer && obj->tx_buff.pos < obj->tx_buff.length) {
AnnaBridge 174:b96e65c34a4d 915 event = I2C_EVENT_TRANSFER_EARLY_NACK;
AnnaBridge 174:b96e65c34a4d 916 i2c_set_control_reg(i2c_base, I2C_CON_STOP_Msk | I2C_CON_I2C_STS_Msk);
AnnaBridge 174:b96e65c34a4d 917 }
AnnaBridge 174:b96e65c34a4d 918 else if (obj->rx_buff.buffer && obj->rx_buff.pos < obj->rx_buff.length) {
AnnaBridge 174:b96e65c34a4d 919 i2c_set_control_reg(i2c_base, I2C_CON_START_Msk | I2C_CON_I2C_STS_Msk);
AnnaBridge 174:b96e65c34a4d 920 }
AnnaBridge 174:b96e65c34a4d 921 else {
AnnaBridge 174:b96e65c34a4d 922 event = I2C_EVENT_TRANSFER_COMPLETE;
AnnaBridge 174:b96e65c34a4d 923 if (obj->i2c.stop) {
AnnaBridge 174:b96e65c34a4d 924 i2c_set_control_reg(i2c_base, I2C_CON_STOP_Msk | I2C_CON_I2C_STS_Msk);
AnnaBridge 174:b96e65c34a4d 925 }
AnnaBridge 174:b96e65c34a4d 926 }
AnnaBridge 174:b96e65c34a4d 927 break;
AnnaBridge 174:b96e65c34a4d 928
AnnaBridge 174:b96e65c34a4d 929 case 0x38: // Master Arbitration Lost
AnnaBridge 174:b96e65c34a4d 930 i2c_set_control_reg(i2c_base, I2C_CON_I2C_STS_Msk); // Enter not addressed SLV mode
AnnaBridge 174:b96e65c34a4d 931 event = I2C_EVENT_ERROR;
AnnaBridge 174:b96e65c34a4d 932 break;
AnnaBridge 174:b96e65c34a4d 933
AnnaBridge 174:b96e65c34a4d 934 case 0x50: // Master Receive Data ACK
AnnaBridge 174:b96e65c34a4d 935 if (obj->rx_buff.buffer && obj->rx_buff.pos < obj->rx_buff.length) {
AnnaBridge 174:b96e65c34a4d 936 uint8_t *rx = (uint8_t *) obj->rx_buff.buffer;
AnnaBridge 174:b96e65c34a4d 937 rx[obj->rx_buff.pos ++] = I2C_GET_DATA(((I2C_T *) NU_MODBASE(obj->i2c.i2c)));
AnnaBridge 174:b96e65c34a4d 938 }
AnnaBridge 174:b96e65c34a4d 939 case 0x40: // Master Receive Address ACK
AnnaBridge 174:b96e65c34a4d 940 i2c_set_control_reg(i2c_base, I2C_CON_I2C_STS_Msk | ((obj->rx_buff.pos != obj->rx_buff.length - 1) ? I2C_CON_ACK_Msk : 0));
AnnaBridge 174:b96e65c34a4d 941 break;
AnnaBridge 174:b96e65c34a4d 942
AnnaBridge 174:b96e65c34a4d 943 case 0x48: // Master Receive Address NACK
AnnaBridge 174:b96e65c34a4d 944 event = I2C_EVENT_ERROR_NO_SLAVE;
AnnaBridge 174:b96e65c34a4d 945 if (obj->i2c.stop) {
AnnaBridge 174:b96e65c34a4d 946 i2c_set_control_reg(i2c_base, I2C_CON_STOP_Msk | I2C_CON_I2C_STS_Msk);
AnnaBridge 174:b96e65c34a4d 947 }
AnnaBridge 174:b96e65c34a4d 948 break;
AnnaBridge 174:b96e65c34a4d 949
AnnaBridge 174:b96e65c34a4d 950 case 0x58: // Master Receive Data NACK
AnnaBridge 174:b96e65c34a4d 951 if (obj->rx_buff.buffer && obj->rx_buff.pos < obj->rx_buff.length) {
AnnaBridge 174:b96e65c34a4d 952 uint8_t *rx = (uint8_t *) obj->rx_buff.buffer;
AnnaBridge 174:b96e65c34a4d 953 rx[obj->rx_buff.pos ++] = I2C_GET_DATA(((I2C_T *) NU_MODBASE(obj->i2c.i2c)));
AnnaBridge 174:b96e65c34a4d 954 }
AnnaBridge 174:b96e65c34a4d 955 i2c_set_control_reg(i2c_base, I2C_CON_START_Msk | I2C_CON_I2C_STS_Msk);
AnnaBridge 174:b96e65c34a4d 956 break;
AnnaBridge 174:b96e65c34a4d 957
AnnaBridge 174:b96e65c34a4d 958 case 0x00: // Bus error
AnnaBridge 174:b96e65c34a4d 959 event = I2C_EVENT_ERROR;
AnnaBridge 174:b96e65c34a4d 960 i2c_reset(obj);
AnnaBridge 174:b96e65c34a4d 961 break;
AnnaBridge 174:b96e65c34a4d 962
AnnaBridge 174:b96e65c34a4d 963 default:
AnnaBridge 174:b96e65c34a4d 964 event = I2C_EVENT_ERROR;
AnnaBridge 174:b96e65c34a4d 965 if (obj->i2c.stop) {
AnnaBridge 174:b96e65c34a4d 966 i2c_set_control_reg(i2c_base, I2C_CON_STOP_Msk | I2C_CON_I2C_STS_Msk);
AnnaBridge 174:b96e65c34a4d 967 }
AnnaBridge 174:b96e65c34a4d 968 }
AnnaBridge 174:b96e65c34a4d 969
AnnaBridge 174:b96e65c34a4d 970 if (event) {
AnnaBridge 174:b96e65c34a4d 971 i2c_teardown_async(obj);
AnnaBridge 174:b96e65c34a4d 972 }
AnnaBridge 174:b96e65c34a4d 973
AnnaBridge 174:b96e65c34a4d 974 return (event & obj->i2c.event);
AnnaBridge 174:b96e65c34a4d 975 }
AnnaBridge 174:b96e65c34a4d 976
AnnaBridge 174:b96e65c34a4d 977 uint8_t i2c_active(i2c_t *obj)
AnnaBridge 174:b96e65c34a4d 978 {
AnnaBridge 174:b96e65c34a4d 979 // hdlr_async will get non-NULL for async transfer. Use it to judge if async transfer is on-going.
AnnaBridge 174:b96e65c34a4d 980 return !! obj->i2c.hdlr_async;
AnnaBridge 174:b96e65c34a4d 981 }
AnnaBridge 174:b96e65c34a4d 982
AnnaBridge 174:b96e65c34a4d 983 void i2c_abort_asynch(i2c_t *obj)
AnnaBridge 174:b96e65c34a4d 984 {
AnnaBridge 174:b96e65c34a4d 985 i2c_teardown_async(obj);
AnnaBridge 174:b96e65c34a4d 986 i2c_stop(obj);
AnnaBridge 174:b96e65c34a4d 987 }
AnnaBridge 174:b96e65c34a4d 988
AnnaBridge 174:b96e65c34a4d 989 static void i2c_buffer_set(i2c_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length)
AnnaBridge 174:b96e65c34a4d 990 {
AnnaBridge 174:b96e65c34a4d 991 obj->tx_buff.buffer = (void *) tx;
AnnaBridge 174:b96e65c34a4d 992 obj->tx_buff.length = tx_length;
AnnaBridge 174:b96e65c34a4d 993 obj->tx_buff.pos = 0;
AnnaBridge 174:b96e65c34a4d 994 obj->rx_buff.buffer = rx;
AnnaBridge 174:b96e65c34a4d 995 obj->rx_buff.length = rx_length;
AnnaBridge 174:b96e65c34a4d 996 obj->rx_buff.pos = 0;
AnnaBridge 174:b96e65c34a4d 997 }
AnnaBridge 174:b96e65c34a4d 998
AnnaBridge 174:b96e65c34a4d 999 static void i2c_enable_vector_interrupt(i2c_t *obj, uint32_t handler, int enable)
AnnaBridge 174:b96e65c34a4d 1000 {
AnnaBridge 174:b96e65c34a4d 1001 const struct nu_modinit_s *modinit = get_modinit(obj->i2c.i2c, i2c_modinit_tab);
AnnaBridge 174:b96e65c34a4d 1002 MBED_ASSERT(modinit != NULL);
AnnaBridge 174:b96e65c34a4d 1003 MBED_ASSERT((I2CName) modinit->modname == obj->i2c.i2c);
AnnaBridge 174:b96e65c34a4d 1004
AnnaBridge 174:b96e65c34a4d 1005 if (enable) {
AnnaBridge 174:b96e65c34a4d 1006 NVIC_SetVector(modinit->irq_n, handler);
AnnaBridge 174:b96e65c34a4d 1007 i2c_enable_int(obj);
AnnaBridge 174:b96e65c34a4d 1008 }
AnnaBridge 174:b96e65c34a4d 1009 else {
AnnaBridge 174:b96e65c34a4d 1010 i2c_disable_int(obj);
AnnaBridge 174:b96e65c34a4d 1011 }
AnnaBridge 174:b96e65c34a4d 1012
AnnaBridge 174:b96e65c34a4d 1013 }
AnnaBridge 174:b96e65c34a4d 1014
AnnaBridge 174:b96e65c34a4d 1015 static void i2c_teardown_async(i2c_t *obj)
AnnaBridge 174:b96e65c34a4d 1016 {
AnnaBridge 174:b96e65c34a4d 1017 obj->i2c.hdlr_async = 0;
AnnaBridge 174:b96e65c34a4d 1018 }
AnnaBridge 174:b96e65c34a4d 1019
AnnaBridge 174:b96e65c34a4d 1020 #endif
AnnaBridge 174:b96e65c34a4d 1021
AnnaBridge 174:b96e65c34a4d 1022 #endif