mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_Silicon_Labs/TARGET_EFM32/emlib/src/em_burtc.c@179:b0033dcd6934, 2017-12-07 (annotated)
- Committer:
- AnnaBridge
- Date:
- Thu Dec 07 14:01:42 2017 +0000
- Revision:
- 179:b0033dcd6934
- Parent:
- 161:2cc1468da177
mbed-dev library. Release version 157
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /***************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 2 | * @file em_burtc.c |
<> | 144:ef7eb2e8f9f7 | 3 | * @brief Backup Real Time Counter (BURTC) Peripheral API |
AnnaBridge | 179:b0033dcd6934 | 4 | * @version 5.3.3 |
<> | 144:ef7eb2e8f9f7 | 5 | ******************************************************************************* |
AnnaBridge | 179:b0033dcd6934 | 6 | * # License |
<> | 150:02e0a0aed4ec | 7 | * <b>Copyright 2016 Silicon Laboratories, Inc. http://www.silabs.com</b> |
<> | 144:ef7eb2e8f9f7 | 8 | ******************************************************************************* |
<> | 144:ef7eb2e8f9f7 | 9 | * |
<> | 144:ef7eb2e8f9f7 | 10 | * Permission is granted to anyone to use this software for any purpose, |
<> | 144:ef7eb2e8f9f7 | 11 | * including commercial applications, and to alter it and redistribute it |
<> | 144:ef7eb2e8f9f7 | 12 | * freely, subject to the following restrictions: |
<> | 144:ef7eb2e8f9f7 | 13 | * |
<> | 144:ef7eb2e8f9f7 | 14 | * 1. The origin of this software must not be misrepresented; you must not |
<> | 144:ef7eb2e8f9f7 | 15 | * claim that you wrote the original software. |
<> | 144:ef7eb2e8f9f7 | 16 | * 2. Altered source versions must be plainly marked as such, and must not be |
<> | 144:ef7eb2e8f9f7 | 17 | * misrepresented as being the original software. |
<> | 144:ef7eb2e8f9f7 | 18 | * 3. This notice may not be removed or altered from any source distribution. |
<> | 144:ef7eb2e8f9f7 | 19 | * |
<> | 144:ef7eb2e8f9f7 | 20 | * DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Labs has no |
<> | 144:ef7eb2e8f9f7 | 21 | * obligation to support this Software. Silicon Labs is providing the |
<> | 144:ef7eb2e8f9f7 | 22 | * Software "AS IS", with no express or implied warranties of any kind, |
<> | 144:ef7eb2e8f9f7 | 23 | * including, but not limited to, any implied warranties of merchantability |
<> | 144:ef7eb2e8f9f7 | 24 | * or fitness for any particular purpose or warranties against infringement |
<> | 144:ef7eb2e8f9f7 | 25 | * of any proprietary rights of a third party. |
<> | 144:ef7eb2e8f9f7 | 26 | * |
<> | 144:ef7eb2e8f9f7 | 27 | * Silicon Labs will not be liable for any consequential, incidental, or |
<> | 144:ef7eb2e8f9f7 | 28 | * special damages, or any other relief, or for any claim by any third party, |
<> | 144:ef7eb2e8f9f7 | 29 | * arising from your use of this Software. |
<> | 144:ef7eb2e8f9f7 | 30 | * |
<> | 144:ef7eb2e8f9f7 | 31 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 32 | |
<> | 144:ef7eb2e8f9f7 | 33 | #include "em_burtc.h" |
<> | 144:ef7eb2e8f9f7 | 34 | #if defined(BURTC_PRESENT) |
<> | 144:ef7eb2e8f9f7 | 35 | |
<> | 144:ef7eb2e8f9f7 | 36 | /***************************************************************************//** |
<> | 150:02e0a0aed4ec | 37 | * @addtogroup emlib |
<> | 144:ef7eb2e8f9f7 | 38 | * @{ |
<> | 144:ef7eb2e8f9f7 | 39 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 40 | |
<> | 144:ef7eb2e8f9f7 | 41 | /***************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 42 | * @addtogroup BURTC |
<> | 144:ef7eb2e8f9f7 | 43 | * @brief Backup Real Time Counter (BURTC) Peripheral API |
<> | 150:02e0a0aed4ec | 44 | * @details |
<> | 150:02e0a0aed4ec | 45 | * This module contains functions to control the BURTC peripheral of Silicon |
<> | 150:02e0a0aed4ec | 46 | * Labs 32-bit MCUs. The Backup Real Time Counter allows timekeeping in all |
<> | 150:02e0a0aed4ec | 47 | * energy modes. The Backup RTC is also available when the system is in backup |
<> | 150:02e0a0aed4ec | 48 | * mode. |
<> | 144:ef7eb2e8f9f7 | 49 | * @{ |
<> | 144:ef7eb2e8f9f7 | 50 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 51 | |
<> | 144:ef7eb2e8f9f7 | 52 | /******************************************************************************* |
<> | 144:ef7eb2e8f9f7 | 53 | ******************************* DEFINES *********************************** |
<> | 144:ef7eb2e8f9f7 | 54 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 55 | |
<> | 144:ef7eb2e8f9f7 | 56 | /******************************************************************************* |
<> | 144:ef7eb2e8f9f7 | 57 | ************************** LOCAL FUNCTIONS ******************************** |
<> | 144:ef7eb2e8f9f7 | 58 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 59 | |
<> | 144:ef7eb2e8f9f7 | 60 | /** @cond DO_NOT_INCLUDE_WITH_DOXYGEN */ |
<> | 144:ef7eb2e8f9f7 | 61 | /***************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 62 | * @brief Convert dividend to prescaler logarithmic value. Only works for even |
<> | 144:ef7eb2e8f9f7 | 63 | * numbers equal to 2^n |
<> | 144:ef7eb2e8f9f7 | 64 | * @param[in] div Unscaled dividend, |
<> | 144:ef7eb2e8f9f7 | 65 | * @return Base 2 logarithm of input, as used by fixed prescalers |
<> | 144:ef7eb2e8f9f7 | 66 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 67 | __STATIC_INLINE uint32_t divToLog2(uint32_t div) |
<> | 144:ef7eb2e8f9f7 | 68 | { |
<> | 144:ef7eb2e8f9f7 | 69 | uint32_t log2; |
<> | 144:ef7eb2e8f9f7 | 70 | |
<> | 144:ef7eb2e8f9f7 | 71 | /* Prescaler accepts an argument of 128 or less, valid values being 2^n */ |
<> | 144:ef7eb2e8f9f7 | 72 | EFM_ASSERT((div > 0) && (div <= 32768)); |
<> | 144:ef7eb2e8f9f7 | 73 | |
<> | 144:ef7eb2e8f9f7 | 74 | /* Count leading zeroes and "reverse" result, Cortex-M3 intrinsic */ |
<> | 144:ef7eb2e8f9f7 | 75 | log2 = (31 - __CLZ(div)); |
<> | 144:ef7eb2e8f9f7 | 76 | |
<> | 144:ef7eb2e8f9f7 | 77 | return log2; |
<> | 144:ef7eb2e8f9f7 | 78 | } |
<> | 144:ef7eb2e8f9f7 | 79 | |
<> | 144:ef7eb2e8f9f7 | 80 | /***************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 81 | * @brief |
<> | 144:ef7eb2e8f9f7 | 82 | * Wait for ongoing sync of register(s) to low frequency domain to complete. |
<> | 144:ef7eb2e8f9f7 | 83 | * |
<> | 144:ef7eb2e8f9f7 | 84 | * @param[in] mask |
<> | 144:ef7eb2e8f9f7 | 85 | * Bitmask corresponding to SYNCBUSY register defined bits, indicating |
<> | 144:ef7eb2e8f9f7 | 86 | * registers that must complete any ongoing synchronization. |
<> | 144:ef7eb2e8f9f7 | 87 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 88 | __STATIC_INLINE void regSync(uint32_t mask) |
<> | 144:ef7eb2e8f9f7 | 89 | { |
<> | 144:ef7eb2e8f9f7 | 90 | /* Avoid deadlock if modifying the same register twice when freeze mode is |
<> | 144:ef7eb2e8f9f7 | 91 | activated, or when no clock is selected for the BURTC. If no clock is |
<> | 144:ef7eb2e8f9f7 | 92 | selected, then the sync is done once the clock source is set. */ |
<> | 144:ef7eb2e8f9f7 | 93 | if ((BURTC->FREEZE & BURTC_FREEZE_REGFREEZE) |
AnnaBridge | 179:b0033dcd6934 | 94 | || ((BURTC->CTRL & _BURTC_CTRL_CLKSEL_MASK) == BURTC_CTRL_CLKSEL_NONE)) { |
<> | 144:ef7eb2e8f9f7 | 95 | return; |
<> | 144:ef7eb2e8f9f7 | 96 | } |
<> | 144:ef7eb2e8f9f7 | 97 | /* Wait for any pending previous write operation to have been completed */ |
<> | 144:ef7eb2e8f9f7 | 98 | /* in low frequency domain. This is only required for the Gecko Family */ |
<> | 144:ef7eb2e8f9f7 | 99 | while (BURTC->SYNCBUSY & mask) |
<> | 144:ef7eb2e8f9f7 | 100 | ; |
<> | 144:ef7eb2e8f9f7 | 101 | } |
<> | 144:ef7eb2e8f9f7 | 102 | /** @endcond */ |
<> | 144:ef7eb2e8f9f7 | 103 | |
<> | 144:ef7eb2e8f9f7 | 104 | /******************************************************************************* |
<> | 144:ef7eb2e8f9f7 | 105 | ************************** GLOBAL FUNCTIONS ******************************* |
<> | 144:ef7eb2e8f9f7 | 106 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 107 | |
<> | 144:ef7eb2e8f9f7 | 108 | /***************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 109 | * @brief Initialize BURTC |
<> | 144:ef7eb2e8f9f7 | 110 | * |
<> | 144:ef7eb2e8f9f7 | 111 | * @details |
<> | 144:ef7eb2e8f9f7 | 112 | * Configures the BURTC peripheral. |
<> | 144:ef7eb2e8f9f7 | 113 | * |
<> | 144:ef7eb2e8f9f7 | 114 | * @note |
<> | 144:ef7eb2e8f9f7 | 115 | * Before initialization, BURTC module must first be enabled by clearing the |
<> | 144:ef7eb2e8f9f7 | 116 | * reset bit in the RMU, i.e. |
<> | 144:ef7eb2e8f9f7 | 117 | * @verbatim |
<> | 144:ef7eb2e8f9f7 | 118 | * RMU_ResetControl(rmuResetBU, rmuResetModeClear); |
<> | 144:ef7eb2e8f9f7 | 119 | * @endverbatim |
<> | 144:ef7eb2e8f9f7 | 120 | * Compare channel 0 must be configured outside this function, before |
<> | 144:ef7eb2e8f9f7 | 121 | * initialization if enable is set to true. The counter will always be reset. |
<> | 144:ef7eb2e8f9f7 | 122 | * |
<> | 144:ef7eb2e8f9f7 | 123 | * @param[in] burtcInit |
<> | 144:ef7eb2e8f9f7 | 124 | * Pointer to BURTC initialization structure |
<> | 144:ef7eb2e8f9f7 | 125 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 126 | void BURTC_Init(const BURTC_Init_TypeDef *burtcInit) |
<> | 144:ef7eb2e8f9f7 | 127 | { |
<> | 144:ef7eb2e8f9f7 | 128 | uint32_t ctrl; |
<> | 144:ef7eb2e8f9f7 | 129 | uint32_t presc; |
<> | 144:ef7eb2e8f9f7 | 130 | |
<> | 144:ef7eb2e8f9f7 | 131 | /* Check initializer structure integrity */ |
<> | 144:ef7eb2e8f9f7 | 132 | EFM_ASSERT(burtcInit != (BURTC_Init_TypeDef *) 0); |
<> | 144:ef7eb2e8f9f7 | 133 | /* Clock divider must be between 1 and 128, really on the form 2^n */ |
<> | 144:ef7eb2e8f9f7 | 134 | EFM_ASSERT((burtcInit->clkDiv >= 1) && (burtcInit->clkDiv <= 128)); |
<> | 144:ef7eb2e8f9f7 | 135 | /* Ignored compare bits during low power operation must be less than 7 */ |
<> | 144:ef7eb2e8f9f7 | 136 | /* Note! Giant Gecko revision C errata, do NOT use LPCOMP=7 */ |
<> | 144:ef7eb2e8f9f7 | 137 | EFM_ASSERT(burtcInit->lowPowerComp <= 6); |
<> | 144:ef7eb2e8f9f7 | 138 | /* You cannot enable the BURTC if mode is set to disabled */ |
AnnaBridge | 179:b0033dcd6934 | 139 | EFM_ASSERT((burtcInit->enable == false) |
AnnaBridge | 179:b0033dcd6934 | 140 | || ((burtcInit->enable == true) |
AnnaBridge | 179:b0033dcd6934 | 141 | && (burtcInit->mode != burtcModeDisable))); |
<> | 144:ef7eb2e8f9f7 | 142 | /* Low power mode is only available with LFRCO or LFXO as clock source */ |
<> | 144:ef7eb2e8f9f7 | 143 | EFM_ASSERT((burtcInit->clkSel != burtcClkSelULFRCO) |
<> | 144:ef7eb2e8f9f7 | 144 | || ((burtcInit->clkSel == burtcClkSelULFRCO) |
AnnaBridge | 179:b0033dcd6934 | 145 | && (burtcInit->lowPowerMode == burtcLPDisable))); |
<> | 144:ef7eb2e8f9f7 | 146 | |
<> | 144:ef7eb2e8f9f7 | 147 | /* Calculate prescaler value from clock divider input */ |
<> | 144:ef7eb2e8f9f7 | 148 | /* Note! If clock select (clkSel) is ULFRCO, a clock divisor (clkDiv) of |
<> | 144:ef7eb2e8f9f7 | 149 | value 1 will select a 2kHz ULFRCO clock, while any other value will |
<> | 144:ef7eb2e8f9f7 | 150 | select a 1kHz ULFRCO clock source. */ |
<> | 144:ef7eb2e8f9f7 | 151 | presc = divToLog2(burtcInit->clkDiv); |
<> | 144:ef7eb2e8f9f7 | 152 | |
<> | 144:ef7eb2e8f9f7 | 153 | /* Make sure all registers are updated simultaneously */ |
AnnaBridge | 179:b0033dcd6934 | 154 | if (burtcInit->enable) { |
<> | 144:ef7eb2e8f9f7 | 155 | BURTC_FreezeEnable(true); |
<> | 144:ef7eb2e8f9f7 | 156 | } |
<> | 144:ef7eb2e8f9f7 | 157 | |
<> | 144:ef7eb2e8f9f7 | 158 | /* Modification of LPMODE register requires sync with potential ongoing |
<> | 144:ef7eb2e8f9f7 | 159 | * register updates in LF domain. */ |
<> | 144:ef7eb2e8f9f7 | 160 | regSync(BURTC_SYNCBUSY_LPMODE); |
<> | 144:ef7eb2e8f9f7 | 161 | |
<> | 144:ef7eb2e8f9f7 | 162 | /* Configure low power mode */ |
<> | 144:ef7eb2e8f9f7 | 163 | BURTC->LPMODE = (uint32_t) (burtcInit->lowPowerMode); |
<> | 144:ef7eb2e8f9f7 | 164 | |
<> | 144:ef7eb2e8f9f7 | 165 | /* New configuration */ |
<> | 144:ef7eb2e8f9f7 | 166 | ctrl = (BURTC_CTRL_RSTEN |
<> | 144:ef7eb2e8f9f7 | 167 | | (burtcInit->mode) |
<> | 144:ef7eb2e8f9f7 | 168 | | (burtcInit->debugRun << _BURTC_CTRL_DEBUGRUN_SHIFT) |
<> | 144:ef7eb2e8f9f7 | 169 | | (burtcInit->compare0Top << _BURTC_CTRL_COMP0TOP_SHIFT) |
<> | 144:ef7eb2e8f9f7 | 170 | | (burtcInit->lowPowerComp << _BURTC_CTRL_LPCOMP_SHIFT) |
<> | 144:ef7eb2e8f9f7 | 171 | | (presc << _BURTC_CTRL_PRESC_SHIFT) |
<> | 144:ef7eb2e8f9f7 | 172 | | (burtcInit->clkSel) |
<> | 144:ef7eb2e8f9f7 | 173 | | (burtcInit->timeStamp << _BURTC_CTRL_BUMODETSEN_SHIFT)); |
<> | 144:ef7eb2e8f9f7 | 174 | |
<> | 144:ef7eb2e8f9f7 | 175 | /* Clear interrupts */ |
<> | 144:ef7eb2e8f9f7 | 176 | BURTC_IntClear(0xFFFFFFFF); |
<> | 144:ef7eb2e8f9f7 | 177 | |
<> | 144:ef7eb2e8f9f7 | 178 | /* Set new configuration */ |
<> | 144:ef7eb2e8f9f7 | 179 | BURTC->CTRL = ctrl; |
<> | 144:ef7eb2e8f9f7 | 180 | |
<> | 144:ef7eb2e8f9f7 | 181 | /* Enable BURTC and counter */ |
AnnaBridge | 179:b0033dcd6934 | 182 | if (burtcInit->enable) { |
<> | 144:ef7eb2e8f9f7 | 183 | /* To enable BURTC counter, we need to disable reset */ |
<> | 144:ef7eb2e8f9f7 | 184 | BURTC_Enable(true); |
<> | 144:ef7eb2e8f9f7 | 185 | |
<> | 144:ef7eb2e8f9f7 | 186 | /* Clear freeze */ |
<> | 144:ef7eb2e8f9f7 | 187 | BURTC_FreezeEnable(false); |
<> | 144:ef7eb2e8f9f7 | 188 | } |
<> | 144:ef7eb2e8f9f7 | 189 | } |
<> | 144:ef7eb2e8f9f7 | 190 | |
<> | 144:ef7eb2e8f9f7 | 191 | /***************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 192 | * @brief Set BURTC compare channel |
<> | 144:ef7eb2e8f9f7 | 193 | * |
<> | 144:ef7eb2e8f9f7 | 194 | * @param[in] comp Compare channel index, must be 0 for Giant / Leopard Gecko |
<> | 144:ef7eb2e8f9f7 | 195 | * |
<> | 144:ef7eb2e8f9f7 | 196 | * @param[in] value New compare value |
<> | 144:ef7eb2e8f9f7 | 197 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 198 | void BURTC_CompareSet(unsigned int comp, uint32_t value) |
<> | 144:ef7eb2e8f9f7 | 199 | { |
<> | 144:ef7eb2e8f9f7 | 200 | (void) comp; /* Unused parameter when EFM_ASSERT is undefined. */ |
<> | 144:ef7eb2e8f9f7 | 201 | |
<> | 144:ef7eb2e8f9f7 | 202 | EFM_ASSERT(comp == 0); |
<> | 144:ef7eb2e8f9f7 | 203 | |
<> | 144:ef7eb2e8f9f7 | 204 | /* Modification of COMP0 register requires sync with potential ongoing |
<> | 144:ef7eb2e8f9f7 | 205 | * register updates in LF domain. */ |
<> | 144:ef7eb2e8f9f7 | 206 | regSync(BURTC_SYNCBUSY_COMP0); |
<> | 144:ef7eb2e8f9f7 | 207 | |
<> | 144:ef7eb2e8f9f7 | 208 | /* Configure compare channel 0 */ |
<> | 144:ef7eb2e8f9f7 | 209 | BURTC->COMP0 = value; |
<> | 144:ef7eb2e8f9f7 | 210 | } |
<> | 144:ef7eb2e8f9f7 | 211 | |
<> | 144:ef7eb2e8f9f7 | 212 | /***************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 213 | * @brief Get BURTC compare value |
<> | 144:ef7eb2e8f9f7 | 214 | * |
<> | 144:ef7eb2e8f9f7 | 215 | * @param[in] comp Compare channel index value, must be 0 for Giant/Leopard. |
<> | 144:ef7eb2e8f9f7 | 216 | * |
<> | 144:ef7eb2e8f9f7 | 217 | * @return Currently configured value for this compare channel |
<> | 144:ef7eb2e8f9f7 | 218 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 219 | uint32_t BURTC_CompareGet(unsigned int comp) |
<> | 144:ef7eb2e8f9f7 | 220 | { |
<> | 144:ef7eb2e8f9f7 | 221 | (void) comp; /* Unused parameter when EFM_ASSERT is undefined. */ |
<> | 144:ef7eb2e8f9f7 | 222 | |
<> | 144:ef7eb2e8f9f7 | 223 | EFM_ASSERT(comp == 0); |
<> | 144:ef7eb2e8f9f7 | 224 | |
<> | 144:ef7eb2e8f9f7 | 225 | return BURTC->COMP0; |
<> | 144:ef7eb2e8f9f7 | 226 | } |
<> | 144:ef7eb2e8f9f7 | 227 | |
<> | 144:ef7eb2e8f9f7 | 228 | /***************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 229 | * @brief Reset counter |
<> | 144:ef7eb2e8f9f7 | 230 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 231 | void BURTC_CounterReset(void) |
<> | 144:ef7eb2e8f9f7 | 232 | { |
<> | 144:ef7eb2e8f9f7 | 233 | /* Set and clear reset bit */ |
<> | 144:ef7eb2e8f9f7 | 234 | BUS_RegBitWrite(&BURTC->CTRL, _BURTC_CTRL_RSTEN_SHIFT, 1); |
<> | 144:ef7eb2e8f9f7 | 235 | BUS_RegBitWrite(&BURTC->CTRL, _BURTC_CTRL_RSTEN_SHIFT, 0); |
<> | 144:ef7eb2e8f9f7 | 236 | } |
<> | 144:ef7eb2e8f9f7 | 237 | |
<> | 144:ef7eb2e8f9f7 | 238 | /***************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 239 | * @brief |
<> | 144:ef7eb2e8f9f7 | 240 | * Restore BURTC to reset state |
<> | 144:ef7eb2e8f9f7 | 241 | * @note |
<> | 144:ef7eb2e8f9f7 | 242 | * Before accessing the BURTC, BURSTEN in RMU->CTRL must be cleared. |
<> | 144:ef7eb2e8f9f7 | 243 | * LOCK will not be reset to default value, as this will disable access |
<> | 144:ef7eb2e8f9f7 | 244 | * to core BURTC registers. |
<> | 144:ef7eb2e8f9f7 | 245 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 246 | void BURTC_Reset(void) |
<> | 144:ef7eb2e8f9f7 | 247 | { |
<> | 144:ef7eb2e8f9f7 | 248 | bool buResetState; |
<> | 144:ef7eb2e8f9f7 | 249 | |
<> | 144:ef7eb2e8f9f7 | 250 | /* Read reset state, set reset and restore state */ |
<> | 144:ef7eb2e8f9f7 | 251 | buResetState = BUS_RegBitRead(&RMU->CTRL, _RMU_CTRL_BURSTEN_SHIFT); |
<> | 144:ef7eb2e8f9f7 | 252 | BUS_RegBitWrite(&RMU->CTRL, _RMU_CTRL_BURSTEN_SHIFT, 1); |
<> | 144:ef7eb2e8f9f7 | 253 | BUS_RegBitWrite(&RMU->CTRL, _RMU_CTRL_BURSTEN_SHIFT, buResetState); |
<> | 144:ef7eb2e8f9f7 | 254 | } |
<> | 144:ef7eb2e8f9f7 | 255 | |
<> | 144:ef7eb2e8f9f7 | 256 | /***************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 257 | * @brief |
<> | 144:ef7eb2e8f9f7 | 258 | * Get clock frequency of the BURTC. |
<> | 144:ef7eb2e8f9f7 | 259 | * |
<> | 144:ef7eb2e8f9f7 | 260 | * @return |
<> | 144:ef7eb2e8f9f7 | 261 | * The current frequency in Hz. |
<> | 144:ef7eb2e8f9f7 | 262 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 263 | uint32_t BURTC_ClockFreqGet(void) |
<> | 144:ef7eb2e8f9f7 | 264 | { |
<> | 144:ef7eb2e8f9f7 | 265 | uint32_t clkSel; |
<> | 144:ef7eb2e8f9f7 | 266 | uint32_t clkDiv; |
<> | 144:ef7eb2e8f9f7 | 267 | uint32_t frequency; |
<> | 144:ef7eb2e8f9f7 | 268 | |
<> | 144:ef7eb2e8f9f7 | 269 | clkSel = BURTC->CTRL & _BURTC_CTRL_CLKSEL_MASK; |
<> | 144:ef7eb2e8f9f7 | 270 | clkDiv = (BURTC->CTRL & _BURTC_CTRL_PRESC_MASK) >> _BURTC_CTRL_PRESC_SHIFT; |
<> | 144:ef7eb2e8f9f7 | 271 | |
AnnaBridge | 179:b0033dcd6934 | 272 | switch (clkSel) { |
<> | 144:ef7eb2e8f9f7 | 273 | /** Ultra low frequency (1 kHz) clock */ |
<> | 144:ef7eb2e8f9f7 | 274 | case BURTC_CTRL_CLKSEL_ULFRCO: |
AnnaBridge | 179:b0033dcd6934 | 275 | if (_BURTC_CTRL_PRESC_DIV1 == clkDiv) { |
<> | 144:ef7eb2e8f9f7 | 276 | frequency = 2000; /* 2KHz when clock divisor is 1. */ |
AnnaBridge | 179:b0033dcd6934 | 277 | } else { |
<> | 144:ef7eb2e8f9f7 | 278 | frequency = SystemULFRCOClockGet(); /* 1KHz when divisor is different |
<> | 144:ef7eb2e8f9f7 | 279 | from 1. */ |
<> | 144:ef7eb2e8f9f7 | 280 | } |
<> | 144:ef7eb2e8f9f7 | 281 | break; |
<> | 144:ef7eb2e8f9f7 | 282 | |
<> | 144:ef7eb2e8f9f7 | 283 | /** Low frequency RC oscillator */ |
<> | 144:ef7eb2e8f9f7 | 284 | case BURTC_CTRL_CLKSEL_LFRCO: |
<> | 144:ef7eb2e8f9f7 | 285 | frequency = SystemLFRCOClockGet() / (1 << clkDiv); /* freq=32768/2^clkDiv */ |
<> | 144:ef7eb2e8f9f7 | 286 | break; |
<> | 144:ef7eb2e8f9f7 | 287 | |
<> | 144:ef7eb2e8f9f7 | 288 | /** Low frequency crystal osciallator */ |
<> | 144:ef7eb2e8f9f7 | 289 | case BURTC_CTRL_CLKSEL_LFXO: |
<> | 144:ef7eb2e8f9f7 | 290 | frequency = SystemLFXOClockGet() / (1 << clkDiv); /* freq=32768/2^clkDiv */ |
<> | 144:ef7eb2e8f9f7 | 291 | break; |
<> | 144:ef7eb2e8f9f7 | 292 | |
<> | 144:ef7eb2e8f9f7 | 293 | default: |
<> | 144:ef7eb2e8f9f7 | 294 | /* No clock selected for BURTC. */ |
<> | 144:ef7eb2e8f9f7 | 295 | frequency = 0; |
<> | 144:ef7eb2e8f9f7 | 296 | } |
<> | 144:ef7eb2e8f9f7 | 297 | return frequency; |
<> | 144:ef7eb2e8f9f7 | 298 | } |
<> | 144:ef7eb2e8f9f7 | 299 | |
<> | 144:ef7eb2e8f9f7 | 300 | /** @} (end addtogroup BURTC) */ |
<> | 150:02e0a0aed4ec | 301 | /** @} (end addtogroup emlib) */ |
<> | 144:ef7eb2e8f9f7 | 302 | |
<> | 144:ef7eb2e8f9f7 | 303 | #endif /* BURTC_PRESENT */ |