mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/hal/TARGET_NXP/TARGET_LPC11U6X/serial_api.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 0:9b334a45a8ff 5 * you may not use this file except in compliance with the License.
bogdanm 0:9b334a45a8ff 6 * You may obtain a copy of the License at
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 0:9b334a45a8ff 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 0:9b334a45a8ff 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 0:9b334a45a8ff 13 * See the License for the specific language governing permissions and
bogdanm 0:9b334a45a8ff 14 * limitations under the License.
bogdanm 0:9b334a45a8ff 15 */
bogdanm 0:9b334a45a8ff 16
bogdanm 0:9b334a45a8ff 17 // math.h required for floating point operations for baud rate calculation
bogdanm 0:9b334a45a8ff 18 #include "mbed_assert.h"
bogdanm 0:9b334a45a8ff 19 #include <math.h>
bogdanm 0:9b334a45a8ff 20 #include <string.h>
bogdanm 0:9b334a45a8ff 21 #include <stdlib.h>
bogdanm 0:9b334a45a8ff 22
bogdanm 0:9b334a45a8ff 23 #include "serial_api.h"
bogdanm 0:9b334a45a8ff 24 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 25 #include "pinmap.h"
bogdanm 0:9b334a45a8ff 26
bogdanm 0:9b334a45a8ff 27 #if DEVICE_SERIAL
bogdanm 0:9b334a45a8ff 28
bogdanm 0:9b334a45a8ff 29 /******************************************************************************
bogdanm 0:9b334a45a8ff 30 * INITIALIZATION
bogdanm 0:9b334a45a8ff 31 ******************************************************************************/
bogdanm 0:9b334a45a8ff 32
bogdanm 0:9b334a45a8ff 33 #define UART_NUM 5
bogdanm 0:9b334a45a8ff 34
bogdanm 0:9b334a45a8ff 35 // CFG
bogdanm 0:9b334a45a8ff 36 #define UART_EN (0x01<<0)
bogdanm 0:9b334a45a8ff 37
bogdanm 0:9b334a45a8ff 38 // CTL
bogdanm 0:9b334a45a8ff 39 #define TXBRKEN (0x01<<1)
bogdanm 0:9b334a45a8ff 40
bogdanm 0:9b334a45a8ff 41 // STAT
bogdanm 0:9b334a45a8ff 42 #define RXRDY (0x01<<0)
bogdanm 0:9b334a45a8ff 43 #define TXRDY (0x01<<2)
bogdanm 0:9b334a45a8ff 44 #define DELTACTS (0x01<<5)
bogdanm 0:9b334a45a8ff 45 #define RXBRK (0x01<<10)
bogdanm 0:9b334a45a8ff 46 #define DELTARXBRK (0x01<<11)
bogdanm 0:9b334a45a8ff 47
bogdanm 0:9b334a45a8ff 48 static const PinMap PinMap_UART_TX[] = {
bogdanm 0:9b334a45a8ff 49 {P0_19, UART_0, 1},
bogdanm 0:9b334a45a8ff 50 {P1_18, UART_0, 2},
bogdanm 0:9b334a45a8ff 51 {P1_27, UART_0, 2},
bogdanm 0:9b334a45a8ff 52 {P1_8 , UART_1, 2},
bogdanm 0:9b334a45a8ff 53 {P0_14, UART_1, 4},
bogdanm 0:9b334a45a8ff 54 {P1_0 , UART_2, 3},
bogdanm 0:9b334a45a8ff 55 {P1_23, UART_2, 3},
bogdanm 0:9b334a45a8ff 56 {P2_4 , UART_3, 1},
bogdanm 0:9b334a45a8ff 57 {P2_12, UART_4, 1},
bogdanm 0:9b334a45a8ff 58 { NC , NC , 0}
bogdanm 0:9b334a45a8ff 59 };
bogdanm 0:9b334a45a8ff 60
bogdanm 0:9b334a45a8ff 61 static const PinMap PinMap_UART_RX[] = {
bogdanm 0:9b334a45a8ff 62 {P0_18, UART_0, 1},
bogdanm 0:9b334a45a8ff 63 {P1_17, UART_0, 2},
bogdanm 0:9b334a45a8ff 64 {P1_26, UART_0, 2},
bogdanm 0:9b334a45a8ff 65 {P1_2 , UART_1, 3},
bogdanm 0:9b334a45a8ff 66 {P0_13, UART_1, 4},
bogdanm 0:9b334a45a8ff 67 {P0_20, UART_2, 2},
bogdanm 0:9b334a45a8ff 68 {P1_6 , UART_2, 2},
bogdanm 0:9b334a45a8ff 69 {P2_3 , UART_3, 1},
bogdanm 0:9b334a45a8ff 70 {P2_11, UART_4, 1},
bogdanm 0:9b334a45a8ff 71 {NC , NC , 0}
bogdanm 0:9b334a45a8ff 72 };
bogdanm 0:9b334a45a8ff 73
bogdanm 0:9b334a45a8ff 74 static uint32_t serial_irq_ids[UART_NUM] = {0};
bogdanm 0:9b334a45a8ff 75 static uart_irq_handler irq_handler;
bogdanm 0:9b334a45a8ff 76
bogdanm 0:9b334a45a8ff 77 int stdio_uart_inited = 0;
bogdanm 0:9b334a45a8ff 78 serial_t stdio_uart;
bogdanm 0:9b334a45a8ff 79
bogdanm 0:9b334a45a8ff 80 void serial_init(serial_t *obj, PinName tx, PinName rx) {
bogdanm 0:9b334a45a8ff 81 int is_stdio_uart = 0;
bogdanm 0:9b334a45a8ff 82
bogdanm 0:9b334a45a8ff 83 // determine the UART to use
bogdanm 0:9b334a45a8ff 84 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
bogdanm 0:9b334a45a8ff 85 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
bogdanm 0:9b334a45a8ff 86 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
bogdanm 0:9b334a45a8ff 87 MBED_ASSERT((int)uart != NC);
bogdanm 0:9b334a45a8ff 88
bogdanm 0:9b334a45a8ff 89 switch (uart) {
bogdanm 0:9b334a45a8ff 90 case UART_0:
bogdanm 0:9b334a45a8ff 91 obj->index = 0;
bogdanm 0:9b334a45a8ff 92 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 12);
bogdanm 0:9b334a45a8ff 93 break;
bogdanm 0:9b334a45a8ff 94 case UART_1:
bogdanm 0:9b334a45a8ff 95 obj->index = 1;
bogdanm 0:9b334a45a8ff 96 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 20);
bogdanm 0:9b334a45a8ff 97 LPC_SYSCON->PRESETCTRL |= (1 << 5);
bogdanm 0:9b334a45a8ff 98 break;
bogdanm 0:9b334a45a8ff 99 case UART_2:
bogdanm 0:9b334a45a8ff 100 obj->index = 2;
bogdanm 0:9b334a45a8ff 101 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 21);
bogdanm 0:9b334a45a8ff 102 LPC_SYSCON->PRESETCTRL |= (1 << 6);
bogdanm 0:9b334a45a8ff 103 break;
bogdanm 0:9b334a45a8ff 104 case UART_3:
bogdanm 0:9b334a45a8ff 105 obj->index = 3;
bogdanm 0:9b334a45a8ff 106 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 22);
bogdanm 0:9b334a45a8ff 107 LPC_SYSCON->PRESETCTRL |= (1 << 7);
bogdanm 0:9b334a45a8ff 108 break;
bogdanm 0:9b334a45a8ff 109 case UART_4:
bogdanm 0:9b334a45a8ff 110 obj->index = 4;
bogdanm 0:9b334a45a8ff 111 LPC_SYSCON->SYSAHBCLKCTRL |= (1 << 22);
bogdanm 0:9b334a45a8ff 112 LPC_SYSCON->PRESETCTRL |= (1 << 8);
bogdanm 0:9b334a45a8ff 113 break;
bogdanm 0:9b334a45a8ff 114 }
bogdanm 0:9b334a45a8ff 115
bogdanm 0:9b334a45a8ff 116 if (obj->index == 0)
bogdanm 0:9b334a45a8ff 117 obj->uart = (LPC_USART0_Type *)uart;
bogdanm 0:9b334a45a8ff 118 else
bogdanm 0:9b334a45a8ff 119 obj->mini_uart = (LPC_USART4_Type *)uart;
bogdanm 0:9b334a45a8ff 120
bogdanm 0:9b334a45a8ff 121 if (obj->index == 0) {
bogdanm 0:9b334a45a8ff 122 // enable fifos and default rx trigger level
bogdanm 0:9b334a45a8ff 123 obj->uart->FCR = 1 << 0 // FIFO Enable - 0 = Disables, 1 = Enabled
bogdanm 0:9b334a45a8ff 124 | 0 << 1 // Rx Fifo Clear
bogdanm 0:9b334a45a8ff 125 | 0 << 2 // Tx Fifo Clear
bogdanm 0:9b334a45a8ff 126 | 0 << 6; // Rx irq trigger level - 0 = 1 char, 1 = 4 chars, 2 = 8 chars, 3 = 14 chars
bogdanm 0:9b334a45a8ff 127 // disable irqs
bogdanm 0:9b334a45a8ff 128 obj->uart->IER = 0 << 0 // Rx Data available irq enable
bogdanm 0:9b334a45a8ff 129 | 0 << 1 // Tx Fifo empty irq enable
bogdanm 0:9b334a45a8ff 130 | 0 << 2; // Rx Line Status irq enable
bogdanm 0:9b334a45a8ff 131 }
bogdanm 0:9b334a45a8ff 132 else {
bogdanm 0:9b334a45a8ff 133 // Clear all status bits
bogdanm 0:9b334a45a8ff 134 obj->mini_uart->STAT = (DELTACTS | DELTARXBRK);
bogdanm 0:9b334a45a8ff 135 // Enable UART
bogdanm 0:9b334a45a8ff 136 obj->mini_uart->CFG |= UART_EN;
bogdanm 0:9b334a45a8ff 137 }
bogdanm 0:9b334a45a8ff 138 // set default baud rate and format
bogdanm 0:9b334a45a8ff 139 serial_baud (obj, 9600);
bogdanm 0:9b334a45a8ff 140 serial_format(obj, 8, ParityNone, 1);
bogdanm 0:9b334a45a8ff 141
bogdanm 0:9b334a45a8ff 142 // pinout the chosen uart
bogdanm 0:9b334a45a8ff 143 pinmap_pinout(tx, PinMap_UART_TX);
bogdanm 0:9b334a45a8ff 144 pinmap_pinout(rx, PinMap_UART_RX);
bogdanm 0:9b334a45a8ff 145
bogdanm 0:9b334a45a8ff 146 // set rx/tx pins in PullUp mode
bogdanm 0:9b334a45a8ff 147 if (tx != NC) {
bogdanm 0:9b334a45a8ff 148 pin_mode(tx, PullUp);
bogdanm 0:9b334a45a8ff 149 }
bogdanm 0:9b334a45a8ff 150 if (rx != NC) {
bogdanm 0:9b334a45a8ff 151 pin_mode(rx, PullUp);
bogdanm 0:9b334a45a8ff 152 }
bogdanm 0:9b334a45a8ff 153
bogdanm 0:9b334a45a8ff 154 is_stdio_uart = (uart == STDIO_UART) ? (1) : (0);
bogdanm 0:9b334a45a8ff 155
bogdanm 0:9b334a45a8ff 156 if (is_stdio_uart && (obj->index == 0)) {
bogdanm 0:9b334a45a8ff 157 stdio_uart_inited = 1;
bogdanm 0:9b334a45a8ff 158 memcpy(&stdio_uart, obj, sizeof(serial_t));
bogdanm 0:9b334a45a8ff 159 }
bogdanm 0:9b334a45a8ff 160 }
bogdanm 0:9b334a45a8ff 161
bogdanm 0:9b334a45a8ff 162 void serial_free(serial_t *obj) {
bogdanm 0:9b334a45a8ff 163 serial_irq_ids[obj->index] = 0;
bogdanm 0:9b334a45a8ff 164 }
bogdanm 0:9b334a45a8ff 165
bogdanm 0:9b334a45a8ff 166 // serial_baud
bogdanm 0:9b334a45a8ff 167 // set the baud rate, taking in to account the current SystemFrequency
bogdanm 0:9b334a45a8ff 168 void serial_baud(serial_t *obj, int baudrate) {
bogdanm 0:9b334a45a8ff 169 LPC_SYSCON->USART0CLKDIV = 1;
bogdanm 0:9b334a45a8ff 170 LPC_SYSCON->FRGCLKDIV = 1;
bogdanm 0:9b334a45a8ff 171
bogdanm 0:9b334a45a8ff 172 if (obj->index == 0) {
bogdanm 0:9b334a45a8ff 173 uint32_t PCLK = SystemCoreClock;
bogdanm 0:9b334a45a8ff 174 // First we check to see if the basic divide with no DivAddVal/MulVal
bogdanm 0:9b334a45a8ff 175 // ratio gives us an integer result. If it does, we set DivAddVal = 0,
bogdanm 0:9b334a45a8ff 176 // MulVal = 1. Otherwise, we search the valid ratio value range to find
bogdanm 0:9b334a45a8ff 177 // the closest match. This could be more elegant, using search methods
bogdanm 0:9b334a45a8ff 178 // and/or lookup tables, but the brute force method is not that much
bogdanm 0:9b334a45a8ff 179 // slower, and is more maintainable.
bogdanm 0:9b334a45a8ff 180 uint16_t DL = PCLK / (16 * baudrate);
bogdanm 0:9b334a45a8ff 181
bogdanm 0:9b334a45a8ff 182 uint8_t DivAddVal = 0;
bogdanm 0:9b334a45a8ff 183 uint8_t MulVal = 1;
bogdanm 0:9b334a45a8ff 184 int hit = 0;
bogdanm 0:9b334a45a8ff 185 uint16_t dlv;
bogdanm 0:9b334a45a8ff 186 uint8_t mv, dav;
bogdanm 0:9b334a45a8ff 187 if ((PCLK % (16 * baudrate)) != 0) { // Checking for zero remainder
bogdanm 0:9b334a45a8ff 188 int err_best = baudrate, b;
bogdanm 0:9b334a45a8ff 189 for (mv = 1; mv < 16 && !hit; mv++)
bogdanm 0:9b334a45a8ff 190 {
bogdanm 0:9b334a45a8ff 191 for (dav = 0; dav < mv; dav++)
bogdanm 0:9b334a45a8ff 192 {
bogdanm 0:9b334a45a8ff 193 // baudrate = PCLK / (16 * dlv * (1 + (DivAdd / Mul))
bogdanm 0:9b334a45a8ff 194 // solving for dlv, we get dlv = mul * PCLK / (16 * baudrate * (divadd + mul))
bogdanm 0:9b334a45a8ff 195 // mul has 4 bits, PCLK has 27 so we have 1 bit headroom which can be used for rounding
bogdanm 0:9b334a45a8ff 196 // for many values of mul and PCLK we have 2 or more bits of headroom which can be used to improve precision
bogdanm 0:9b334a45a8ff 197 // note: X / 32 doesn't round correctly. Instead, we use ((X / 16) + 1) / 2 for correct rounding
bogdanm 0:9b334a45a8ff 198
bogdanm 0:9b334a45a8ff 199 if ((mv * PCLK * 2) & 0x80000000) // 1 bit headroom
bogdanm 0:9b334a45a8ff 200 dlv = ((((2 * mv * PCLK) / (baudrate * (dav + mv))) / 16) + 1) / 2;
bogdanm 0:9b334a45a8ff 201 else // 2 bits headroom, use more precision
bogdanm 0:9b334a45a8ff 202 dlv = ((((4 * mv * PCLK) / (baudrate * (dav + mv))) / 32) + 1) / 2;
bogdanm 0:9b334a45a8ff 203
bogdanm 0:9b334a45a8ff 204 // datasheet says if DLL==DLM==0, then 1 is used instead since divide by zero is ungood
bogdanm 0:9b334a45a8ff 205 if (dlv == 0)
bogdanm 0:9b334a45a8ff 206 dlv = 1;
bogdanm 0:9b334a45a8ff 207
bogdanm 0:9b334a45a8ff 208 // datasheet says if dav > 0 then DL must be >= 2
bogdanm 0:9b334a45a8ff 209 if ((dav > 0) && (dlv < 2))
bogdanm 0:9b334a45a8ff 210 dlv = 2;
bogdanm 0:9b334a45a8ff 211
bogdanm 0:9b334a45a8ff 212 // integer rearrangement of the baudrate equation (with rounding)
bogdanm 0:9b334a45a8ff 213 b = ((PCLK * mv / (dlv * (dav + mv) * 8)) + 1) / 2;
bogdanm 0:9b334a45a8ff 214
bogdanm 0:9b334a45a8ff 215 // check to see how we went
bogdanm 0:9b334a45a8ff 216 b = abs(b - baudrate);
bogdanm 0:9b334a45a8ff 217 if (b < err_best)
bogdanm 0:9b334a45a8ff 218 {
bogdanm 0:9b334a45a8ff 219 err_best = b;
bogdanm 0:9b334a45a8ff 220
bogdanm 0:9b334a45a8ff 221 DL = dlv;
bogdanm 0:9b334a45a8ff 222 MulVal = mv;
bogdanm 0:9b334a45a8ff 223 DivAddVal = dav;
bogdanm 0:9b334a45a8ff 224
bogdanm 0:9b334a45a8ff 225 if (b == baudrate)
bogdanm 0:9b334a45a8ff 226 {
bogdanm 0:9b334a45a8ff 227 hit = 1;
bogdanm 0:9b334a45a8ff 228 break;
bogdanm 0:9b334a45a8ff 229 }
bogdanm 0:9b334a45a8ff 230 }
bogdanm 0:9b334a45a8ff 231 }
bogdanm 0:9b334a45a8ff 232 }
bogdanm 0:9b334a45a8ff 233 }
bogdanm 0:9b334a45a8ff 234
bogdanm 0:9b334a45a8ff 235 // set LCR[DLAB] to enable writing to divider registers
bogdanm 0:9b334a45a8ff 236 obj->uart->LCR |= (1 << 7);
bogdanm 0:9b334a45a8ff 237
bogdanm 0:9b334a45a8ff 238 // set divider values
bogdanm 0:9b334a45a8ff 239 obj->uart->DLM = (DL >> 8) & 0xFF;
bogdanm 0:9b334a45a8ff 240 obj->uart->DLL = (DL >> 0) & 0xFF;
bogdanm 0:9b334a45a8ff 241 obj->uart->FDR = (uint32_t) DivAddVal << 0
bogdanm 0:9b334a45a8ff 242 | (uint32_t) MulVal << 4;
bogdanm 0:9b334a45a8ff 243
bogdanm 0:9b334a45a8ff 244 // clear LCR[DLAB]
bogdanm 0:9b334a45a8ff 245 obj->uart->LCR &= ~(1 << 7);
bogdanm 0:9b334a45a8ff 246 }
bogdanm 0:9b334a45a8ff 247 else {
bogdanm 0:9b334a45a8ff 248 uint32_t UARTSysClk = SystemCoreClock / LPC_SYSCON->FRGCLKDIV;
bogdanm 0:9b334a45a8ff 249 obj->mini_uart->BRG = UARTSysClk / 16 / baudrate - 1;
bogdanm 0:9b334a45a8ff 250
bogdanm 0:9b334a45a8ff 251 LPC_SYSCON->UARTFRGDIV = 0xFF;
bogdanm 0:9b334a45a8ff 252 LPC_SYSCON->UARTFRGMULT = ( ((UARTSysClk / 16) * (LPC_SYSCON->UARTFRGDIV + 1)) /
bogdanm 0:9b334a45a8ff 253 (baudrate * (obj->mini_uart->BRG + 1))
bogdanm 0:9b334a45a8ff 254 ) - (LPC_SYSCON->UARTFRGDIV + 1);
bogdanm 0:9b334a45a8ff 255 }
bogdanm 0:9b334a45a8ff 256 }
bogdanm 0:9b334a45a8ff 257
bogdanm 0:9b334a45a8ff 258 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
bogdanm 0:9b334a45a8ff 259 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2)); // 0: 1 stop bits, 1: 2 stop bits
bogdanm 0:9b334a45a8ff 260
bogdanm 0:9b334a45a8ff 261 stop_bits -= 1;
bogdanm 0:9b334a45a8ff 262
bogdanm 0:9b334a45a8ff 263 if (obj->index == 0) {
bogdanm 0:9b334a45a8ff 264 MBED_ASSERT((data_bits > 4) && (data_bits < 9)); // 0: 5 data bits ... 3: 8 data bits
bogdanm 0:9b334a45a8ff 265 MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven) ||
bogdanm 0:9b334a45a8ff 266 (parity == ParityForced1) || (parity == ParityForced0));
bogdanm 0:9b334a45a8ff 267 data_bits -= 5;
bogdanm 0:9b334a45a8ff 268
bogdanm 0:9b334a45a8ff 269 int parity_enable, parity_select;
bogdanm 0:9b334a45a8ff 270 switch (parity) {
bogdanm 0:9b334a45a8ff 271 case ParityNone: parity_enable = 0; parity_select = 0; break;
bogdanm 0:9b334a45a8ff 272 case ParityOdd : parity_enable = 1; parity_select = 0; break;
bogdanm 0:9b334a45a8ff 273 case ParityEven: parity_enable = 1; parity_select = 1; break;
bogdanm 0:9b334a45a8ff 274 case ParityForced1: parity_enable = 1; parity_select = 2; break;
bogdanm 0:9b334a45a8ff 275 case ParityForced0: parity_enable = 1; parity_select = 3; break;
bogdanm 0:9b334a45a8ff 276 default:
bogdanm 0:9b334a45a8ff 277 return;
bogdanm 0:9b334a45a8ff 278 }
bogdanm 0:9b334a45a8ff 279
bogdanm 0:9b334a45a8ff 280 obj->uart->LCR = data_bits << 0
bogdanm 0:9b334a45a8ff 281 | stop_bits << 2
bogdanm 0:9b334a45a8ff 282 | parity_enable << 3
bogdanm 0:9b334a45a8ff 283 | parity_select << 4;
bogdanm 0:9b334a45a8ff 284 }
bogdanm 0:9b334a45a8ff 285 else {
bogdanm 0:9b334a45a8ff 286 // 0: 7 data bits ... 2: 9 data bits
bogdanm 0:9b334a45a8ff 287 MBED_ASSERT((data_bits > 6) && (data_bits < 10));
bogdanm 0:9b334a45a8ff 288 MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven));
bogdanm 0:9b334a45a8ff 289 data_bits -= 7;
bogdanm 0:9b334a45a8ff 290
bogdanm 0:9b334a45a8ff 291 int paritysel;
bogdanm 0:9b334a45a8ff 292 switch (parity) {
bogdanm 0:9b334a45a8ff 293 case ParityNone: paritysel = 0; break;
bogdanm 0:9b334a45a8ff 294 case ParityEven: paritysel = 2; break;
bogdanm 0:9b334a45a8ff 295 case ParityOdd : paritysel = 3; break;
bogdanm 0:9b334a45a8ff 296 default:
bogdanm 0:9b334a45a8ff 297 return;
bogdanm 0:9b334a45a8ff 298 }
bogdanm 0:9b334a45a8ff 299 obj->mini_uart->CFG = (data_bits << 2)
bogdanm 0:9b334a45a8ff 300 | (paritysel << 4)
bogdanm 0:9b334a45a8ff 301 | (stop_bits << 6)
bogdanm 0:9b334a45a8ff 302 | UART_EN;
bogdanm 0:9b334a45a8ff 303 }
bogdanm 0:9b334a45a8ff 304 }
bogdanm 0:9b334a45a8ff 305
bogdanm 0:9b334a45a8ff 306 /******************************************************************************
bogdanm 0:9b334a45a8ff 307 * INTERRUPTS HANDLING
bogdanm 0:9b334a45a8ff 308 ******************************************************************************/
bogdanm 0:9b334a45a8ff 309 static inline void uart_irq(uint32_t iir, uint32_t index) {
bogdanm 0:9b334a45a8ff 310 SerialIrq irq_type;
bogdanm 0:9b334a45a8ff 311 switch (iir) {
bogdanm 0:9b334a45a8ff 312 case 1: irq_type = TxIrq; break;
bogdanm 0:9b334a45a8ff 313 case 2: irq_type = RxIrq; break;
bogdanm 0:9b334a45a8ff 314 default: return;
bogdanm 0:9b334a45a8ff 315 }
bogdanm 0:9b334a45a8ff 316
bogdanm 0:9b334a45a8ff 317 if (serial_irq_ids[index] != 0)
bogdanm 0:9b334a45a8ff 318 irq_handler(serial_irq_ids[index], irq_type);
bogdanm 0:9b334a45a8ff 319 }
bogdanm 0:9b334a45a8ff 320
bogdanm 0:9b334a45a8ff 321 void uart0_irq()
bogdanm 0:9b334a45a8ff 322 {
bogdanm 0:9b334a45a8ff 323 uart_irq((LPC_USART0->IIR >> 1) & 0x7, 0);
bogdanm 0:9b334a45a8ff 324 }
bogdanm 0:9b334a45a8ff 325
bogdanm 0:9b334a45a8ff 326 void uart1_irq()
bogdanm 0:9b334a45a8ff 327 {
bogdanm 0:9b334a45a8ff 328 if(LPC_USART1->STAT & (1 << 2)){
bogdanm 0:9b334a45a8ff 329 uart_irq(1, 1);
bogdanm 0:9b334a45a8ff 330 }
bogdanm 0:9b334a45a8ff 331 if(LPC_USART1->STAT & (1 << 0)){
bogdanm 0:9b334a45a8ff 332 uart_irq(2, 1);
bogdanm 0:9b334a45a8ff 333 }
bogdanm 0:9b334a45a8ff 334 }
bogdanm 0:9b334a45a8ff 335
bogdanm 0:9b334a45a8ff 336 void uart2_irq()
bogdanm 0:9b334a45a8ff 337 {
bogdanm 0:9b334a45a8ff 338 if(LPC_USART2->STAT & (1 << 2)){
bogdanm 0:9b334a45a8ff 339 uart_irq(1, 2);
bogdanm 0:9b334a45a8ff 340 }
bogdanm 0:9b334a45a8ff 341 if(LPC_USART2->STAT & (1 << 0)){
bogdanm 0:9b334a45a8ff 342 uart_irq(2, 2);
bogdanm 0:9b334a45a8ff 343 }
bogdanm 0:9b334a45a8ff 344 }
bogdanm 0:9b334a45a8ff 345
bogdanm 0:9b334a45a8ff 346 void uart3_irq()
bogdanm 0:9b334a45a8ff 347 {
bogdanm 0:9b334a45a8ff 348 if(LPC_USART3->STAT & (1 << 2)){
bogdanm 0:9b334a45a8ff 349 uart_irq(1, 3);
bogdanm 0:9b334a45a8ff 350 }
bogdanm 0:9b334a45a8ff 351 if(LPC_USART3->STAT & (1 << 0)){
bogdanm 0:9b334a45a8ff 352 uart_irq(2, 3);
bogdanm 0:9b334a45a8ff 353 }
bogdanm 0:9b334a45a8ff 354 }
bogdanm 0:9b334a45a8ff 355
bogdanm 0:9b334a45a8ff 356 void uart4_irq()
bogdanm 0:9b334a45a8ff 357 {
bogdanm 0:9b334a45a8ff 358 if(LPC_USART4->STAT & (1 << 2)){
bogdanm 0:9b334a45a8ff 359 uart_irq(1, 4);
bogdanm 0:9b334a45a8ff 360 }
bogdanm 0:9b334a45a8ff 361 if(LPC_USART4->STAT & (1 << 0)){
bogdanm 0:9b334a45a8ff 362 uart_irq(2, 4);
bogdanm 0:9b334a45a8ff 363 }
bogdanm 0:9b334a45a8ff 364 }
bogdanm 0:9b334a45a8ff 365
bogdanm 0:9b334a45a8ff 366 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
bogdanm 0:9b334a45a8ff 367 irq_handler = handler;
bogdanm 0:9b334a45a8ff 368 serial_irq_ids[obj->index] = id;
bogdanm 0:9b334a45a8ff 369 }
bogdanm 0:9b334a45a8ff 370
bogdanm 0:9b334a45a8ff 371 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
bogdanm 0:9b334a45a8ff 372 IRQn_Type irq_n = (IRQn_Type)0;
bogdanm 0:9b334a45a8ff 373 uint32_t vector = 0;
bogdanm 0:9b334a45a8ff 374 if(obj->index == 0){
bogdanm 0:9b334a45a8ff 375 irq_n = USART0_IRQn; vector = (uint32_t)&uart0_irq;
bogdanm 0:9b334a45a8ff 376 }
bogdanm 0:9b334a45a8ff 377 else{
bogdanm 0:9b334a45a8ff 378 switch ((int)obj->mini_uart) {
bogdanm 0:9b334a45a8ff 379 case UART_0: irq_n = USART0_IRQn; vector = (uint32_t)&uart0_irq; break;
bogdanm 0:9b334a45a8ff 380 case UART_1: irq_n = USART1_4_IRQn; vector = (uint32_t)&uart1_irq; break;
bogdanm 0:9b334a45a8ff 381 case UART_2: irq_n = USART2_3_IRQn; vector = (uint32_t)&uart2_irq; break;
bogdanm 0:9b334a45a8ff 382 case UART_3: irq_n = USART2_3_IRQn; vector = (uint32_t)&uart3_irq; break;
bogdanm 0:9b334a45a8ff 383 case UART_4: irq_n = USART1_4_IRQn; vector = (uint32_t)&uart4_irq; break;
bogdanm 0:9b334a45a8ff 384 }
bogdanm 0:9b334a45a8ff 385 }
bogdanm 0:9b334a45a8ff 386
bogdanm 0:9b334a45a8ff 387 if (enable) {
bogdanm 0:9b334a45a8ff 388 if (obj->index == 0) {
bogdanm 0:9b334a45a8ff 389 obj->uart->IER |= (1 << irq);
bogdanm 0:9b334a45a8ff 390 }
bogdanm 0:9b334a45a8ff 391 else {
bogdanm 0:9b334a45a8ff 392 obj->mini_uart->INTENSET = (1 << ((irq == RxIrq) ? 0 : 2));
bogdanm 0:9b334a45a8ff 393 }
bogdanm 0:9b334a45a8ff 394 NVIC_SetVector(irq_n, vector);
bogdanm 0:9b334a45a8ff 395 NVIC_EnableIRQ(irq_n);
bogdanm 0:9b334a45a8ff 396 } else { // disable
bogdanm 0:9b334a45a8ff 397 int all_disabled = 0;
bogdanm 0:9b334a45a8ff 398 SerialIrq other_irq = (irq == RxIrq) ? (RxIrq) : (TxIrq);
bogdanm 0:9b334a45a8ff 399
bogdanm 0:9b334a45a8ff 400 if (obj->index == 0) {
bogdanm 0:9b334a45a8ff 401 obj->uart->IER &= ~(1 << irq);
bogdanm 0:9b334a45a8ff 402 all_disabled = (obj->uart->IER & (1 << other_irq)) == 0;
bogdanm 0:9b334a45a8ff 403 }
bogdanm 0:9b334a45a8ff 404 else {
bogdanm 0:9b334a45a8ff 405 obj->mini_uart->INTENCLR = (1 << ((irq == RxIrq) ? 0 : 2));
bogdanm 0:9b334a45a8ff 406 all_disabled = (obj->mini_uart->INTENSET) == 0;
bogdanm 0:9b334a45a8ff 407 }
bogdanm 0:9b334a45a8ff 408
bogdanm 0:9b334a45a8ff 409 if (all_disabled)
bogdanm 0:9b334a45a8ff 410 NVIC_DisableIRQ(irq_n);
bogdanm 0:9b334a45a8ff 411 }
bogdanm 0:9b334a45a8ff 412 }
bogdanm 0:9b334a45a8ff 413
bogdanm 0:9b334a45a8ff 414 /******************************************************************************
bogdanm 0:9b334a45a8ff 415 * READ/WRITE
bogdanm 0:9b334a45a8ff 416 ******************************************************************************/
bogdanm 0:9b334a45a8ff 417 int serial_getc(serial_t *obj) {
bogdanm 0:9b334a45a8ff 418 while (!serial_readable(obj));
bogdanm 0:9b334a45a8ff 419 if (obj->index == 0) {
bogdanm 0:9b334a45a8ff 420 return obj->uart->RBR;
bogdanm 0:9b334a45a8ff 421 }
bogdanm 0:9b334a45a8ff 422 else {
bogdanm 0:9b334a45a8ff 423 return obj->mini_uart->RXDAT;
bogdanm 0:9b334a45a8ff 424 }
bogdanm 0:9b334a45a8ff 425 }
bogdanm 0:9b334a45a8ff 426
bogdanm 0:9b334a45a8ff 427 void serial_putc(serial_t *obj, int c) {
bogdanm 0:9b334a45a8ff 428 while (!serial_writable(obj));
bogdanm 0:9b334a45a8ff 429 if (obj->index == 0) {
bogdanm 0:9b334a45a8ff 430 obj->uart->THR = c;
bogdanm 0:9b334a45a8ff 431 }
bogdanm 0:9b334a45a8ff 432 else {
bogdanm 0:9b334a45a8ff 433 obj->mini_uart->TXDAT = c;
bogdanm 0:9b334a45a8ff 434 }
bogdanm 0:9b334a45a8ff 435 }
bogdanm 0:9b334a45a8ff 436
bogdanm 0:9b334a45a8ff 437 int serial_readable(serial_t *obj) {
bogdanm 0:9b334a45a8ff 438 if (obj->index == 0) {
bogdanm 0:9b334a45a8ff 439 return obj->uart->LSR & 0x01;
bogdanm 0:9b334a45a8ff 440 }
bogdanm 0:9b334a45a8ff 441 else {
bogdanm 0:9b334a45a8ff 442 return obj->mini_uart->STAT & RXRDY;
bogdanm 0:9b334a45a8ff 443 }
bogdanm 0:9b334a45a8ff 444 }
bogdanm 0:9b334a45a8ff 445
bogdanm 0:9b334a45a8ff 446 int serial_writable(serial_t *obj) {
bogdanm 0:9b334a45a8ff 447 if (obj->index == 0) {
bogdanm 0:9b334a45a8ff 448 return obj->uart->LSR & 0x20;
bogdanm 0:9b334a45a8ff 449 }
bogdanm 0:9b334a45a8ff 450 else {
bogdanm 0:9b334a45a8ff 451 return obj->mini_uart->STAT & TXRDY;
bogdanm 0:9b334a45a8ff 452 }
bogdanm 0:9b334a45a8ff 453 }
bogdanm 0:9b334a45a8ff 454
bogdanm 0:9b334a45a8ff 455 void serial_clear(serial_t *obj) {
bogdanm 0:9b334a45a8ff 456 if (obj->index == 0) {
bogdanm 0:9b334a45a8ff 457 obj->uart->FCR = 1 << 1 // rx FIFO reset
bogdanm 0:9b334a45a8ff 458 | 1 << 2 // tx FIFO reset
bogdanm 0:9b334a45a8ff 459 | 0 << 6; // interrupt depth
bogdanm 0:9b334a45a8ff 460 }
bogdanm 0:9b334a45a8ff 461 else {
bogdanm 0:9b334a45a8ff 462 obj->mini_uart->STAT = 0;
bogdanm 0:9b334a45a8ff 463 }
bogdanm 0:9b334a45a8ff 464 }
bogdanm 0:9b334a45a8ff 465
bogdanm 0:9b334a45a8ff 466 void serial_pinout_tx(PinName tx) {
bogdanm 0:9b334a45a8ff 467 pinmap_pinout(tx, PinMap_UART_TX);
bogdanm 0:9b334a45a8ff 468 }
bogdanm 0:9b334a45a8ff 469
bogdanm 0:9b334a45a8ff 470 void serial_break_set(serial_t *obj) {
bogdanm 0:9b334a45a8ff 471 if (obj->index == 0) {
bogdanm 0:9b334a45a8ff 472 obj->uart->LCR |= (1 << 6);
bogdanm 0:9b334a45a8ff 473 }
bogdanm 0:9b334a45a8ff 474 else {
bogdanm 0:9b334a45a8ff 475 obj->mini_uart->CTL |= TXBRKEN;
bogdanm 0:9b334a45a8ff 476 }
bogdanm 0:9b334a45a8ff 477 }
bogdanm 0:9b334a45a8ff 478
bogdanm 0:9b334a45a8ff 479 void serial_break_clear(serial_t *obj) {
bogdanm 0:9b334a45a8ff 480 if (obj->index == 0) {
bogdanm 0:9b334a45a8ff 481 obj->uart->LCR &= ~(1 << 6);
bogdanm 0:9b334a45a8ff 482 }
bogdanm 0:9b334a45a8ff 483 else {
bogdanm 0:9b334a45a8ff 484 obj->mini_uart->CTL &= ~TXBRKEN;
bogdanm 0:9b334a45a8ff 485 }
bogdanm 0:9b334a45a8ff 486 }
bogdanm 0:9b334a45a8ff 487
bogdanm 0:9b334a45a8ff 488
bogdanm 0:9b334a45a8ff 489 #endif