mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/hal/TARGET_Freescale/TARGET_KLXX/TARGET_KL25Z/serial_api.c@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:
bogdanm
Date:
Thu Oct 01 15:25:22 2015 +0300
Revision:
0:9b334a45a8ff
Child:
144:ef7eb2e8f9f7
Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 0:9b334a45a8ff 5 * you may not use this file except in compliance with the License.
bogdanm 0:9b334a45a8ff 6 * You may obtain a copy of the License at
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 0:9b334a45a8ff 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 0:9b334a45a8ff 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 0:9b334a45a8ff 13 * See the License for the specific language governing permissions and
bogdanm 0:9b334a45a8ff 14 * limitations under the License.
bogdanm 0:9b334a45a8ff 15 */
bogdanm 0:9b334a45a8ff 16 #include "mbed_assert.h"
bogdanm 0:9b334a45a8ff 17 #include "serial_api.h"
bogdanm 0:9b334a45a8ff 18
bogdanm 0:9b334a45a8ff 19 // math.h required for floating point operations for baud rate calculation
bogdanm 0:9b334a45a8ff 20 #include <math.h>
bogdanm 0:9b334a45a8ff 21
bogdanm 0:9b334a45a8ff 22 #include <string.h>
bogdanm 0:9b334a45a8ff 23
bogdanm 0:9b334a45a8ff 24 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 25 #include "pinmap.h"
bogdanm 0:9b334a45a8ff 26 #include "clk_freqs.h"
bogdanm 0:9b334a45a8ff 27 #include "PeripheralPins.h"
bogdanm 0:9b334a45a8ff 28
bogdanm 0:9b334a45a8ff 29 //Devices either user UART0 or UARTLP
bogdanm 0:9b334a45a8ff 30 #ifndef UARTLP_BASES
bogdanm 0:9b334a45a8ff 31 #define UARTLP_C2_RE_MASK UART0_C2_RE_MASK
bogdanm 0:9b334a45a8ff 32 #define UARTLP_C2_TE_MASK UART0_C2_TE_MASK
bogdanm 0:9b334a45a8ff 33 #define UARTLP_BDH_SBNS_MASK UART0_BDH_SBNS_MASK
bogdanm 0:9b334a45a8ff 34 #define UARTLP_BDH_SBNS_SHIFT UART0_BDH_SBNS_SHIFT
bogdanm 0:9b334a45a8ff 35 #define UARTLP_S1_TDRE_MASK UART0_S1_TDRE_MASK
bogdanm 0:9b334a45a8ff 36 #define UARTLP_S1_TC_MASK UART0_S1_TC_MASK
bogdanm 0:9b334a45a8ff 37 #define UARTLP_S1_OR_MASK UART0_S1_OR_MASK
bogdanm 0:9b334a45a8ff 38 #define UARTLP_C2_RIE_MASK UART0_C2_RIE_MASK
bogdanm 0:9b334a45a8ff 39 #define UARTLP_C2_TIE_MASK UART0_C2_TIE_MASK
bogdanm 0:9b334a45a8ff 40 #define UARTLP_C2_SBK_MASK UART0_C2_SBK_MASK
bogdanm 0:9b334a45a8ff 41 #define UARTLP_S1_RDRF_MASK UART0_S1_RDRF_MASK
bogdanm 0:9b334a45a8ff 42 #endif
bogdanm 0:9b334a45a8ff 43
bogdanm 0:9b334a45a8ff 44 #ifdef UART2
bogdanm 0:9b334a45a8ff 45 #define UART_NUM 3
bogdanm 0:9b334a45a8ff 46 #else
bogdanm 0:9b334a45a8ff 47 #define UART_NUM 1
bogdanm 0:9b334a45a8ff 48 #endif
bogdanm 0:9b334a45a8ff 49
bogdanm 0:9b334a45a8ff 50 /******************************************************************************
bogdanm 0:9b334a45a8ff 51 * INITIALIZATION
bogdanm 0:9b334a45a8ff 52 ******************************************************************************/
bogdanm 0:9b334a45a8ff 53
bogdanm 0:9b334a45a8ff 54 static uint32_t serial_irq_ids[UART_NUM] = {0};
bogdanm 0:9b334a45a8ff 55 static uart_irq_handler irq_handler;
bogdanm 0:9b334a45a8ff 56
bogdanm 0:9b334a45a8ff 57 int stdio_uart_inited = 0;
bogdanm 0:9b334a45a8ff 58 serial_t stdio_uart;
bogdanm 0:9b334a45a8ff 59
bogdanm 0:9b334a45a8ff 60 void serial_init(serial_t *obj, PinName tx, PinName rx) {
bogdanm 0:9b334a45a8ff 61 // determine the UART to use
bogdanm 0:9b334a45a8ff 62 UARTName uart_tx = (UARTName)pinmap_peripheral(tx, PinMap_UART_TX);
bogdanm 0:9b334a45a8ff 63 UARTName uart_rx = (UARTName)pinmap_peripheral(rx, PinMap_UART_RX);
bogdanm 0:9b334a45a8ff 64 UARTName uart = (UARTName)pinmap_merge(uart_tx, uart_rx);
bogdanm 0:9b334a45a8ff 65 MBED_ASSERT((int)uart != NC);
bogdanm 0:9b334a45a8ff 66
bogdanm 0:9b334a45a8ff 67 obj->uart = (UARTLP_Type *)uart;
bogdanm 0:9b334a45a8ff 68 // enable clk
bogdanm 0:9b334a45a8ff 69 switch (uart) {
bogdanm 0:9b334a45a8ff 70 case UART_0: if (mcgpllfll_frequency() != 0) //PLL/FLL is selected
bogdanm 0:9b334a45a8ff 71 SIM->SOPT2 |= (1<<SIM_SOPT2_UART0SRC_SHIFT);
bogdanm 0:9b334a45a8ff 72 else
bogdanm 0:9b334a45a8ff 73 SIM->SOPT2 |= (2<<SIM_SOPT2_UART0SRC_SHIFT);
bogdanm 0:9b334a45a8ff 74 SIM->SCGC4 |= SIM_SCGC4_UART0_MASK; break;
bogdanm 0:9b334a45a8ff 75 #if UART_NUM > 1
bogdanm 0:9b334a45a8ff 76 case UART_1: SIM->SCGC4 |= SIM_SCGC4_UART1_MASK; break;
bogdanm 0:9b334a45a8ff 77 case UART_2: SIM->SCGC4 |= SIM_SCGC4_UART2_MASK; break;
bogdanm 0:9b334a45a8ff 78 #endif
bogdanm 0:9b334a45a8ff 79 }
bogdanm 0:9b334a45a8ff 80 // Disable UART before changing registers
bogdanm 0:9b334a45a8ff 81 obj->uart->C2 &= ~(UARTLP_C2_RE_MASK | UARTLP_C2_TE_MASK);
bogdanm 0:9b334a45a8ff 82
bogdanm 0:9b334a45a8ff 83 // Enable UART transmitter to ensure TX activity is finished
bogdanm 0:9b334a45a8ff 84 obj->uart->C2 |= UARTLP_C2_TE_MASK;
bogdanm 0:9b334a45a8ff 85
bogdanm 0:9b334a45a8ff 86 // Wait for TX activity to finish
bogdanm 0:9b334a45a8ff 87 while(!(obj->uart->S1 & UARTLP_S1_TC_MASK));
bogdanm 0:9b334a45a8ff 88
bogdanm 0:9b334a45a8ff 89 // Disbale UARTs again
bogdanm 0:9b334a45a8ff 90 obj->uart->C2 &= ~(UARTLP_C2_RE_MASK | UARTLP_C2_TE_MASK);
bogdanm 0:9b334a45a8ff 91
bogdanm 0:9b334a45a8ff 92
bogdanm 0:9b334a45a8ff 93 switch (uart) {
bogdanm 0:9b334a45a8ff 94 case UART_0: obj->index = 0; break;
bogdanm 0:9b334a45a8ff 95 #if UART_NUM > 1
bogdanm 0:9b334a45a8ff 96 case UART_1: obj->index = 1; break;
bogdanm 0:9b334a45a8ff 97 case UART_2: obj->index = 2; break;
bogdanm 0:9b334a45a8ff 98 #endif
bogdanm 0:9b334a45a8ff 99 }
bogdanm 0:9b334a45a8ff 100
bogdanm 0:9b334a45a8ff 101 // set default baud rate and format
bogdanm 0:9b334a45a8ff 102 serial_baud (obj, 9600);
bogdanm 0:9b334a45a8ff 103 serial_format(obj, 8, ParityNone, 1);
bogdanm 0:9b334a45a8ff 104
bogdanm 0:9b334a45a8ff 105 // pinout the chosen uart
bogdanm 0:9b334a45a8ff 106 pinmap_pinout(tx, PinMap_UART_TX);
bogdanm 0:9b334a45a8ff 107 pinmap_pinout(rx, PinMap_UART_RX);
bogdanm 0:9b334a45a8ff 108
bogdanm 0:9b334a45a8ff 109 // set rx/tx pins in PullUp mode and enable TX/RX
bogdanm 0:9b334a45a8ff 110 if (tx != NC) {
bogdanm 0:9b334a45a8ff 111 obj->uart->C2 |= UARTLP_C2_TE_MASK;
bogdanm 0:9b334a45a8ff 112 pin_mode(tx, PullUp);
bogdanm 0:9b334a45a8ff 113 }
bogdanm 0:9b334a45a8ff 114 if (rx != NC) {
bogdanm 0:9b334a45a8ff 115 obj->uart->C2 |= UARTLP_C2_RE_MASK;
bogdanm 0:9b334a45a8ff 116 pin_mode(rx, PullUp);
bogdanm 0:9b334a45a8ff 117 }
bogdanm 0:9b334a45a8ff 118
bogdanm 0:9b334a45a8ff 119 if (uart == STDIO_UART) {
bogdanm 0:9b334a45a8ff 120 stdio_uart_inited = 1;
bogdanm 0:9b334a45a8ff 121 memcpy(&stdio_uart, obj, sizeof(serial_t));
bogdanm 0:9b334a45a8ff 122 }
bogdanm 0:9b334a45a8ff 123 }
bogdanm 0:9b334a45a8ff 124
bogdanm 0:9b334a45a8ff 125 void serial_free(serial_t *obj) {
bogdanm 0:9b334a45a8ff 126 serial_irq_ids[obj->index] = 0;
bogdanm 0:9b334a45a8ff 127 }
bogdanm 0:9b334a45a8ff 128
bogdanm 0:9b334a45a8ff 129 // serial_baud
bogdanm 0:9b334a45a8ff 130 //
bogdanm 0:9b334a45a8ff 131 // set the baud rate, taking in to account the current SystemFrequency
bogdanm 0:9b334a45a8ff 132 void serial_baud(serial_t *obj, int baudrate) {
bogdanm 0:9b334a45a8ff 133
bogdanm 0:9b334a45a8ff 134 // save C2 state
bogdanm 0:9b334a45a8ff 135 uint8_t c2_state = (obj->uart->C2 & (UARTLP_C2_RE_MASK | UARTLP_C2_TE_MASK));
bogdanm 0:9b334a45a8ff 136
bogdanm 0:9b334a45a8ff 137 // Disable UART before changing registers
bogdanm 0:9b334a45a8ff 138 obj->uart->C2 &= ~(UARTLP_C2_RE_MASK | UARTLP_C2_TE_MASK);
bogdanm 0:9b334a45a8ff 139
bogdanm 0:9b334a45a8ff 140 uint32_t PCLK;
bogdanm 0:9b334a45a8ff 141 if (obj->uart == UART0) {
bogdanm 0:9b334a45a8ff 142 if (mcgpllfll_frequency() != 0)
bogdanm 0:9b334a45a8ff 143 PCLK = mcgpllfll_frequency();
bogdanm 0:9b334a45a8ff 144 else
bogdanm 0:9b334a45a8ff 145 PCLK = extosc_frequency();
bogdanm 0:9b334a45a8ff 146 } else
bogdanm 0:9b334a45a8ff 147 PCLK = bus_frequency();
bogdanm 0:9b334a45a8ff 148
bogdanm 0:9b334a45a8ff 149 // First we check to see if the basic divide with no DivAddVal/MulVal
bogdanm 0:9b334a45a8ff 150 // ratio gives us an integer result. If it does, we set DivAddVal = 0,
bogdanm 0:9b334a45a8ff 151 // MulVal = 1. Otherwise, we search the valid ratio value range to find
bogdanm 0:9b334a45a8ff 152 // the closest match. This could be more elegant, using search methods
bogdanm 0:9b334a45a8ff 153 // and/or lookup tables, but the brute force method is not that much
bogdanm 0:9b334a45a8ff 154 // slower, and is more maintainable.
bogdanm 0:9b334a45a8ff 155 uint16_t DL = PCLK / (16 * baudrate);
bogdanm 0:9b334a45a8ff 156
bogdanm 0:9b334a45a8ff 157 // set BDH and BDL
bogdanm 0:9b334a45a8ff 158 obj->uart->BDH = (obj->uart->BDH & ~(0x1f)) | ((DL >> 8) & 0x1f);
bogdanm 0:9b334a45a8ff 159 obj->uart->BDL = (obj->uart->BDL & ~(0xff)) | ((DL >> 0) & 0xff);
bogdanm 0:9b334a45a8ff 160
bogdanm 0:9b334a45a8ff 161 // restore C2 state
bogdanm 0:9b334a45a8ff 162 obj->uart->C2 |= c2_state;
bogdanm 0:9b334a45a8ff 163 }
bogdanm 0:9b334a45a8ff 164
bogdanm 0:9b334a45a8ff 165 void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) {
bogdanm 0:9b334a45a8ff 166 MBED_ASSERT((stop_bits == 1) || (stop_bits == 2));
bogdanm 0:9b334a45a8ff 167 MBED_ASSERT((parity == ParityNone) || (parity == ParityOdd) || (parity == ParityEven));
bogdanm 0:9b334a45a8ff 168 MBED_ASSERT(data_bits == 8); // TODO: Support other number of data bits (also in the write method!)
bogdanm 0:9b334a45a8ff 169
bogdanm 0:9b334a45a8ff 170 // save C2 state
bogdanm 0:9b334a45a8ff 171 uint8_t c2_state = (obj->uart->C2 & (UARTLP_C2_RE_MASK | UARTLP_C2_TE_MASK));
bogdanm 0:9b334a45a8ff 172
bogdanm 0:9b334a45a8ff 173 // Disable UART before changing registers
bogdanm 0:9b334a45a8ff 174 obj->uart->C2 &= ~(UARTLP_C2_RE_MASK | UARTLP_C2_TE_MASK);
bogdanm 0:9b334a45a8ff 175
bogdanm 0:9b334a45a8ff 176
bogdanm 0:9b334a45a8ff 177 uint8_t parity_enable, parity_select;
bogdanm 0:9b334a45a8ff 178 switch (parity) {
bogdanm 0:9b334a45a8ff 179 case ParityNone: parity_enable = 0; parity_select = 0; break;
bogdanm 0:9b334a45a8ff 180 case ParityOdd : parity_enable = 1; parity_select = 1; data_bits++; break;
bogdanm 0:9b334a45a8ff 181 case ParityEven: parity_enable = 1; parity_select = 0; data_bits++; break;
bogdanm 0:9b334a45a8ff 182 default:
bogdanm 0:9b334a45a8ff 183 break;
bogdanm 0:9b334a45a8ff 184 }
bogdanm 0:9b334a45a8ff 185
bogdanm 0:9b334a45a8ff 186 stop_bits -= 1;
bogdanm 0:9b334a45a8ff 187
bogdanm 0:9b334a45a8ff 188 // data bits, parity and parity mode
bogdanm 0:9b334a45a8ff 189 obj->uart->C1 = ((parity_enable << 1)
bogdanm 0:9b334a45a8ff 190 | (parity_select << 0));
bogdanm 0:9b334a45a8ff 191
bogdanm 0:9b334a45a8ff 192 // stop bits
bogdanm 0:9b334a45a8ff 193 obj->uart->BDH &= ~UARTLP_BDH_SBNS_MASK;
bogdanm 0:9b334a45a8ff 194 obj->uart->BDH |= (stop_bits << UARTLP_BDH_SBNS_SHIFT);
bogdanm 0:9b334a45a8ff 195
bogdanm 0:9b334a45a8ff 196 // restore C2 state
bogdanm 0:9b334a45a8ff 197 obj->uart->C2 |= c2_state;
bogdanm 0:9b334a45a8ff 198 }
bogdanm 0:9b334a45a8ff 199
bogdanm 0:9b334a45a8ff 200 /******************************************************************************
bogdanm 0:9b334a45a8ff 201 * INTERRUPTS HANDLING
bogdanm 0:9b334a45a8ff 202 ******************************************************************************/
bogdanm 0:9b334a45a8ff 203 static inline void uart_irq(uint8_t status, uint32_t index) {
bogdanm 0:9b334a45a8ff 204 if (serial_irq_ids[index] != 0) {
bogdanm 0:9b334a45a8ff 205 if (status & UARTLP_S1_TDRE_MASK)
bogdanm 0:9b334a45a8ff 206 irq_handler(serial_irq_ids[index], TxIrq);
bogdanm 0:9b334a45a8ff 207
bogdanm 0:9b334a45a8ff 208 if (status & UARTLP_S1_RDRF_MASK)
bogdanm 0:9b334a45a8ff 209 irq_handler(serial_irq_ids[index], RxIrq);
bogdanm 0:9b334a45a8ff 210 }
bogdanm 0:9b334a45a8ff 211 }
bogdanm 0:9b334a45a8ff 212
bogdanm 0:9b334a45a8ff 213 void uart0_irq() {
bogdanm 0:9b334a45a8ff 214 uart_irq(UART0->S1, 0);
bogdanm 0:9b334a45a8ff 215 if (UART0->S1 & UARTLP_S1_OR_MASK)
bogdanm 0:9b334a45a8ff 216 UART0->S1 |= UARTLP_S1_OR_MASK;
bogdanm 0:9b334a45a8ff 217 }
bogdanm 0:9b334a45a8ff 218 #if UART_NUM > 1
bogdanm 0:9b334a45a8ff 219 void uart1_irq() {uart_irq(UART1->S1, 1);}
bogdanm 0:9b334a45a8ff 220 void uart2_irq() {uart_irq(UART2->S1, 2);}
bogdanm 0:9b334a45a8ff 221 #endif
bogdanm 0:9b334a45a8ff 222
bogdanm 0:9b334a45a8ff 223 void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) {
bogdanm 0:9b334a45a8ff 224 irq_handler = handler;
bogdanm 0:9b334a45a8ff 225 serial_irq_ids[obj->index] = id;
bogdanm 0:9b334a45a8ff 226 }
bogdanm 0:9b334a45a8ff 227
bogdanm 0:9b334a45a8ff 228 void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) {
bogdanm 0:9b334a45a8ff 229 IRQn_Type irq_n = (IRQn_Type)0;
bogdanm 0:9b334a45a8ff 230 uint32_t vector = 0;
bogdanm 0:9b334a45a8ff 231 switch ((int)obj->uart) {
bogdanm 0:9b334a45a8ff 232 case UART_0: irq_n=UART0_IRQn; vector = (uint32_t)&uart0_irq; break;
bogdanm 0:9b334a45a8ff 233 #if UART_NUM > 1
bogdanm 0:9b334a45a8ff 234 case UART_1: irq_n=UART1_IRQn; vector = (uint32_t)&uart1_irq; break;
bogdanm 0:9b334a45a8ff 235 case UART_2: irq_n=UART2_IRQn; vector = (uint32_t)&uart2_irq; break;
bogdanm 0:9b334a45a8ff 236 #endif
bogdanm 0:9b334a45a8ff 237 }
bogdanm 0:9b334a45a8ff 238
bogdanm 0:9b334a45a8ff 239 if (enable) {
bogdanm 0:9b334a45a8ff 240 switch (irq) {
bogdanm 0:9b334a45a8ff 241 case RxIrq: obj->uart->C2 |= (UARTLP_C2_RIE_MASK); break;
bogdanm 0:9b334a45a8ff 242 case TxIrq: obj->uart->C2 |= (UARTLP_C2_TIE_MASK); break;
bogdanm 0:9b334a45a8ff 243 }
bogdanm 0:9b334a45a8ff 244 NVIC_SetVector(irq_n, vector);
bogdanm 0:9b334a45a8ff 245 NVIC_EnableIRQ(irq_n);
bogdanm 0:9b334a45a8ff 246
bogdanm 0:9b334a45a8ff 247 } else { // disable
bogdanm 0:9b334a45a8ff 248 int all_disabled = 0;
bogdanm 0:9b334a45a8ff 249 SerialIrq other_irq = (irq == RxIrq) ? (TxIrq) : (RxIrq);
bogdanm 0:9b334a45a8ff 250 switch (irq) {
bogdanm 0:9b334a45a8ff 251 case RxIrq: obj->uart->C2 &= ~(UARTLP_C2_RIE_MASK); break;
bogdanm 0:9b334a45a8ff 252 case TxIrq: obj->uart->C2 &= ~(UARTLP_C2_TIE_MASK); break;
bogdanm 0:9b334a45a8ff 253 }
bogdanm 0:9b334a45a8ff 254 switch (other_irq) {
bogdanm 0:9b334a45a8ff 255 case RxIrq: all_disabled = (obj->uart->C2 & (UARTLP_C2_RIE_MASK)) == 0; break;
bogdanm 0:9b334a45a8ff 256 case TxIrq: all_disabled = (obj->uart->C2 & (UARTLP_C2_TIE_MASK)) == 0; break;
bogdanm 0:9b334a45a8ff 257 }
bogdanm 0:9b334a45a8ff 258 if (all_disabled)
bogdanm 0:9b334a45a8ff 259 NVIC_DisableIRQ(irq_n);
bogdanm 0:9b334a45a8ff 260 }
bogdanm 0:9b334a45a8ff 261 }
bogdanm 0:9b334a45a8ff 262
bogdanm 0:9b334a45a8ff 263 /******************************************************************************
bogdanm 0:9b334a45a8ff 264 * READ/WRITE
bogdanm 0:9b334a45a8ff 265 ******************************************************************************/
bogdanm 0:9b334a45a8ff 266 int serial_getc(serial_t *obj) {
bogdanm 0:9b334a45a8ff 267 while (!serial_readable(obj));
bogdanm 0:9b334a45a8ff 268 return obj->uart->D;
bogdanm 0:9b334a45a8ff 269 }
bogdanm 0:9b334a45a8ff 270
bogdanm 0:9b334a45a8ff 271 void serial_putc(serial_t *obj, int c) {
bogdanm 0:9b334a45a8ff 272 while (!serial_writable(obj));
bogdanm 0:9b334a45a8ff 273 obj->uart->D = c;
bogdanm 0:9b334a45a8ff 274 }
bogdanm 0:9b334a45a8ff 275
bogdanm 0:9b334a45a8ff 276 int serial_readable(serial_t *obj) {
bogdanm 0:9b334a45a8ff 277 // check overrun
bogdanm 0:9b334a45a8ff 278 if (obj->uart->S1 & UARTLP_S1_OR_MASK) {
bogdanm 0:9b334a45a8ff 279 obj->uart->S1 |= UARTLP_S1_OR_MASK;
bogdanm 0:9b334a45a8ff 280 }
bogdanm 0:9b334a45a8ff 281 return (obj->uart->S1 & UARTLP_S1_RDRF_MASK);
bogdanm 0:9b334a45a8ff 282 }
bogdanm 0:9b334a45a8ff 283
bogdanm 0:9b334a45a8ff 284 int serial_writable(serial_t *obj) {
bogdanm 0:9b334a45a8ff 285 // check overrun
bogdanm 0:9b334a45a8ff 286 if (obj->uart->S1 & UARTLP_S1_OR_MASK) {
bogdanm 0:9b334a45a8ff 287 obj->uart->S1 |= UARTLP_S1_OR_MASK;
bogdanm 0:9b334a45a8ff 288 }
bogdanm 0:9b334a45a8ff 289 return (obj->uart->S1 & UARTLP_S1_TDRE_MASK);
bogdanm 0:9b334a45a8ff 290 }
bogdanm 0:9b334a45a8ff 291
bogdanm 0:9b334a45a8ff 292 void serial_clear(serial_t *obj) {
bogdanm 0:9b334a45a8ff 293 }
bogdanm 0:9b334a45a8ff 294
bogdanm 0:9b334a45a8ff 295 void serial_pinout_tx(PinName tx) {
bogdanm 0:9b334a45a8ff 296 pinmap_pinout(tx, PinMap_UART_TX);
bogdanm 0:9b334a45a8ff 297 }
bogdanm 0:9b334a45a8ff 298
bogdanm 0:9b334a45a8ff 299 void serial_break_set(serial_t *obj) {
bogdanm 0:9b334a45a8ff 300 obj->uart->C2 |= UARTLP_C2_SBK_MASK;
bogdanm 0:9b334a45a8ff 301 }
bogdanm 0:9b334a45a8ff 302
bogdanm 0:9b334a45a8ff 303 void serial_break_clear(serial_t *obj) {
bogdanm 0:9b334a45a8ff 304 obj->uart->C2 &= ~UARTLP_C2_SBK_MASK;
bogdanm 0:9b334a45a8ff 305 }