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mbed library sources. Supersedes mbed-src.

Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/cmsis/TARGET_STM/TARGET_STM32F0/stm32f0xx_hal_uart_ex.h@0:9b334a45a8ff, 2015-10-01 (annotated)

Committer:: bogdanm
Date:: Thu Oct 01 15:25:22 2015 +0300
Revision:: 0:9b334a45a8ff
Child:: 144:ef7eb2e8f9f7

Initial commit on mbed-dev



Replaces mbed-src (now inactive)

Who changed what in which revision?

User	Revision	Line number	New contents of line
bogdanm	0:9b334a45a8ff	1	/**
bogdanm	0:9b334a45a8ff	2	******************************************************************************
bogdanm	0:9b334a45a8ff	3	* @file stm32f0xx_hal_uart_ex.h
bogdanm	0:9b334a45a8ff	4	* @author MCD Application Team
bogdanm	0:9b334a45a8ff	5	* @version V1.3.0
bogdanm	0:9b334a45a8ff	6	* @date 26-June-2015
bogdanm	0:9b334a45a8ff	7	* @brief Header file of UART HAL Extension module.
bogdanm	0:9b334a45a8ff	8	******************************************************************************
bogdanm	0:9b334a45a8ff	9	* @attention
bogdanm	0:9b334a45a8ff	10	*
bogdanm	0:9b334a45a8ff	11	* <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
bogdanm	0:9b334a45a8ff	12	*
bogdanm	0:9b334a45a8ff	13	* Redistribution and use in source and binary forms, with or without modification,
bogdanm	0:9b334a45a8ff	14	* are permitted provided that the following conditions are met:
bogdanm	0:9b334a45a8ff	15	* 1. Redistributions of source code must retain the above copyright notice,
bogdanm	0:9b334a45a8ff	16	* this list of conditions and the following disclaimer.
bogdanm	0:9b334a45a8ff	17	* 2. Redistributions in binary form must reproduce the above copyright notice,
bogdanm	0:9b334a45a8ff	18	* this list of conditions and the following disclaimer in the documentation
bogdanm	0:9b334a45a8ff	19	* and/or other materials provided with the distribution.
bogdanm	0:9b334a45a8ff	20	* 3. Neither the name of STMicroelectronics nor the names of its contributors
bogdanm	0:9b334a45a8ff	21	* may be used to endorse or promote products derived from this software
bogdanm	0:9b334a45a8ff	22	* without specific prior written permission.
bogdanm	0:9b334a45a8ff	23	*
bogdanm	0:9b334a45a8ff	24	* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
bogdanm	0:9b334a45a8ff	25	* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
bogdanm	0:9b334a45a8ff	26	* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
bogdanm	0:9b334a45a8ff	27	* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
bogdanm	0:9b334a45a8ff	28	* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
bogdanm	0:9b334a45a8ff	29	* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
bogdanm	0:9b334a45a8ff	30	* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
bogdanm	0:9b334a45a8ff	31	* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
bogdanm	0:9b334a45a8ff	32	* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
bogdanm	0:9b334a45a8ff	33	* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
bogdanm	0:9b334a45a8ff	34	*
bogdanm	0:9b334a45a8ff	35	******************************************************************************
bogdanm	0:9b334a45a8ff	36	*/
bogdanm	0:9b334a45a8ff	37
bogdanm	0:9b334a45a8ff	38	/* Define to prevent recursive inclusion -------------------------------------*/
bogdanm	0:9b334a45a8ff	39	#ifndef __STM32F0xx_HAL_UART_EX_H
bogdanm	0:9b334a45a8ff	40	#define __STM32F0xx_HAL_UART_EX_H
bogdanm	0:9b334a45a8ff	41
bogdanm	0:9b334a45a8ff	42	#ifdef __cplusplus
bogdanm	0:9b334a45a8ff	43	extern "C" {
bogdanm	0:9b334a45a8ff	44	#endif
bogdanm	0:9b334a45a8ff	45
bogdanm	0:9b334a45a8ff	46	/* Includes ------------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	47	#include "stm32f0xx_hal_def.h"
bogdanm	0:9b334a45a8ff	48
bogdanm	0:9b334a45a8ff	49	/** @addtogroup STM32F0xx_HAL_Driver
bogdanm	0:9b334a45a8ff	50	* @{
bogdanm	0:9b334a45a8ff	51	*/
bogdanm	0:9b334a45a8ff	52
bogdanm	0:9b334a45a8ff	53	/** @addtogroup UARTEx
bogdanm	0:9b334a45a8ff	54	* @{
bogdanm	0:9b334a45a8ff	55	*/
bogdanm	0:9b334a45a8ff	56
bogdanm	0:9b334a45a8ff	57	/* Exported types ------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	58	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
bogdanm	0:9b334a45a8ff	59	/** @defgroup UARTEx_Exported_Types UARTEx Exported Types
bogdanm	0:9b334a45a8ff	60	* @{
bogdanm	0:9b334a45a8ff	61	*/
bogdanm	0:9b334a45a8ff	62
bogdanm	0:9b334a45a8ff	63	/**
bogdanm	0:9b334a45a8ff	64	* @brief UART wake up from stop mode parameters
bogdanm	0:9b334a45a8ff	65	*/
bogdanm	0:9b334a45a8ff	66	typedef struct
bogdanm	0:9b334a45a8ff	67	{
bogdanm	0:9b334a45a8ff	68	uint32_t WakeUpEvent; /*!< Specifies which event will activat the Wakeup from Stop mode flag (WUF).
bogdanm	0:9b334a45a8ff	69	This parameter can be a value of @ref UART_WakeUp_from_Stop_Selection.
bogdanm	0:9b334a45a8ff	70	If set to UART_WAKEUP_ON_ADDRESS, the two other fields below must
bogdanm	0:9b334a45a8ff	71	be filled up. */
bogdanm	0:9b334a45a8ff	72
bogdanm	0:9b334a45a8ff	73	uint16_t AddressLength; /*!< Specifies whether the address is 4 or 7-bit long.
bogdanm	0:9b334a45a8ff	74	This parameter can be a value of @ref UART_WakeUp_Address_Length */
bogdanm	0:9b334a45a8ff	75
bogdanm	0:9b334a45a8ff	76	uint8_t Address; /!< UART/USART node address (7-bit long max) /
bogdanm	0:9b334a45a8ff	77	} UART_WakeUpTypeDef;
bogdanm	0:9b334a45a8ff	78
bogdanm	0:9b334a45a8ff	79	/**
bogdanm	0:9b334a45a8ff	80	* @}
bogdanm	0:9b334a45a8ff	81	*/
bogdanm	0:9b334a45a8ff	82	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
bogdanm	0:9b334a45a8ff	83
bogdanm	0:9b334a45a8ff	84	/* Exported constants --------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	85	/** @defgroup UARTEx_Exported_Constants UARTEx Exported Constants
bogdanm	0:9b334a45a8ff	86	* @{
bogdanm	0:9b334a45a8ff	87	*/
bogdanm	0:9b334a45a8ff	88
bogdanm	0:9b334a45a8ff	89	/** @defgroup UARTEx_Word_Length UARTEx Word Length
bogdanm	0:9b334a45a8ff	90	* @{
bogdanm	0:9b334a45a8ff	91	*/
bogdanm	0:9b334a45a8ff	92	#if defined (STM32F042x6) \|\| defined (STM32F048xx) \|\| defined (STM32F070x6) \|\| \
bogdanm	0:9b334a45a8ff	93	defined (STM32F071xB) \|\| defined (STM32F072xB) \|\| defined (STM32F078xx) \|\| defined (STM32F070xB) \|\| \
bogdanm	0:9b334a45a8ff	94	defined (STM32F091xC) \|\| defined (STM32F098xx) \|\| defined (STM32F030xC)
bogdanm	0:9b334a45a8ff	95	#define UART_WORDLENGTH_7B ((uint32_t)USART_CR1_M1)
bogdanm	0:9b334a45a8ff	96	#define UART_WORDLENGTH_8B ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	97	#define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M0)
bogdanm	0:9b334a45a8ff	98	#else
bogdanm	0:9b334a45a8ff	99	#define UART_WORDLENGTH_8B ((uint32_t)0x00000000)
bogdanm	0:9b334a45a8ff	100	#define UART_WORDLENGTH_9B ((uint32_t)USART_CR1_M)
bogdanm	0:9b334a45a8ff	101	#endif /* defined (STM32F042x6) \|\| defined (STM32F048xx) \|\| defined (STM32F070x6) \|\| \
bogdanm	0:9b334a45a8ff	102	defined (STM32F071xB) \|\| defined (STM32F072xB) \|\| defined (STM32F078xx) \|\| defined (STM32F070xB) \|\| \
bogdanm	0:9b334a45a8ff	103	defined (STM32F091xC) \|\| defined (STM32F098xx) \|\| defined (STM32F030xC) */
bogdanm	0:9b334a45a8ff	104	/**
bogdanm	0:9b334a45a8ff	105	* @}
bogdanm	0:9b334a45a8ff	106	*/
bogdanm	0:9b334a45a8ff	107
bogdanm	0:9b334a45a8ff	108	/** @defgroup UARTEx_AutoBaud_Rate_Mode UARTEx Advanced Feature AutoBaud Rate Mode
bogdanm	0:9b334a45a8ff	109	* @{
bogdanm	0:9b334a45a8ff	110	*/
bogdanm	0:9b334a45a8ff	111	#if defined (STM32F042x6) \|\| defined (STM32F048xx) \|\| defined (STM32F070x6) \|\| \
bogdanm	0:9b334a45a8ff	112	defined (STM32F071xB) \|\| defined (STM32F072xB) \|\| defined (STM32F078xx) \|\| defined (STM32F070xB) \|\| \
bogdanm	0:9b334a45a8ff	113	defined (STM32F091xC) \|\| defined (STM32F098xx) \|\| defined (STM32F030xC)
bogdanm	0:9b334a45a8ff	114	#define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT ((uint32_t)0x00000000) /!< Auto Baud rate detection on start bit /
bogdanm	0:9b334a45a8ff	115	#define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE ((uint32_t)USART_CR2_ABRMODE_0) /!< Auto Baud rate detection on falling edge /
bogdanm	0:9b334a45a8ff	116	#define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME ((uint32_t)USART_CR2_ABRMODE_1) /!< Auto Baud rate detection on 0x7F frame detection /
bogdanm	0:9b334a45a8ff	117	#define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME ((uint32_t)USART_CR2_ABRMODE) /!< Auto Baud rate detection on 0x55 frame detection /
bogdanm	0:9b334a45a8ff	118	#else
bogdanm	0:9b334a45a8ff	119	#define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT ((uint32_t)0x00000000) /!< Auto Baud rate detection on start bit /
bogdanm	0:9b334a45a8ff	120	#define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE ((uint32_t)USART_CR2_ABRMODE_0) /!< Auto Baud rate detection on falling edge /
bogdanm	0:9b334a45a8ff	121	#endif /* defined (STM32F042x6) \|\| defined (STM32F048xx) \|\| defined (STM32F070x6) \|\| \
bogdanm	0:9b334a45a8ff	122	defined (STM32F071xB) \|\| defined (STM32F072xB) \|\| defined (STM32F078xx) \|\| defined (STM32F070xB) \|\| \
bogdanm	0:9b334a45a8ff	123	defined (STM32F091xC) \|\| defined (STM32F098xx) \|\| defined (STM32F030xC) */
bogdanm	0:9b334a45a8ff	124	/**
bogdanm	0:9b334a45a8ff	125	* @}
bogdanm	0:9b334a45a8ff	126	*/
bogdanm	0:9b334a45a8ff	127
bogdanm	0:9b334a45a8ff	128	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
bogdanm	0:9b334a45a8ff	129	/** @defgroup UARTEx_LIN UARTEx Local Interconnection Network mode
bogdanm	0:9b334a45a8ff	130	* @{
bogdanm	0:9b334a45a8ff	131	*/
bogdanm	0:9b334a45a8ff	132	#define UART_LIN_DISABLE ((uint32_t)0x00000000) /!< Local Interconnect Network disable /
bogdanm	0:9b334a45a8ff	133	#define UART_LIN_ENABLE ((uint32_t)USART_CR2_LINEN) /!< Local Interconnect Network enable /
bogdanm	0:9b334a45a8ff	134	/**
bogdanm	0:9b334a45a8ff	135	* @}
bogdanm	0:9b334a45a8ff	136	*/
bogdanm	0:9b334a45a8ff	137
bogdanm	0:9b334a45a8ff	138	/** @defgroup UARTEx_LIN_Break_Detection UARTEx LIN Break Detection
bogdanm	0:9b334a45a8ff	139	* @{
bogdanm	0:9b334a45a8ff	140	*/
bogdanm	0:9b334a45a8ff	141	#define UART_LINBREAKDETECTLENGTH_10B ((uint32_t)0x00000000) /!< LIN 10-bit break detection length /
bogdanm	0:9b334a45a8ff	142	#define UART_LINBREAKDETECTLENGTH_11B ((uint32_t)USART_CR2_LBDL) /!< LIN 11-bit break detection length /
bogdanm	0:9b334a45a8ff	143	/**
bogdanm	0:9b334a45a8ff	144	* @}
bogdanm	0:9b334a45a8ff	145	*/
bogdanm	0:9b334a45a8ff	146	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
bogdanm	0:9b334a45a8ff	147
bogdanm	0:9b334a45a8ff	148	/** @defgroup UART_Flags UARTEx Status Flags
bogdanm	0:9b334a45a8ff	149	* Elements values convention: 0xXXXX
bogdanm	0:9b334a45a8ff	150	* - 0xXXXX : Flag mask in the ISR register
bogdanm	0:9b334a45a8ff	151	* @{
bogdanm	0:9b334a45a8ff	152	*/
bogdanm	0:9b334a45a8ff	153	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
bogdanm	0:9b334a45a8ff	154	#define UART_FLAG_REACK ((uint32_t)0x00400000)
bogdanm	0:9b334a45a8ff	155	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
bogdanm	0:9b334a45a8ff	156	#define UART_FLAG_TEACK ((uint32_t)0x00200000)
bogdanm	0:9b334a45a8ff	157	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
bogdanm	0:9b334a45a8ff	158	#define UART_FLAG_WUF ((uint32_t)0x00100000)
bogdanm	0:9b334a45a8ff	159	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
bogdanm	0:9b334a45a8ff	160	#define UART_FLAG_RWU ((uint32_t)0x00080000)
bogdanm	0:9b334a45a8ff	161	#define UART_FLAG_SBKF ((uint32_t)0x00040000
bogdanm	0:9b334a45a8ff	162	#define UART_FLAG_CMF ((uint32_t)0x00020000)
bogdanm	0:9b334a45a8ff	163	#define UART_FLAG_BUSY ((uint32_t)0x00010000)
bogdanm	0:9b334a45a8ff	164	#define UART_FLAG_ABRF ((uint32_t)0x00008000)
bogdanm	0:9b334a45a8ff	165	#define UART_FLAG_ABRE ((uint32_t)0x00004000)
bogdanm	0:9b334a45a8ff	166	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
bogdanm	0:9b334a45a8ff	167	#define UART_FLAG_EOBF ((uint32_t)0x00001000)
bogdanm	0:9b334a45a8ff	168	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
bogdanm	0:9b334a45a8ff	169	#define UART_FLAG_RTOF ((uint32_t)0x00000800)
bogdanm	0:9b334a45a8ff	170	#define UART_FLAG_CTS ((uint32_t)0x00000400)
bogdanm	0:9b334a45a8ff	171	#define UART_FLAG_CTSIF ((uint32_t)0x00000200)
bogdanm	0:9b334a45a8ff	172	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
bogdanm	0:9b334a45a8ff	173	#define UART_FLAG_LBDF ((uint32_t)0x00000100)
bogdanm	0:9b334a45a8ff	174	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
bogdanm	0:9b334a45a8ff	175	#define UART_FLAG_TXE ((uint32_t)0x00000080)
bogdanm	0:9b334a45a8ff	176	#define UART_FLAG_TC ((uint32_t)0x00000040)
bogdanm	0:9b334a45a8ff	177	#define UART_FLAG_RXNE ((uint32_t)0x00000020)
bogdanm	0:9b334a45a8ff	178	#define UART_FLAG_IDLE ((uint32_t)0x00000010)
bogdanm	0:9b334a45a8ff	179	#define UART_FLAG_ORE ((uint32_t)0x00000008)
bogdanm	0:9b334a45a8ff	180	#define UART_FLAG_NE ((uint32_t)0x00000004)
bogdanm	0:9b334a45a8ff	181	#define UART_FLAG_FE ((uint32_t)0x00000002)
bogdanm	0:9b334a45a8ff	182	#define UART_FLAG_PE ((uint32_t)0x00000001)
bogdanm	0:9b334a45a8ff	183	/**
bogdanm	0:9b334a45a8ff	184	* @}
bogdanm	0:9b334a45a8ff	185	*/
bogdanm	0:9b334a45a8ff	186
bogdanm	0:9b334a45a8ff	187	/** @defgroup UART_Interrupt_definition UARTEx Interrupts Definition
bogdanm	0:9b334a45a8ff	188	* Elements values convention: 0000ZZZZZ0XXYYYYYb
bogdanm	0:9b334a45a8ff	189	* - YYYYY : Interrupt source position in the XX register (5bits)
bogdanm	0:9b334a45a8ff	190	* - XX : Interrupt source register (2bits)
bogdanm	0:9b334a45a8ff	191	* - 01: CR1 register
bogdanm	0:9b334a45a8ff	192	* - 10: CR2 register
bogdanm	0:9b334a45a8ff	193	* - 11: CR3 register
bogdanm	0:9b334a45a8ff	194	* - ZZZZZ : Flag position in the ISR register(5bits)
bogdanm	0:9b334a45a8ff	195	* @{
bogdanm	0:9b334a45a8ff	196	*/
bogdanm	0:9b334a45a8ff	197	#define UART_IT_PE ((uint16_t)0x0028)
bogdanm	0:9b334a45a8ff	198	#define UART_IT_TXE ((uint16_t)0x0727)
bogdanm	0:9b334a45a8ff	199	#define UART_IT_TC ((uint16_t)0x0626)
bogdanm	0:9b334a45a8ff	200	#define UART_IT_RXNE ((uint16_t)0x0525)
bogdanm	0:9b334a45a8ff	201	#define UART_IT_IDLE ((uint16_t)0x0424)
bogdanm	0:9b334a45a8ff	202	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
bogdanm	0:9b334a45a8ff	203	#define UART_IT_LBD ((uint16_t)0x0846)
bogdanm	0:9b334a45a8ff	204	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
bogdanm	0:9b334a45a8ff	205	#define UART_IT_CTS ((uint16_t)0x096A)
bogdanm	0:9b334a45a8ff	206	#define UART_IT_CM ((uint16_t)0x112E)
bogdanm	0:9b334a45a8ff	207	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
bogdanm	0:9b334a45a8ff	208	#define UART_IT_WUF ((uint16_t)0x1476)
bogdanm	0:9b334a45a8ff	209	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
bogdanm	0:9b334a45a8ff	210	/**
bogdanm	0:9b334a45a8ff	211	* @}
bogdanm	0:9b334a45a8ff	212	*/
bogdanm	0:9b334a45a8ff	213
bogdanm	0:9b334a45a8ff	214
bogdanm	0:9b334a45a8ff	215	/** @defgroup UART_IT_CLEAR_Flags UARTEx Interruption Clear Flags
bogdanm	0:9b334a45a8ff	216	* @{
bogdanm	0:9b334a45a8ff	217	*/
bogdanm	0:9b334a45a8ff	218	#define UART_CLEAR_PEF USART_ICR_PECF /!< Parity Error Clear Flag /
bogdanm	0:9b334a45a8ff	219	#define UART_CLEAR_FEF USART_ICR_FECF /!< Framing Error Clear Flag /
bogdanm	0:9b334a45a8ff	220	#define UART_CLEAR_NEF USART_ICR_NCF /!< Noise detected Clear Flag /
bogdanm	0:9b334a45a8ff	221	#define UART_CLEAR_OREF USART_ICR_ORECF /!< OverRun Error Clear Flag /
bogdanm	0:9b334a45a8ff	222	#define UART_CLEAR_IDLEF USART_ICR_IDLECF /!< IDLE line detected Clear Flag /
bogdanm	0:9b334a45a8ff	223	#define UART_CLEAR_TCF USART_ICR_TCCF /!< Transmission Complete Clear Flag /
bogdanm	0:9b334a45a8ff	224	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
bogdanm	0:9b334a45a8ff	225	#define UART_CLEAR_LBDF USART_ICR_LBDCF /!< LIN Break Detection Clear Flag (not available on F030xx devices)/
bogdanm	0:9b334a45a8ff	226	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
bogdanm	0:9b334a45a8ff	227	#define UART_CLEAR_CTSF USART_ICR_CTSCF /!< CTS Interrupt Clear Flag /
bogdanm	0:9b334a45a8ff	228	#define UART_CLEAR_RTOF USART_ICR_RTOCF /!< Receiver Time Out Clear Flag /
bogdanm	0:9b334a45a8ff	229	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
bogdanm	0:9b334a45a8ff	230	#define UART_CLEAR_EOBF USART_ICR_EOBCF /!< End Of Block Clear Flag /
bogdanm	0:9b334a45a8ff	231	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
bogdanm	0:9b334a45a8ff	232	#define UART_CLEAR_CMF USART_ICR_CMCF /!< Character Match Clear Flag /
bogdanm	0:9b334a45a8ff	233	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
bogdanm	0:9b334a45a8ff	234	#define UART_CLEAR_WUF USART_ICR_WUCF /!< Wake Up from stop mode Clear Flag /
bogdanm	0:9b334a45a8ff	235	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
bogdanm	0:9b334a45a8ff	236	/**
bogdanm	0:9b334a45a8ff	237	* @}
bogdanm	0:9b334a45a8ff	238	*/
bogdanm	0:9b334a45a8ff	239
bogdanm	0:9b334a45a8ff	240	/** @defgroup UART_Request_Parameters UARTEx Request Parameters
bogdanm	0:9b334a45a8ff	241	* @{
bogdanm	0:9b334a45a8ff	242	*/
bogdanm	0:9b334a45a8ff	243	#define UART_AUTOBAUD_REQUEST ((uint32_t)USART_RQR_ABRRQ) /!< Auto-Baud Rate Request /
bogdanm	0:9b334a45a8ff	244	#define UART_SENDBREAK_REQUEST ((uint32_t)USART_RQR_SBKRQ) /!< Send Break Request /
bogdanm	0:9b334a45a8ff	245	#define UART_MUTE_MODE_REQUEST ((uint32_t)USART_RQR_MMRQ) /!< Mute Mode Request /
bogdanm	0:9b334a45a8ff	246	#define UART_RXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_RXFRQ) /!< Receive Data flush Request /
bogdanm	0:9b334a45a8ff	247	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
bogdanm	0:9b334a45a8ff	248	#define UART_TXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_TXFRQ) /!< Transmit data flush Request /
bogdanm	0:9b334a45a8ff	249	#else
bogdanm	0:9b334a45a8ff	250	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
bogdanm	0:9b334a45a8ff	251	/**
bogdanm	0:9b334a45a8ff	252	* @}
bogdanm	0:9b334a45a8ff	253	*/
bogdanm	0:9b334a45a8ff	254
bogdanm	0:9b334a45a8ff	255	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
bogdanm	0:9b334a45a8ff	256	/** @defgroup UART_Stop_Mode_Enable UARTEx Advanced Feature Stop Mode Enable
bogdanm	0:9b334a45a8ff	257	* @{
bogdanm	0:9b334a45a8ff	258	*/
bogdanm	0:9b334a45a8ff	259	#define UART_ADVFEATURE_STOPMODE_DISABLE ((uint32_t)0x00000000) /!< UART stop mode disable /
bogdanm	0:9b334a45a8ff	260	#define UART_ADVFEATURE_STOPMODE_ENABLE ((uint32_t)USART_CR1_UESM) /!< UART stop mode enable /
bogdanm	0:9b334a45a8ff	261	/**
bogdanm	0:9b334a45a8ff	262	* @}
bogdanm	0:9b334a45a8ff	263	*/
bogdanm	0:9b334a45a8ff	264
bogdanm	0:9b334a45a8ff	265	/** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection
bogdanm	0:9b334a45a8ff	266	* @{
bogdanm	0:9b334a45a8ff	267	*/
bogdanm	0:9b334a45a8ff	268	#define UART_WAKEUP_ON_ADDRESS ((uint32_t)0x00000000) /!< UART wake-up on address /
bogdanm	0:9b334a45a8ff	269	#define UART_WAKEUP_ON_STARTBIT ((uint32_t)USART_CR3_WUS_1) /!< UART wake-up on start bit /
bogdanm	0:9b334a45a8ff	270	#define UART_WAKEUP_ON_READDATA_NONEMPTY ((uint32_t)USART_CR3_WUS) /!< UART wake-up on receive data register not empty /
bogdanm	0:9b334a45a8ff	271	/**
bogdanm	0:9b334a45a8ff	272	* @}
bogdanm	0:9b334a45a8ff	273	*/
bogdanm	0:9b334a45a8ff	274	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
bogdanm	0:9b334a45a8ff	275
bogdanm	0:9b334a45a8ff	276	/**
bogdanm	0:9b334a45a8ff	277	* @}
bogdanm	0:9b334a45a8ff	278	*/
bogdanm	0:9b334a45a8ff	279
bogdanm	0:9b334a45a8ff	280	/* Exported macros ------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	281	/** @defgroup UARTEx_Exported_Macros UARTEx Exported Macros
bogdanm	0:9b334a45a8ff	282	* @{
bogdanm	0:9b334a45a8ff	283	*/
bogdanm	0:9b334a45a8ff	284
bogdanm	0:9b334a45a8ff	285	/** @brief Flush the UART Data registers.
bogdanm	0:9b334a45a8ff	286	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	287	* @retval None
bogdanm	0:9b334a45a8ff	288	*/
bogdanm	0:9b334a45a8ff	289	#if !defined(STM32F030x6) && !defined(STM32F030x8)
bogdanm	0:9b334a45a8ff	290	#define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \
bogdanm	0:9b334a45a8ff	291	do{ \
bogdanm	0:9b334a45a8ff	292	SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \
bogdanm	0:9b334a45a8ff	293	SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \
bogdanm	0:9b334a45a8ff	294	} while(0)
bogdanm	0:9b334a45a8ff	295	#else
bogdanm	0:9b334a45a8ff	296	#define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \
bogdanm	0:9b334a45a8ff	297	do{ \
bogdanm	0:9b334a45a8ff	298	SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \
bogdanm	0:9b334a45a8ff	299	} while(0)
bogdanm	0:9b334a45a8ff	300	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) */
bogdanm	0:9b334a45a8ff	301
bogdanm	0:9b334a45a8ff	302	/**
bogdanm	0:9b334a45a8ff	303	* @}
bogdanm	0:9b334a45a8ff	304	*/
bogdanm	0:9b334a45a8ff	305
bogdanm	0:9b334a45a8ff	306	/* Private macros ------------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	307	/** @defgroup UARTEx_Private_Macros UARTEx Private Macros
bogdanm	0:9b334a45a8ff	308	* @{
bogdanm	0:9b334a45a8ff	309	*/
bogdanm	0:9b334a45a8ff	310
bogdanm	0:9b334a45a8ff	311	/** @brief Report the UART clock source.
bogdanm	0:9b334a45a8ff	312	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	313	* @param __CLOCKSOURCE__: output variable.
bogdanm	0:9b334a45a8ff	314	* @retval UART clocking source, written in __CLOCKSOURCE__.
bogdanm	0:9b334a45a8ff	315	*/
bogdanm	0:9b334a45a8ff	316
bogdanm	0:9b334a45a8ff	317
bogdanm	0:9b334a45a8ff	318	#if defined(STM32F030x6) \|\| defined(STM32F031x6) \|\| defined(STM32F038xx)
bogdanm	0:9b334a45a8ff	319	#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
bogdanm	0:9b334a45a8ff	320	do { \
bogdanm	0:9b334a45a8ff	321	switch(__HAL_RCC_GET_USART1_SOURCE()) \
bogdanm	0:9b334a45a8ff	322	{ \
bogdanm	0:9b334a45a8ff	323	case RCC_USART1CLKSOURCE_PCLK1: \
bogdanm	0:9b334a45a8ff	324	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	0:9b334a45a8ff	325	break; \
bogdanm	0:9b334a45a8ff	326	case RCC_USART1CLKSOURCE_HSI: \
bogdanm	0:9b334a45a8ff	327	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
bogdanm	0:9b334a45a8ff	328	break; \
bogdanm	0:9b334a45a8ff	329	case RCC_USART1CLKSOURCE_SYSCLK: \
bogdanm	0:9b334a45a8ff	330	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
bogdanm	0:9b334a45a8ff	331	break; \
bogdanm	0:9b334a45a8ff	332	case RCC_USART1CLKSOURCE_LSE: \
bogdanm	0:9b334a45a8ff	333	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
bogdanm	0:9b334a45a8ff	334	break; \
bogdanm	0:9b334a45a8ff	335	default: \
bogdanm	0:9b334a45a8ff	336	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
bogdanm	0:9b334a45a8ff	337	break; \
bogdanm	0:9b334a45a8ff	338	} \
bogdanm	0:9b334a45a8ff	339	} while(0)
bogdanm	0:9b334a45a8ff	340	#elif defined (STM32F030x8) \|\| defined (STM32F070x6) \|\| \
bogdanm	0:9b334a45a8ff	341	defined (STM32F042x6) \|\| defined (STM32F048xx) \|\| \
bogdanm	0:9b334a45a8ff	342	defined (STM32F051x8) \|\| defined (STM32F058xx)
bogdanm	0:9b334a45a8ff	343	#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
bogdanm	0:9b334a45a8ff	344	do { \
bogdanm	0:9b334a45a8ff	345	if((__HANDLE__)->Instance == USART1) \
bogdanm	0:9b334a45a8ff	346	{ \
bogdanm	0:9b334a45a8ff	347	switch(__HAL_RCC_GET_USART1_SOURCE()) \
bogdanm	0:9b334a45a8ff	348	{ \
bogdanm	0:9b334a45a8ff	349	case RCC_USART1CLKSOURCE_PCLK1: \
bogdanm	0:9b334a45a8ff	350	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	0:9b334a45a8ff	351	break; \
bogdanm	0:9b334a45a8ff	352	case RCC_USART1CLKSOURCE_HSI: \
bogdanm	0:9b334a45a8ff	353	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
bogdanm	0:9b334a45a8ff	354	break; \
bogdanm	0:9b334a45a8ff	355	case RCC_USART1CLKSOURCE_SYSCLK: \
bogdanm	0:9b334a45a8ff	356	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
bogdanm	0:9b334a45a8ff	357	break; \
bogdanm	0:9b334a45a8ff	358	case RCC_USART1CLKSOURCE_LSE: \
bogdanm	0:9b334a45a8ff	359	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
bogdanm	0:9b334a45a8ff	360	break; \
bogdanm	0:9b334a45a8ff	361	default: \
bogdanm	0:9b334a45a8ff	362	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
bogdanm	0:9b334a45a8ff	363	break; \
bogdanm	0:9b334a45a8ff	364	} \
bogdanm	0:9b334a45a8ff	365	} \
bogdanm	0:9b334a45a8ff	366	else if((__HANDLE__)->Instance == USART2) \
bogdanm	0:9b334a45a8ff	367	{ \
bogdanm	0:9b334a45a8ff	368	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	0:9b334a45a8ff	369	} \
bogdanm	0:9b334a45a8ff	370	else \
bogdanm	0:9b334a45a8ff	371	{ \
bogdanm	0:9b334a45a8ff	372	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
bogdanm	0:9b334a45a8ff	373	} \
bogdanm	0:9b334a45a8ff	374	} while(0)
bogdanm	0:9b334a45a8ff	375	#elif defined(STM32F070xB)
bogdanm	0:9b334a45a8ff	376	#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
bogdanm	0:9b334a45a8ff	377	do { \
bogdanm	0:9b334a45a8ff	378	if((__HANDLE__)->Instance == USART1) \
bogdanm	0:9b334a45a8ff	379	{ \
bogdanm	0:9b334a45a8ff	380	switch(__HAL_RCC_GET_USART1_SOURCE()) \
bogdanm	0:9b334a45a8ff	381	{ \
bogdanm	0:9b334a45a8ff	382	case RCC_USART1CLKSOURCE_PCLK1: \
bogdanm	0:9b334a45a8ff	383	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	0:9b334a45a8ff	384	break; \
bogdanm	0:9b334a45a8ff	385	case RCC_USART1CLKSOURCE_HSI: \
bogdanm	0:9b334a45a8ff	386	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
bogdanm	0:9b334a45a8ff	387	break; \
bogdanm	0:9b334a45a8ff	388	case RCC_USART1CLKSOURCE_SYSCLK: \
bogdanm	0:9b334a45a8ff	389	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
bogdanm	0:9b334a45a8ff	390	break; \
bogdanm	0:9b334a45a8ff	391	case RCC_USART1CLKSOURCE_LSE: \
bogdanm	0:9b334a45a8ff	392	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
bogdanm	0:9b334a45a8ff	393	break; \
bogdanm	0:9b334a45a8ff	394	default: \
bogdanm	0:9b334a45a8ff	395	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
bogdanm	0:9b334a45a8ff	396	break; \
bogdanm	0:9b334a45a8ff	397	} \
bogdanm	0:9b334a45a8ff	398	} \
bogdanm	0:9b334a45a8ff	399	else if((__HANDLE__)->Instance == USART2) \
bogdanm	0:9b334a45a8ff	400	{ \
bogdanm	0:9b334a45a8ff	401	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	0:9b334a45a8ff	402	} \
bogdanm	0:9b334a45a8ff	403	else if((__HANDLE__)->Instance == USART3) \
bogdanm	0:9b334a45a8ff	404	{ \
bogdanm	0:9b334a45a8ff	405	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	0:9b334a45a8ff	406	} \
bogdanm	0:9b334a45a8ff	407	else if((__HANDLE__)->Instance == USART4) \
bogdanm	0:9b334a45a8ff	408	{ \
bogdanm	0:9b334a45a8ff	409	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	0:9b334a45a8ff	410	} \
bogdanm	0:9b334a45a8ff	411	else \
bogdanm	0:9b334a45a8ff	412	{ \
bogdanm	0:9b334a45a8ff	413	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
bogdanm	0:9b334a45a8ff	414	} \
bogdanm	0:9b334a45a8ff	415	} while(0)
bogdanm	0:9b334a45a8ff	416	#elif defined(STM32F071xB) \|\| defined(STM32F072xB) \|\| defined(STM32F078xx)
bogdanm	0:9b334a45a8ff	417	#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
bogdanm	0:9b334a45a8ff	418	do { \
bogdanm	0:9b334a45a8ff	419	if((__HANDLE__)->Instance == USART1) \
bogdanm	0:9b334a45a8ff	420	{ \
bogdanm	0:9b334a45a8ff	421	switch(__HAL_RCC_GET_USART1_SOURCE()) \
bogdanm	0:9b334a45a8ff	422	{ \
bogdanm	0:9b334a45a8ff	423	case RCC_USART1CLKSOURCE_PCLK1: \
bogdanm	0:9b334a45a8ff	424	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	0:9b334a45a8ff	425	break; \
bogdanm	0:9b334a45a8ff	426	case RCC_USART1CLKSOURCE_HSI: \
bogdanm	0:9b334a45a8ff	427	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
bogdanm	0:9b334a45a8ff	428	break; \
bogdanm	0:9b334a45a8ff	429	case RCC_USART1CLKSOURCE_SYSCLK: \
bogdanm	0:9b334a45a8ff	430	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
bogdanm	0:9b334a45a8ff	431	break; \
bogdanm	0:9b334a45a8ff	432	case RCC_USART1CLKSOURCE_LSE: \
bogdanm	0:9b334a45a8ff	433	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
bogdanm	0:9b334a45a8ff	434	break; \
bogdanm	0:9b334a45a8ff	435	default: \
bogdanm	0:9b334a45a8ff	436	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
bogdanm	0:9b334a45a8ff	437	break; \
bogdanm	0:9b334a45a8ff	438	} \
bogdanm	0:9b334a45a8ff	439	} \
bogdanm	0:9b334a45a8ff	440	else if((__HANDLE__)->Instance == USART2) \
bogdanm	0:9b334a45a8ff	441	{ \
bogdanm	0:9b334a45a8ff	442	switch(__HAL_RCC_GET_USART2_SOURCE()) \
bogdanm	0:9b334a45a8ff	443	{ \
bogdanm	0:9b334a45a8ff	444	case RCC_USART2CLKSOURCE_PCLK1: \
bogdanm	0:9b334a45a8ff	445	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	0:9b334a45a8ff	446	break; \
bogdanm	0:9b334a45a8ff	447	case RCC_USART2CLKSOURCE_HSI: \
bogdanm	0:9b334a45a8ff	448	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
bogdanm	0:9b334a45a8ff	449	break; \
bogdanm	0:9b334a45a8ff	450	case RCC_USART2CLKSOURCE_SYSCLK: \
bogdanm	0:9b334a45a8ff	451	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
bogdanm	0:9b334a45a8ff	452	break; \
bogdanm	0:9b334a45a8ff	453	case RCC_USART2CLKSOURCE_LSE: \
bogdanm	0:9b334a45a8ff	454	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
bogdanm	0:9b334a45a8ff	455	break; \
bogdanm	0:9b334a45a8ff	456	default: \
bogdanm	0:9b334a45a8ff	457	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
bogdanm	0:9b334a45a8ff	458	break; \
bogdanm	0:9b334a45a8ff	459	} \
bogdanm	0:9b334a45a8ff	460	} \
bogdanm	0:9b334a45a8ff	461	else if((__HANDLE__)->Instance == USART3) \
bogdanm	0:9b334a45a8ff	462	{ \
bogdanm	0:9b334a45a8ff	463	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	0:9b334a45a8ff	464	} \
bogdanm	0:9b334a45a8ff	465	else if((__HANDLE__)->Instance == USART4) \
bogdanm	0:9b334a45a8ff	466	{ \
bogdanm	0:9b334a45a8ff	467	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	0:9b334a45a8ff	468	} \
bogdanm	0:9b334a45a8ff	469	else \
bogdanm	0:9b334a45a8ff	470	{ \
bogdanm	0:9b334a45a8ff	471	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
bogdanm	0:9b334a45a8ff	472	} \
bogdanm	0:9b334a45a8ff	473	} while(0)
bogdanm	0:9b334a45a8ff	474	#elif defined(STM32F091xC) \|\| defined (STM32F098xx)
bogdanm	0:9b334a45a8ff	475	#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
bogdanm	0:9b334a45a8ff	476	do { \
bogdanm	0:9b334a45a8ff	477	if((__HANDLE__)->Instance == USART1) \
bogdanm	0:9b334a45a8ff	478	{ \
bogdanm	0:9b334a45a8ff	479	switch(__HAL_RCC_GET_USART1_SOURCE()) \
bogdanm	0:9b334a45a8ff	480	{ \
bogdanm	0:9b334a45a8ff	481	case RCC_USART1CLKSOURCE_PCLK1: \
bogdanm	0:9b334a45a8ff	482	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	0:9b334a45a8ff	483	break; \
bogdanm	0:9b334a45a8ff	484	case RCC_USART1CLKSOURCE_HSI: \
bogdanm	0:9b334a45a8ff	485	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
bogdanm	0:9b334a45a8ff	486	break; \
bogdanm	0:9b334a45a8ff	487	case RCC_USART1CLKSOURCE_SYSCLK: \
bogdanm	0:9b334a45a8ff	488	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
bogdanm	0:9b334a45a8ff	489	break; \
bogdanm	0:9b334a45a8ff	490	case RCC_USART1CLKSOURCE_LSE: \
bogdanm	0:9b334a45a8ff	491	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
bogdanm	0:9b334a45a8ff	492	break; \
bogdanm	0:9b334a45a8ff	493	default: \
bogdanm	0:9b334a45a8ff	494	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
bogdanm	0:9b334a45a8ff	495	break; \
bogdanm	0:9b334a45a8ff	496	} \
bogdanm	0:9b334a45a8ff	497	} \
bogdanm	0:9b334a45a8ff	498	else if((__HANDLE__)->Instance == USART2) \
bogdanm	0:9b334a45a8ff	499	{ \
bogdanm	0:9b334a45a8ff	500	switch(__HAL_RCC_GET_USART2_SOURCE()) \
bogdanm	0:9b334a45a8ff	501	{ \
bogdanm	0:9b334a45a8ff	502	case RCC_USART2CLKSOURCE_PCLK1: \
bogdanm	0:9b334a45a8ff	503	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	0:9b334a45a8ff	504	break; \
bogdanm	0:9b334a45a8ff	505	case RCC_USART2CLKSOURCE_HSI: \
bogdanm	0:9b334a45a8ff	506	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
bogdanm	0:9b334a45a8ff	507	break; \
bogdanm	0:9b334a45a8ff	508	case RCC_USART2CLKSOURCE_SYSCLK: \
bogdanm	0:9b334a45a8ff	509	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
bogdanm	0:9b334a45a8ff	510	break; \
bogdanm	0:9b334a45a8ff	511	case RCC_USART2CLKSOURCE_LSE: \
bogdanm	0:9b334a45a8ff	512	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
bogdanm	0:9b334a45a8ff	513	break; \
bogdanm	0:9b334a45a8ff	514	default: \
bogdanm	0:9b334a45a8ff	515	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
bogdanm	0:9b334a45a8ff	516	break; \
bogdanm	0:9b334a45a8ff	517	} \
bogdanm	0:9b334a45a8ff	518	} \
bogdanm	0:9b334a45a8ff	519	else if((__HANDLE__)->Instance == USART3) \
bogdanm	0:9b334a45a8ff	520	{ \
bogdanm	0:9b334a45a8ff	521	switch(__HAL_RCC_GET_USART3_SOURCE()) \
bogdanm	0:9b334a45a8ff	522	{ \
bogdanm	0:9b334a45a8ff	523	case RCC_USART3CLKSOURCE_PCLK1: \
bogdanm	0:9b334a45a8ff	524	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	0:9b334a45a8ff	525	break; \
bogdanm	0:9b334a45a8ff	526	case RCC_USART3CLKSOURCE_HSI: \
bogdanm	0:9b334a45a8ff	527	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
bogdanm	0:9b334a45a8ff	528	break; \
bogdanm	0:9b334a45a8ff	529	case RCC_USART3CLKSOURCE_SYSCLK: \
bogdanm	0:9b334a45a8ff	530	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
bogdanm	0:9b334a45a8ff	531	break; \
bogdanm	0:9b334a45a8ff	532	case RCC_USART3CLKSOURCE_LSE: \
bogdanm	0:9b334a45a8ff	533	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
bogdanm	0:9b334a45a8ff	534	break; \
bogdanm	0:9b334a45a8ff	535	default: \
bogdanm	0:9b334a45a8ff	536	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
bogdanm	0:9b334a45a8ff	537	break; \
bogdanm	0:9b334a45a8ff	538	} \
bogdanm	0:9b334a45a8ff	539	} \
bogdanm	0:9b334a45a8ff	540	else if((__HANDLE__)->Instance == USART4) \
bogdanm	0:9b334a45a8ff	541	{ \
bogdanm	0:9b334a45a8ff	542	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	0:9b334a45a8ff	543	} \
bogdanm	0:9b334a45a8ff	544	else if((__HANDLE__)->Instance == USART5) \
bogdanm	0:9b334a45a8ff	545	{ \
bogdanm	0:9b334a45a8ff	546	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	0:9b334a45a8ff	547	} \
bogdanm	0:9b334a45a8ff	548	else if((__HANDLE__)->Instance == USART6) \
bogdanm	0:9b334a45a8ff	549	{ \
bogdanm	0:9b334a45a8ff	550	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	0:9b334a45a8ff	551	} \
bogdanm	0:9b334a45a8ff	552	else if((__HANDLE__)->Instance == USART7) \
bogdanm	0:9b334a45a8ff	553	{ \
bogdanm	0:9b334a45a8ff	554	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	0:9b334a45a8ff	555	} \
bogdanm	0:9b334a45a8ff	556	else if((__HANDLE__)->Instance == USART8) \
bogdanm	0:9b334a45a8ff	557	{ \
bogdanm	0:9b334a45a8ff	558	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	0:9b334a45a8ff	559	} \
bogdanm	0:9b334a45a8ff	560	else \
bogdanm	0:9b334a45a8ff	561	{ \
bogdanm	0:9b334a45a8ff	562	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
bogdanm	0:9b334a45a8ff	563	} \
bogdanm	0:9b334a45a8ff	564	} while(0)
bogdanm	0:9b334a45a8ff	565	#elif defined(STM32F030xC)
bogdanm	0:9b334a45a8ff	566	#define UART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
bogdanm	0:9b334a45a8ff	567	do { \
bogdanm	0:9b334a45a8ff	568	if((__HANDLE__)->Instance == USART1) \
bogdanm	0:9b334a45a8ff	569	{ \
bogdanm	0:9b334a45a8ff	570	switch(__HAL_RCC_GET_USART1_SOURCE()) \
bogdanm	0:9b334a45a8ff	571	{ \
bogdanm	0:9b334a45a8ff	572	case RCC_USART1CLKSOURCE_PCLK1: \
bogdanm	0:9b334a45a8ff	573	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	0:9b334a45a8ff	574	break; \
bogdanm	0:9b334a45a8ff	575	case RCC_USART1CLKSOURCE_HSI: \
bogdanm	0:9b334a45a8ff	576	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_HSI; \
bogdanm	0:9b334a45a8ff	577	break; \
bogdanm	0:9b334a45a8ff	578	case RCC_USART1CLKSOURCE_SYSCLK: \
bogdanm	0:9b334a45a8ff	579	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_SYSCLK; \
bogdanm	0:9b334a45a8ff	580	break; \
bogdanm	0:9b334a45a8ff	581	case RCC_USART1CLKSOURCE_LSE: \
bogdanm	0:9b334a45a8ff	582	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_LSE; \
bogdanm	0:9b334a45a8ff	583	break; \
bogdanm	0:9b334a45a8ff	584	default: \
bogdanm	0:9b334a45a8ff	585	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
bogdanm	0:9b334a45a8ff	586	break; \
bogdanm	0:9b334a45a8ff	587	} \
bogdanm	0:9b334a45a8ff	588	} \
bogdanm	0:9b334a45a8ff	589	else if((__HANDLE__)->Instance == USART2) \
bogdanm	0:9b334a45a8ff	590	{ \
bogdanm	0:9b334a45a8ff	591	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	0:9b334a45a8ff	592	} \
bogdanm	0:9b334a45a8ff	593	else if((__HANDLE__)->Instance == USART3) \
bogdanm	0:9b334a45a8ff	594	{ \
bogdanm	0:9b334a45a8ff	595	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	0:9b334a45a8ff	596	} \
bogdanm	0:9b334a45a8ff	597	else if((__HANDLE__)->Instance == USART4) \
bogdanm	0:9b334a45a8ff	598	{ \
bogdanm	0:9b334a45a8ff	599	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	0:9b334a45a8ff	600	} \
bogdanm	0:9b334a45a8ff	601	else if((__HANDLE__)->Instance == USART5) \
bogdanm	0:9b334a45a8ff	602	{ \
bogdanm	0:9b334a45a8ff	603	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	0:9b334a45a8ff	604	} \
bogdanm	0:9b334a45a8ff	605	else if((__HANDLE__)->Instance == USART6) \
bogdanm	0:9b334a45a8ff	606	{ \
bogdanm	0:9b334a45a8ff	607	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_PCLK1; \
bogdanm	0:9b334a45a8ff	608	} \
bogdanm	0:9b334a45a8ff	609	else \
bogdanm	0:9b334a45a8ff	610	{ \
bogdanm	0:9b334a45a8ff	611	(__CLOCKSOURCE__) = UART_CLOCKSOURCE_UNDEFINED; \
bogdanm	0:9b334a45a8ff	612	} \
bogdanm	0:9b334a45a8ff	613	} while(0)
bogdanm	0:9b334a45a8ff	614
bogdanm	0:9b334a45a8ff	615	#endif /* defined(STM32F030x6) \|\| defined(STM32F031x6) \|\| defined(STM32F038xx) */
bogdanm	0:9b334a45a8ff	616
bogdanm	0:9b334a45a8ff	617
bogdanm	0:9b334a45a8ff	618	/** @brief Compute the UART mask to apply to retrieve the received data
bogdanm	0:9b334a45a8ff	619	* according to the word length and to the parity bits activation.
bogdanm	0:9b334a45a8ff	620	* @note If PCE = 1, the parity bit is not included in the data extracted
bogdanm	0:9b334a45a8ff	621	* by the reception API().
bogdanm	0:9b334a45a8ff	622	* This masking operation is not carried out in the case of
bogdanm	0:9b334a45a8ff	623	* DMA transfers.
bogdanm	0:9b334a45a8ff	624	* @param __HANDLE__: specifies the UART Handle.
bogdanm	0:9b334a45a8ff	625	* @retval None, the mask to apply to UART RDR register is stored in (__HANDLE__)->Mask field.
bogdanm	0:9b334a45a8ff	626	*/
bogdanm	0:9b334a45a8ff	627	#if defined (STM32F042x6) \|\| defined (STM32F048xx) \|\| defined (STM32F070x6) \|\| \
bogdanm	0:9b334a45a8ff	628	defined (STM32F071xB) \|\| defined (STM32F072xB) \|\| defined (STM32F078xx) \|\| defined (STM32F070xB) \|\| \
bogdanm	0:9b334a45a8ff	629	defined (STM32F091xC) \|\| defined (STM32F098xx) \|\| defined (STM32F030xC)
bogdanm	0:9b334a45a8ff	630	#define UART_MASK_COMPUTATION(__HANDLE__) \
bogdanm	0:9b334a45a8ff	631	do { \
bogdanm	0:9b334a45a8ff	632	if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \
bogdanm	0:9b334a45a8ff	633	{ \
bogdanm	0:9b334a45a8ff	634	if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
bogdanm	0:9b334a45a8ff	635	{ \
bogdanm	0:9b334a45a8ff	636	(__HANDLE__)->Mask = 0x01FF ; \
bogdanm	0:9b334a45a8ff	637	} \
bogdanm	0:9b334a45a8ff	638	else \
bogdanm	0:9b334a45a8ff	639	{ \
bogdanm	0:9b334a45a8ff	640	(__HANDLE__)->Mask = 0x00FF ; \
bogdanm	0:9b334a45a8ff	641	} \
bogdanm	0:9b334a45a8ff	642	} \
bogdanm	0:9b334a45a8ff	643	else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \
bogdanm	0:9b334a45a8ff	644	{ \
bogdanm	0:9b334a45a8ff	645	if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
bogdanm	0:9b334a45a8ff	646	{ \
bogdanm	0:9b334a45a8ff	647	(__HANDLE__)->Mask = 0x00FF ; \
bogdanm	0:9b334a45a8ff	648	} \
bogdanm	0:9b334a45a8ff	649	else \
bogdanm	0:9b334a45a8ff	650	{ \
bogdanm	0:9b334a45a8ff	651	(__HANDLE__)->Mask = 0x007F ; \
bogdanm	0:9b334a45a8ff	652	} \
bogdanm	0:9b334a45a8ff	653	} \
bogdanm	0:9b334a45a8ff	654	else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_7B) \
bogdanm	0:9b334a45a8ff	655	{ \
bogdanm	0:9b334a45a8ff	656	if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
bogdanm	0:9b334a45a8ff	657	{ \
bogdanm	0:9b334a45a8ff	658	(__HANDLE__)->Mask = 0x007F ; \
bogdanm	0:9b334a45a8ff	659	} \
bogdanm	0:9b334a45a8ff	660	else \
bogdanm	0:9b334a45a8ff	661	{ \
bogdanm	0:9b334a45a8ff	662	(__HANDLE__)->Mask = 0x003F ; \
bogdanm	0:9b334a45a8ff	663	} \
bogdanm	0:9b334a45a8ff	664	} \
bogdanm	0:9b334a45a8ff	665	} while(0)
bogdanm	0:9b334a45a8ff	666	#else
bogdanm	0:9b334a45a8ff	667	#define UART_MASK_COMPUTATION(__HANDLE__) \
bogdanm	0:9b334a45a8ff	668	do { \
bogdanm	0:9b334a45a8ff	669	if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_9B) \
bogdanm	0:9b334a45a8ff	670	{ \
bogdanm	0:9b334a45a8ff	671	if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
bogdanm	0:9b334a45a8ff	672	{ \
bogdanm	0:9b334a45a8ff	673	(__HANDLE__)->Mask = 0x01FF ; \
bogdanm	0:9b334a45a8ff	674	} \
bogdanm	0:9b334a45a8ff	675	else \
bogdanm	0:9b334a45a8ff	676	{ \
bogdanm	0:9b334a45a8ff	677	(__HANDLE__)->Mask = 0x00FF ; \
bogdanm	0:9b334a45a8ff	678	} \
bogdanm	0:9b334a45a8ff	679	} \
bogdanm	0:9b334a45a8ff	680	else if ((__HANDLE__)->Init.WordLength == UART_WORDLENGTH_8B) \
bogdanm	0:9b334a45a8ff	681	{ \
bogdanm	0:9b334a45a8ff	682	if ((__HANDLE__)->Init.Parity == UART_PARITY_NONE) \
bogdanm	0:9b334a45a8ff	683	{ \
bogdanm	0:9b334a45a8ff	684	(__HANDLE__)->Mask = 0x00FF ; \
bogdanm	0:9b334a45a8ff	685	} \
bogdanm	0:9b334a45a8ff	686	else \
bogdanm	0:9b334a45a8ff	687	{ \
bogdanm	0:9b334a45a8ff	688	(__HANDLE__)->Mask = 0x007F ; \
bogdanm	0:9b334a45a8ff	689	} \
bogdanm	0:9b334a45a8ff	690	} \
bogdanm	0:9b334a45a8ff	691	} while(0)
bogdanm	0:9b334a45a8ff	692	#endif /* defined (STM32F042x6) \|\| defined (STM32F048xx) \|\| defined (STM32F070x6) \|\| \
bogdanm	0:9b334a45a8ff	693	defined (STM32F071xB) \|\| defined (STM32F072xB) \|\| defined (STM32F078xx) \|\| defined (STM32F070xB) \|\| \
bogdanm	0:9b334a45a8ff	694	defined (STM32F091xC) \|\| defined (STM32F098xx) \|\| defined (STM32F030xC) */
bogdanm	0:9b334a45a8ff	695
bogdanm	0:9b334a45a8ff	696	/**
bogdanm	0:9b334a45a8ff	697	* @brief Ensure that UART frame length is valid.
bogdanm	0:9b334a45a8ff	698	* @param __LENGTH__: UART frame length.
bogdanm	0:9b334a45a8ff	699	* @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
bogdanm	0:9b334a45a8ff	700	*/
bogdanm	0:9b334a45a8ff	701	#if defined (STM32F042x6) \|\| defined (STM32F048xx) \|\| defined (STM32F070x6) \|\| \
bogdanm	0:9b334a45a8ff	702	defined (STM32F071xB) \|\| defined (STM32F072xB) \|\| defined (STM32F078xx) \|\| defined (STM32F070xB) \|\| \
bogdanm	0:9b334a45a8ff	703	defined (STM32F091xC) \|\| defined (STM32F098xx) \|\| defined (STM32F030xC)
bogdanm	0:9b334a45a8ff	704	#define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_7B) \|\| \
bogdanm	0:9b334a45a8ff	705	((__LENGTH__) == UART_WORDLENGTH_8B) \|\| \
bogdanm	0:9b334a45a8ff	706	((__LENGTH__) == UART_WORDLENGTH_9B))
bogdanm	0:9b334a45a8ff	707	#else
bogdanm	0:9b334a45a8ff	708	#define IS_UART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == UART_WORDLENGTH_8B) \|\| \
bogdanm	0:9b334a45a8ff	709	((__LENGTH__) == UART_WORDLENGTH_9B))
bogdanm	0:9b334a45a8ff	710	#endif /* defined (STM32F042x6) \|\| defined (STM32F048xx) \|\| defined (STM32F070x6) \|\| \
bogdanm	0:9b334a45a8ff	711	defined (STM32F071xB) \|\| defined (STM32F072xB) \|\| defined (STM32F078xx) \|\| defined (STM32F070xB) \|\| \
bogdanm	0:9b334a45a8ff	712	defined (STM32F091xC) \|\| defined (STM32F098xx) \|\| defined (STM32F030xC) */
bogdanm	0:9b334a45a8ff	713
bogdanm	0:9b334a45a8ff	714	/**
bogdanm	0:9b334a45a8ff	715	* @brief Ensure that UART auto Baud rate detection mode is valid.
bogdanm	0:9b334a45a8ff	716	* @param __MODE__: UART auto Baud rate detection mode.
bogdanm	0:9b334a45a8ff	717	* @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
bogdanm	0:9b334a45a8ff	718	*/
bogdanm	0:9b334a45a8ff	719	#if defined (STM32F042x6) \|\| defined (STM32F048xx) \|\| defined (STM32F070x6) \|\| \
bogdanm	0:9b334a45a8ff	720	defined (STM32F071xB) \|\| defined (STM32F072xB) \|\| defined (STM32F078xx) \|\| defined (STM32F070xB) \|\| \
bogdanm	0:9b334a45a8ff	721	defined (STM32F091xC) \|\| defined (STM32F098xx) \|\| defined (STM32F030xC)
bogdanm	0:9b334a45a8ff	722	#define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) \|\| \
bogdanm	0:9b334a45a8ff	723	((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) \|\| \
bogdanm	0:9b334a45a8ff	724	((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) \|\| \
bogdanm	0:9b334a45a8ff	725	((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME))
bogdanm	0:9b334a45a8ff	726	#else
bogdanm	0:9b334a45a8ff	727	#define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) \|\| \
bogdanm	0:9b334a45a8ff	728	((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE))
bogdanm	0:9b334a45a8ff	729	#endif /* defined (STM32F042x6) \|\| defined (STM32F048xx) \|\| defined (STM32F070x6) \|\| \
bogdanm	0:9b334a45a8ff	730	defined (STM32F071xB) \|\| defined (STM32F072xB) \|\| defined (STM32F078xx) \|\| defined (STM32F070xB) \|\| \
bogdanm	0:9b334a45a8ff	731	defined (STM32F091xC) \|\| defined (STM32F098xx) \|\| defined (STM32F030xC) */
bogdanm	0:9b334a45a8ff	732
bogdanm	0:9b334a45a8ff	733
bogdanm	0:9b334a45a8ff	734	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
bogdanm	0:9b334a45a8ff	735	/**
bogdanm	0:9b334a45a8ff	736	* @brief Ensure that UART LIN state is valid.
bogdanm	0:9b334a45a8ff	737	* @param __LIN__: UART LIN state.
bogdanm	0:9b334a45a8ff	738	* @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid)
bogdanm	0:9b334a45a8ff	739	*/
bogdanm	0:9b334a45a8ff	740	#define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) \|\| \
bogdanm	0:9b334a45a8ff	741	((__LIN__) == UART_LIN_ENABLE))
bogdanm	0:9b334a45a8ff	742
bogdanm	0:9b334a45a8ff	743	/**
bogdanm	0:9b334a45a8ff	744	* @brief Ensure that UART LIN break detection length is valid.
bogdanm	0:9b334a45a8ff	745	* @param __LENGTH__: UART LIN break detection length.
bogdanm	0:9b334a45a8ff	746	* @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
bogdanm	0:9b334a45a8ff	747	*/
bogdanm	0:9b334a45a8ff	748	#define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) \|\| \
bogdanm	0:9b334a45a8ff	749	((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B))
bogdanm	0:9b334a45a8ff	750	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
bogdanm	0:9b334a45a8ff	751
bogdanm	0:9b334a45a8ff	752	/**
bogdanm	0:9b334a45a8ff	753	* @brief Ensure that UART request parameter is valid.
bogdanm	0:9b334a45a8ff	754	* @param __PARAM__: UART request parameter.
bogdanm	0:9b334a45a8ff	755	* @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid)
bogdanm	0:9b334a45a8ff	756	*/
bogdanm	0:9b334a45a8ff	757	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
bogdanm	0:9b334a45a8ff	758	#define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) \|\| \
bogdanm	0:9b334a45a8ff	759	((__PARAM__) == UART_SENDBREAK_REQUEST) \|\| \
bogdanm	0:9b334a45a8ff	760	((__PARAM__) == UART_MUTE_MODE_REQUEST) \|\| \
bogdanm	0:9b334a45a8ff	761	((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) \|\| \
bogdanm	0:9b334a45a8ff	762	((__PARAM__) == UART_TXDATA_FLUSH_REQUEST))
bogdanm	0:9b334a45a8ff	763	#else
bogdanm	0:9b334a45a8ff	764	#define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) \|\| \
bogdanm	0:9b334a45a8ff	765	((__PARAM__) == UART_SENDBREAK_REQUEST) \|\| \
bogdanm	0:9b334a45a8ff	766	((__PARAM__) == UART_MUTE_MODE_REQUEST) \|\| \
bogdanm	0:9b334a45a8ff	767	((__PARAM__) == UART_RXDATA_FLUSH_REQUEST))
bogdanm	0:9b334a45a8ff	768	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
bogdanm	0:9b334a45a8ff	769
bogdanm	0:9b334a45a8ff	770	#if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC)
bogdanm	0:9b334a45a8ff	771	/**
bogdanm	0:9b334a45a8ff	772	* @brief Ensure that UART stop mode state is valid.
bogdanm	0:9b334a45a8ff	773	* @param __STOPMODE__: UART stop mode state.
bogdanm	0:9b334a45a8ff	774	* @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid)
bogdanm	0:9b334a45a8ff	775	*/
bogdanm	0:9b334a45a8ff	776	#define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) \|\| \
bogdanm	0:9b334a45a8ff	777	((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE))
bogdanm	0:9b334a45a8ff	778
bogdanm	0:9b334a45a8ff	779	/**
bogdanm	0:9b334a45a8ff	780	* @brief Ensure that UART wake-up selection is valid.
bogdanm	0:9b334a45a8ff	781	* @param __WAKE__: UART wake-up selection.
bogdanm	0:9b334a45a8ff	782	* @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid)
bogdanm	0:9b334a45a8ff	783	*/
bogdanm	0:9b334a45a8ff	784	#define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) \|\| \
bogdanm	0:9b334a45a8ff	785	((__WAKE__) == UART_WAKEUP_ON_STARTBIT) \|\| \
bogdanm	0:9b334a45a8ff	786	((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY))
bogdanm	0:9b334a45a8ff	787	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */
bogdanm	0:9b334a45a8ff	788
bogdanm	0:9b334a45a8ff	789	/**
bogdanm	0:9b334a45a8ff	790	* @}
bogdanm	0:9b334a45a8ff	791	*/
bogdanm	0:9b334a45a8ff	792
bogdanm	0:9b334a45a8ff	793	/* Exported functions --------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	794	/** @addtogroup UARTEx_Exported_Functions
bogdanm	0:9b334a45a8ff	795	* @{
bogdanm	0:9b334a45a8ff	796	*/
bogdanm	0:9b334a45a8ff	797
bogdanm	0:9b334a45a8ff	798	/** @addtogroup UARTEx_Exported_Functions_Group1
bogdanm	0:9b334a45a8ff	799	* @brief Extended Initialization and Configuration Functions
bogdanm	0:9b334a45a8ff	800	* @{
bogdanm	0:9b334a45a8ff	801	*/
bogdanm	0:9b334a45a8ff	802	/* Initialization and de-initialization functions ****************************/
bogdanm	0:9b334a45a8ff	803	HAL_StatusTypeDef HAL_RS485Ex_Init(UART_HandleTypeDef *huart, uint32_t UART_DEPolarity, uint32_t UART_DEAssertionTime, uint32_t UART_DEDeassertionTime);
bogdanm	0:9b334a45a8ff	804	#if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC)
bogdanm	0:9b334a45a8ff	805	HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
bogdanm	0:9b334a45a8ff	806	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC) */
bogdanm	0:9b334a45a8ff	807	/**
bogdanm	0:9b334a45a8ff	808	* @}
bogdanm	0:9b334a45a8ff	809	*/
bogdanm	0:9b334a45a8ff	810
bogdanm	0:9b334a45a8ff	811	/** @addtogroup UARTEx_Exported_Functions_Group2
bogdanm	0:9b334a45a8ff	812	* @brief Extended UART Interrupt handling function
bogdanm	0:9b334a45a8ff	813	* @{
bogdanm	0:9b334a45a8ff	814	*/
bogdanm	0:9b334a45a8ff	815
bogdanm	0:9b334a45a8ff	816	/* IO operation functions ***************************************************/
bogdanm	0:9b334a45a8ff	817	#if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC)
bogdanm	0:9b334a45a8ff	818	void HAL_UARTEx_WakeupCallback(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	819	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC) */
bogdanm	0:9b334a45a8ff	820	/**
bogdanm	0:9b334a45a8ff	821	* @}
bogdanm	0:9b334a45a8ff	822	*/
bogdanm	0:9b334a45a8ff	823
bogdanm	0:9b334a45a8ff	824	/** @addtogroup UARTEx_Exported_Functions_Group3
bogdanm	0:9b334a45a8ff	825	* @brief Extended Peripheral Control functions
bogdanm	0:9b334a45a8ff	826	* @{
bogdanm	0:9b334a45a8ff	827	*/
bogdanm	0:9b334a45a8ff	828
bogdanm	0:9b334a45a8ff	829	/* Peripheral Control functions **********************************************/
bogdanm	0:9b334a45a8ff	830	HAL_StatusTypeDef HAL_MultiProcessorEx_AddressLength_Set(UART_HandleTypeDef *huart, uint32_t AddressLength);
bogdanm	0:9b334a45a8ff	831	#if !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6) && !defined(STM32F030xC)
bogdanm	0:9b334a45a8ff	832	HAL_StatusTypeDef HAL_UARTEx_StopModeWakeUpSourceConfig(UART_HandleTypeDef *huart, UART_WakeUpTypeDef WakeUpSelection);
bogdanm	0:9b334a45a8ff	833	HAL_StatusTypeDef HAL_UARTEx_EnableStopMode(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	834	HAL_StatusTypeDef HAL_UARTEx_DisableStopMode(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	835	HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
bogdanm	0:9b334a45a8ff	836	#endif /* !defined(STM32F030x6) && !defined(STM32F030x8)&& !defined(STM32F070xB)&& !defined(STM32F070x6)&& !defined(STM32F030xC) */
bogdanm	0:9b334a45a8ff	837	/**
bogdanm	0:9b334a45a8ff	838	* @}
bogdanm	0:9b334a45a8ff	839	*/
bogdanm	0:9b334a45a8ff	840	/* Peripheral State functions ************************************************/
bogdanm	0:9b334a45a8ff	841
bogdanm	0:9b334a45a8ff	842	/**
bogdanm	0:9b334a45a8ff	843	* @}
bogdanm	0:9b334a45a8ff	844	*/
bogdanm	0:9b334a45a8ff	845
bogdanm	0:9b334a45a8ff	846	/* Private functions ---------------------------------------------------------*/
bogdanm	0:9b334a45a8ff	847
bogdanm	0:9b334a45a8ff	848	/**
bogdanm	0:9b334a45a8ff	849	* @}
bogdanm	0:9b334a45a8ff	850	*/
bogdanm	0:9b334a45a8ff	851
bogdanm	0:9b334a45a8ff	852	/**
bogdanm	0:9b334a45a8ff	853	* @}
bogdanm	0:9b334a45a8ff	854	*/
bogdanm	0:9b334a45a8ff	855
bogdanm	0:9b334a45a8ff	856	#ifdef __cplusplus
bogdanm	0:9b334a45a8ff	857	}
bogdanm	0:9b334a45a8ff	858	#endif
bogdanm	0:9b334a45a8ff	859
bogdanm	0:9b334a45a8ff	860	#endif /* __STM32F0xx_HAL_UART_EX_H */
bogdanm	0:9b334a45a8ff	861
bogdanm	0:9b334a45a8ff	862	/********************** (C) COPYRIGHT STMicroelectronics *END OF FILE**/
bogdanm	0:9b334a45a8ff	863