mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/hal/TARGET_NXP/TARGET_LPC15XX/pwmout_api.c@82:98895dd43cc3, 2016-03-05 (annotated)

Committer:
mbed_official
Date:
Sat Mar 05 06:00:11 2016 +0000
Revision:
82:98895dd43cc3
Parent:
57:791e51e3acc9
Child:
144:ef7eb2e8f9f7
Synchronized with git revision abf43a33ced3bd9088802574c4d56480c16bc143



Full URL: https://github.com/mbedmicro/mbed/commit/abf43a33ced3bd9088802574c4d56480c16bc143/



[LPC11U68, LPC1549] Fixed PwmOut SCT Bugs

Who changed what in which revision?

UserRevisionLine numberNew contents of line
bogdanm 0:9b334a45a8ff 1 /* mbed Microcontroller Library
bogdanm 0:9b334a45a8ff 2 * Copyright (c) 2006-2013 ARM Limited
bogdanm 0:9b334a45a8ff 3 *
bogdanm 0:9b334a45a8ff 4 * Licensed under the Apache License, Version 2.0 (the "License");
bogdanm 0:9b334a45a8ff 5 * you may not use this file except in compliance with the License.
bogdanm 0:9b334a45a8ff 6 * You may obtain a copy of the License at
bogdanm 0:9b334a45a8ff 7 *
bogdanm 0:9b334a45a8ff 8 * http://www.apache.org/licenses/LICENSE-2.0
bogdanm 0:9b334a45a8ff 9 *
bogdanm 0:9b334a45a8ff 10 * Unless required by applicable law or agreed to in writing, software
bogdanm 0:9b334a45a8ff 11 * distributed under the License is distributed on an "AS IS" BASIS,
bogdanm 0:9b334a45a8ff 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
bogdanm 0:9b334a45a8ff 13 * See the License for the specific language governing permissions and
bogdanm 0:9b334a45a8ff 14 * limitations under the License.
bogdanm 0:9b334a45a8ff 15 */
bogdanm 0:9b334a45a8ff 16 #include "mbed_assert.h"
bogdanm 0:9b334a45a8ff 17 #include "pwmout_api.h"
bogdanm 0:9b334a45a8ff 18 #include "cmsis.h"
bogdanm 0:9b334a45a8ff 19 #include "pinmap.h"
bogdanm 0:9b334a45a8ff 20 #include "mbed_error.h"
bogdanm 0:9b334a45a8ff 21
bogdanm 0:9b334a45a8ff 22 static LPC_SCT0_Type *SCTs[4] = {
bogdanm 0:9b334a45a8ff 23 (LPC_SCT0_Type*)LPC_SCT0,
bogdanm 0:9b334a45a8ff 24 (LPC_SCT0_Type*)LPC_SCT1,
bogdanm 0:9b334a45a8ff 25 (LPC_SCT0_Type*)LPC_SCT2,
bogdanm 0:9b334a45a8ff 26 (LPC_SCT0_Type*)LPC_SCT3,
bogdanm 0:9b334a45a8ff 27 };
bogdanm 0:9b334a45a8ff 28
bogdanm 0:9b334a45a8ff 29 // bit flags for used SCTs
bogdanm 0:9b334a45a8ff 30 static unsigned char sct_used = 0;
bogdanm 0:9b334a45a8ff 31 static int get_available_sct(void) {
bogdanm 0:9b334a45a8ff 32 int i;
bogdanm 0:9b334a45a8ff 33 for (i=0; i<4; i++) {
bogdanm 0:9b334a45a8ff 34 if ((sct_used & (1 << i)) == 0)
bogdanm 0:9b334a45a8ff 35 return i;
bogdanm 0:9b334a45a8ff 36 }
bogdanm 0:9b334a45a8ff 37 return -1;
bogdanm 0:9b334a45a8ff 38 }
bogdanm 0:9b334a45a8ff 39
bogdanm 0:9b334a45a8ff 40 void pwmout_init(pwmout_t* obj, PinName pin) {
bogdanm 0:9b334a45a8ff 41 MBED_ASSERT(pin != (uint32_t)NC);
bogdanm 0:9b334a45a8ff 42
bogdanm 0:9b334a45a8ff 43 int sct_n = get_available_sct();
bogdanm 0:9b334a45a8ff 44 if (sct_n == -1) {
bogdanm 0:9b334a45a8ff 45 error("No available SCT");
bogdanm 0:9b334a45a8ff 46 }
bogdanm 0:9b334a45a8ff 47
bogdanm 0:9b334a45a8ff 48 sct_used |= (1 << sct_n);
bogdanm 0:9b334a45a8ff 49 obj->pwm = SCTs[sct_n];
bogdanm 0:9b334a45a8ff 50 obj->pwm_ch = sct_n;
bogdanm 0:9b334a45a8ff 51
bogdanm 0:9b334a45a8ff 52 LPC_SCT0_Type* pwm = obj->pwm;
bogdanm 0:9b334a45a8ff 53
bogdanm 0:9b334a45a8ff 54 // Enable the SCT clock
bogdanm 0:9b334a45a8ff 55 LPC_SYSCON->SYSAHBCLKCTRL1 |= (1 << (obj->pwm_ch + 2));
bogdanm 0:9b334a45a8ff 56
bogdanm 0:9b334a45a8ff 57 // Clear peripheral reset the SCT:
bogdanm 0:9b334a45a8ff 58 LPC_SYSCON->PRESETCTRL1 |= (1 << (obj->pwm_ch + 2));
bogdanm 0:9b334a45a8ff 59 LPC_SYSCON->PRESETCTRL1 &= ~(1 << (obj->pwm_ch + 2));
bogdanm 0:9b334a45a8ff 60
bogdanm 0:9b334a45a8ff 61 switch(obj->pwm_ch) {
bogdanm 0:9b334a45a8ff 62 case 0:
bogdanm 0:9b334a45a8ff 63 // SCT0_OUT0
bogdanm 0:9b334a45a8ff 64 LPC_SWM->PINASSIGN[7] &= ~0x0000FF00;
bogdanm 0:9b334a45a8ff 65 LPC_SWM->PINASSIGN[7] |= (pin << 8);
bogdanm 0:9b334a45a8ff 66 break;
bogdanm 0:9b334a45a8ff 67 case 1:
bogdanm 0:9b334a45a8ff 68 // SCT1_OUT0
bogdanm 0:9b334a45a8ff 69 LPC_SWM->PINASSIGN[8] &= ~0x000000FF;
bogdanm 0:9b334a45a8ff 70 LPC_SWM->PINASSIGN[8] |= (pin);
bogdanm 0:9b334a45a8ff 71 break;
bogdanm 0:9b334a45a8ff 72 case 2:
bogdanm 0:9b334a45a8ff 73 // SCT2_OUT0
bogdanm 0:9b334a45a8ff 74 LPC_SWM->PINASSIGN[8] &= ~0xFF000000;
bogdanm 0:9b334a45a8ff 75 LPC_SWM->PINASSIGN[8] |= (pin << 24);
bogdanm 0:9b334a45a8ff 76 break;
bogdanm 0:9b334a45a8ff 77 case 3:
bogdanm 0:9b334a45a8ff 78 // SCT3_OUT0
bogdanm 0:9b334a45a8ff 79 LPC_SWM->PINASSIGN[9] &= ~0x00FF0000;
bogdanm 0:9b334a45a8ff 80 LPC_SWM->PINASSIGN[9] |= (pin << 16);
bogdanm 0:9b334a45a8ff 81 break;
bogdanm 0:9b334a45a8ff 82 default:
bogdanm 0:9b334a45a8ff 83 break;
bogdanm 0:9b334a45a8ff 84 }
bogdanm 0:9b334a45a8ff 85
bogdanm 0:9b334a45a8ff 86 // Unified 32-bit counter, autolimit
bogdanm 0:9b334a45a8ff 87 pwm->CONFIG |= ((0x3 << 17) | 0x01);
bogdanm 0:9b334a45a8ff 88
bogdanm 0:9b334a45a8ff 89 // halt and clear the counter
bogdanm 0:9b334a45a8ff 90 pwm->CTRL |= (1 << 2) | (1 << 3);
bogdanm 0:9b334a45a8ff 91
bogdanm 0:9b334a45a8ff 92 pwm->OUT0_SET = (1 << 0); // event 0
bogdanm 0:9b334a45a8ff 93 pwm->OUT0_CLR = (1 << 1); // event 1
bogdanm 0:9b334a45a8ff 94
bogdanm 0:9b334a45a8ff 95 pwm->EV0_CTRL = (1 << 12);
bogdanm 0:9b334a45a8ff 96 pwm->EV0_STATE = 0xFFFFFFFF;
bogdanm 0:9b334a45a8ff 97 pwm->EV1_CTRL = (1 << 12) | (1 << 0);
bogdanm 0:9b334a45a8ff 98 pwm->EV1_STATE = 0xFFFFFFFF;
bogdanm 0:9b334a45a8ff 99
bogdanm 0:9b334a45a8ff 100 // default to 20ms: standard for servos, and fine for e.g. brightness control
bogdanm 0:9b334a45a8ff 101 pwmout_period_ms(obj, 20);
bogdanm 0:9b334a45a8ff 102 pwmout_write (obj, 0);
bogdanm 0:9b334a45a8ff 103 }
bogdanm 0:9b334a45a8ff 104
bogdanm 0:9b334a45a8ff 105 void pwmout_free(pwmout_t* obj) {
bogdanm 0:9b334a45a8ff 106 // Disable the SCT clock
bogdanm 0:9b334a45a8ff 107 LPC_SYSCON->SYSAHBCLKCTRL1 &= ~(1 << (obj->pwm_ch + 2));
bogdanm 0:9b334a45a8ff 108 sct_used &= ~(1 << obj->pwm_ch);
bogdanm 0:9b334a45a8ff 109 }
bogdanm 0:9b334a45a8ff 110
bogdanm 0:9b334a45a8ff 111 void pwmout_write(pwmout_t* obj, float value) {
bogdanm 0:9b334a45a8ff 112 LPC_SCT0_Type* pwm = obj->pwm;
bogdanm 0:9b334a45a8ff 113 if (value < 0.0f) {
bogdanm 0:9b334a45a8ff 114 value = 0.0;
bogdanm 0:9b334a45a8ff 115 } else if (value > 1.0f) {
bogdanm 0:9b334a45a8ff 116 value = 1.0;
bogdanm 0:9b334a45a8ff 117 }
mbed_official 57:791e51e3acc9 118 uint32_t t_on = (uint32_t)((float)(pwm->MATCHREL0 + 1) * value);
mbed_official 57:791e51e3acc9 119 if (t_on > 0) {
mbed_official 57:791e51e3acc9 120 pwm->MATCHREL1 = t_on - 1;
mbed_official 82:98895dd43cc3 121
mbed_official 82:98895dd43cc3 122 // Un-halt the timer and ensure the new pulse-width takes immediate effect if necessary
mbed_official 82:98895dd43cc3 123 if (pwm->CTRL & (1 << 2)) {
mbed_official 82:98895dd43cc3 124 pwm->MATCH1 = pwm->MATCHREL1;
mbed_official 82:98895dd43cc3 125 pwm->CTRL &= ~(1 << 2);
mbed_official 82:98895dd43cc3 126 }
mbed_official 57:791e51e3acc9 127 } else {
mbed_official 82:98895dd43cc3 128 // Halt the timer and force the output low
mbed_official 57:791e51e3acc9 129 pwm->CTRL |= (1 << 2) | (1 << 3);
mbed_official 57:791e51e3acc9 130 pwm->OUTPUT = 0x00000000;
mbed_official 57:791e51e3acc9 131 }
bogdanm 0:9b334a45a8ff 132 }
bogdanm 0:9b334a45a8ff 133
bogdanm 0:9b334a45a8ff 134 float pwmout_read(pwmout_t* obj) {
mbed_official 82:98895dd43cc3 135 LPC_SCT0_Type* pwm = obj->pwm;
mbed_official 82:98895dd43cc3 136 uint32_t t_off = pwm->MATCHREL0 + 1;
mbed_official 82:98895dd43cc3 137 uint32_t t_on = (!(pwm->CTRL & (1 << 2))) ? pwm->MATCHREL1 + 1 : 0;
bogdanm 0:9b334a45a8ff 138 float v = (float)t_on/(float)t_off;
bogdanm 0:9b334a45a8ff 139 return (v > 1.0f) ? (1.0f) : (v);
bogdanm 0:9b334a45a8ff 140 }
bogdanm 0:9b334a45a8ff 141
bogdanm 0:9b334a45a8ff 142 void pwmout_period(pwmout_t* obj, float seconds) {
bogdanm 0:9b334a45a8ff 143 pwmout_period_us(obj, seconds * 1000000.0f);
bogdanm 0:9b334a45a8ff 144 }
bogdanm 0:9b334a45a8ff 145
bogdanm 0:9b334a45a8ff 146 void pwmout_period_ms(pwmout_t* obj, int ms) {
bogdanm 0:9b334a45a8ff 147 pwmout_period_us(obj, ms * 1000);
bogdanm 0:9b334a45a8ff 148 }
bogdanm 0:9b334a45a8ff 149
bogdanm 0:9b334a45a8ff 150 // Set the PWM period, keeping the duty cycle the same.
bogdanm 0:9b334a45a8ff 151 void pwmout_period_us(pwmout_t* obj, int us) {
bogdanm 0:9b334a45a8ff 152 LPC_SCT0_Type* pwm = obj->pwm;
mbed_official 57:791e51e3acc9 153 uint32_t t_off = pwm->MATCHREL0 + 1;
mbed_official 82:98895dd43cc3 154 uint32_t t_on = (!(pwm->CTRL & (1 << 2))) ? pwm->MATCHREL1 + 1 : 0;
bogdanm 0:9b334a45a8ff 155 float v = (float)t_on/(float)t_off;
mbed_official 57:791e51e3acc9 156 uint32_t period_ticks = (uint32_t)(((uint64_t)SystemCoreClock * (uint64_t)us) / (uint64_t)1000000);
mbed_official 57:791e51e3acc9 157 uint32_t pulsewidth_ticks = period_ticks * v;
mbed_official 57:791e51e3acc9 158 pwm->MATCHREL0 = period_ticks - 1;
mbed_official 57:791e51e3acc9 159 if (pulsewidth_ticks > 0) {
mbed_official 57:791e51e3acc9 160 pwm->MATCHREL1 = pulsewidth_ticks - 1;
mbed_official 82:98895dd43cc3 161
mbed_official 82:98895dd43cc3 162 // Un-halt the timer and ensure the new period & pulse-width take immediate effect if necessary
mbed_official 82:98895dd43cc3 163 if (pwm->CTRL & (1 << 2)) {
mbed_official 82:98895dd43cc3 164 pwm->MATCH0 = pwm->MATCHREL0;
mbed_official 82:98895dd43cc3 165 pwm->MATCH1 = pwm->MATCHREL1;
mbed_official 82:98895dd43cc3 166 pwm->CTRL &= ~(1 << 2);
mbed_official 82:98895dd43cc3 167 }
mbed_official 57:791e51e3acc9 168 } else {
mbed_official 82:98895dd43cc3 169 // Halt the timer and force the output low
mbed_official 57:791e51e3acc9 170 pwm->CTRL |= (1 << 2) | (1 << 3);
mbed_official 57:791e51e3acc9 171 pwm->OUTPUT = 0x00000000;
mbed_official 82:98895dd43cc3 172
mbed_official 82:98895dd43cc3 173 // Ensure the new period will take immediate effect when the timer is un-halted
mbed_official 82:98895dd43cc3 174 pwm->MATCH0 = pwm->MATCHREL0;
mbed_official 57:791e51e3acc9 175 }
bogdanm 0:9b334a45a8ff 176 }
bogdanm 0:9b334a45a8ff 177
bogdanm 0:9b334a45a8ff 178 void pwmout_pulsewidth(pwmout_t* obj, float seconds) {
bogdanm 0:9b334a45a8ff 179 pwmout_pulsewidth_us(obj, seconds * 1000000.0f);
bogdanm 0:9b334a45a8ff 180 }
bogdanm 0:9b334a45a8ff 181
bogdanm 0:9b334a45a8ff 182 void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) {
bogdanm 0:9b334a45a8ff 183 pwmout_pulsewidth_us(obj, ms * 1000);
bogdanm 0:9b334a45a8ff 184 }
bogdanm 0:9b334a45a8ff 185
bogdanm 0:9b334a45a8ff 186 void pwmout_pulsewidth_us(pwmout_t* obj, int us) {
mbed_official 57:791e51e3acc9 187 LPC_SCT0_Type* pwm = obj->pwm;
mbed_official 57:791e51e3acc9 188 if (us > 0) {
mbed_official 57:791e51e3acc9 189 pwm->MATCHREL1 = (uint32_t)(((uint64_t)SystemCoreClock * (uint64_t)us) / (uint64_t)1000000) - 1;
mbed_official 82:98895dd43cc3 190
mbed_official 82:98895dd43cc3 191 // Un-halt the timer and ensure the new pulse-width takes immediate effect if necessary
mbed_official 82:98895dd43cc3 192 if (pwm->CTRL & (1 << 2)) {
mbed_official 82:98895dd43cc3 193 pwm->MATCH1 = pwm->MATCHREL1;
mbed_official 82:98895dd43cc3 194 pwm->CTRL &= ~(1 << 2);
mbed_official 82:98895dd43cc3 195 }
mbed_official 57:791e51e3acc9 196 } else {
mbed_official 82:98895dd43cc3 197 // Halt the timer and force the output low
mbed_official 57:791e51e3acc9 198 pwm->CTRL |= (1 << 2) | (1 << 3);
mbed_official 57:791e51e3acc9 199 pwm->OUTPUT = 0x00000000;
mbed_official 57:791e51e3acc9 200 }
bogdanm 0:9b334a45a8ff 201 }
bogdanm 0:9b334a45a8ff 202