mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_ll_gpio.c@156:95d6b41a828b, 2017-01-16 (annotated)

Committer:
<>
Date:
Mon Jan 16 15:03:32 2017 +0000
Revision:
156:95d6b41a828b
Child:
180:96ed750bd169
This updates the lib to the mbed lib v134

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 156:95d6b41a828b 1 /**
<> 156:95d6b41a828b 2 ******************************************************************************
<> 156:95d6b41a828b 3 * @file stm32f0xx_ll_gpio.c
<> 156:95d6b41a828b 4 * @author MCD Application Team
<> 156:95d6b41a828b 5 * @version V1.4.0
<> 156:95d6b41a828b 6 * @date 27-May-2016
<> 156:95d6b41a828b 7 * @brief GPIO LL module driver.
<> 156:95d6b41a828b 8 ******************************************************************************
<> 156:95d6b41a828b 9 * @attention
<> 156:95d6b41a828b 10 *
<> 156:95d6b41a828b 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 156:95d6b41a828b 12 *
<> 156:95d6b41a828b 13 * Redistribution and use in source and binary forms, with or without modification,
<> 156:95d6b41a828b 14 * are permitted provided that the following conditions are met:
<> 156:95d6b41a828b 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 156:95d6b41a828b 16 * this list of conditions and the following disclaimer.
<> 156:95d6b41a828b 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 156:95d6b41a828b 18 * this list of conditions and the following disclaimer in the documentation
<> 156:95d6b41a828b 19 * and/or other materials provided with the distribution.
<> 156:95d6b41a828b 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 156:95d6b41a828b 21 * may be used to endorse or promote products derived from this software
<> 156:95d6b41a828b 22 * without specific prior written permission.
<> 156:95d6b41a828b 23 *
<> 156:95d6b41a828b 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 156:95d6b41a828b 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 156:95d6b41a828b 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 156:95d6b41a828b 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 156:95d6b41a828b 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 156:95d6b41a828b 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 156:95d6b41a828b 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 156:95d6b41a828b 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 156:95d6b41a828b 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 156:95d6b41a828b 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 156:95d6b41a828b 34 *
<> 156:95d6b41a828b 35 ******************************************************************************
<> 156:95d6b41a828b 36 */
<> 156:95d6b41a828b 37 #if defined(USE_FULL_LL_DRIVER)
<> 156:95d6b41a828b 38
<> 156:95d6b41a828b 39 /* Includes ------------------------------------------------------------------*/
<> 156:95d6b41a828b 40 #include "stm32f0xx_ll_gpio.h"
<> 156:95d6b41a828b 41 #include "stm32f0xx_ll_bus.h"
<> 156:95d6b41a828b 42 #ifdef USE_FULL_ASSERT
<> 156:95d6b41a828b 43 #include "stm32_assert.h"
<> 156:95d6b41a828b 44 #else
<> 156:95d6b41a828b 45 #define assert_param(expr) ((void)0U)
<> 156:95d6b41a828b 46 #endif
<> 156:95d6b41a828b 47
<> 156:95d6b41a828b 48 /** @addtogroup STM32F0xx_LL_Driver
<> 156:95d6b41a828b 49 * @{
<> 156:95d6b41a828b 50 */
<> 156:95d6b41a828b 51
<> 156:95d6b41a828b 52 #if defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF)
<> 156:95d6b41a828b 53
<> 156:95d6b41a828b 54 /** @addtogroup GPIO_LL
<> 156:95d6b41a828b 55 * @{
<> 156:95d6b41a828b 56 */
<> 156:95d6b41a828b 57
<> 156:95d6b41a828b 58 /* Private types -------------------------------------------------------------*/
<> 156:95d6b41a828b 59 /* Private variables ---------------------------------------------------------*/
<> 156:95d6b41a828b 60 /* Private constants ---------------------------------------------------------*/
<> 156:95d6b41a828b 61 /* Private macros ------------------------------------------------------------*/
<> 156:95d6b41a828b 62 /** @addtogroup GPIO_LL_Private_Macros
<> 156:95d6b41a828b 63 * @{
<> 156:95d6b41a828b 64 */
<> 156:95d6b41a828b 65 #define IS_LL_GPIO_PIN(__VALUE__) ((((uint32_t)0x00000000U) < (__VALUE__)) && ((__VALUE__) <= (LL_GPIO_PIN_ALL)))
<> 156:95d6b41a828b 66
<> 156:95d6b41a828b 67 #define IS_LL_GPIO_MODE(__VALUE__) (((__VALUE__) == LL_GPIO_MODE_INPUT) ||\
<> 156:95d6b41a828b 68 ((__VALUE__) == LL_GPIO_MODE_OUTPUT) ||\
<> 156:95d6b41a828b 69 ((__VALUE__) == LL_GPIO_MODE_ALTERNATE) ||\
<> 156:95d6b41a828b 70 ((__VALUE__) == LL_GPIO_MODE_ANALOG))
<> 156:95d6b41a828b 71
<> 156:95d6b41a828b 72 #define IS_LL_GPIO_OUTPUT_TYPE(__VALUE__) (((__VALUE__) == LL_GPIO_OUTPUT_PUSHPULL) ||\
<> 156:95d6b41a828b 73 ((__VALUE__) == LL_GPIO_OUTPUT_OPENDRAIN))
<> 156:95d6b41a828b 74
<> 156:95d6b41a828b 75 #define IS_LL_GPIO_SPEED(__VALUE__) (((__VALUE__) == LL_GPIO_SPEED_FREQ_LOW) ||\
<> 156:95d6b41a828b 76 ((__VALUE__) == LL_GPIO_SPEED_FREQ_MEDIUM) ||\
<> 156:95d6b41a828b 77 ((__VALUE__) == LL_GPIO_SPEED_FREQ_HIGH) ||\
<> 156:95d6b41a828b 78 ((__VALUE__) == LL_GPIO_SPEED_FREQ_VERY_HIGH))
<> 156:95d6b41a828b 79
<> 156:95d6b41a828b 80 #define IS_LL_GPIO_PULL(__VALUE__) (((__VALUE__) == LL_GPIO_PULL_NO) ||\
<> 156:95d6b41a828b 81 ((__VALUE__) == LL_GPIO_PULL_UP) ||\
<> 156:95d6b41a828b 82 ((__VALUE__) == LL_GPIO_PULL_DOWN))
<> 156:95d6b41a828b 83
<> 156:95d6b41a828b 84 #define IS_LL_GPIO_ALTERNATE(__VALUE__) (((__VALUE__) == LL_GPIO_AF_0 ) ||\
<> 156:95d6b41a828b 85 ((__VALUE__) == LL_GPIO_AF_1 ) ||\
<> 156:95d6b41a828b 86 ((__VALUE__) == LL_GPIO_AF_2 ) ||\
<> 156:95d6b41a828b 87 ((__VALUE__) == LL_GPIO_AF_3 ) ||\
<> 156:95d6b41a828b 88 ((__VALUE__) == LL_GPIO_AF_4 ) ||\
<> 156:95d6b41a828b 89 ((__VALUE__) == LL_GPIO_AF_5 ) ||\
<> 156:95d6b41a828b 90 ((__VALUE__) == LL_GPIO_AF_6 ) ||\
<> 156:95d6b41a828b 91 ((__VALUE__) == LL_GPIO_AF_7 ))
<> 156:95d6b41a828b 92 /**
<> 156:95d6b41a828b 93 * @}
<> 156:95d6b41a828b 94 */
<> 156:95d6b41a828b 95
<> 156:95d6b41a828b 96 /* Private function prototypes -----------------------------------------------*/
<> 156:95d6b41a828b 97
<> 156:95d6b41a828b 98 /* Exported functions --------------------------------------------------------*/
<> 156:95d6b41a828b 99 /** @addtogroup GPIO_LL_Exported_Functions
<> 156:95d6b41a828b 100 * @{
<> 156:95d6b41a828b 101 */
<> 156:95d6b41a828b 102
<> 156:95d6b41a828b 103 /** @addtogroup GPIO_LL_EF_Init
<> 156:95d6b41a828b 104 * @{
<> 156:95d6b41a828b 105 */
<> 156:95d6b41a828b 106
<> 156:95d6b41a828b 107 /**
<> 156:95d6b41a828b 108 * @brief De-initialize GPIO registers (Registers restored to their default values).
<> 156:95d6b41a828b 109 * @param GPIOx GPIO Port
<> 156:95d6b41a828b 110 * @retval An ErrorStatus enumeration value:
<> 156:95d6b41a828b 111 * - SUCCESS: GPIO registers are de-initialized
<> 156:95d6b41a828b 112 * - ERROR: Wrong GPIO Port
<> 156:95d6b41a828b 113 */
<> 156:95d6b41a828b 114 ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef *GPIOx)
<> 156:95d6b41a828b 115 {
<> 156:95d6b41a828b 116 ErrorStatus status = SUCCESS;
<> 156:95d6b41a828b 117
<> 156:95d6b41a828b 118 /* Check the parameters */
<> 156:95d6b41a828b 119 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
<> 156:95d6b41a828b 120
<> 156:95d6b41a828b 121 /* Force and Release reset on clock of GPIOx Port */
<> 156:95d6b41a828b 122 if (GPIOx == GPIOA)
<> 156:95d6b41a828b 123 {
<> 156:95d6b41a828b 124 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOA);
<> 156:95d6b41a828b 125 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOA);
<> 156:95d6b41a828b 126 }
<> 156:95d6b41a828b 127 else if (GPIOx == GPIOB)
<> 156:95d6b41a828b 128 {
<> 156:95d6b41a828b 129 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOB);
<> 156:95d6b41a828b 130 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOB);
<> 156:95d6b41a828b 131 }
<> 156:95d6b41a828b 132 else if (GPIOx == GPIOC)
<> 156:95d6b41a828b 133 {
<> 156:95d6b41a828b 134 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOC);
<> 156:95d6b41a828b 135 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOC);
<> 156:95d6b41a828b 136 }
<> 156:95d6b41a828b 137 #if defined(GPIOD)
<> 156:95d6b41a828b 138 else if (GPIOx == GPIOD)
<> 156:95d6b41a828b 139 {
<> 156:95d6b41a828b 140 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOD);
<> 156:95d6b41a828b 141 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOD);
<> 156:95d6b41a828b 142 }
<> 156:95d6b41a828b 143 #endif /* GPIOD */
<> 156:95d6b41a828b 144 #if defined(GPIOE)
<> 156:95d6b41a828b 145 else if (GPIOx == GPIOE)
<> 156:95d6b41a828b 146 {
<> 156:95d6b41a828b 147 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOE);
<> 156:95d6b41a828b 148 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOE);
<> 156:95d6b41a828b 149 }
<> 156:95d6b41a828b 150 #endif /* GPIOE */
<> 156:95d6b41a828b 151 #if defined(GPIOF)
<> 156:95d6b41a828b 152 else if (GPIOx == GPIOF)
<> 156:95d6b41a828b 153 {
<> 156:95d6b41a828b 154 LL_AHB1_GRP1_ForceReset(LL_AHB1_GRP1_PERIPH_GPIOF);
<> 156:95d6b41a828b 155 LL_AHB1_GRP1_ReleaseReset(LL_AHB1_GRP1_PERIPH_GPIOF);
<> 156:95d6b41a828b 156 }
<> 156:95d6b41a828b 157 #endif /* GPIOF */
<> 156:95d6b41a828b 158 else
<> 156:95d6b41a828b 159 {
<> 156:95d6b41a828b 160 status = ERROR;
<> 156:95d6b41a828b 161 }
<> 156:95d6b41a828b 162
<> 156:95d6b41a828b 163 return (status);
<> 156:95d6b41a828b 164 }
<> 156:95d6b41a828b 165
<> 156:95d6b41a828b 166 /**
<> 156:95d6b41a828b 167 * @brief Initialize GPIO registers according to the specified parameters in GPIO_InitStruct.
<> 156:95d6b41a828b 168 * @param GPIOx GPIO Port
<> 156:95d6b41a828b 169 * @param GPIO_InitStruct: pointer to a @ref LL_GPIO_InitTypeDef structure
<> 156:95d6b41a828b 170 * that contains the configuration information for the specified GPIO peripheral.
<> 156:95d6b41a828b 171 * @retval An ErrorStatus enumeration value:
<> 156:95d6b41a828b 172 * - SUCCESS: GPIO registers are initialized according to GPIO_InitStruct content
<> 156:95d6b41a828b 173 * - ERROR: Not applicable
<> 156:95d6b41a828b 174 */
<> 156:95d6b41a828b 175 ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct)
<> 156:95d6b41a828b 176 {
<> 156:95d6b41a828b 177 uint32_t pinpos = 0x00000000U;
<> 156:95d6b41a828b 178 uint32_t currentpin = 0x00000000U;
<> 156:95d6b41a828b 179
<> 156:95d6b41a828b 180 /* Check the parameters */
<> 156:95d6b41a828b 181 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
<> 156:95d6b41a828b 182 assert_param(IS_LL_GPIO_PIN(GPIO_InitStruct->Pin));
<> 156:95d6b41a828b 183 assert_param(IS_LL_GPIO_MODE(GPIO_InitStruct->Mode));
<> 156:95d6b41a828b 184 assert_param(IS_LL_GPIO_PULL(GPIO_InitStruct->Pull));
<> 156:95d6b41a828b 185
<> 156:95d6b41a828b 186 /* ------------------------- Configure the port pins ---------------- */
<> 156:95d6b41a828b 187 /* Initialize pinpos on first pin set */
<> 156:95d6b41a828b 188 /* pinpos = 0; useless as already done in default initialization */
<> 156:95d6b41a828b 189
<> 156:95d6b41a828b 190 /* Configure the port pins */
<> 156:95d6b41a828b 191 while (((GPIO_InitStruct->Pin) >> pinpos) != 0x00000000U)
<> 156:95d6b41a828b 192 {
<> 156:95d6b41a828b 193 /* Get current io position */
<> 156:95d6b41a828b 194 currentpin = (GPIO_InitStruct->Pin) & (0x00000001U << pinpos);
<> 156:95d6b41a828b 195
<> 156:95d6b41a828b 196 if (currentpin)
<> 156:95d6b41a828b 197 {
<> 156:95d6b41a828b 198 /* Pin Mode configuration */
<> 156:95d6b41a828b 199 LL_GPIO_SetPinMode(GPIOx, currentpin, GPIO_InitStruct->Mode);
<> 156:95d6b41a828b 200
<> 156:95d6b41a828b 201 if ((GPIO_InitStruct->Mode == LL_GPIO_MODE_OUTPUT) || (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE))
<> 156:95d6b41a828b 202 {
<> 156:95d6b41a828b 203 /* Check Speed mode parameters */
<> 156:95d6b41a828b 204 assert_param(IS_LL_GPIO_SPEED(GPIO_InitStruct->Speed));
<> 156:95d6b41a828b 205
<> 156:95d6b41a828b 206 /* Speed mode configuration */
<> 156:95d6b41a828b 207 LL_GPIO_SetPinSpeed(GPIOx, currentpin, GPIO_InitStruct->Speed);
<> 156:95d6b41a828b 208 }
<> 156:95d6b41a828b 209
<> 156:95d6b41a828b 210 /* Pull-up Pull down resistor configuration*/
<> 156:95d6b41a828b 211 LL_GPIO_SetPinPull(GPIOx, currentpin, GPIO_InitStruct->Pull);
<> 156:95d6b41a828b 212
<> 156:95d6b41a828b 213 if (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE)
<> 156:95d6b41a828b 214 {
<> 156:95d6b41a828b 215 /* Check Alternate parameter */
<> 156:95d6b41a828b 216 assert_param(IS_LL_GPIO_ALTERNATE(GPIO_InitStruct->Alternate));
<> 156:95d6b41a828b 217
<> 156:95d6b41a828b 218 /* Speed mode configuration */
<> 156:95d6b41a828b 219 if (currentpin < LL_GPIO_PIN_8)
<> 156:95d6b41a828b 220 {
<> 156:95d6b41a828b 221 LL_GPIO_SetAFPin_0_7(GPIOx, currentpin, GPIO_InitStruct->Alternate);
<> 156:95d6b41a828b 222 }
<> 156:95d6b41a828b 223 else
<> 156:95d6b41a828b 224 {
<> 156:95d6b41a828b 225 LL_GPIO_SetAFPin_8_15(GPIOx, currentpin, GPIO_InitStruct->Alternate);
<> 156:95d6b41a828b 226 }
<> 156:95d6b41a828b 227 }
<> 156:95d6b41a828b 228 }
<> 156:95d6b41a828b 229 pinpos++;
<> 156:95d6b41a828b 230 }
<> 156:95d6b41a828b 231
<> 156:95d6b41a828b 232 if ((GPIO_InitStruct->Mode == LL_GPIO_MODE_OUTPUT) || (GPIO_InitStruct->Mode == LL_GPIO_MODE_ALTERNATE))
<> 156:95d6b41a828b 233 {
<> 156:95d6b41a828b 234 /* Check Output mode parameters */
<> 156:95d6b41a828b 235 assert_param(IS_LL_GPIO_OUTPUT_TYPE(GPIO_InitStruct->OutputType));
<> 156:95d6b41a828b 236
<> 156:95d6b41a828b 237 /* Output mode configuration*/
<> 156:95d6b41a828b 238 LL_GPIO_SetPinOutputType(GPIOx, GPIO_InitStruct->Pin, GPIO_InitStruct->OutputType);
<> 156:95d6b41a828b 239
<> 156:95d6b41a828b 240 }
<> 156:95d6b41a828b 241 return (SUCCESS);
<> 156:95d6b41a828b 242 }
<> 156:95d6b41a828b 243
<> 156:95d6b41a828b 244 /**
<> 156:95d6b41a828b 245 * @brief Set each @ref LL_GPIO_InitTypeDef field to default value.
<> 156:95d6b41a828b 246 * @param GPIO_InitStruct: pointer to a @ref LL_GPIO_InitTypeDef structure
<> 156:95d6b41a828b 247 * whose fields will be set to default values.
<> 156:95d6b41a828b 248 * @retval None
<> 156:95d6b41a828b 249 */
<> 156:95d6b41a828b 250
<> 156:95d6b41a828b 251 void LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct)
<> 156:95d6b41a828b 252 {
<> 156:95d6b41a828b 253 /* Reset GPIO init structure parameters values */
<> 156:95d6b41a828b 254 GPIO_InitStruct->Pin = LL_GPIO_PIN_ALL;
<> 156:95d6b41a828b 255 GPIO_InitStruct->Mode = LL_GPIO_MODE_ANALOG;
<> 156:95d6b41a828b 256 GPIO_InitStruct->Speed = LL_GPIO_SPEED_FREQ_LOW;
<> 156:95d6b41a828b 257 GPIO_InitStruct->OutputType = LL_GPIO_OUTPUT_PUSHPULL;
<> 156:95d6b41a828b 258 GPIO_InitStruct->Pull = LL_GPIO_PULL_NO;
<> 156:95d6b41a828b 259 GPIO_InitStruct->Alternate = LL_GPIO_AF_0;
<> 156:95d6b41a828b 260 }
<> 156:95d6b41a828b 261
<> 156:95d6b41a828b 262 /**
<> 156:95d6b41a828b 263 * @}
<> 156:95d6b41a828b 264 */
<> 156:95d6b41a828b 265
<> 156:95d6b41a828b 266 /**
<> 156:95d6b41a828b 267 * @}
<> 156:95d6b41a828b 268 */
<> 156:95d6b41a828b 269
<> 156:95d6b41a828b 270 /**
<> 156:95d6b41a828b 271 * @}
<> 156:95d6b41a828b 272 */
<> 156:95d6b41a828b 273
<> 156:95d6b41a828b 274 #endif /* defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) */
<> 156:95d6b41a828b 275
<> 156:95d6b41a828b 276 /**
<> 156:95d6b41a828b 277 * @}
<> 156:95d6b41a828b 278 */
<> 156:95d6b41a828b 279
<> 156:95d6b41a828b 280 #endif /* USE_FULL_LL_DRIVER */
<> 156:95d6b41a828b 281
<> 156:95d6b41a828b 282 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
<> 156:95d6b41a828b 283