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mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_usart.h@156:95d6b41a828b, 2017-01-16 (annotated)

Committer:
<>
Date:
Mon Jan 16 15:03:32 2017 +0000
Revision:
156:95d6b41a828b
Parent:
149:156823d33999
Child:
180:96ed750bd169
This updates the lib to the mbed lib v134

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f0xx_hal_usart.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 156:95d6b41a828b 5 * @version V1.5.0
<> 156:95d6b41a828b 6 * @date 04-November-2016
<> 144:ef7eb2e8f9f7 7 * @brief Header file of USART HAL module.
<> 144:ef7eb2e8f9f7 8 ******************************************************************************
<> 144:ef7eb2e8f9f7 9 * @attention
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 14 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 18 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 19 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 21 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 22 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 34 *
<> 144:ef7eb2e8f9f7 35 ******************************************************************************
<> 144:ef7eb2e8f9f7 36 */
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 39 #ifndef __STM32F0xx_HAL_USART_H
<> 144:ef7eb2e8f9f7 40 #define __STM32F0xx_HAL_USART_H
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 43 extern "C" {
<> 144:ef7eb2e8f9f7 44 #endif
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 47 #include "stm32f0xx_hal_def.h"
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 /** @addtogroup STM32F0xx_HAL_Driver
<> 144:ef7eb2e8f9f7 50 * @{
<> 144:ef7eb2e8f9f7 51 */
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 /** @addtogroup USART
<> 144:ef7eb2e8f9f7 54 * @{
<> 144:ef7eb2e8f9f7 55 */
<> 144:ef7eb2e8f9f7 56
<> 156:95d6b41a828b 57 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 58 /** @defgroup USART_Exported_Types USART Exported Types
<> 144:ef7eb2e8f9f7 59 * @{
<> 144:ef7eb2e8f9f7 60 */
<> 144:ef7eb2e8f9f7 61
<> 144:ef7eb2e8f9f7 62 /**
<> 144:ef7eb2e8f9f7 63 * @brief USART Init Structure definition
<> 144:ef7eb2e8f9f7 64 */
<> 144:ef7eb2e8f9f7 65 typedef struct
<> 144:ef7eb2e8f9f7 66 {
<> 144:ef7eb2e8f9f7 67 uint32_t BaudRate; /*!< This member configures the Usart communication baud rate.
<> 144:ef7eb2e8f9f7 68 The baud rate is computed using the following formula:
<> 144:ef7eb2e8f9f7 69 Baud Rate Register = ((PCLKx) / ((huart->Init.BaudRate))). */
<> 144:ef7eb2e8f9f7 70
<> 144:ef7eb2e8f9f7 71 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
<> 144:ef7eb2e8f9f7 72 This parameter can be a value of @ref USARTEx_Word_Length. */
<> 144:ef7eb2e8f9f7 73
<> 144:ef7eb2e8f9f7 74 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
<> 144:ef7eb2e8f9f7 75 This parameter can be a value of @ref USART_Stop_Bits. */
<> 144:ef7eb2e8f9f7 76
<> 144:ef7eb2e8f9f7 77 uint32_t Parity; /*!< Specifies the parity mode.
<> 144:ef7eb2e8f9f7 78 This parameter can be a value of @ref USART_Parity
<> 144:ef7eb2e8f9f7 79 @note When parity is enabled, the computed parity is inserted
<> 144:ef7eb2e8f9f7 80 at the MSB position of the transmitted data (9th bit when
<> 144:ef7eb2e8f9f7 81 the word length is set to 9 data bits; 8th bit when the
<> 144:ef7eb2e8f9f7 82 word length is set to 8 data bits). */
<> 144:ef7eb2e8f9f7 83
<> 144:ef7eb2e8f9f7 84 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
<> 144:ef7eb2e8f9f7 85 This parameter can be a value of @ref USART_Mode. */
<> 144:ef7eb2e8f9f7 86
<> 144:ef7eb2e8f9f7 87 uint32_t CLKPolarity; /*!< Specifies the steady state of the serial clock.
<> 144:ef7eb2e8f9f7 88 This parameter can be a value of @ref USART_Clock_Polarity. */
<> 144:ef7eb2e8f9f7 89
<> 144:ef7eb2e8f9f7 90 uint32_t CLKPhase; /*!< Specifies the clock transition on which the bit capture is made.
<> 144:ef7eb2e8f9f7 91 This parameter can be a value of @ref USART_Clock_Phase. */
<> 144:ef7eb2e8f9f7 92
<> 144:ef7eb2e8f9f7 93 uint32_t CLKLastBit; /*!< Specifies whether the clock pulse corresponding to the last transmitted
<> 144:ef7eb2e8f9f7 94 data bit (MSB) has to be output on the SCLK pin in synchronous mode.
<> 144:ef7eb2e8f9f7 95 This parameter can be a value of @ref USART_Last_Bit. */
<> 144:ef7eb2e8f9f7 96 }USART_InitTypeDef;
<> 144:ef7eb2e8f9f7 97
<> 144:ef7eb2e8f9f7 98 /**
<> 144:ef7eb2e8f9f7 99 * @brief HAL USART State structures definition
<> 144:ef7eb2e8f9f7 100 */
<> 144:ef7eb2e8f9f7 101 typedef enum
<> 144:ef7eb2e8f9f7 102 {
<> 156:95d6b41a828b 103 HAL_USART_STATE_RESET = 0x00U, /*!< Peripheral is not initialized */
<> 156:95d6b41a828b 104 HAL_USART_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
<> 156:95d6b41a828b 105 HAL_USART_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */
<> 156:95d6b41a828b 106 HAL_USART_STATE_BUSY_TX = 0x12U, /*!< Data Transmission process is ongoing */
<> 156:95d6b41a828b 107 HAL_USART_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */
<> 156:95d6b41a828b 108 HAL_USART_STATE_BUSY_TX_RX = 0x32U, /*!< Data Transmission Reception process is ongoing */
<> 156:95d6b41a828b 109 HAL_USART_STATE_TIMEOUT = 0x03U, /*!< Timeout state */
<> 156:95d6b41a828b 110 HAL_USART_STATE_ERROR = 0x04U /*!< Error */
<> 144:ef7eb2e8f9f7 111 }HAL_USART_StateTypeDef;
<> 144:ef7eb2e8f9f7 112
<> 144:ef7eb2e8f9f7 113 /**
<> 144:ef7eb2e8f9f7 114 * @brief USART clock sources definitions
<> 144:ef7eb2e8f9f7 115 */
<> 144:ef7eb2e8f9f7 116 typedef enum
<> 144:ef7eb2e8f9f7 117 {
<> 156:95d6b41a828b 118 USART_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */
<> 156:95d6b41a828b 119 USART_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */
<> 156:95d6b41a828b 120 USART_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */
<> 156:95d6b41a828b 121 USART_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */
<> 156:95d6b41a828b 122 USART_CLOCKSOURCE_UNDEFINED = 0x10U /*!< Undefined clock source */
<> 144:ef7eb2e8f9f7 123 }USART_ClockSourceTypeDef;
<> 144:ef7eb2e8f9f7 124
<> 144:ef7eb2e8f9f7 125
<> 144:ef7eb2e8f9f7 126 /**
<> 144:ef7eb2e8f9f7 127 * @brief USART handle Structure definition
<> 144:ef7eb2e8f9f7 128 */
<> 144:ef7eb2e8f9f7 129 typedef struct
<> 144:ef7eb2e8f9f7 130 {
<> 144:ef7eb2e8f9f7 131 USART_TypeDef *Instance; /*!< USART registers base address */
<> 144:ef7eb2e8f9f7 132
<> 144:ef7eb2e8f9f7 133 USART_InitTypeDef Init; /*!< USART communication parameters */
<> 144:ef7eb2e8f9f7 134
<> 144:ef7eb2e8f9f7 135 uint8_t *pTxBuffPtr; /*!< Pointer to USART Tx transfer Buffer */
<> 144:ef7eb2e8f9f7 136
<> 144:ef7eb2e8f9f7 137 uint16_t TxXferSize; /*!< USART Tx Transfer size */
<> 144:ef7eb2e8f9f7 138
<> 156:95d6b41a828b 139 __IO uint16_t TxXferCount; /*!< USART Tx Transfer Counter */
<> 144:ef7eb2e8f9f7 140
<> 144:ef7eb2e8f9f7 141 uint8_t *pRxBuffPtr; /*!< Pointer to USART Rx transfer Buffer */
<> 144:ef7eb2e8f9f7 142
<> 144:ef7eb2e8f9f7 143 uint16_t RxXferSize; /*!< USART Rx Transfer size */
<> 144:ef7eb2e8f9f7 144
<> 156:95d6b41a828b 145 __IO uint16_t RxXferCount; /*!< USART Rx Transfer Counter */
<> 144:ef7eb2e8f9f7 146
<> 144:ef7eb2e8f9f7 147 uint16_t Mask; /*!< USART Rx RDR register mask */
<> 144:ef7eb2e8f9f7 148
<> 144:ef7eb2e8f9f7 149 DMA_HandleTypeDef *hdmatx; /*!< USART Tx DMA Handle parameters */
<> 144:ef7eb2e8f9f7 150
<> 144:ef7eb2e8f9f7 151 DMA_HandleTypeDef *hdmarx; /*!< USART Rx DMA Handle parameters */
<> 144:ef7eb2e8f9f7 152
<> 144:ef7eb2e8f9f7 153 HAL_LockTypeDef Lock; /*!< Locking object */
<> 144:ef7eb2e8f9f7 154
<> 156:95d6b41a828b 155 __IO HAL_USART_StateTypeDef State; /*!< USART communication state */
<> 144:ef7eb2e8f9f7 156
<> 156:95d6b41a828b 157 __IO uint32_t ErrorCode; /*!< USART Error code */
<> 144:ef7eb2e8f9f7 158
<> 144:ef7eb2e8f9f7 159 }USART_HandleTypeDef;
<> 144:ef7eb2e8f9f7 160
<> 144:ef7eb2e8f9f7 161 /**
<> 144:ef7eb2e8f9f7 162 * @}
<> 144:ef7eb2e8f9f7 163 */
<> 144:ef7eb2e8f9f7 164
<> 144:ef7eb2e8f9f7 165 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 166 /** @defgroup USART_Exported_Constants USART Exported Constants
<> 144:ef7eb2e8f9f7 167 * @{
<> 144:ef7eb2e8f9f7 168 */
<> 144:ef7eb2e8f9f7 169
<> 144:ef7eb2e8f9f7 170 /** @defgroup USART_Error USART Error
<> 144:ef7eb2e8f9f7 171 * @{
<> 144:ef7eb2e8f9f7 172 */
<> 156:95d6b41a828b 173 #define HAL_USART_ERROR_NONE (0x00000000U) /*!< No error */
<> 156:95d6b41a828b 174 #define HAL_USART_ERROR_PE (0x00000001U) /*!< Parity error */
<> 156:95d6b41a828b 175 #define HAL_USART_ERROR_NE (0x00000002U) /*!< Noise error */
<> 156:95d6b41a828b 176 #define HAL_USART_ERROR_FE (0x00000004U) /*!< frame error */
<> 156:95d6b41a828b 177 #define HAL_USART_ERROR_ORE (0x00000008U) /*!< Overrun error */
<> 156:95d6b41a828b 178 #define HAL_USART_ERROR_DMA (0x00000010U) /*!< DMA transfer error */
<> 144:ef7eb2e8f9f7 179 /**
<> 144:ef7eb2e8f9f7 180 * @}
<> 144:ef7eb2e8f9f7 181 */
<> 144:ef7eb2e8f9f7 182
<> 144:ef7eb2e8f9f7 183 /** @defgroup USART_Stop_Bits USART Number of Stop Bits
<> 144:ef7eb2e8f9f7 184 * @{
<> 144:ef7eb2e8f9f7 185 */
<> 144:ef7eb2e8f9f7 186 #ifdef USART_SMARTCARD_SUPPORT
<> 156:95d6b41a828b 187 #define USART_STOPBITS_0_5 ((uint32_t)USART_CR2_STOP_0) /*!< USART frame with 0.5 stop bit */
<> 156:95d6b41a828b 188 #define USART_STOPBITS_1 (0x00000000U) /*!< USART frame with 1 stop bit */
<> 156:95d6b41a828b 189 #define USART_STOPBITS_1_5 ((uint32_t)(USART_CR2_STOP_0 | USART_CR2_STOP_1)) /*!< USART frame with 1.5 stop bits */
<> 156:95d6b41a828b 190 #define USART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1) /*!< USART frame with 2 stop bits */
<> 144:ef7eb2e8f9f7 191 #else
<> 156:95d6b41a828b 192 #define USART_STOPBITS_1 (0x00000000U) /*!< USART frame with 1 stop bit */
<> 156:95d6b41a828b 193 #define USART_STOPBITS_2 ((uint32_t)USART_CR2_STOP_1) /*!< USART frame with 2 stop bits */
<> 144:ef7eb2e8f9f7 194 #endif
<> 144:ef7eb2e8f9f7 195 /**
<> 144:ef7eb2e8f9f7 196 * @}
<> 144:ef7eb2e8f9f7 197 */
<> 144:ef7eb2e8f9f7 198
<> 144:ef7eb2e8f9f7 199 /** @defgroup USART_Parity USART Parity
<> 144:ef7eb2e8f9f7 200 * @{
<> 144:ef7eb2e8f9f7 201 */
<> 156:95d6b41a828b 202 #define USART_PARITY_NONE (0x00000000U) /*!< No parity */
<> 144:ef7eb2e8f9f7 203 #define USART_PARITY_EVEN ((uint32_t)USART_CR1_PCE) /*!< Even parity */
<> 144:ef7eb2e8f9f7 204 #define USART_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS)) /*!< Odd parity */
<> 144:ef7eb2e8f9f7 205 /**
<> 144:ef7eb2e8f9f7 206 * @}
<> 144:ef7eb2e8f9f7 207 */
<> 144:ef7eb2e8f9f7 208
<> 144:ef7eb2e8f9f7 209 /** @defgroup USART_Mode USART Mode
<> 144:ef7eb2e8f9f7 210 * @{
<> 144:ef7eb2e8f9f7 211 */
<> 156:95d6b41a828b 212 #define USART_MODE_RX ((uint32_t)USART_CR1_RE) /*!< RX mode */
<> 144:ef7eb2e8f9f7 213 #define USART_MODE_TX ((uint32_t)USART_CR1_TE) /*!< TX mode */
<> 144:ef7eb2e8f9f7 214 #define USART_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE)) /*!< RX and TX mode */
<> 144:ef7eb2e8f9f7 215 /**
<> 144:ef7eb2e8f9f7 216 * @}
<> 144:ef7eb2e8f9f7 217 */
<> 144:ef7eb2e8f9f7 218
<> 144:ef7eb2e8f9f7 219 /** @defgroup USART_Clock USART Clock
<> 144:ef7eb2e8f9f7 220 * @{
<> 144:ef7eb2e8f9f7 221 */
<> 156:95d6b41a828b 222 #define USART_CLOCK_DISABLE (0x00000000U) /*!< USART clock disable */
<> 144:ef7eb2e8f9f7 223 #define USART_CLOCK_ENABLE ((uint32_t)USART_CR2_CLKEN) /*!< USART clock enable */
<> 144:ef7eb2e8f9f7 224 /**
<> 144:ef7eb2e8f9f7 225 * @}
<> 144:ef7eb2e8f9f7 226 */
<> 144:ef7eb2e8f9f7 227
<> 144:ef7eb2e8f9f7 228 /** @defgroup USART_Clock_Polarity USART Clock Polarity
<> 144:ef7eb2e8f9f7 229 * @{
<> 144:ef7eb2e8f9f7 230 */
<> 156:95d6b41a828b 231 #define USART_POLARITY_LOW (0x00000000U) /*!< USART Clock signal is steady Low */
<> 156:95d6b41a828b 232 #define USART_POLARITY_HIGH ((uint32_t)USART_CR2_CPOL) /*!< USART Clock signal is steady High */
<> 144:ef7eb2e8f9f7 233 /**
<> 144:ef7eb2e8f9f7 234 * @}
<> 144:ef7eb2e8f9f7 235 */
<> 144:ef7eb2e8f9f7 236
<> 144:ef7eb2e8f9f7 237 /** @defgroup USART_Clock_Phase USART Clock Phase
<> 144:ef7eb2e8f9f7 238 * @{
<> 144:ef7eb2e8f9f7 239 */
<> 156:95d6b41a828b 240 #define USART_PHASE_1EDGE (0x00000000U) /*!< USART frame phase on first clock transition */
<> 144:ef7eb2e8f9f7 241 #define USART_PHASE_2EDGE ((uint32_t)USART_CR2_CPHA) /*!< USART frame phase on second clock transition */
<> 144:ef7eb2e8f9f7 242 /**
<> 144:ef7eb2e8f9f7 243 * @}
<> 144:ef7eb2e8f9f7 244 */
<> 144:ef7eb2e8f9f7 245
<> 144:ef7eb2e8f9f7 246 /** @defgroup USART_Last_Bit USART Last Bit
<> 144:ef7eb2e8f9f7 247 * @{
<> 144:ef7eb2e8f9f7 248 */
<> 156:95d6b41a828b 249 #define USART_LASTBIT_DISABLE (0x00000000U) /*!< USART frame last data bit clock pulse not output to SCLK pin */
<> 144:ef7eb2e8f9f7 250 #define USART_LASTBIT_ENABLE ((uint32_t)USART_CR2_LBCL) /*!< USART frame last data bit clock pulse output to SCLK pin */
<> 144:ef7eb2e8f9f7 251 /**
<> 144:ef7eb2e8f9f7 252 * @}
<> 144:ef7eb2e8f9f7 253 */
<> 144:ef7eb2e8f9f7 254
<> 144:ef7eb2e8f9f7 255 /** @defgroup USART_Interrupt_definition USART Interrupts Definition
<> 144:ef7eb2e8f9f7 256 * Elements values convention: 0000ZZZZ0XXYYYYYb
<> 144:ef7eb2e8f9f7 257 * - YYYYY : Interrupt source position in the XX register (5bits)
<> 144:ef7eb2e8f9f7 258 * - XX : Interrupt source register (2bits)
<> 144:ef7eb2e8f9f7 259 * - 01: CR1 register
<> 144:ef7eb2e8f9f7 260 * - 10: CR2 register
<> 144:ef7eb2e8f9f7 261 * - 11: CR3 register
<> 144:ef7eb2e8f9f7 262 * - ZZZZ : Flag position in the ISR register(4bits)
<> 144:ef7eb2e8f9f7 263 * @{
<> 144:ef7eb2e8f9f7 264 */
<> 144:ef7eb2e8f9f7 265
<> 156:95d6b41a828b 266 #define USART_IT_PE ((uint16_t)0x0028U) /*!< USART parity error interruption */
<> 156:95d6b41a828b 267 #define USART_IT_TXE ((uint16_t)0x0727U) /*!< USART transmit data register empty interruption */
<> 156:95d6b41a828b 268 #define USART_IT_TC ((uint16_t)0x0626U) /*!< USART transmission complete interruption */
<> 156:95d6b41a828b 269 #define USART_IT_RXNE ((uint16_t)0x0525U) /*!< USART read data register not empty interruption */
<> 156:95d6b41a828b 270 #define USART_IT_IDLE ((uint16_t)0x0424U) /*!< USART idle interruption */
<> 156:95d6b41a828b 271 #define USART_IT_ERR ((uint16_t)0x0060U) /*!< USART error interruption */
<> 156:95d6b41a828b 272 #define USART_IT_ORE ((uint16_t)0x0300U) /*!< USART overrun error interruption */
<> 156:95d6b41a828b 273 #define USART_IT_NE ((uint16_t)0x0200U) /*!< USART noise error interruption */
<> 156:95d6b41a828b 274 #define USART_IT_FE ((uint16_t)0x0100U) /*!< USART frame error interruption */
<> 144:ef7eb2e8f9f7 275 /**
<> 144:ef7eb2e8f9f7 276 * @}
<> 144:ef7eb2e8f9f7 277 */
<> 144:ef7eb2e8f9f7 278
<> 144:ef7eb2e8f9f7 279 /** @defgroup USART_IT_CLEAR_Flags USART Interruption Clear Flags
<> 144:ef7eb2e8f9f7 280 * @{
<> 144:ef7eb2e8f9f7 281 */
<> 144:ef7eb2e8f9f7 282 #define USART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */
<> 144:ef7eb2e8f9f7 283 #define USART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */
<> 144:ef7eb2e8f9f7 284 #define USART_CLEAR_NEF USART_ICR_NCF /*!< Noise detected Clear Flag */
<> 144:ef7eb2e8f9f7 285 #define USART_CLEAR_OREF USART_ICR_ORECF /*!< OverRun Error Clear Flag */
<> 144:ef7eb2e8f9f7 286 #define USART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */
<> 144:ef7eb2e8f9f7 287 #define USART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */
<> 144:ef7eb2e8f9f7 288 #define USART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */
<> 144:ef7eb2e8f9f7 289 /**
<> 144:ef7eb2e8f9f7 290 * @}
<> 144:ef7eb2e8f9f7 291 */
<> 144:ef7eb2e8f9f7 292
<> 144:ef7eb2e8f9f7 293 /** @defgroup USART_Interruption_Mask USART Interruption Flags Mask
<> 144:ef7eb2e8f9f7 294 * @{
<> 144:ef7eb2e8f9f7 295 */
<> 156:95d6b41a828b 296 #define USART_IT_MASK ((uint16_t)0x001FU) /*!< USART interruptions flags mask */
<> 144:ef7eb2e8f9f7 297 /**
<> 144:ef7eb2e8f9f7 298 * @}
<> 144:ef7eb2e8f9f7 299 */
<> 144:ef7eb2e8f9f7 300
<> 144:ef7eb2e8f9f7 301 /**
<> 144:ef7eb2e8f9f7 302 * @}
<> 144:ef7eb2e8f9f7 303 */
<> 144:ef7eb2e8f9f7 304
<> 144:ef7eb2e8f9f7 305 /* Exported macros -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 306 /** @defgroup USART_Exported_Macros USART Exported Macros
<> 144:ef7eb2e8f9f7 307 * @{
<> 144:ef7eb2e8f9f7 308 */
<> 144:ef7eb2e8f9f7 309
<> 144:ef7eb2e8f9f7 310 /** @brief Reset USART handle state.
<> 144:ef7eb2e8f9f7 311 * @param __HANDLE__: USART handle.
<> 144:ef7eb2e8f9f7 312 * @retval None
<> 144:ef7eb2e8f9f7 313 */
<> 144:ef7eb2e8f9f7 314 #define __HAL_USART_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_USART_STATE_RESET)
<> 144:ef7eb2e8f9f7 315
<> 144:ef7eb2e8f9f7 316 /** @brief Check whether the specified USART flag is set or not.
<> 144:ef7eb2e8f9f7 317 * @param __HANDLE__: specifies the USART Handle
<> 144:ef7eb2e8f9f7 318 * @param __FLAG__: specifies the flag to check.
<> 144:ef7eb2e8f9f7 319 * This parameter can be one of the following values:
<> 156:95d6b41a828b 320 @if STM32F030x6
<> 156:95d6b41a828b 321 @elseif STM32F030x8
<> 156:95d6b41a828b 322 @elseif STM32F030xC
<> 156:95d6b41a828b 323 @elseif STM32F070x6
<> 156:95d6b41a828b 324 @elseif STM32F070xB
<> 156:95d6b41a828b 325 @else
<> 156:95d6b41a828b 326 * @arg @ref USART_FLAG_REACK Receive enable acknowledge flag
<> 156:95d6b41a828b 327 @endif
<> 156:95d6b41a828b 328 * @arg @ref USART_FLAG_TEACK Transmit enable acknowledge flag
<> 156:95d6b41a828b 329 * @arg @ref USART_FLAG_BUSY Busy flag
<> 156:95d6b41a828b 330 * @arg @ref USART_FLAG_CTS CTS Change flag
<> 156:95d6b41a828b 331 * @arg @ref USART_FLAG_TXE Transmit data register empty flag
<> 156:95d6b41a828b 332 * @arg @ref USART_FLAG_TC Transmission Complete flag
<> 156:95d6b41a828b 333 * @arg @ref USART_FLAG_RXNE Receive data register not empty flag
<> 156:95d6b41a828b 334 * @arg @ref USART_FLAG_IDLE Idle Line detection flag
<> 156:95d6b41a828b 335 * @arg @ref USART_FLAG_ORE OverRun Error flag
<> 156:95d6b41a828b 336 * @arg @ref USART_FLAG_NE Noise Error flag
<> 156:95d6b41a828b 337 * @arg @ref USART_FLAG_FE Framing Error flag
<> 156:95d6b41a828b 338 * @arg @ref USART_FLAG_PE Parity Error flag
<> 144:ef7eb2e8f9f7 339 * @retval The new state of __FLAG__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 340 */
<> 144:ef7eb2e8f9f7 341 #define __HAL_USART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
<> 144:ef7eb2e8f9f7 342
<> 144:ef7eb2e8f9f7 343 /** @brief Clear the specified USART pending flag.
<> 144:ef7eb2e8f9f7 344 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 345 * @param __FLAG__: specifies the flag to check.
<> 144:ef7eb2e8f9f7 346 * This parameter can be any combination of the following values:
<> 156:95d6b41a828b 347 * @arg @ref USART_CLEAR_PEF
<> 156:95d6b41a828b 348 * @arg @ref USART_CLEAR_FEF
<> 156:95d6b41a828b 349 * @arg @ref USART_CLEAR_NEF
<> 156:95d6b41a828b 350 * @arg @ref USART_CLEAR_OREF
<> 156:95d6b41a828b 351 * @arg @ref USART_CLEAR_IDLEF
<> 156:95d6b41a828b 352 * @arg @ref USART_CLEAR_TCF
<> 156:95d6b41a828b 353 * @arg @ref USART_CLEAR_CTSF
<> 144:ef7eb2e8f9f7 354 * @retval None
<> 144:ef7eb2e8f9f7 355 */
<> 144:ef7eb2e8f9f7 356 #define __HAL_USART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
<> 144:ef7eb2e8f9f7 357
<> 144:ef7eb2e8f9f7 358 /** @brief Clear the USART PE pending flag.
<> 144:ef7eb2e8f9f7 359 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 360 * @retval None
<> 144:ef7eb2e8f9f7 361 */
<> 144:ef7eb2e8f9f7 362 #define __HAL_USART_CLEAR_PEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_PEF)
<> 144:ef7eb2e8f9f7 363
<> 144:ef7eb2e8f9f7 364 /** @brief Clear the USART FE pending flag.
<> 144:ef7eb2e8f9f7 365 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 366 * @retval None
<> 144:ef7eb2e8f9f7 367 */
<> 144:ef7eb2e8f9f7 368 #define __HAL_USART_CLEAR_FEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_FEF)
<> 144:ef7eb2e8f9f7 369
<> 144:ef7eb2e8f9f7 370 /** @brief Clear the USART NE pending flag.
<> 144:ef7eb2e8f9f7 371 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 372 * @retval None
<> 144:ef7eb2e8f9f7 373 */
<> 144:ef7eb2e8f9f7 374 #define __HAL_USART_CLEAR_NEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_NEF)
<> 144:ef7eb2e8f9f7 375
<> 144:ef7eb2e8f9f7 376 /** @brief Clear the USART ORE pending flag.
<> 144:ef7eb2e8f9f7 377 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 378 * @retval None
<> 144:ef7eb2e8f9f7 379 */
<> 144:ef7eb2e8f9f7 380 #define __HAL_USART_CLEAR_OREFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_OREF)
<> 144:ef7eb2e8f9f7 381
<> 144:ef7eb2e8f9f7 382 /** @brief Clear the USART IDLE pending flag.
<> 144:ef7eb2e8f9f7 383 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 384 * @retval None
<> 144:ef7eb2e8f9f7 385 */
<> 144:ef7eb2e8f9f7 386 #define __HAL_USART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_USART_CLEAR_FLAG((__HANDLE__), USART_CLEAR_IDLEF)
<> 144:ef7eb2e8f9f7 387
<> 144:ef7eb2e8f9f7 388 /** @brief Enable the specified USART interrupt.
<> 144:ef7eb2e8f9f7 389 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 390 * @param __INTERRUPT__: specifies the USART interrupt source to enable.
<> 144:ef7eb2e8f9f7 391 * This parameter can be one of the following values:
<> 156:95d6b41a828b 392 * @arg @ref USART_IT_TXE Transmit Data Register empty interrupt
<> 156:95d6b41a828b 393 * @arg @ref USART_IT_TC Transmission complete interrupt
<> 156:95d6b41a828b 394 * @arg @ref USART_IT_RXNE Receive Data register not empty interrupt
<> 156:95d6b41a828b 395 * @arg @ref USART_IT_IDLE Idle line detection interrupt
<> 156:95d6b41a828b 396 * @arg @ref USART_IT_PE Parity Error interrupt
<> 156:95d6b41a828b 397 * @arg @ref USART_IT_ERR Error interrupt(Frame error, noise error, overrun error)
<> 144:ef7eb2e8f9f7 398 * @retval None
<> 144:ef7eb2e8f9f7 399 */
<> 156:95d6b41a828b 400 #define __HAL_USART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
<> 156:95d6b41a828b 401 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
<> 144:ef7eb2e8f9f7 402 ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & USART_IT_MASK))))
<> 144:ef7eb2e8f9f7 403
<> 144:ef7eb2e8f9f7 404 /** @brief Disable the specified USART interrupt.
<> 144:ef7eb2e8f9f7 405 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 406 * @param __INTERRUPT__: specifies the USART interrupt source to disable.
<> 144:ef7eb2e8f9f7 407 * This parameter can be one of the following values:
<> 156:95d6b41a828b 408 * @arg @ref USART_IT_TXE Transmit Data Register empty interrupt
<> 156:95d6b41a828b 409 * @arg @ref USART_IT_TC Transmission complete interrupt
<> 156:95d6b41a828b 410 * @arg @ref USART_IT_RXNE Receive Data register not empty interrupt
<> 156:95d6b41a828b 411 * @arg @ref USART_IT_IDLE Idle line detection interrupt
<> 156:95d6b41a828b 412 * @arg @ref USART_IT_PE Parity Error interrupt
<> 156:95d6b41a828b 413 * @arg @ref USART_IT_ERR Error interrupt(Frame error, noise error, overrun error)
<> 144:ef7eb2e8f9f7 414 * @retval None
<> 144:ef7eb2e8f9f7 415 */
<> 156:95d6b41a828b 416 #define __HAL_USART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
<> 156:95d6b41a828b 417 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))): \
<> 144:ef7eb2e8f9f7 418 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & USART_IT_MASK))))
<> 144:ef7eb2e8f9f7 419
<> 144:ef7eb2e8f9f7 420
<> 144:ef7eb2e8f9f7 421 /** @brief Check whether the specified USART interrupt has occurred or not.
<> 144:ef7eb2e8f9f7 422 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 423 * @param __IT__: specifies the USART interrupt source to check.
<> 144:ef7eb2e8f9f7 424 * This parameter can be one of the following values:
<> 156:95d6b41a828b 425 * @arg @ref USART_IT_TXE Transmit Data Register empty interrupt
<> 156:95d6b41a828b 426 * @arg @ref USART_IT_TC Transmission complete interrupt
<> 156:95d6b41a828b 427 * @arg @ref USART_IT_RXNE Receive Data register not empty interrupt
<> 156:95d6b41a828b 428 * @arg @ref USART_IT_IDLE Idle line detection interrupt
<> 156:95d6b41a828b 429 * @arg @ref USART_IT_ORE OverRun Error interrupt
<> 156:95d6b41a828b 430 * @arg @ref USART_IT_NE Noise Error interrupt
<> 156:95d6b41a828b 431 * @arg @ref USART_IT_FE Framing Error interrupt
<> 156:95d6b41a828b 432 * @arg @ref USART_IT_PE Parity Error interrupt
<> 144:ef7eb2e8f9f7 433 * @retval The new state of __IT__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 434 */
<> 156:95d6b41a828b 435 #define __HAL_USART_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & (1U << ((__IT__)>> 0x08U)))
<> 144:ef7eb2e8f9f7 436
<> 144:ef7eb2e8f9f7 437 /** @brief Check whether the specified USART interrupt source is enabled or not.
<> 144:ef7eb2e8f9f7 438 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 439 * @param __IT__: specifies the USART interrupt source to check.
<> 144:ef7eb2e8f9f7 440 * This parameter can be one of the following values:
<> 156:95d6b41a828b 441 * @arg @ref USART_IT_TXE Transmit Data Register empty interrupt
<> 156:95d6b41a828b 442 * @arg @ref USART_IT_TC Transmission complete interrupt
<> 156:95d6b41a828b 443 * @arg @ref USART_IT_RXNE Receive Data register not empty interrupt
<> 156:95d6b41a828b 444 * @arg @ref USART_IT_IDLE Idle line detection interrupt
<> 156:95d6b41a828b 445 * @arg @ref USART_IT_ORE OverRun Error interrupt
<> 156:95d6b41a828b 446 * @arg @ref USART_IT_NE Noise Error interrupt
<> 156:95d6b41a828b 447 * @arg @ref USART_IT_FE Framing Error interrupt
<> 156:95d6b41a828b 448 * @arg @ref USART_IT_PE Parity Error interrupt
<> 144:ef7eb2e8f9f7 449 * @retval The new state of __IT__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 450 */
<> 156:95d6b41a828b 451 #define __HAL_USART_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5U) == 1U)? (__HANDLE__)->Instance->CR1:(((((uint8_t)(__IT__)) >> 5U) == 2U)? \
<> 156:95d6b41a828b 452 (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & (1U << \
<> 144:ef7eb2e8f9f7 453 (((uint16_t)(__IT__)) & USART_IT_MASK)))
<> 144:ef7eb2e8f9f7 454
<> 144:ef7eb2e8f9f7 455
<> 144:ef7eb2e8f9f7 456 /** @brief Clear the specified USART ISR flag, in setting the proper ICR register flag.
<> 144:ef7eb2e8f9f7 457 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 458 * @param __IT_CLEAR__: specifies the interrupt clear register flag that needs to be set
<> 144:ef7eb2e8f9f7 459 * to clear the corresponding interrupt.
<> 144:ef7eb2e8f9f7 460 * This parameter can be one of the following values:
<> 156:95d6b41a828b 461 * @arg @ref USART_CLEAR_PEF Parity Error Clear Flag
<> 156:95d6b41a828b 462 * @arg @ref USART_CLEAR_FEF Framing Error Clear Flag
<> 156:95d6b41a828b 463 * @arg @ref USART_CLEAR_NEF Noise detected Clear Flag
<> 156:95d6b41a828b 464 * @arg @ref USART_CLEAR_OREF OverRun Error Clear Flag
<> 156:95d6b41a828b 465 * @arg @ref USART_CLEAR_IDLEF IDLE line detected Clear Flag
<> 156:95d6b41a828b 466 * @arg @ref USART_CLEAR_TCF Transmission Complete Clear Flag
<> 156:95d6b41a828b 467 * @arg @ref USART_CLEAR_CTSF CTS Interrupt Clear Flag
<> 144:ef7eb2e8f9f7 468 * @retval None
<> 144:ef7eb2e8f9f7 469 */
<> 144:ef7eb2e8f9f7 470 #define __HAL_USART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__))
<> 144:ef7eb2e8f9f7 471
<> 144:ef7eb2e8f9f7 472 /** @brief Set a specific USART request flag.
<> 144:ef7eb2e8f9f7 473 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 474 * @param __REQ__: specifies the request flag to set.
<> 144:ef7eb2e8f9f7 475 * This parameter can be one of the following values:
<> 156:95d6b41a828b 476 * @arg @ref USART_RXDATA_FLUSH_REQUEST Receive Data flush Request
<> 156:95d6b41a828b 477 @if STM32F030x6
<> 156:95d6b41a828b 478 @elseif STM32F030x8
<> 156:95d6b41a828b 479 @elseif STM32F030xC
<> 156:95d6b41a828b 480 @elseif STM32F070x6
<> 156:95d6b41a828b 481 @elseif STM32F070xB
<> 156:95d6b41a828b 482 @else
<> 156:95d6b41a828b 483 * @arg @ref USART_TXDATA_FLUSH_REQUEST Transmit data flush Request
<> 156:95d6b41a828b 484 @endif
<> 144:ef7eb2e8f9f7 485 *
<> 144:ef7eb2e8f9f7 486 * @retval None
<> 144:ef7eb2e8f9f7 487 */
<> 144:ef7eb2e8f9f7 488 #define __HAL_USART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (__REQ__))
<> 144:ef7eb2e8f9f7 489
<> 144:ef7eb2e8f9f7 490 /** @brief Enable the USART one bit sample method.
<> 144:ef7eb2e8f9f7 491 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 492 * @retval None
<> 156:95d6b41a828b 493 */
<> 144:ef7eb2e8f9f7 494 #define __HAL_USART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
<> 144:ef7eb2e8f9f7 495
<> 144:ef7eb2e8f9f7 496 /** @brief Disable the USART one bit sample method.
<> 144:ef7eb2e8f9f7 497 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 498 * @retval None
<> 156:95d6b41a828b 499 */
<> 144:ef7eb2e8f9f7 500 #define __HAL_USART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_ONEBIT))
<> 144:ef7eb2e8f9f7 501
<> 144:ef7eb2e8f9f7 502 /** @brief Enable USART.
<> 144:ef7eb2e8f9f7 503 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 504 * @retval None
<> 144:ef7eb2e8f9f7 505 */
<> 144:ef7eb2e8f9f7 506 #define __HAL_USART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
<> 144:ef7eb2e8f9f7 507
<> 144:ef7eb2e8f9f7 508 /** @brief Disable USART.
<> 144:ef7eb2e8f9f7 509 * @param __HANDLE__: specifies the USART Handle.
<> 144:ef7eb2e8f9f7 510 * @retval None
<> 144:ef7eb2e8f9f7 511 */
<> 144:ef7eb2e8f9f7 512 #define __HAL_USART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
<> 144:ef7eb2e8f9f7 513
<> 144:ef7eb2e8f9f7 514 /**
<> 144:ef7eb2e8f9f7 515 * @}
<> 144:ef7eb2e8f9f7 516 */
<> 144:ef7eb2e8f9f7 517
<> 144:ef7eb2e8f9f7 518 /* Private macros --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 519 /** @defgroup USART_Private_Macros USART Private Macros
<> 144:ef7eb2e8f9f7 520 * @{
<> 144:ef7eb2e8f9f7 521 */
<> 144:ef7eb2e8f9f7 522
<> 156:95d6b41a828b 523 /** @brief Check USART Baud rate.
<> 144:ef7eb2e8f9f7 524 * @param __BAUDRATE__: Baudrate specified by the user.
<> 144:ef7eb2e8f9f7 525 * The maximum Baud Rate is derived from the maximum clock on F0 (i.e. 48 MHz)
<> 144:ef7eb2e8f9f7 526 * divided by the smallest oversampling used on the USART (i.e. 8)
<> 144:ef7eb2e8f9f7 527 * @retval Test result (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 528 */
<> 156:95d6b41a828b 529 #define IS_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 6000001U)
<> 144:ef7eb2e8f9f7 530
<> 144:ef7eb2e8f9f7 531 /**
<> 144:ef7eb2e8f9f7 532 * @brief Ensure that USART frame number of stop bits is valid.
<> 144:ef7eb2e8f9f7 533 * @param __STOPBITS__: USART frame number of stop bits.
<> 144:ef7eb2e8f9f7 534 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid)
<> 144:ef7eb2e8f9f7 535 */
<> 144:ef7eb2e8f9f7 536 #ifdef USART_SMARTCARD_SUPPORT
<> 144:ef7eb2e8f9f7 537 #define IS_USART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == USART_STOPBITS_0_5) || \
<> 144:ef7eb2e8f9f7 538 ((__STOPBITS__) == USART_STOPBITS_1) || \
<> 144:ef7eb2e8f9f7 539 ((__STOPBITS__) == USART_STOPBITS_1_5) || \
<> 144:ef7eb2e8f9f7 540 ((__STOPBITS__) == USART_STOPBITS_2))
<> 144:ef7eb2e8f9f7 541 #else
<> 144:ef7eb2e8f9f7 542 #define IS_USART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == USART_STOPBITS_1) || \
<> 144:ef7eb2e8f9f7 543 ((__STOPBITS__) == USART_STOPBITS_2))
<> 144:ef7eb2e8f9f7 544 #endif
<> 144:ef7eb2e8f9f7 545
<> 144:ef7eb2e8f9f7 546 /**
<> 144:ef7eb2e8f9f7 547 * @brief Ensure that USART frame parity is valid.
<> 144:ef7eb2e8f9f7 548 * @param __PARITY__: USART frame parity.
<> 144:ef7eb2e8f9f7 549 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid)
<> 144:ef7eb2e8f9f7 550 */
<> 144:ef7eb2e8f9f7 551 #define IS_USART_PARITY(__PARITY__) (((__PARITY__) == USART_PARITY_NONE) || \
<> 144:ef7eb2e8f9f7 552 ((__PARITY__) == USART_PARITY_EVEN) || \
<> 144:ef7eb2e8f9f7 553 ((__PARITY__) == USART_PARITY_ODD))
<> 144:ef7eb2e8f9f7 554
<> 144:ef7eb2e8f9f7 555 /**
<> 144:ef7eb2e8f9f7 556 * @brief Ensure that USART communication mode is valid.
<> 144:ef7eb2e8f9f7 557 * @param __MODE__: USART communication mode.
<> 144:ef7eb2e8f9f7 558 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
<> 144:ef7eb2e8f9f7 559 */
<> 156:95d6b41a828b 560 #define IS_USART_MODE(__MODE__) ((((__MODE__) & 0xFFFFFFF3U) == 0x00U) && ((__MODE__) != 0x00U))
<> 144:ef7eb2e8f9f7 561
<> 144:ef7eb2e8f9f7 562 /**
<> 144:ef7eb2e8f9f7 563 * @brief Ensure that USART clock state is valid.
<> 144:ef7eb2e8f9f7 564 * @param __CLOCK__: USART clock state.
<> 144:ef7eb2e8f9f7 565 * @retval SET (__CLOCK__ is valid) or RESET (__CLOCK__ is invalid)
<> 144:ef7eb2e8f9f7 566 */
<> 144:ef7eb2e8f9f7 567 #define IS_USART_CLOCK(__CLOCK__) (((__CLOCK__) == USART_CLOCK_DISABLE) || \
<> 144:ef7eb2e8f9f7 568 ((__CLOCK__) == USART_CLOCK_ENABLE))
<> 144:ef7eb2e8f9f7 569
<> 144:ef7eb2e8f9f7 570 /**
<> 144:ef7eb2e8f9f7 571 * @brief Ensure that USART frame polarity is valid.
<> 144:ef7eb2e8f9f7 572 * @param __CPOL__: USART frame polarity.
<> 144:ef7eb2e8f9f7 573 * @retval SET (__CPOL__ is valid) or RESET (__CPOL__ is invalid)
<> 144:ef7eb2e8f9f7 574 */
<> 144:ef7eb2e8f9f7 575 #define IS_USART_POLARITY(__CPOL__) (((__CPOL__) == USART_POLARITY_LOW) || ((__CPOL__) == USART_POLARITY_HIGH))
<> 144:ef7eb2e8f9f7 576
<> 144:ef7eb2e8f9f7 577 /**
<> 144:ef7eb2e8f9f7 578 * @brief Ensure that USART frame phase is valid.
<> 144:ef7eb2e8f9f7 579 * @param __CPHA__: USART frame phase.
<> 144:ef7eb2e8f9f7 580 * @retval SET (__CPHA__ is valid) or RESET (__CPHA__ is invalid)
<> 144:ef7eb2e8f9f7 581 */
<> 144:ef7eb2e8f9f7 582 #define IS_USART_PHASE(__CPHA__) (((__CPHA__) == USART_PHASE_1EDGE) || ((__CPHA__) == USART_PHASE_2EDGE))
<> 144:ef7eb2e8f9f7 583
<> 144:ef7eb2e8f9f7 584 /**
<> 144:ef7eb2e8f9f7 585 * @brief Ensure that USART frame last bit clock pulse setting is valid.
<> 144:ef7eb2e8f9f7 586 * @param __LASTBIT__: USART frame last bit clock pulse setting.
<> 144:ef7eb2e8f9f7 587 * @retval SET (__LASTBIT__ is valid) or RESET (__LASTBIT__ is invalid)
<> 144:ef7eb2e8f9f7 588 */
<> 144:ef7eb2e8f9f7 589 #define IS_USART_LASTBIT(__LASTBIT__) (((__LASTBIT__) == USART_LASTBIT_DISABLE) || \
<> 144:ef7eb2e8f9f7 590 ((__LASTBIT__) == USART_LASTBIT_ENABLE))
<> 144:ef7eb2e8f9f7 591
<> 144:ef7eb2e8f9f7 592 /**
<> 144:ef7eb2e8f9f7 593 * @}
<> 144:ef7eb2e8f9f7 594 */
<> 144:ef7eb2e8f9f7 595
<> 156:95d6b41a828b 596 /* Include USART HAL Extended module */
<> 144:ef7eb2e8f9f7 597 #include "stm32f0xx_hal_usart_ex.h"
<> 144:ef7eb2e8f9f7 598
<> 144:ef7eb2e8f9f7 599 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 600 /** @addtogroup USART_Exported_Functions USART Exported Functions
<> 144:ef7eb2e8f9f7 601 * @{
<> 144:ef7eb2e8f9f7 602 */
<> 144:ef7eb2e8f9f7 603
<> 144:ef7eb2e8f9f7 604 /** @addtogroup USART_Exported_Functions_Group1 Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 605 * @{
<> 144:ef7eb2e8f9f7 606 */
<> 144:ef7eb2e8f9f7 607
<> 144:ef7eb2e8f9f7 608 /* Initialization and de-initialization functions ****************************/
<> 144:ef7eb2e8f9f7 609 HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 610 HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 611 void HAL_USART_MspInit(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 612 void HAL_USART_MspDeInit(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 613
<> 144:ef7eb2e8f9f7 614 /**
<> 144:ef7eb2e8f9f7 615 * @}
<> 144:ef7eb2e8f9f7 616 */
<> 144:ef7eb2e8f9f7 617
<> 144:ef7eb2e8f9f7 618 /** @addtogroup USART_Exported_Functions_Group2 IO operation functions
<> 144:ef7eb2e8f9f7 619 * @{
<> 144:ef7eb2e8f9f7 620 */
<> 144:ef7eb2e8f9f7 621
<> 144:ef7eb2e8f9f7 622 /* IO operation functions *****************************************************/
<> 144:ef7eb2e8f9f7 623 HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 624 HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 625 HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 626 HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size);
<> 144:ef7eb2e8f9f7 627 HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
<> 144:ef7eb2e8f9f7 628 HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
<> 144:ef7eb2e8f9f7 629 HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size);
<> 144:ef7eb2e8f9f7 630 HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size);
<> 144:ef7eb2e8f9f7 631 HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size);
<> 144:ef7eb2e8f9f7 632 HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 633 HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 634 HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart);
<> 156:95d6b41a828b 635 /* Transfer Abort functions */
<> 156:95d6b41a828b 636 HAL_StatusTypeDef HAL_USART_Abort(USART_HandleTypeDef *husart);
<> 156:95d6b41a828b 637 HAL_StatusTypeDef HAL_USART_Abort_IT(USART_HandleTypeDef *husart);
<> 156:95d6b41a828b 638
<> 144:ef7eb2e8f9f7 639 void HAL_USART_IRQHandler(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 640 void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 641 void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 642 void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 643 void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 644 void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 645 void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart);
<> 156:95d6b41a828b 646 void HAL_USART_AbortCpltCallback (USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 647
<> 144:ef7eb2e8f9f7 648 /**
<> 144:ef7eb2e8f9f7 649 * @}
<> 144:ef7eb2e8f9f7 650 */
<> 144:ef7eb2e8f9f7 651
<> 144:ef7eb2e8f9f7 652 /* Peripheral Control functions ***********************************************/
<> 144:ef7eb2e8f9f7 653
<> 144:ef7eb2e8f9f7 654 /** @addtogroup USART_Exported_Functions_Group3 Peripheral State and Error functions
<> 144:ef7eb2e8f9f7 655 * @{
<> 144:ef7eb2e8f9f7 656 */
<> 144:ef7eb2e8f9f7 657
<> 144:ef7eb2e8f9f7 658 /* Peripheral State and Error functions ***************************************/
<> 144:ef7eb2e8f9f7 659 HAL_USART_StateTypeDef HAL_USART_GetState(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 660 uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 661
<> 144:ef7eb2e8f9f7 662 /**
<> 144:ef7eb2e8f9f7 663 * @}
<> 144:ef7eb2e8f9f7 664 */
<> 144:ef7eb2e8f9f7 665
<> 144:ef7eb2e8f9f7 666 /**
<> 144:ef7eb2e8f9f7 667 * @}
<> 144:ef7eb2e8f9f7 668 */
<> 144:ef7eb2e8f9f7 669
<> 144:ef7eb2e8f9f7 670 /**
<> 144:ef7eb2e8f9f7 671 * @}
<> 144:ef7eb2e8f9f7 672 */
<> 144:ef7eb2e8f9f7 673
<> 144:ef7eb2e8f9f7 674 /**
<> 144:ef7eb2e8f9f7 675 * @}
<> 144:ef7eb2e8f9f7 676 */
<> 144:ef7eb2e8f9f7 677
<> 144:ef7eb2e8f9f7 678 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 679 }
<> 144:ef7eb2e8f9f7 680 #endif
<> 144:ef7eb2e8f9f7 681
<> 144:ef7eb2e8f9f7 682 #endif /* __STM32F0xx_HAL_USART_H */
<> 144:ef7eb2e8f9f7 683
<> 144:ef7eb2e8f9f7 684 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
<> 144:ef7eb2e8f9f7 685