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mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_tim_ex.h@156:95d6b41a828b, 2017-01-16 (annotated)

Committer:
<>
Date:
Mon Jan 16 15:03:32 2017 +0000
Revision:
156:95d6b41a828b
Parent:
149:156823d33999
Child:
180:96ed750bd169
This updates the lib to the mbed lib v134

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f0xx_hal_tim_ex.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 156:95d6b41a828b 5 * @version V1.5.0
<> 156:95d6b41a828b 6 * @date 04-November-2016
<> 144:ef7eb2e8f9f7 7 * @brief Header file of TIM HAL Extended module.
<> 144:ef7eb2e8f9f7 8 ******************************************************************************
<> 144:ef7eb2e8f9f7 9 * @attention
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 14 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 18 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 19 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 21 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 22 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 34 *
<> 144:ef7eb2e8f9f7 35 ******************************************************************************
<> 144:ef7eb2e8f9f7 36 */
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 39 #ifndef __STM32F0xx_HAL_TIM_EX_H
<> 144:ef7eb2e8f9f7 40 #define __STM32F0xx_HAL_TIM_EX_H
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 43 extern "C" {
<> 144:ef7eb2e8f9f7 44 #endif
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 47 #include "stm32f0xx_hal_def.h"
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 /** @addtogroup STM32F0xx_HAL_Driver
<> 144:ef7eb2e8f9f7 50 * @{
<> 144:ef7eb2e8f9f7 51 */
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 /** @addtogroup TIMEx
<> 144:ef7eb2e8f9f7 54 * @{
<> 144:ef7eb2e8f9f7 55 */
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 58 /** @defgroup TIMEx_Exported_Types TIMEx Exported Types
<> 144:ef7eb2e8f9f7 59 * @{
<> 144:ef7eb2e8f9f7 60 */
<> 144:ef7eb2e8f9f7 61
<> 144:ef7eb2e8f9f7 62
<> 144:ef7eb2e8f9f7 63 /**
<> 144:ef7eb2e8f9f7 64 * @brief TIM Hall sensor Configuration Structure definition
<> 144:ef7eb2e8f9f7 65 */
<> 144:ef7eb2e8f9f7 66
<> 144:ef7eb2e8f9f7 67 typedef struct
<> 144:ef7eb2e8f9f7 68 {
<> 144:ef7eb2e8f9f7 69
<> 144:ef7eb2e8f9f7 70 uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal.
<> 144:ef7eb2e8f9f7 71 This parameter can be a value of @ref TIM_Input_Capture_Polarity */
<> 144:ef7eb2e8f9f7 72
<> 144:ef7eb2e8f9f7 73 uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler.
<> 144:ef7eb2e8f9f7 74 This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
<> 144:ef7eb2e8f9f7 75
<> 144:ef7eb2e8f9f7 76 uint32_t IC1Filter; /*!< Specifies the input capture filter.
<> 144:ef7eb2e8f9f7 77 This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
<> 144:ef7eb2e8f9f7 78 uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
<> 144:ef7eb2e8f9f7 79 This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
<> 144:ef7eb2e8f9f7 80 } TIM_HallSensor_InitTypeDef;
<> 144:ef7eb2e8f9f7 81
<> 144:ef7eb2e8f9f7 82 /**
<> 144:ef7eb2e8f9f7 83 * @brief TIM Master configuration Structure definition
<> 144:ef7eb2e8f9f7 84 */
<> 144:ef7eb2e8f9f7 85 typedef struct {
<> 144:ef7eb2e8f9f7 86 uint32_t MasterOutputTrigger; /*!< Trigger output (TRGO) selection
<> 144:ef7eb2e8f9f7 87 This parameter can be a value of @ref TIM_Master_Mode_Selection */
<> 144:ef7eb2e8f9f7 88 uint32_t MasterSlaveMode; /*!< Master/slave mode selection
<> 144:ef7eb2e8f9f7 89 This parameter can be a value of @ref TIM_Master_Slave_Mode */
<> 144:ef7eb2e8f9f7 90 }TIM_MasterConfigTypeDef;
<> 144:ef7eb2e8f9f7 91
<> 144:ef7eb2e8f9f7 92 /**
<> 144:ef7eb2e8f9f7 93 * @brief TIM Break and Dead time configuration Structure definition
<> 144:ef7eb2e8f9f7 94 */
<> 144:ef7eb2e8f9f7 95 typedef struct
<> 144:ef7eb2e8f9f7 96 {
<> 144:ef7eb2e8f9f7 97 uint32_t OffStateRunMode; /*!< TIM off state in run mode
<> 144:ef7eb2e8f9f7 98 This parameter can be a value of @ref TIM_OSSR_Off_State_Selection_for_Run_mode_state */
<> 144:ef7eb2e8f9f7 99 uint32_t OffStateIDLEMode; /*!< TIM off state in IDLE mode
<> 144:ef7eb2e8f9f7 100 This parameter can be a value of @ref TIM_OSSI_Off_State_Selection_for_Idle_mode_state */
<> 144:ef7eb2e8f9f7 101 uint32_t LockLevel; /*!< TIM Lock level
<> 144:ef7eb2e8f9f7 102 This parameter can be a value of @ref TIM_Lock_level */
<> 144:ef7eb2e8f9f7 103 uint32_t DeadTime; /*!< TIM dead Time
<> 144:ef7eb2e8f9f7 104 This parameter can be a number between Min_Data = 0x00 and Max_Data = 0xFF */
<> 144:ef7eb2e8f9f7 105 uint32_t BreakState; /*!< TIM Break State
<> 144:ef7eb2e8f9f7 106 This parameter can be a value of @ref TIM_Break_Input_enable_disable */
<> 144:ef7eb2e8f9f7 107 uint32_t BreakPolarity; /*!< TIM Break input polarity
<> 144:ef7eb2e8f9f7 108 This parameter can be a value of @ref TIM_Break_Polarity */
<> 144:ef7eb2e8f9f7 109 uint32_t AutomaticOutput; /*!< TIM Automatic Output Enable state
<> 144:ef7eb2e8f9f7 110 This parameter can be a value of @ref TIM_AOE_Bit_Set_Reset */
<> 144:ef7eb2e8f9f7 111 } TIM_BreakDeadTimeConfigTypeDef;
<> 144:ef7eb2e8f9f7 112
<> 144:ef7eb2e8f9f7 113 /**
<> 144:ef7eb2e8f9f7 114 * @}
<> 144:ef7eb2e8f9f7 115 */
<> 144:ef7eb2e8f9f7 116
<> 144:ef7eb2e8f9f7 117 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 118 /** @defgroup TIMEx_Exported_Constants TIMEx Exported Constants
<> 144:ef7eb2e8f9f7 119 * @{
<> 144:ef7eb2e8f9f7 120 */
<> 144:ef7eb2e8f9f7 121
<> 144:ef7eb2e8f9f7 122 /** @defgroup TIMEx_Remap TIMEx Remap
<> 144:ef7eb2e8f9f7 123 * @{
<> 144:ef7eb2e8f9f7 124 */
<> 144:ef7eb2e8f9f7 125
<> 144:ef7eb2e8f9f7 126 #define TIM_TIM14_GPIO (0x00000000) /*!< TIM14 TI1 is connected to GPIO */
<> 144:ef7eb2e8f9f7 127 #define TIM_TIM14_RTC (0x00000001) /*!< TIM14 TI1 is connected to RTC_clock */
<> 144:ef7eb2e8f9f7 128 #define TIM_TIM14_HSE (0x00000002) /*!< TIM14 TI1 is connected to HSE/32 */
<> 144:ef7eb2e8f9f7 129 #define TIM_TIM14_MCO (0x00000003) /*!< TIM14 TI1 is connected to MCO */
<> 144:ef7eb2e8f9f7 130 /**
<> 144:ef7eb2e8f9f7 131 * @}
<> 144:ef7eb2e8f9f7 132 */
<> 144:ef7eb2e8f9f7 133
<> 144:ef7eb2e8f9f7 134 /** @defgroup TIMEx_Clock_Clear_Input_Source TIMEx Clear Input Source
<> 144:ef7eb2e8f9f7 135 * @{
<> 144:ef7eb2e8f9f7 136 */
<> 156:95d6b41a828b 137 #define TIM_CLEARINPUTSOURCE_NONE (0x00000000U)
<> 156:95d6b41a828b 138 #define TIM_CLEARINPUTSOURCE_ETR (0x00000001U)
<> 144:ef7eb2e8f9f7 139 #if defined(STM32F051x8) || defined(STM32F058xx) || \
<> 144:ef7eb2e8f9f7 140 defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
<> 144:ef7eb2e8f9f7 141 defined(STM32F091xC) || defined (STM32F098xx)
<> 156:95d6b41a828b 142 #define TIM_CLEARINPUTSOURCE_OCREFCLR (0x00000002U)
<> 144:ef7eb2e8f9f7 143 #endif /* STM32F051x8 || STM32F058xx || */
<> 144:ef7eb2e8f9f7 144 /* STM32F071xB || STM32F072xB || STM32F078xx || */
<> 144:ef7eb2e8f9f7 145 /* STM32F091xC || defined (STM32F098xx) */
<> 144:ef7eb2e8f9f7 146 /**
<> 144:ef7eb2e8f9f7 147 * @}
<> 144:ef7eb2e8f9f7 148 */
<> 144:ef7eb2e8f9f7 149
<> 144:ef7eb2e8f9f7 150 /**
<> 144:ef7eb2e8f9f7 151 * @}
<> 144:ef7eb2e8f9f7 152 */
<> 144:ef7eb2e8f9f7 153
<> 144:ef7eb2e8f9f7 154 /* Private Macros -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 155 /** @defgroup TIM_Private_Macros TIM Private Macros
<> 144:ef7eb2e8f9f7 156 * @{
<> 144:ef7eb2e8f9f7 157 */
<> 144:ef7eb2e8f9f7 158
<> 144:ef7eb2e8f9f7 159 #define IS_TIM_REMAP(TIM_REMAP) (((TIM_REMAP) == TIM_TIM14_GPIO) ||\
<> 144:ef7eb2e8f9f7 160 ((TIM_REMAP) == TIM_TIM14_RTC) ||\
<> 144:ef7eb2e8f9f7 161 ((TIM_REMAP) == TIM_TIM14_HSE) ||\
<> 144:ef7eb2e8f9f7 162 ((TIM_REMAP) == TIM_TIM14_MCO))
<> 144:ef7eb2e8f9f7 163
<> 156:95d6b41a828b 164 #define IS_TIM_DEADTIME(DEADTIME) ((DEADTIME) <= 0xFFU) /*!< BreakDead Time */
<> 144:ef7eb2e8f9f7 165
<> 144:ef7eb2e8f9f7 166 #if defined(STM32F051x8) || defined(STM32F058xx) || \
<> 144:ef7eb2e8f9f7 167 defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) || \
<> 144:ef7eb2e8f9f7 168 defined(STM32F091xC) || defined (STM32F098xx)
<> 144:ef7eb2e8f9f7 169 #define IS_TIM_CLEARINPUT_SOURCE(SOURCE) (((SOURCE) == TIM_CLEARINPUTSOURCE_NONE) || \
<> 144:ef7eb2e8f9f7 170 ((SOURCE) == TIM_CLEARINPUTSOURCE_ETR) || \
<> 144:ef7eb2e8f9f7 171 ((SOURCE) == TIM_CLEARINPUTSOURCE_OCREFCLR))
<> 144:ef7eb2e8f9f7 172 #else
<> 144:ef7eb2e8f9f7 173 #define IS_TIM_CLEARINPUT_SOURCE(SOURCE) (((SOURCE) == TIM_CLEARINPUTSOURCE_NONE) || \
<> 144:ef7eb2e8f9f7 174 ((SOURCE) == TIM_CLEARINPUTSOURCE_ETR))
<> 144:ef7eb2e8f9f7 175 #endif /* STM32F051x8 || STM32F058xx || */
<> 144:ef7eb2e8f9f7 176 /* STM32F071xB || STM32F072xB || STM32F078xx || */
<> 144:ef7eb2e8f9f7 177 /* STM32F091xC || defined (STM32F098xx) */
<> 144:ef7eb2e8f9f7 178 /**
<> 144:ef7eb2e8f9f7 179 * @}
<> 144:ef7eb2e8f9f7 180 */
<> 144:ef7eb2e8f9f7 181
<> 144:ef7eb2e8f9f7 182 /* Exported macro ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 183
<> 144:ef7eb2e8f9f7 184 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 185 /** @addtogroup TIMEx_Exported_Functions
<> 144:ef7eb2e8f9f7 186 * @{
<> 144:ef7eb2e8f9f7 187 */
<> 144:ef7eb2e8f9f7 188
<> 144:ef7eb2e8f9f7 189 /** @addtogroup TIMEx_Exported_Functions_Group1
<> 144:ef7eb2e8f9f7 190 * @{
<> 144:ef7eb2e8f9f7 191 */
<> 144:ef7eb2e8f9f7 192 /* Timer Hall Sensor functions **********************************************/
<> 144:ef7eb2e8f9f7 193 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef* sConfig);
<> 144:ef7eb2e8f9f7 194 HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim);
<> 144:ef7eb2e8f9f7 195
<> 144:ef7eb2e8f9f7 196 void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim);
<> 144:ef7eb2e8f9f7 197 void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim);
<> 144:ef7eb2e8f9f7 198
<> 144:ef7eb2e8f9f7 199 /* Blocking mode: Polling */
<> 144:ef7eb2e8f9f7 200 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim);
<> 144:ef7eb2e8f9f7 201 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim);
<> 144:ef7eb2e8f9f7 202 /* Non-Blocking mode: Interrupt */
<> 144:ef7eb2e8f9f7 203 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim);
<> 144:ef7eb2e8f9f7 204 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim);
<> 144:ef7eb2e8f9f7 205 /* Non-Blocking mode: DMA */
<> 144:ef7eb2e8f9f7 206 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length);
<> 144:ef7eb2e8f9f7 207 HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim);
<> 144:ef7eb2e8f9f7 208 /**
<> 144:ef7eb2e8f9f7 209 * @}
<> 144:ef7eb2e8f9f7 210 */
<> 144:ef7eb2e8f9f7 211
<> 144:ef7eb2e8f9f7 212 /** @addtogroup TIMEx_Exported_Functions_Group2
<> 144:ef7eb2e8f9f7 213 * @{
<> 144:ef7eb2e8f9f7 214 */
<> 144:ef7eb2e8f9f7 215 /* Timer Complementary Output Compare functions *****************************/
<> 144:ef7eb2e8f9f7 216 /* Blocking mode: Polling */
<> 144:ef7eb2e8f9f7 217 HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
<> 144:ef7eb2e8f9f7 218 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
<> 144:ef7eb2e8f9f7 219
<> 144:ef7eb2e8f9f7 220 /* Non-Blocking mode: Interrupt */
<> 144:ef7eb2e8f9f7 221 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
<> 144:ef7eb2e8f9f7 222 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
<> 144:ef7eb2e8f9f7 223
<> 144:ef7eb2e8f9f7 224 /* Non-Blocking mode: DMA */
<> 144:ef7eb2e8f9f7 225 HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
<> 144:ef7eb2e8f9f7 226 HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
<> 144:ef7eb2e8f9f7 227 /**
<> 144:ef7eb2e8f9f7 228 * @}
<> 144:ef7eb2e8f9f7 229 */
<> 144:ef7eb2e8f9f7 230
<> 144:ef7eb2e8f9f7 231 /** @addtogroup TIMEx_Exported_Functions_Group3
<> 144:ef7eb2e8f9f7 232 * @{
<> 144:ef7eb2e8f9f7 233 */
<> 144:ef7eb2e8f9f7 234 /* Timer Complementary PWM functions ****************************************/
<> 144:ef7eb2e8f9f7 235 /* Blocking mode: Polling */
<> 144:ef7eb2e8f9f7 236 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
<> 144:ef7eb2e8f9f7 237 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
<> 144:ef7eb2e8f9f7 238
<> 144:ef7eb2e8f9f7 239 /* Non-Blocking mode: Interrupt */
<> 144:ef7eb2e8f9f7 240 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
<> 144:ef7eb2e8f9f7 241 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
<> 144:ef7eb2e8f9f7 242 /* Non-Blocking mode: DMA */
<> 144:ef7eb2e8f9f7 243 HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
<> 144:ef7eb2e8f9f7 244 HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
<> 144:ef7eb2e8f9f7 245 /**
<> 144:ef7eb2e8f9f7 246 * @}
<> 144:ef7eb2e8f9f7 247 */
<> 144:ef7eb2e8f9f7 248
<> 144:ef7eb2e8f9f7 249 /** @addtogroup TIMEx_Exported_Functions_Group4
<> 144:ef7eb2e8f9f7 250 * @{
<> 144:ef7eb2e8f9f7 251 */
<> 144:ef7eb2e8f9f7 252 /* Timer Complementary One Pulse functions **********************************/
<> 144:ef7eb2e8f9f7 253 /* Blocking mode: Polling */
<> 144:ef7eb2e8f9f7 254 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
<> 144:ef7eb2e8f9f7 255 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
<> 144:ef7eb2e8f9f7 256
<> 144:ef7eb2e8f9f7 257 /* Non-Blocking mode: Interrupt */
<> 144:ef7eb2e8f9f7 258 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
<> 144:ef7eb2e8f9f7 259 HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
<> 144:ef7eb2e8f9f7 260 /**
<> 144:ef7eb2e8f9f7 261 * @}
<> 144:ef7eb2e8f9f7 262 */
<> 144:ef7eb2e8f9f7 263
<> 144:ef7eb2e8f9f7 264 /** @addtogroup TIMEx_Exported_Functions_Group5
<> 144:ef7eb2e8f9f7 265 * @{
<> 144:ef7eb2e8f9f7 266 */
<> 144:ef7eb2e8f9f7 267 /* Extended Control functions ************************************************/
<> 144:ef7eb2e8f9f7 268 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource);
<> 144:ef7eb2e8f9f7 269 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource);
<> 144:ef7eb2e8f9f7 270 HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource);
<> 144:ef7eb2e8f9f7 271 HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef * sMasterConfig);
<> 144:ef7eb2e8f9f7 272 HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig);
<> 144:ef7eb2e8f9f7 273 HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap);
<> 144:ef7eb2e8f9f7 274 /**
<> 144:ef7eb2e8f9f7 275 * @}
<> 144:ef7eb2e8f9f7 276 */
<> 144:ef7eb2e8f9f7 277
<> 144:ef7eb2e8f9f7 278 /** @addtogroup TIMEx_Exported_Functions_Group6
<> 144:ef7eb2e8f9f7 279 * @{
<> 144:ef7eb2e8f9f7 280 */
<> 144:ef7eb2e8f9f7 281 /* Extension Callback *********************************************************/
<> 144:ef7eb2e8f9f7 282 void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim);
<> 144:ef7eb2e8f9f7 283 void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim);
<> 144:ef7eb2e8f9f7 284 /**
<> 144:ef7eb2e8f9f7 285 * @}
<> 144:ef7eb2e8f9f7 286 */
<> 144:ef7eb2e8f9f7 287
<> 144:ef7eb2e8f9f7 288 /** @addtogroup TIMEx_Exported_Functions_Group7
<> 144:ef7eb2e8f9f7 289 * @{
<> 144:ef7eb2e8f9f7 290 */
<> 144:ef7eb2e8f9f7 291 /* Extension Peripheral State functions **************************************/
<> 144:ef7eb2e8f9f7 292 HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim);
<> 144:ef7eb2e8f9f7 293 /**
<> 144:ef7eb2e8f9f7 294 * @}
<> 144:ef7eb2e8f9f7 295 */
<> 144:ef7eb2e8f9f7 296
<> 144:ef7eb2e8f9f7 297 /**
<> 144:ef7eb2e8f9f7 298 * @}
<> 144:ef7eb2e8f9f7 299 */
<> 144:ef7eb2e8f9f7 300 /* End of exported functions -------------------------------------------------*/
<> 144:ef7eb2e8f9f7 301
<> 144:ef7eb2e8f9f7 302 /* Private functions----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 303 /** @defgroup TIMEx_Private_Functions TIMEx Private Functions
<> 144:ef7eb2e8f9f7 304 * @{
<> 144:ef7eb2e8f9f7 305 */
<> 144:ef7eb2e8f9f7 306 void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 307 /**
<> 144:ef7eb2e8f9f7 308 * @}
<> 144:ef7eb2e8f9f7 309 */
<> 144:ef7eb2e8f9f7 310 /* End of private functions --------------------------------------------------*/
<> 144:ef7eb2e8f9f7 311
<> 144:ef7eb2e8f9f7 312 /**
<> 144:ef7eb2e8f9f7 313 * @}
<> 144:ef7eb2e8f9f7 314 */
<> 144:ef7eb2e8f9f7 315
<> 144:ef7eb2e8f9f7 316 /**
<> 144:ef7eb2e8f9f7 317 * @}
<> 144:ef7eb2e8f9f7 318 */
<> 144:ef7eb2e8f9f7 319
<> 144:ef7eb2e8f9f7 320 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 321 }
<> 144:ef7eb2e8f9f7 322 #endif
<> 144:ef7eb2e8f9f7 323
<> 144:ef7eb2e8f9f7 324
<> 144:ef7eb2e8f9f7 325 #endif /* __STM32F0xx_HAL_TIM_EX_H */
<> 144:ef7eb2e8f9f7 326
<> 144:ef7eb2e8f9f7 327 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/