mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_gpio.c@156:95d6b41a828b, 2017-01-16 (annotated)

Committer:
<>
Date:
Mon Jan 16 15:03:32 2017 +0000
Revision:
156:95d6b41a828b
Parent:
149:156823d33999
Child:
180:96ed750bd169
This updates the lib to the mbed lib v134

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f0xx_hal_gpio.c
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 156:95d6b41a828b 5 * @version V1.5.0
<> 156:95d6b41a828b 6 * @date 04-November-2016
<> 144:ef7eb2e8f9f7 7 * @brief GPIO HAL module driver.
<> 144:ef7eb2e8f9f7 8 * This file provides firmware functions to manage the following
<> 144:ef7eb2e8f9f7 9 * functionalities of the General Purpose Input/Output (GPIO) peripheral:
<> 144:ef7eb2e8f9f7 10 * + Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 11 * + IO operation functions
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 @verbatim
<> 144:ef7eb2e8f9f7 14 ==============================================================================
<> 144:ef7eb2e8f9f7 15 ##### GPIO Peripheral features #####
<> 144:ef7eb2e8f9f7 16 ==============================================================================
<> 144:ef7eb2e8f9f7 17 [..]
<> 144:ef7eb2e8f9f7 18 (+) Each port bit of the general-purpose I/O (GPIO) ports can be individually
<> 144:ef7eb2e8f9f7 19 configured by software in several modes:
<> 144:ef7eb2e8f9f7 20 (++) Input mode
<> 144:ef7eb2e8f9f7 21 (++) Analog mode
<> 144:ef7eb2e8f9f7 22 (++) Output mode
<> 144:ef7eb2e8f9f7 23 (++) Alternate function mode
<> 144:ef7eb2e8f9f7 24 (++) External interrupt/event lines
<> 144:ef7eb2e8f9f7 25
<> 144:ef7eb2e8f9f7 26 (+) During and just after reset, the alternate functions and external interrupt
<> 144:ef7eb2e8f9f7 27 lines are not active and the I/O ports are configured in input floating mode.
<> 144:ef7eb2e8f9f7 28
<> 144:ef7eb2e8f9f7 29 (+) All GPIO pins have weak internal pull-up and pull-down resistors, which can be
<> 144:ef7eb2e8f9f7 30 activated or not.
<> 144:ef7eb2e8f9f7 31
<> 144:ef7eb2e8f9f7 32 (+) In Output or Alternate mode, each IO can be configured on open-drain or push-pull
<> 144:ef7eb2e8f9f7 33 type and the IO speed can be selected depending on the VDD value.
<> 144:ef7eb2e8f9f7 34
<> 144:ef7eb2e8f9f7 35 (+) The microcontroller IO pins are connected to onboard peripherals/modules through a
<> 144:ef7eb2e8f9f7 36 multiplexer that allows only one peripheral alternate function (AF) connected
<> 144:ef7eb2e8f9f7 37 to an IO pin at a time. In this way, there can be no conflict between peripherals
<> 144:ef7eb2e8f9f7 38 sharing the same IO pin.
<> 144:ef7eb2e8f9f7 39
<> 144:ef7eb2e8f9f7 40 (+) All ports have external interrupt/event capability. To use external interrupt
<> 144:ef7eb2e8f9f7 41 lines, the port must be configured in input mode. All available GPIO pins are
<> 144:ef7eb2e8f9f7 42 connected to the 16 external interrupt/event lines from EXTI0 to EXTI15.
<> 144:ef7eb2e8f9f7 43
<> 144:ef7eb2e8f9f7 44 (+) The external interrupt/event controller consists of up to 28 edge detectors
<> 144:ef7eb2e8f9f7 45 (16 lines are connected to GPIO) for generating event/interrupt requests (each
<> 144:ef7eb2e8f9f7 46 input line can be independently configured to select the type (interrupt or event)
<> 144:ef7eb2e8f9f7 47 and the corresponding trigger event (rising or falling or both). Each line can
<> 144:ef7eb2e8f9f7 48 also be masked independently.
<> 144:ef7eb2e8f9f7 49
<> 144:ef7eb2e8f9f7 50 ##### How to use this driver #####
<> 144:ef7eb2e8f9f7 51 ==============================================================================
<> 144:ef7eb2e8f9f7 52 [..]
<> 144:ef7eb2e8f9f7 53 (#) Enable the GPIO AHB clock using the following function : __HAL_RCC_GPIOx_CLK_ENABLE().
<> 144:ef7eb2e8f9f7 54
<> 144:ef7eb2e8f9f7 55 (#) Configure the GPIO pin(s) using HAL_GPIO_Init().
<> 144:ef7eb2e8f9f7 56 (++) Configure the IO mode using "Mode" member from GPIO_InitTypeDef structure
<> 144:ef7eb2e8f9f7 57 (++) Activate Pull-up, Pull-down resistor using "Pull" member from GPIO_InitTypeDef
<> 144:ef7eb2e8f9f7 58 structure.
<> 144:ef7eb2e8f9f7 59 (++) In case of Output or alternate function mode selection: the speed is
<> 144:ef7eb2e8f9f7 60 configured through "Speed" member from GPIO_InitTypeDef structure.
<> 144:ef7eb2e8f9f7 61 (++) In alternate mode is selection, the alternate function connected to the IO
<> 144:ef7eb2e8f9f7 62 is configured through "Alternate" member from GPIO_InitTypeDef structure.
<> 144:ef7eb2e8f9f7 63 (++) Analog mode is required when a pin is to be used as ADC channel
<> 144:ef7eb2e8f9f7 64 or DAC output.
<> 144:ef7eb2e8f9f7 65 (++) In case of external interrupt/event selection the "Mode" member from
<> 144:ef7eb2e8f9f7 66 GPIO_InitTypeDef structure select the type (interrupt or event) and
<> 144:ef7eb2e8f9f7 67 the corresponding trigger event (rising or falling or both).
<> 144:ef7eb2e8f9f7 68
<> 144:ef7eb2e8f9f7 69 (#) In case of external interrupt/event mode selection, configure NVIC IRQ priority
<> 144:ef7eb2e8f9f7 70 mapped to the EXTI line using HAL_NVIC_SetPriority() and enable it using
<> 144:ef7eb2e8f9f7 71 HAL_NVIC_EnableIRQ().
<> 144:ef7eb2e8f9f7 72
<> 144:ef7eb2e8f9f7 73 (#) HAL_GPIO_DeInit allows to set register values to their reset value. It's also
<> 144:ef7eb2e8f9f7 74 recommended to use it to unconfigure pin which was used as an external interrupt
<> 144:ef7eb2e8f9f7 75 or in event mode. That's the only way to reset corresponding bit in EXTI & SYSCFG
<> 144:ef7eb2e8f9f7 76 registers.
<> 144:ef7eb2e8f9f7 77
<> 144:ef7eb2e8f9f7 78 (#) To get the level of a pin configured in input mode use HAL_GPIO_ReadPin().
<> 144:ef7eb2e8f9f7 79
<> 144:ef7eb2e8f9f7 80 (#) To set/reset the level of a pin configured in output mode use
<> 144:ef7eb2e8f9f7 81 HAL_GPIO_WritePin()/HAL_GPIO_TogglePin().
<> 144:ef7eb2e8f9f7 82
<> 144:ef7eb2e8f9f7 83 (#) To lock pin configuration until next reset use HAL_GPIO_LockPin().
<> 144:ef7eb2e8f9f7 84
<> 144:ef7eb2e8f9f7 85 (#) During and just after reset, the alternate functions are not
<> 144:ef7eb2e8f9f7 86 active and the GPIO pins are configured in input floating mode (except JTAG
<> 144:ef7eb2e8f9f7 87 pins).
<> 144:ef7eb2e8f9f7 88
<> 144:ef7eb2e8f9f7 89 (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose
<> 144:ef7eb2e8f9f7 90 (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has
<> 144:ef7eb2e8f9f7 91 priority over the GPIO function.
<> 144:ef7eb2e8f9f7 92
<> 144:ef7eb2e8f9f7 93 (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as
<> 144:ef7eb2e8f9f7 94 general purpose PF0 and PF1, respectively, when the HSE oscillator is off.
<> 144:ef7eb2e8f9f7 95 The HSE has priority over the GPIO function.
<> 144:ef7eb2e8f9f7 96
<> 144:ef7eb2e8f9f7 97 @endverbatim
<> 144:ef7eb2e8f9f7 98 ******************************************************************************
<> 144:ef7eb2e8f9f7 99 * @attention
<> 144:ef7eb2e8f9f7 100 *
<> 144:ef7eb2e8f9f7 101 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 102 *
<> 144:ef7eb2e8f9f7 103 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 104 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 105 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 106 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 107 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 108 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 109 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 110 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 111 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 112 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 113 *
<> 144:ef7eb2e8f9f7 114 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 115 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 116 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 117 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 118 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 119 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 120 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 121 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 122 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 123 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 124 *
<> 144:ef7eb2e8f9f7 125 ******************************************************************************
<> 144:ef7eb2e8f9f7 126 */
<> 144:ef7eb2e8f9f7 127
<> 144:ef7eb2e8f9f7 128 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 129 #include "stm32f0xx_hal.h"
<> 144:ef7eb2e8f9f7 130
<> 144:ef7eb2e8f9f7 131 /** @addtogroup STM32F0xx_HAL_Driver
<> 144:ef7eb2e8f9f7 132 * @{
<> 144:ef7eb2e8f9f7 133 */
<> 144:ef7eb2e8f9f7 134
<> 144:ef7eb2e8f9f7 135 /** @defgroup GPIO GPIO
<> 144:ef7eb2e8f9f7 136 * @brief GPIO HAL module driver
<> 144:ef7eb2e8f9f7 137 * @{
<> 144:ef7eb2e8f9f7 138 */
<> 144:ef7eb2e8f9f7 139
<> 144:ef7eb2e8f9f7 140 #ifdef HAL_GPIO_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 141
<> 144:ef7eb2e8f9f7 142 /* Private typedef -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 143 /* Private defines -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 144 /** @defgroup GPIO_Private_Defines GPIO Private Defines
<> 144:ef7eb2e8f9f7 145 * @{
<> 144:ef7eb2e8f9f7 146 */
<> 156:95d6b41a828b 147 #define GPIO_MODE (0x00000003U)
<> 156:95d6b41a828b 148 #define EXTI_MODE (0x10000000U)
<> 156:95d6b41a828b 149 #define GPIO_MODE_IT (0x00010000U)
<> 156:95d6b41a828b 150 #define GPIO_MODE_EVT (0x00020000U)
<> 156:95d6b41a828b 151 #define RISING_EDGE (0x00100000U)
<> 156:95d6b41a828b 152 #define FALLING_EDGE (0x00200000U)
<> 156:95d6b41a828b 153 #define GPIO_OUTPUT_TYPE (0x00000010U)
<> 144:ef7eb2e8f9f7 154
<> 156:95d6b41a828b 155 #define GPIO_NUMBER (16U)
<> 144:ef7eb2e8f9f7 156 /**
<> 144:ef7eb2e8f9f7 157 * @}
<> 144:ef7eb2e8f9f7 158 */
<> 144:ef7eb2e8f9f7 159
<> 144:ef7eb2e8f9f7 160 /* Private macros ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 161 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 162 /* Private function prototypes -----------------------------------------------*/
<> 144:ef7eb2e8f9f7 163 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 164
<> 144:ef7eb2e8f9f7 165 /** @defgroup GPIO_Exported_Functions GPIO Exported Functions
<> 144:ef7eb2e8f9f7 166 * @{
<> 144:ef7eb2e8f9f7 167 */
<> 144:ef7eb2e8f9f7 168
<> 144:ef7eb2e8f9f7 169 /** @defgroup GPIO_Exported_Functions_Group1 Initialization/de-initialization functions
<> 144:ef7eb2e8f9f7 170 * @brief Initialization and Configuration functions
<> 144:ef7eb2e8f9f7 171 *
<> 144:ef7eb2e8f9f7 172 @verbatim
<> 144:ef7eb2e8f9f7 173 ===============================================================================
<> 144:ef7eb2e8f9f7 174 ##### Initialization and de-initialization functions #####
<> 144:ef7eb2e8f9f7 175 ===============================================================================
<> 144:ef7eb2e8f9f7 176
<> 144:ef7eb2e8f9f7 177 @endverbatim
<> 144:ef7eb2e8f9f7 178 * @{
<> 144:ef7eb2e8f9f7 179 */
<> 144:ef7eb2e8f9f7 180
<> 144:ef7eb2e8f9f7 181 /**
<> 144:ef7eb2e8f9f7 182 * @brief Initialize the GPIOx peripheral according to the specified parameters in the GPIO_Init.
<> 144:ef7eb2e8f9f7 183 * @param GPIOx: where x can be (A..F) to select the GPIO peripheral for STM32F0 family
<> 144:ef7eb2e8f9f7 184 * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
<> 144:ef7eb2e8f9f7 185 * the configuration information for the specified GPIO peripheral.
<> 144:ef7eb2e8f9f7 186 * @retval None
<> 144:ef7eb2e8f9f7 187 */
<> 144:ef7eb2e8f9f7 188 void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
<> 144:ef7eb2e8f9f7 189 {
<> 156:95d6b41a828b 190 uint32_t position = 0x00U;
<> 156:95d6b41a828b 191 uint32_t iocurrent = 0x00U;
<> 156:95d6b41a828b 192 uint32_t temp = 0x00U;
<> 144:ef7eb2e8f9f7 193
<> 144:ef7eb2e8f9f7 194 /* Check the parameters */
<> 144:ef7eb2e8f9f7 195 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
<> 144:ef7eb2e8f9f7 196 assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
<> 144:ef7eb2e8f9f7 197 assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
<> 144:ef7eb2e8f9f7 198 assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
<> 144:ef7eb2e8f9f7 199
<> 144:ef7eb2e8f9f7 200 /* Configure the port pins */
<> 144:ef7eb2e8f9f7 201 while (((GPIO_Init->Pin) >> position) != RESET)
<> 144:ef7eb2e8f9f7 202 {
<> 144:ef7eb2e8f9f7 203 /* Get current io position */
<> 144:ef7eb2e8f9f7 204 iocurrent = (GPIO_Init->Pin) & (1U << position);
<> 144:ef7eb2e8f9f7 205
<> 144:ef7eb2e8f9f7 206 if(iocurrent)
<> 144:ef7eb2e8f9f7 207 {
<> 144:ef7eb2e8f9f7 208 /*--------------------- GPIO Mode Configuration ------------------------*/
<> 144:ef7eb2e8f9f7 209 /* In case of Alternate function mode selection */
<> 144:ef7eb2e8f9f7 210 if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
<> 144:ef7eb2e8f9f7 211 {
<> 144:ef7eb2e8f9f7 212 /* Check the Alternate function parameters */
<> 144:ef7eb2e8f9f7 213 assert_param(IS_GPIO_AF_INSTANCE(GPIOx));
<> 144:ef7eb2e8f9f7 214 assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
<> 144:ef7eb2e8f9f7 215
<> 144:ef7eb2e8f9f7 216 /* Configure Alternate function mapped with the current IO */
<> 144:ef7eb2e8f9f7 217 temp = GPIOx->AFR[position >> 3];
<> 156:95d6b41a828b 218 CLEAR_BIT(temp, 0xFU << ((uint32_t)(position & 0x07U) * 4U)) ;
<> 156:95d6b41a828b 219 SET_BIT(temp, (uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4U));
<> 156:95d6b41a828b 220 GPIOx->AFR[position >> 3U] = temp;
<> 144:ef7eb2e8f9f7 221 }
<> 144:ef7eb2e8f9f7 222
<> 144:ef7eb2e8f9f7 223 /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
<> 144:ef7eb2e8f9f7 224 temp = GPIOx->MODER;
<> 156:95d6b41a828b 225 CLEAR_BIT(temp, GPIO_MODER_MODER0 << (position * 2U));
<> 156:95d6b41a828b 226 SET_BIT(temp, (GPIO_Init->Mode & GPIO_MODE) << (position * 2U));
<> 144:ef7eb2e8f9f7 227 GPIOx->MODER = temp;
<> 144:ef7eb2e8f9f7 228
<> 144:ef7eb2e8f9f7 229 /* In case of Output or Alternate function mode selection */
<> 144:ef7eb2e8f9f7 230 if ((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
<> 144:ef7eb2e8f9f7 231 (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
<> 144:ef7eb2e8f9f7 232 {
<> 144:ef7eb2e8f9f7 233 /* Check the Speed parameter */
<> 144:ef7eb2e8f9f7 234 assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
<> 144:ef7eb2e8f9f7 235 /* Configure the IO Speed */
<> 144:ef7eb2e8f9f7 236 temp = GPIOx->OSPEEDR;
<> 156:95d6b41a828b 237 CLEAR_BIT(temp, GPIO_OSPEEDER_OSPEEDR0 << (position * 2U));
<> 156:95d6b41a828b 238 SET_BIT(temp, GPIO_Init->Speed << (position * 2U));
<> 144:ef7eb2e8f9f7 239 GPIOx->OSPEEDR = temp;
<> 144:ef7eb2e8f9f7 240
<> 144:ef7eb2e8f9f7 241 /* Configure the IO Output Type */
<> 144:ef7eb2e8f9f7 242 temp = GPIOx->OTYPER;
<> 144:ef7eb2e8f9f7 243 CLEAR_BIT(temp, GPIO_OTYPER_OT_0 << position) ;
<> 156:95d6b41a828b 244 SET_BIT(temp, ((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4U) << position);
<> 144:ef7eb2e8f9f7 245 GPIOx->OTYPER = temp;
<> 144:ef7eb2e8f9f7 246 }
<> 144:ef7eb2e8f9f7 247
<> 144:ef7eb2e8f9f7 248 /* Activate the Pull-up or Pull down resistor for the current IO */
<> 144:ef7eb2e8f9f7 249 temp = GPIOx->PUPDR;
<> 156:95d6b41a828b 250 CLEAR_BIT(temp, GPIO_PUPDR_PUPDR0 << (position * 2U));
<> 156:95d6b41a828b 251 SET_BIT(temp, (GPIO_Init->Pull) << (position * 2U));
<> 144:ef7eb2e8f9f7 252 GPIOx->PUPDR = temp;
<> 144:ef7eb2e8f9f7 253
<> 144:ef7eb2e8f9f7 254 /*--------------------- EXTI Mode Configuration ------------------------*/
<> 144:ef7eb2e8f9f7 255 /* Configure the External Interrupt or event for the current IO */
<> 144:ef7eb2e8f9f7 256 if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
<> 144:ef7eb2e8f9f7 257 {
<> 144:ef7eb2e8f9f7 258 /* Enable SYSCFG Clock */
<> 144:ef7eb2e8f9f7 259 __HAL_RCC_SYSCFG_CLK_ENABLE();
<> 144:ef7eb2e8f9f7 260
<> 144:ef7eb2e8f9f7 261 temp = SYSCFG->EXTICR[position >> 2];
<> 156:95d6b41a828b 262 CLEAR_BIT(temp, (0x0FU) << (4U * (position & 0x03U)));
<> 156:95d6b41a828b 263 SET_BIT(temp, (GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
<> 144:ef7eb2e8f9f7 264 SYSCFG->EXTICR[position >> 2] = temp;
<> 144:ef7eb2e8f9f7 265
<> 144:ef7eb2e8f9f7 266 /* Clear EXTI line configuration */
<> 144:ef7eb2e8f9f7 267 temp = EXTI->IMR;
<> 144:ef7eb2e8f9f7 268 CLEAR_BIT(temp, (uint32_t)iocurrent);
<> 144:ef7eb2e8f9f7 269 if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
<> 144:ef7eb2e8f9f7 270 {
<> 144:ef7eb2e8f9f7 271 SET_BIT(temp, iocurrent);
<> 144:ef7eb2e8f9f7 272 }
<> 144:ef7eb2e8f9f7 273 EXTI->IMR = temp;
<> 144:ef7eb2e8f9f7 274
<> 144:ef7eb2e8f9f7 275 temp = EXTI->EMR;
<> 144:ef7eb2e8f9f7 276 CLEAR_BIT(temp, (uint32_t)iocurrent);
<> 144:ef7eb2e8f9f7 277 if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
<> 144:ef7eb2e8f9f7 278 {
<> 144:ef7eb2e8f9f7 279 SET_BIT(temp, iocurrent);
<> 144:ef7eb2e8f9f7 280 }
<> 144:ef7eb2e8f9f7 281 EXTI->EMR = temp;
<> 144:ef7eb2e8f9f7 282
<> 144:ef7eb2e8f9f7 283 /* Clear Rising Falling edge configuration */
<> 144:ef7eb2e8f9f7 284 temp = EXTI->RTSR;
<> 144:ef7eb2e8f9f7 285 CLEAR_BIT(temp, (uint32_t)iocurrent);
<> 144:ef7eb2e8f9f7 286 if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
<> 144:ef7eb2e8f9f7 287 {
<> 144:ef7eb2e8f9f7 288 SET_BIT(temp, iocurrent);
<> 144:ef7eb2e8f9f7 289 }
<> 144:ef7eb2e8f9f7 290 EXTI->RTSR = temp;
<> 144:ef7eb2e8f9f7 291
<> 144:ef7eb2e8f9f7 292 temp = EXTI->FTSR;
<> 144:ef7eb2e8f9f7 293 CLEAR_BIT(temp, (uint32_t)iocurrent);
<> 144:ef7eb2e8f9f7 294 if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
<> 144:ef7eb2e8f9f7 295 {
<> 144:ef7eb2e8f9f7 296 SET_BIT(temp, iocurrent);
<> 144:ef7eb2e8f9f7 297 }
<> 144:ef7eb2e8f9f7 298 EXTI->FTSR = temp;
<> 144:ef7eb2e8f9f7 299 }
<> 144:ef7eb2e8f9f7 300 }
<> 144:ef7eb2e8f9f7 301
<> 144:ef7eb2e8f9f7 302 position++;
<> 144:ef7eb2e8f9f7 303 }
<> 144:ef7eb2e8f9f7 304 }
<> 144:ef7eb2e8f9f7 305
<> 144:ef7eb2e8f9f7 306 /**
<> 144:ef7eb2e8f9f7 307 * @brief De-initialize the GPIOx peripheral registers to their default reset values.
<> 144:ef7eb2e8f9f7 308 * @param GPIOx: where x can be (A..F) to select the GPIO peripheral for STM32F0 family
<> 144:ef7eb2e8f9f7 309 * @param GPIO_Pin: specifies the port bit to be written.
<> 144:ef7eb2e8f9f7 310 * This parameter can be one of GPIO_PIN_x where x can be (0..15).
<> 144:ef7eb2e8f9f7 311 * @retval None
<> 144:ef7eb2e8f9f7 312 */
<> 144:ef7eb2e8f9f7 313 void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin)
<> 144:ef7eb2e8f9f7 314 {
<> 156:95d6b41a828b 315 uint32_t position = 0x00U;
<> 156:95d6b41a828b 316 uint32_t iocurrent = 0x00U;
<> 156:95d6b41a828b 317 uint32_t tmp = 0x00U;
<> 144:ef7eb2e8f9f7 318
<> 144:ef7eb2e8f9f7 319 /* Check the parameters */
<> 144:ef7eb2e8f9f7 320 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
<> 144:ef7eb2e8f9f7 321 assert_param(IS_GPIO_PIN(GPIO_Pin));
<> 144:ef7eb2e8f9f7 322
<> 144:ef7eb2e8f9f7 323 /* Configure the port pins */
<> 144:ef7eb2e8f9f7 324 while ((GPIO_Pin >> position) != RESET)
<> 144:ef7eb2e8f9f7 325 {
<> 144:ef7eb2e8f9f7 326 /* Get current io position */
<> 144:ef7eb2e8f9f7 327 iocurrent = GPIO_Pin & (1U << position);
<> 144:ef7eb2e8f9f7 328
<> 144:ef7eb2e8f9f7 329 if (iocurrent)
<> 144:ef7eb2e8f9f7 330 {
<> 144:ef7eb2e8f9f7 331 /*------------------------- GPIO Mode Configuration --------------------*/
<> 144:ef7eb2e8f9f7 332 /* Configure IO Direction in Input Floting Mode */
<> 156:95d6b41a828b 333 CLEAR_BIT(GPIOx->MODER, GPIO_MODER_MODER0 << (position * 2U));
<> 144:ef7eb2e8f9f7 334
<> 144:ef7eb2e8f9f7 335 /* Configure the default Alternate Function in current IO */
<> 156:95d6b41a828b 336 CLEAR_BIT(GPIOx->AFR[position >> 3U], 0xFU << ((uint32_t)(position & 0x07U) * 4U)) ;
<> 144:ef7eb2e8f9f7 337
<> 144:ef7eb2e8f9f7 338 /* Configure the default value for IO Speed */
<> 156:95d6b41a828b 339 CLEAR_BIT(GPIOx->OSPEEDR, GPIO_OSPEEDER_OSPEEDR0 << (position * 2U));
<> 144:ef7eb2e8f9f7 340
<> 144:ef7eb2e8f9f7 341 /* Configure the default value IO Output Type */
<> 144:ef7eb2e8f9f7 342 CLEAR_BIT(GPIOx->OTYPER, GPIO_OTYPER_OT_0 << position) ;
<> 144:ef7eb2e8f9f7 343
<> 144:ef7eb2e8f9f7 344 /* Deactivate the Pull-up oand Pull-down resistor for the current IO */
<> 156:95d6b41a828b 345 CLEAR_BIT(GPIOx->PUPDR, GPIO_PUPDR_PUPDR0 << (position * 2U));
<> 144:ef7eb2e8f9f7 346
<> 144:ef7eb2e8f9f7 347 /*------------------------- EXTI Mode Configuration --------------------*/
<> 144:ef7eb2e8f9f7 348 /* Clear the External Interrupt or Event for the current IO */
<> 144:ef7eb2e8f9f7 349
<> 156:95d6b41a828b 350 tmp = SYSCFG->EXTICR[position >> 2U];
<> 156:95d6b41a828b 351 tmp &= ((0x0FU) << (4U * (position & 0x03U)));
<> 156:95d6b41a828b 352 if(tmp == (GPIO_GET_INDEX(GPIOx) << (4U * (position & 0x03U))))
<> 144:ef7eb2e8f9f7 353 {
<> 156:95d6b41a828b 354 tmp = (0x0FU) << (4U * (position & 0x03U));
<> 156:95d6b41a828b 355 CLEAR_BIT(SYSCFG->EXTICR[position >> 2U], tmp);
<> 144:ef7eb2e8f9f7 356
<> 144:ef7eb2e8f9f7 357 /* Clear EXTI line configuration */
<> 144:ef7eb2e8f9f7 358 CLEAR_BIT(EXTI->IMR, (uint32_t)iocurrent);
<> 144:ef7eb2e8f9f7 359 CLEAR_BIT(EXTI->EMR, (uint32_t)iocurrent);
<> 144:ef7eb2e8f9f7 360
<> 144:ef7eb2e8f9f7 361 /* Clear Rising Falling edge configuration */
<> 144:ef7eb2e8f9f7 362 CLEAR_BIT(EXTI->RTSR, (uint32_t)iocurrent);
<> 144:ef7eb2e8f9f7 363 CLEAR_BIT(EXTI->FTSR, (uint32_t)iocurrent);
<> 144:ef7eb2e8f9f7 364 }
<> 144:ef7eb2e8f9f7 365 }
<> 144:ef7eb2e8f9f7 366
<> 144:ef7eb2e8f9f7 367 position++;
<> 144:ef7eb2e8f9f7 368 }
<> 144:ef7eb2e8f9f7 369 }
<> 144:ef7eb2e8f9f7 370
<> 144:ef7eb2e8f9f7 371 /**
<> 144:ef7eb2e8f9f7 372 * @}
<> 144:ef7eb2e8f9f7 373 */
<> 144:ef7eb2e8f9f7 374
<> 144:ef7eb2e8f9f7 375 /** @defgroup GPIO_Exported_Functions_Group2 IO operation functions
<> 144:ef7eb2e8f9f7 376 * @brief GPIO Read, Write, Toggle, Lock and EXTI management functions.
<> 144:ef7eb2e8f9f7 377 *
<> 144:ef7eb2e8f9f7 378 @verbatim
<> 144:ef7eb2e8f9f7 379 ===============================================================================
<> 144:ef7eb2e8f9f7 380 ##### IO operation functions #####
<> 144:ef7eb2e8f9f7 381 ===============================================================================
<> 144:ef7eb2e8f9f7 382
<> 144:ef7eb2e8f9f7 383 @endverbatim
<> 144:ef7eb2e8f9f7 384 * @{
<> 144:ef7eb2e8f9f7 385 */
<> 144:ef7eb2e8f9f7 386
<> 144:ef7eb2e8f9f7 387 /**
<> 144:ef7eb2e8f9f7 388 * @brief Read the specified input port pin.
<> 144:ef7eb2e8f9f7 389 * @param GPIOx: where x can be (A..F) to select the GPIO peripheral for STM32F0 family
<> 144:ef7eb2e8f9f7 390 * @param GPIO_Pin: specifies the port bit to read.
<> 144:ef7eb2e8f9f7 391 * This parameter can be GPIO_PIN_x where x can be (0..15).
<> 144:ef7eb2e8f9f7 392 * @retval The input port pin value.
<> 144:ef7eb2e8f9f7 393 */
<> 144:ef7eb2e8f9f7 394 GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
<> 144:ef7eb2e8f9f7 395 {
<> 144:ef7eb2e8f9f7 396 GPIO_PinState bitstatus;
<> 144:ef7eb2e8f9f7 397
<> 144:ef7eb2e8f9f7 398 /* Check the parameters */
<> 144:ef7eb2e8f9f7 399 assert_param(IS_GPIO_PIN(GPIO_Pin));
<> 144:ef7eb2e8f9f7 400
<> 144:ef7eb2e8f9f7 401 if ((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
<> 144:ef7eb2e8f9f7 402 {
<> 144:ef7eb2e8f9f7 403 bitstatus = GPIO_PIN_SET;
<> 144:ef7eb2e8f9f7 404 }
<> 144:ef7eb2e8f9f7 405 else
<> 144:ef7eb2e8f9f7 406 {
<> 144:ef7eb2e8f9f7 407 bitstatus = GPIO_PIN_RESET;
<> 144:ef7eb2e8f9f7 408 }
<> 144:ef7eb2e8f9f7 409 return bitstatus;
<> 144:ef7eb2e8f9f7 410 }
<> 144:ef7eb2e8f9f7 411
<> 144:ef7eb2e8f9f7 412 /**
<> 144:ef7eb2e8f9f7 413 * @brief Set or clear the selected data port bit.
<> 144:ef7eb2e8f9f7 414 * @note This function uses GPIOx_BSRR and GPIOx_BRR registers to allow atomic read/modify
<> 144:ef7eb2e8f9f7 415 * accesses. In this way, there is no risk of an IRQ occurring between
<> 144:ef7eb2e8f9f7 416 * the read and the modify access.
<> 144:ef7eb2e8f9f7 417 *
<> 144:ef7eb2e8f9f7 418 * @param GPIOx: where x can be (A..H) to select the GPIO peripheral for STM32F0 family
<> 144:ef7eb2e8f9f7 419 * @param GPIO_Pin: specifies the port bit to be written.
<> 144:ef7eb2e8f9f7 420 * This parameter can be one of GPIO_PIN_x where x can be (0..15).
<> 144:ef7eb2e8f9f7 421 * @param PinState: specifies the value to be written to the selected bit.
<> 144:ef7eb2e8f9f7 422 * This parameter can be one of the GPIO_PinState enum values:
<> 144:ef7eb2e8f9f7 423 * @arg GPIO_PIN_RESET: to clear the port pin
<> 144:ef7eb2e8f9f7 424 * @arg GPIO_PIN_SET: to set the port pin
<> 144:ef7eb2e8f9f7 425 * @retval None
<> 144:ef7eb2e8f9f7 426 */
<> 144:ef7eb2e8f9f7 427 void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
<> 144:ef7eb2e8f9f7 428 {
<> 144:ef7eb2e8f9f7 429 /* Check the parameters */
<> 144:ef7eb2e8f9f7 430 assert_param(IS_GPIO_PIN(GPIO_Pin));
<> 144:ef7eb2e8f9f7 431 assert_param(IS_GPIO_PIN_ACTION(PinState));
<> 144:ef7eb2e8f9f7 432
<> 144:ef7eb2e8f9f7 433 if (PinState != GPIO_PIN_RESET)
<> 144:ef7eb2e8f9f7 434 {
<> 144:ef7eb2e8f9f7 435 GPIOx->BSRR = (uint32_t)GPIO_Pin;
<> 144:ef7eb2e8f9f7 436 }
<> 144:ef7eb2e8f9f7 437 else
<> 144:ef7eb2e8f9f7 438 {
<> 144:ef7eb2e8f9f7 439 GPIOx->BRR = (uint32_t)GPIO_Pin;
<> 144:ef7eb2e8f9f7 440 }
<> 144:ef7eb2e8f9f7 441 }
<> 144:ef7eb2e8f9f7 442
<> 144:ef7eb2e8f9f7 443 /**
<> 144:ef7eb2e8f9f7 444 * @brief Toggle the specified GPIO pin.
<> 144:ef7eb2e8f9f7 445 * @param GPIOx: where x can be (A..F) to select the GPIO peripheral for STM32F0 family
<> 144:ef7eb2e8f9f7 446 * @param GPIO_Pin: specifies the pin to be toggled.
<> 144:ef7eb2e8f9f7 447 * @retval None
<> 144:ef7eb2e8f9f7 448 */
<> 144:ef7eb2e8f9f7 449 void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
<> 144:ef7eb2e8f9f7 450 {
<> 144:ef7eb2e8f9f7 451 /* Check the parameters */
<> 144:ef7eb2e8f9f7 452 assert_param(IS_GPIO_PIN(GPIO_Pin));
<> 144:ef7eb2e8f9f7 453
<> 144:ef7eb2e8f9f7 454 GPIOx->ODR ^= GPIO_Pin;
<> 144:ef7eb2e8f9f7 455 }
<> 144:ef7eb2e8f9f7 456
<> 144:ef7eb2e8f9f7 457 /**
<> 144:ef7eb2e8f9f7 458 * @brief Locks GPIO Pins configuration registers.
<> 144:ef7eb2e8f9f7 459 * @note The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR,
<> 144:ef7eb2e8f9f7 460 * GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH.
<> 144:ef7eb2e8f9f7 461 * @note The configuration of the locked GPIO pins can no longer be modified
<> 144:ef7eb2e8f9f7 462 * until the next reset.
<> 144:ef7eb2e8f9f7 463 * @param GPIOx: where x can be (A..F) to select the GPIO peripheral for STM32F0 family
<> 144:ef7eb2e8f9f7 464 * @param GPIO_Pin: specifies the port bits to be locked.
<> 144:ef7eb2e8f9f7 465 * This parameter can be any combination of GPIO_Pin_x where x can be (0..15).
<> 144:ef7eb2e8f9f7 466 * @retval None
<> 144:ef7eb2e8f9f7 467 */
<> 144:ef7eb2e8f9f7 468 HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
<> 144:ef7eb2e8f9f7 469 {
<> 144:ef7eb2e8f9f7 470 __IO uint32_t tmp = GPIO_LCKR_LCKK;
<> 144:ef7eb2e8f9f7 471
<> 144:ef7eb2e8f9f7 472 /* Check the parameters */
<> 144:ef7eb2e8f9f7 473 assert_param(IS_GPIO_LOCK_INSTANCE(GPIOx));
<> 144:ef7eb2e8f9f7 474 assert_param(IS_GPIO_PIN(GPIO_Pin));
<> 144:ef7eb2e8f9f7 475
<> 144:ef7eb2e8f9f7 476 /* Apply lock key write sequence */
<> 144:ef7eb2e8f9f7 477 SET_BIT(tmp, GPIO_Pin);
<> 144:ef7eb2e8f9f7 478 /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
<> 144:ef7eb2e8f9f7 479 GPIOx->LCKR = tmp;
<> 144:ef7eb2e8f9f7 480 /* Reset LCKx bit(s): LCKK='0' + LCK[15-0] */
<> 144:ef7eb2e8f9f7 481 GPIOx->LCKR = GPIO_Pin;
<> 144:ef7eb2e8f9f7 482 /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
<> 144:ef7eb2e8f9f7 483 GPIOx->LCKR = tmp;
<> 144:ef7eb2e8f9f7 484 /* Read LCKK bit*/
<> 144:ef7eb2e8f9f7 485 tmp = GPIOx->LCKR;
<> 144:ef7eb2e8f9f7 486
<> 144:ef7eb2e8f9f7 487 if((GPIOx->LCKR & GPIO_LCKR_LCKK) != RESET)
<> 144:ef7eb2e8f9f7 488 {
<> 144:ef7eb2e8f9f7 489 return HAL_OK;
<> 144:ef7eb2e8f9f7 490 }
<> 144:ef7eb2e8f9f7 491 else
<> 144:ef7eb2e8f9f7 492 {
<> 144:ef7eb2e8f9f7 493 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 494 }
<> 144:ef7eb2e8f9f7 495 }
<> 144:ef7eb2e8f9f7 496
<> 144:ef7eb2e8f9f7 497 /**
<> 144:ef7eb2e8f9f7 498 * @brief Handle EXTI interrupt request.
<> 144:ef7eb2e8f9f7 499 * @param GPIO_Pin: Specifies the port pin connected to corresponding EXTI line.
<> 144:ef7eb2e8f9f7 500 * @retval None
<> 144:ef7eb2e8f9f7 501 */
<> 144:ef7eb2e8f9f7 502 void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin)
<> 144:ef7eb2e8f9f7 503 {
<> 144:ef7eb2e8f9f7 504 /* EXTI line interrupt detected */
<> 144:ef7eb2e8f9f7 505 if(__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != RESET)
<> 144:ef7eb2e8f9f7 506 {
<> 144:ef7eb2e8f9f7 507 __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin);
<> 144:ef7eb2e8f9f7 508 HAL_GPIO_EXTI_Callback(GPIO_Pin);
<> 144:ef7eb2e8f9f7 509 }
<> 144:ef7eb2e8f9f7 510 }
<> 144:ef7eb2e8f9f7 511
<> 144:ef7eb2e8f9f7 512 /**
<> 144:ef7eb2e8f9f7 513 * @brief EXTI line detection callback.
<> 144:ef7eb2e8f9f7 514 * @param GPIO_Pin: Specifies the port pin connected to corresponding EXTI line.
<> 144:ef7eb2e8f9f7 515 * @retval None
<> 144:ef7eb2e8f9f7 516 */
<> 144:ef7eb2e8f9f7 517 __weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
<> 144:ef7eb2e8f9f7 518 {
<> 144:ef7eb2e8f9f7 519 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 520 UNUSED(GPIO_Pin);
<> 144:ef7eb2e8f9f7 521
<> 144:ef7eb2e8f9f7 522 /* NOTE: This function should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 523 the HAL_GPIO_EXTI_Callback could be implemented in the user file
<> 144:ef7eb2e8f9f7 524 */
<> 144:ef7eb2e8f9f7 525 }
<> 144:ef7eb2e8f9f7 526
<> 144:ef7eb2e8f9f7 527 /**
<> 144:ef7eb2e8f9f7 528 * @}
<> 144:ef7eb2e8f9f7 529 */
<> 144:ef7eb2e8f9f7 530
<> 144:ef7eb2e8f9f7 531
<> 144:ef7eb2e8f9f7 532 /**
<> 144:ef7eb2e8f9f7 533 * @}
<> 144:ef7eb2e8f9f7 534 */
<> 144:ef7eb2e8f9f7 535
<> 144:ef7eb2e8f9f7 536 #endif /* HAL_GPIO_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 537 /**
<> 144:ef7eb2e8f9f7 538 * @}
<> 144:ef7eb2e8f9f7 539 */
<> 144:ef7eb2e8f9f7 540
<> 144:ef7eb2e8f9f7 541 /**
<> 144:ef7eb2e8f9f7 542 * @}
<> 144:ef7eb2e8f9f7 543 */
<> 144:ef7eb2e8f9f7 544
<> 144:ef7eb2e8f9f7 545 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/