mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_lcd.h@186:707f6e361f3e, 2018-06-22 (annotated)

Committer:
Anna Bridge
Date:
Fri Jun 22 16:45:37 2018 +0100
Revision:
186:707f6e361f3e
Parent:
151:5eaa88a5bcc7 
mbed-dev library. Release version 162

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32l0xx_hal_lcd.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @brief Header file of LCD Controller HAL module.
<> 144:ef7eb2e8f9f7 6 ******************************************************************************
<> 144:ef7eb2e8f9f7 7 * @attention
<> 144:ef7eb2e8f9f7 8 *
<> 144:ef7eb2e8f9f7 9 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 12 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 13 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 14 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 15 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 17 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 19 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 20 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 21 *
<> 144:ef7eb2e8f9f7 22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 32 *
<> 144:ef7eb2e8f9f7 33 ******************************************************************************
<> 144:ef7eb2e8f9f7 34 */
<> 144:ef7eb2e8f9f7 35
<> 144:ef7eb2e8f9f7 36
<> 144:ef7eb2e8f9f7 37 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 38 #ifndef __STM32L0xx_HAL_LCD_H
<> 144:ef7eb2e8f9f7 39 #define __STM32L0xx_HAL_LCD_H
<> 144:ef7eb2e8f9f7 40
<> 144:ef7eb2e8f9f7 41 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 42 extern "C" {
<> 144:ef7eb2e8f9f7 43 #endif
<> 144:ef7eb2e8f9f7 44
Anna Bridge 186:707f6e361f3e 45 #if defined (STM32L053xx) || defined (STM32L063xx) || defined (STM32L073xx) || defined (STM32L083xx)
<> 144:ef7eb2e8f9f7 46
<> 144:ef7eb2e8f9f7 47 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 48 #include "stm32l0xx_hal_def.h"
<> 144:ef7eb2e8f9f7 49
<> 144:ef7eb2e8f9f7 50 /** @addtogroup STM32L0xx_HAL_Driver
<> 144:ef7eb2e8f9f7 51 * @{
<> 144:ef7eb2e8f9f7 52 */
<> 144:ef7eb2e8f9f7 53
<> 144:ef7eb2e8f9f7 54 /** @defgroup LCD LCD
<> 144:ef7eb2e8f9f7 55 * @{
<> 144:ef7eb2e8f9f7 56 */
<> 144:ef7eb2e8f9f7 57
<> 144:ef7eb2e8f9f7 58 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 59 /** @defgroup LCD_Exported_Types LCD Exported Types
<> 144:ef7eb2e8f9f7 60 * @{
<> 144:ef7eb2e8f9f7 61 */
<> 144:ef7eb2e8f9f7 62
<> 144:ef7eb2e8f9f7 63 /**
<> 144:ef7eb2e8f9f7 64 * @brief LCD Init structure definition
<> 144:ef7eb2e8f9f7 65 */
<> 144:ef7eb2e8f9f7 66
<> 144:ef7eb2e8f9f7 67 typedef struct
<> 144:ef7eb2e8f9f7 68 {
<> 144:ef7eb2e8f9f7 69 uint32_t Prescaler; /*!< Configures the LCD Prescaler.
<> 144:ef7eb2e8f9f7 70 This parameter can be one value of @ref LCD_Prescaler */
<> 144:ef7eb2e8f9f7 71 uint32_t Divider; /*!< Configures the LCD Divider.
<> 144:ef7eb2e8f9f7 72 This parameter can be one value of @ref LCD_Divider */
<> 144:ef7eb2e8f9f7 73 uint32_t Duty; /*!< Configures the LCD Duty.
<> 144:ef7eb2e8f9f7 74 This parameter can be one value of @ref LCD_Duty */
<> 144:ef7eb2e8f9f7 75 uint32_t Bias; /*!< Configures the LCD Bias.
<> 144:ef7eb2e8f9f7 76 This parameter can be one value of @ref LCD_Bias */
<> 144:ef7eb2e8f9f7 77 uint32_t VoltageSource; /*!< Selects the LCD Voltage source.
<> 144:ef7eb2e8f9f7 78 This parameter can be one value of @ref LCD_Voltage_Source */
<> 144:ef7eb2e8f9f7 79 uint32_t Contrast; /*!< Configures the LCD Contrast.
<> 144:ef7eb2e8f9f7 80 This parameter can be one value of @ref LCD_Contrast */
<> 144:ef7eb2e8f9f7 81 uint32_t DeadTime; /*!< Configures the LCD Dead Time.
<> 144:ef7eb2e8f9f7 82 This parameter can be one value of @ref LCD_DeadTime */
<> 144:ef7eb2e8f9f7 83 uint32_t PulseOnDuration; /*!< Configures the LCD Pulse On Duration.
<> 144:ef7eb2e8f9f7 84 This parameter can be one value of @ref LCD_PulseOnDuration */
<> 144:ef7eb2e8f9f7 85 uint32_t HighDrive; /*!< Configures the LCD High Drive.
<> 144:ef7eb2e8f9f7 86 This parameter can be one value of @ref LCD_HighDrive */
<> 144:ef7eb2e8f9f7 87 uint32_t BlinkMode; /*!< Configures the LCD Blink Mode.
<> 144:ef7eb2e8f9f7 88 This parameter can be one value of @ref LCD_BlinkMode */
<> 144:ef7eb2e8f9f7 89 uint32_t BlinkFrequency; /*!< Configures the LCD Blink frequency.
<> 144:ef7eb2e8f9f7 90 This parameter can be one value of @ref LCD_BlinkFrequency */
<> 144:ef7eb2e8f9f7 91 uint32_t MuxSegment; /*!< Enable or disable mux segment.
<> 144:ef7eb2e8f9f7 92 This parameter can be one value of @ref LCD_MuxSegment */
<> 144:ef7eb2e8f9f7 93 }LCD_InitTypeDef;
<> 144:ef7eb2e8f9f7 94
<> 144:ef7eb2e8f9f7 95 /**
<> 144:ef7eb2e8f9f7 96 * @brief HAL LCD State structures definition
<> 144:ef7eb2e8f9f7 97 */
<> 144:ef7eb2e8f9f7 98 typedef enum
<> 144:ef7eb2e8f9f7 99 {
<> 151:5eaa88a5bcc7 100 HAL_LCD_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */
<> 151:5eaa88a5bcc7 101 HAL_LCD_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
<> 151:5eaa88a5bcc7 102 HAL_LCD_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */
<> 151:5eaa88a5bcc7 103 HAL_LCD_STATE_TIMEOUT = 0x03U, /*!< Timeout state */
<> 151:5eaa88a5bcc7 104 HAL_LCD_STATE_ERROR = 0x04U /*!< Error */
<> 144:ef7eb2e8f9f7 105 }HAL_LCD_StateTypeDef;
<> 144:ef7eb2e8f9f7 106
<> 144:ef7eb2e8f9f7 107 /**
<> 144:ef7eb2e8f9f7 108 * @brief UART handle Structure definition
<> 144:ef7eb2e8f9f7 109 */
<> 144:ef7eb2e8f9f7 110 typedef struct
<> 144:ef7eb2e8f9f7 111 {
<> 144:ef7eb2e8f9f7 112 LCD_TypeDef *Instance; /* LCD registers base address */
<> 144:ef7eb2e8f9f7 113
<> 144:ef7eb2e8f9f7 114 LCD_InitTypeDef Init; /* LCD communication parameters */
<> 144:ef7eb2e8f9f7 115
<> 144:ef7eb2e8f9f7 116 HAL_LockTypeDef Lock; /* Locking object */
<> 144:ef7eb2e8f9f7 117
<> 144:ef7eb2e8f9f7 118 __IO HAL_LCD_StateTypeDef State; /* LCD communication state */
<> 144:ef7eb2e8f9f7 119
<> 144:ef7eb2e8f9f7 120 __IO uint32_t ErrorCode; /* LCD Error code */
<> 144:ef7eb2e8f9f7 121
<> 144:ef7eb2e8f9f7 122 }LCD_HandleTypeDef;
<> 144:ef7eb2e8f9f7 123
<> 144:ef7eb2e8f9f7 124 /**
<> 144:ef7eb2e8f9f7 125 * @}
<> 144:ef7eb2e8f9f7 126 */
<> 144:ef7eb2e8f9f7 127
<> 144:ef7eb2e8f9f7 128 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 129
<> 144:ef7eb2e8f9f7 130 /** @defgroup LCD_Exported_Constants LCD Exported Constants
<> 144:ef7eb2e8f9f7 131 * @{
<> 144:ef7eb2e8f9f7 132 */
<> 144:ef7eb2e8f9f7 133
<> 144:ef7eb2e8f9f7 134 /** @defgroup LCD_ErrorCode LCD Error Code
<> 144:ef7eb2e8f9f7 135 * @{
<> 144:ef7eb2e8f9f7 136 */
<> 151:5eaa88a5bcc7 137 #define HAL_LCD_ERROR_NONE ((uint32_t)0x00U) /*!< No error */
<> 151:5eaa88a5bcc7 138 #define HAL_LCD_ERROR_FCRSF ((uint32_t)0x01U) /*!< Synchro flag timeout error */
<> 151:5eaa88a5bcc7 139 #define HAL_LCD_ERROR_UDR ((uint32_t)0x02U) /*!< Update display request flag timeout error */
<> 151:5eaa88a5bcc7 140 #define HAL_LCD_ERROR_UDD ((uint32_t)0x04U) /*!< Update display done flag timeout error */
<> 151:5eaa88a5bcc7 141 #define HAL_LCD_ERROR_ENS ((uint32_t)0x08U) /*!< LCD enabled status flag timeout error */
<> 151:5eaa88a5bcc7 142 #define HAL_LCD_ERROR_RDY ((uint32_t)0x10U) /*!< LCD Booster ready timeout error */
<> 144:ef7eb2e8f9f7 143 /**
<> 144:ef7eb2e8f9f7 144 * @}
<> 144:ef7eb2e8f9f7 145 */
<> 144:ef7eb2e8f9f7 146
<> 144:ef7eb2e8f9f7 147 /** @defgroup LCD_Prescaler LCD Prescaler
<> 144:ef7eb2e8f9f7 148 * @{
<> 144:ef7eb2e8f9f7 149 */
<> 144:ef7eb2e8f9f7 150
<> 151:5eaa88a5bcc7 151 #define LCD_PRESCALER_1 ((uint32_t)0x00000000U) /*!< CLKPS = LCDCLK */
<> 151:5eaa88a5bcc7 152 #define LCD_PRESCALER_2 ((uint32_t)0x00400000U) /*!< CLKPS = LCDCLK/2 */
<> 151:5eaa88a5bcc7 153 #define LCD_PRESCALER_4 ((uint32_t)0x00800000U) /*!< CLKPS = LCDCLK/4 */
<> 151:5eaa88a5bcc7 154 #define LCD_PRESCALER_8 ((uint32_t)0x00C00000U) /*!< CLKPS = LCDCLK/8 */
<> 151:5eaa88a5bcc7 155 #define LCD_PRESCALER_16 ((uint32_t)0x01000000U) /*!< CLKPS = LCDCLK/16 */
<> 151:5eaa88a5bcc7 156 #define LCD_PRESCALER_32 ((uint32_t)0x01400000U) /*!< CLKPS = LCDCLK/32 */
<> 151:5eaa88a5bcc7 157 #define LCD_PRESCALER_64 ((uint32_t)0x01800000U) /*!< CLKPS = LCDCLK/64 */
<> 151:5eaa88a5bcc7 158 #define LCD_PRESCALER_128 ((uint32_t)0x01C00000U) /*!< CLKPS = LCDCLK/128 */
<> 151:5eaa88a5bcc7 159 #define LCD_PRESCALER_256 ((uint32_t)0x02000000U) /*!< CLKPS = LCDCLK/256 */
<> 151:5eaa88a5bcc7 160 #define LCD_PRESCALER_512 ((uint32_t)0x02400000U) /*!< CLKPS = LCDCLK/512 */
<> 151:5eaa88a5bcc7 161 #define LCD_PRESCALER_1024 ((uint32_t)0x02800000U) /*!< CLKPS = LCDCLK/1024 */
<> 151:5eaa88a5bcc7 162 #define LCD_PRESCALER_2048 ((uint32_t)0x02C00000U) /*!< CLKPS = LCDCLK/2048 */
<> 151:5eaa88a5bcc7 163 #define LCD_PRESCALER_4096 ((uint32_t)0x03000000U) /*!< CLKPS = LCDCLK/4096 */
<> 151:5eaa88a5bcc7 164 #define LCD_PRESCALER_8192 ((uint32_t)0x03400000U) /*!< CLKPS = LCDCLK/8192 */
<> 151:5eaa88a5bcc7 165 #define LCD_PRESCALER_16384 ((uint32_t)0x03800000U) /*!< CLKPS = LCDCLK/16384 */
<> 144:ef7eb2e8f9f7 166 #define LCD_PRESCALER_32768 ((uint32_t)LCD_FCR_PS) /*!< CLKPS = LCDCLK/32768 */
<> 144:ef7eb2e8f9f7 167
<> 144:ef7eb2e8f9f7 168 #define IS_LCD_PRESCALER(__PRESCALER__) (((__PRESCALER__) == LCD_PRESCALER_1) || \
<> 144:ef7eb2e8f9f7 169 ((__PRESCALER__) == LCD_PRESCALER_2) || \
<> 144:ef7eb2e8f9f7 170 ((__PRESCALER__) == LCD_PRESCALER_4) || \
<> 144:ef7eb2e8f9f7 171 ((__PRESCALER__) == LCD_PRESCALER_8) || \
<> 144:ef7eb2e8f9f7 172 ((__PRESCALER__) == LCD_PRESCALER_16) || \
<> 144:ef7eb2e8f9f7 173 ((__PRESCALER__) == LCD_PRESCALER_32) || \
<> 144:ef7eb2e8f9f7 174 ((__PRESCALER__) == LCD_PRESCALER_64) || \
<> 144:ef7eb2e8f9f7 175 ((__PRESCALER__) == LCD_PRESCALER_128) || \
<> 144:ef7eb2e8f9f7 176 ((__PRESCALER__) == LCD_PRESCALER_256) || \
<> 144:ef7eb2e8f9f7 177 ((__PRESCALER__) == LCD_PRESCALER_512) || \
<> 144:ef7eb2e8f9f7 178 ((__PRESCALER__) == LCD_PRESCALER_1024) || \
<> 144:ef7eb2e8f9f7 179 ((__PRESCALER__) == LCD_PRESCALER_2048) || \
<> 144:ef7eb2e8f9f7 180 ((__PRESCALER__) == LCD_PRESCALER_4096) || \
<> 144:ef7eb2e8f9f7 181 ((__PRESCALER__) == LCD_PRESCALER_8192) || \
<> 144:ef7eb2e8f9f7 182 ((__PRESCALER__) == LCD_PRESCALER_16384) || \
<> 144:ef7eb2e8f9f7 183 ((__PRESCALER__) == LCD_PRESCALER_32768))
<> 144:ef7eb2e8f9f7 184
<> 144:ef7eb2e8f9f7 185 /**
<> 144:ef7eb2e8f9f7 186 * @}
<> 144:ef7eb2e8f9f7 187 */
<> 144:ef7eb2e8f9f7 188
<> 144:ef7eb2e8f9f7 189 /** @defgroup LCD_Divider LCD Divider
<> 144:ef7eb2e8f9f7 190 * @{
<> 144:ef7eb2e8f9f7 191 */
<> 144:ef7eb2e8f9f7 192
<> 151:5eaa88a5bcc7 193 #define LCD_DIVIDER_16 ((uint32_t)0x00000000U) /*!< LCD frequency = CLKPS/16 */
<> 151:5eaa88a5bcc7 194 #define LCD_DIVIDER_17 ((uint32_t)0x00040000U) /*!< LCD frequency = CLKPS/17 */
<> 151:5eaa88a5bcc7 195 #define LCD_DIVIDER_18 ((uint32_t)0x00080000U) /*!< LCD frequency = CLKPS/18 */
<> 151:5eaa88a5bcc7 196 #define LCD_DIVIDER_19 ((uint32_t)0x000C0000U) /*!< LCD frequency = CLKPS/19 */
<> 151:5eaa88a5bcc7 197 #define LCD_DIVIDER_20 ((uint32_t)0x00100000U) /*!< LCD frequency = CLKPS/20 */
<> 151:5eaa88a5bcc7 198 #define LCD_DIVIDER_21 ((uint32_t)0x00140000U) /*!< LCD frequency = CLKPS/21 */
<> 151:5eaa88a5bcc7 199 #define LCD_DIVIDER_22 ((uint32_t)0x00180000U) /*!< LCD frequency = CLKPS/22 */
<> 151:5eaa88a5bcc7 200 #define LCD_DIVIDER_23 ((uint32_t)0x001C0000U) /*!< LCD frequency = CLKPS/23 */
<> 151:5eaa88a5bcc7 201 #define LCD_DIVIDER_24 ((uint32_t)0x00200000U) /*!< LCD frequency = CLKPS/24 */
<> 151:5eaa88a5bcc7 202 #define LCD_DIVIDER_25 ((uint32_t)0x00240000U) /*!< LCD frequency = CLKPS/25 */
<> 151:5eaa88a5bcc7 203 #define LCD_DIVIDER_26 ((uint32_t)0x00280000U) /*!< LCD frequency = CLKPS/26 */
<> 151:5eaa88a5bcc7 204 #define LCD_DIVIDER_27 ((uint32_t)0x002C0000U) /*!< LCD frequency = CLKPS/27 */
<> 151:5eaa88a5bcc7 205 #define LCD_DIVIDER_28 ((uint32_t)0x00300000U) /*!< LCD frequency = CLKPS/28 */
<> 151:5eaa88a5bcc7 206 #define LCD_DIVIDER_29 ((uint32_t)0x00340000U) /*!< LCD frequency = CLKPS/29 */
<> 151:5eaa88a5bcc7 207 #define LCD_DIVIDER_30 ((uint32_t)0x00380000U) /*!< LCD frequency = CLKPS/30 */
<> 144:ef7eb2e8f9f7 208 #define LCD_DIVIDER_31 ((uint32_t)LCD_FCR_DIV) /*!< LCD frequency = CLKPS/31 */
<> 144:ef7eb2e8f9f7 209
<> 144:ef7eb2e8f9f7 210 #define IS_LCD_DIVIDER(__DIVIDER__) (((__DIVIDER__) == LCD_DIVIDER_16) || \
<> 144:ef7eb2e8f9f7 211 ((__DIVIDER__) == LCD_DIVIDER_17) || \
<> 144:ef7eb2e8f9f7 212 ((__DIVIDER__) == LCD_DIVIDER_18) || \
<> 144:ef7eb2e8f9f7 213 ((__DIVIDER__) == LCD_DIVIDER_19) || \
<> 144:ef7eb2e8f9f7 214 ((__DIVIDER__) == LCD_DIVIDER_20) || \
<> 144:ef7eb2e8f9f7 215 ((__DIVIDER__) == LCD_DIVIDER_21) || \
<> 144:ef7eb2e8f9f7 216 ((__DIVIDER__) == LCD_DIVIDER_22) || \
<> 144:ef7eb2e8f9f7 217 ((__DIVIDER__) == LCD_DIVIDER_23) || \
<> 144:ef7eb2e8f9f7 218 ((__DIVIDER__) == LCD_DIVIDER_24) || \
<> 144:ef7eb2e8f9f7 219 ((__DIVIDER__) == LCD_DIVIDER_25) || \
<> 144:ef7eb2e8f9f7 220 ((__DIVIDER__) == LCD_DIVIDER_26) || \
<> 144:ef7eb2e8f9f7 221 ((__DIVIDER__) == LCD_DIVIDER_27) || \
<> 144:ef7eb2e8f9f7 222 ((__DIVIDER__) == LCD_DIVIDER_28) || \
<> 144:ef7eb2e8f9f7 223 ((__DIVIDER__) == LCD_DIVIDER_29) || \
<> 144:ef7eb2e8f9f7 224 ((__DIVIDER__) == LCD_DIVIDER_30) || \
<> 144:ef7eb2e8f9f7 225 ((__DIVIDER__) == LCD_DIVIDER_31))
<> 144:ef7eb2e8f9f7 226
<> 144:ef7eb2e8f9f7 227 /**
<> 144:ef7eb2e8f9f7 228 * @}
<> 144:ef7eb2e8f9f7 229 */
<> 144:ef7eb2e8f9f7 230
<> 144:ef7eb2e8f9f7 231
<> 144:ef7eb2e8f9f7 232 /** @defgroup LCD_Duty LCD Duty
<> 144:ef7eb2e8f9f7 233 * @{
<> 144:ef7eb2e8f9f7 234 */
<> 144:ef7eb2e8f9f7 235
<> 151:5eaa88a5bcc7 236 #define LCD_DUTY_STATIC ((uint32_t)0x00000000U) /*!< Static duty */
<> 144:ef7eb2e8f9f7 237 #define LCD_DUTY_1_2 (LCD_CR_DUTY_0) /*!< 1/2 duty */
<> 144:ef7eb2e8f9f7 238 #define LCD_DUTY_1_3 (LCD_CR_DUTY_1) /*!< 1/3 duty */
<> 144:ef7eb2e8f9f7 239 #define LCD_DUTY_1_4 ((LCD_CR_DUTY_1 | LCD_CR_DUTY_0)) /*!< 1/4 duty */
<> 144:ef7eb2e8f9f7 240 #define LCD_DUTY_1_8 (LCD_CR_DUTY_2) /*!< 1/8 duty */
<> 144:ef7eb2e8f9f7 241
<> 144:ef7eb2e8f9f7 242 #define IS_LCD_DUTY(__DUTY__) (((__DUTY__) == LCD_DUTY_STATIC) || \
<> 144:ef7eb2e8f9f7 243 ((__DUTY__) == LCD_DUTY_1_2) || \
<> 144:ef7eb2e8f9f7 244 ((__DUTY__) == LCD_DUTY_1_3) || \
<> 144:ef7eb2e8f9f7 245 ((__DUTY__) == LCD_DUTY_1_4) || \
<> 144:ef7eb2e8f9f7 246 ((__DUTY__) == LCD_DUTY_1_8))
<> 144:ef7eb2e8f9f7 247
<> 144:ef7eb2e8f9f7 248 /**
<> 144:ef7eb2e8f9f7 249 * @}
<> 144:ef7eb2e8f9f7 250 */
<> 144:ef7eb2e8f9f7 251
<> 144:ef7eb2e8f9f7 252
<> 144:ef7eb2e8f9f7 253 /** @defgroup LCD_Bias LCD Bias
<> 144:ef7eb2e8f9f7 254 * @{
<> 144:ef7eb2e8f9f7 255 */
<> 144:ef7eb2e8f9f7 256
<> 151:5eaa88a5bcc7 257 #define LCD_BIAS_1_4 ((uint32_t)0x00000000U) /*!< 1/4 Bias */
<> 144:ef7eb2e8f9f7 258 #define LCD_BIAS_1_2 LCD_CR_BIAS_0 /*!< 1/2 Bias */
<> 144:ef7eb2e8f9f7 259 #define LCD_BIAS_1_3 LCD_CR_BIAS_1 /*!< 1/3 Bias */
<> 144:ef7eb2e8f9f7 260
<> 144:ef7eb2e8f9f7 261 #define IS_LCD_BIAS(__BIAS__) (((__BIAS__) == LCD_BIAS_1_4) || \
<> 144:ef7eb2e8f9f7 262 ((__BIAS__) == LCD_BIAS_1_2) || \
<> 144:ef7eb2e8f9f7 263 ((__BIAS__) == LCD_BIAS_1_3))
<> 144:ef7eb2e8f9f7 264 /**
<> 144:ef7eb2e8f9f7 265 * @}
<> 144:ef7eb2e8f9f7 266 */
<> 144:ef7eb2e8f9f7 267
<> 144:ef7eb2e8f9f7 268 /** @defgroup LCD_Voltage_Source LCD Voltage Source
<> 144:ef7eb2e8f9f7 269 * @{
<> 144:ef7eb2e8f9f7 270 */
<> 144:ef7eb2e8f9f7 271
<> 151:5eaa88a5bcc7 272 #define LCD_VOLTAGESOURCE_INTERNAL ((uint32_t)0x00000000U) /*!< Internal voltage source for the LCD */
<> 144:ef7eb2e8f9f7 273 #define LCD_VOLTAGESOURCE_EXTERNAL LCD_CR_VSEL /*!< External voltage source for the LCD */
<> 144:ef7eb2e8f9f7 274
<> 144:ef7eb2e8f9f7 275 #define IS_LCD_VOLTAGE_SOURCE(SOURCE) (((SOURCE) == LCD_VOLTAGESOURCE_INTERNAL) || \
<> 144:ef7eb2e8f9f7 276 ((SOURCE) == LCD_VOLTAGESOURCE_EXTERNAL))
<> 144:ef7eb2e8f9f7 277
<> 144:ef7eb2e8f9f7 278 /**
<> 144:ef7eb2e8f9f7 279 * @}
<> 144:ef7eb2e8f9f7 280 */
<> 144:ef7eb2e8f9f7 281
<> 144:ef7eb2e8f9f7 282 /** @defgroup LCD_Interrupts LCD Interrupts
<> 144:ef7eb2e8f9f7 283 * @{
<> 144:ef7eb2e8f9f7 284 */
<> 144:ef7eb2e8f9f7 285 #define LCD_IT_SOF LCD_FCR_SOFIE
<> 144:ef7eb2e8f9f7 286 #define LCD_IT_UDD LCD_FCR_UDDIE
<> 144:ef7eb2e8f9f7 287
<> 144:ef7eb2e8f9f7 288 /**
<> 144:ef7eb2e8f9f7 289 * @}
<> 144:ef7eb2e8f9f7 290 */
<> 144:ef7eb2e8f9f7 291
<> 144:ef7eb2e8f9f7 292 /** @defgroup LCD_PulseOnDuration LCD Pulse On Duration
<> 144:ef7eb2e8f9f7 293 * @{
<> 144:ef7eb2e8f9f7 294 */
<> 144:ef7eb2e8f9f7 295
<> 151:5eaa88a5bcc7 296 #define LCD_PULSEONDURATION_0 ((uint32_t)0x00000000U) /*!< Pulse ON duration = 0 pulse */
<> 144:ef7eb2e8f9f7 297 #define LCD_PULSEONDURATION_1 (LCD_FCR_PON_0) /*!< Pulse ON duration = 1/CK_PS */
<> 144:ef7eb2e8f9f7 298 #define LCD_PULSEONDURATION_2 (LCD_FCR_PON_1) /*!< Pulse ON duration = 2/CK_PS */
<> 144:ef7eb2e8f9f7 299 #define LCD_PULSEONDURATION_3 (LCD_FCR_PON_1 | LCD_FCR_PON_0) /*!< Pulse ON duration = 3/CK_PS */
<> 144:ef7eb2e8f9f7 300 #define LCD_PULSEONDURATION_4 (LCD_FCR_PON_2) /*!< Pulse ON duration = 4/CK_PS */
<> 144:ef7eb2e8f9f7 301 #define LCD_PULSEONDURATION_5 (LCD_FCR_PON_2 | LCD_FCR_PON_0) /*!< Pulse ON duration = 5/CK_PS */
<> 144:ef7eb2e8f9f7 302 #define LCD_PULSEONDURATION_6 (LCD_FCR_PON_2 | LCD_FCR_PON_1) /*!< Pulse ON duration = 6/CK_PS */
<> 144:ef7eb2e8f9f7 303 #define LCD_PULSEONDURATION_7 (LCD_FCR_PON) /*!< Pulse ON duration = 7/CK_PS */
<> 144:ef7eb2e8f9f7 304
<> 144:ef7eb2e8f9f7 305 #define IS_LCD_PULSE_ON_DURATION(__DURATION__) (((__DURATION__) == LCD_PULSEONDURATION_0) || \
<> 144:ef7eb2e8f9f7 306 ((__DURATION__) == LCD_PULSEONDURATION_1) || \
<> 144:ef7eb2e8f9f7 307 ((__DURATION__) == LCD_PULSEONDURATION_2) || \
<> 144:ef7eb2e8f9f7 308 ((__DURATION__) == LCD_PULSEONDURATION_3) || \
<> 144:ef7eb2e8f9f7 309 ((__DURATION__) == LCD_PULSEONDURATION_4) || \
<> 144:ef7eb2e8f9f7 310 ((__DURATION__) == LCD_PULSEONDURATION_5) || \
<> 144:ef7eb2e8f9f7 311 ((__DURATION__) == LCD_PULSEONDURATION_6) || \
<> 144:ef7eb2e8f9f7 312 ((__DURATION__) == LCD_PULSEONDURATION_7))
<> 144:ef7eb2e8f9f7 313 /**
<> 144:ef7eb2e8f9f7 314 * @}
<> 144:ef7eb2e8f9f7 315 */
<> 144:ef7eb2e8f9f7 316
<> 144:ef7eb2e8f9f7 317 /** @defgroup LCD_HighDrive LCD HighDrive
<> 144:ef7eb2e8f9f7 318 * @{
<> 144:ef7eb2e8f9f7 319 */
<> 144:ef7eb2e8f9f7 320
<> 151:5eaa88a5bcc7 321 #define LCD_HIGHDRIVE_0 ((uint32_t)0x00000000U) /*!< Low resistance Drive */
<> 144:ef7eb2e8f9f7 322 #define LCD_HIGHDRIVE_1 (LCD_FCR_HD) /*!< High resistance Drive */
<> 144:ef7eb2e8f9f7 323
<> 144:ef7eb2e8f9f7 324 #define IS_LCD_HIGHDRIVE(__HIGHDRIVE__) (((__HIGHDRIVE__) == LCD_HIGHDRIVE_0) || \
<> 144:ef7eb2e8f9f7 325 ((__HIGHDRIVE__) == LCD_HIGHDRIVE_1))
<> 144:ef7eb2e8f9f7 326 /**
<> 144:ef7eb2e8f9f7 327 * @}
<> 144:ef7eb2e8f9f7 328 */
<> 144:ef7eb2e8f9f7 329
<> 144:ef7eb2e8f9f7 330 /** @defgroup LCD_DeadTime LCD Dead Time
<> 144:ef7eb2e8f9f7 331 * @{
<> 144:ef7eb2e8f9f7 332 */
<> 144:ef7eb2e8f9f7 333
<> 151:5eaa88a5bcc7 334 #define LCD_DEADTIME_0 ((uint32_t)0x00000000U) /*!< No dead Time */
<> 144:ef7eb2e8f9f7 335 #define LCD_DEADTIME_1 (LCD_FCR_DEAD_0) /*!< One Phase between different couple of Frame */
<> 144:ef7eb2e8f9f7 336 #define LCD_DEADTIME_2 (LCD_FCR_DEAD_1) /*!< Two Phase between different couple of Frame */
<> 144:ef7eb2e8f9f7 337 #define LCD_DEADTIME_3 (LCD_FCR_DEAD_1 | LCD_FCR_DEAD_0) /*!< Three Phase between different couple of Frame */
<> 144:ef7eb2e8f9f7 338 #define LCD_DEADTIME_4 (LCD_FCR_DEAD_2) /*!< Four Phase between different couple of Frame */
<> 144:ef7eb2e8f9f7 339 #define LCD_DEADTIME_5 (LCD_FCR_DEAD_2 | LCD_FCR_DEAD_0) /*!< Five Phase between different couple of Frame */
<> 144:ef7eb2e8f9f7 340 #define LCD_DEADTIME_6 (LCD_FCR_DEAD_2 | LCD_FCR_DEAD_1) /*!< Six Phase between different couple of Frame */
<> 144:ef7eb2e8f9f7 341 #define LCD_DEADTIME_7 (LCD_FCR_DEAD) /*!< Seven Phase between different couple of Frame */
<> 144:ef7eb2e8f9f7 342
<> 144:ef7eb2e8f9f7 343 #define IS_LCD_DEAD_TIME(__TIME__) (((__TIME__) == LCD_DEADTIME_0) || \
<> 144:ef7eb2e8f9f7 344 ((__TIME__) == LCD_DEADTIME_1) || \
<> 144:ef7eb2e8f9f7 345 ((__TIME__) == LCD_DEADTIME_2) || \
<> 144:ef7eb2e8f9f7 346 ((__TIME__) == LCD_DEADTIME_3) || \
<> 144:ef7eb2e8f9f7 347 ((__TIME__) == LCD_DEADTIME_4) || \
<> 144:ef7eb2e8f9f7 348 ((__TIME__) == LCD_DEADTIME_5) || \
<> 144:ef7eb2e8f9f7 349 ((__TIME__) == LCD_DEADTIME_6) || \
<> 144:ef7eb2e8f9f7 350 ((__TIME__) == LCD_DEADTIME_7))
<> 144:ef7eb2e8f9f7 351 /**
<> 144:ef7eb2e8f9f7 352 * @}
<> 144:ef7eb2e8f9f7 353 */
<> 144:ef7eb2e8f9f7 354
<> 144:ef7eb2e8f9f7 355 /** @defgroup LCD_BlinkMode LCD Blink Mode
<> 144:ef7eb2e8f9f7 356 * @{
<> 144:ef7eb2e8f9f7 357 */
<> 144:ef7eb2e8f9f7 358
<> 151:5eaa88a5bcc7 359 #define LCD_BLINKMODE_OFF ((uint32_t)0x00000000U) /*!< Blink disabled */
<> 144:ef7eb2e8f9f7 360 #define LCD_BLINKMODE_SEG0_COM0 (LCD_FCR_BLINK_0) /*!< Blink enabled on SEG[0], COM[0] (1 pixel) */
<> 144:ef7eb2e8f9f7 361 #define LCD_BLINKMODE_SEG0_ALLCOM (LCD_FCR_BLINK_1) /*!< Blink enabled on SEG[0], all COM (up to
<> 144:ef7eb2e8f9f7 362 8 pixels according to the programmed duty) */
<> 144:ef7eb2e8f9f7 363 #define LCD_BLINKMODE_ALLSEG_ALLCOM (LCD_FCR_BLINK) /*!< Blink enabled on all SEG and all COM (all pixels) */
<> 144:ef7eb2e8f9f7 364
<> 144:ef7eb2e8f9f7 365 #define IS_LCD_BLINK_MODE(__MODE__) (((__MODE__) == LCD_BLINKMODE_OFF) || \
<> 144:ef7eb2e8f9f7 366 ((__MODE__) == LCD_BLINKMODE_SEG0_COM0) || \
<> 144:ef7eb2e8f9f7 367 ((__MODE__) == LCD_BLINKMODE_SEG0_ALLCOM) || \
<> 144:ef7eb2e8f9f7 368 ((__MODE__) == LCD_BLINKMODE_ALLSEG_ALLCOM))
<> 144:ef7eb2e8f9f7 369 /**
<> 144:ef7eb2e8f9f7 370 * @}
<> 144:ef7eb2e8f9f7 371 */
<> 144:ef7eb2e8f9f7 372
<> 144:ef7eb2e8f9f7 373 /** @defgroup LCD_BlinkFrequency LCD Blink Frequency
<> 144:ef7eb2e8f9f7 374 * @{
<> 144:ef7eb2e8f9f7 375 */
<> 144:ef7eb2e8f9f7 376
<> 151:5eaa88a5bcc7 377 #define LCD_BLINKFREQUENCY_DIV8 ((uint32_t)0x00000000U) /*!< The Blink frequency = fLCD/8 */
<> 144:ef7eb2e8f9f7 378 #define LCD_BLINKFREQUENCY_DIV16 (LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/16 */
<> 144:ef7eb2e8f9f7 379 #define LCD_BLINKFREQUENCY_DIV32 (LCD_FCR_BLINKF_1) /*!< The Blink frequency = fLCD/32 */
<> 144:ef7eb2e8f9f7 380 #define LCD_BLINKFREQUENCY_DIV64 (LCD_FCR_BLINKF_1 | LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/64 */
<> 144:ef7eb2e8f9f7 381 #define LCD_BLINKFREQUENCY_DIV128 (LCD_FCR_BLINKF_2) /*!< The Blink frequency = fLCD/128 */
<> 144:ef7eb2e8f9f7 382 #define LCD_BLINKFREQUENCY_DIV256 (LCD_FCR_BLINKF_2 |LCD_FCR_BLINKF_0) /*!< The Blink frequency = fLCD/256 */
<> 144:ef7eb2e8f9f7 383 #define LCD_BLINKFREQUENCY_DIV512 (LCD_FCR_BLINKF_2 |LCD_FCR_BLINKF_1) /*!< The Blink frequency = fLCD/512 */
<> 144:ef7eb2e8f9f7 384 #define LCD_BLINKFREQUENCY_DIV1024 (LCD_FCR_BLINKF) /*!< The Blink frequency = fLCD/1024 */
<> 144:ef7eb2e8f9f7 385
<> 144:ef7eb2e8f9f7 386 #define IS_LCD_BLINK_FREQUENCY(__FREQUENCY__) (((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV8) || \
<> 144:ef7eb2e8f9f7 387 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV16) || \
<> 144:ef7eb2e8f9f7 388 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV32) || \
<> 144:ef7eb2e8f9f7 389 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV64) || \
<> 144:ef7eb2e8f9f7 390 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV128) || \
<> 144:ef7eb2e8f9f7 391 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV256) || \
<> 144:ef7eb2e8f9f7 392 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV512) || \
<> 144:ef7eb2e8f9f7 393 ((__FREQUENCY__) == LCD_BLINKFREQUENCY_DIV1024))
<> 144:ef7eb2e8f9f7 394 /**
<> 144:ef7eb2e8f9f7 395 * @}
<> 144:ef7eb2e8f9f7 396 */
<> 144:ef7eb2e8f9f7 397
<> 144:ef7eb2e8f9f7 398 /** @defgroup LCD_Contrast LCD Contrast
<> 144:ef7eb2e8f9f7 399 * @{
<> 144:ef7eb2e8f9f7 400 */
<> 144:ef7eb2e8f9f7 401
<> 151:5eaa88a5bcc7 402 #define LCD_CONTRASTLEVEL_0 ((uint32_t)0x00000000U) /*!< Maximum Voltage = 2.60V */
<> 144:ef7eb2e8f9f7 403 #define LCD_CONTRASTLEVEL_1 (LCD_FCR_CC_0) /*!< Maximum Voltage = 2.73V */
<> 144:ef7eb2e8f9f7 404 #define LCD_CONTRASTLEVEL_2 (LCD_FCR_CC_1) /*!< Maximum Voltage = 2.86V */
<> 144:ef7eb2e8f9f7 405 #define LCD_CONTRASTLEVEL_3 (LCD_FCR_CC_1 | LCD_FCR_CC_0) /*!< Maximum Voltage = 2.99V */
<> 144:ef7eb2e8f9f7 406 #define LCD_CONTRASTLEVEL_4 (LCD_FCR_CC_2) /*!< Maximum Voltage = 3.12V */
<> 144:ef7eb2e8f9f7 407 #define LCD_CONTRASTLEVEL_5 (LCD_FCR_CC_2 | LCD_FCR_CC_0) /*!< Maximum Voltage = 3.25V */
<> 144:ef7eb2e8f9f7 408 #define LCD_CONTRASTLEVEL_6 (LCD_FCR_CC_2 | LCD_FCR_CC_1) /*!< Maximum Voltage = 3.38V */
<> 144:ef7eb2e8f9f7 409 #define LCD_CONTRASTLEVEL_7 (LCD_FCR_CC) /*!< Maximum Voltage = 3.51V */
<> 144:ef7eb2e8f9f7 410
<> 144:ef7eb2e8f9f7 411 #define IS_LCD_CONTRAST(__CONTRAST__) (((__CONTRAST__) == LCD_CONTRASTLEVEL_0) || \
<> 144:ef7eb2e8f9f7 412 ((__CONTRAST__) == LCD_CONTRASTLEVEL_1) || \
<> 144:ef7eb2e8f9f7 413 ((__CONTRAST__) == LCD_CONTRASTLEVEL_2) || \
<> 144:ef7eb2e8f9f7 414 ((__CONTRAST__) == LCD_CONTRASTLEVEL_3) || \
<> 144:ef7eb2e8f9f7 415 ((__CONTRAST__) == LCD_CONTRASTLEVEL_4) || \
<> 144:ef7eb2e8f9f7 416 ((__CONTRAST__) == LCD_CONTRASTLEVEL_5) || \
<> 144:ef7eb2e8f9f7 417 ((__CONTRAST__) == LCD_CONTRASTLEVEL_6) || \
<> 144:ef7eb2e8f9f7 418 ((__CONTRAST__) == LCD_CONTRASTLEVEL_7))
<> 144:ef7eb2e8f9f7 419 /**
<> 144:ef7eb2e8f9f7 420 * @}
<> 144:ef7eb2e8f9f7 421 */
<> 144:ef7eb2e8f9f7 422
<> 144:ef7eb2e8f9f7 423 /** @defgroup LCD_MuxSegment LCD Mux Segment
<> 144:ef7eb2e8f9f7 424 * @{
<> 144:ef7eb2e8f9f7 425 */
<> 144:ef7eb2e8f9f7 426
<> 151:5eaa88a5bcc7 427 #define LCD_MUXSEGMENT_DISABLE ((uint32_t)0x00000000U) /*!< SEG pin multiplexing disabled */
<> 144:ef7eb2e8f9f7 428 #define LCD_MUXSEGMENT_ENABLE (LCD_CR_MUX_SEG) /*!< SEG[31:28] are multiplexed with SEG[43:40] */
<> 144:ef7eb2e8f9f7 429
<> 144:ef7eb2e8f9f7 430 #define IS_LCD_MUXSEGMENT(__VALUE__) (((__VALUE__) == LCD_MUXSEGMENT_ENABLE) || \
<> 144:ef7eb2e8f9f7 431 ((__VALUE__) == LCD_MUXSEGMENT_DISABLE))
<> 144:ef7eb2e8f9f7 432 /**
<> 144:ef7eb2e8f9f7 433 * @}
<> 144:ef7eb2e8f9f7 434 */
Anna Bridge 186:707f6e361f3e 435
<> 151:5eaa88a5bcc7 436 /** @defgroup LCD_BUFEN LCD Voltage output buffer enable
<> 151:5eaa88a5bcc7 437 * @{
<> 151:5eaa88a5bcc7 438 */
<> 151:5eaa88a5bcc7 439
<> 151:5eaa88a5bcc7 440 #define LCD_VOLTBUFOUT_DISABLE ((uint32_t)0x00000000U) /*!< Voltage output buffer disabled */
<> 151:5eaa88a5bcc7 441 #define LCD_VOLTBUFOUT_ENABLE (LCD_CR_BUFEN) /*!< BUFEN[1] Voltage output buffer enabled */
<> 151:5eaa88a5bcc7 442
<> 151:5eaa88a5bcc7 443 #define IS_LCD_VOLTBUFOUT(__VALUE__) (((__VALUE__) == LCD_VOLTBUFOUT_ENABLE) || \
<> 151:5eaa88a5bcc7 444 ((__VALUE__) == LCD_VOLTBUFOUT_DISABLE))
<> 151:5eaa88a5bcc7 445 /**
<> 151:5eaa88a5bcc7 446 * @}
<> 151:5eaa88a5bcc7 447 */
<> 151:5eaa88a5bcc7 448
<> 144:ef7eb2e8f9f7 449 /** @defgroup LCD_Flag LCD Flag
<> 144:ef7eb2e8f9f7 450 * @{
<> 144:ef7eb2e8f9f7 451 */
<> 144:ef7eb2e8f9f7 452
<> 144:ef7eb2e8f9f7 453 #define LCD_FLAG_ENS LCD_SR_ENS
<> 144:ef7eb2e8f9f7 454 #define LCD_FLAG_SOF LCD_SR_SOF
<> 144:ef7eb2e8f9f7 455 #define LCD_FLAG_UDR LCD_SR_UDR
<> 144:ef7eb2e8f9f7 456 #define LCD_FLAG_UDD LCD_SR_UDD
<> 144:ef7eb2e8f9f7 457 #define LCD_FLAG_RDY LCD_SR_RDY
<> 144:ef7eb2e8f9f7 458 #define LCD_FLAG_FCRSF LCD_SR_FCRSR
<> 144:ef7eb2e8f9f7 459
<> 144:ef7eb2e8f9f7 460 /**
<> 144:ef7eb2e8f9f7 461 * @}
<> 144:ef7eb2e8f9f7 462 */
<> 144:ef7eb2e8f9f7 463
<> 144:ef7eb2e8f9f7 464 /** @defgroup LCD_RAMRegister LCD RAMRegister
<> 144:ef7eb2e8f9f7 465 * @{
<> 144:ef7eb2e8f9f7 466 */
<> 144:ef7eb2e8f9f7 467
<> 151:5eaa88a5bcc7 468 #define LCD_RAM_REGISTER0 ((uint32_t)0x00000000U) /*!< LCD RAM Register 0 */
<> 151:5eaa88a5bcc7 469 #define LCD_RAM_REGISTER1 ((uint32_t)0x00000001U) /*!< LCD RAM Register 1 */
<> 151:5eaa88a5bcc7 470 #define LCD_RAM_REGISTER2 ((uint32_t)0x00000002U) /*!< LCD RAM Register 2 */
<> 151:5eaa88a5bcc7 471 #define LCD_RAM_REGISTER3 ((uint32_t)0x00000003U) /*!< LCD RAM Register 3 */
<> 151:5eaa88a5bcc7 472 #define LCD_RAM_REGISTER4 ((uint32_t)0x00000004U) /*!< LCD RAM Register 4 */
<> 151:5eaa88a5bcc7 473 #define LCD_RAM_REGISTER5 ((uint32_t)0x00000005U) /*!< LCD RAM Register 5 */
<> 151:5eaa88a5bcc7 474 #define LCD_RAM_REGISTER6 ((uint32_t)0x00000006U) /*!< LCD RAM Register 6 */
<> 151:5eaa88a5bcc7 475 #define LCD_RAM_REGISTER7 ((uint32_t)0x00000007U) /*!< LCD RAM Register 7 */
<> 151:5eaa88a5bcc7 476 #define LCD_RAM_REGISTER8 ((uint32_t)0x00000008U) /*!< LCD RAM Register 8 */
<> 151:5eaa88a5bcc7 477 #define LCD_RAM_REGISTER9 ((uint32_t)0x00000009U) /*!< LCD RAM Register 9 */
<> 151:5eaa88a5bcc7 478 #define LCD_RAM_REGISTER10 ((uint32_t)0x0000000AU) /*!< LCD RAM Register 10 */
<> 151:5eaa88a5bcc7 479 #define LCD_RAM_REGISTER11 ((uint32_t)0x0000000BU) /*!< LCD RAM Register 11 */
<> 151:5eaa88a5bcc7 480 #define LCD_RAM_REGISTER12 ((uint32_t)0x0000000CU) /*!< LCD RAM Register 12 */
<> 151:5eaa88a5bcc7 481 #define LCD_RAM_REGISTER13 ((uint32_t)0x0000000DU) /*!< LCD RAM Register 13 */
<> 151:5eaa88a5bcc7 482 #define LCD_RAM_REGISTER14 ((uint32_t)0x0000000EU) /*!< LCD RAM Register 14 */
<> 151:5eaa88a5bcc7 483 #define LCD_RAM_REGISTER15 ((uint32_t)0x0000000FU) /*!< LCD RAM Register 15 */
<> 144:ef7eb2e8f9f7 484
<> 144:ef7eb2e8f9f7 485 #define IS_LCD_RAM_REGISTER(__REGISTER__) (((__REGISTER__) == LCD_RAM_REGISTER0) || \
<> 144:ef7eb2e8f9f7 486 ((__REGISTER__) == LCD_RAM_REGISTER1) || \
<> 144:ef7eb2e8f9f7 487 ((__REGISTER__) == LCD_RAM_REGISTER2) || \
<> 144:ef7eb2e8f9f7 488 ((__REGISTER__) == LCD_RAM_REGISTER3) || \
<> 144:ef7eb2e8f9f7 489 ((__REGISTER__) == LCD_RAM_REGISTER4) || \
<> 144:ef7eb2e8f9f7 490 ((__REGISTER__) == LCD_RAM_REGISTER5) || \
<> 144:ef7eb2e8f9f7 491 ((__REGISTER__) == LCD_RAM_REGISTER6) || \
<> 144:ef7eb2e8f9f7 492 ((__REGISTER__) == LCD_RAM_REGISTER7) || \
<> 144:ef7eb2e8f9f7 493 ((__REGISTER__) == LCD_RAM_REGISTER8) || \
<> 144:ef7eb2e8f9f7 494 ((__REGISTER__) == LCD_RAM_REGISTER9) || \
<> 144:ef7eb2e8f9f7 495 ((__REGISTER__) == LCD_RAM_REGISTER10) || \
<> 144:ef7eb2e8f9f7 496 ((__REGISTER__) == LCD_RAM_REGISTER11) || \
<> 144:ef7eb2e8f9f7 497 ((__REGISTER__) == LCD_RAM_REGISTER12) || \
<> 144:ef7eb2e8f9f7 498 ((__REGISTER__) == LCD_RAM_REGISTER13) || \
<> 144:ef7eb2e8f9f7 499 ((__REGISTER__) == LCD_RAM_REGISTER14) || \
<> 144:ef7eb2e8f9f7 500 ((__REGISTER__) == LCD_RAM_REGISTER15))
<> 144:ef7eb2e8f9f7 501
<> 144:ef7eb2e8f9f7 502 /**
<> 144:ef7eb2e8f9f7 503 * @}
<> 144:ef7eb2e8f9f7 504 */
<> 144:ef7eb2e8f9f7 505
<> 144:ef7eb2e8f9f7 506 /**
<> 144:ef7eb2e8f9f7 507 * @}
<> 144:ef7eb2e8f9f7 508 */
<> 144:ef7eb2e8f9f7 509
<> 144:ef7eb2e8f9f7 510 /* Exported macro ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 511
<> 144:ef7eb2e8f9f7 512 /** @defgroup LCD_Exported_Macros LCD Exported Macros
<> 144:ef7eb2e8f9f7 513 * @{
<> 144:ef7eb2e8f9f7 514 */
<> 144:ef7eb2e8f9f7 515
<> 144:ef7eb2e8f9f7 516 /** @brief Reset LCD handle state
<> 144:ef7eb2e8f9f7 517 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 518 * @retval None
<> 144:ef7eb2e8f9f7 519 */
<> 144:ef7eb2e8f9f7 520 #define __HAL_LCD_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_LCD_STATE_RESET)
<> 144:ef7eb2e8f9f7 521
<> 144:ef7eb2e8f9f7 522 /** @brief macros to enables or disables the LCD
<> 144:ef7eb2e8f9f7 523 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 524 * @retval None
<> 144:ef7eb2e8f9f7 525 */
<> 144:ef7eb2e8f9f7 526 #define __HAL_LCD_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR, LCD_CR_LCDEN))
<> 144:ef7eb2e8f9f7 527 #define __HAL_LCD_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR, LCD_CR_LCDEN))
<> 144:ef7eb2e8f9f7 528
<> 151:5eaa88a5bcc7 529 /** @brief macros to enables or disables the Voltage output buffer
<> 151:5eaa88a5bcc7 530 * @param __HANDLE__: specifies the LCD Handle.
<> 151:5eaa88a5bcc7 531 * @retval None
<> 151:5eaa88a5bcc7 532 */
<> 151:5eaa88a5bcc7 533 #define __HAL_LCD_VOLTOUTBUFFER_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->CR, LCD_CR_BUFEN))
<> 151:5eaa88a5bcc7 534 #define __HAL_LCD_VOLTOUTBUFFER_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->CR, LCD_CR_BUFEN))
<> 151:5eaa88a5bcc7 535
<> 144:ef7eb2e8f9f7 536 /** @brief Macros to enable or disable the low resistance divider. Displays with high
<> 144:ef7eb2e8f9f7 537 * internal resistance may need a longer drive time to achieve
<> 144:ef7eb2e8f9f7 538 * satisfactory contrast. This function is useful in this case if some
<> 144:ef7eb2e8f9f7 539 * additional power consumption can be tolerated.
<> 144:ef7eb2e8f9f7 540 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 541 * @note When this mode is enabled, the PulseOn Duration (PON) have to be
<> 144:ef7eb2e8f9f7 542 * programmed to 1/CK_PS (LCD_PULSEONDURATION_1).
<> 144:ef7eb2e8f9f7 543 * @retval None
<> 144:ef7eb2e8f9f7 544 */
<> 144:ef7eb2e8f9f7 545 #define __HAL_LCD_HIGHDRIVER_ENABLE(__HANDLE__) \
<> 144:ef7eb2e8f9f7 546 do{ \
<> 144:ef7eb2e8f9f7 547 SET_BIT((__HANDLE__)->Instance->FCR, LCD_FCR_HD); \
<> 144:ef7eb2e8f9f7 548 LCD_WaitForSynchro(__HANDLE__); \
<> 144:ef7eb2e8f9f7 549 }while(0)
<> 144:ef7eb2e8f9f7 550
<> 144:ef7eb2e8f9f7 551 #define __HAL_LCD_HIGHDRIVER_DISABLE(__HANDLE__) \
<> 144:ef7eb2e8f9f7 552 do{ \
<> 144:ef7eb2e8f9f7 553 CLEAR_BIT((__HANDLE__)->Instance->FCR, LCD_FCR_HD); \
<> 144:ef7eb2e8f9f7 554 LCD_WaitForSynchro(__HANDLE__); \
<> 144:ef7eb2e8f9f7 555 }while(0)
<> 144:ef7eb2e8f9f7 556
<> 144:ef7eb2e8f9f7 557 /**
<> 144:ef7eb2e8f9f7 558 * @brief Macro to configure the LCD pulses on duration.
<> 144:ef7eb2e8f9f7 559 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 560 * @param __DURATION__: specifies the LCD pulse on duration in terms of
<> 144:ef7eb2e8f9f7 561 * CK_PS (prescaled LCD clock period) pulses.
<> 144:ef7eb2e8f9f7 562 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 563 * @arg LCD_PULSEONDURATION_0: 0 pulse
<> 144:ef7eb2e8f9f7 564 * @arg LCD_PULSEONDURATION_1: Pulse ON duration = 1/CK_PS
<> 144:ef7eb2e8f9f7 565 * @arg LCD_PULSEONDURATION_2: Pulse ON duration = 2/CK_PS
<> 144:ef7eb2e8f9f7 566 * @arg LCD_PULSEONDURATION_3: Pulse ON duration = 3/CK_PS
<> 144:ef7eb2e8f9f7 567 * @arg LCD_PULSEONDURATION_4: Pulse ON duration = 4/CK_PS
<> 144:ef7eb2e8f9f7 568 * @arg LCD_PULSEONDURATION_5: Pulse ON duration = 5/CK_PS
<> 144:ef7eb2e8f9f7 569 * @arg LCD_PULSEONDURATION_6: Pulse ON duration = 6/CK_PS
<> 144:ef7eb2e8f9f7 570 * @arg LCD_PULSEONDURATION_7: Pulse ON duration = 7/CK_PS
<> 144:ef7eb2e8f9f7 571 * @retval None
<> 144:ef7eb2e8f9f7 572 */
<> 144:ef7eb2e8f9f7 573 #define __HAL_LCD_PULSEONDURATION_CONFIG(__HANDLE__, __DURATION__) \
<> 144:ef7eb2e8f9f7 574 do{ \
<> 144:ef7eb2e8f9f7 575 MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_PON, (__DURATION__)); \
<> 144:ef7eb2e8f9f7 576 LCD_WaitForSynchro(__HANDLE__); \
<> 144:ef7eb2e8f9f7 577 }while(0)
<> 144:ef7eb2e8f9f7 578
<> 144:ef7eb2e8f9f7 579 /**
<> 144:ef7eb2e8f9f7 580 * @brief Macro to configure the LCD dead time.
<> 144:ef7eb2e8f9f7 581 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 582 * @param __DEADTIME__: specifies the LCD dead time.
<> 144:ef7eb2e8f9f7 583 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 584 * @arg LCD_DEADTIME_0: No dead Time
<> 144:ef7eb2e8f9f7 585 * @arg LCD_DEADTIME_1: One Phase between different couple of Frame
<> 144:ef7eb2e8f9f7 586 * @arg LCD_DEADTIME_2: Two Phase between different couple of Frame
<> 144:ef7eb2e8f9f7 587 * @arg LCD_DEADTIME_3: Three Phase between different couple of Frame
<> 144:ef7eb2e8f9f7 588 * @arg LCD_DEADTIME_4: Four Phase between different couple of Frame
<> 144:ef7eb2e8f9f7 589 * @arg LCD_DEADTIME_5: Five Phase between different couple of Frame
<> 144:ef7eb2e8f9f7 590 * @arg LCD_DEADTIME_6: Six Phase between different couple of Frame
<> 144:ef7eb2e8f9f7 591 * @arg LCD_DEADTIME_7: Seven Phase between different couple of Frame
<> 144:ef7eb2e8f9f7 592 * @retval None
<> 144:ef7eb2e8f9f7 593 */
<> 144:ef7eb2e8f9f7 594 #define __HAL_LCD_DEADTIME_CONFIG(__HANDLE__, __DEADTIME__) \
<> 144:ef7eb2e8f9f7 595 do{ \
<> 144:ef7eb2e8f9f7 596 MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_DEAD, (__DEADTIME__)); \
<> 144:ef7eb2e8f9f7 597 LCD_WaitForSynchro(__HANDLE__); \
<> 144:ef7eb2e8f9f7 598 }while(0)
<> 144:ef7eb2e8f9f7 599
<> 144:ef7eb2e8f9f7 600 /**
<> 144:ef7eb2e8f9f7 601 * @brief Macro to configure the LCD Contrast.
<> 144:ef7eb2e8f9f7 602 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 603 * @param __CONTRAST__: specifies the LCD Contrast.
<> 144:ef7eb2e8f9f7 604 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 605 * @arg LCD_CONTRASTLEVEL_0: Maximum Voltage = 2.60V
<> 144:ef7eb2e8f9f7 606 * @arg LCD_CONTRASTLEVEL_1: Maximum Voltage = 2.73V
<> 144:ef7eb2e8f9f7 607 * @arg LCD_CONTRASTLEVEL_2: Maximum Voltage = 2.86V
<> 144:ef7eb2e8f9f7 608 * @arg LCD_CONTRASTLEVEL_3: Maximum Voltage = 2.99V
<> 144:ef7eb2e8f9f7 609 * @arg LCD_CONTRASTLEVEL_4: Maximum Voltage = 3.12V
<> 144:ef7eb2e8f9f7 610 * @arg LCD_CONTRASTLEVEL_5: Maximum Voltage = 3.25V
<> 144:ef7eb2e8f9f7 611 * @arg LCD_CONTRASTLEVEL_6: Maximum Voltage = 3.38V
<> 144:ef7eb2e8f9f7 612 * @arg LCD_CONTRASTLEVEL_7: Maximum Voltage = 3.51V
<> 144:ef7eb2e8f9f7 613 * @retval None
<> 144:ef7eb2e8f9f7 614 */
<> 144:ef7eb2e8f9f7 615 #define __HAL_LCD_CONTRAST_CONFIG(__HANDLE__, __CONTRAST__) \
<> 144:ef7eb2e8f9f7 616 do{ \
<> 144:ef7eb2e8f9f7 617 MODIFY_REG((__HANDLE__)->Instance->FCR, LCD_FCR_CC, (__CONTRAST__)); \
<> 144:ef7eb2e8f9f7 618 LCD_WaitForSynchro(__HANDLE__); \
<> 144:ef7eb2e8f9f7 619 } while(0)
<> 144:ef7eb2e8f9f7 620
<> 144:ef7eb2e8f9f7 621 /**
<> 144:ef7eb2e8f9f7 622 * @brief Macro to configure the LCD Blink mode and Blink frequency.
<> 144:ef7eb2e8f9f7 623 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 624 * @param __BLINKMODE__: specifies the LCD blink mode.
<> 144:ef7eb2e8f9f7 625 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 626 * @arg LCD_BLINKMODE_OFF: Blink disabled
<> 144:ef7eb2e8f9f7 627 * @arg LCD_BLINKMODE_SEG0_COM0: Blink enabled on SEG[0], COM[0] (1 pixel)
<> 144:ef7eb2e8f9f7 628 * @arg LCD_BLINKMODE_SEG0_ALLCOM: Blink enabled on SEG[0], all COM (up to 8
<> 144:ef7eb2e8f9f7 629 * pixels according to the programmed duty)
<> 144:ef7eb2e8f9f7 630 * @arg LCD_BLINKMODE_ALLSEG_ALLCOM: Blink enabled on all SEG and all COM
<> 144:ef7eb2e8f9f7 631 * (all pixels)
<> 144:ef7eb2e8f9f7 632 * @param __BLINKFREQUENCY__: specifies the LCD blink frequency.
<> 144:ef7eb2e8f9f7 633 * @arg LCD_BLINKFREQUENCY_DIV8: The Blink frequency = fLcd/8
<> 144:ef7eb2e8f9f7 634 * @arg LCD_BLINKFREQUENCY_DIV16: The Blink frequency = fLcd/16
<> 144:ef7eb2e8f9f7 635 * @arg LCD_BLINKFREQUENCY_DIV32: The Blink frequency = fLcd/32
<> 144:ef7eb2e8f9f7 636 * @arg LCD_BLINKFREQUENCY_DIV64: The Blink frequency = fLcd/64
<> 144:ef7eb2e8f9f7 637 * @arg LCD_BLINKFREQUENCY_DIV128: The Blink frequency = fLcd/128
<> 144:ef7eb2e8f9f7 638 * @arg LCD_BLINKFREQUENCY_DIV256: The Blink frequency = fLcd/256
<> 144:ef7eb2e8f9f7 639 * @arg LCD_BLINKFREQUENCY_DIV512: The Blink frequency = fLcd/512
<> 144:ef7eb2e8f9f7 640 * @arg LCD_BLINKFREQUENCY_DIV1024: The Blink frequency = fLcd/1024
<> 144:ef7eb2e8f9f7 641 * @retval None
<> 144:ef7eb2e8f9f7 642 */
<> 144:ef7eb2e8f9f7 643 #define __HAL_LCD_BLINK_CONFIG(__HANDLE__, __BLINKMODE__, __BLINKFREQUENCY__) \
<> 144:ef7eb2e8f9f7 644 do{ \
<> 144:ef7eb2e8f9f7 645 MODIFY_REG((__HANDLE__)->Instance->FCR, (LCD_FCR_BLINKF | LCD_FCR_BLINK), ((__BLINKMODE__) | (__BLINKFREQUENCY__))); \
<> 144:ef7eb2e8f9f7 646 LCD_WaitForSynchro(__HANDLE__); \
<> 144:ef7eb2e8f9f7 647 }while(0)
<> 144:ef7eb2e8f9f7 648
<> 144:ef7eb2e8f9f7 649 /** @brief Enables or disables the specified LCD interrupt.
<> 144:ef7eb2e8f9f7 650 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 651 * @param __INTERRUPT__: specifies the LCD interrupt source to be enabled or disabled.
<> 144:ef7eb2e8f9f7 652 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 653 * @arg LCD_IT_SOF: Start of Frame Interrupt
<> 144:ef7eb2e8f9f7 654 * @arg LCD_IT_UDD: Update Display Done Interrupt
<> 144:ef7eb2e8f9f7 655 * @retval None
<> 144:ef7eb2e8f9f7 656 */
<> 144:ef7eb2e8f9f7 657 #define __HAL_LCD_ENABLE_IT(__HANDLE__, __INTERRUPT__) \
<> 144:ef7eb2e8f9f7 658 do{ \
<> 144:ef7eb2e8f9f7 659 SET_BIT((__HANDLE__)->Instance->FCR, (__INTERRUPT__)); \
<> 144:ef7eb2e8f9f7 660 LCD_WaitForSynchro(__HANDLE__); \
<> 144:ef7eb2e8f9f7 661 }while(0)
<> 144:ef7eb2e8f9f7 662 #define __HAL_LCD_DISABLE_IT(__HANDLE__, __INTERRUPT__) \
<> 144:ef7eb2e8f9f7 663 do{ \
<> 144:ef7eb2e8f9f7 664 CLEAR_BIT((__HANDLE__)->Instance->FCR, (__INTERRUPT__)); \
<> 144:ef7eb2e8f9f7 665 LCD_WaitForSynchro(__HANDLE__); \
<> 144:ef7eb2e8f9f7 666 }while(0)
<> 144:ef7eb2e8f9f7 667
<> 144:ef7eb2e8f9f7 668 /** @brief Checks whether the specified LCD interrupt is enabled or not.
<> 144:ef7eb2e8f9f7 669 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 670 * @param __IT__: specifies the LCD interrupt source to check.
<> 144:ef7eb2e8f9f7 671 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 672 * @arg LCD_IT_SOF: Start of Frame Interrupt
<> 144:ef7eb2e8f9f7 673 * @arg LCD_IT_UDD: Update Display Done Interrupt.
<> 144:ef7eb2e8f9f7 674 * @note If the device is in STOP mode (PCLK not provided) UDD will not
<> 144:ef7eb2e8f9f7 675 * generate an interrupt even if UDDIE = 1.
<> 144:ef7eb2e8f9f7 676 * If the display is not enabled the UDD interrupt will never occur.
<> 144:ef7eb2e8f9f7 677 * @retval The state of __IT__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 678 */
<> 144:ef7eb2e8f9f7 679 #define __HAL_LCD_GET_IT_SOURCE(__HANDLE__, __IT__) (((__HANDLE__)->Instance->FCR) & (__IT__))
<> 144:ef7eb2e8f9f7 680
<> 144:ef7eb2e8f9f7 681 /** @brief Checks whether the specified LCD flag is set or not.
<> 144:ef7eb2e8f9f7 682 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 683 * @param __FLAG__: specifies the flag to check.
<> 144:ef7eb2e8f9f7 684 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 685 * @arg LCD_FLAG_ENS: LCD Enabled flag. It indicates the LCD controller status.
<> 144:ef7eb2e8f9f7 686 * @note The ENS bit is set immediately when the LCDEN bit in the LCD_CR
<> 144:ef7eb2e8f9f7 687 * goes from 0 to 1. On deactivation it reflects the real status of
<> 144:ef7eb2e8f9f7 688 * LCD so it becomes 0 at the end of the last displayed frame.
<> 144:ef7eb2e8f9f7 689 * @arg LCD_FLAG_SOF: Start of Frame flag. This flag is set by hardware at
<> 144:ef7eb2e8f9f7 690 * the beginning of a new frame, at the same time as the display data is
<> 144:ef7eb2e8f9f7 691 * updated.
<> 144:ef7eb2e8f9f7 692 * @arg LCD_FLAG_UDR: Update Display Request flag.
<> 144:ef7eb2e8f9f7 693 * @arg LCD_FLAG_UDD: Update Display Done flag.
<> 144:ef7eb2e8f9f7 694 * @arg LCD_FLAG_RDY: Step_up converter Ready flag. It indicates the status
<> 144:ef7eb2e8f9f7 695 * of the step-up converter.
<> 144:ef7eb2e8f9f7 696 * @arg LCD_FLAG_FCRSF: LCD Frame Control Register Synchronization Flag.
<> 144:ef7eb2e8f9f7 697 * This flag is set by hardware each time the LCD_FCR register is updated
<> 144:ef7eb2e8f9f7 698 * in the LCDCLK domain.
<> 144:ef7eb2e8f9f7 699 * @retval The new state of __FLAG__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 700 */
<> 144:ef7eb2e8f9f7 701 #define __HAL_LCD_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
<> 144:ef7eb2e8f9f7 702
<> 144:ef7eb2e8f9f7 703 /** @brief Clears the specified LCD pending flag.
<> 144:ef7eb2e8f9f7 704 * @param __HANDLE__: specifies the LCD Handle.
<> 144:ef7eb2e8f9f7 705 * @param __FLAG__: specifies the flag to clear.
<> 144:ef7eb2e8f9f7 706 * This parameter can be any combination of the following values:
<> 144:ef7eb2e8f9f7 707 * @arg LCD_FLAG_SOF: Start of Frame Interrupt
<> 144:ef7eb2e8f9f7 708 * @arg LCD_FLAG_UDD: Update Display Done Interrupt
<> 144:ef7eb2e8f9f7 709 * @retval None
<> 144:ef7eb2e8f9f7 710 */
<> 144:ef7eb2e8f9f7 711 #define __HAL_LCD_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->CLR = (__FLAG__))
<> 144:ef7eb2e8f9f7 712
<> 144:ef7eb2e8f9f7 713 /**
<> 144:ef7eb2e8f9f7 714 * @}
<> 144:ef7eb2e8f9f7 715 */
<> 144:ef7eb2e8f9f7 716
<> 144:ef7eb2e8f9f7 717 /* Exported functions ------------------------------------------------------- */
<> 144:ef7eb2e8f9f7 718
<> 144:ef7eb2e8f9f7 719 /** @defgroup LCD_Exported_Functions LCD Exported Functions
<> 144:ef7eb2e8f9f7 720 * @{
<> 144:ef7eb2e8f9f7 721 */
<> 144:ef7eb2e8f9f7 722
<> 144:ef7eb2e8f9f7 723 /** @defgroup LCD_Exported_Functions_Group1 Initialization and de-initialization methods
<> 144:ef7eb2e8f9f7 724 * @{
<> 144:ef7eb2e8f9f7 725 */
<> 144:ef7eb2e8f9f7 726
<> 144:ef7eb2e8f9f7 727 /* Initialization/de-initialization methods **********************************/
<> 144:ef7eb2e8f9f7 728 HAL_StatusTypeDef HAL_LCD_DeInit(LCD_HandleTypeDef *hlcd);
<> 144:ef7eb2e8f9f7 729 HAL_StatusTypeDef HAL_LCD_Init(LCD_HandleTypeDef *hlcd);
<> 144:ef7eb2e8f9f7 730 void HAL_LCD_MspInit(LCD_HandleTypeDef *hlcd);
<> 144:ef7eb2e8f9f7 731 void HAL_LCD_MspDeInit(LCD_HandleTypeDef *hlcd);
<> 144:ef7eb2e8f9f7 732
<> 144:ef7eb2e8f9f7 733 /**
<> 144:ef7eb2e8f9f7 734 * @}
<> 144:ef7eb2e8f9f7 735 */
<> 144:ef7eb2e8f9f7 736
<> 144:ef7eb2e8f9f7 737 /** @defgroup LCD_Exported_Functions_Group2 IO operation methods
<> 144:ef7eb2e8f9f7 738 * @{
<> 144:ef7eb2e8f9f7 739 */
<> 144:ef7eb2e8f9f7 740
<> 144:ef7eb2e8f9f7 741 /* IO operation methods *******************************************************/
<> 144:ef7eb2e8f9f7 742 HAL_StatusTypeDef HAL_LCD_Write(LCD_HandleTypeDef *hlcd, uint32_t RAMRegisterIndex, uint32_t RAMRegisterMask, uint32_t Data);
<> 144:ef7eb2e8f9f7 743 HAL_StatusTypeDef HAL_LCD_Clear(LCD_HandleTypeDef *hlcd);
<> 144:ef7eb2e8f9f7 744 HAL_StatusTypeDef HAL_LCD_UpdateDisplayRequest(LCD_HandleTypeDef *hlcd);
<> 144:ef7eb2e8f9f7 745
<> 144:ef7eb2e8f9f7 746 /**
<> 144:ef7eb2e8f9f7 747 * @}
<> 144:ef7eb2e8f9f7 748 */
<> 144:ef7eb2e8f9f7 749
<> 144:ef7eb2e8f9f7 750 /** @defgroup LCD_Exported_Functions_Group3 Peripheral State methods
<> 144:ef7eb2e8f9f7 751 * @{
<> 144:ef7eb2e8f9f7 752 */
<> 144:ef7eb2e8f9f7 753
<> 144:ef7eb2e8f9f7 754 /* Peripheral State methods **************************************************/
<> 144:ef7eb2e8f9f7 755 HAL_LCD_StateTypeDef HAL_LCD_GetState(LCD_HandleTypeDef *hlcd);
<> 144:ef7eb2e8f9f7 756 uint32_t HAL_LCD_GetError(LCD_HandleTypeDef *hlcd);
<> 144:ef7eb2e8f9f7 757
<> 144:ef7eb2e8f9f7 758 /**
<> 144:ef7eb2e8f9f7 759 * @}
<> 144:ef7eb2e8f9f7 760 */
<> 144:ef7eb2e8f9f7 761
<> 144:ef7eb2e8f9f7 762 /**
<> 144:ef7eb2e8f9f7 763 * @}
<> 144:ef7eb2e8f9f7 764 */
<> 144:ef7eb2e8f9f7 765
<> 144:ef7eb2e8f9f7 766 /** @addtogroup LCD_Private
<> 144:ef7eb2e8f9f7 767 * @{
<> 144:ef7eb2e8f9f7 768 */
<> 144:ef7eb2e8f9f7 769
<> 144:ef7eb2e8f9f7 770 /* Private functions ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 771 HAL_StatusTypeDef LCD_WaitForSynchro(LCD_HandleTypeDef *hlcd);
<> 144:ef7eb2e8f9f7 772
<> 144:ef7eb2e8f9f7 773 /**
<> 144:ef7eb2e8f9f7 774 * @}
<> 144:ef7eb2e8f9f7 775 */
<> 144:ef7eb2e8f9f7 776
<> 144:ef7eb2e8f9f7 777 /* Define the private group ***********************************/
<> 144:ef7eb2e8f9f7 778 /**************************************************************/
<> 144:ef7eb2e8f9f7 779 /** @defgroup LCD_Private LCD Private
<> 144:ef7eb2e8f9f7 780 * @{
<> 144:ef7eb2e8f9f7 781 */
<> 144:ef7eb2e8f9f7 782 /**
<> 144:ef7eb2e8f9f7 783 * @}
<> 144:ef7eb2e8f9f7 784 */
<> 144:ef7eb2e8f9f7 785 /**************************************************************/
<> 144:ef7eb2e8f9f7 786
<> 144:ef7eb2e8f9f7 787 /**
<> 144:ef7eb2e8f9f7 788 * @}
<> 144:ef7eb2e8f9f7 789 */
<> 144:ef7eb2e8f9f7 790
<> 144:ef7eb2e8f9f7 791 /**
<> 144:ef7eb2e8f9f7 792 * @}
<> 144:ef7eb2e8f9f7 793 */
<> 144:ef7eb2e8f9f7 794
Anna Bridge 186:707f6e361f3e 795 #endif /* STM32L053xx || STM32L063xx || STM32L073xx || STM32L083xx */
Anna Bridge 186:707f6e361f3e 796
<> 144:ef7eb2e8f9f7 797 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 798 }
<> 144:ef7eb2e8f9f7 799 #endif
<> 144:ef7eb2e8f9f7 800
<> 144:ef7eb2e8f9f7 801 #endif /* __STM32L0xx_HAL_LCD_H */
<> 144:ef7eb2e8f9f7 802
<> 144:ef7eb2e8f9f7 803 /******************* (C) COPYRIGHT 2016 STMicroelectronics *****END OF FILE****/
<> 144:ef7eb2e8f9f7 804