mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_lptim.c@151:5eaa88a5bcc7, 2016-11-24 (annotated)
- Committer:
- <>
- Date:
- Thu Nov 24 17:03:03 2016 +0000
- Revision:
- 151:5eaa88a5bcc7
- Parent:
- 149:156823d33999
- Child:
- 186:707f6e361f3e
This updates the lib to the mbed lib v130
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /** |
<> | 144:ef7eb2e8f9f7 | 2 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 3 | * @file stm32l0xx_hal_lptim.c |
<> | 144:ef7eb2e8f9f7 | 4 | * @author MCD Application Team |
<> | 151:5eaa88a5bcc7 | 5 | * @version V1.7.0 |
<> | 151:5eaa88a5bcc7 | 6 | * @date 31-May-2016 |
<> | 144:ef7eb2e8f9f7 | 7 | * @brief LPTIM HAL module driver. |
<> | 144:ef7eb2e8f9f7 | 8 | * |
<> | 144:ef7eb2e8f9f7 | 9 | * This file provides firmware functions to manage the following |
<> | 144:ef7eb2e8f9f7 | 10 | * functionalities of the Low Power Timer (LPTIM) peripheral: |
<> | 144:ef7eb2e8f9f7 | 11 | * + Initialization and de-initialization functions. |
<> | 144:ef7eb2e8f9f7 | 12 | * + Start/Stop operation functions in polling mode. |
<> | 144:ef7eb2e8f9f7 | 13 | * + Start/Stop operation functions in interrupt mode. |
<> | 144:ef7eb2e8f9f7 | 14 | * + Reading operation functions. |
<> | 144:ef7eb2e8f9f7 | 15 | * + Peripheral State functions. |
<> | 144:ef7eb2e8f9f7 | 16 | * |
<> | 144:ef7eb2e8f9f7 | 17 | @verbatim |
<> | 144:ef7eb2e8f9f7 | 18 | ============================================================================== |
<> | 144:ef7eb2e8f9f7 | 19 | ##### How to use this driver ##### |
<> | 144:ef7eb2e8f9f7 | 20 | ============================================================================== |
<> | 144:ef7eb2e8f9f7 | 21 | [..] |
<> | 144:ef7eb2e8f9f7 | 22 | The LPTIM HAL driver can be used as follows: |
<> | 144:ef7eb2e8f9f7 | 23 | |
<> | 144:ef7eb2e8f9f7 | 24 | (#)Initialize the LPTIM low level resources by implementing the |
<> | 144:ef7eb2e8f9f7 | 25 | HAL_LPTIM_MspInit(): |
<> | 144:ef7eb2e8f9f7 | 26 | (##) Enable the LPTIM interface clock using __HAL_RCC_LPTIM1_CLK_ENABLE(). |
<> | 144:ef7eb2e8f9f7 | 27 | (##) In case of using interrupts (e.g. HAL_LPTIM_PWM_Start_IT()): |
<> | 144:ef7eb2e8f9f7 | 28 | (+) Configure the LPTIM interrupt priority using HAL_NVIC_SetPriority(). |
<> | 144:ef7eb2e8f9f7 | 29 | (+) Enable the LPTIM IRQ handler using HAL_NVIC_EnableIRQ(). |
<> | 144:ef7eb2e8f9f7 | 30 | (+) In LPTIM IRQ handler, call HAL_LPTIM_IRQHandler(). |
<> | 144:ef7eb2e8f9f7 | 31 | |
<> | 144:ef7eb2e8f9f7 | 32 | (#)Initialize the LPTIM HAL using HAL_LPTIM_Init(). This function |
<> | 144:ef7eb2e8f9f7 | 33 | configures mainly: |
<> | 144:ef7eb2e8f9f7 | 34 | (##) The instance: Only LPTIM1 is present in STM32L053xx. |
<> | 144:ef7eb2e8f9f7 | 35 | (##) Clock: the counter clock. |
<> | 144:ef7eb2e8f9f7 | 36 | - Source : it can be either the ULPTIM input (IN1) or one of |
<> | 144:ef7eb2e8f9f7 | 37 | the internal clock; (APB, LSE, LSI or MSI). |
<> | 144:ef7eb2e8f9f7 | 38 | - Prescaler: select the clock divider. |
<> | 144:ef7eb2e8f9f7 | 39 | (##) UltraLowPowerClock : To be used only if the ULPTIM is selected |
<> | 144:ef7eb2e8f9f7 | 40 | as counter clock source. |
<> | 144:ef7eb2e8f9f7 | 41 | - Polarity: polarity of the active edge for the counter unit |
<> | 144:ef7eb2e8f9f7 | 42 | if the ULPTIM input is selected. |
<> | 144:ef7eb2e8f9f7 | 43 | - SampleTime: clock sampling time to configure the clock glitch |
<> | 144:ef7eb2e8f9f7 | 44 | filter. |
<> | 144:ef7eb2e8f9f7 | 45 | (##) Trigger: How the counter start. |
<> | 144:ef7eb2e8f9f7 | 46 | - Source: trigger can be software or one of the hardware triggers. |
<> | 144:ef7eb2e8f9f7 | 47 | - ActiveEdge : only for hardware trigger. |
<> | 144:ef7eb2e8f9f7 | 48 | - SampleTime : trigger sampling time to configure the trigger |
<> | 144:ef7eb2e8f9f7 | 49 | glitch filter. |
<> | 144:ef7eb2e8f9f7 | 50 | (##) OutputPolarity : 2 opposite polarities are possibles. |
<> | 144:ef7eb2e8f9f7 | 51 | (##) UpdateMode: specifies whether the update of the autoreload and |
<> | 144:ef7eb2e8f9f7 | 52 | the compare values is done immediately or after the end of current |
<> | 144:ef7eb2e8f9f7 | 53 | period. |
<> | 144:ef7eb2e8f9f7 | 54 | |
<> | 144:ef7eb2e8f9f7 | 55 | (#)Six modes are available: |
<> | 144:ef7eb2e8f9f7 | 56 | |
<> | 144:ef7eb2e8f9f7 | 57 | (##) PWM Mode: To generate a PWM signal with specified period and pulse, |
<> | 144:ef7eb2e8f9f7 | 58 | call HAL_LPTIM_PWM_Start() or HAL_LPTIM_PWM_Start_IT() for interruption |
<> | 144:ef7eb2e8f9f7 | 59 | mode. |
<> | 144:ef7eb2e8f9f7 | 60 | |
<> | 144:ef7eb2e8f9f7 | 61 | (##) One Pulse Mode: To generate pulse with specified width in response |
<> | 144:ef7eb2e8f9f7 | 62 | to a stimulus, call HAL_LPTIM_OnePulse_Start() or |
<> | 144:ef7eb2e8f9f7 | 63 | HAL_LPTIM_OnePulse_Start_IT() for interruption mode. |
<> | 144:ef7eb2e8f9f7 | 64 | |
<> | 144:ef7eb2e8f9f7 | 65 | (##) Set once Mode: In this mode, the output changes the level (from |
<> | 144:ef7eb2e8f9f7 | 66 | low level to high level if the output polarity is configured high, else |
<> | 144:ef7eb2e8f9f7 | 67 | the opposite) when a compare match occurs. To start this mode, call |
<> | 144:ef7eb2e8f9f7 | 68 | HAL_LPTIM_SetOnce_Start() or HAL_LPTIM_SetOnce_Start_IT() for |
<> | 144:ef7eb2e8f9f7 | 69 | interruption mode. |
<> | 144:ef7eb2e8f9f7 | 70 | |
<> | 144:ef7eb2e8f9f7 | 71 | (##) Encoder Mode: To use the encoder interface call |
<> | 144:ef7eb2e8f9f7 | 72 | HAL_LPTIM_Encoder_Start() or HAL_LPTIM_Encoder_Start_IT() for |
<> | 144:ef7eb2e8f9f7 | 73 | interruption mode. |
<> | 144:ef7eb2e8f9f7 | 74 | |
<> | 144:ef7eb2e8f9f7 | 75 | (##) Time out Mode: an active edge on one selected trigger input rests |
<> | 144:ef7eb2e8f9f7 | 76 | the counter. The first trigger event will start the timer, any |
<> | 144:ef7eb2e8f9f7 | 77 | successive trigger event will reset the counter and the timer will |
<> | 144:ef7eb2e8f9f7 | 78 | restart. To start this mode call HAL_LPTIM_TimeOut_Start_IT() or |
<> | 144:ef7eb2e8f9f7 | 79 | HAL_LPTIM_TimeOut_Start_IT() for interruption mode. |
<> | 144:ef7eb2e8f9f7 | 80 | |
<> | 144:ef7eb2e8f9f7 | 81 | (##) Counter Mode: counter can be used to count external events on |
<> | 144:ef7eb2e8f9f7 | 82 | the LPTIM Input1 or it can be used to count internal clock cycles. |
<> | 144:ef7eb2e8f9f7 | 83 | To start this mode, call HAL_LPTIM_Counter_Start() or |
<> | 144:ef7eb2e8f9f7 | 84 | HAL_LPTIM_Counter_Start_IT() for interruption mode. |
<> | 144:ef7eb2e8f9f7 | 85 | |
<> | 144:ef7eb2e8f9f7 | 86 | |
<> | 144:ef7eb2e8f9f7 | 87 | (#) User can stop any process by calling the corresponding API: |
<> | 144:ef7eb2e8f9f7 | 88 | HAL_LPTIM_Xxx_Stop() or HAL_LPTIM_Xxx_Stop_IT() if the process is |
<> | 144:ef7eb2e8f9f7 | 89 | already started in interruption mode. |
<> | 144:ef7eb2e8f9f7 | 90 | |
<> | 144:ef7eb2e8f9f7 | 91 | (#)Call HAL_LPTIM_DeInit() to deinitialize the LPTIM peripheral. |
<> | 144:ef7eb2e8f9f7 | 92 | |
<> | 144:ef7eb2e8f9f7 | 93 | @endverbatim |
<> | 144:ef7eb2e8f9f7 | 94 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 95 | * @attention |
<> | 144:ef7eb2e8f9f7 | 96 | * |
<> | 144:ef7eb2e8f9f7 | 97 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
<> | 144:ef7eb2e8f9f7 | 98 | * |
<> | 144:ef7eb2e8f9f7 | 99 | * Redistribution and use in source and binary forms, with or without modification, |
<> | 144:ef7eb2e8f9f7 | 100 | * are permitted provided that the following conditions are met: |
<> | 144:ef7eb2e8f9f7 | 101 | * 1. Redistributions of source code must retain the above copyright notice, |
<> | 144:ef7eb2e8f9f7 | 102 | * this list of conditions and the following disclaimer. |
<> | 144:ef7eb2e8f9f7 | 103 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
<> | 144:ef7eb2e8f9f7 | 104 | * this list of conditions and the following disclaimer in the documentation |
<> | 144:ef7eb2e8f9f7 | 105 | * and/or other materials provided with the distribution. |
<> | 144:ef7eb2e8f9f7 | 106 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
<> | 144:ef7eb2e8f9f7 | 107 | * may be used to endorse or promote products derived from this software |
<> | 144:ef7eb2e8f9f7 | 108 | * without specific prior written permission. |
<> | 144:ef7eb2e8f9f7 | 109 | * |
<> | 144:ef7eb2e8f9f7 | 110 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
<> | 144:ef7eb2e8f9f7 | 111 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
<> | 144:ef7eb2e8f9f7 | 112 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
<> | 144:ef7eb2e8f9f7 | 113 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
<> | 144:ef7eb2e8f9f7 | 114 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
<> | 144:ef7eb2e8f9f7 | 115 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
<> | 144:ef7eb2e8f9f7 | 116 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
<> | 144:ef7eb2e8f9f7 | 117 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
<> | 144:ef7eb2e8f9f7 | 118 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
<> | 144:ef7eb2e8f9f7 | 119 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
<> | 144:ef7eb2e8f9f7 | 120 | * |
<> | 144:ef7eb2e8f9f7 | 121 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 122 | */ |
<> | 144:ef7eb2e8f9f7 | 123 | |
<> | 144:ef7eb2e8f9f7 | 124 | /* Includes ------------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 125 | #include "stm32l0xx_hal.h" |
<> | 144:ef7eb2e8f9f7 | 126 | |
<> | 144:ef7eb2e8f9f7 | 127 | /** @addtogroup STM32L0xx_HAL_Driver |
<> | 144:ef7eb2e8f9f7 | 128 | * @{ |
<> | 144:ef7eb2e8f9f7 | 129 | */ |
<> | 144:ef7eb2e8f9f7 | 130 | |
<> | 144:ef7eb2e8f9f7 | 131 | #ifdef HAL_LPTIM_MODULE_ENABLED |
<> | 144:ef7eb2e8f9f7 | 132 | |
<> | 144:ef7eb2e8f9f7 | 133 | /** @addtogroup LPTIM |
<> | 144:ef7eb2e8f9f7 | 134 | * @brief LPTIM HAL module driver. |
<> | 144:ef7eb2e8f9f7 | 135 | * @{ |
<> | 144:ef7eb2e8f9f7 | 136 | */ |
<> | 144:ef7eb2e8f9f7 | 137 | |
<> | 144:ef7eb2e8f9f7 | 138 | /** @addtogroup LPTIM_Exported_Functions |
<> | 144:ef7eb2e8f9f7 | 139 | * @{ |
<> | 144:ef7eb2e8f9f7 | 140 | */ |
<> | 144:ef7eb2e8f9f7 | 141 | |
<> | 144:ef7eb2e8f9f7 | 142 | /** @addtogroup LPTIM_Exported_Functions_Group1 |
<> | 144:ef7eb2e8f9f7 | 143 | * @brief Initialization and Configuration functions. |
<> | 144:ef7eb2e8f9f7 | 144 | * |
<> | 144:ef7eb2e8f9f7 | 145 | @verbatim |
<> | 144:ef7eb2e8f9f7 | 146 | ============================================================================== |
<> | 144:ef7eb2e8f9f7 | 147 | ##### Initialization and de-initialization functions ##### |
<> | 144:ef7eb2e8f9f7 | 148 | ============================================================================== |
<> | 144:ef7eb2e8f9f7 | 149 | [..] This section provides functions allowing to: |
<> | 144:ef7eb2e8f9f7 | 150 | (+) Initialize the LPTIM according to the specified parameters in the |
<> | 144:ef7eb2e8f9f7 | 151 | LPTIM_InitTypeDef and creates the associated handle. |
<> | 144:ef7eb2e8f9f7 | 152 | (+) DeInitialize the LPTIM peripheral. |
<> | 144:ef7eb2e8f9f7 | 153 | (+) Initialize the LPTIM MSP. |
<> | 144:ef7eb2e8f9f7 | 154 | (+) DeInitialize LPTIM MSP. |
<> | 144:ef7eb2e8f9f7 | 155 | |
<> | 144:ef7eb2e8f9f7 | 156 | @endverbatim |
<> | 144:ef7eb2e8f9f7 | 157 | * @{ |
<> | 144:ef7eb2e8f9f7 | 158 | */ |
<> | 144:ef7eb2e8f9f7 | 159 | |
<> | 144:ef7eb2e8f9f7 | 160 | /** |
<> | 144:ef7eb2e8f9f7 | 161 | * @brief Initializes the LPTIM according to the specified parameters in the |
<> | 144:ef7eb2e8f9f7 | 162 | * LPTIM_InitTypeDef and creates the associated handle. |
<> | 144:ef7eb2e8f9f7 | 163 | * @param hlptim : LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 164 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 165 | */ |
<> | 144:ef7eb2e8f9f7 | 166 | HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim) |
<> | 144:ef7eb2e8f9f7 | 167 | { |
<> | 151:5eaa88a5bcc7 | 168 | uint32_t tmpcfgr = 0U; |
<> | 144:ef7eb2e8f9f7 | 169 | |
<> | 144:ef7eb2e8f9f7 | 170 | /* Check the LPTIM handle allocation */ |
<> | 144:ef7eb2e8f9f7 | 171 | if(hlptim == NULL) |
<> | 144:ef7eb2e8f9f7 | 172 | { |
<> | 144:ef7eb2e8f9f7 | 173 | return HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 174 | } |
<> | 144:ef7eb2e8f9f7 | 175 | |
<> | 144:ef7eb2e8f9f7 | 176 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 177 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); |
<> | 144:ef7eb2e8f9f7 | 178 | |
<> | 144:ef7eb2e8f9f7 | 179 | assert_param(IS_LPTIM_CLOCK_SOURCE(hlptim->Init.Clock.Source)); |
<> | 144:ef7eb2e8f9f7 | 180 | assert_param(IS_LPTIM_CLOCK_PRESCALER(hlptim->Init.Clock.Prescaler)); |
<> | 144:ef7eb2e8f9f7 | 181 | if((hlptim->Init.Clock.Source) == LPTIM_CLOCKSOURCE_ULPTIM) |
<> | 144:ef7eb2e8f9f7 | 182 | { |
<> | 144:ef7eb2e8f9f7 | 183 | assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity)); |
<> | 144:ef7eb2e8f9f7 | 184 | assert_param(IS_LPTIM_CLOCK_SAMPLE_TIME(hlptim->Init.UltraLowPowerClock.SampleTime)); |
<> | 144:ef7eb2e8f9f7 | 185 | } |
<> | 144:ef7eb2e8f9f7 | 186 | assert_param(IS_LPTIM_TRG_SOURCE(hlptim->Init.Trigger.Source)); |
<> | 144:ef7eb2e8f9f7 | 187 | if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE) |
<> | 144:ef7eb2e8f9f7 | 188 | { |
<> | 144:ef7eb2e8f9f7 | 189 | assert_param(IS_LPTIM_TRIG_SAMPLE_TIME(hlptim->Init.Trigger.SampleTime)); |
<> | 144:ef7eb2e8f9f7 | 190 | assert_param(IS_LPTIM_EXT_TRG_POLARITY(hlptim->Init.Trigger.ActiveEdge)); |
<> | 144:ef7eb2e8f9f7 | 191 | } |
<> | 144:ef7eb2e8f9f7 | 192 | assert_param(IS_LPTIM_OUTPUT_POLARITY(hlptim->Init.OutputPolarity)); |
<> | 144:ef7eb2e8f9f7 | 193 | assert_param(IS_LPTIM_UPDATE_MODE(hlptim->Init.UpdateMode)); |
<> | 144:ef7eb2e8f9f7 | 194 | assert_param(IS_LPTIM_COUNTER_SOURCE(hlptim->Init.CounterSource)); |
<> | 144:ef7eb2e8f9f7 | 195 | |
<> | 144:ef7eb2e8f9f7 | 196 | if(hlptim->State == HAL_LPTIM_STATE_RESET) |
<> | 144:ef7eb2e8f9f7 | 197 | { |
<> | 144:ef7eb2e8f9f7 | 198 | /* Allocate lock resource and initialize it */ |
<> | 144:ef7eb2e8f9f7 | 199 | hlptim->Lock = HAL_UNLOCKED; |
<> | 144:ef7eb2e8f9f7 | 200 | |
<> | 144:ef7eb2e8f9f7 | 201 | /* Init the low level hardware */ |
<> | 144:ef7eb2e8f9f7 | 202 | HAL_LPTIM_MspInit(hlptim); |
<> | 144:ef7eb2e8f9f7 | 203 | } |
<> | 144:ef7eb2e8f9f7 | 204 | |
<> | 144:ef7eb2e8f9f7 | 205 | /* Change the LPTIM state */ |
<> | 144:ef7eb2e8f9f7 | 206 | hlptim->State = HAL_LPTIM_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 207 | |
<> | 144:ef7eb2e8f9f7 | 208 | /* Get the LPTIMx CFGR value */ |
<> | 144:ef7eb2e8f9f7 | 209 | tmpcfgr = hlptim->Instance->CFGR; |
<> | 144:ef7eb2e8f9f7 | 210 | |
<> | 144:ef7eb2e8f9f7 | 211 | if ((hlptim->Init.Clock.Source) == LPTIM_CLOCKSOURCE_ULPTIM) |
<> | 144:ef7eb2e8f9f7 | 212 | { |
<> | 144:ef7eb2e8f9f7 | 213 | tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKPOL | LPTIM_CFGR_CKFLT)); |
<> | 144:ef7eb2e8f9f7 | 214 | } |
<> | 144:ef7eb2e8f9f7 | 215 | if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE) |
<> | 144:ef7eb2e8f9f7 | 216 | { |
<> | 144:ef7eb2e8f9f7 | 217 | tmpcfgr &= (uint32_t)(~ (LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGSEL)); |
<> | 144:ef7eb2e8f9f7 | 218 | } |
<> | 144:ef7eb2e8f9f7 | 219 | |
<> | 144:ef7eb2e8f9f7 | 220 | /* Clear CKSEL, PRESC, TRIGEN, TRGFLT, WAVPOL, PRELOAD & COUNTMODE bits */ |
<> | 144:ef7eb2e8f9f7 | 221 | tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKSEL | LPTIM_CFGR_TRIGEN | LPTIM_CFGR_PRELOAD | |
<> | 144:ef7eb2e8f9f7 | 222 | LPTIM_CFGR_WAVPOL | LPTIM_CFGR_PRESC | LPTIM_CFGR_COUNTMODE )); |
<> | 144:ef7eb2e8f9f7 | 223 | |
<> | 144:ef7eb2e8f9f7 | 224 | /* Set initialization parameters */ |
<> | 144:ef7eb2e8f9f7 | 225 | tmpcfgr |= (hlptim->Init.Clock.Source | |
<> | 144:ef7eb2e8f9f7 | 226 | hlptim->Init.Clock.Prescaler | |
<> | 144:ef7eb2e8f9f7 | 227 | hlptim->Init.OutputPolarity | |
<> | 144:ef7eb2e8f9f7 | 228 | hlptim->Init.UpdateMode | |
<> | 144:ef7eb2e8f9f7 | 229 | hlptim->Init.CounterSource); |
<> | 144:ef7eb2e8f9f7 | 230 | |
<> | 144:ef7eb2e8f9f7 | 231 | if ((hlptim->Init.Clock.Source) == LPTIM_CLOCKSOURCE_ULPTIM) |
<> | 144:ef7eb2e8f9f7 | 232 | { |
<> | 144:ef7eb2e8f9f7 | 233 | tmpcfgr |= (hlptim->Init.UltraLowPowerClock.Polarity | |
<> | 144:ef7eb2e8f9f7 | 234 | hlptim->Init.UltraLowPowerClock.SampleTime); |
<> | 144:ef7eb2e8f9f7 | 235 | } |
<> | 144:ef7eb2e8f9f7 | 236 | |
<> | 144:ef7eb2e8f9f7 | 237 | if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE) |
<> | 144:ef7eb2e8f9f7 | 238 | { |
<> | 144:ef7eb2e8f9f7 | 239 | /* Enable External trigger and set the trigger source */ |
<> | 144:ef7eb2e8f9f7 | 240 | tmpcfgr |= (hlptim->Init.Trigger.Source | |
<> | 144:ef7eb2e8f9f7 | 241 | hlptim->Init.Trigger.ActiveEdge | |
<> | 144:ef7eb2e8f9f7 | 242 | hlptim->Init.Trigger.SampleTime); |
<> | 144:ef7eb2e8f9f7 | 243 | } |
<> | 144:ef7eb2e8f9f7 | 244 | |
<> | 144:ef7eb2e8f9f7 | 245 | /* Write to LPTIMx CFGR */ |
<> | 144:ef7eb2e8f9f7 | 246 | hlptim->Instance->CFGR = tmpcfgr; |
<> | 144:ef7eb2e8f9f7 | 247 | |
<> | 144:ef7eb2e8f9f7 | 248 | /* Change the LPTIM state */ |
<> | 144:ef7eb2e8f9f7 | 249 | hlptim->State = HAL_LPTIM_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 250 | |
<> | 144:ef7eb2e8f9f7 | 251 | /* Return function status */ |
<> | 144:ef7eb2e8f9f7 | 252 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 253 | } |
<> | 144:ef7eb2e8f9f7 | 254 | |
<> | 144:ef7eb2e8f9f7 | 255 | /** |
<> | 144:ef7eb2e8f9f7 | 256 | * @brief DeInitializes the LPTIM peripheral. |
<> | 144:ef7eb2e8f9f7 | 257 | * @param hlptim : LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 258 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 259 | */ |
<> | 144:ef7eb2e8f9f7 | 260 | HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim) |
<> | 144:ef7eb2e8f9f7 | 261 | { |
<> | 144:ef7eb2e8f9f7 | 262 | /* Check the LPTIM handle allocation */ |
<> | 144:ef7eb2e8f9f7 | 263 | if(hlptim == NULL) |
<> | 144:ef7eb2e8f9f7 | 264 | { |
<> | 144:ef7eb2e8f9f7 | 265 | return HAL_ERROR; |
<> | 144:ef7eb2e8f9f7 | 266 | } |
<> | 144:ef7eb2e8f9f7 | 267 | |
<> | 144:ef7eb2e8f9f7 | 268 | /* Change the LPTIM state */ |
<> | 144:ef7eb2e8f9f7 | 269 | hlptim->State = HAL_LPTIM_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 270 | |
<> | 144:ef7eb2e8f9f7 | 271 | /* Disable the LPTIM Peripheral Clock */ |
<> | 144:ef7eb2e8f9f7 | 272 | __HAL_LPTIM_DISABLE(hlptim); |
<> | 144:ef7eb2e8f9f7 | 273 | |
<> | 144:ef7eb2e8f9f7 | 274 | /* DeInit the low level hardware: CLOCK, NVIC.*/ |
<> | 144:ef7eb2e8f9f7 | 275 | HAL_LPTIM_MspDeInit(hlptim); |
<> | 144:ef7eb2e8f9f7 | 276 | |
<> | 144:ef7eb2e8f9f7 | 277 | /* Change the LPTIM state */ |
<> | 144:ef7eb2e8f9f7 | 278 | hlptim->State = HAL_LPTIM_STATE_RESET; |
<> | 144:ef7eb2e8f9f7 | 279 | |
<> | 144:ef7eb2e8f9f7 | 280 | /* Release Lock */ |
<> | 144:ef7eb2e8f9f7 | 281 | __HAL_UNLOCK(hlptim); |
<> | 144:ef7eb2e8f9f7 | 282 | |
<> | 144:ef7eb2e8f9f7 | 283 | /* Return function status */ |
<> | 144:ef7eb2e8f9f7 | 284 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 285 | } |
<> | 144:ef7eb2e8f9f7 | 286 | |
<> | 144:ef7eb2e8f9f7 | 287 | /** |
<> | 144:ef7eb2e8f9f7 | 288 | * @brief Initializes the LPTIM MSP. |
<> | 144:ef7eb2e8f9f7 | 289 | * @param hlptim : LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 290 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 291 | */ |
<> | 144:ef7eb2e8f9f7 | 292 | __weak void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim) |
<> | 144:ef7eb2e8f9f7 | 293 | { |
<> | 144:ef7eb2e8f9f7 | 294 | /* Prevent unused argument(s) compilation warning */ |
<> | 144:ef7eb2e8f9f7 | 295 | UNUSED(hlptim); |
<> | 144:ef7eb2e8f9f7 | 296 | |
<> | 144:ef7eb2e8f9f7 | 297 | /* NOTE : This function Should not be modified, when the callback is needed, |
<> | 144:ef7eb2e8f9f7 | 298 | the HAL_LPTIM_MspInit could be implemented in the user file |
<> | 144:ef7eb2e8f9f7 | 299 | */ |
<> | 144:ef7eb2e8f9f7 | 300 | } |
<> | 144:ef7eb2e8f9f7 | 301 | |
<> | 144:ef7eb2e8f9f7 | 302 | /** |
<> | 144:ef7eb2e8f9f7 | 303 | * @brief DeInitializes LPTIM MSP. |
<> | 144:ef7eb2e8f9f7 | 304 | * @param hlptim : LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 305 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 306 | */ |
<> | 144:ef7eb2e8f9f7 | 307 | __weak void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim) |
<> | 144:ef7eb2e8f9f7 | 308 | { |
<> | 144:ef7eb2e8f9f7 | 309 | /* Prevent unused argument(s) compilation warning */ |
<> | 144:ef7eb2e8f9f7 | 310 | UNUSED(hlptim); |
<> | 144:ef7eb2e8f9f7 | 311 | |
<> | 144:ef7eb2e8f9f7 | 312 | /* NOTE : This function Should not be modified, when the callback is needed, |
<> | 144:ef7eb2e8f9f7 | 313 | the HAL_LPTIM_MspDeInit could be implemented in the user file |
<> | 144:ef7eb2e8f9f7 | 314 | */ |
<> | 144:ef7eb2e8f9f7 | 315 | } |
<> | 144:ef7eb2e8f9f7 | 316 | |
<> | 144:ef7eb2e8f9f7 | 317 | /** |
<> | 144:ef7eb2e8f9f7 | 318 | * @} |
<> | 144:ef7eb2e8f9f7 | 319 | */ |
<> | 144:ef7eb2e8f9f7 | 320 | |
<> | 144:ef7eb2e8f9f7 | 321 | /** @addtogroup LPTIM_Exported_Functions_Group2 |
<> | 144:ef7eb2e8f9f7 | 322 | * @brief Start-Stop operation functions. |
<> | 144:ef7eb2e8f9f7 | 323 | * |
<> | 144:ef7eb2e8f9f7 | 324 | @verbatim |
<> | 144:ef7eb2e8f9f7 | 325 | ============================================================================== |
<> | 144:ef7eb2e8f9f7 | 326 | ##### LPTIM Start Stop operation functions ##### |
<> | 144:ef7eb2e8f9f7 | 327 | ============================================================================== |
<> | 144:ef7eb2e8f9f7 | 328 | [..] This section provides functions allowing to: |
<> | 144:ef7eb2e8f9f7 | 329 | (+) Start the PWM mode. |
<> | 144:ef7eb2e8f9f7 | 330 | (+) Stop the PWM mode. |
<> | 144:ef7eb2e8f9f7 | 331 | (+) Start the One pulse mode. |
<> | 144:ef7eb2e8f9f7 | 332 | (+) Stop the One pulse mode. |
<> | 144:ef7eb2e8f9f7 | 333 | (+) Start the Set once mode. |
<> | 144:ef7eb2e8f9f7 | 334 | (+) Stop the Set once mode. |
<> | 144:ef7eb2e8f9f7 | 335 | (+) Start the Encoder mode. |
<> | 144:ef7eb2e8f9f7 | 336 | (+) Stop the Encoder mode. |
<> | 144:ef7eb2e8f9f7 | 337 | (+) Start the Timeout mode. |
<> | 144:ef7eb2e8f9f7 | 338 | (+) Stop the Timeout mode. |
<> | 144:ef7eb2e8f9f7 | 339 | (+) Start the Counter mode. |
<> | 144:ef7eb2e8f9f7 | 340 | (+) Stop the Counter mode. |
<> | 144:ef7eb2e8f9f7 | 341 | |
<> | 144:ef7eb2e8f9f7 | 342 | |
<> | 144:ef7eb2e8f9f7 | 343 | @endverbatim |
<> | 144:ef7eb2e8f9f7 | 344 | * @{ |
<> | 144:ef7eb2e8f9f7 | 345 | */ |
<> | 144:ef7eb2e8f9f7 | 346 | |
<> | 144:ef7eb2e8f9f7 | 347 | /** |
<> | 144:ef7eb2e8f9f7 | 348 | * @brief Starts the LPTIM PWM generation. |
<> | 144:ef7eb2e8f9f7 | 349 | * @param hlptim : LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 350 | * @param Period : Specifies the Autoreload value. |
<> | 144:ef7eb2e8f9f7 | 351 | * This parameter must be a value between 0x0000 and 0xFFFF. |
<> | 144:ef7eb2e8f9f7 | 352 | * @param Pulse : Specifies the compare value. |
<> | 144:ef7eb2e8f9f7 | 353 | * This parameter must be a value between 0x0000 and 0xFFFF. |
<> | 144:ef7eb2e8f9f7 | 354 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 355 | */ |
<> | 144:ef7eb2e8f9f7 | 356 | HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse) |
<> | 144:ef7eb2e8f9f7 | 357 | { |
<> | 144:ef7eb2e8f9f7 | 358 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 359 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); |
<> | 144:ef7eb2e8f9f7 | 360 | assert_param(IS_LPTIM_PERIOD(Period)); |
<> | 144:ef7eb2e8f9f7 | 361 | assert_param(IS_LPTIM_PULSE(Pulse)); |
<> | 144:ef7eb2e8f9f7 | 362 | |
<> | 144:ef7eb2e8f9f7 | 363 | /* Set the LPTIM state */ |
<> | 144:ef7eb2e8f9f7 | 364 | hlptim->State= HAL_LPTIM_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 365 | |
<> | 144:ef7eb2e8f9f7 | 366 | /* Reset WAVE bit to set PWM mode */ |
<> | 144:ef7eb2e8f9f7 | 367 | hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE; |
<> | 144:ef7eb2e8f9f7 | 368 | |
<> | 144:ef7eb2e8f9f7 | 369 | /* Enable the Peripheral */ |
<> | 144:ef7eb2e8f9f7 | 370 | __HAL_LPTIM_ENABLE(hlptim); |
<> | 144:ef7eb2e8f9f7 | 371 | |
<> | 144:ef7eb2e8f9f7 | 372 | /* Load the period value in the autoreload register */ |
<> | 144:ef7eb2e8f9f7 | 373 | __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period); |
<> | 144:ef7eb2e8f9f7 | 374 | |
<> | 144:ef7eb2e8f9f7 | 375 | /* Load the pulse value in the compare register */ |
<> | 144:ef7eb2e8f9f7 | 376 | __HAL_LPTIM_COMPARE_SET(hlptim, Pulse); |
<> | 144:ef7eb2e8f9f7 | 377 | |
<> | 144:ef7eb2e8f9f7 | 378 | /* Start timer in continuous mode */ |
<> | 144:ef7eb2e8f9f7 | 379 | __HAL_LPTIM_START_CONTINUOUS(hlptim); |
<> | 144:ef7eb2e8f9f7 | 380 | |
<> | 144:ef7eb2e8f9f7 | 381 | /* Change the TIM state*/ |
<> | 144:ef7eb2e8f9f7 | 382 | hlptim->State= HAL_LPTIM_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 383 | |
<> | 144:ef7eb2e8f9f7 | 384 | /* Return function status */ |
<> | 144:ef7eb2e8f9f7 | 385 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 386 | } |
<> | 144:ef7eb2e8f9f7 | 387 | |
<> | 144:ef7eb2e8f9f7 | 388 | /** |
<> | 144:ef7eb2e8f9f7 | 389 | * @brief Stops the LPTIM PWM generation. |
<> | 144:ef7eb2e8f9f7 | 390 | * @param hlptim : LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 391 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 392 | */ |
<> | 144:ef7eb2e8f9f7 | 393 | HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim) |
<> | 144:ef7eb2e8f9f7 | 394 | { |
<> | 144:ef7eb2e8f9f7 | 395 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 396 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); |
<> | 144:ef7eb2e8f9f7 | 397 | |
<> | 144:ef7eb2e8f9f7 | 398 | /* Set the LPTIM state */ |
<> | 144:ef7eb2e8f9f7 | 399 | hlptim->State= HAL_LPTIM_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 400 | |
<> | 144:ef7eb2e8f9f7 | 401 | /* Disable the Peripheral */ |
<> | 144:ef7eb2e8f9f7 | 402 | __HAL_LPTIM_DISABLE(hlptim); |
<> | 144:ef7eb2e8f9f7 | 403 | |
<> | 144:ef7eb2e8f9f7 | 404 | /* Change the TIM state*/ |
<> | 144:ef7eb2e8f9f7 | 405 | hlptim->State= HAL_LPTIM_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 406 | |
<> | 144:ef7eb2e8f9f7 | 407 | /* Return function status */ |
<> | 144:ef7eb2e8f9f7 | 408 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 409 | } |
<> | 144:ef7eb2e8f9f7 | 410 | |
<> | 144:ef7eb2e8f9f7 | 411 | /** |
<> | 144:ef7eb2e8f9f7 | 412 | * @brief Starts the LPTIM PWM generation in interrupt mode. |
<> | 144:ef7eb2e8f9f7 | 413 | * @param hlptim : LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 414 | * @param Period : Specifies the Autoreload value. |
<> | 144:ef7eb2e8f9f7 | 415 | * This parameter must be a value between 0x0000 and 0xFFFF |
<> | 144:ef7eb2e8f9f7 | 416 | * @param Pulse : Specifies the compare value. |
<> | 144:ef7eb2e8f9f7 | 417 | * This parameter must be a value between 0x0000 and 0xFFFF |
<> | 144:ef7eb2e8f9f7 | 418 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 419 | */ |
<> | 144:ef7eb2e8f9f7 | 420 | HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse) |
<> | 144:ef7eb2e8f9f7 | 421 | { |
<> | 144:ef7eb2e8f9f7 | 422 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 423 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); |
<> | 144:ef7eb2e8f9f7 | 424 | assert_param(IS_LPTIM_PERIOD(Period)); |
<> | 144:ef7eb2e8f9f7 | 425 | assert_param(IS_LPTIM_PULSE(Pulse)); |
<> | 144:ef7eb2e8f9f7 | 426 | |
<> | 144:ef7eb2e8f9f7 | 427 | /* Set the LPTIM state */ |
<> | 144:ef7eb2e8f9f7 | 428 | hlptim->State= HAL_LPTIM_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 429 | |
<> | 144:ef7eb2e8f9f7 | 430 | /* Reset WAVE bit to set PWM mode */ |
<> | 144:ef7eb2e8f9f7 | 431 | hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE; |
<> | 144:ef7eb2e8f9f7 | 432 | |
<> | 144:ef7eb2e8f9f7 | 433 | /* Enable Autoreload write complete interrupt */ |
<> | 144:ef7eb2e8f9f7 | 434 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK); |
<> | 144:ef7eb2e8f9f7 | 435 | |
<> | 144:ef7eb2e8f9f7 | 436 | /* Enable Compare write complete interrupt */ |
<> | 144:ef7eb2e8f9f7 | 437 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK); |
<> | 144:ef7eb2e8f9f7 | 438 | |
<> | 144:ef7eb2e8f9f7 | 439 | /* Enable Autoreload match interrupt */ |
<> | 144:ef7eb2e8f9f7 | 440 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM); |
<> | 144:ef7eb2e8f9f7 | 441 | |
<> | 144:ef7eb2e8f9f7 | 442 | /* Enable Compare match interrupt */ |
<> | 144:ef7eb2e8f9f7 | 443 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM); |
<> | 144:ef7eb2e8f9f7 | 444 | |
<> | 144:ef7eb2e8f9f7 | 445 | /* If external trigger source is used, then enable external trigger interrupt */ |
<> | 144:ef7eb2e8f9f7 | 446 | if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE) |
<> | 144:ef7eb2e8f9f7 | 447 | { |
<> | 144:ef7eb2e8f9f7 | 448 | /* Enable external trigger interrupt */ |
<> | 144:ef7eb2e8f9f7 | 449 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG); |
<> | 144:ef7eb2e8f9f7 | 450 | } |
<> | 144:ef7eb2e8f9f7 | 451 | |
<> | 144:ef7eb2e8f9f7 | 452 | /* Enable the Peripheral */ |
<> | 144:ef7eb2e8f9f7 | 453 | __HAL_LPTIM_ENABLE(hlptim); |
<> | 144:ef7eb2e8f9f7 | 454 | |
<> | 144:ef7eb2e8f9f7 | 455 | /* Load the period value in the autoreload register */ |
<> | 144:ef7eb2e8f9f7 | 456 | __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period); |
<> | 144:ef7eb2e8f9f7 | 457 | |
<> | 144:ef7eb2e8f9f7 | 458 | /* Load the pulse value in the compare register */ |
<> | 144:ef7eb2e8f9f7 | 459 | __HAL_LPTIM_COMPARE_SET(hlptim, Pulse); |
<> | 144:ef7eb2e8f9f7 | 460 | |
<> | 144:ef7eb2e8f9f7 | 461 | /* Start timer in continuous mode */ |
<> | 144:ef7eb2e8f9f7 | 462 | __HAL_LPTIM_START_CONTINUOUS(hlptim); |
<> | 144:ef7eb2e8f9f7 | 463 | |
<> | 144:ef7eb2e8f9f7 | 464 | /* Change the TIM state*/ |
<> | 144:ef7eb2e8f9f7 | 465 | hlptim->State= HAL_LPTIM_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 466 | |
<> | 144:ef7eb2e8f9f7 | 467 | /* Return function status */ |
<> | 144:ef7eb2e8f9f7 | 468 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 469 | } |
<> | 144:ef7eb2e8f9f7 | 470 | |
<> | 144:ef7eb2e8f9f7 | 471 | /** |
<> | 144:ef7eb2e8f9f7 | 472 | * @brief Stops the LPTIM PWM generation in interrupt mode. |
<> | 144:ef7eb2e8f9f7 | 473 | * @param hlptim : LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 474 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 475 | */ |
<> | 144:ef7eb2e8f9f7 | 476 | HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim) |
<> | 144:ef7eb2e8f9f7 | 477 | { |
<> | 144:ef7eb2e8f9f7 | 478 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 479 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); |
<> | 144:ef7eb2e8f9f7 | 480 | |
<> | 144:ef7eb2e8f9f7 | 481 | /* Set the LPTIM state */ |
<> | 144:ef7eb2e8f9f7 | 482 | hlptim->State= HAL_LPTIM_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 483 | |
<> | 144:ef7eb2e8f9f7 | 484 | /* Disable the Peripheral */ |
<> | 144:ef7eb2e8f9f7 | 485 | __HAL_LPTIM_DISABLE(hlptim); |
<> | 144:ef7eb2e8f9f7 | 486 | |
<> | 144:ef7eb2e8f9f7 | 487 | /* Disable Autoreload write complete interrupt */ |
<> | 144:ef7eb2e8f9f7 | 488 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK); |
<> | 144:ef7eb2e8f9f7 | 489 | |
<> | 144:ef7eb2e8f9f7 | 490 | /* Disable Compare write complete interrupt */ |
<> | 144:ef7eb2e8f9f7 | 491 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK); |
<> | 144:ef7eb2e8f9f7 | 492 | |
<> | 144:ef7eb2e8f9f7 | 493 | /* Disable Autoreload match interrupt */ |
<> | 144:ef7eb2e8f9f7 | 494 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM); |
<> | 144:ef7eb2e8f9f7 | 495 | |
<> | 144:ef7eb2e8f9f7 | 496 | /* Disable Compare match interrupt */ |
<> | 144:ef7eb2e8f9f7 | 497 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM); |
<> | 144:ef7eb2e8f9f7 | 498 | |
<> | 144:ef7eb2e8f9f7 | 499 | /* If external trigger source is used, then disable external trigger interrupt */ |
<> | 144:ef7eb2e8f9f7 | 500 | if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE) |
<> | 144:ef7eb2e8f9f7 | 501 | { |
<> | 144:ef7eb2e8f9f7 | 502 | /* Disable external trigger interrupt */ |
<> | 144:ef7eb2e8f9f7 | 503 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG); |
<> | 144:ef7eb2e8f9f7 | 504 | } |
<> | 144:ef7eb2e8f9f7 | 505 | |
<> | 144:ef7eb2e8f9f7 | 506 | /* Change the TIM state*/ |
<> | 144:ef7eb2e8f9f7 | 507 | hlptim->State= HAL_LPTIM_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 508 | |
<> | 144:ef7eb2e8f9f7 | 509 | /* Return function status */ |
<> | 144:ef7eb2e8f9f7 | 510 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 511 | } |
<> | 144:ef7eb2e8f9f7 | 512 | |
<> | 144:ef7eb2e8f9f7 | 513 | /** |
<> | 144:ef7eb2e8f9f7 | 514 | * @brief Starts the LPTIM One pulse generation. |
<> | 144:ef7eb2e8f9f7 | 515 | * @param hlptim : LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 516 | * @param Period : Specifies the Autoreload value. |
<> | 144:ef7eb2e8f9f7 | 517 | * This parameter must be a value between 0x0000 and 0xFFFF. |
<> | 144:ef7eb2e8f9f7 | 518 | * @param Pulse : Specifies the compare value. |
<> | 144:ef7eb2e8f9f7 | 519 | * This parameter must be a value between 0x0000 and 0xFFFF. |
<> | 144:ef7eb2e8f9f7 | 520 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 521 | */ |
<> | 144:ef7eb2e8f9f7 | 522 | HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse) |
<> | 144:ef7eb2e8f9f7 | 523 | { |
<> | 144:ef7eb2e8f9f7 | 524 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 525 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); |
<> | 144:ef7eb2e8f9f7 | 526 | assert_param(IS_LPTIM_PERIOD(Period)); |
<> | 144:ef7eb2e8f9f7 | 527 | assert_param(IS_LPTIM_PULSE(Pulse)); |
<> | 144:ef7eb2e8f9f7 | 528 | |
<> | 144:ef7eb2e8f9f7 | 529 | /* Set the LPTIM state */ |
<> | 144:ef7eb2e8f9f7 | 530 | hlptim->State= HAL_LPTIM_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 531 | |
<> | 144:ef7eb2e8f9f7 | 532 | /* Reset WAVE bit to set one pulse mode */ |
<> | 144:ef7eb2e8f9f7 | 533 | hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE; |
<> | 144:ef7eb2e8f9f7 | 534 | |
<> | 144:ef7eb2e8f9f7 | 535 | /* Enable the Peripheral */ |
<> | 144:ef7eb2e8f9f7 | 536 | __HAL_LPTIM_ENABLE(hlptim); |
<> | 144:ef7eb2e8f9f7 | 537 | |
<> | 144:ef7eb2e8f9f7 | 538 | /* Load the period value in the autoreload register */ |
<> | 144:ef7eb2e8f9f7 | 539 | __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period); |
<> | 144:ef7eb2e8f9f7 | 540 | |
<> | 144:ef7eb2e8f9f7 | 541 | /* Load the pulse value in the compare register */ |
<> | 144:ef7eb2e8f9f7 | 542 | __HAL_LPTIM_COMPARE_SET(hlptim, Pulse); |
<> | 144:ef7eb2e8f9f7 | 543 | |
<> | 144:ef7eb2e8f9f7 | 544 | /* Start timer in single mode */ |
<> | 144:ef7eb2e8f9f7 | 545 | __HAL_LPTIM_START_SINGLE(hlptim); |
<> | 144:ef7eb2e8f9f7 | 546 | |
<> | 144:ef7eb2e8f9f7 | 547 | /* Change the TIM state*/ |
<> | 144:ef7eb2e8f9f7 | 548 | hlptim->State= HAL_LPTIM_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 549 | |
<> | 144:ef7eb2e8f9f7 | 550 | /* Return function status */ |
<> | 144:ef7eb2e8f9f7 | 551 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 552 | } |
<> | 144:ef7eb2e8f9f7 | 553 | |
<> | 144:ef7eb2e8f9f7 | 554 | /** |
<> | 144:ef7eb2e8f9f7 | 555 | * @brief Stops the LPTIM One pulse generation. |
<> | 144:ef7eb2e8f9f7 | 556 | * @param hlptim : LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 557 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 558 | */ |
<> | 144:ef7eb2e8f9f7 | 559 | HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim) |
<> | 144:ef7eb2e8f9f7 | 560 | { |
<> | 144:ef7eb2e8f9f7 | 561 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 562 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); |
<> | 144:ef7eb2e8f9f7 | 563 | |
<> | 144:ef7eb2e8f9f7 | 564 | /* Set the LPTIM state */ |
<> | 144:ef7eb2e8f9f7 | 565 | hlptim->State= HAL_LPTIM_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 566 | |
<> | 144:ef7eb2e8f9f7 | 567 | /* Disable the Peripheral */ |
<> | 144:ef7eb2e8f9f7 | 568 | __HAL_LPTIM_DISABLE(hlptim); |
<> | 144:ef7eb2e8f9f7 | 569 | |
<> | 144:ef7eb2e8f9f7 | 570 | /* Change the TIM state*/ |
<> | 144:ef7eb2e8f9f7 | 571 | hlptim->State= HAL_LPTIM_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 572 | |
<> | 144:ef7eb2e8f9f7 | 573 | /* Return function status */ |
<> | 144:ef7eb2e8f9f7 | 574 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 575 | } |
<> | 144:ef7eb2e8f9f7 | 576 | |
<> | 144:ef7eb2e8f9f7 | 577 | /** |
<> | 144:ef7eb2e8f9f7 | 578 | * @brief Starts the LPTIM One pulse generation in interrupt mode. |
<> | 144:ef7eb2e8f9f7 | 579 | * @param hlptim : LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 580 | * @param Period : Specifies the Autoreload value. |
<> | 144:ef7eb2e8f9f7 | 581 | * This parameter must be a value between 0x0000 and 0xFFFF. |
<> | 144:ef7eb2e8f9f7 | 582 | * @param Pulse : Specifies the compare value. |
<> | 144:ef7eb2e8f9f7 | 583 | * This parameter must be a value between 0x0000 and 0xFFFF. |
<> | 144:ef7eb2e8f9f7 | 584 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 585 | */ |
<> | 144:ef7eb2e8f9f7 | 586 | HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse) |
<> | 144:ef7eb2e8f9f7 | 587 | { |
<> | 144:ef7eb2e8f9f7 | 588 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 589 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); |
<> | 144:ef7eb2e8f9f7 | 590 | assert_param(IS_LPTIM_PERIOD(Period)); |
<> | 144:ef7eb2e8f9f7 | 591 | assert_param(IS_LPTIM_PULSE(Pulse)); |
<> | 144:ef7eb2e8f9f7 | 592 | |
<> | 144:ef7eb2e8f9f7 | 593 | /* Set the LPTIM state */ |
<> | 144:ef7eb2e8f9f7 | 594 | hlptim->State= HAL_LPTIM_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 595 | |
<> | 144:ef7eb2e8f9f7 | 596 | /* Reset WAVE bit to set one pulse mode */ |
<> | 144:ef7eb2e8f9f7 | 597 | hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE; |
<> | 144:ef7eb2e8f9f7 | 598 | |
<> | 144:ef7eb2e8f9f7 | 599 | /* Enable Autoreload write complete interrupt */ |
<> | 144:ef7eb2e8f9f7 | 600 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK); |
<> | 144:ef7eb2e8f9f7 | 601 | |
<> | 144:ef7eb2e8f9f7 | 602 | /* Enable Compare write complete interrupt */ |
<> | 144:ef7eb2e8f9f7 | 603 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK); |
<> | 144:ef7eb2e8f9f7 | 604 | |
<> | 144:ef7eb2e8f9f7 | 605 | /* Enable Autoreload match interrupt */ |
<> | 144:ef7eb2e8f9f7 | 606 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM); |
<> | 144:ef7eb2e8f9f7 | 607 | |
<> | 144:ef7eb2e8f9f7 | 608 | /* Enable Compare match interrupt */ |
<> | 144:ef7eb2e8f9f7 | 609 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM); |
<> | 144:ef7eb2e8f9f7 | 610 | |
<> | 144:ef7eb2e8f9f7 | 611 | /* If external trigger source is used, then enable external trigger interrupt */ |
<> | 144:ef7eb2e8f9f7 | 612 | if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE) |
<> | 144:ef7eb2e8f9f7 | 613 | { |
<> | 144:ef7eb2e8f9f7 | 614 | /* Enable external trigger interrupt */ |
<> | 144:ef7eb2e8f9f7 | 615 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG); |
<> | 144:ef7eb2e8f9f7 | 616 | } |
<> | 144:ef7eb2e8f9f7 | 617 | |
<> | 144:ef7eb2e8f9f7 | 618 | /* Enable the Peripheral */ |
<> | 144:ef7eb2e8f9f7 | 619 | __HAL_LPTIM_ENABLE(hlptim); |
<> | 144:ef7eb2e8f9f7 | 620 | |
<> | 144:ef7eb2e8f9f7 | 621 | /* Load the period value in the autoreload register */ |
<> | 144:ef7eb2e8f9f7 | 622 | __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period); |
<> | 144:ef7eb2e8f9f7 | 623 | |
<> | 144:ef7eb2e8f9f7 | 624 | /* Load the pulse value in the compare register */ |
<> | 144:ef7eb2e8f9f7 | 625 | __HAL_LPTIM_COMPARE_SET(hlptim, Pulse); |
<> | 144:ef7eb2e8f9f7 | 626 | |
<> | 144:ef7eb2e8f9f7 | 627 | /* Start timer in continuous mode */ |
<> | 144:ef7eb2e8f9f7 | 628 | __HAL_LPTIM_START_SINGLE(hlptim); |
<> | 144:ef7eb2e8f9f7 | 629 | |
<> | 144:ef7eb2e8f9f7 | 630 | /* Change the TIM state*/ |
<> | 144:ef7eb2e8f9f7 | 631 | hlptim->State= HAL_LPTIM_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 632 | |
<> | 144:ef7eb2e8f9f7 | 633 | /* Return function status */ |
<> | 144:ef7eb2e8f9f7 | 634 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 635 | } |
<> | 144:ef7eb2e8f9f7 | 636 | |
<> | 144:ef7eb2e8f9f7 | 637 | /** |
<> | 144:ef7eb2e8f9f7 | 638 | * @brief Stops the LPTIM One pulse generation in interrupt mode. |
<> | 144:ef7eb2e8f9f7 | 639 | * @param hlptim : LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 640 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 641 | */ |
<> | 144:ef7eb2e8f9f7 | 642 | HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim) |
<> | 144:ef7eb2e8f9f7 | 643 | { |
<> | 144:ef7eb2e8f9f7 | 644 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 645 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); |
<> | 144:ef7eb2e8f9f7 | 646 | |
<> | 144:ef7eb2e8f9f7 | 647 | /* Set the LPTIM state */ |
<> | 144:ef7eb2e8f9f7 | 648 | hlptim->State= HAL_LPTIM_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 649 | |
<> | 144:ef7eb2e8f9f7 | 650 | /* Disable the Peripheral */ |
<> | 144:ef7eb2e8f9f7 | 651 | __HAL_LPTIM_DISABLE(hlptim); |
<> | 144:ef7eb2e8f9f7 | 652 | |
<> | 144:ef7eb2e8f9f7 | 653 | /* Disable Autoreload write complete interrupt */ |
<> | 144:ef7eb2e8f9f7 | 654 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK); |
<> | 144:ef7eb2e8f9f7 | 655 | |
<> | 144:ef7eb2e8f9f7 | 656 | /* Disable Compare write complete interrupt */ |
<> | 144:ef7eb2e8f9f7 | 657 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK); |
<> | 144:ef7eb2e8f9f7 | 658 | |
<> | 144:ef7eb2e8f9f7 | 659 | /* Disable Autoreload match interrupt */ |
<> | 144:ef7eb2e8f9f7 | 660 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM); |
<> | 144:ef7eb2e8f9f7 | 661 | |
<> | 144:ef7eb2e8f9f7 | 662 | /* Disable Compare match interrupt */ |
<> | 144:ef7eb2e8f9f7 | 663 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM); |
<> | 144:ef7eb2e8f9f7 | 664 | |
<> | 144:ef7eb2e8f9f7 | 665 | /* If external trigger source is used, then disable external trigger interrupt */ |
<> | 144:ef7eb2e8f9f7 | 666 | if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE) |
<> | 144:ef7eb2e8f9f7 | 667 | { |
<> | 144:ef7eb2e8f9f7 | 668 | /* Disable external trigger interrupt */ |
<> | 144:ef7eb2e8f9f7 | 669 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG); |
<> | 144:ef7eb2e8f9f7 | 670 | } |
<> | 144:ef7eb2e8f9f7 | 671 | |
<> | 144:ef7eb2e8f9f7 | 672 | /* Change the TIM state*/ |
<> | 144:ef7eb2e8f9f7 | 673 | hlptim->State= HAL_LPTIM_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 674 | |
<> | 144:ef7eb2e8f9f7 | 675 | /* Return function status */ |
<> | 144:ef7eb2e8f9f7 | 676 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 677 | } |
<> | 144:ef7eb2e8f9f7 | 678 | |
<> | 144:ef7eb2e8f9f7 | 679 | /** |
<> | 144:ef7eb2e8f9f7 | 680 | * @brief Starts the LPTIM in Set once mode. |
<> | 144:ef7eb2e8f9f7 | 681 | * @param hlptim : LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 682 | * @param Period : Specifies the Autoreload value. |
<> | 144:ef7eb2e8f9f7 | 683 | * This parameter must be a value between 0x0000 and 0xFFFF. |
<> | 144:ef7eb2e8f9f7 | 684 | * @param Pulse : Specifies the compare value. |
<> | 144:ef7eb2e8f9f7 | 685 | * This parameter must be a value between 0x0000 and 0xFFFF. |
<> | 144:ef7eb2e8f9f7 | 686 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 687 | */ |
<> | 144:ef7eb2e8f9f7 | 688 | HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse) |
<> | 144:ef7eb2e8f9f7 | 689 | { |
<> | 144:ef7eb2e8f9f7 | 690 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 691 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); |
<> | 144:ef7eb2e8f9f7 | 692 | assert_param(IS_LPTIM_PERIOD(Period)); |
<> | 144:ef7eb2e8f9f7 | 693 | assert_param(IS_LPTIM_PULSE(Pulse)); |
<> | 144:ef7eb2e8f9f7 | 694 | |
<> | 144:ef7eb2e8f9f7 | 695 | /* Set the LPTIM state */ |
<> | 144:ef7eb2e8f9f7 | 696 | hlptim->State= HAL_LPTIM_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 697 | |
<> | 144:ef7eb2e8f9f7 | 698 | /* Set WAVE bit to enable the set once mode */ |
<> | 144:ef7eb2e8f9f7 | 699 | hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE; |
<> | 144:ef7eb2e8f9f7 | 700 | |
<> | 144:ef7eb2e8f9f7 | 701 | /* Enable the Peripheral */ |
<> | 144:ef7eb2e8f9f7 | 702 | __HAL_LPTIM_ENABLE(hlptim); |
<> | 144:ef7eb2e8f9f7 | 703 | |
<> | 144:ef7eb2e8f9f7 | 704 | /* Load the period value in the autoreload register */ |
<> | 144:ef7eb2e8f9f7 | 705 | __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period); |
<> | 144:ef7eb2e8f9f7 | 706 | |
<> | 144:ef7eb2e8f9f7 | 707 | /* Load the pulse value in the compare register */ |
<> | 144:ef7eb2e8f9f7 | 708 | __HAL_LPTIM_COMPARE_SET(hlptim, Pulse); |
<> | 144:ef7eb2e8f9f7 | 709 | |
<> | 144:ef7eb2e8f9f7 | 710 | /* Start timer in continuous mode */ |
<> | 144:ef7eb2e8f9f7 | 711 | __HAL_LPTIM_START_SINGLE(hlptim); |
<> | 144:ef7eb2e8f9f7 | 712 | |
<> | 144:ef7eb2e8f9f7 | 713 | /* Change the TIM state*/ |
<> | 144:ef7eb2e8f9f7 | 714 | hlptim->State= HAL_LPTIM_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 715 | |
<> | 144:ef7eb2e8f9f7 | 716 | /* Return function status */ |
<> | 144:ef7eb2e8f9f7 | 717 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 718 | } |
<> | 144:ef7eb2e8f9f7 | 719 | |
<> | 144:ef7eb2e8f9f7 | 720 | /** |
<> | 144:ef7eb2e8f9f7 | 721 | * @brief Stops the LPTIM Set once mode. |
<> | 144:ef7eb2e8f9f7 | 722 | * @param hlptim : LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 723 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 724 | */ |
<> | 144:ef7eb2e8f9f7 | 725 | HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim) |
<> | 144:ef7eb2e8f9f7 | 726 | { |
<> | 144:ef7eb2e8f9f7 | 727 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 728 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); |
<> | 144:ef7eb2e8f9f7 | 729 | |
<> | 144:ef7eb2e8f9f7 | 730 | /* Set the LPTIM state */ |
<> | 144:ef7eb2e8f9f7 | 731 | hlptim->State= HAL_LPTIM_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 732 | |
<> | 144:ef7eb2e8f9f7 | 733 | /* Disable the Peripheral */ |
<> | 144:ef7eb2e8f9f7 | 734 | __HAL_LPTIM_DISABLE(hlptim); |
<> | 144:ef7eb2e8f9f7 | 735 | |
<> | 144:ef7eb2e8f9f7 | 736 | /* Change the TIM state*/ |
<> | 144:ef7eb2e8f9f7 | 737 | hlptim->State= HAL_LPTIM_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 738 | |
<> | 144:ef7eb2e8f9f7 | 739 | /* Return function status */ |
<> | 144:ef7eb2e8f9f7 | 740 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 741 | } |
<> | 144:ef7eb2e8f9f7 | 742 | |
<> | 144:ef7eb2e8f9f7 | 743 | /** |
<> | 144:ef7eb2e8f9f7 | 744 | * @brief Starts the LPTIM Set once mode in interrupt mode. |
<> | 144:ef7eb2e8f9f7 | 745 | * @param hlptim : LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 746 | * @param Period : Specifies the Autoreload value. |
<> | 144:ef7eb2e8f9f7 | 747 | * This parameter must be a value between 0x0000 and 0xFFFF. |
<> | 144:ef7eb2e8f9f7 | 748 | * @param Pulse : Specifies the compare value. |
<> | 144:ef7eb2e8f9f7 | 749 | * This parameter must be a value between 0x0000 and 0xFFFF. |
<> | 144:ef7eb2e8f9f7 | 750 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 751 | */ |
<> | 144:ef7eb2e8f9f7 | 752 | HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse) |
<> | 144:ef7eb2e8f9f7 | 753 | { |
<> | 144:ef7eb2e8f9f7 | 754 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 755 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); |
<> | 144:ef7eb2e8f9f7 | 756 | assert_param(IS_LPTIM_PERIOD(Period)); |
<> | 144:ef7eb2e8f9f7 | 757 | assert_param(IS_LPTIM_PULSE(Pulse)); |
<> | 144:ef7eb2e8f9f7 | 758 | |
<> | 144:ef7eb2e8f9f7 | 759 | /* Set the LPTIM state */ |
<> | 144:ef7eb2e8f9f7 | 760 | hlptim->State= HAL_LPTIM_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 761 | |
<> | 144:ef7eb2e8f9f7 | 762 | /* Set WAVE bit to enable the set once mode */ |
<> | 144:ef7eb2e8f9f7 | 763 | hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE; |
<> | 144:ef7eb2e8f9f7 | 764 | |
<> | 144:ef7eb2e8f9f7 | 765 | /* Enable Autoreload write complete interrupt */ |
<> | 144:ef7eb2e8f9f7 | 766 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK); |
<> | 144:ef7eb2e8f9f7 | 767 | |
<> | 144:ef7eb2e8f9f7 | 768 | /* Enable Compare write complete interrupt */ |
<> | 144:ef7eb2e8f9f7 | 769 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK); |
<> | 144:ef7eb2e8f9f7 | 770 | |
<> | 144:ef7eb2e8f9f7 | 771 | /* Enable Autoreload match interrupt */ |
<> | 144:ef7eb2e8f9f7 | 772 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM); |
<> | 144:ef7eb2e8f9f7 | 773 | |
<> | 144:ef7eb2e8f9f7 | 774 | /* Enable Compare match interrupt */ |
<> | 144:ef7eb2e8f9f7 | 775 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM); |
<> | 144:ef7eb2e8f9f7 | 776 | |
<> | 144:ef7eb2e8f9f7 | 777 | /* If external trigger source is used, then enable external trigger interrupt */ |
<> | 144:ef7eb2e8f9f7 | 778 | if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE) |
<> | 144:ef7eb2e8f9f7 | 779 | { |
<> | 144:ef7eb2e8f9f7 | 780 | /* Enable external trigger interrupt */ |
<> | 144:ef7eb2e8f9f7 | 781 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG); |
<> | 144:ef7eb2e8f9f7 | 782 | } |
<> | 144:ef7eb2e8f9f7 | 783 | |
<> | 144:ef7eb2e8f9f7 | 784 | /* Enable the Peripheral */ |
<> | 144:ef7eb2e8f9f7 | 785 | __HAL_LPTIM_ENABLE(hlptim); |
<> | 144:ef7eb2e8f9f7 | 786 | |
<> | 144:ef7eb2e8f9f7 | 787 | /* Load the period value in the autoreload register */ |
<> | 144:ef7eb2e8f9f7 | 788 | __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period); |
<> | 144:ef7eb2e8f9f7 | 789 | |
<> | 144:ef7eb2e8f9f7 | 790 | /* Load the pulse value in the compare register */ |
<> | 144:ef7eb2e8f9f7 | 791 | __HAL_LPTIM_COMPARE_SET(hlptim, Pulse); |
<> | 144:ef7eb2e8f9f7 | 792 | |
<> | 144:ef7eb2e8f9f7 | 793 | /* Start timer in continuous mode */ |
<> | 144:ef7eb2e8f9f7 | 794 | __HAL_LPTIM_START_SINGLE(hlptim); |
<> | 144:ef7eb2e8f9f7 | 795 | |
<> | 144:ef7eb2e8f9f7 | 796 | /* Change the TIM state*/ |
<> | 144:ef7eb2e8f9f7 | 797 | hlptim->State= HAL_LPTIM_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 798 | |
<> | 144:ef7eb2e8f9f7 | 799 | /* Return function status */ |
<> | 144:ef7eb2e8f9f7 | 800 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 801 | } |
<> | 144:ef7eb2e8f9f7 | 802 | |
<> | 144:ef7eb2e8f9f7 | 803 | /** |
<> | 144:ef7eb2e8f9f7 | 804 | * @brief Stops the LPTIM Set once mode in interrupt mode. |
<> | 144:ef7eb2e8f9f7 | 805 | * @param hlptim : LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 806 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 807 | */ |
<> | 144:ef7eb2e8f9f7 | 808 | HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim) |
<> | 144:ef7eb2e8f9f7 | 809 | { |
<> | 144:ef7eb2e8f9f7 | 810 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 811 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); |
<> | 144:ef7eb2e8f9f7 | 812 | |
<> | 144:ef7eb2e8f9f7 | 813 | /* Set the LPTIM state */ |
<> | 144:ef7eb2e8f9f7 | 814 | hlptim->State= HAL_LPTIM_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 815 | |
<> | 144:ef7eb2e8f9f7 | 816 | /* Disable the Peripheral */ |
<> | 144:ef7eb2e8f9f7 | 817 | __HAL_LPTIM_DISABLE(hlptim); |
<> | 144:ef7eb2e8f9f7 | 818 | |
<> | 144:ef7eb2e8f9f7 | 819 | /* Disable Autoreload write complete interrupt */ |
<> | 144:ef7eb2e8f9f7 | 820 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK); |
<> | 144:ef7eb2e8f9f7 | 821 | |
<> | 144:ef7eb2e8f9f7 | 822 | /* Disable Compare write complete interrupt */ |
<> | 144:ef7eb2e8f9f7 | 823 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK); |
<> | 144:ef7eb2e8f9f7 | 824 | |
<> | 144:ef7eb2e8f9f7 | 825 | /* Disable Autoreload match interrupt */ |
<> | 144:ef7eb2e8f9f7 | 826 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM); |
<> | 144:ef7eb2e8f9f7 | 827 | |
<> | 144:ef7eb2e8f9f7 | 828 | /* Disable Compare match interrupt */ |
<> | 144:ef7eb2e8f9f7 | 829 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM); |
<> | 144:ef7eb2e8f9f7 | 830 | |
<> | 144:ef7eb2e8f9f7 | 831 | /* If external trigger source is used, then disable external trigger interrupt */ |
<> | 144:ef7eb2e8f9f7 | 832 | if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE) |
<> | 144:ef7eb2e8f9f7 | 833 | { |
<> | 144:ef7eb2e8f9f7 | 834 | /* Disable external trigger interrupt */ |
<> | 144:ef7eb2e8f9f7 | 835 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG); |
<> | 144:ef7eb2e8f9f7 | 836 | } |
<> | 144:ef7eb2e8f9f7 | 837 | |
<> | 144:ef7eb2e8f9f7 | 838 | /* Change the TIM state*/ |
<> | 144:ef7eb2e8f9f7 | 839 | hlptim->State= HAL_LPTIM_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 840 | |
<> | 144:ef7eb2e8f9f7 | 841 | /* Return function status */ |
<> | 144:ef7eb2e8f9f7 | 842 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 843 | } |
<> | 144:ef7eb2e8f9f7 | 844 | |
<> | 144:ef7eb2e8f9f7 | 845 | /** |
<> | 144:ef7eb2e8f9f7 | 846 | * @brief Starts the Encoder interface. |
<> | 144:ef7eb2e8f9f7 | 847 | * @param hlptim : LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 848 | * @param Period : Specifies the Autoreload value. |
<> | 144:ef7eb2e8f9f7 | 849 | * This parameter must be a value between 0x0000 and 0xFFFF. |
<> | 144:ef7eb2e8f9f7 | 850 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 851 | */ |
<> | 144:ef7eb2e8f9f7 | 852 | HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period) |
<> | 144:ef7eb2e8f9f7 | 853 | { |
<> | 151:5eaa88a5bcc7 | 854 | uint32_t tmpcfgr = 0U; |
<> | 144:ef7eb2e8f9f7 | 855 | |
<> | 144:ef7eb2e8f9f7 | 856 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 857 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); |
<> | 144:ef7eb2e8f9f7 | 858 | assert_param(IS_LPTIM_PERIOD(Period)); |
<> | 144:ef7eb2e8f9f7 | 859 | assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC); |
<> | 144:ef7eb2e8f9f7 | 860 | assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1); |
<> | 144:ef7eb2e8f9f7 | 861 | assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity)); |
<> | 144:ef7eb2e8f9f7 | 862 | |
<> | 144:ef7eb2e8f9f7 | 863 | /* Configure edge sensitivity for encoder mode */ |
<> | 144:ef7eb2e8f9f7 | 864 | /* Set the LPTIM state */ |
<> | 144:ef7eb2e8f9f7 | 865 | hlptim->State= HAL_LPTIM_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 866 | |
<> | 144:ef7eb2e8f9f7 | 867 | /* Get the LPTIMx CFGR value */ |
<> | 144:ef7eb2e8f9f7 | 868 | tmpcfgr = hlptim->Instance->CFGR; |
<> | 144:ef7eb2e8f9f7 | 869 | |
<> | 144:ef7eb2e8f9f7 | 870 | /* Clear CKPOL bits */ |
<> | 144:ef7eb2e8f9f7 | 871 | tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL); |
<> | 144:ef7eb2e8f9f7 | 872 | |
<> | 144:ef7eb2e8f9f7 | 873 | /* Set Input polarity */ |
<> | 144:ef7eb2e8f9f7 | 874 | tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity; |
<> | 144:ef7eb2e8f9f7 | 875 | |
<> | 144:ef7eb2e8f9f7 | 876 | /* Write to LPTIMx CFGR */ |
<> | 144:ef7eb2e8f9f7 | 877 | hlptim->Instance->CFGR = tmpcfgr; |
<> | 144:ef7eb2e8f9f7 | 878 | |
<> | 144:ef7eb2e8f9f7 | 879 | /* Set ENC bit to enable the encoder interface */ |
<> | 144:ef7eb2e8f9f7 | 880 | hlptim->Instance->CFGR |= LPTIM_CFGR_ENC; |
<> | 144:ef7eb2e8f9f7 | 881 | |
<> | 144:ef7eb2e8f9f7 | 882 | /* Enable the Peripheral */ |
<> | 144:ef7eb2e8f9f7 | 883 | __HAL_LPTIM_ENABLE(hlptim); |
<> | 144:ef7eb2e8f9f7 | 884 | |
<> | 144:ef7eb2e8f9f7 | 885 | /* Load the period value in the autoreload register */ |
<> | 144:ef7eb2e8f9f7 | 886 | __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period); |
<> | 144:ef7eb2e8f9f7 | 887 | |
<> | 144:ef7eb2e8f9f7 | 888 | /* Start timer in continuous mode */ |
<> | 144:ef7eb2e8f9f7 | 889 | __HAL_LPTIM_START_CONTINUOUS(hlptim); |
<> | 144:ef7eb2e8f9f7 | 890 | |
<> | 144:ef7eb2e8f9f7 | 891 | /* Change the TIM state*/ |
<> | 144:ef7eb2e8f9f7 | 892 | hlptim->State= HAL_LPTIM_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 893 | |
<> | 144:ef7eb2e8f9f7 | 894 | /* Return function status */ |
<> | 144:ef7eb2e8f9f7 | 895 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 896 | } |
<> | 144:ef7eb2e8f9f7 | 897 | |
<> | 144:ef7eb2e8f9f7 | 898 | /** |
<> | 144:ef7eb2e8f9f7 | 899 | * @brief Stops the Encoder interface. |
<> | 144:ef7eb2e8f9f7 | 900 | * @param hlptim : LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 901 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 902 | */ |
<> | 144:ef7eb2e8f9f7 | 903 | HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim) |
<> | 144:ef7eb2e8f9f7 | 904 | { |
<> | 144:ef7eb2e8f9f7 | 905 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 906 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); |
<> | 144:ef7eb2e8f9f7 | 907 | |
<> | 144:ef7eb2e8f9f7 | 908 | /* Set the LPTIM state */ |
<> | 144:ef7eb2e8f9f7 | 909 | hlptim->State= HAL_LPTIM_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 910 | |
<> | 144:ef7eb2e8f9f7 | 911 | /* Disable the Peripheral */ |
<> | 144:ef7eb2e8f9f7 | 912 | __HAL_LPTIM_DISABLE(hlptim); |
<> | 144:ef7eb2e8f9f7 | 913 | |
<> | 144:ef7eb2e8f9f7 | 914 | /* Reset ENC bit to disable the encoder interface */ |
<> | 144:ef7eb2e8f9f7 | 915 | hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC; |
<> | 144:ef7eb2e8f9f7 | 916 | |
<> | 144:ef7eb2e8f9f7 | 917 | /* Change the TIM state*/ |
<> | 144:ef7eb2e8f9f7 | 918 | hlptim->State= HAL_LPTIM_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 919 | |
<> | 144:ef7eb2e8f9f7 | 920 | /* Return function status */ |
<> | 144:ef7eb2e8f9f7 | 921 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 922 | } |
<> | 144:ef7eb2e8f9f7 | 923 | |
<> | 144:ef7eb2e8f9f7 | 924 | /** |
<> | 144:ef7eb2e8f9f7 | 925 | * @brief Starts the Encoder interface in interrupt mode. |
<> | 144:ef7eb2e8f9f7 | 926 | * @param hlptim : LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 927 | * @param Period : Specifies the Autoreload value. |
<> | 144:ef7eb2e8f9f7 | 928 | * This parameter must be a value between 0x0000 and 0xFFFF. |
<> | 144:ef7eb2e8f9f7 | 929 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 930 | */ |
<> | 144:ef7eb2e8f9f7 | 931 | HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period) |
<> | 144:ef7eb2e8f9f7 | 932 | { |
<> | 151:5eaa88a5bcc7 | 933 | uint32_t tmpcfgr = 0U; |
<> | 144:ef7eb2e8f9f7 | 934 | |
<> | 144:ef7eb2e8f9f7 | 935 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 936 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); |
<> | 144:ef7eb2e8f9f7 | 937 | assert_param(IS_LPTIM_PERIOD(Period)); |
<> | 144:ef7eb2e8f9f7 | 938 | assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC); |
<> | 144:ef7eb2e8f9f7 | 939 | assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1); |
<> | 144:ef7eb2e8f9f7 | 940 | assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity)); |
<> | 144:ef7eb2e8f9f7 | 941 | |
<> | 144:ef7eb2e8f9f7 | 942 | /* Set the LPTIM state */ |
<> | 144:ef7eb2e8f9f7 | 943 | hlptim->State= HAL_LPTIM_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 944 | |
<> | 144:ef7eb2e8f9f7 | 945 | /* Configure edge sensitivity for encoder mode */ |
<> | 144:ef7eb2e8f9f7 | 946 | /* Get the LPTIMx CFGR value */ |
<> | 144:ef7eb2e8f9f7 | 947 | tmpcfgr = hlptim->Instance->CFGR; |
<> | 144:ef7eb2e8f9f7 | 948 | |
<> | 144:ef7eb2e8f9f7 | 949 | /* Clear CKPOL bits */ |
<> | 144:ef7eb2e8f9f7 | 950 | tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL); |
<> | 144:ef7eb2e8f9f7 | 951 | |
<> | 144:ef7eb2e8f9f7 | 952 | /* Set Input polarity */ |
<> | 144:ef7eb2e8f9f7 | 953 | tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity; |
<> | 144:ef7eb2e8f9f7 | 954 | |
<> | 144:ef7eb2e8f9f7 | 955 | /* Write to LPTIMx CFGR */ |
<> | 144:ef7eb2e8f9f7 | 956 | hlptim->Instance->CFGR = tmpcfgr; |
<> | 144:ef7eb2e8f9f7 | 957 | |
<> | 144:ef7eb2e8f9f7 | 958 | /* Set ENC bit to enable the encoder interface */ |
<> | 144:ef7eb2e8f9f7 | 959 | hlptim->Instance->CFGR |= LPTIM_CFGR_ENC; |
<> | 144:ef7eb2e8f9f7 | 960 | |
<> | 144:ef7eb2e8f9f7 | 961 | /* Enable "switch to down direction" interrupt */ |
<> | 144:ef7eb2e8f9f7 | 962 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_DOWN); |
<> | 144:ef7eb2e8f9f7 | 963 | |
<> | 144:ef7eb2e8f9f7 | 964 | /* Enable "switch to up direction" interrupt */ |
<> | 144:ef7eb2e8f9f7 | 965 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UP); |
<> | 144:ef7eb2e8f9f7 | 966 | |
<> | 144:ef7eb2e8f9f7 | 967 | /* Enable the Peripheral */ |
<> | 144:ef7eb2e8f9f7 | 968 | __HAL_LPTIM_ENABLE(hlptim); |
<> | 144:ef7eb2e8f9f7 | 969 | |
<> | 144:ef7eb2e8f9f7 | 970 | /* Load the period value in the autoreload register */ |
<> | 144:ef7eb2e8f9f7 | 971 | __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period); |
<> | 144:ef7eb2e8f9f7 | 972 | |
<> | 144:ef7eb2e8f9f7 | 973 | /* Start timer in continuous mode */ |
<> | 144:ef7eb2e8f9f7 | 974 | __HAL_LPTIM_START_CONTINUOUS(hlptim); |
<> | 144:ef7eb2e8f9f7 | 975 | |
<> | 144:ef7eb2e8f9f7 | 976 | /* Change the TIM state*/ |
<> | 144:ef7eb2e8f9f7 | 977 | hlptim->State= HAL_LPTIM_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 978 | |
<> | 144:ef7eb2e8f9f7 | 979 | /* Return function status */ |
<> | 144:ef7eb2e8f9f7 | 980 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 981 | } |
<> | 144:ef7eb2e8f9f7 | 982 | |
<> | 144:ef7eb2e8f9f7 | 983 | /** |
<> | 144:ef7eb2e8f9f7 | 984 | * @brief Stops the Encoder interface in nterrupt mode. |
<> | 144:ef7eb2e8f9f7 | 985 | * @param hlptim : LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 986 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 987 | */ |
<> | 144:ef7eb2e8f9f7 | 988 | HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim) |
<> | 144:ef7eb2e8f9f7 | 989 | { |
<> | 144:ef7eb2e8f9f7 | 990 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 991 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); |
<> | 144:ef7eb2e8f9f7 | 992 | |
<> | 144:ef7eb2e8f9f7 | 993 | /* Set the LPTIM state */ |
<> | 144:ef7eb2e8f9f7 | 994 | hlptim->State= HAL_LPTIM_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 995 | |
<> | 144:ef7eb2e8f9f7 | 996 | /* Disable the Peripheral */ |
<> | 144:ef7eb2e8f9f7 | 997 | __HAL_LPTIM_DISABLE(hlptim); |
<> | 144:ef7eb2e8f9f7 | 998 | |
<> | 144:ef7eb2e8f9f7 | 999 | /* Reset ENC bit to disable the encoder interface */ |
<> | 144:ef7eb2e8f9f7 | 1000 | hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC; |
<> | 144:ef7eb2e8f9f7 | 1001 | |
<> | 144:ef7eb2e8f9f7 | 1002 | /* Disable "switch to down direction" interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1003 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_DOWN); |
<> | 144:ef7eb2e8f9f7 | 1004 | |
<> | 144:ef7eb2e8f9f7 | 1005 | /* Disable "switch to up direction" interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1006 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UP); |
<> | 144:ef7eb2e8f9f7 | 1007 | |
<> | 144:ef7eb2e8f9f7 | 1008 | /* Change the TIM state*/ |
<> | 144:ef7eb2e8f9f7 | 1009 | hlptim->State= HAL_LPTIM_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 1010 | |
<> | 144:ef7eb2e8f9f7 | 1011 | /* Return function status */ |
<> | 144:ef7eb2e8f9f7 | 1012 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1013 | } |
<> | 144:ef7eb2e8f9f7 | 1014 | |
<> | 144:ef7eb2e8f9f7 | 1015 | /** |
<> | 144:ef7eb2e8f9f7 | 1016 | * @brief Starts the Timeout function. The first trigger event will start the |
<> | 144:ef7eb2e8f9f7 | 1017 | * timer, any successive trigger event will reset the counter and |
<> | 144:ef7eb2e8f9f7 | 1018 | * the timer restarts. |
<> | 144:ef7eb2e8f9f7 | 1019 | * @param hlptim : LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 1020 | * @param Period : Specifies the Autoreload value. |
<> | 144:ef7eb2e8f9f7 | 1021 | * This parameter must be a value between 0x0000 and 0xFFFF. |
<> | 144:ef7eb2e8f9f7 | 1022 | * @param Timeout : Specifies the TimeOut value to rest the counter. |
<> | 144:ef7eb2e8f9f7 | 1023 | * This parameter must be a value between 0x0000 and 0xFFFF. |
<> | 144:ef7eb2e8f9f7 | 1024 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 1025 | */ |
<> | 144:ef7eb2e8f9f7 | 1026 | HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout) |
<> | 144:ef7eb2e8f9f7 | 1027 | { |
<> | 144:ef7eb2e8f9f7 | 1028 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 1029 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); |
<> | 144:ef7eb2e8f9f7 | 1030 | assert_param(IS_LPTIM_PERIOD(Period)); |
<> | 144:ef7eb2e8f9f7 | 1031 | assert_param(IS_LPTIM_PULSE(Timeout)); |
<> | 144:ef7eb2e8f9f7 | 1032 | |
<> | 144:ef7eb2e8f9f7 | 1033 | /* Set the LPTIM state */ |
<> | 144:ef7eb2e8f9f7 | 1034 | hlptim->State= HAL_LPTIM_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 1035 | |
<> | 144:ef7eb2e8f9f7 | 1036 | /* Set TIMOUT bit to enable the timeout function */ |
<> | 144:ef7eb2e8f9f7 | 1037 | hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT; |
<> | 144:ef7eb2e8f9f7 | 1038 | |
<> | 144:ef7eb2e8f9f7 | 1039 | /* Enable the Peripheral */ |
<> | 144:ef7eb2e8f9f7 | 1040 | __HAL_LPTIM_ENABLE(hlptim); |
<> | 144:ef7eb2e8f9f7 | 1041 | |
<> | 144:ef7eb2e8f9f7 | 1042 | /* Load the period value in the autoreload register */ |
<> | 144:ef7eb2e8f9f7 | 1043 | __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period); |
<> | 144:ef7eb2e8f9f7 | 1044 | |
<> | 144:ef7eb2e8f9f7 | 1045 | /* Load the Timeout value in the compare register */ |
<> | 144:ef7eb2e8f9f7 | 1046 | __HAL_LPTIM_COMPARE_SET(hlptim, Timeout); |
<> | 144:ef7eb2e8f9f7 | 1047 | |
<> | 144:ef7eb2e8f9f7 | 1048 | /* Start timer in continuous mode */ |
<> | 144:ef7eb2e8f9f7 | 1049 | __HAL_LPTIM_START_CONTINUOUS(hlptim); |
<> | 144:ef7eb2e8f9f7 | 1050 | |
<> | 144:ef7eb2e8f9f7 | 1051 | /* Change the TIM state*/ |
<> | 144:ef7eb2e8f9f7 | 1052 | hlptim->State= HAL_LPTIM_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 1053 | |
<> | 144:ef7eb2e8f9f7 | 1054 | /* Return function status */ |
<> | 144:ef7eb2e8f9f7 | 1055 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1056 | } |
<> | 144:ef7eb2e8f9f7 | 1057 | |
<> | 144:ef7eb2e8f9f7 | 1058 | /** |
<> | 144:ef7eb2e8f9f7 | 1059 | * @brief Stops the Timeout function. |
<> | 144:ef7eb2e8f9f7 | 1060 | * @param hlptim : LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 1061 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 1062 | */ |
<> | 144:ef7eb2e8f9f7 | 1063 | HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim) |
<> | 144:ef7eb2e8f9f7 | 1064 | { |
<> | 144:ef7eb2e8f9f7 | 1065 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 1066 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); |
<> | 144:ef7eb2e8f9f7 | 1067 | |
<> | 144:ef7eb2e8f9f7 | 1068 | /* Set the LPTIM state */ |
<> | 144:ef7eb2e8f9f7 | 1069 | hlptim->State= HAL_LPTIM_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 1070 | |
<> | 144:ef7eb2e8f9f7 | 1071 | /* Disable the Peripheral */ |
<> | 144:ef7eb2e8f9f7 | 1072 | __HAL_LPTIM_DISABLE(hlptim); |
<> | 144:ef7eb2e8f9f7 | 1073 | |
<> | 144:ef7eb2e8f9f7 | 1074 | /* Reset TIMOUT bit to enable the timeout function */ |
<> | 144:ef7eb2e8f9f7 | 1075 | hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT; |
<> | 144:ef7eb2e8f9f7 | 1076 | |
<> | 144:ef7eb2e8f9f7 | 1077 | /* Change the TIM state*/ |
<> | 144:ef7eb2e8f9f7 | 1078 | hlptim->State= HAL_LPTIM_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 1079 | |
<> | 144:ef7eb2e8f9f7 | 1080 | /* Return function status */ |
<> | 144:ef7eb2e8f9f7 | 1081 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1082 | } |
<> | 144:ef7eb2e8f9f7 | 1083 | |
<> | 144:ef7eb2e8f9f7 | 1084 | /** |
<> | 144:ef7eb2e8f9f7 | 1085 | * @brief Starts the Timeout function in interrupt mode. The first trigger |
<> | 144:ef7eb2e8f9f7 | 1086 | * event will start the timer, any successive trigger event will reset |
<> | 144:ef7eb2e8f9f7 | 1087 | * the counter and the timer restarts. |
<> | 144:ef7eb2e8f9f7 | 1088 | * @param hlptim : LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 1089 | * @param Period : Specifies the Autoreload value. |
<> | 144:ef7eb2e8f9f7 | 1090 | * This parameter must be a value between 0x0000 and 0xFFFF. |
<> | 144:ef7eb2e8f9f7 | 1091 | * @param Timeout : Specifies the TimeOut value to rest the counter. |
<> | 144:ef7eb2e8f9f7 | 1092 | * This parameter must be a value between 0x0000 and 0xFFFF. |
<> | 144:ef7eb2e8f9f7 | 1093 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 1094 | */ |
<> | 144:ef7eb2e8f9f7 | 1095 | HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout) |
<> | 144:ef7eb2e8f9f7 | 1096 | { |
<> | 144:ef7eb2e8f9f7 | 1097 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 1098 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); |
<> | 144:ef7eb2e8f9f7 | 1099 | assert_param(IS_LPTIM_PERIOD(Period)); |
<> | 144:ef7eb2e8f9f7 | 1100 | assert_param(IS_LPTIM_PULSE(Timeout)); |
<> | 144:ef7eb2e8f9f7 | 1101 | |
<> | 144:ef7eb2e8f9f7 | 1102 | /* Set the LPTIM state */ |
<> | 144:ef7eb2e8f9f7 | 1103 | hlptim->State= HAL_LPTIM_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 1104 | |
<> | 151:5eaa88a5bcc7 | 1105 | /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */ |
<> | 151:5eaa88a5bcc7 | 1106 | __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT(); |
<> | 151:5eaa88a5bcc7 | 1107 | |
<> | 151:5eaa88a5bcc7 | 1108 | /* Enable rising edge trigger on the LPTIM Wake-up Timer Exti line */ |
<> | 151:5eaa88a5bcc7 | 1109 | __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE(); |
<> | 151:5eaa88a5bcc7 | 1110 | |
<> | 144:ef7eb2e8f9f7 | 1111 | /* Set TIMOUT bit to enable the timeout function */ |
<> | 144:ef7eb2e8f9f7 | 1112 | hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT; |
<> | 144:ef7eb2e8f9f7 | 1113 | |
<> | 144:ef7eb2e8f9f7 | 1114 | /* Enable Compare match interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1115 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM); |
<> | 144:ef7eb2e8f9f7 | 1116 | |
<> | 144:ef7eb2e8f9f7 | 1117 | /* Enable the Peripheral */ |
<> | 144:ef7eb2e8f9f7 | 1118 | __HAL_LPTIM_ENABLE(hlptim); |
<> | 144:ef7eb2e8f9f7 | 1119 | |
<> | 144:ef7eb2e8f9f7 | 1120 | /* Load the period value in the autoreload register */ |
<> | 144:ef7eb2e8f9f7 | 1121 | __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period); |
<> | 144:ef7eb2e8f9f7 | 1122 | |
<> | 144:ef7eb2e8f9f7 | 1123 | /* Load the Timeout value in the compare register */ |
<> | 144:ef7eb2e8f9f7 | 1124 | __HAL_LPTIM_COMPARE_SET(hlptim, Timeout); |
<> | 144:ef7eb2e8f9f7 | 1125 | |
<> | 144:ef7eb2e8f9f7 | 1126 | /* Start timer in continuous mode */ |
<> | 144:ef7eb2e8f9f7 | 1127 | __HAL_LPTIM_START_CONTINUOUS(hlptim); |
<> | 144:ef7eb2e8f9f7 | 1128 | |
<> | 144:ef7eb2e8f9f7 | 1129 | /* Change the TIM state*/ |
<> | 144:ef7eb2e8f9f7 | 1130 | hlptim->State= HAL_LPTIM_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 1131 | |
<> | 144:ef7eb2e8f9f7 | 1132 | /* Return function status */ |
<> | 144:ef7eb2e8f9f7 | 1133 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1134 | } |
<> | 144:ef7eb2e8f9f7 | 1135 | |
<> | 144:ef7eb2e8f9f7 | 1136 | /** |
<> | 144:ef7eb2e8f9f7 | 1137 | * @brief Stops the Timeout function in interrupt mode. |
<> | 144:ef7eb2e8f9f7 | 1138 | * @param hlptim : LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 1139 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 1140 | */ |
<> | 144:ef7eb2e8f9f7 | 1141 | HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim) |
<> | 144:ef7eb2e8f9f7 | 1142 | { |
<> | 144:ef7eb2e8f9f7 | 1143 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 1144 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); |
<> | 144:ef7eb2e8f9f7 | 1145 | |
<> | 144:ef7eb2e8f9f7 | 1146 | /* Set the LPTIM state */ |
<> | 144:ef7eb2e8f9f7 | 1147 | hlptim->State= HAL_LPTIM_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 1148 | |
<> | 151:5eaa88a5bcc7 | 1149 | /* Disable rising edge trigger on the LPTIM Wake-up Timer Exti line */ |
<> | 151:5eaa88a5bcc7 | 1150 | __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE(); |
<> | 151:5eaa88a5bcc7 | 1151 | |
<> | 151:5eaa88a5bcc7 | 1152 | /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */ |
<> | 151:5eaa88a5bcc7 | 1153 | __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT(); |
<> | 151:5eaa88a5bcc7 | 1154 | |
<> | 144:ef7eb2e8f9f7 | 1155 | /* Disable the Peripheral */ |
<> | 144:ef7eb2e8f9f7 | 1156 | __HAL_LPTIM_DISABLE(hlptim); |
<> | 144:ef7eb2e8f9f7 | 1157 | |
<> | 144:ef7eb2e8f9f7 | 1158 | /* Reset TIMOUT bit to enable the timeout function */ |
<> | 144:ef7eb2e8f9f7 | 1159 | hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT; |
<> | 144:ef7eb2e8f9f7 | 1160 | |
<> | 144:ef7eb2e8f9f7 | 1161 | /* Disable Compare match interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1162 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM); |
<> | 144:ef7eb2e8f9f7 | 1163 | |
<> | 144:ef7eb2e8f9f7 | 1164 | /* Change the TIM state*/ |
<> | 144:ef7eb2e8f9f7 | 1165 | hlptim->State= HAL_LPTIM_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 1166 | |
<> | 144:ef7eb2e8f9f7 | 1167 | /* Return function status */ |
<> | 144:ef7eb2e8f9f7 | 1168 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1169 | } |
<> | 144:ef7eb2e8f9f7 | 1170 | |
<> | 144:ef7eb2e8f9f7 | 1171 | /** |
<> | 144:ef7eb2e8f9f7 | 1172 | * @brief Starts the Counter mode. |
<> | 144:ef7eb2e8f9f7 | 1173 | * @param hlptim : LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 1174 | * @param Period : Specifies the Autoreload value. |
<> | 144:ef7eb2e8f9f7 | 1175 | * This parameter must be a value between 0x0000 and 0xFFFF. |
<> | 144:ef7eb2e8f9f7 | 1176 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 1177 | */ |
<> | 144:ef7eb2e8f9f7 | 1178 | HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period) |
<> | 144:ef7eb2e8f9f7 | 1179 | { |
<> | 144:ef7eb2e8f9f7 | 1180 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 1181 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); |
<> | 144:ef7eb2e8f9f7 | 1182 | assert_param(IS_LPTIM_PERIOD(Period)); |
<> | 144:ef7eb2e8f9f7 | 1183 | |
<> | 144:ef7eb2e8f9f7 | 1184 | /* Set the LPTIM state */ |
<> | 144:ef7eb2e8f9f7 | 1185 | hlptim->State= HAL_LPTIM_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 1186 | |
<> | 144:ef7eb2e8f9f7 | 1187 | /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */ |
<> | 144:ef7eb2e8f9f7 | 1188 | if((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM) && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL)) |
<> | 144:ef7eb2e8f9f7 | 1189 | { |
<> | 144:ef7eb2e8f9f7 | 1190 | /* Check if clock is prescaled */ |
<> | 144:ef7eb2e8f9f7 | 1191 | assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler)); |
<> | 144:ef7eb2e8f9f7 | 1192 | /* Set clock prescaler to 0 */ |
<> | 144:ef7eb2e8f9f7 | 1193 | hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC; |
<> | 144:ef7eb2e8f9f7 | 1194 | } |
<> | 144:ef7eb2e8f9f7 | 1195 | |
<> | 144:ef7eb2e8f9f7 | 1196 | /* Enable the Peripheral */ |
<> | 144:ef7eb2e8f9f7 | 1197 | __HAL_LPTIM_ENABLE(hlptim); |
<> | 144:ef7eb2e8f9f7 | 1198 | |
<> | 144:ef7eb2e8f9f7 | 1199 | /* Load the period value in the autoreload register */ |
<> | 144:ef7eb2e8f9f7 | 1200 | __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period); |
<> | 144:ef7eb2e8f9f7 | 1201 | |
<> | 144:ef7eb2e8f9f7 | 1202 | /* Start timer in continuous mode */ |
<> | 144:ef7eb2e8f9f7 | 1203 | __HAL_LPTIM_START_CONTINUOUS(hlptim); |
<> | 144:ef7eb2e8f9f7 | 1204 | |
<> | 144:ef7eb2e8f9f7 | 1205 | /* Change the TIM state*/ |
<> | 144:ef7eb2e8f9f7 | 1206 | hlptim->State= HAL_LPTIM_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 1207 | |
<> | 144:ef7eb2e8f9f7 | 1208 | /* Return function status */ |
<> | 144:ef7eb2e8f9f7 | 1209 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1210 | } |
<> | 144:ef7eb2e8f9f7 | 1211 | |
<> | 144:ef7eb2e8f9f7 | 1212 | /** |
<> | 144:ef7eb2e8f9f7 | 1213 | * @brief Stops the Counter mode. |
<> | 144:ef7eb2e8f9f7 | 1214 | * @param hlptim : LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 1215 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 1216 | */ |
<> | 144:ef7eb2e8f9f7 | 1217 | HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim) |
<> | 144:ef7eb2e8f9f7 | 1218 | { |
<> | 144:ef7eb2e8f9f7 | 1219 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 1220 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); |
<> | 144:ef7eb2e8f9f7 | 1221 | |
<> | 144:ef7eb2e8f9f7 | 1222 | /* Set the LPTIM state */ |
<> | 144:ef7eb2e8f9f7 | 1223 | hlptim->State= HAL_LPTIM_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 1224 | |
<> | 144:ef7eb2e8f9f7 | 1225 | /* Disable the Peripheral */ |
<> | 144:ef7eb2e8f9f7 | 1226 | __HAL_LPTIM_DISABLE(hlptim); |
<> | 144:ef7eb2e8f9f7 | 1227 | |
<> | 144:ef7eb2e8f9f7 | 1228 | /* Change the TIM state*/ |
<> | 144:ef7eb2e8f9f7 | 1229 | hlptim->State= HAL_LPTIM_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 1230 | |
<> | 144:ef7eb2e8f9f7 | 1231 | /* Return function status */ |
<> | 144:ef7eb2e8f9f7 | 1232 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1233 | } |
<> | 144:ef7eb2e8f9f7 | 1234 | |
<> | 144:ef7eb2e8f9f7 | 1235 | /** |
<> | 144:ef7eb2e8f9f7 | 1236 | * @brief Starts the Counter mode in interrupt mode. |
<> | 144:ef7eb2e8f9f7 | 1237 | * @param hlptim : LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 1238 | * @param Period : Specifies the Autoreload value. |
<> | 144:ef7eb2e8f9f7 | 1239 | * This parameter must be a value between 0x0000 and 0xFFFF. |
<> | 144:ef7eb2e8f9f7 | 1240 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 1241 | */ |
<> | 144:ef7eb2e8f9f7 | 1242 | HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period) |
<> | 144:ef7eb2e8f9f7 | 1243 | { |
<> | 144:ef7eb2e8f9f7 | 1244 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 1245 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); |
<> | 144:ef7eb2e8f9f7 | 1246 | assert_param(IS_LPTIM_PERIOD(Period)); |
<> | 144:ef7eb2e8f9f7 | 1247 | |
<> | 144:ef7eb2e8f9f7 | 1248 | /* Set the LPTIM state */ |
<> | 144:ef7eb2e8f9f7 | 1249 | hlptim->State= HAL_LPTIM_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 1250 | |
<> | 151:5eaa88a5bcc7 | 1251 | /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */ |
<> | 151:5eaa88a5bcc7 | 1252 | __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT(); |
<> | 151:5eaa88a5bcc7 | 1253 | |
<> | 151:5eaa88a5bcc7 | 1254 | /* Enable rising edge trigger on the LPTIM Wake-up Timer Exti line */ |
<> | 151:5eaa88a5bcc7 | 1255 | __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_RISING_EDGE(); |
<> | 151:5eaa88a5bcc7 | 1256 | |
<> | 144:ef7eb2e8f9f7 | 1257 | /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */ |
<> | 144:ef7eb2e8f9f7 | 1258 | if((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM) && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL)) |
<> | 144:ef7eb2e8f9f7 | 1259 | { |
<> | 144:ef7eb2e8f9f7 | 1260 | /* Check if clock is prescaled */ |
<> | 144:ef7eb2e8f9f7 | 1261 | assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler)); |
<> | 144:ef7eb2e8f9f7 | 1262 | /* Set clock prescaler to 0 */ |
<> | 144:ef7eb2e8f9f7 | 1263 | hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC; |
<> | 144:ef7eb2e8f9f7 | 1264 | } |
<> | 144:ef7eb2e8f9f7 | 1265 | |
<> | 144:ef7eb2e8f9f7 | 1266 | /* Enable Autoreload write complete interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1267 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK); |
<> | 144:ef7eb2e8f9f7 | 1268 | |
<> | 144:ef7eb2e8f9f7 | 1269 | /* Enable Autoreload match interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1270 | __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM); |
<> | 144:ef7eb2e8f9f7 | 1271 | |
<> | 144:ef7eb2e8f9f7 | 1272 | /* Enable the Peripheral */ |
<> | 144:ef7eb2e8f9f7 | 1273 | __HAL_LPTIM_ENABLE(hlptim); |
<> | 144:ef7eb2e8f9f7 | 1274 | |
<> | 144:ef7eb2e8f9f7 | 1275 | /* Load the period value in the autoreload register */ |
<> | 144:ef7eb2e8f9f7 | 1276 | __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period); |
<> | 144:ef7eb2e8f9f7 | 1277 | |
<> | 144:ef7eb2e8f9f7 | 1278 | /* Start timer in continuous mode */ |
<> | 144:ef7eb2e8f9f7 | 1279 | __HAL_LPTIM_START_CONTINUOUS(hlptim); |
<> | 144:ef7eb2e8f9f7 | 1280 | |
<> | 144:ef7eb2e8f9f7 | 1281 | /* Change the TIM state*/ |
<> | 144:ef7eb2e8f9f7 | 1282 | hlptim->State= HAL_LPTIM_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 1283 | |
<> | 144:ef7eb2e8f9f7 | 1284 | /* Return function status */ |
<> | 144:ef7eb2e8f9f7 | 1285 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1286 | } |
<> | 144:ef7eb2e8f9f7 | 1287 | |
<> | 144:ef7eb2e8f9f7 | 1288 | /** |
<> | 144:ef7eb2e8f9f7 | 1289 | * @brief Stops the Counter mode in interrupt mode. |
<> | 144:ef7eb2e8f9f7 | 1290 | * @param hlptim : LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 1291 | * @retval HAL status |
<> | 144:ef7eb2e8f9f7 | 1292 | */ |
<> | 144:ef7eb2e8f9f7 | 1293 | HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim) |
<> | 144:ef7eb2e8f9f7 | 1294 | { |
<> | 144:ef7eb2e8f9f7 | 1295 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 1296 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); |
<> | 144:ef7eb2e8f9f7 | 1297 | |
<> | 144:ef7eb2e8f9f7 | 1298 | /* Set the LPTIM state */ |
<> | 144:ef7eb2e8f9f7 | 1299 | hlptim->State= HAL_LPTIM_STATE_BUSY; |
<> | 144:ef7eb2e8f9f7 | 1300 | |
<> | 151:5eaa88a5bcc7 | 1301 | /* Disable rising edge trigger on the LPTIM Wake-up Timer Exti line */ |
<> | 151:5eaa88a5bcc7 | 1302 | __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_RISING_EDGE(); |
<> | 151:5eaa88a5bcc7 | 1303 | |
<> | 151:5eaa88a5bcc7 | 1304 | /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */ |
<> | 151:5eaa88a5bcc7 | 1305 | __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT(); |
<> | 151:5eaa88a5bcc7 | 1306 | |
<> | 144:ef7eb2e8f9f7 | 1307 | /* Disable the Peripheral */ |
<> | 144:ef7eb2e8f9f7 | 1308 | __HAL_LPTIM_DISABLE(hlptim); |
<> | 144:ef7eb2e8f9f7 | 1309 | |
<> | 144:ef7eb2e8f9f7 | 1310 | /* Disable Autoreload write complete interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1311 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK); |
<> | 144:ef7eb2e8f9f7 | 1312 | |
<> | 144:ef7eb2e8f9f7 | 1313 | /* Disable Autoreload match interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1314 | __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM); |
<> | 144:ef7eb2e8f9f7 | 1315 | |
<> | 144:ef7eb2e8f9f7 | 1316 | /* Change the TIM state*/ |
<> | 144:ef7eb2e8f9f7 | 1317 | hlptim->State= HAL_LPTIM_STATE_READY; |
<> | 144:ef7eb2e8f9f7 | 1318 | |
<> | 144:ef7eb2e8f9f7 | 1319 | /* Return function status */ |
<> | 144:ef7eb2e8f9f7 | 1320 | return HAL_OK; |
<> | 144:ef7eb2e8f9f7 | 1321 | } |
<> | 144:ef7eb2e8f9f7 | 1322 | |
<> | 144:ef7eb2e8f9f7 | 1323 | /** |
<> | 144:ef7eb2e8f9f7 | 1324 | * @} |
<> | 144:ef7eb2e8f9f7 | 1325 | */ |
<> | 144:ef7eb2e8f9f7 | 1326 | |
<> | 144:ef7eb2e8f9f7 | 1327 | /** @addtogroup LPTIM_Exported_Functions_Group3 |
<> | 144:ef7eb2e8f9f7 | 1328 | * @brief Read operation functions. |
<> | 144:ef7eb2e8f9f7 | 1329 | * |
<> | 144:ef7eb2e8f9f7 | 1330 | @verbatim |
<> | 144:ef7eb2e8f9f7 | 1331 | ============================================================================== |
<> | 144:ef7eb2e8f9f7 | 1332 | ##### LPTIM Read operation functions ##### |
<> | 144:ef7eb2e8f9f7 | 1333 | ============================================================================== |
<> | 144:ef7eb2e8f9f7 | 1334 | [..] This section provides LPTIM Reading functions. |
<> | 144:ef7eb2e8f9f7 | 1335 | (+) Read the counter value. |
<> | 144:ef7eb2e8f9f7 | 1336 | (+) Read the period (Auto-reload) value. |
<> | 144:ef7eb2e8f9f7 | 1337 | (+) Read the pulse (Compare)value. |
<> | 144:ef7eb2e8f9f7 | 1338 | @endverbatim |
<> | 144:ef7eb2e8f9f7 | 1339 | * @{ |
<> | 144:ef7eb2e8f9f7 | 1340 | */ |
<> | 144:ef7eb2e8f9f7 | 1341 | |
<> | 144:ef7eb2e8f9f7 | 1342 | /** |
<> | 144:ef7eb2e8f9f7 | 1343 | * @brief This function returns the current counter value. |
<> | 144:ef7eb2e8f9f7 | 1344 | * @param hlptim: LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 1345 | * @retval Counter value. |
<> | 144:ef7eb2e8f9f7 | 1346 | */ |
<> | 144:ef7eb2e8f9f7 | 1347 | uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim) |
<> | 144:ef7eb2e8f9f7 | 1348 | { |
<> | 144:ef7eb2e8f9f7 | 1349 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 1350 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); |
<> | 144:ef7eb2e8f9f7 | 1351 | |
<> | 144:ef7eb2e8f9f7 | 1352 | return (hlptim->Instance->CNT); |
<> | 144:ef7eb2e8f9f7 | 1353 | } |
<> | 144:ef7eb2e8f9f7 | 1354 | |
<> | 144:ef7eb2e8f9f7 | 1355 | /** |
<> | 144:ef7eb2e8f9f7 | 1356 | * @brief This function return the current Autoreload (Period) value. |
<> | 144:ef7eb2e8f9f7 | 1357 | * @param hlptim: LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 1358 | * @retval Autoreload value. |
<> | 144:ef7eb2e8f9f7 | 1359 | */ |
<> | 144:ef7eb2e8f9f7 | 1360 | uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim) |
<> | 144:ef7eb2e8f9f7 | 1361 | { |
<> | 144:ef7eb2e8f9f7 | 1362 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 1363 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); |
<> | 144:ef7eb2e8f9f7 | 1364 | |
<> | 144:ef7eb2e8f9f7 | 1365 | return (hlptim->Instance->ARR); |
<> | 144:ef7eb2e8f9f7 | 1366 | } |
<> | 144:ef7eb2e8f9f7 | 1367 | |
<> | 144:ef7eb2e8f9f7 | 1368 | /** |
<> | 144:ef7eb2e8f9f7 | 1369 | * @brief This function return the current Compare (Pulse) value. |
<> | 144:ef7eb2e8f9f7 | 1370 | * @param hlptim: LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 1371 | * @retval Compare value. |
<> | 144:ef7eb2e8f9f7 | 1372 | */ |
<> | 144:ef7eb2e8f9f7 | 1373 | uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim) |
<> | 144:ef7eb2e8f9f7 | 1374 | { |
<> | 144:ef7eb2e8f9f7 | 1375 | /* Check the parameters */ |
<> | 144:ef7eb2e8f9f7 | 1376 | assert_param(IS_LPTIM_INSTANCE(hlptim->Instance)); |
<> | 144:ef7eb2e8f9f7 | 1377 | |
<> | 144:ef7eb2e8f9f7 | 1378 | return (hlptim->Instance->CMP); |
<> | 144:ef7eb2e8f9f7 | 1379 | } |
<> | 144:ef7eb2e8f9f7 | 1380 | |
<> | 144:ef7eb2e8f9f7 | 1381 | /** |
<> | 144:ef7eb2e8f9f7 | 1382 | * @} |
<> | 144:ef7eb2e8f9f7 | 1383 | */ |
<> | 144:ef7eb2e8f9f7 | 1384 | |
<> | 144:ef7eb2e8f9f7 | 1385 | |
<> | 144:ef7eb2e8f9f7 | 1386 | |
<> | 144:ef7eb2e8f9f7 | 1387 | /** @addtogroup LPTIM_Exported_Functions_Group4 |
<> | 144:ef7eb2e8f9f7 | 1388 | * @brief LPTIM IRQ handler. |
<> | 144:ef7eb2e8f9f7 | 1389 | * |
<> | 144:ef7eb2e8f9f7 | 1390 | @verbatim |
<> | 144:ef7eb2e8f9f7 | 1391 | ============================================================================== |
<> | 144:ef7eb2e8f9f7 | 1392 | ##### LPTIM IRQ handler ##### |
<> | 144:ef7eb2e8f9f7 | 1393 | ============================================================================== |
<> | 144:ef7eb2e8f9f7 | 1394 | [..] This section provides LPTIM IRQ handler function. |
<> | 144:ef7eb2e8f9f7 | 1395 | |
<> | 144:ef7eb2e8f9f7 | 1396 | @endverbatim |
<> | 144:ef7eb2e8f9f7 | 1397 | * @{ |
<> | 144:ef7eb2e8f9f7 | 1398 | */ |
<> | 144:ef7eb2e8f9f7 | 1399 | |
<> | 144:ef7eb2e8f9f7 | 1400 | /** |
<> | 144:ef7eb2e8f9f7 | 1401 | * @brief This function handles LPTIM interrupt request. |
<> | 144:ef7eb2e8f9f7 | 1402 | * @param hlptim: LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 1403 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 1404 | */ |
<> | 144:ef7eb2e8f9f7 | 1405 | void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim) |
<> | 144:ef7eb2e8f9f7 | 1406 | { |
<> | 144:ef7eb2e8f9f7 | 1407 | /* Compare match interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1408 | if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPM) != RESET) |
<> | 144:ef7eb2e8f9f7 | 1409 | { |
<> | 144:ef7eb2e8f9f7 | 1410 | if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPM) !=RESET) |
<> | 144:ef7eb2e8f9f7 | 1411 | { |
<> | 144:ef7eb2e8f9f7 | 1412 | /* Clear Compare match flag */ |
<> | 144:ef7eb2e8f9f7 | 1413 | __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPM); |
<> | 144:ef7eb2e8f9f7 | 1414 | |
<> | 144:ef7eb2e8f9f7 | 1415 | /* Compare match Callback */ |
<> | 144:ef7eb2e8f9f7 | 1416 | HAL_LPTIM_CompareMatchCallback(hlptim); |
<> | 144:ef7eb2e8f9f7 | 1417 | } |
<> | 144:ef7eb2e8f9f7 | 1418 | } |
<> | 144:ef7eb2e8f9f7 | 1419 | |
<> | 144:ef7eb2e8f9f7 | 1420 | /* Autoreload match interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1421 | if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARRM) != RESET) |
<> | 144:ef7eb2e8f9f7 | 1422 | { |
<> | 144:ef7eb2e8f9f7 | 1423 | if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARRM) !=RESET) |
<> | 144:ef7eb2e8f9f7 | 1424 | { |
<> | 144:ef7eb2e8f9f7 | 1425 | /* Clear Autoreload match flag */ |
<> | 144:ef7eb2e8f9f7 | 1426 | __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARRM); |
<> | 144:ef7eb2e8f9f7 | 1427 | |
<> | 144:ef7eb2e8f9f7 | 1428 | /* Autoreload match Callback */ |
<> | 144:ef7eb2e8f9f7 | 1429 | HAL_LPTIM_AutoReloadMatchCallback(hlptim); |
<> | 144:ef7eb2e8f9f7 | 1430 | } |
<> | 144:ef7eb2e8f9f7 | 1431 | } |
<> | 144:ef7eb2e8f9f7 | 1432 | |
<> | 144:ef7eb2e8f9f7 | 1433 | /* Trigger detected interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1434 | if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_EXTTRIG) != RESET) |
<> | 144:ef7eb2e8f9f7 | 1435 | { |
<> | 144:ef7eb2e8f9f7 | 1436 | if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_EXTTRIG) !=RESET) |
<> | 144:ef7eb2e8f9f7 | 1437 | { |
<> | 144:ef7eb2e8f9f7 | 1438 | /* Clear Trigger detected flag */ |
<> | 144:ef7eb2e8f9f7 | 1439 | __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_EXTTRIG); |
<> | 144:ef7eb2e8f9f7 | 1440 | |
<> | 144:ef7eb2e8f9f7 | 1441 | /* Trigger detected callback */ |
<> | 144:ef7eb2e8f9f7 | 1442 | HAL_LPTIM_TriggerCallback(hlptim); |
<> | 144:ef7eb2e8f9f7 | 1443 | } |
<> | 144:ef7eb2e8f9f7 | 1444 | } |
<> | 144:ef7eb2e8f9f7 | 1445 | |
<> | 144:ef7eb2e8f9f7 | 1446 | /* Compare write interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1447 | if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPOK) != RESET) |
<> | 144:ef7eb2e8f9f7 | 1448 | { |
<> | 144:ef7eb2e8f9f7 | 1449 | if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPOK) !=RESET) |
<> | 144:ef7eb2e8f9f7 | 1450 | { |
<> | 144:ef7eb2e8f9f7 | 1451 | /* Clear Compare write flag */ |
<> | 144:ef7eb2e8f9f7 | 1452 | __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK); |
<> | 144:ef7eb2e8f9f7 | 1453 | |
<> | 144:ef7eb2e8f9f7 | 1454 | /* Compare write Callback */ |
<> | 144:ef7eb2e8f9f7 | 1455 | HAL_LPTIM_CompareWriteCallback(hlptim); |
<> | 144:ef7eb2e8f9f7 | 1456 | } |
<> | 144:ef7eb2e8f9f7 | 1457 | } |
<> | 144:ef7eb2e8f9f7 | 1458 | |
<> | 144:ef7eb2e8f9f7 | 1459 | /* Autoreload write interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1460 | if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARROK) != RESET) |
<> | 144:ef7eb2e8f9f7 | 1461 | { |
<> | 144:ef7eb2e8f9f7 | 1462 | if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARROK) !=RESET) |
<> | 144:ef7eb2e8f9f7 | 1463 | { |
<> | 144:ef7eb2e8f9f7 | 1464 | /* Clear Autoreload write flag */ |
<> | 144:ef7eb2e8f9f7 | 1465 | __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK); |
<> | 144:ef7eb2e8f9f7 | 1466 | |
<> | 144:ef7eb2e8f9f7 | 1467 | /* Autoreload write Callback */ |
<> | 144:ef7eb2e8f9f7 | 1468 | HAL_LPTIM_AutoReloadWriteCallback(hlptim); |
<> | 144:ef7eb2e8f9f7 | 1469 | } |
<> | 144:ef7eb2e8f9f7 | 1470 | } |
<> | 144:ef7eb2e8f9f7 | 1471 | |
<> | 144:ef7eb2e8f9f7 | 1472 | /* Direction counter changed from Down to Up interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1473 | if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_UP) != RESET) |
<> | 144:ef7eb2e8f9f7 | 1474 | { |
<> | 144:ef7eb2e8f9f7 | 1475 | if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_UP) !=RESET) |
<> | 144:ef7eb2e8f9f7 | 1476 | { |
<> | 144:ef7eb2e8f9f7 | 1477 | /* Clear Direction counter changed from Down to Up flag */ |
<> | 144:ef7eb2e8f9f7 | 1478 | __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_UP); |
<> | 144:ef7eb2e8f9f7 | 1479 | |
<> | 144:ef7eb2e8f9f7 | 1480 | /* Direction counter changed from Down to Up Callback */ |
<> | 144:ef7eb2e8f9f7 | 1481 | HAL_LPTIM_DirectionUpCallback(hlptim); |
<> | 144:ef7eb2e8f9f7 | 1482 | } |
<> | 144:ef7eb2e8f9f7 | 1483 | } |
<> | 144:ef7eb2e8f9f7 | 1484 | |
<> | 144:ef7eb2e8f9f7 | 1485 | /* Direction counter changed from Up to Down interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1486 | if(__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_DOWN) != RESET) |
<> | 144:ef7eb2e8f9f7 | 1487 | { |
<> | 144:ef7eb2e8f9f7 | 1488 | if(__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_DOWN) !=RESET) |
<> | 144:ef7eb2e8f9f7 | 1489 | { |
<> | 144:ef7eb2e8f9f7 | 1490 | /* Clear Direction counter changed from Up to Down flag */ |
<> | 144:ef7eb2e8f9f7 | 1491 | __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_DOWN); |
<> | 144:ef7eb2e8f9f7 | 1492 | |
<> | 144:ef7eb2e8f9f7 | 1493 | /* Direction counter changed from Up to Down Callback */ |
<> | 144:ef7eb2e8f9f7 | 1494 | HAL_LPTIM_DirectionDownCallback(hlptim); |
<> | 144:ef7eb2e8f9f7 | 1495 | } |
<> | 144:ef7eb2e8f9f7 | 1496 | } |
<> | 151:5eaa88a5bcc7 | 1497 | |
<> | 151:5eaa88a5bcc7 | 1498 | __HAL_LPTIM_WAKEUPTIMER_EXTI_CLEAR_FLAG(); |
<> | 144:ef7eb2e8f9f7 | 1499 | } |
<> | 144:ef7eb2e8f9f7 | 1500 | |
<> | 144:ef7eb2e8f9f7 | 1501 | /** |
<> | 144:ef7eb2e8f9f7 | 1502 | * @brief Compare match callback in non blocking mode |
<> | 144:ef7eb2e8f9f7 | 1503 | * @param hlptim : LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 1504 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 1505 | */ |
<> | 144:ef7eb2e8f9f7 | 1506 | __weak void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim) |
<> | 144:ef7eb2e8f9f7 | 1507 | { |
<> | 144:ef7eb2e8f9f7 | 1508 | /* Prevent unused argument(s) compilation warning */ |
<> | 144:ef7eb2e8f9f7 | 1509 | UNUSED(hlptim); |
<> | 144:ef7eb2e8f9f7 | 1510 | |
<> | 144:ef7eb2e8f9f7 | 1511 | /* NOTE : This function Should not be modified, when the callback is needed, |
<> | 144:ef7eb2e8f9f7 | 1512 | the HAL_LPTIM_CompareMatchCallback could be implemented in the user file |
<> | 144:ef7eb2e8f9f7 | 1513 | */ |
<> | 144:ef7eb2e8f9f7 | 1514 | } |
<> | 144:ef7eb2e8f9f7 | 1515 | |
<> | 144:ef7eb2e8f9f7 | 1516 | /** |
<> | 144:ef7eb2e8f9f7 | 1517 | * @brief Autoreload match callback in non blocking mode |
<> | 144:ef7eb2e8f9f7 | 1518 | * @param hlptim : LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 1519 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 1520 | */ |
<> | 144:ef7eb2e8f9f7 | 1521 | __weak void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim) |
<> | 144:ef7eb2e8f9f7 | 1522 | { |
<> | 144:ef7eb2e8f9f7 | 1523 | /* Prevent unused argument(s) compilation warning */ |
<> | 144:ef7eb2e8f9f7 | 1524 | UNUSED(hlptim); |
<> | 144:ef7eb2e8f9f7 | 1525 | |
<> | 144:ef7eb2e8f9f7 | 1526 | /* NOTE : This function Should not be modified, when the callback is needed, |
<> | 144:ef7eb2e8f9f7 | 1527 | the HAL_LPTIM_AutoReloadMatchCallback could be implemented in the user file |
<> | 144:ef7eb2e8f9f7 | 1528 | */ |
<> | 144:ef7eb2e8f9f7 | 1529 | } |
<> | 144:ef7eb2e8f9f7 | 1530 | |
<> | 144:ef7eb2e8f9f7 | 1531 | /** |
<> | 144:ef7eb2e8f9f7 | 1532 | * @brief Trigger detected callback in non blocking mode |
<> | 144:ef7eb2e8f9f7 | 1533 | * @param hlptim : LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 1534 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 1535 | */ |
<> | 144:ef7eb2e8f9f7 | 1536 | __weak void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim) |
<> | 144:ef7eb2e8f9f7 | 1537 | { |
<> | 144:ef7eb2e8f9f7 | 1538 | /* Prevent unused argument(s) compilation warning */ |
<> | 144:ef7eb2e8f9f7 | 1539 | UNUSED(hlptim); |
<> | 144:ef7eb2e8f9f7 | 1540 | |
<> | 144:ef7eb2e8f9f7 | 1541 | /* NOTE : This function Should not be modified, when the callback is needed, |
<> | 144:ef7eb2e8f9f7 | 1542 | the HAL_LPTIM_TriggerCallback could be implemented in the user file |
<> | 144:ef7eb2e8f9f7 | 1543 | */ |
<> | 144:ef7eb2e8f9f7 | 1544 | } |
<> | 144:ef7eb2e8f9f7 | 1545 | |
<> | 144:ef7eb2e8f9f7 | 1546 | /** |
<> | 144:ef7eb2e8f9f7 | 1547 | * @brief Compare write callback in non blocking mode |
<> | 144:ef7eb2e8f9f7 | 1548 | * @param hlptim : LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 1549 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 1550 | */ |
<> | 144:ef7eb2e8f9f7 | 1551 | __weak void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim) |
<> | 144:ef7eb2e8f9f7 | 1552 | { |
<> | 144:ef7eb2e8f9f7 | 1553 | /* Prevent unused argument(s) compilation warning */ |
<> | 144:ef7eb2e8f9f7 | 1554 | UNUSED(hlptim); |
<> | 144:ef7eb2e8f9f7 | 1555 | |
<> | 144:ef7eb2e8f9f7 | 1556 | /* NOTE : This function Should not be modified, when the callback is needed, |
<> | 144:ef7eb2e8f9f7 | 1557 | the HAL_LPTIM_CompareWriteCallback could be implemented in the user file |
<> | 144:ef7eb2e8f9f7 | 1558 | */ |
<> | 144:ef7eb2e8f9f7 | 1559 | } |
<> | 144:ef7eb2e8f9f7 | 1560 | |
<> | 144:ef7eb2e8f9f7 | 1561 | /** |
<> | 144:ef7eb2e8f9f7 | 1562 | * @brief Autoreload write callback in non blocking mode |
<> | 144:ef7eb2e8f9f7 | 1563 | * @param hlptim : LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 1564 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 1565 | */ |
<> | 144:ef7eb2e8f9f7 | 1566 | __weak void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim) |
<> | 144:ef7eb2e8f9f7 | 1567 | { |
<> | 144:ef7eb2e8f9f7 | 1568 | /* Prevent unused argument(s) compilation warning */ |
<> | 144:ef7eb2e8f9f7 | 1569 | UNUSED(hlptim); |
<> | 144:ef7eb2e8f9f7 | 1570 | |
<> | 144:ef7eb2e8f9f7 | 1571 | /* NOTE : This function Should not be modified, when the callback is needed, |
<> | 144:ef7eb2e8f9f7 | 1572 | the HAL_LPTIM_AutoReloadWriteCallback could be implemented in the user file |
<> | 144:ef7eb2e8f9f7 | 1573 | */ |
<> | 144:ef7eb2e8f9f7 | 1574 | } |
<> | 144:ef7eb2e8f9f7 | 1575 | |
<> | 144:ef7eb2e8f9f7 | 1576 | /** |
<> | 144:ef7eb2e8f9f7 | 1577 | * @brief Direction counter changed from Down to Up callback in non blocking mode |
<> | 144:ef7eb2e8f9f7 | 1578 | * @param hlptim : LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 1579 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 1580 | */ |
<> | 144:ef7eb2e8f9f7 | 1581 | __weak void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim) |
<> | 144:ef7eb2e8f9f7 | 1582 | { |
<> | 144:ef7eb2e8f9f7 | 1583 | /* Prevent unused argument(s) compilation warning */ |
<> | 144:ef7eb2e8f9f7 | 1584 | UNUSED(hlptim); |
<> | 144:ef7eb2e8f9f7 | 1585 | |
<> | 144:ef7eb2e8f9f7 | 1586 | /* NOTE : This function Should not be modified, when the callback is needed, |
<> | 144:ef7eb2e8f9f7 | 1587 | the HAL_LPTIM_DirectionUpCallback could be implemented in the user file |
<> | 144:ef7eb2e8f9f7 | 1588 | */ |
<> | 144:ef7eb2e8f9f7 | 1589 | } |
<> | 144:ef7eb2e8f9f7 | 1590 | |
<> | 144:ef7eb2e8f9f7 | 1591 | /** |
<> | 144:ef7eb2e8f9f7 | 1592 | * @brief Direction counter changed from Up to Down callback in non blocking mode |
<> | 144:ef7eb2e8f9f7 | 1593 | * @param hlptim : LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 1594 | * @retval None |
<> | 144:ef7eb2e8f9f7 | 1595 | */ |
<> | 144:ef7eb2e8f9f7 | 1596 | __weak void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim) |
<> | 144:ef7eb2e8f9f7 | 1597 | { |
<> | 144:ef7eb2e8f9f7 | 1598 | /* Prevent unused argument(s) compilation warning */ |
<> | 144:ef7eb2e8f9f7 | 1599 | UNUSED(hlptim); |
<> | 144:ef7eb2e8f9f7 | 1600 | |
<> | 144:ef7eb2e8f9f7 | 1601 | /* NOTE : This function Should not be modified, when the callback is needed, |
<> | 144:ef7eb2e8f9f7 | 1602 | the HAL_LPTIM_DirectionDownCallback could be implemented in the user file |
<> | 144:ef7eb2e8f9f7 | 1603 | */ |
<> | 144:ef7eb2e8f9f7 | 1604 | } |
<> | 144:ef7eb2e8f9f7 | 1605 | |
<> | 144:ef7eb2e8f9f7 | 1606 | /** |
<> | 144:ef7eb2e8f9f7 | 1607 | * @} |
<> | 144:ef7eb2e8f9f7 | 1608 | */ |
<> | 144:ef7eb2e8f9f7 | 1609 | |
<> | 144:ef7eb2e8f9f7 | 1610 | /** @addtogroup LPTIM_Exported_Functions_Group5 |
<> | 144:ef7eb2e8f9f7 | 1611 | * @brief Peripheral State functions. |
<> | 144:ef7eb2e8f9f7 | 1612 | * |
<> | 144:ef7eb2e8f9f7 | 1613 | @verbatim |
<> | 144:ef7eb2e8f9f7 | 1614 | ============================================================================== |
<> | 144:ef7eb2e8f9f7 | 1615 | ##### Peripheral State functions ##### |
<> | 144:ef7eb2e8f9f7 | 1616 | ============================================================================== |
<> | 144:ef7eb2e8f9f7 | 1617 | [..] |
<> | 144:ef7eb2e8f9f7 | 1618 | This subsection permits to get in run-time the status of the peripheral. |
<> | 144:ef7eb2e8f9f7 | 1619 | |
<> | 144:ef7eb2e8f9f7 | 1620 | @endverbatim |
<> | 144:ef7eb2e8f9f7 | 1621 | * @{ |
<> | 144:ef7eb2e8f9f7 | 1622 | */ |
<> | 144:ef7eb2e8f9f7 | 1623 | |
<> | 144:ef7eb2e8f9f7 | 1624 | /** |
<> | 144:ef7eb2e8f9f7 | 1625 | * @brief Returns the LPTIM state. |
<> | 144:ef7eb2e8f9f7 | 1626 | * @param hlptim: LPTIM handle |
<> | 144:ef7eb2e8f9f7 | 1627 | * @retval HAL state |
<> | 144:ef7eb2e8f9f7 | 1628 | */ |
<> | 144:ef7eb2e8f9f7 | 1629 | HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim) |
<> | 144:ef7eb2e8f9f7 | 1630 | { |
<> | 144:ef7eb2e8f9f7 | 1631 | return hlptim->State; |
<> | 144:ef7eb2e8f9f7 | 1632 | } |
<> | 144:ef7eb2e8f9f7 | 1633 | |
<> | 144:ef7eb2e8f9f7 | 1634 | /** |
<> | 144:ef7eb2e8f9f7 | 1635 | * @} |
<> | 144:ef7eb2e8f9f7 | 1636 | */ |
<> | 144:ef7eb2e8f9f7 | 1637 | |
<> | 144:ef7eb2e8f9f7 | 1638 | /** |
<> | 144:ef7eb2e8f9f7 | 1639 | * @} |
<> | 144:ef7eb2e8f9f7 | 1640 | */ |
<> | 144:ef7eb2e8f9f7 | 1641 | |
<> | 144:ef7eb2e8f9f7 | 1642 | /** |
<> | 144:ef7eb2e8f9f7 | 1643 | * @} |
<> | 144:ef7eb2e8f9f7 | 1644 | */ |
<> | 144:ef7eb2e8f9f7 | 1645 | |
<> | 144:ef7eb2e8f9f7 | 1646 | /** |
<> | 144:ef7eb2e8f9f7 | 1647 | * @} |
<> | 144:ef7eb2e8f9f7 | 1648 | */ |
<> | 144:ef7eb2e8f9f7 | 1649 | |
<> | 144:ef7eb2e8f9f7 | 1650 | #endif /* HAL_LPTIM_MODULE_ENABLED */ |
<> | 144:ef7eb2e8f9f7 | 1651 | /** |
<> | 144:ef7eb2e8f9f7 | 1652 | * @} |
<> | 144:ef7eb2e8f9f7 | 1653 | */ |
<> | 144:ef7eb2e8f9f7 | 1654 | |
<> | 144:ef7eb2e8f9f7 | 1655 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
<> | 144:ef7eb2e8f9f7 | 1656 |