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mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32L0/device/stm32l0xx_hal_irda.h@151:5eaa88a5bcc7, 2016-11-24 (annotated)

Committer:
<>
Date:
Thu Nov 24 17:03:03 2016 +0000
Revision:
151:5eaa88a5bcc7
Parent:
149:156823d33999
Child:
186:707f6e361f3e
This updates the lib to the mbed lib v130

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32l0xx_hal_irda.h
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 151:5eaa88a5bcc7 5 * @version V1.7.0
<> 151:5eaa88a5bcc7 6 * @date 31-May-2016
<> 144:ef7eb2e8f9f7 7 * @brief Header file of IRDA HAL module.
<> 144:ef7eb2e8f9f7 8 ******************************************************************************
<> 144:ef7eb2e8f9f7 9 * @attention
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 12 *
<> 144:ef7eb2e8f9f7 13 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 14 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 16 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 18 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 19 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 21 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 22 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 23 *
<> 144:ef7eb2e8f9f7 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 34 *
<> 144:ef7eb2e8f9f7 35 ******************************************************************************
<> 144:ef7eb2e8f9f7 36 */
<> 144:ef7eb2e8f9f7 37
<> 144:ef7eb2e8f9f7 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 144:ef7eb2e8f9f7 39 #ifndef __STM32L0xx_HAL_IRDA_H
<> 144:ef7eb2e8f9f7 40 #define __STM32L0xx_HAL_IRDA_H
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 43 extern "C" {
<> 144:ef7eb2e8f9f7 44 #endif
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 47 #include "stm32l0xx_hal_def.h"
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 /** @addtogroup STM32L0xx_HAL_Driver
<> 144:ef7eb2e8f9f7 50 * @{
<> 144:ef7eb2e8f9f7 51 */
<> 144:ef7eb2e8f9f7 52
<> 144:ef7eb2e8f9f7 53 /** @defgroup IRDA IRDA
<> 144:ef7eb2e8f9f7 54 * @{
<> 144:ef7eb2e8f9f7 55 */
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 /** @defgroup IRDA_Exported_Types IRDA Exported Types
<> 144:ef7eb2e8f9f7 58 * @{
<> 144:ef7eb2e8f9f7 59 */
<> 144:ef7eb2e8f9f7 60 /* Exported types ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 61
<> 144:ef7eb2e8f9f7 62 /**
<> 144:ef7eb2e8f9f7 63 * @brief IRDA Init Structure definition
<> 144:ef7eb2e8f9f7 64 */
<> 144:ef7eb2e8f9f7 65 typedef struct
<> 144:ef7eb2e8f9f7 66 {
<> 144:ef7eb2e8f9f7 67 uint32_t BaudRate; /*!< This member configures the IRDA communication baud rate.
<> 144:ef7eb2e8f9f7 68 The baud rate register is computed using the following formula:
<> 144:ef7eb2e8f9f7 69 Baud Rate Register = ((PCLKx) / ((hirda->Init.BaudRate))) */
<> 144:ef7eb2e8f9f7 70
<> 144:ef7eb2e8f9f7 71 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
<> 144:ef7eb2e8f9f7 72 This parameter can be a value of @ref IRDAEx_Word_Length */
<> 144:ef7eb2e8f9f7 73
<> 144:ef7eb2e8f9f7 74 uint32_t Parity; /*!< Specifies the parity mode.
<> 144:ef7eb2e8f9f7 75 This parameter can be a value of @ref IRDA_Parity
<> 144:ef7eb2e8f9f7 76 @note When parity is enabled, the computed parity is inserted
<> 144:ef7eb2e8f9f7 77 at the MSB position of the transmitted data (9th bit when
<> 144:ef7eb2e8f9f7 78 the word length is set to 9 data bits; 8th bit when the
<> 144:ef7eb2e8f9f7 79 word length is set to 8 data bits). */
<> 144:ef7eb2e8f9f7 80
<> 144:ef7eb2e8f9f7 81 uint16_t Mode; /*!< Specifies wether the Receive or Transmit mode is enabled or disabled.
<> 144:ef7eb2e8f9f7 82 This parameter can be a value of @ref IRDA_Transfer_Mode */
<> 144:ef7eb2e8f9f7 83
<> 144:ef7eb2e8f9f7 84 uint8_t Prescaler; /*!< Specifies the Prescaler value for dividing the UART/USART source clock
<> 144:ef7eb2e8f9f7 85 to achieve low-power frequency.
<> 144:ef7eb2e8f9f7 86 @note Prescaler value 0 is forbidden */
<> 144:ef7eb2e8f9f7 87
<> 144:ef7eb2e8f9f7 88 uint16_t PowerMode; /*!< Specifies the IRDA power mode.
<> 144:ef7eb2e8f9f7 89 This parameter can be a value of @ref IRDA_Low_Power */
<> 144:ef7eb2e8f9f7 90 }IRDA_InitTypeDef;
<> 144:ef7eb2e8f9f7 91
<> 144:ef7eb2e8f9f7 92 /**
<> 144:ef7eb2e8f9f7 93 * @brief HAL IRDA State structures definition
<> 144:ef7eb2e8f9f7 94 */
<> 144:ef7eb2e8f9f7 95 typedef enum
<> 144:ef7eb2e8f9f7 96 {
<> 151:5eaa88a5bcc7 97 HAL_IRDA_STATE_RESET = 0x00U, /*!< Peripheral is not yet Initialized */
<> 151:5eaa88a5bcc7 98 HAL_IRDA_STATE_READY = 0x01U, /*!< Peripheral Initialized and ready for use */
<> 151:5eaa88a5bcc7 99 HAL_IRDA_STATE_BUSY = 0x02U, /*!< an internal process is ongoing */
<> 151:5eaa88a5bcc7 100 HAL_IRDA_STATE_BUSY_TX = 0x12U, /*!< Data Transmission process is ongoing */
<> 151:5eaa88a5bcc7 101 HAL_IRDA_STATE_BUSY_RX = 0x22U, /*!< Data Reception process is ongoing */
<> 151:5eaa88a5bcc7 102 HAL_IRDA_STATE_BUSY_TX_RX = 0x32U, /*!< Data Transmission and Reception process is ongoing */
<> 151:5eaa88a5bcc7 103 HAL_IRDA_STATE_TIMEOUT = 0x03U, /*!< Timeout state */
<> 151:5eaa88a5bcc7 104 HAL_IRDA_STATE_ERROR = 0x04U /*!< Error */
<> 144:ef7eb2e8f9f7 105 }HAL_IRDA_StateTypeDef;
<> 144:ef7eb2e8f9f7 106
<> 144:ef7eb2e8f9f7 107
<> 144:ef7eb2e8f9f7 108
<> 144:ef7eb2e8f9f7 109
<> 144:ef7eb2e8f9f7 110 /**
<> 144:ef7eb2e8f9f7 111 * @brief IRDA handle Structure definition
<> 144:ef7eb2e8f9f7 112 */
<> 144:ef7eb2e8f9f7 113 typedef struct
<> 144:ef7eb2e8f9f7 114 {
<> 144:ef7eb2e8f9f7 115 USART_TypeDef *Instance; /* IRDA registers base address */
<> 144:ef7eb2e8f9f7 116
<> 144:ef7eb2e8f9f7 117 IRDA_InitTypeDef Init; /* IRDA communication parameters */
<> 144:ef7eb2e8f9f7 118
<> 144:ef7eb2e8f9f7 119 uint8_t *pTxBuffPtr; /* Pointer to IRDA Tx transfer Buffer */
<> 144:ef7eb2e8f9f7 120
<> 144:ef7eb2e8f9f7 121 uint16_t TxXferSize; /* IRDA Tx Transfer size */
<> 144:ef7eb2e8f9f7 122
<> 144:ef7eb2e8f9f7 123 uint16_t TxXferCount; /* IRDA Tx Transfer Counter */
<> 144:ef7eb2e8f9f7 124
<> 144:ef7eb2e8f9f7 125 uint8_t *pRxBuffPtr; /* Pointer to IRDA Rx transfer Buffer */
<> 144:ef7eb2e8f9f7 126
<> 144:ef7eb2e8f9f7 127 uint16_t RxXferSize; /* IRDA Rx Transfer size */
<> 144:ef7eb2e8f9f7 128
<> 144:ef7eb2e8f9f7 129 uint16_t RxXferCount; /* IRDA Rx Transfer Counter */
<> 144:ef7eb2e8f9f7 130
<> 144:ef7eb2e8f9f7 131 uint16_t Mask; /* IRDA RX RDR register mask */
<> 144:ef7eb2e8f9f7 132
<> 144:ef7eb2e8f9f7 133 DMA_HandleTypeDef *hdmatx; /* IRDA Tx DMA Handle parameters */
<> 144:ef7eb2e8f9f7 134
<> 144:ef7eb2e8f9f7 135 DMA_HandleTypeDef *hdmarx; /* IRDA Rx DMA Handle parameters */
<> 144:ef7eb2e8f9f7 136
<> 144:ef7eb2e8f9f7 137 HAL_LockTypeDef Lock; /* Locking object */
<> 144:ef7eb2e8f9f7 138
<> 144:ef7eb2e8f9f7 139 __IO HAL_IRDA_StateTypeDef State; /* IRDA communication state */
<> 144:ef7eb2e8f9f7 140
<> 144:ef7eb2e8f9f7 141 __IO uint32_t ErrorCode; /* IRDA Error code */
<> 144:ef7eb2e8f9f7 142
<> 144:ef7eb2e8f9f7 143 }IRDA_HandleTypeDef;
<> 144:ef7eb2e8f9f7 144
<> 144:ef7eb2e8f9f7 145 /**
<> 144:ef7eb2e8f9f7 146 * @}
<> 144:ef7eb2e8f9f7 147 */
<> 144:ef7eb2e8f9f7 148
<> 144:ef7eb2e8f9f7 149 /**
<> 144:ef7eb2e8f9f7 150 * @brief IRDA Configuration enumeration values definition
<> 144:ef7eb2e8f9f7 151 */
<> 144:ef7eb2e8f9f7 152
<> 144:ef7eb2e8f9f7 153 /* Exported constants --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 154 /** @defgroup IRDA_Exported_Constants IRDA Exported Constants
<> 144:ef7eb2e8f9f7 155 * @{
<> 144:ef7eb2e8f9f7 156 */
<> 144:ef7eb2e8f9f7 157
<> 144:ef7eb2e8f9f7 158 /**
<> 144:ef7eb2e8f9f7 159 * @brief HAL IRDA Error Code definition
<> 144:ef7eb2e8f9f7 160 */
<> 144:ef7eb2e8f9f7 161
<> 151:5eaa88a5bcc7 162 #define HAL_IRDA_ERROR_NONE ((uint32_t)0x00U) /*!< No error */
<> 151:5eaa88a5bcc7 163 #define HAL_IRDA_ERROR_PE ((uint32_t)0x01U) /*!< Parity error */
<> 151:5eaa88a5bcc7 164 #define HAL_IRDA_ERROR_NE ((uint32_t)0x02U) /*!< Noise error */
<> 151:5eaa88a5bcc7 165 #define HAL_IRDA_ERROR_FE ((uint32_t)0x04U) /*!< frame error */
<> 151:5eaa88a5bcc7 166 #define HAL_IRDA_ERROR_ORE ((uint32_t)0x08U) /*!< Overrun error */
<> 151:5eaa88a5bcc7 167 #define HAL_IRDA_ERROR_DMA ((uint32_t)0x10U) /*!< DMA transfer error */
<> 144:ef7eb2e8f9f7 168
<> 144:ef7eb2e8f9f7 169 /**
<> 144:ef7eb2e8f9f7 170 * @brief IRDA clock sources definition
<> 144:ef7eb2e8f9f7 171 */
<> 144:ef7eb2e8f9f7 172 typedef enum
<> 144:ef7eb2e8f9f7 173 {
<> 151:5eaa88a5bcc7 174 IRDA_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */
<> 151:5eaa88a5bcc7 175 IRDA_CLOCKSOURCE_PCLK2 = 0x01U, /*!< PCLK2 clock source */
<> 151:5eaa88a5bcc7 176 IRDA_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */
<> 151:5eaa88a5bcc7 177 IRDA_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */
<> 151:5eaa88a5bcc7 178 IRDA_CLOCKSOURCE_LSE = 0x08U /*!< LSE clock source */
<> 144:ef7eb2e8f9f7 179 }IRDA_ClockSourceTypeDef;
<> 144:ef7eb2e8f9f7 180
<> 144:ef7eb2e8f9f7 181 /** @defgroup IRDA_Parity IRDA Parity
<> 144:ef7eb2e8f9f7 182 * @{
<> 144:ef7eb2e8f9f7 183 */
<> 151:5eaa88a5bcc7 184 #define IRDA_PARITY_NONE ((uint32_t)0x0000U)
<> 144:ef7eb2e8f9f7 185 #define IRDA_PARITY_EVEN ((uint32_t)USART_CR1_PCE)
<> 144:ef7eb2e8f9f7 186 #define IRDA_PARITY_ODD ((uint32_t)(USART_CR1_PCE | USART_CR1_PS))
<> 144:ef7eb2e8f9f7 187 #define IS_IRDA_PARITY(PARITY) (((PARITY) == IRDA_PARITY_NONE) || \
<> 144:ef7eb2e8f9f7 188 ((PARITY) == IRDA_PARITY_EVEN) || \
<> 144:ef7eb2e8f9f7 189 ((PARITY) == IRDA_PARITY_ODD))
<> 144:ef7eb2e8f9f7 190 /**
<> 144:ef7eb2e8f9f7 191 * @}
<> 144:ef7eb2e8f9f7 192 */
<> 144:ef7eb2e8f9f7 193
<> 144:ef7eb2e8f9f7 194
<> 144:ef7eb2e8f9f7 195 /** @defgroup IRDA_Transfer_Mode IRDA transfer mode
<> 144:ef7eb2e8f9f7 196 * @{
<> 144:ef7eb2e8f9f7 197 */
<> 144:ef7eb2e8f9f7 198 #define IRDA_MODE_RX ((uint32_t)USART_CR1_RE)
<> 144:ef7eb2e8f9f7 199 #define IRDA_MODE_TX ((uint32_t)USART_CR1_TE)
<> 144:ef7eb2e8f9f7 200 #define IRDA_MODE_TX_RX ((uint32_t)(USART_CR1_TE |USART_CR1_RE))
<> 144:ef7eb2e8f9f7 201 #define IS_IRDA_TX_RX_MODE(MODE) ((((MODE) & (~((uint32_t)(IRDA_MODE_TX_RX)))) == (uint32_t)0x00) && ((MODE) != (uint32_t)0x00))
<> 144:ef7eb2e8f9f7 202 /**
<> 144:ef7eb2e8f9f7 203 * @}
<> 144:ef7eb2e8f9f7 204 */
<> 144:ef7eb2e8f9f7 205
<> 144:ef7eb2e8f9f7 206 /** @defgroup IRDA_Low_Power IRDA low power
<> 144:ef7eb2e8f9f7 207 * @{
<> 144:ef7eb2e8f9f7 208 */
<> 151:5eaa88a5bcc7 209 #define IRDA_POWERMODE_NORMAL ((uint32_t)0x0000U)
<> 144:ef7eb2e8f9f7 210 #define IRDA_POWERMODE_LOWPOWER ((uint32_t)USART_CR3_IRLP)
<> 144:ef7eb2e8f9f7 211 #define IS_IRDA_POWERMODE(MODE) (((MODE) == IRDA_POWERMODE_LOWPOWER) || \
<> 144:ef7eb2e8f9f7 212 ((MODE) == IRDA_POWERMODE_NORMAL))
<> 144:ef7eb2e8f9f7 213 /**
<> 144:ef7eb2e8f9f7 214 * @}
<> 144:ef7eb2e8f9f7 215 */
<> 144:ef7eb2e8f9f7 216
<> 144:ef7eb2e8f9f7 217 /** @defgroup IRDA_State IRDA State
<> 144:ef7eb2e8f9f7 218 * @{
<> 144:ef7eb2e8f9f7 219 */
<> 151:5eaa88a5bcc7 220 #define IRDA_STATE_DISABLE ((uint32_t)0x0000U)
<> 144:ef7eb2e8f9f7 221 #define IRDA_STATE_ENABLE ((uint32_t)USART_CR1_UE)
<> 144:ef7eb2e8f9f7 222 #define IS_IRDA_STATE(STATE) (((STATE) == IRDA_STATE_DISABLE) || \
<> 144:ef7eb2e8f9f7 223 ((STATE) == IRDA_STATE_ENABLE))
<> 144:ef7eb2e8f9f7 224 /**
<> 144:ef7eb2e8f9f7 225 * @}
<> 144:ef7eb2e8f9f7 226 */
<> 144:ef7eb2e8f9f7 227
<> 144:ef7eb2e8f9f7 228 /** @defgroup IRDA_Mode IRDA Mode
<> 144:ef7eb2e8f9f7 229 * @{
<> 144:ef7eb2e8f9f7 230 */
<> 151:5eaa88a5bcc7 231 #define IRDA_MODE_DISABLE ((uint32_t)0x0000U)
<> 144:ef7eb2e8f9f7 232 #define IRDA_MODE_ENABLE ((uint32_t)USART_CR3_IREN)
<> 144:ef7eb2e8f9f7 233 #define IS_IRDA_MODE(STATE) (((STATE) == IRDA_MODE_DISABLE) || \
<> 144:ef7eb2e8f9f7 234 ((STATE) == IRDA_MODE_ENABLE))
<> 144:ef7eb2e8f9f7 235 /**
<> 144:ef7eb2e8f9f7 236 * @}
<> 144:ef7eb2e8f9f7 237 */
<> 144:ef7eb2e8f9f7 238
<> 144:ef7eb2e8f9f7 239 /** @defgroup IRDA_One_Bit IRDA One bit
<> 144:ef7eb2e8f9f7 240 * @{
<> 144:ef7eb2e8f9f7 241 */
<> 151:5eaa88a5bcc7 242 #define IRDA_ONE_BIT_SAMPLE_DISABLE ((uint32_t)0x00000000U)
<> 144:ef7eb2e8f9f7 243 #define IRDA_ONE_BIT_SAMPLE_ENABLE ((uint32_t)USART_CR3_ONEBIT)
<> 144:ef7eb2e8f9f7 244 #define IS_IRDA_ONE_BIT_SAMPLE(ONEBIT) (((ONEBIT) == IRDA_ONE_BIT_SAMPLE_DISABLE) || \
<> 144:ef7eb2e8f9f7 245 ((ONEBIT) == IRDA_ONE_BIT_SAMPLE_ENABLE))
<> 144:ef7eb2e8f9f7 246 /**
<> 144:ef7eb2e8f9f7 247 * @}
<> 144:ef7eb2e8f9f7 248 */
<> 144:ef7eb2e8f9f7 249
<> 144:ef7eb2e8f9f7 250 /** @defgroup IRDA_DMA_Tx IRDA DMA TX
<> 144:ef7eb2e8f9f7 251 * @{
<> 144:ef7eb2e8f9f7 252 */
<> 151:5eaa88a5bcc7 253 #define IRDA_DMA_TX_DISABLE ((uint32_t)0x00000000U)
<> 144:ef7eb2e8f9f7 254 #define IRDA_DMA_TX_ENABLE ((uint32_t)USART_CR3_DMAT)
<> 144:ef7eb2e8f9f7 255 #define IS_IRDA_DMA_TX(DMATX) (((DMATX) == IRDA_DMA_TX_DISABLE) || \
<> 144:ef7eb2e8f9f7 256 ((DMATX) == IRDA_DMA_TX_ENABLE))
<> 144:ef7eb2e8f9f7 257 /**
<> 144:ef7eb2e8f9f7 258 * @}
<> 144:ef7eb2e8f9f7 259 */
<> 144:ef7eb2e8f9f7 260
<> 144:ef7eb2e8f9f7 261 /** @defgroup IRDA_DMA_Rx IRDA DMA RX
<> 144:ef7eb2e8f9f7 262 * @{
<> 144:ef7eb2e8f9f7 263 */
<> 151:5eaa88a5bcc7 264 #define IRDA_DMA_RX_DISABLE ((uint32_t)0x0000U)
<> 144:ef7eb2e8f9f7 265 #define IRDA_DMA_RX_ENABLE ((uint32_t)USART_CR3_DMAR)
<> 144:ef7eb2e8f9f7 266 #define IS_IRDA_DMA_RX(DMARX) (((DMARX) == IRDA_DMA_RX_DISABLE) || \
<> 144:ef7eb2e8f9f7 267 ((DMARX) == IRDA_DMA_RX_ENABLE))
<> 144:ef7eb2e8f9f7 268 /**
<> 144:ef7eb2e8f9f7 269 * @}
<> 144:ef7eb2e8f9f7 270 */
<> 144:ef7eb2e8f9f7 271
<> 144:ef7eb2e8f9f7 272 /** @defgroup IRDA_Flags IRDA Flags
<> 144:ef7eb2e8f9f7 273 * Elements values convention: 0xXXXX
<> 144:ef7eb2e8f9f7 274 * - 0xXXXX : Flag mask in the ISR register
<> 144:ef7eb2e8f9f7 275 * @{
<> 144:ef7eb2e8f9f7 276 */
<> 144:ef7eb2e8f9f7 277 #define IRDA_FLAG_REACK USART_ISR_REACK /*!< Receive Enable Acknowledge Flag */
<> 144:ef7eb2e8f9f7 278 #define IRDA_FLAG_TEACK USART_ISR_TEACK /*!< Transmit Enable Acknowledge Flag */
<> 144:ef7eb2e8f9f7 279 #define IRDA_FLAG_BUSY USART_ISR_BUSY /*!< Busy Flag */
<> 144:ef7eb2e8f9f7 280 #define IRDA_FLAG_ABRF USART_ISR_ABRF /*!< Auto-Baud Rate Flag */
<> 144:ef7eb2e8f9f7 281 #define IRDA_FLAG_ABRE USART_ISR_ABRE /*!< Auto-Baud Rate Error */
<> 144:ef7eb2e8f9f7 282 #define IRDA_FLAG_TXE USART_ISR_TXE /*!< Transmit Data Register Empty */
<> 144:ef7eb2e8f9f7 283 #define IRDA_FLAG_TC USART_ISR_TC /*!< Transmission Complete */
<> 144:ef7eb2e8f9f7 284 #define IRDA_FLAG_RXNE USART_ISR_RXNE /*!< Read Data Register Not Empty */
<> 144:ef7eb2e8f9f7 285 #define IRDA_FLAG_ORE USART_ISR_ORE /*!< OverRun Error */
<> 144:ef7eb2e8f9f7 286 #define IRDA_FLAG_NE USART_ISR_NE /*!< Noise detected Flag */
<> 144:ef7eb2e8f9f7 287 #define IRDA_FLAG_FE USART_ISR_FE /*!< Framing Error */
<> 144:ef7eb2e8f9f7 288 #define IRDA_FLAG_PE USART_ISR_PE /*!< Parity Error */
<> 144:ef7eb2e8f9f7 289 /**
<> 144:ef7eb2e8f9f7 290 * @}
<> 144:ef7eb2e8f9f7 291 */
<> 144:ef7eb2e8f9f7 292
<> 144:ef7eb2e8f9f7 293 /** @defgroup IRDA_Interrupt_definition IRDA Interrupt definition
<> 144:ef7eb2e8f9f7 294 * Elements values convention: 0000ZZZZ0XXYYYYYb
<> 144:ef7eb2e8f9f7 295 * - YYYYY : Interrupt source position in the XX register (5bits)
<> 144:ef7eb2e8f9f7 296 * - XX : Interrupt source register (2bits)
<> 144:ef7eb2e8f9f7 297 * - 01: CR1 register
<> 144:ef7eb2e8f9f7 298 * - 10: CR2 register
<> 144:ef7eb2e8f9f7 299 * - 11: CR3 register
<> 144:ef7eb2e8f9f7 300 * - ZZZZ : Flag position in the ISR register(4bits)
<> 144:ef7eb2e8f9f7 301 * @{
<> 144:ef7eb2e8f9f7 302 */
<> 151:5eaa88a5bcc7 303 #define IRDA_IT_PE ((uint16_t)0x0028U)
<> 151:5eaa88a5bcc7 304 #define IRDA_IT_TXE ((uint16_t)0x0727U)
<> 151:5eaa88a5bcc7 305 #define IRDA_IT_TC ((uint16_t)0x0626U)
<> 151:5eaa88a5bcc7 306 #define IRDA_IT_RXNE ((uint16_t)0x0525U)
<> 151:5eaa88a5bcc7 307 #define IRDA_IT_IDLE ((uint16_t)0x0424U)
<> 144:ef7eb2e8f9f7 308
<> 144:ef7eb2e8f9f7 309
<> 144:ef7eb2e8f9f7 310
<> 144:ef7eb2e8f9f7 311 /** Elements values convention: 000000000XXYYYYYb
<> 144:ef7eb2e8f9f7 312 * - YYYYY : Interrupt source position in the XX register (5bits)
<> 144:ef7eb2e8f9f7 313 * - XX : Interrupt source register (2bits)
<> 144:ef7eb2e8f9f7 314 * - 01: CR1 register
<> 144:ef7eb2e8f9f7 315 * - 10: CR2 register
<> 144:ef7eb2e8f9f7 316 * - 11: CR3 register
<> 144:ef7eb2e8f9f7 317 */
<> 151:5eaa88a5bcc7 318 #define IRDA_IT_ERR ((uint16_t)0x0060U)
<> 144:ef7eb2e8f9f7 319
<> 144:ef7eb2e8f9f7 320 /** Elements values convention: 0000ZZZZ00000000b
<> 144:ef7eb2e8f9f7 321 * - ZZZZ : Flag position in the ISR register(4bits)
<> 144:ef7eb2e8f9f7 322 */
<> 151:5eaa88a5bcc7 323 #define IRDA_IT_ORE ((uint16_t)0x0300U)
<> 151:5eaa88a5bcc7 324 #define IRDA_IT_NE ((uint16_t)0x0200U)
<> 151:5eaa88a5bcc7 325 #define IRDA_IT_FE ((uint16_t)0x0100U)
<> 144:ef7eb2e8f9f7 326 /**
<> 144:ef7eb2e8f9f7 327 * @}
<> 144:ef7eb2e8f9f7 328 */
<> 144:ef7eb2e8f9f7 329
<> 144:ef7eb2e8f9f7 330 /** @defgroup IRDA_IT_CLEAR_Flags IRDA Interrupt clear flag
<> 144:ef7eb2e8f9f7 331 * @{
<> 144:ef7eb2e8f9f7 332 */
<> 144:ef7eb2e8f9f7 333 #define IRDA_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */
<> 144:ef7eb2e8f9f7 334 #define IRDA_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */
<> 144:ef7eb2e8f9f7 335 #define IRDA_CLEAR_NEF USART_ICR_NCF /*!< Noise detected Clear Flag */
<> 144:ef7eb2e8f9f7 336 #define IRDA_CLEAR_OREF USART_ICR_ORECF /*!< OverRun Error Clear Flag */
<> 144:ef7eb2e8f9f7 337 #define IRDA_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */
<> 144:ef7eb2e8f9f7 338 #define IRDA_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */
<> 144:ef7eb2e8f9f7 339 /**
<> 144:ef7eb2e8f9f7 340 * @}
<> 144:ef7eb2e8f9f7 341 */
<> 144:ef7eb2e8f9f7 342
<> 144:ef7eb2e8f9f7 343
<> 144:ef7eb2e8f9f7 344
<> 144:ef7eb2e8f9f7 345 /** @defgroup IRDA_Request_Parameters IRDA Request parameters
<> 144:ef7eb2e8f9f7 346 * @{
<> 144:ef7eb2e8f9f7 347 */
<> 144:ef7eb2e8f9f7 348 #define IRDA_AUTOBAUD_REQUEST ((uint32_t)USART_RQR_ABRRQ) /*!< Auto-Baud Rate Request */
<> 144:ef7eb2e8f9f7 349 #define IRDA_RXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_RXFRQ) /*!< Receive Data flush Request */
<> 144:ef7eb2e8f9f7 350 #define IRDA_TXDATA_FLUSH_REQUEST ((uint32_t)USART_RQR_TXFRQ) /*!< Transmit data flush Request */
<> 144:ef7eb2e8f9f7 351 #define IS_IRDA_REQUEST_PARAMETER(PARAM) (((PARAM) == IRDA_AUTOBAUD_REQUEST) || \
<> 144:ef7eb2e8f9f7 352 ((PARAM) == IRDA_SENDBREAK_REQUEST) || \
<> 144:ef7eb2e8f9f7 353 ((PARAM) == IRDA_MUTE_MODE_REQUEST) || \
<> 144:ef7eb2e8f9f7 354 ((PARAM) == IRDA_RXDATA_FLUSH_REQUEST) || \
<> 144:ef7eb2e8f9f7 355 ((PARAM) == IRDA_TXDATA_FLUSH_REQUEST))
<> 144:ef7eb2e8f9f7 356 /**
<> 144:ef7eb2e8f9f7 357 * @}
<> 144:ef7eb2e8f9f7 358 */
<> 144:ef7eb2e8f9f7 359
<> 144:ef7eb2e8f9f7 360 /** @defgroup IRDA_Interruption_Mask IRDA Interruption mask
<> 144:ef7eb2e8f9f7 361 * @{
<> 144:ef7eb2e8f9f7 362 */
<> 151:5eaa88a5bcc7 363 #define IRDA_IT_MASK ((uint16_t)0x001FU)
<> 144:ef7eb2e8f9f7 364 /**
<> 144:ef7eb2e8f9f7 365 * @}
<> 144:ef7eb2e8f9f7 366 */
<> 144:ef7eb2e8f9f7 367
<> 144:ef7eb2e8f9f7 368 /**
<> 144:ef7eb2e8f9f7 369 * @}
<> 144:ef7eb2e8f9f7 370 */
<> 144:ef7eb2e8f9f7 371
<> 144:ef7eb2e8f9f7 372
<> 144:ef7eb2e8f9f7 373 /* Exported macro ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 374 /** @defgroup IRDA_Exported_Macros IRDA Exported Macros
<> 144:ef7eb2e8f9f7 375 * @{
<> 144:ef7eb2e8f9f7 376 */
<> 144:ef7eb2e8f9f7 377
<> 144:ef7eb2e8f9f7 378 /** @brief Reset IRDA handle state
<> 144:ef7eb2e8f9f7 379 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 380 * The Handle Instance which can be USART1 or USART2.
<> 144:ef7eb2e8f9f7 381 * @retval None
<> 144:ef7eb2e8f9f7 382 */
<> 144:ef7eb2e8f9f7 383 #define __HAL_IRDA_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_IRDA_STATE_RESET)
<> 144:ef7eb2e8f9f7 384
<> 144:ef7eb2e8f9f7 385 /** @brief Flushs the IRDA DR register
<> 144:ef7eb2e8f9f7 386 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 387 * The Handle Instance which can be USART1 or USART2.
<> 144:ef7eb2e8f9f7 388 * @retval None
<> 144:ef7eb2e8f9f7 389 */
<> 144:ef7eb2e8f9f7 390 #define __HAL_IRDA_FLUSH_DRREGISTER(__HANDLE__) \
<> 144:ef7eb2e8f9f7 391 do{ \
<> 144:ef7eb2e8f9f7 392 SET_BIT((__HANDLE__)->Instance->RQR, IRDA_RXDATA_FLUSH_REQUEST); \
<> 144:ef7eb2e8f9f7 393 SET_BIT((__HANDLE__)->Instance->RQR, IRDA_TXDATA_FLUSH_REQUEST); \
<> 144:ef7eb2e8f9f7 394 } while(0)
<> 144:ef7eb2e8f9f7 395
<> 144:ef7eb2e8f9f7 396
<> 144:ef7eb2e8f9f7 397 /** @brief Clears the specified IRDA pending flag.
<> 144:ef7eb2e8f9f7 398 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 399 * @param __FLAG__: specifies the flag to check.
<> 144:ef7eb2e8f9f7 400 * This parameter can be any combination of the following values:
<> 144:ef7eb2e8f9f7 401 * @arg IRDA_CLEAR_PEF
<> 144:ef7eb2e8f9f7 402 * @arg IRDA_CLEAR_FEF
<> 144:ef7eb2e8f9f7 403 * @arg IRDA_CLEAR_NEF
<> 144:ef7eb2e8f9f7 404 * @arg IRDA_CLEAR_OREF
<> 144:ef7eb2e8f9f7 405 * @arg IRDA_CLEAR_TCF
<> 144:ef7eb2e8f9f7 406 * @arg IRDA_CLEAR_IDLEF
<> 144:ef7eb2e8f9f7 407 * @retval None
<> 144:ef7eb2e8f9f7 408 */
<> 144:ef7eb2e8f9f7 409 #define __HAL_IRDA_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
<> 144:ef7eb2e8f9f7 410
<> 144:ef7eb2e8f9f7 411
<> 144:ef7eb2e8f9f7 412 /** @brief Clear the IRDA PE pending flag.
<> 144:ef7eb2e8f9f7 413 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 414 * @retval None
<> 144:ef7eb2e8f9f7 415 */
<> 144:ef7eb2e8f9f7 416 #define __HAL_IRDA_CLEAR_PEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_FLAG(__HANDLE__, IRDA_CLEAR_PEF)
<> 144:ef7eb2e8f9f7 417
<> 144:ef7eb2e8f9f7 418
<> 144:ef7eb2e8f9f7 419 /** @brief Clear the IRDA FE pending flag.
<> 144:ef7eb2e8f9f7 420 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 421 * @retval None
<> 144:ef7eb2e8f9f7 422 */
<> 144:ef7eb2e8f9f7 423 #define __HAL_IRDA_CLEAR_FEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_FLAG(__HANDLE__, IRDA_CLEAR_FEF)
<> 144:ef7eb2e8f9f7 424
<> 144:ef7eb2e8f9f7 425 /** @brief Clear the IRDA NE pending flag.
<> 144:ef7eb2e8f9f7 426 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 427 * @retval None
<> 144:ef7eb2e8f9f7 428 */
<> 144:ef7eb2e8f9f7 429 #define __HAL_IRDA_CLEAR_NEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_FLAG(__HANDLE__, IRDA_CLEAR_NEF)
<> 144:ef7eb2e8f9f7 430
<> 144:ef7eb2e8f9f7 431 /** @brief Clear the IRDA ORE pending flag.
<> 144:ef7eb2e8f9f7 432 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 433 * @retval None
<> 144:ef7eb2e8f9f7 434 */
<> 144:ef7eb2e8f9f7 435 #define __HAL_IRDA_CLEAR_OREFLAG(__HANDLE__) __HAL_IRDA_CLEAR_FLAG(__HANDLE__, IRDA_CLEAR_OREF)
<> 144:ef7eb2e8f9f7 436
<> 144:ef7eb2e8f9f7 437 /** @brief Clear the IRDA IDLE pending flag.
<> 144:ef7eb2e8f9f7 438 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 439 * @retval None
<> 144:ef7eb2e8f9f7 440 */
<> 144:ef7eb2e8f9f7 441 #define __HAL_IRDA_CLEAR_IDLEFLAG(__HANDLE__) __HAL_IRDA_CLEAR_FLAG(__HANDLE__, IRDA_CLEAR_IDLEF)
<> 144:ef7eb2e8f9f7 442
<> 144:ef7eb2e8f9f7 443 /** @brief Check whether the specified IRDA flag is set or not.
<> 144:ef7eb2e8f9f7 444 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 445 * The Handle Instance which can be USART1 or USART2.
<> 144:ef7eb2e8f9f7 446 * UART peripheral
<> 144:ef7eb2e8f9f7 447 * @param __FLAG__: specifies the flag to check.
<> 144:ef7eb2e8f9f7 448 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 449 * @arg IRDA_FLAG_REACK: Receive enable ackowledge flag
<> 144:ef7eb2e8f9f7 450 * @arg IRDA_FLAG_TEACK: Transmit enable ackowledge flag
<> 144:ef7eb2e8f9f7 451 * @arg IRDA_FLAG_BUSY: Busy flag
<> 144:ef7eb2e8f9f7 452 * @arg IRDA_FLAG_ABRF: Auto Baud rate detection flag
<> 144:ef7eb2e8f9f7 453 * @arg IRDA_FLAG_ABRE: Auto Baud rate detection error flag
<> 144:ef7eb2e8f9f7 454 * @arg IRDA_FLAG_TXE: Transmit data register empty flag
<> 144:ef7eb2e8f9f7 455 * @arg IRDA_FLAG_TC: Transmission Complete flag
<> 144:ef7eb2e8f9f7 456 * @arg IRDA_FLAG_RXNE: Receive data register not empty flag
<> 144:ef7eb2e8f9f7 457 * @arg IRDA_FLAG_IDLE: Idle Line detection flag
<> 144:ef7eb2e8f9f7 458 * @arg IRDA_FLAG_ORE: OverRun Error flag
<> 144:ef7eb2e8f9f7 459 * @arg IRDA_FLAG_NE: Noise Error flag
<> 144:ef7eb2e8f9f7 460 * @arg IRDA_FLAG_FE: Framing Error flag
<> 144:ef7eb2e8f9f7 461 * @arg IRDA_FLAG_PE: Parity Error flag
<> 144:ef7eb2e8f9f7 462 * @retval The new state of __FLAG__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 463 */
<> 144:ef7eb2e8f9f7 464 #define __HAL_IRDA_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
<> 144:ef7eb2e8f9f7 465
<> 144:ef7eb2e8f9f7 466 /** @brief Enable the specified IRDA interrupt.
<> 144:ef7eb2e8f9f7 467 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 468 * The Handle Instance which can be USART1 or USART2.
<> 144:ef7eb2e8f9f7 469 * UART peripheral
<> 144:ef7eb2e8f9f7 470 * @param __INTERRUPT__: specifies the IRDA interrupt source to enable.
<> 144:ef7eb2e8f9f7 471 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 472 * @arg IRDA_IT_TXE: Transmit Data Register empty interrupt
<> 144:ef7eb2e8f9f7 473 * @arg IRDA_IT_TC: Transmission complete interrupt
<> 144:ef7eb2e8f9f7 474 * @arg IRDA_IT_RXNE: Receive Data register not empty interrupt
<> 144:ef7eb2e8f9f7 475 * @arg IRDA_IT_IDLE: Idle line detection interrupt
<> 144:ef7eb2e8f9f7 476 * @arg IRDA_IT_PE: Parity Error interrupt
<> 144:ef7eb2e8f9f7 477 * @arg IRDA_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
<> 144:ef7eb2e8f9f7 478 * @retval None
<> 144:ef7eb2e8f9f7 479 */
<> 151:5eaa88a5bcc7 480 #define __HAL_IRDA_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & IRDA_IT_MASK))): \
<> 151:5eaa88a5bcc7 481 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & IRDA_IT_MASK))): \
<> 151:5eaa88a5bcc7 482 ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & IRDA_IT_MASK))))
<> 144:ef7eb2e8f9f7 483
<> 144:ef7eb2e8f9f7 484 /** @brief Disable the specified IRDA interrupt.
<> 144:ef7eb2e8f9f7 485 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 486 * The Handle Instance which can be USART1 or USART2.
<> 144:ef7eb2e8f9f7 487 * @param __INTERRUPT__: specifies the IRDA interrupt source to disable.
<> 144:ef7eb2e8f9f7 488 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 489 * @arg IRDA_IT_TXE: Transmit Data Register empty interrupt
<> 144:ef7eb2e8f9f7 490 * @arg IRDA_IT_TC: Transmission complete interrupt
<> 144:ef7eb2e8f9f7 491 * @arg IRDA_IT_RXNE: Receive Data register not empty interrupt
<> 144:ef7eb2e8f9f7 492 * @arg IRDA_IT_IDLE: Idle line detection interrupt
<> 144:ef7eb2e8f9f7 493 * @arg IRDA_IT_PE: Parity Error interrupt
<> 144:ef7eb2e8f9f7 494 * @arg IRDA_IT_ERR: Error interrupt(Frame error, noise error, overrun error)
<> 144:ef7eb2e8f9f7 495 * @retval None
<> 144:ef7eb2e8f9f7 496 */
<> 151:5eaa88a5bcc7 497 #define __HAL_IRDA_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ ((uint32_t)1U << ((__INTERRUPT__) & IRDA_IT_MASK))): \
<> 151:5eaa88a5bcc7 498 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ ((uint32_t)1U << ((__INTERRUPT__) & IRDA_IT_MASK))): \
<> 144:ef7eb2e8f9f7 499 ((__HANDLE__)->Instance->CR3 &= ~ ((uint32_t)1 << ((__INTERRUPT__) & IRDA_IT_MASK))))
<> 144:ef7eb2e8f9f7 500
<> 144:ef7eb2e8f9f7 501 /** @brief Check whether the specified IRDA interrupt has occurred or not.
<> 144:ef7eb2e8f9f7 502 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 503 * The Handle Instance which can be USART1 or USART2.
<> 144:ef7eb2e8f9f7 504 * @param __IT__: specifies the IRDA interrupt source to check.
<> 144:ef7eb2e8f9f7 505 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 506 * @arg IRDA_IT_TXE: Transmit Data Register empty interrupt
<> 144:ef7eb2e8f9f7 507 * @arg IRDA_IT_TC: Transmission complete interrupt
<> 144:ef7eb2e8f9f7 508 * @arg IRDA_IT_RXNE: Receive Data register not empty interrupt
<> 144:ef7eb2e8f9f7 509 * @arg IRDA_IT_IDLE: Idle line detection interrupt
<> 144:ef7eb2e8f9f7 510 * @arg IRDA_IT_ORE: OverRun Error interrupt
<> 144:ef7eb2e8f9f7 511 * @arg IRDA_IT_NE: Noise Error interrupt
<> 144:ef7eb2e8f9f7 512 * @arg IRDA_IT_FE: Framing Error interrupt
<> 144:ef7eb2e8f9f7 513 * @arg IRDA_IT_PE: Parity Error interrupt
<> 144:ef7eb2e8f9f7 514 * @retval The new state of __IT__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 515 */
<> 151:5eaa88a5bcc7 516 #define __HAL_IRDA_GET_IT(__HANDLE__, __IT__) ((__HANDLE__)->Instance->ISR & ((uint32_t)1U << ((__IT__)>> 0x08U)))
<> 144:ef7eb2e8f9f7 517
<> 144:ef7eb2e8f9f7 518 /** @brief Check whether the specified IRDA interrupt source is enabled.
<> 144:ef7eb2e8f9f7 519 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 520 * The Handle Instance which can be USART1 or USART2.
<> 144:ef7eb2e8f9f7 521 * @param __IT__: specifies the IRDA interrupt source to check.
<> 144:ef7eb2e8f9f7 522 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 523 * @arg IRDA_IT_TXE: Transmit Data Register empty interrupt
<> 144:ef7eb2e8f9f7 524 * @arg IRDA_IT_TC: Transmission complete interrupt
<> 144:ef7eb2e8f9f7 525 * @arg IRDA_IT_RXNE: Receive Data register not empty interrupt
<> 144:ef7eb2e8f9f7 526 * @arg IRDA_IT_IDLE: Idle line detection interrupt
<> 144:ef7eb2e8f9f7 527 * @arg IRDA_IT_ORE: OverRun Error interrupt
<> 144:ef7eb2e8f9f7 528 * @arg IRDA_IT_NE: Noise Error interrupt
<> 144:ef7eb2e8f9f7 529 * @arg IRDA_IT_FE: Framing Error interrupt
<> 144:ef7eb2e8f9f7 530 * @arg IRDA_IT_PE: Parity Error interrupt
<> 144:ef7eb2e8f9f7 531 * @retval The new state of __IT__ (TRUE or FALSE).
<> 144:ef7eb2e8f9f7 532 */
<> 151:5eaa88a5bcc7 533 #define __HAL_IRDA_GET_IT_SOURCE(__HANDLE__, __IT__) ((((((uint8_t)(__IT__)) >> 5U) == 1U)? (__HANDLE__)->Instance->CR1:(((((uint8_t)(__IT__)) >> 5U) == 2U)? \
<> 151:5eaa88a5bcc7 534 (__HANDLE__)->Instance->CR2 : (__HANDLE__)->Instance->CR3)) & ((uint32_t)1U << (((uint16_t)(__IT__)) & IRDA_IT_MASK)))
<> 144:ef7eb2e8f9f7 535
<> 144:ef7eb2e8f9f7 536 /** @brief Clear the specified IRDA ISR flag, in setting the proper ICR register flag.
<> 144:ef7eb2e8f9f7 537 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 538 * The Handle Instance which can be USART1 or USART2.
<> 144:ef7eb2e8f9f7 539 * @param __IT_CLEAR__: specifies the interrupt clear register flag that needs to be set
<> 144:ef7eb2e8f9f7 540 * to clear the corresponding interrupt
<> 144:ef7eb2e8f9f7 541 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 542 * @arg IRDA_CLEAR_PEF: Parity Error Clear Flag
<> 144:ef7eb2e8f9f7 543 * @arg IRDA_CLEAR_FEF: Framing Error Clear Flag
<> 144:ef7eb2e8f9f7 544 * @arg IRDA_CLEAR_NEF: Noise detected Clear Flag
<> 144:ef7eb2e8f9f7 545 * @arg IRDA_CLEAR_OREF: OverRun Error Clear Flag
<> 144:ef7eb2e8f9f7 546 * @arg IRDA_CLEAR_TCF: Transmission Complete Clear Flag
<> 144:ef7eb2e8f9f7 547 * @retval None
<> 144:ef7eb2e8f9f7 548 */
<> 144:ef7eb2e8f9f7 549 #define __HAL_IRDA_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR |= (uint32_t)(__IT_CLEAR__))
<> 144:ef7eb2e8f9f7 550
<> 144:ef7eb2e8f9f7 551 /** @brief Set a specific IRDA request flag.
<> 144:ef7eb2e8f9f7 552 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 553 * The Handle Instance which can be USART1 or USART2.
<> 144:ef7eb2e8f9f7 554 * @param __REQ__: specifies the request flag to set
<> 144:ef7eb2e8f9f7 555 * This parameter can be one of the following values:
<> 144:ef7eb2e8f9f7 556 * @arg IRDA_AUTOBAUD_REQUEST: Auto-Baud Rate Request
<> 144:ef7eb2e8f9f7 557 * @arg IRDA_RXDATA_FLUSH_REQUEST: Receive Data flush Request
<> 144:ef7eb2e8f9f7 558 * @arg IRDA_TXDATA_FLUSH_REQUEST: Transmit data flush Request
<> 144:ef7eb2e8f9f7 559 *
<> 144:ef7eb2e8f9f7 560 * @retval None
<> 144:ef7eb2e8f9f7 561 */
<> 144:ef7eb2e8f9f7 562 #define __HAL_IRDA_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint32_t)(__REQ__))
<> 144:ef7eb2e8f9f7 563
<> 144:ef7eb2e8f9f7 564 /** @brief Enables the IRDA one bit sample method
<> 144:ef7eb2e8f9f7 565 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 566 * @retval None
<> 144:ef7eb2e8f9f7 567 */
<> 144:ef7eb2e8f9f7 568 #define __HAL_IRDA_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
<> 144:ef7eb2e8f9f7 569
<> 144:ef7eb2e8f9f7 570 /** @brief Disables the IRDA one bit sample method
<> 144:ef7eb2e8f9f7 571 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 572 * @retval None
<> 144:ef7eb2e8f9f7 573 */
<> 144:ef7eb2e8f9f7 574 #define __HAL_IRDA_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= (uint32_t)~((uint32_t)USART_CR3_ONEBIT))
<> 144:ef7eb2e8f9f7 575
<> 144:ef7eb2e8f9f7 576 /** @brief Enable UART/USART associated to IRDA Handle
<> 144:ef7eb2e8f9f7 577 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 578 * The Handle Instance which can be USART1 or USART2.
<> 144:ef7eb2e8f9f7 579 * @retval None
<> 144:ef7eb2e8f9f7 580 */
<> 144:ef7eb2e8f9f7 581 #define __HAL_IRDA_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
<> 144:ef7eb2e8f9f7 582
<> 144:ef7eb2e8f9f7 583 /** @brief Disable UART/USART associated to IRDA Handle
<> 144:ef7eb2e8f9f7 584 * @param __HANDLE__: specifies the IRDA Handle.
<> 144:ef7eb2e8f9f7 585 * The Handle Instance which can be USART1 or USART2.
<> 144:ef7eb2e8f9f7 586 * @retval None
<> 144:ef7eb2e8f9f7 587 */
<> 144:ef7eb2e8f9f7 588 #define __HAL_IRDA_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
<> 144:ef7eb2e8f9f7 589
<> 144:ef7eb2e8f9f7 590 /** @brief Ensure that IRDA Baud rate is less or equal to maximum value
<> 144:ef7eb2e8f9f7 591 * @param __BAUDRATE__: specifies the IRDA Baudrate set by the user.
<> 144:ef7eb2e8f9f7 592 * @retval True or False
<> 144:ef7eb2e8f9f7 593 */
<> 151:5eaa88a5bcc7 594 #define IS_IRDA_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 115201U)
<> 144:ef7eb2e8f9f7 595
<> 144:ef7eb2e8f9f7 596 /** @brief Ensure that IRDA prescaler value is strictly larger than 0
<> 144:ef7eb2e8f9f7 597 * @param __PRESCALER__: specifies the IRDA prescaler value set by the user.
<> 144:ef7eb2e8f9f7 598 * @retval True or False
<> 144:ef7eb2e8f9f7 599 */
<> 151:5eaa88a5bcc7 600 #define IS_IRDA_PRESCALER(__PRESCALER__) ((__PRESCALER__) > 0U)
<> 144:ef7eb2e8f9f7 601
<> 144:ef7eb2e8f9f7 602 /**
<> 144:ef7eb2e8f9f7 603 * @}
<> 144:ef7eb2e8f9f7 604 */
<> 144:ef7eb2e8f9f7 605
<> 144:ef7eb2e8f9f7 606 /* Include IRDA HAL Extension module */
<> 144:ef7eb2e8f9f7 607 #include "stm32l0xx_hal_irda_ex.h"
<> 144:ef7eb2e8f9f7 608
<> 144:ef7eb2e8f9f7 609 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 610 /** @defgroup IRDA_Exported_Functions IRDA Exported Functions
<> 144:ef7eb2e8f9f7 611 * @{
<> 144:ef7eb2e8f9f7 612 */
<> 144:ef7eb2e8f9f7 613
<> 144:ef7eb2e8f9f7 614 /** @defgroup IRDA_Exported_Functions_Group1 Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 615 * @{
<> 144:ef7eb2e8f9f7 616 */
<> 144:ef7eb2e8f9f7 617 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 618 /* Initialization/de-initialization methods **********************************/
<> 144:ef7eb2e8f9f7 619 HAL_StatusTypeDef HAL_IRDA_Init(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 620 HAL_StatusTypeDef HAL_IRDA_DeInit(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 621 void HAL_IRDA_MspInit(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 622 void HAL_IRDA_MspDeInit(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 623 /**
<> 144:ef7eb2e8f9f7 624 * @}
<> 144:ef7eb2e8f9f7 625 */
<> 144:ef7eb2e8f9f7 626
<> 144:ef7eb2e8f9f7 627 /** @defgroup IRDA_Exported_Functions_Group2 IRDA IO operationfunctions
<> 144:ef7eb2e8f9f7 628 * @{
<> 144:ef7eb2e8f9f7 629 */
<> 144:ef7eb2e8f9f7 630
<> 144:ef7eb2e8f9f7 631 /* IO operation methods *******************************************************/
<> 144:ef7eb2e8f9f7 632 HAL_StatusTypeDef HAL_IRDA_Transmit(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 633 HAL_StatusTypeDef HAL_IRDA_Receive(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 634 HAL_StatusTypeDef HAL_IRDA_Transmit_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
<> 144:ef7eb2e8f9f7 635 HAL_StatusTypeDef HAL_IRDA_Receive_IT(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
<> 144:ef7eb2e8f9f7 636 HAL_StatusTypeDef HAL_IRDA_Transmit_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
<> 144:ef7eb2e8f9f7 637 HAL_StatusTypeDef HAL_IRDA_Receive_DMA(IRDA_HandleTypeDef *hirda, uint8_t *pData, uint16_t Size);
<> 144:ef7eb2e8f9f7 638 HAL_StatusTypeDef HAL_IRDA_DMAPause(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 639 HAL_StatusTypeDef HAL_IRDA_DMAResume(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 640 HAL_StatusTypeDef HAL_IRDA_DMAStop(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 641 void HAL_IRDA_IRQHandler(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 642 void HAL_IRDA_TxCpltCallback(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 643 void HAL_IRDA_RxCpltCallback(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 644 void HAL_IRDA_TxHalfCpltCallback(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 645 void HAL_IRDA_RxHalfCpltCallback(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 646 void HAL_IRDA_ErrorCallback(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 647 /**
<> 144:ef7eb2e8f9f7 648 * @}
<> 144:ef7eb2e8f9f7 649 */
<> 144:ef7eb2e8f9f7 650
<> 144:ef7eb2e8f9f7 651 /** @defgroup IRDA_Exported_Functions_Group3 Peripheral Control functions
<> 144:ef7eb2e8f9f7 652 * @{
<> 144:ef7eb2e8f9f7 653 */
<> 144:ef7eb2e8f9f7 654 /* Peripheral State methods **************************************************/
<> 144:ef7eb2e8f9f7 655 HAL_IRDA_StateTypeDef HAL_IRDA_GetState(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 656 uint32_t HAL_IRDA_GetError(IRDA_HandleTypeDef *hirda);
<> 144:ef7eb2e8f9f7 657
<> 144:ef7eb2e8f9f7 658 /**
<> 144:ef7eb2e8f9f7 659 * @}
<> 144:ef7eb2e8f9f7 660 */
<> 144:ef7eb2e8f9f7 661
<> 144:ef7eb2e8f9f7 662 /**
<> 144:ef7eb2e8f9f7 663 * @}
<> 144:ef7eb2e8f9f7 664 */
<> 144:ef7eb2e8f9f7 665
<> 144:ef7eb2e8f9f7 666 /* Define the private group ***********************************/
<> 144:ef7eb2e8f9f7 667 /**************************************************************/
<> 144:ef7eb2e8f9f7 668 /** @defgroup IRDA_Private IRDA Private
<> 144:ef7eb2e8f9f7 669 * @{
<> 144:ef7eb2e8f9f7 670 */
<> 144:ef7eb2e8f9f7 671 /**
<> 144:ef7eb2e8f9f7 672 * @}
<> 144:ef7eb2e8f9f7 673 */
<> 144:ef7eb2e8f9f7 674 /**************************************************************/
<> 144:ef7eb2e8f9f7 675
<> 144:ef7eb2e8f9f7 676 /**
<> 144:ef7eb2e8f9f7 677 * @}
<> 144:ef7eb2e8f9f7 678 */
<> 144:ef7eb2e8f9f7 679
<> 144:ef7eb2e8f9f7 680 /**
<> 144:ef7eb2e8f9f7 681 * @}
<> 144:ef7eb2e8f9f7 682 */
<> 144:ef7eb2e8f9f7 683 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 684 }
<> 144:ef7eb2e8f9f7 685 #endif
<> 144:ef7eb2e8f9f7 686
<> 144:ef7eb2e8f9f7 687 #endif /* __STM32L0xx_HAL_IRDA_H */
<> 144:ef7eb2e8f9f7 688
<> 144:ef7eb2e8f9f7 689 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
<> 144:ef7eb2e8f9f7 690