mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

Committer:
AnnaBridge
Date:
Fri Feb 16 16:09:33 2018 +0000
Revision:
181:57724642e740
Parent:
targets/TARGET_RENESAS/TARGET_VK_RZ_A1H/device/rza_io_regrw.c@149:156823d33999
mbed-dev library. Release version 159.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /*******************************************************************************
<> 144:ef7eb2e8f9f7 2 * DISCLAIMER
<> 144:ef7eb2e8f9f7 3 * This software is supplied by Renesas Electronics Corporation and is only
<> 144:ef7eb2e8f9f7 4 * intended for use with Renesas products. No other uses are authorized. This
<> 144:ef7eb2e8f9f7 5 * software is owned by Renesas Electronics Corporation and is protected under
<> 144:ef7eb2e8f9f7 6 * all applicable laws, including copyright laws.
<> 144:ef7eb2e8f9f7 7 * THIS SOFTWARE IS PROVIDED "AS IS" AND RENESAS MAKES NO WARRANTIES REGARDING
<> 144:ef7eb2e8f9f7 8 * THIS SOFTWARE, WHETHER EXPRESS, IMPLIED OR STATUTORY, INCLUDING BUT NOT
<> 144:ef7eb2e8f9f7 9 * LIMITED TO WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE
<> 144:ef7eb2e8f9f7 10 * AND NON-INFRINGEMENT. ALL SUCH WARRANTIES ARE EXPRESSLY DISCLAIMED.
<> 144:ef7eb2e8f9f7 11 * TO THE MAXIMUM EXTENT PERMITTED NOT PROHIBITED BY LAW, NEITHER RENESAS
<> 144:ef7eb2e8f9f7 12 * ELECTRONICS CORPORATION NOR ANY OF ITS AFFILIATED COMPANIES SHALL BE LIABLE
<> 144:ef7eb2e8f9f7 13 * FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES FOR
<> 144:ef7eb2e8f9f7 14 * ANY REASON RELATED TO THIS SOFTWARE, EVEN IF RENESAS OR ITS AFFILIATES HAVE
<> 144:ef7eb2e8f9f7 15 * BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
<> 144:ef7eb2e8f9f7 16 * Renesas reserves the right, without notice, to make changes to this software
<> 144:ef7eb2e8f9f7 17 * and to discontinue the availability of this software. By using this software,
<> 144:ef7eb2e8f9f7 18 * you agree to the additional terms and conditions found by accessing the
<> 144:ef7eb2e8f9f7 19 * following link:
<> 144:ef7eb2e8f9f7 20 * http://www.renesas.com/disclaimer
<> 144:ef7eb2e8f9f7 21 * Copyright (C) 2012 - 2014 Renesas Electronics Corporation. All rights reserved.
<> 144:ef7eb2e8f9f7 22 *******************************************************************************/
<> 144:ef7eb2e8f9f7 23 /*******************************************************************************
<> 144:ef7eb2e8f9f7 24 * File Name : rza_io_regrw.c
<> 144:ef7eb2e8f9f7 25 * $Rev: 1121 $
<> 144:ef7eb2e8f9f7 26 * $Date:: 2014-08-06 17:09:53 +0900#$
<> 144:ef7eb2e8f9f7 27 * Description : Low level register read/write
<> 144:ef7eb2e8f9f7 28 *******************************************************************************/
<> 144:ef7eb2e8f9f7 29
<> 144:ef7eb2e8f9f7 30 /******************************************************************************
<> 144:ef7eb2e8f9f7 31 Includes <System Includes> , "Project Includes"
<> 144:ef7eb2e8f9f7 32 ******************************************************************************/
<> 144:ef7eb2e8f9f7 33 #include "r_typedefs.h"
<> 144:ef7eb2e8f9f7 34
<> 144:ef7eb2e8f9f7 35 #ifdef __CC_ARM
<> 144:ef7eb2e8f9f7 36 #pragma arm section code = "CODE_IO_REGRW"
<> 144:ef7eb2e8f9f7 37 #pragma arm section rodata = "CONST_IO_REGRW"
<> 144:ef7eb2e8f9f7 38 #pragma arm section rwdata = "DATA_IO_REGRW"
<> 144:ef7eb2e8f9f7 39 #pragma arm section zidata = "BSS_IO_REGRW"
<> 144:ef7eb2e8f9f7 40 #endif
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 /******************************************************************************
<> 144:ef7eb2e8f9f7 43 Typedef definitions
<> 144:ef7eb2e8f9f7 44 ******************************************************************************/
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46
<> 144:ef7eb2e8f9f7 47 /******************************************************************************
<> 144:ef7eb2e8f9f7 48 Macro definitions
<> 144:ef7eb2e8f9f7 49 ******************************************************************************/
<> 144:ef7eb2e8f9f7 50
<> 144:ef7eb2e8f9f7 51
<> 144:ef7eb2e8f9f7 52 /******************************************************************************
<> 144:ef7eb2e8f9f7 53 Imported global variables and functions (from other files)
<> 144:ef7eb2e8f9f7 54 ******************************************************************************/
<> 144:ef7eb2e8f9f7 55
<> 144:ef7eb2e8f9f7 56
<> 144:ef7eb2e8f9f7 57 /******************************************************************************
<> 144:ef7eb2e8f9f7 58 Exported global variables and functions (to be accessed by other files)
<> 144:ef7eb2e8f9f7 59 ******************************************************************************/
<> 144:ef7eb2e8f9f7 60
<> 144:ef7eb2e8f9f7 61
<> 144:ef7eb2e8f9f7 62 /******************************************************************************
<> 144:ef7eb2e8f9f7 63 Private global variables and functions
<> 144:ef7eb2e8f9f7 64 ******************************************************************************/
<> 144:ef7eb2e8f9f7 65
<> 144:ef7eb2e8f9f7 66
<> 144:ef7eb2e8f9f7 67 /******************************************************************************
<> 144:ef7eb2e8f9f7 68 * Function Name: RZA_IO_RegWrite_8
<> 144:ef7eb2e8f9f7 69 * Description : IO register 8-bit write
<> 144:ef7eb2e8f9f7 70 * Arguments : volatile uint8_t * ioreg : IO register for writing
<> 144:ef7eb2e8f9f7 71 * : : Use register definition name of the
<> 144:ef7eb2e8f9f7 72 * : : iodefine.h
<> 144:ef7eb2e8f9f7 73 * : uint8_t write_value : Write value for the IO register
<> 144:ef7eb2e8f9f7 74 * : uint8_t shift : The number of left shifts to the
<> 144:ef7eb2e8f9f7 75 * : : target bit
<> 144:ef7eb2e8f9f7 76 * : uint8_t mask : Mask value for the IO register
<> 144:ef7eb2e8f9f7 77 * : : (Target bit : "1")
<> 144:ef7eb2e8f9f7 78 * Return Value : None
<> 144:ef7eb2e8f9f7 79 ******************************************************************************/
<> 144:ef7eb2e8f9f7 80 void RZA_IO_RegWrite_8(volatile uint8_t * ioreg, uint8_t write_value, uint8_t shift, uint8_t mask)
<> 144:ef7eb2e8f9f7 81 {
<> 144:ef7eb2e8f9f7 82 uint8_t reg_value;
<> 144:ef7eb2e8f9f7 83
<> 144:ef7eb2e8f9f7 84 reg_value = *ioreg; /* Read from register */
<> 144:ef7eb2e8f9f7 85 reg_value = (reg_value & (~mask)) | (write_value << shift); /* Modify value */
<> 144:ef7eb2e8f9f7 86 *ioreg = reg_value; /* Write to register */
<> 144:ef7eb2e8f9f7 87 }
<> 144:ef7eb2e8f9f7 88
<> 144:ef7eb2e8f9f7 89 /******************************************************************************
<> 144:ef7eb2e8f9f7 90 * Function Name: RZA_IO_RegWrite_16
<> 144:ef7eb2e8f9f7 91 * Description : IO register 16-bit write
<> 144:ef7eb2e8f9f7 92 * Arguments : volatile uint16_t * ioreg : IO register for writing
<> 144:ef7eb2e8f9f7 93 * : : Use register definition name of the
<> 144:ef7eb2e8f9f7 94 * : : iodefine.h
<> 144:ef7eb2e8f9f7 95 * : uint16_t write_value : Write value for the IO register
<> 144:ef7eb2e8f9f7 96 * : uint16_t shift : The number of left shifts to the
<> 144:ef7eb2e8f9f7 97 * : : target bit
<> 144:ef7eb2e8f9f7 98 * : uint16_t mask : Mask value for the IO register
<> 144:ef7eb2e8f9f7 99 * : : (Target bit : "1")
<> 144:ef7eb2e8f9f7 100 * Return Value : None
<> 144:ef7eb2e8f9f7 101 ******************************************************************************/
<> 144:ef7eb2e8f9f7 102 void RZA_IO_RegWrite_16(volatile uint16_t * ioreg, uint16_t write_value, uint16_t shift, uint16_t mask)
<> 144:ef7eb2e8f9f7 103 {
<> 144:ef7eb2e8f9f7 104 uint16_t reg_value;
<> 144:ef7eb2e8f9f7 105
<> 144:ef7eb2e8f9f7 106 reg_value = *ioreg; /* Read from register */
<> 144:ef7eb2e8f9f7 107 reg_value = (reg_value & (~mask)) | (write_value << shift); /* Modify value */
<> 144:ef7eb2e8f9f7 108 *ioreg = reg_value; /* Write to register */
<> 144:ef7eb2e8f9f7 109 }
<> 144:ef7eb2e8f9f7 110
<> 144:ef7eb2e8f9f7 111 /******************************************************************************
<> 144:ef7eb2e8f9f7 112 * Function Name: RZA_IO_RegWrite_32
<> 144:ef7eb2e8f9f7 113 * Description : IO register 32-bit write
<> 144:ef7eb2e8f9f7 114 * Arguments : volatile uint32_t * ioreg : IO register for writing
<> 144:ef7eb2e8f9f7 115 * : : Use register definition name of the
<> 144:ef7eb2e8f9f7 116 * : : iodefine.h
<> 144:ef7eb2e8f9f7 117 * : uint32_t write_value : Write value for the IO register
<> 144:ef7eb2e8f9f7 118 * : uint32_t shift : The number of left shifts to the
<> 144:ef7eb2e8f9f7 119 * : : target bit
<> 144:ef7eb2e8f9f7 120 * : uint32_t mask : Mask value for the IO register
<> 144:ef7eb2e8f9f7 121 * : : (Target bit : "1")
<> 144:ef7eb2e8f9f7 122 * Return Value : None
<> 144:ef7eb2e8f9f7 123 ******************************************************************************/
<> 144:ef7eb2e8f9f7 124 void RZA_IO_RegWrite_32(volatile uint32_t * ioreg, uint32_t write_value, uint32_t shift, uint32_t mask)
<> 144:ef7eb2e8f9f7 125 {
<> 144:ef7eb2e8f9f7 126 uint32_t reg_value;
<> 144:ef7eb2e8f9f7 127
<> 144:ef7eb2e8f9f7 128 reg_value = *ioreg; /* Read from register */
<> 144:ef7eb2e8f9f7 129 reg_value = (reg_value & (~mask)) | (write_value << shift); /* Modify value */
<> 144:ef7eb2e8f9f7 130 *ioreg = reg_value; /* Write to register */
<> 144:ef7eb2e8f9f7 131 }
<> 144:ef7eb2e8f9f7 132
<> 144:ef7eb2e8f9f7 133 /******************************************************************************
<> 144:ef7eb2e8f9f7 134 * Function Name: RZA_IO_RegRead_8
<> 144:ef7eb2e8f9f7 135 * Description : IO register 8-bit read
<> 144:ef7eb2e8f9f7 136 * Arguments : volatile uint8_t * ioreg : IO register for reading
<> 144:ef7eb2e8f9f7 137 * : : Use register definition name of the
<> 144:ef7eb2e8f9f7 138 * : : iodefine.h
<> 144:ef7eb2e8f9f7 139 * : uint8_t shift : The number of right shifts to the
<> 144:ef7eb2e8f9f7 140 * : : target bit
<> 144:ef7eb2e8f9f7 141 * : uint8_t mask : Mask bit for the IO register
<> 144:ef7eb2e8f9f7 142 * : : (Target bit: "1")
<> 144:ef7eb2e8f9f7 143 * Return Value : uint8_t : Value of the obtained target bit
<> 144:ef7eb2e8f9f7 144 ******************************************************************************/
<> 144:ef7eb2e8f9f7 145 uint8_t RZA_IO_RegRead_8(volatile uint8_t * ioreg, uint8_t shift, uint8_t mask)
<> 144:ef7eb2e8f9f7 146 {
<> 144:ef7eb2e8f9f7 147 uint8_t reg_value;
<> 144:ef7eb2e8f9f7 148
<> 144:ef7eb2e8f9f7 149 reg_value = *ioreg; /* Read from register */
<> 144:ef7eb2e8f9f7 150 reg_value = (reg_value & mask) >> shift; /* Clear other bit and Bit shift */
<> 144:ef7eb2e8f9f7 151
<> 144:ef7eb2e8f9f7 152 return reg_value;
<> 144:ef7eb2e8f9f7 153 }
<> 144:ef7eb2e8f9f7 154
<> 144:ef7eb2e8f9f7 155 /******************************************************************************
<> 144:ef7eb2e8f9f7 156 * Function Name: RZA_IO_RegRead_16
<> 144:ef7eb2e8f9f7 157 * Description : IO register 16-bit read
<> 144:ef7eb2e8f9f7 158 * Arguments : volatile uint16_t * ioreg : IO register for reading
<> 144:ef7eb2e8f9f7 159 * : : Use register definition name of the
<> 144:ef7eb2e8f9f7 160 * : : iodefine.h
<> 144:ef7eb2e8f9f7 161 * : uint16_t shift : The number of right shifts to the
<> 144:ef7eb2e8f9f7 162 * : : target bit
<> 144:ef7eb2e8f9f7 163 * : uint16_t mask : Mask bit for the IO register
<> 144:ef7eb2e8f9f7 164 * : : (Target bit: "1")
<> 144:ef7eb2e8f9f7 165 * Return Value : uint16_t : Value of the obtained target bit
<> 144:ef7eb2e8f9f7 166 ******************************************************************************/
<> 144:ef7eb2e8f9f7 167 uint16_t RZA_IO_RegRead_16(volatile uint16_t * ioreg, uint16_t shift, uint16_t mask)
<> 144:ef7eb2e8f9f7 168 {
<> 144:ef7eb2e8f9f7 169 uint16_t reg_value;
<> 144:ef7eb2e8f9f7 170
<> 144:ef7eb2e8f9f7 171 reg_value = *ioreg; /* Read from register */
<> 144:ef7eb2e8f9f7 172 reg_value = (reg_value & mask) >> shift; /* Clear other bit and Bit shift */
<> 144:ef7eb2e8f9f7 173
<> 144:ef7eb2e8f9f7 174 return reg_value;
<> 144:ef7eb2e8f9f7 175 }
<> 144:ef7eb2e8f9f7 176
<> 144:ef7eb2e8f9f7 177 /******************************************************************************
<> 144:ef7eb2e8f9f7 178 * Function Name: RZA_IO_RegRead_32
<> 144:ef7eb2e8f9f7 179 * Description : IO register 32-bit read
<> 144:ef7eb2e8f9f7 180 * Arguments : volatile uint32_t * ioreg : IO register for reading
<> 144:ef7eb2e8f9f7 181 * : : Use register definition name of the
<> 144:ef7eb2e8f9f7 182 * : : iodefine.h
<> 144:ef7eb2e8f9f7 183 * : uint32_t shift : The number of right shifts to the
<> 144:ef7eb2e8f9f7 184 * : : target bit
<> 144:ef7eb2e8f9f7 185 * : uint32_t mask : Mask bit for the IO register
<> 144:ef7eb2e8f9f7 186 * : : (Target bit: "1")
<> 144:ef7eb2e8f9f7 187 * Return Value : uint32_t : Value of the obtained target bit
<> 144:ef7eb2e8f9f7 188 ******************************************************************************/
<> 144:ef7eb2e8f9f7 189 uint32_t RZA_IO_RegRead_32(volatile uint32_t * ioreg, uint32_t shift, uint32_t mask)
<> 144:ef7eb2e8f9f7 190 {
<> 144:ef7eb2e8f9f7 191 uint32_t reg_value;
<> 144:ef7eb2e8f9f7 192
<> 144:ef7eb2e8f9f7 193 reg_value = *ioreg; /* Read from register */
<> 144:ef7eb2e8f9f7 194 reg_value = (reg_value & mask) >> shift; /* Clear other bit and Bit shift */
<> 144:ef7eb2e8f9f7 195
<> 144:ef7eb2e8f9f7 196 return reg_value;
<> 144:ef7eb2e8f9f7 197 }
<> 144:ef7eb2e8f9f7 198
<> 144:ef7eb2e8f9f7 199
<> 144:ef7eb2e8f9f7 200 /* End of File */