mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

Committer:
Anna Bridge
Date:
Tue Mar 20 17:01:51 2018 +0000
Revision:
183:5166a824ec1a
Parent:
180:96ed750bd169
Child:
184:08ed48f1de7f
Fix mbed lib version

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /*
<> 149:156823d33999 2 * Copyright (c) 2015-2016, ARM Limited, All Rights Reserved
<> 149:156823d33999 3 * SPDX-License-Identifier: Apache-2.0
<> 149:156823d33999 4 *
<> 149:156823d33999 5 * Licensed under the Apache License, Version 2.0 (the "License"); you may
<> 149:156823d33999 6 * not use this file except in compliance with the License.
<> 149:156823d33999 7 * You may obtain a copy of the License at
<> 149:156823d33999 8 *
<> 149:156823d33999 9 * http://www.apache.org/licenses/LICENSE-2.0
<> 149:156823d33999 10 *
<> 149:156823d33999 11 * Unless required by applicable law or agreed to in writing, software
<> 149:156823d33999 12 * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
<> 149:156823d33999 13 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
<> 149:156823d33999 14 * See the License for the specific language governing permissions and
<> 149:156823d33999 15 * limitations under the License.
<> 149:156823d33999 16 */
<> 149:156823d33999 17
<> 153:fa9ff456f731 18 /* Declare __STDC_LIMIT_MACROS so stdint.h defines UINT32_MAX when using C++ */
<> 153:fa9ff456f731 19 #define __STDC_LIMIT_MACROS
<> 160:d5399cc887bb 20 #include "platform/mbed_critical.h"
<> 149:156823d33999 21
<> 149:156823d33999 22 #include "cmsis.h"
<> 149:156823d33999 23 #include "platform/mbed_assert.h"
<> 160:d5399cc887bb 24 #include "platform/mbed_toolchain.h"
<> 149:156823d33999 25
<> 149:156823d33999 26 static volatile uint32_t interrupt_enable_counter = 0;
<> 149:156823d33999 27 static volatile bool critical_interrupts_disabled = false;
<> 149:156823d33999 28
<> 149:156823d33999 29 bool core_util_are_interrupts_enabled(void)
<> 149:156823d33999 30 {
<> 149:156823d33999 31 #if defined(__CORTEX_A9)
<> 149:156823d33999 32 return ((__get_CPSR() & 0x80) == 0);
<> 149:156823d33999 33 #else
<> 149:156823d33999 34 return ((__get_PRIMASK() & 0x1) == 0);
<> 149:156823d33999 35 #endif
<> 149:156823d33999 36 }
<> 149:156823d33999 37
AnnaBridge 167:e84263d55307 38 bool core_util_is_isr_active(void)
AnnaBridge 167:e84263d55307 39 {
AnnaBridge 167:e84263d55307 40 #if defined(__CORTEX_A9)
AnnaBridge 167:e84263d55307 41 switch(__get_CPSR() & 0x1FU) {
Anna Bridge 180:96ed750bd169 42 case CPSR_M_USR:
Anna Bridge 180:96ed750bd169 43 case CPSR_M_SYS:
AnnaBridge 167:e84263d55307 44 return false;
Anna Bridge 180:96ed750bd169 45 case CPSR_M_SVC:
AnnaBridge 167:e84263d55307 46 default:
AnnaBridge 167:e84263d55307 47 return true;
AnnaBridge 167:e84263d55307 48 }
AnnaBridge 167:e84263d55307 49 #else
AnnaBridge 167:e84263d55307 50 return (__get_IPSR() != 0U);
AnnaBridge 167:e84263d55307 51 #endif
AnnaBridge 167:e84263d55307 52 }
AnnaBridge 167:e84263d55307 53
<> 149:156823d33999 54 MBED_WEAK void core_util_critical_section_enter(void)
<> 149:156823d33999 55 {
<> 149:156823d33999 56 bool interrupts_disabled = !core_util_are_interrupts_enabled();
<> 149:156823d33999 57 __disable_irq();
<> 149:156823d33999 58
<> 149:156823d33999 59 /* Save the interrupt disabled state as it was prior to any nested critical section lock use */
<> 149:156823d33999 60 if (!interrupt_enable_counter) {
<> 149:156823d33999 61 critical_interrupts_disabled = interrupts_disabled;
<> 149:156823d33999 62 }
<> 149:156823d33999 63
<> 149:156823d33999 64 /* If the interrupt_enable_counter overflows or we are in a nested critical section and interrupts
<> 149:156823d33999 65 are enabled, then something has gone badly wrong thus assert an error.
<> 149:156823d33999 66 */
<> 149:156823d33999 67 MBED_ASSERT(interrupt_enable_counter < UINT32_MAX);
<> 149:156823d33999 68 // FIXME
<> 149:156823d33999 69 #ifndef FEATURE_UVISOR
<> 149:156823d33999 70 if (interrupt_enable_counter > 0) {
<> 149:156823d33999 71 MBED_ASSERT(interrupts_disabled);
<> 149:156823d33999 72 }
<> 149:156823d33999 73 #else
<> 149:156823d33999 74 #warning "core_util_critical_section_enter needs fixing to work from unprivileged code"
<> 149:156823d33999 75 #endif /* FEATURE_UVISOR */
<> 149:156823d33999 76 interrupt_enable_counter++;
<> 149:156823d33999 77 }
<> 149:156823d33999 78
<> 149:156823d33999 79 MBED_WEAK void core_util_critical_section_exit(void)
<> 149:156823d33999 80 {
<> 149:156823d33999 81 /* If critical_section_enter has not previously been called, do nothing */
<> 149:156823d33999 82 if (interrupt_enable_counter) {
<> 149:156823d33999 83
<> 149:156823d33999 84 // FIXME
<> 149:156823d33999 85 #ifndef FEATURE_UVISOR
<> 149:156823d33999 86 bool interrupts_disabled = !core_util_are_interrupts_enabled(); /* get the current interrupt disabled state */
<> 149:156823d33999 87
<> 149:156823d33999 88 MBED_ASSERT(interrupts_disabled); /* Interrupts must be disabled on invoking an exit from a critical section */
<> 149:156823d33999 89 #else
<> 149:156823d33999 90 #warning "core_util_critical_section_exit needs fixing to work from unprivileged code"
<> 149:156823d33999 91 #endif /* FEATURE_UVISOR */
<> 149:156823d33999 92
<> 149:156823d33999 93 interrupt_enable_counter--;
<> 149:156823d33999 94
<> 149:156823d33999 95 /* Only re-enable interrupts if we are exiting the last of the nested critical sections and
<> 149:156823d33999 96 interrupts were enabled on entry to the first critical section.
<> 149:156823d33999 97 */
<> 149:156823d33999 98 if (!interrupt_enable_counter && !critical_interrupts_disabled) {
<> 149:156823d33999 99 __enable_irq();
<> 149:156823d33999 100 }
<> 149:156823d33999 101 }
<> 149:156823d33999 102 }
<> 149:156823d33999 103
AnnaBridge 172:7d866c31b3c5 104 #if __EXCLUSIVE_ACCESS
<> 149:156823d33999 105
<> 149:156823d33999 106 /* Supress __ldrex and __strex deprecated warnings - "#3731-D: intrinsic is deprecated" */
<> 149:156823d33999 107 #if defined (__CC_ARM)
<> 149:156823d33999 108 #pragma diag_suppress 3731
<> 149:156823d33999 109 #endif
<> 149:156823d33999 110
<> 149:156823d33999 111 bool core_util_atomic_cas_u8(uint8_t *ptr, uint8_t *expectedCurrentValue, uint8_t desiredValue)
<> 149:156823d33999 112 {
Anna Bridge 180:96ed750bd169 113 do {
Anna Bridge 180:96ed750bd169 114 uint8_t currentValue = __LDREXB((volatile uint8_t*)ptr);
Anna Bridge 180:96ed750bd169 115 if (currentValue != *expectedCurrentValue) {
Anna Bridge 180:96ed750bd169 116 *expectedCurrentValue = currentValue;
Anna Bridge 180:96ed750bd169 117 __CLREX();
Anna Bridge 180:96ed750bd169 118 return false;
Anna Bridge 180:96ed750bd169 119 }
Anna Bridge 180:96ed750bd169 120 } while (__STREXB(desiredValue, (volatile uint8_t*)ptr));
Anna Bridge 180:96ed750bd169 121 return true;
<> 149:156823d33999 122 }
<> 149:156823d33999 123
<> 149:156823d33999 124 bool core_util_atomic_cas_u16(uint16_t *ptr, uint16_t *expectedCurrentValue, uint16_t desiredValue)
<> 149:156823d33999 125 {
Anna Bridge 180:96ed750bd169 126 do {
Anna Bridge 180:96ed750bd169 127 uint16_t currentValue = __LDREXH((volatile uint16_t*)ptr);
Anna Bridge 180:96ed750bd169 128 if (currentValue != *expectedCurrentValue) {
Anna Bridge 180:96ed750bd169 129 *expectedCurrentValue = currentValue;
Anna Bridge 180:96ed750bd169 130 __CLREX();
Anna Bridge 180:96ed750bd169 131 return false;
Anna Bridge 180:96ed750bd169 132 }
Anna Bridge 180:96ed750bd169 133 } while (__STREXH(desiredValue, (volatile uint16_t*)ptr));
Anna Bridge 180:96ed750bd169 134 return true;
<> 149:156823d33999 135 }
<> 149:156823d33999 136
<> 149:156823d33999 137
<> 149:156823d33999 138 bool core_util_atomic_cas_u32(uint32_t *ptr, uint32_t *expectedCurrentValue, uint32_t desiredValue)
<> 149:156823d33999 139 {
Anna Bridge 180:96ed750bd169 140 do {
Anna Bridge 180:96ed750bd169 141 uint32_t currentValue = __LDREXW((volatile uint32_t*)ptr);
Anna Bridge 180:96ed750bd169 142 if (currentValue != *expectedCurrentValue) {
Anna Bridge 180:96ed750bd169 143 *expectedCurrentValue = currentValue;
Anna Bridge 180:96ed750bd169 144 __CLREX();
Anna Bridge 180:96ed750bd169 145 return false;
Anna Bridge 180:96ed750bd169 146 }
Anna Bridge 180:96ed750bd169 147 } while (__STREXW(desiredValue, (volatile uint32_t*)ptr));
Anna Bridge 180:96ed750bd169 148 return true;
<> 149:156823d33999 149 }
<> 149:156823d33999 150
<> 149:156823d33999 151 uint8_t core_util_atomic_incr_u8(uint8_t *valuePtr, uint8_t delta)
<> 149:156823d33999 152 {
<> 149:156823d33999 153 uint8_t newValue;
<> 149:156823d33999 154 do {
<> 149:156823d33999 155 newValue = __LDREXB((volatile uint8_t*)valuePtr) + delta;
<> 149:156823d33999 156 } while (__STREXB(newValue, (volatile uint8_t*)valuePtr));
<> 149:156823d33999 157 return newValue;
<> 149:156823d33999 158 }
<> 149:156823d33999 159
<> 149:156823d33999 160 uint16_t core_util_atomic_incr_u16(uint16_t *valuePtr, uint16_t delta)
<> 149:156823d33999 161 {
<> 149:156823d33999 162 uint16_t newValue;
<> 149:156823d33999 163 do {
<> 149:156823d33999 164 newValue = __LDREXH((volatile uint16_t*)valuePtr) + delta;
<> 149:156823d33999 165 } while (__STREXH(newValue, (volatile uint16_t*)valuePtr));
<> 149:156823d33999 166 return newValue;
<> 149:156823d33999 167 }
<> 149:156823d33999 168
<> 149:156823d33999 169 uint32_t core_util_atomic_incr_u32(uint32_t *valuePtr, uint32_t delta)
<> 149:156823d33999 170 {
<> 149:156823d33999 171 uint32_t newValue;
<> 149:156823d33999 172 do {
<> 149:156823d33999 173 newValue = __LDREXW((volatile uint32_t*)valuePtr) + delta;
<> 149:156823d33999 174 } while (__STREXW(newValue, (volatile uint32_t*)valuePtr));
<> 149:156823d33999 175 return newValue;
<> 149:156823d33999 176 }
<> 149:156823d33999 177
<> 149:156823d33999 178
<> 149:156823d33999 179 uint8_t core_util_atomic_decr_u8(uint8_t *valuePtr, uint8_t delta)
<> 149:156823d33999 180 {
<> 149:156823d33999 181 uint8_t newValue;
<> 149:156823d33999 182 do {
<> 149:156823d33999 183 newValue = __LDREXB((volatile uint8_t*)valuePtr) - delta;
<> 149:156823d33999 184 } while (__STREXB(newValue, (volatile uint8_t*)valuePtr));
<> 149:156823d33999 185 return newValue;
<> 149:156823d33999 186 }
<> 149:156823d33999 187
<> 149:156823d33999 188 uint16_t core_util_atomic_decr_u16(uint16_t *valuePtr, uint16_t delta)
<> 149:156823d33999 189 {
<> 149:156823d33999 190 uint16_t newValue;
<> 149:156823d33999 191 do {
<> 149:156823d33999 192 newValue = __LDREXH((volatile uint16_t*)valuePtr) - delta;
<> 149:156823d33999 193 } while (__STREXH(newValue, (volatile uint16_t*)valuePtr));
<> 149:156823d33999 194 return newValue;
<> 149:156823d33999 195 }
<> 149:156823d33999 196
<> 149:156823d33999 197 uint32_t core_util_atomic_decr_u32(uint32_t *valuePtr, uint32_t delta)
<> 149:156823d33999 198 {
<> 149:156823d33999 199 uint32_t newValue;
<> 149:156823d33999 200 do {
<> 149:156823d33999 201 newValue = __LDREXW((volatile uint32_t*)valuePtr) - delta;
<> 149:156823d33999 202 } while (__STREXW(newValue, (volatile uint32_t*)valuePtr));
<> 149:156823d33999 203 return newValue;
<> 149:156823d33999 204 }
<> 149:156823d33999 205
<> 149:156823d33999 206 #else
<> 149:156823d33999 207
<> 149:156823d33999 208 bool core_util_atomic_cas_u8(uint8_t *ptr, uint8_t *expectedCurrentValue, uint8_t desiredValue)
<> 149:156823d33999 209 {
<> 149:156823d33999 210 bool success;
<> 149:156823d33999 211 uint8_t currentValue;
<> 149:156823d33999 212 core_util_critical_section_enter();
<> 149:156823d33999 213 currentValue = *ptr;
<> 149:156823d33999 214 if (currentValue == *expectedCurrentValue) {
<> 149:156823d33999 215 *ptr = desiredValue;
<> 149:156823d33999 216 success = true;
<> 149:156823d33999 217 } else {
<> 149:156823d33999 218 *expectedCurrentValue = currentValue;
<> 149:156823d33999 219 success = false;
<> 149:156823d33999 220 }
<> 149:156823d33999 221 core_util_critical_section_exit();
<> 149:156823d33999 222 return success;
<> 149:156823d33999 223 }
<> 149:156823d33999 224
<> 149:156823d33999 225 bool core_util_atomic_cas_u16(uint16_t *ptr, uint16_t *expectedCurrentValue, uint16_t desiredValue)
<> 149:156823d33999 226 {
<> 149:156823d33999 227 bool success;
<> 149:156823d33999 228 uint16_t currentValue;
<> 149:156823d33999 229 core_util_critical_section_enter();
<> 149:156823d33999 230 currentValue = *ptr;
<> 149:156823d33999 231 if (currentValue == *expectedCurrentValue) {
<> 149:156823d33999 232 *ptr = desiredValue;
<> 149:156823d33999 233 success = true;
<> 149:156823d33999 234 } else {
<> 149:156823d33999 235 *expectedCurrentValue = currentValue;
<> 149:156823d33999 236 success = false;
<> 149:156823d33999 237 }
<> 149:156823d33999 238 core_util_critical_section_exit();
<> 149:156823d33999 239 return success;
<> 149:156823d33999 240 }
<> 149:156823d33999 241
<> 149:156823d33999 242
<> 149:156823d33999 243 bool core_util_atomic_cas_u32(uint32_t *ptr, uint32_t *expectedCurrentValue, uint32_t desiredValue)
<> 149:156823d33999 244 {
<> 149:156823d33999 245 bool success;
<> 149:156823d33999 246 uint32_t currentValue;
<> 149:156823d33999 247 core_util_critical_section_enter();
<> 149:156823d33999 248 currentValue = *ptr;
<> 149:156823d33999 249 if (currentValue == *expectedCurrentValue) {
<> 149:156823d33999 250 *ptr = desiredValue;
<> 149:156823d33999 251 success = true;
<> 149:156823d33999 252 } else {
<> 149:156823d33999 253 *expectedCurrentValue = currentValue;
<> 149:156823d33999 254 success = false;
<> 149:156823d33999 255 }
<> 149:156823d33999 256 core_util_critical_section_exit();
<> 149:156823d33999 257 return success;
<> 149:156823d33999 258 }
<> 149:156823d33999 259
<> 149:156823d33999 260
<> 149:156823d33999 261 uint8_t core_util_atomic_incr_u8(uint8_t *valuePtr, uint8_t delta)
<> 149:156823d33999 262 {
<> 149:156823d33999 263 uint8_t newValue;
<> 149:156823d33999 264 core_util_critical_section_enter();
<> 149:156823d33999 265 newValue = *valuePtr + delta;
<> 149:156823d33999 266 *valuePtr = newValue;
<> 149:156823d33999 267 core_util_critical_section_exit();
<> 149:156823d33999 268 return newValue;
<> 149:156823d33999 269 }
<> 149:156823d33999 270
<> 149:156823d33999 271 uint16_t core_util_atomic_incr_u16(uint16_t *valuePtr, uint16_t delta)
<> 149:156823d33999 272 {
<> 149:156823d33999 273 uint16_t newValue;
<> 149:156823d33999 274 core_util_critical_section_enter();
<> 149:156823d33999 275 newValue = *valuePtr + delta;
<> 149:156823d33999 276 *valuePtr = newValue;
<> 149:156823d33999 277 core_util_critical_section_exit();
<> 149:156823d33999 278 return newValue;
<> 149:156823d33999 279 }
<> 149:156823d33999 280
<> 149:156823d33999 281 uint32_t core_util_atomic_incr_u32(uint32_t *valuePtr, uint32_t delta)
<> 149:156823d33999 282 {
<> 149:156823d33999 283 uint32_t newValue;
<> 149:156823d33999 284 core_util_critical_section_enter();
<> 149:156823d33999 285 newValue = *valuePtr + delta;
<> 149:156823d33999 286 *valuePtr = newValue;
<> 149:156823d33999 287 core_util_critical_section_exit();
<> 149:156823d33999 288 return newValue;
<> 149:156823d33999 289 }
<> 149:156823d33999 290
<> 149:156823d33999 291
<> 149:156823d33999 292 uint8_t core_util_atomic_decr_u8(uint8_t *valuePtr, uint8_t delta)
<> 149:156823d33999 293 {
<> 149:156823d33999 294 uint8_t newValue;
<> 149:156823d33999 295 core_util_critical_section_enter();
<> 149:156823d33999 296 newValue = *valuePtr - delta;
<> 149:156823d33999 297 *valuePtr = newValue;
<> 149:156823d33999 298 core_util_critical_section_exit();
<> 149:156823d33999 299 return newValue;
<> 149:156823d33999 300 }
<> 149:156823d33999 301
<> 149:156823d33999 302 uint16_t core_util_atomic_decr_u16(uint16_t *valuePtr, uint16_t delta)
<> 149:156823d33999 303 {
<> 149:156823d33999 304 uint16_t newValue;
<> 149:156823d33999 305 core_util_critical_section_enter();
<> 149:156823d33999 306 newValue = *valuePtr - delta;
<> 149:156823d33999 307 *valuePtr = newValue;
<> 149:156823d33999 308 core_util_critical_section_exit();
<> 149:156823d33999 309 return newValue;
<> 149:156823d33999 310 }
<> 149:156823d33999 311
<> 149:156823d33999 312 uint32_t core_util_atomic_decr_u32(uint32_t *valuePtr, uint32_t delta)
<> 149:156823d33999 313 {
<> 149:156823d33999 314 uint32_t newValue;
<> 149:156823d33999 315 core_util_critical_section_enter();
<> 149:156823d33999 316 newValue = *valuePtr - delta;
<> 149:156823d33999 317 *valuePtr = newValue;
<> 149:156823d33999 318 core_util_critical_section_exit();
<> 149:156823d33999 319 return newValue;
<> 149:156823d33999 320 }
<> 149:156823d33999 321
<> 149:156823d33999 322 #endif
<> 149:156823d33999 323
<> 149:156823d33999 324
<> 149:156823d33999 325 bool core_util_atomic_cas_ptr(void **ptr, void **expectedCurrentValue, void *desiredValue) {
<> 149:156823d33999 326 return core_util_atomic_cas_u32(
<> 149:156823d33999 327 (uint32_t *)ptr,
<> 149:156823d33999 328 (uint32_t *)expectedCurrentValue,
<> 149:156823d33999 329 (uint32_t)desiredValue);
<> 149:156823d33999 330 }
<> 149:156823d33999 331
<> 149:156823d33999 332 void *core_util_atomic_incr_ptr(void **valuePtr, ptrdiff_t delta) {
<> 149:156823d33999 333 return (void *)core_util_atomic_incr_u32((uint32_t *)valuePtr, (uint32_t)delta);
<> 149:156823d33999 334 }
<> 149:156823d33999 335
<> 149:156823d33999 336 void *core_util_atomic_decr_ptr(void **valuePtr, ptrdiff_t delta) {
<> 149:156823d33999 337 return (void *)core_util_atomic_decr_u32((uint32_t *)valuePtr, (uint32_t)delta);
<> 149:156823d33999 338 }
<> 149:156823d33999 339