mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_NUVOTON/TARGET_NANO100/gpio_irq_api.c@176:447f873cad2f, 2017-10-25 (annotated)

Committer:
AnnaBridge
Date:
Wed Oct 25 14:53:38 2017 +0100
Revision:
176:447f873cad2f
Parent:
174:b96e65c34a4d 
This updates the lib to the mbed lib v 154

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 174:b96e65c34a4d 1 /* mbed Microcontroller Library
AnnaBridge 174:b96e65c34a4d 2 * Copyright (c) 2015-2017 Nuvoton
AnnaBridge 174:b96e65c34a4d 3 *
AnnaBridge 174:b96e65c34a4d 4 * Licensed under the Apache License, Version 2.0 (the "License");
AnnaBridge 174:b96e65c34a4d 5 * you may not use this file except in compliance with the License.
AnnaBridge 174:b96e65c34a4d 6 * You may obtain a copy of the License at
AnnaBridge 174:b96e65c34a4d 7 *
AnnaBridge 174:b96e65c34a4d 8 * http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 174:b96e65c34a4d 9 *
AnnaBridge 174:b96e65c34a4d 10 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 174:b96e65c34a4d 11 * distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 174:b96e65c34a4d 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 174:b96e65c34a4d 13 * See the License for the specific language governing permissions and
AnnaBridge 174:b96e65c34a4d 14 * limitations under the License.
AnnaBridge 174:b96e65c34a4d 15 */
AnnaBridge 174:b96e65c34a4d 16
AnnaBridge 174:b96e65c34a4d 17 #include "gpio_irq_api.h"
AnnaBridge 174:b96e65c34a4d 18
AnnaBridge 174:b96e65c34a4d 19 #if DEVICE_INTERRUPTIN
AnnaBridge 174:b96e65c34a4d 20
AnnaBridge 174:b96e65c34a4d 21 #include "gpio_api.h"
AnnaBridge 174:b96e65c34a4d 22 #include "cmsis.h"
AnnaBridge 174:b96e65c34a4d 23 #include "pinmap.h"
AnnaBridge 174:b96e65c34a4d 24 #include "PeripheralPins.h"
AnnaBridge 174:b96e65c34a4d 25 #include "mbed_error.h"
AnnaBridge 174:b96e65c34a4d 26 #include "nu_bitutil.h"
AnnaBridge 174:b96e65c34a4d 27
AnnaBridge 174:b96e65c34a4d 28 #define NU_MAX_PIN_PER_PORT 16
AnnaBridge 174:b96e65c34a4d 29
AnnaBridge 174:b96e65c34a4d 30 struct nu_gpio_irq_var {
AnnaBridge 174:b96e65c34a4d 31 gpio_irq_t * obj_arr;
AnnaBridge 174:b96e65c34a4d 32 uint32_t gpio_n;
AnnaBridge 174:b96e65c34a4d 33 void (*vec)(void);
AnnaBridge 174:b96e65c34a4d 34 };
AnnaBridge 174:b96e65c34a4d 35
AnnaBridge 174:b96e65c34a4d 36 void GPABC_IRQHandler(void);
AnnaBridge 174:b96e65c34a4d 37 void GPDEF_IRQHandler(void);
AnnaBridge 174:b96e65c34a4d 38 static void gpio_irq(struct nu_gpio_irq_var *var);
AnnaBridge 174:b96e65c34a4d 39
AnnaBridge 174:b96e65c34a4d 40 //EINT0_IRQn
AnnaBridge 174:b96e65c34a4d 41 static struct nu_gpio_irq_var gpio_irq_var_arr[] = {
AnnaBridge 174:b96e65c34a4d 42 {NULL, 0, GPABC_IRQHandler},
AnnaBridge 174:b96e65c34a4d 43 {NULL, 1, GPABC_IRQHandler},
AnnaBridge 174:b96e65c34a4d 44 {NULL, 2, GPABC_IRQHandler},
AnnaBridge 174:b96e65c34a4d 45 {NULL, 3, GPDEF_IRQHandler},
AnnaBridge 174:b96e65c34a4d 46 {NULL, 4, GPDEF_IRQHandler},
AnnaBridge 174:b96e65c34a4d 47 {NULL, 5, GPDEF_IRQHandler}
AnnaBridge 174:b96e65c34a4d 48 };
AnnaBridge 174:b96e65c34a4d 49
AnnaBridge 174:b96e65c34a4d 50 #define NU_MAX_PORT (sizeof (gpio_irq_var_arr) / sizeof (gpio_irq_var_arr[0]))
AnnaBridge 174:b96e65c34a4d 51
AnnaBridge 176:447f873cad2f 52 #ifndef MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_ENABLE
AnnaBridge 176:447f873cad2f 53 #define MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_ENABLE 0
AnnaBridge 174:b96e65c34a4d 54 #endif
AnnaBridge 174:b96e65c34a4d 55
AnnaBridge 176:447f873cad2f 56 #ifndef MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_ENABLE_LIST
AnnaBridge 176:447f873cad2f 57 #define MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_ENABLE_LIST NC
AnnaBridge 174:b96e65c34a4d 58 #endif
AnnaBridge 174:b96e65c34a4d 59 static PinName gpio_irq_debounce_arr[] = {
AnnaBridge 176:447f873cad2f 60 MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_ENABLE_LIST
AnnaBridge 174:b96e65c34a4d 61 };
AnnaBridge 174:b96e65c34a4d 62
AnnaBridge 176:447f873cad2f 63 #ifndef MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE
AnnaBridge 176:447f873cad2f 64 #define MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE GPIO_DBCLKSRC_IRC10K
AnnaBridge 174:b96e65c34a4d 65 #endif
AnnaBridge 174:b96e65c34a4d 66
AnnaBridge 176:447f873cad2f 67 #ifndef MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE
AnnaBridge 176:447f873cad2f 68 #define MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE GPIO_DBCLKSEL_16
AnnaBridge 174:b96e65c34a4d 69 #endif
AnnaBridge 174:b96e65c34a4d 70
AnnaBridge 174:b96e65c34a4d 71 int gpio_irq_init(gpio_irq_t *obj, PinName pin, gpio_irq_handler handler, uint32_t id)
AnnaBridge 174:b96e65c34a4d 72 {
AnnaBridge 174:b96e65c34a4d 73 if (pin == NC) {
AnnaBridge 174:b96e65c34a4d 74 return -1;
AnnaBridge 174:b96e65c34a4d 75 }
AnnaBridge 174:b96e65c34a4d 76
AnnaBridge 174:b96e65c34a4d 77 uint32_t pin_index = NU_PINNAME_TO_PIN(pin);
AnnaBridge 174:b96e65c34a4d 78 uint32_t port_index = NU_PINNAME_TO_PORT(pin);
AnnaBridge 174:b96e65c34a4d 79 if (pin_index >= NU_MAX_PIN_PER_PORT || port_index >= NU_MAX_PORT) {
AnnaBridge 174:b96e65c34a4d 80 return -1;
AnnaBridge 174:b96e65c34a4d 81 }
AnnaBridge 174:b96e65c34a4d 82
AnnaBridge 174:b96e65c34a4d 83 obj->pin = pin;
AnnaBridge 174:b96e65c34a4d 84 obj->irq_handler = (uint32_t) handler;
AnnaBridge 174:b96e65c34a4d 85 obj->irq_id = id;
AnnaBridge 174:b96e65c34a4d 86 obj->next = NULL;
AnnaBridge 174:b96e65c34a4d 87
AnnaBridge 174:b96e65c34a4d 88 GPIO_T *gpio_base = NU_PORT_BASE(port_index);
AnnaBridge 174:b96e65c34a4d 89 // NOTE: In InterruptIn constructor, gpio_irq_init() is called with gpio_init_in() which is responsible for multi-function pin setting.
AnnaBridge 174:b96e65c34a4d 90 // There is no need to call gpio_set() redundantly.
AnnaBridge 174:b96e65c34a4d 91
AnnaBridge 174:b96e65c34a4d 92 {
AnnaBridge 176:447f873cad2f 93 #if MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_ENABLE
AnnaBridge 174:b96e65c34a4d 94 // Suppress compiler warning
AnnaBridge 174:b96e65c34a4d 95 (void) gpio_irq_debounce_arr;
AnnaBridge 174:b96e65c34a4d 96
AnnaBridge 174:b96e65c34a4d 97 // Configure de-bounce clock source and sampling cycle time
AnnaBridge 176:447f873cad2f 98 GPIO_SET_DEBOUNCE_TIME(MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE, MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE);
AnnaBridge 174:b96e65c34a4d 99 GPIO_ENABLE_DEBOUNCE(gpio_base, 1 << pin_index);
AnnaBridge 174:b96e65c34a4d 100 #else
AnnaBridge 174:b96e65c34a4d 101 // Enable de-bounce if the pin is in the de-bounce enable list
AnnaBridge 174:b96e65c34a4d 102
AnnaBridge 174:b96e65c34a4d 103 // De-bounce defaults to disabled.
AnnaBridge 174:b96e65c34a4d 104 GPIO_DISABLE_DEBOUNCE(gpio_base, 1 << pin_index);
AnnaBridge 174:b96e65c34a4d 105
AnnaBridge 174:b96e65c34a4d 106 PinName *debounce_pos = gpio_irq_debounce_arr;
AnnaBridge 174:b96e65c34a4d 107 PinName *debounce_end = gpio_irq_debounce_arr + sizeof (gpio_irq_debounce_arr) / sizeof (gpio_irq_debounce_arr[0]);
AnnaBridge 174:b96e65c34a4d 108 for (; debounce_pos != debounce_end && *debounce_pos != NC; debounce_pos ++) {
AnnaBridge 174:b96e65c34a4d 109 uint32_t pin_index_debunce = NU_PINNAME_TO_PIN(*debounce_pos);
AnnaBridge 174:b96e65c34a4d 110 uint32_t port_index_debounce = NU_PINNAME_TO_PORT(*debounce_pos);
AnnaBridge 174:b96e65c34a4d 111
AnnaBridge 174:b96e65c34a4d 112 if (pin_index == pin_index_debunce &&
AnnaBridge 174:b96e65c34a4d 113 port_index == port_index_debounce) {
AnnaBridge 174:b96e65c34a4d 114 // Configure de-bounce clock source and sampling cycle time
AnnaBridge 176:447f873cad2f 115 GPIO_SET_DEBOUNCE_TIME(MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_CLOCK_SOURCE, MBED_CONF_TARGET_GPIO_IRQ_DEBOUNCE_SAMPLE_RATE);
AnnaBridge 174:b96e65c34a4d 116 GPIO_ENABLE_DEBOUNCE(gpio_base, 1 << pin_index);
AnnaBridge 174:b96e65c34a4d 117 break;
AnnaBridge 174:b96e65c34a4d 118 }
AnnaBridge 174:b96e65c34a4d 119 }
AnnaBridge 174:b96e65c34a4d 120 #endif
AnnaBridge 174:b96e65c34a4d 121 }
AnnaBridge 174:b96e65c34a4d 122
AnnaBridge 174:b96e65c34a4d 123 struct nu_gpio_irq_var *var = gpio_irq_var_arr + port_index;
AnnaBridge 174:b96e65c34a4d 124
AnnaBridge 174:b96e65c34a4d 125 // Add obj to linked list
AnnaBridge 174:b96e65c34a4d 126 gpio_irq_t *cur_obj = var->obj_arr;
AnnaBridge 174:b96e65c34a4d 127 if (cur_obj == NULL) {
AnnaBridge 174:b96e65c34a4d 128 var->obj_arr = obj;
AnnaBridge 174:b96e65c34a4d 129 } else {
AnnaBridge 174:b96e65c34a4d 130 while (cur_obj->next != NULL)
AnnaBridge 174:b96e65c34a4d 131 cur_obj = cur_obj->next;
AnnaBridge 174:b96e65c34a4d 132 cur_obj->next = obj;
AnnaBridge 174:b96e65c34a4d 133 }
AnnaBridge 174:b96e65c34a4d 134
AnnaBridge 174:b96e65c34a4d 135 // NOTE: InterruptIn requires IRQ enabled by default.
AnnaBridge 174:b96e65c34a4d 136 gpio_irq_enable(obj);
AnnaBridge 174:b96e65c34a4d 137
AnnaBridge 174:b96e65c34a4d 138 return 0;
AnnaBridge 174:b96e65c34a4d 139 }
AnnaBridge 174:b96e65c34a4d 140
AnnaBridge 174:b96e65c34a4d 141 void gpio_irq_free(gpio_irq_t *obj)
AnnaBridge 174:b96e65c34a4d 142 {
AnnaBridge 174:b96e65c34a4d 143 uint32_t pin_index = NU_PINNAME_TO_PIN(obj->pin);
AnnaBridge 174:b96e65c34a4d 144 uint32_t port_index = NU_PINNAME_TO_PORT(obj->pin);
AnnaBridge 174:b96e65c34a4d 145 struct nu_gpio_irq_var *var = gpio_irq_var_arr + port_index;
AnnaBridge 174:b96e65c34a4d 146
AnnaBridge 174:b96e65c34a4d 147 NVIC_DisableIRQ((var->gpio_n < 3) ? GPABC_IRQn : GPDEF_IRQn);
AnnaBridge 174:b96e65c34a4d 148 NU_PORT_BASE(port_index)->IER = 0;
AnnaBridge 174:b96e65c34a4d 149
AnnaBridge 174:b96e65c34a4d 150 MBED_ASSERT(pin_index < NU_MAX_PIN_PER_PORT);
AnnaBridge 174:b96e65c34a4d 151 gpio_irq_t *pre_obj = var->obj_arr;
AnnaBridge 174:b96e65c34a4d 152 if (pre_obj->pin == obj->pin)
AnnaBridge 174:b96e65c34a4d 153 var->obj_arr = pre_obj->next;
AnnaBridge 174:b96e65c34a4d 154 else {
AnnaBridge 174:b96e65c34a4d 155 int error_flag = 1;
AnnaBridge 174:b96e65c34a4d 156 while (pre_obj->next) {
AnnaBridge 174:b96e65c34a4d 157 gpio_irq_t *cur_obj = pre_obj->next;
AnnaBridge 174:b96e65c34a4d 158 if (cur_obj->pin == obj->pin) {
AnnaBridge 174:b96e65c34a4d 159 pre_obj->next = cur_obj->next;
AnnaBridge 174:b96e65c34a4d 160 error_flag = 0;
AnnaBridge 174:b96e65c34a4d 161 break;
AnnaBridge 174:b96e65c34a4d 162 }
AnnaBridge 174:b96e65c34a4d 163 pre_obj = pre_obj->next;
AnnaBridge 174:b96e65c34a4d 164 }
AnnaBridge 174:b96e65c34a4d 165 if (error_flag)
AnnaBridge 174:b96e65c34a4d 166 error("cannot find obj in gpio_irq_free()");
AnnaBridge 174:b96e65c34a4d 167 }
AnnaBridge 174:b96e65c34a4d 168 }
AnnaBridge 174:b96e65c34a4d 169
AnnaBridge 174:b96e65c34a4d 170 void gpio_irq_set(gpio_irq_t *obj, gpio_irq_event event, uint32_t enable)
AnnaBridge 174:b96e65c34a4d 171 {
AnnaBridge 174:b96e65c34a4d 172 uint32_t pin_index = NU_PINNAME_TO_PIN(obj->pin);
AnnaBridge 174:b96e65c34a4d 173 uint32_t port_index = NU_PINNAME_TO_PORT(obj->pin);
AnnaBridge 174:b96e65c34a4d 174 GPIO_T *gpio_base = NU_PORT_BASE(port_index);
AnnaBridge 174:b96e65c34a4d 175
AnnaBridge 174:b96e65c34a4d 176 switch (event) {
AnnaBridge 174:b96e65c34a4d 177 case IRQ_RISE:
AnnaBridge 174:b96e65c34a4d 178 if (enable) {
AnnaBridge 174:b96e65c34a4d 179 GPIO_EnableInt(gpio_base, pin_index, GPIO_INT_RISING);
AnnaBridge 174:b96e65c34a4d 180 }
AnnaBridge 174:b96e65c34a4d 181 else {
AnnaBridge 174:b96e65c34a4d 182 gpio_base->IER &= ~(GPIO_INT_RISING << pin_index);
AnnaBridge 174:b96e65c34a4d 183 }
AnnaBridge 174:b96e65c34a4d 184 break;
AnnaBridge 174:b96e65c34a4d 185
AnnaBridge 174:b96e65c34a4d 186 case IRQ_FALL:
AnnaBridge 174:b96e65c34a4d 187 if (enable) {
AnnaBridge 174:b96e65c34a4d 188 GPIO_EnableInt(gpio_base, pin_index, GPIO_INT_FALLING);
AnnaBridge 174:b96e65c34a4d 189 }
AnnaBridge 174:b96e65c34a4d 190 else {
AnnaBridge 174:b96e65c34a4d 191 gpio_base->IER &= ~(GPIO_INT_FALLING << pin_index);
AnnaBridge 174:b96e65c34a4d 192 }
AnnaBridge 174:b96e65c34a4d 193 break;
AnnaBridge 174:b96e65c34a4d 194
AnnaBridge 174:b96e65c34a4d 195 default:
AnnaBridge 174:b96e65c34a4d 196 break;
AnnaBridge 174:b96e65c34a4d 197 }
AnnaBridge 174:b96e65c34a4d 198 }
AnnaBridge 174:b96e65c34a4d 199
AnnaBridge 174:b96e65c34a4d 200 void gpio_irq_enable(gpio_irq_t *obj)
AnnaBridge 174:b96e65c34a4d 201 {
AnnaBridge 174:b96e65c34a4d 202 uint32_t port_index = NU_PINNAME_TO_PORT(obj->pin);
AnnaBridge 174:b96e65c34a4d 203 struct nu_gpio_irq_var *var = gpio_irq_var_arr + port_index;
AnnaBridge 174:b96e65c34a4d 204
AnnaBridge 174:b96e65c34a4d 205 NVIC_SetVector((var->gpio_n < 3) ? GPABC_IRQn : GPDEF_IRQn, (uint32_t) var->vec);
AnnaBridge 174:b96e65c34a4d 206 NVIC_EnableIRQ((var->gpio_n < 3) ? GPABC_IRQn : GPDEF_IRQn);
AnnaBridge 174:b96e65c34a4d 207 }
AnnaBridge 174:b96e65c34a4d 208
AnnaBridge 174:b96e65c34a4d 209 void gpio_irq_disable(gpio_irq_t *obj)
AnnaBridge 174:b96e65c34a4d 210 {
AnnaBridge 174:b96e65c34a4d 211 uint32_t port_index = NU_PINNAME_TO_PORT(obj->pin);
AnnaBridge 174:b96e65c34a4d 212 struct nu_gpio_irq_var *var = gpio_irq_var_arr + port_index;
AnnaBridge 174:b96e65c34a4d 213
AnnaBridge 174:b96e65c34a4d 214 NVIC_DisableIRQ((var->gpio_n < 3) ? GPABC_IRQn : GPDEF_IRQn);
AnnaBridge 174:b96e65c34a4d 215 }
AnnaBridge 174:b96e65c34a4d 216
AnnaBridge 174:b96e65c34a4d 217 void GPABC_IRQHandler(void)
AnnaBridge 174:b96e65c34a4d 218 {
AnnaBridge 174:b96e65c34a4d 219 if (PA->ISRC)
AnnaBridge 174:b96e65c34a4d 220 gpio_irq(gpio_irq_var_arr + 0);
AnnaBridge 174:b96e65c34a4d 221 if (PB->ISRC)
AnnaBridge 174:b96e65c34a4d 222 gpio_irq(gpio_irq_var_arr + 1);
AnnaBridge 174:b96e65c34a4d 223 if (PC->ISRC)
AnnaBridge 174:b96e65c34a4d 224 gpio_irq(gpio_irq_var_arr + 2);
AnnaBridge 174:b96e65c34a4d 225 }
AnnaBridge 174:b96e65c34a4d 226 void GPDEF_IRQHandler(void)
AnnaBridge 174:b96e65c34a4d 227 {
AnnaBridge 174:b96e65c34a4d 228 if (PD->ISRC)
AnnaBridge 174:b96e65c34a4d 229 gpio_irq(gpio_irq_var_arr + 3);
AnnaBridge 174:b96e65c34a4d 230 if (PE->ISRC)
AnnaBridge 174:b96e65c34a4d 231 gpio_irq(gpio_irq_var_arr + 4);
AnnaBridge 174:b96e65c34a4d 232 if (PF->ISRC)
AnnaBridge 174:b96e65c34a4d 233 gpio_irq(gpio_irq_var_arr + 5);
AnnaBridge 174:b96e65c34a4d 234 }
AnnaBridge 174:b96e65c34a4d 235
AnnaBridge 174:b96e65c34a4d 236 static void gpio_irq(struct nu_gpio_irq_var *var)
AnnaBridge 174:b96e65c34a4d 237 {
AnnaBridge 174:b96e65c34a4d 238 uint32_t port_index = var->gpio_n;
AnnaBridge 174:b96e65c34a4d 239 GPIO_T *gpio_base = NU_PORT_BASE(port_index);
AnnaBridge 174:b96e65c34a4d 240
AnnaBridge 174:b96e65c34a4d 241 uint32_t isrc = gpio_base->ISRC;
AnnaBridge 174:b96e65c34a4d 242 uint32_t ier = gpio_base->IER;
AnnaBridge 174:b96e65c34a4d 243 while (isrc) {
AnnaBridge 174:b96e65c34a4d 244 int pin_index = nu_ctz(isrc);
AnnaBridge 174:b96e65c34a4d 245 PinName pin = (PinName) NU_PINNAME(port_index, pin_index);
AnnaBridge 174:b96e65c34a4d 246 gpio_irq_t *obj = var->obj_arr;
AnnaBridge 174:b96e65c34a4d 247 while (obj) {
AnnaBridge 174:b96e65c34a4d 248 if (obj->pin == pin)
AnnaBridge 174:b96e65c34a4d 249 break;
AnnaBridge 174:b96e65c34a4d 250 obj = obj->next;
AnnaBridge 174:b96e65c34a4d 251 }
AnnaBridge 174:b96e65c34a4d 252 if (ier & (GPIO_INT_RISING << pin_index)) {
AnnaBridge 174:b96e65c34a4d 253 if (GPIO_PIN_ADDR(port_index, pin_index)) {
AnnaBridge 174:b96e65c34a4d 254 if (obj && obj->irq_handler) {
AnnaBridge 174:b96e65c34a4d 255 ((gpio_irq_handler) obj->irq_handler)(obj->irq_id, IRQ_RISE);
AnnaBridge 174:b96e65c34a4d 256 }
AnnaBridge 174:b96e65c34a4d 257 }
AnnaBridge 174:b96e65c34a4d 258 }
AnnaBridge 174:b96e65c34a4d 259
AnnaBridge 174:b96e65c34a4d 260 if (ier & (GPIO_INT_FALLING << pin_index)) {
AnnaBridge 174:b96e65c34a4d 261 if (! GPIO_PIN_ADDR(port_index, pin_index)) {
AnnaBridge 174:b96e65c34a4d 262 if (obj && obj->irq_handler) {
AnnaBridge 174:b96e65c34a4d 263 ((gpio_irq_handler) obj->irq_handler)(obj->irq_id, IRQ_FALL);
AnnaBridge 174:b96e65c34a4d 264 }
AnnaBridge 174:b96e65c34a4d 265 }
AnnaBridge 174:b96e65c34a4d 266 }
AnnaBridge 174:b96e65c34a4d 267
AnnaBridge 174:b96e65c34a4d 268 isrc &= ~(1 << pin_index);
AnnaBridge 174:b96e65c34a4d 269 }
AnnaBridge 174:b96e65c34a4d 270 // Clear all interrupt flags
AnnaBridge 174:b96e65c34a4d 271 gpio_base->ISRC = gpio_base->ISRC;
AnnaBridge 174:b96e65c34a4d 272 }
AnnaBridge 174:b96e65c34a4d 273
AnnaBridge 174:b96e65c34a4d 274 #endif