mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_STM/TARGET_STM32F1/device/stm32f1xx_ll_gpio.c@154:37f96f9d4de2, 2017-01-04 (annotated)

Committer:
<>
Date:
Wed Jan 04 16:58:05 2017 +0000
Revision:
154:37f96f9d4de2
Child:
165:e614a9f1c9e2
This updates the lib to the mbed lib v133

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 154:37f96f9d4de2 1 /**
<> 154:37f96f9d4de2 2 ******************************************************************************
<> 154:37f96f9d4de2 3 * @file stm32f1xx_ll_gpio.c
<> 154:37f96f9d4de2 4 * @author MCD Application Team
<> 154:37f96f9d4de2 5 * @version $VERSION$
<> 154:37f96f9d4de2 6 * @date $DATE$
<> 154:37f96f9d4de2 7 * @brief GPIO LL module driver.
<> 154:37f96f9d4de2 8 ******************************************************************************
<> 154:37f96f9d4de2 9 * @attention
<> 154:37f96f9d4de2 10 *
<> 154:37f96f9d4de2 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 154:37f96f9d4de2 12 *
<> 154:37f96f9d4de2 13 * Redistribution and use in source and binary forms, with or without modification,
<> 154:37f96f9d4de2 14 * are permitted provided that the following conditions are met:
<> 154:37f96f9d4de2 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 154:37f96f9d4de2 16 * this list of conditions and the following disclaimer.
<> 154:37f96f9d4de2 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 154:37f96f9d4de2 18 * this list of conditions and the following disclaimer in the documentation
<> 154:37f96f9d4de2 19 * and/or other materials provided with the distribution.
<> 154:37f96f9d4de2 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 154:37f96f9d4de2 21 * may be used to endorse or promote products derived from this software
<> 154:37f96f9d4de2 22 * without specific prior written permission.
<> 154:37f96f9d4de2 23 *
<> 154:37f96f9d4de2 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 154:37f96f9d4de2 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 154:37f96f9d4de2 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 154:37f96f9d4de2 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 154:37f96f9d4de2 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 154:37f96f9d4de2 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 154:37f96f9d4de2 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 154:37f96f9d4de2 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 154:37f96f9d4de2 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 154:37f96f9d4de2 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 154:37f96f9d4de2 34 *
<> 154:37f96f9d4de2 35 ******************************************************************************
<> 154:37f96f9d4de2 36 */
<> 154:37f96f9d4de2 37 #if defined(USE_FULL_LL_DRIVER)
<> 154:37f96f9d4de2 38
<> 154:37f96f9d4de2 39 /* Includes ------------------------------------------------------------------*/
<> 154:37f96f9d4de2 40 #include "stm32f1xx_ll_gpio.h"
<> 154:37f96f9d4de2 41 #include "stm32f1xx_ll_bus.h"
<> 154:37f96f9d4de2 42 #ifdef USE_FULL_ASSERT
<> 154:37f96f9d4de2 43 #include "stm32_assert.h"
<> 154:37f96f9d4de2 44 #else
<> 154:37f96f9d4de2 45 #define assert_param(expr) ((void)0U)
<> 154:37f96f9d4de2 46 #endif
<> 154:37f96f9d4de2 47
<> 154:37f96f9d4de2 48 /** @addtogroup STM32F1xx_LL_Driver
<> 154:37f96f9d4de2 49 * @{
<> 154:37f96f9d4de2 50 */
<> 154:37f96f9d4de2 51
<> 154:37f96f9d4de2 52 #if defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG)
<> 154:37f96f9d4de2 53
<> 154:37f96f9d4de2 54 /** @addtogroup GPIO_LL
<> 154:37f96f9d4de2 55 * @{
<> 154:37f96f9d4de2 56 */
<> 154:37f96f9d4de2 57
<> 154:37f96f9d4de2 58 /* Private types -------------------------------------------------------------*/
<> 154:37f96f9d4de2 59 /* Private variables ---------------------------------------------------------*/
<> 154:37f96f9d4de2 60 /* Private constants ---------------------------------------------------------*/
<> 154:37f96f9d4de2 61 /* Private macros ------------------------------------------------------------*/
<> 154:37f96f9d4de2 62 /** @addtogroup GPIO_LL_Private_Macros
<> 154:37f96f9d4de2 63 * @{
<> 154:37f96f9d4de2 64 */
<> 154:37f96f9d4de2 65 #define IS_LL_GPIO_PIN(__VALUE__) ((((uint32_t)0x00000000U) < (__VALUE__)) && ((__VALUE__) <= (LL_GPIO_PIN_ALL)))
<> 154:37f96f9d4de2 66
<> 154:37f96f9d4de2 67 #define IS_LL_GPIO_MODE(__VALUE__) (((__VALUE__) == LL_GPIO_MODE_ANALOG) ||\
<> 154:37f96f9d4de2 68 ((__VALUE__) == LL_GPIO_MODE_FLOATING) ||\
<> 154:37f96f9d4de2 69 ((__VALUE__) == LL_GPIO_MODE_INPUT) ||\
<> 154:37f96f9d4de2 70 ((__VALUE__) == LL_GPIO_MODE_OUTPUT) ||\
<> 154:37f96f9d4de2 71 ((__VALUE__) == LL_GPIO_MODE_ALTERNATE))
<> 154:37f96f9d4de2 72
<> 154:37f96f9d4de2 73 #define IS_LL_GPIO_SPEED(__VALUE__) (((__VALUE__) == LL_GPIO_SPEED_FREQ_LOW) ||\
<> 154:37f96f9d4de2 74 ((__VALUE__) == LL_GPIO_SPEED_FREQ_MEDIUM) ||\
<> 154:37f96f9d4de2 75 ((__VALUE__) == LL_GPIO_SPEED_FREQ_HIGH))
<> 154:37f96f9d4de2 76
<> 154:37f96f9d4de2 77 #define IS_LL_GPIO_OUTPUT_TYPE(__VALUE__) (((__VALUE__) == LL_GPIO_OUTPUT_PUSHPULL) ||\
<> 154:37f96f9d4de2 78 ((__VALUE__) == LL_GPIO_OUTPUT_OPENDRAIN))
<> 154:37f96f9d4de2 79
<> 154:37f96f9d4de2 80 #define IS_LL_GPIO_PULL(__VALUE__) (((__VALUE__) == LL_GPIO_PULL_DOWN) ||\
<> 154:37f96f9d4de2 81 ((__VALUE__) == LL_GPIO_PULL_UP))
<> 154:37f96f9d4de2 82
<> 154:37f96f9d4de2 83 /**
<> 154:37f96f9d4de2 84 * @}
<> 154:37f96f9d4de2 85 */
<> 154:37f96f9d4de2 86
<> 154:37f96f9d4de2 87 /* Private function prototypes -----------------------------------------------*/
<> 154:37f96f9d4de2 88
<> 154:37f96f9d4de2 89 /* Exported functions --------------------------------------------------------*/
<> 154:37f96f9d4de2 90 /** @addtogroup GPIO_LL_Exported_Functions
<> 154:37f96f9d4de2 91 * @{
<> 154:37f96f9d4de2 92 */
<> 154:37f96f9d4de2 93
<> 154:37f96f9d4de2 94 /** @addtogroup GPIO_LL_EF_Init
<> 154:37f96f9d4de2 95 * @{
<> 154:37f96f9d4de2 96 */
<> 154:37f96f9d4de2 97
<> 154:37f96f9d4de2 98 /**
<> 154:37f96f9d4de2 99 * @brief De-initialize GPIO registers (Registers restored to their default values).
<> 154:37f96f9d4de2 100 * @param GPIOx GPIO Port
<> 154:37f96f9d4de2 101 * @retval An ErrorStatus enumeration value:
<> 154:37f96f9d4de2 102 * - SUCCESS: GPIO registers are de-initialized
<> 154:37f96f9d4de2 103 * - ERROR: Wrong GPIO Port
<> 154:37f96f9d4de2 104 */
<> 154:37f96f9d4de2 105 ErrorStatus LL_GPIO_DeInit(GPIO_TypeDef *GPIOx)
<> 154:37f96f9d4de2 106 {
<> 154:37f96f9d4de2 107 ErrorStatus status = SUCCESS;
<> 154:37f96f9d4de2 108
<> 154:37f96f9d4de2 109 /* Check the parameters */
<> 154:37f96f9d4de2 110 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
<> 154:37f96f9d4de2 111
<> 154:37f96f9d4de2 112 /* Force and Release reset on clock of GPIOx Port */
<> 154:37f96f9d4de2 113 if (GPIOx == GPIOA)
<> 154:37f96f9d4de2 114 {
<> 154:37f96f9d4de2 115 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_GPIOA);
<> 154:37f96f9d4de2 116 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_GPIOA);
<> 154:37f96f9d4de2 117 }
<> 154:37f96f9d4de2 118 else if (GPIOx == GPIOB)
<> 154:37f96f9d4de2 119 {
<> 154:37f96f9d4de2 120 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_GPIOB);
<> 154:37f96f9d4de2 121 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_GPIOB);
<> 154:37f96f9d4de2 122 }
<> 154:37f96f9d4de2 123 else if (GPIOx == GPIOC)
<> 154:37f96f9d4de2 124 {
<> 154:37f96f9d4de2 125 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_GPIOC);
<> 154:37f96f9d4de2 126 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_GPIOC);
<> 154:37f96f9d4de2 127 }
<> 154:37f96f9d4de2 128 else if (GPIOx == GPIOD)
<> 154:37f96f9d4de2 129 {
<> 154:37f96f9d4de2 130 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_GPIOD);
<> 154:37f96f9d4de2 131 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_GPIOD);
<> 154:37f96f9d4de2 132 }
<> 154:37f96f9d4de2 133 #if defined(GPIOE)
<> 154:37f96f9d4de2 134 else if (GPIOx == GPIOE)
<> 154:37f96f9d4de2 135 {
<> 154:37f96f9d4de2 136 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_GPIOE);
<> 154:37f96f9d4de2 137 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_GPIOE);
<> 154:37f96f9d4de2 138 }
<> 154:37f96f9d4de2 139 #endif
<> 154:37f96f9d4de2 140 #if defined(GPIOF)
<> 154:37f96f9d4de2 141 else if (GPIOx == GPIOF)
<> 154:37f96f9d4de2 142 {
<> 154:37f96f9d4de2 143 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_GPIOF);
<> 154:37f96f9d4de2 144 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_GPIOF);
<> 154:37f96f9d4de2 145 }
<> 154:37f96f9d4de2 146 #endif
<> 154:37f96f9d4de2 147 #if defined(GPIOG)
<> 154:37f96f9d4de2 148 else if (GPIOx == GPIOG)
<> 154:37f96f9d4de2 149 {
<> 154:37f96f9d4de2 150 LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_GPIOG);
<> 154:37f96f9d4de2 151 LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_GPIOG);
<> 154:37f96f9d4de2 152 }
<> 154:37f96f9d4de2 153 #endif
<> 154:37f96f9d4de2 154 else
<> 154:37f96f9d4de2 155 {
<> 154:37f96f9d4de2 156 status = ERROR;
<> 154:37f96f9d4de2 157 }
<> 154:37f96f9d4de2 158
<> 154:37f96f9d4de2 159 return (status);
<> 154:37f96f9d4de2 160 }
<> 154:37f96f9d4de2 161
<> 154:37f96f9d4de2 162 /**
<> 154:37f96f9d4de2 163 * @brief Initialize GPIO registers according to the specified parameters in GPIO_InitStruct.
<> 154:37f96f9d4de2 164 * @param GPIOx GPIO Port
<> 154:37f96f9d4de2 165 * @param GPIO_InitStruct: pointer to a @ref LL_GPIO_InitTypeDef structure
<> 154:37f96f9d4de2 166 * that contains the configuration information for the specified GPIO peripheral.
<> 154:37f96f9d4de2 167 * @retval An ErrorStatus enumeration value:
<> 154:37f96f9d4de2 168 * - SUCCESS: GPIO registers are initialized according to GPIO_InitStruct content
<> 154:37f96f9d4de2 169 * - ERROR: Not applicable
<> 154:37f96f9d4de2 170 */
<> 154:37f96f9d4de2 171 ErrorStatus LL_GPIO_Init(GPIO_TypeDef *GPIOx, LL_GPIO_InitTypeDef *GPIO_InitStruct)
<> 154:37f96f9d4de2 172 {
<> 154:37f96f9d4de2 173 uint32_t pinpos = 0x00000000U;
<> 154:37f96f9d4de2 174 uint32_t currentpin = 0x00000000U;
<> 154:37f96f9d4de2 175
<> 154:37f96f9d4de2 176 /* Check the parameters */
<> 154:37f96f9d4de2 177 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
<> 154:37f96f9d4de2 178 assert_param(IS_LL_GPIO_PIN(GPIO_InitStruct->Pin));
<> 154:37f96f9d4de2 179 assert_param(IS_LL_GPIO_MODE(GPIO_InitStruct->Mode));
<> 154:37f96f9d4de2 180 assert_param(IS_LL_GPIO_PULL(GPIO_InitStruct->Pull));
<> 154:37f96f9d4de2 181
<> 154:37f96f9d4de2 182 /* ------------------------- Configure the port pins ---------------- */
<> 154:37f96f9d4de2 183 /* Initialize pinpos on first pin set */
<> 154:37f96f9d4de2 184 pinpos = POSITION_VAL(GPIO_InitStruct->Pin);
<> 154:37f96f9d4de2 185
<> 154:37f96f9d4de2 186 /* Configure the port pins */
<> 154:37f96f9d4de2 187 while ((((GPIO_InitStruct->Pin) & 0x0000FFFFU) >> pinpos) != 0x00000000U)
<> 154:37f96f9d4de2 188 {
<> 154:37f96f9d4de2 189 /* Get current io position */
<> 154:37f96f9d4de2 190 if(pinpos <8 )
<> 154:37f96f9d4de2 191 {
<> 154:37f96f9d4de2 192 currentpin = (GPIO_InitStruct->Pin) & (0x00000101U << pinpos);
<> 154:37f96f9d4de2 193 }
<> 154:37f96f9d4de2 194 else
<> 154:37f96f9d4de2 195 {
<> 154:37f96f9d4de2 196 currentpin = (GPIO_InitStruct->Pin) & ((0x00010001U << (pinpos-8)) | 0x04000000U);
<> 154:37f96f9d4de2 197 }
<> 154:37f96f9d4de2 198
<> 154:37f96f9d4de2 199 if (currentpin)
<> 154:37f96f9d4de2 200 {
<> 154:37f96f9d4de2 201 /* Pin Mode configuration */
<> 154:37f96f9d4de2 202 LL_GPIO_SetPinMode(GPIOx, currentpin, GPIO_InitStruct->Mode);
<> 154:37f96f9d4de2 203
<> 154:37f96f9d4de2 204 /* Pull-up Pull down resistor configuration*/
<> 154:37f96f9d4de2 205 LL_GPIO_SetPinPull(GPIOx, currentpin, GPIO_InitStruct->Pull);
<> 154:37f96f9d4de2 206
<> 154:37f96f9d4de2 207 if ((GPIO_InitStruct->Mode == LL_GPIO_MODE_OUTPUT) || (GPIO_InitStruct->Mode == LL_GPIO_MODE_FLOATING))
<> 154:37f96f9d4de2 208 {
<> 154:37f96f9d4de2 209 /* Speed mode configuration */
<> 154:37f96f9d4de2 210 LL_GPIO_SetPinSpeed(GPIOx, currentpin, GPIO_InitStruct->Speed);
<> 154:37f96f9d4de2 211 }
<> 154:37f96f9d4de2 212 }
<> 154:37f96f9d4de2 213 pinpos++;
<> 154:37f96f9d4de2 214 }
<> 154:37f96f9d4de2 215
<> 154:37f96f9d4de2 216 if ((GPIO_InitStruct->Mode == LL_GPIO_MODE_OUTPUT) || (GPIO_InitStruct->Mode == LL_GPIO_MODE_FLOATING))
<> 154:37f96f9d4de2 217 {
<> 154:37f96f9d4de2 218 /* Check Output mode parameters */
<> 154:37f96f9d4de2 219 assert_param(IS_LL_GPIO_OUTPUT_TYPE(GPIO_InitStruct->OutputType));
<> 154:37f96f9d4de2 220
<> 154:37f96f9d4de2 221 /* Output mode configuration*/
<> 154:37f96f9d4de2 222 LL_GPIO_SetPinOutputType(GPIOx, GPIO_InitStruct->Pin, GPIO_InitStruct->OutputType);
<> 154:37f96f9d4de2 223 }
<> 154:37f96f9d4de2 224 return (SUCCESS);
<> 154:37f96f9d4de2 225 }
<> 154:37f96f9d4de2 226
<> 154:37f96f9d4de2 227 /**
<> 154:37f96f9d4de2 228 * @brief Set each @ref LL_GPIO_InitTypeDef field to default value.
<> 154:37f96f9d4de2 229 * @param GPIO_InitStruct: pointer to a @ref LL_GPIO_InitTypeDef structure
<> 154:37f96f9d4de2 230 * whose fields will be set to default values.
<> 154:37f96f9d4de2 231 * @retval None
<> 154:37f96f9d4de2 232 */
<> 154:37f96f9d4de2 233
<> 154:37f96f9d4de2 234 void LL_GPIO_StructInit(LL_GPIO_InitTypeDef *GPIO_InitStruct)
<> 154:37f96f9d4de2 235 {
<> 154:37f96f9d4de2 236 /* Reset GPIO init structure parameters values */
<> 154:37f96f9d4de2 237 GPIO_InitStruct->Pin = LL_GPIO_PIN_ALL;
<> 154:37f96f9d4de2 238 GPIO_InitStruct->Mode = LL_GPIO_MODE_FLOATING;
<> 154:37f96f9d4de2 239 GPIO_InitStruct->Speed = 0x00000000U;
<> 154:37f96f9d4de2 240 GPIO_InitStruct->OutputType = LL_GPIO_OUTPUT_OPENDRAIN;
<> 154:37f96f9d4de2 241 GPIO_InitStruct->Pull = LL_GPIO_PULL_DOWN;
<> 154:37f96f9d4de2 242 }
<> 154:37f96f9d4de2 243
<> 154:37f96f9d4de2 244 /**
<> 154:37f96f9d4de2 245 * @}
<> 154:37f96f9d4de2 246 */
<> 154:37f96f9d4de2 247
<> 154:37f96f9d4de2 248 /**
<> 154:37f96f9d4de2 249 * @}
<> 154:37f96f9d4de2 250 */
<> 154:37f96f9d4de2 251
<> 154:37f96f9d4de2 252 /**
<> 154:37f96f9d4de2 253 * @}
<> 154:37f96f9d4de2 254 */
<> 154:37f96f9d4de2 255
<> 154:37f96f9d4de2 256 #endif /* defined (GPIOA) || defined (GPIOB) || defined (GPIOC) || defined (GPIOD) || defined (GPIOE) || defined (GPIOF) || defined (GPIOG) */
<> 154:37f96f9d4de2 257
<> 154:37f96f9d4de2 258 /**
<> 154:37f96f9d4de2 259 * @}
<> 154:37f96f9d4de2 260 */
<> 154:37f96f9d4de2 261
<> 154:37f96f9d4de2 262 #endif /* USE_FULL_LL_DRIVER */
<> 154:37f96f9d4de2 263
<> 154:37f96f9d4de2 264 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
<> 154:37f96f9d4de2 265