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mbed library sources. Supersedes mbed-src.

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targets/TARGET_STM/TARGET_STM32L1/device/stm32l1xx_hal_dac.h@149:156823d33999, 2016-10-28 (annotated)

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
Child:
184:08ed48f1de7f
This updates the lib to the mbed lib v128



NOTE: This release includes a restructuring of the file and directory locations and thus some

include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 149:156823d33999 1 /**
<> 149:156823d33999 2 ******************************************************************************
<> 149:156823d33999 3 * @file stm32l1xx_hal_dac.h
<> 149:156823d33999 4 * @author MCD Application Team
<> 149:156823d33999 5 * @version V1.2.0
<> 149:156823d33999 6 * @date 01-July-2016
<> 149:156823d33999 7 * @brief Header file of DAC HAL module.
<> 149:156823d33999 8 ******************************************************************************
<> 149:156823d33999 9 * @attention
<> 149:156823d33999 10 *
<> 149:156823d33999 11 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 149:156823d33999 12 *
<> 149:156823d33999 13 * Redistribution and use in source and binary forms, with or without modification,
<> 149:156823d33999 14 * are permitted provided that the following conditions are met:
<> 149:156823d33999 15 * 1. Redistributions of source code must retain the above copyright notice,
<> 149:156823d33999 16 * this list of conditions and the following disclaimer.
<> 149:156823d33999 17 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 149:156823d33999 18 * this list of conditions and the following disclaimer in the documentation
<> 149:156823d33999 19 * and/or other materials provided with the distribution.
<> 149:156823d33999 20 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 149:156823d33999 21 * may be used to endorse or promote products derived from this software
<> 149:156823d33999 22 * without specific prior written permission.
<> 149:156823d33999 23 *
<> 149:156823d33999 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 149:156823d33999 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 149:156823d33999 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 149:156823d33999 27 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 149:156823d33999 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 149:156823d33999 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 149:156823d33999 30 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 149:156823d33999 31 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 149:156823d33999 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 149:156823d33999 33 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 149:156823d33999 34 *
<> 149:156823d33999 35 ******************************************************************************
<> 149:156823d33999 36 */
<> 149:156823d33999 37
<> 149:156823d33999 38 /* Define to prevent recursive inclusion -------------------------------------*/
<> 149:156823d33999 39 #ifndef __STM32L1xx_HAL_DAC_H
<> 149:156823d33999 40 #define __STM32L1xx_HAL_DAC_H
<> 149:156823d33999 41
<> 149:156823d33999 42 #ifdef __cplusplus
<> 149:156823d33999 43 extern "C" {
<> 149:156823d33999 44 #endif
<> 149:156823d33999 45
<> 149:156823d33999 46 /* Includes ------------------------------------------------------------------*/
<> 149:156823d33999 47 #include "stm32l1xx_hal_def.h"
<> 149:156823d33999 48
<> 149:156823d33999 49 /** @addtogroup STM32L1xx_HAL_Driver
<> 149:156823d33999 50 * @{
<> 149:156823d33999 51 */
<> 149:156823d33999 52
<> 149:156823d33999 53 /** @addtogroup DAC
<> 149:156823d33999 54 * @{
<> 149:156823d33999 55 */
<> 149:156823d33999 56
<> 149:156823d33999 57 /* Exported types ------------------------------------------------------------*/
<> 149:156823d33999 58
<> 149:156823d33999 59 /** @defgroup DAC_Exported_Types DAC Exported Types
<> 149:156823d33999 60 * @{
<> 149:156823d33999 61 */
<> 149:156823d33999 62
<> 149:156823d33999 63 /**
<> 149:156823d33999 64 * @brief HAL State structures definition
<> 149:156823d33999 65 */
<> 149:156823d33999 66 typedef enum
<> 149:156823d33999 67 {
<> 149:156823d33999 68 HAL_DAC_STATE_RESET = 0x00, /*!< DAC not yet initialized or disabled */
<> 149:156823d33999 69 HAL_DAC_STATE_READY = 0x01, /*!< DAC initialized and ready for use */
<> 149:156823d33999 70 HAL_DAC_STATE_BUSY = 0x02, /*!< DAC internal processing is ongoing */
<> 149:156823d33999 71 HAL_DAC_STATE_TIMEOUT = 0x03, /*!< DAC timeout state */
<> 149:156823d33999 72 HAL_DAC_STATE_ERROR = 0x04 /*!< DAC error state */
<> 149:156823d33999 73
<> 149:156823d33999 74 }HAL_DAC_StateTypeDef;
<> 149:156823d33999 75
<> 149:156823d33999 76 /**
<> 149:156823d33999 77 * @brief DAC handle Structure definition
<> 149:156823d33999 78 */
<> 149:156823d33999 79 typedef struct
<> 149:156823d33999 80 {
<> 149:156823d33999 81 DAC_TypeDef *Instance; /*!< Register base address */
<> 149:156823d33999 82
<> 149:156823d33999 83 __IO HAL_DAC_StateTypeDef State; /*!< DAC communication state */
<> 149:156823d33999 84
<> 149:156823d33999 85 HAL_LockTypeDef Lock; /*!< DAC locking object */
<> 149:156823d33999 86
<> 149:156823d33999 87 DMA_HandleTypeDef *DMA_Handle1; /*!< Pointer DMA handler for channel 1 */
<> 149:156823d33999 88
<> 149:156823d33999 89 DMA_HandleTypeDef *DMA_Handle2; /*!< Pointer DMA handler for channel 2 */
<> 149:156823d33999 90
<> 149:156823d33999 91 __IO uint32_t ErrorCode; /*!< DAC Error code */
<> 149:156823d33999 92
<> 149:156823d33999 93 }DAC_HandleTypeDef;
<> 149:156823d33999 94
<> 149:156823d33999 95 /**
<> 149:156823d33999 96 * @brief DAC Configuration regular Channel structure definition
<> 149:156823d33999 97 */
<> 149:156823d33999 98 typedef struct
<> 149:156823d33999 99 {
<> 149:156823d33999 100 uint32_t DAC_Trigger; /*!< Specifies the external trigger for the selected DAC channel.
<> 149:156823d33999 101 This parameter can be a value of @ref DAC_trigger_selection */
<> 149:156823d33999 102
<> 149:156823d33999 103 uint32_t DAC_OutputBuffer; /*!< Specifies whether the DAC channel output buffer is enabled or disabled.
<> 149:156823d33999 104 This parameter can be a value of @ref DAC_output_buffer */
<> 149:156823d33999 105
<> 149:156823d33999 106 }DAC_ChannelConfTypeDef;
<> 149:156823d33999 107
<> 149:156823d33999 108 /**
<> 149:156823d33999 109 * @}
<> 149:156823d33999 110 */
<> 149:156823d33999 111
<> 149:156823d33999 112 /* Exported constants --------------------------------------------------------*/
<> 149:156823d33999 113
<> 149:156823d33999 114 /** @defgroup DAC_Exported_Constants DAC Exported Constants
<> 149:156823d33999 115 * @{
<> 149:156823d33999 116 */
<> 149:156823d33999 117
<> 149:156823d33999 118 /** @defgroup DAC_Error_Code DAC Error Code
<> 149:156823d33999 119 * @{
<> 149:156823d33999 120 */
<> 149:156823d33999 121 #define HAL_DAC_ERROR_NONE 0x00 /*!< No error */
<> 149:156823d33999 122 #define HAL_DAC_ERROR_DMAUNDERRUNCH1 0x01 /*!< DAC channel1 DMA underrun error */
<> 149:156823d33999 123 #define HAL_DAC_ERROR_DMAUNDERRUNCH2 0x02 /*!< DAC channel2 DMA underrun error */
<> 149:156823d33999 124 #define HAL_DAC_ERROR_DMA 0x04 /*!< DMA error */
<> 149:156823d33999 125 /**
<> 149:156823d33999 126 * @}
<> 149:156823d33999 127 */
<> 149:156823d33999 128
<> 149:156823d33999 129 /** @defgroup DAC_trigger_selection DAC trigger selection
<> 149:156823d33999 130 * @{
<> 149:156823d33999 131 */
<> 149:156823d33999 132 #define DAC_TRIGGER_NONE ((uint32_t)0x00000000) /*!< Conversion is automatic once the DAC1_DHRxxxx register
<> 149:156823d33999 133 has been loaded, and not by external trigger */
<> 149:156823d33999 134 #define DAC_TRIGGER_T6_TRGO ((uint32_t) DAC_CR_TEN1) /*!< TIM6 TRGO selected as external conversion trigger for DAC channel */
<> 149:156823d33999 135 #define DAC_TRIGGER_T7_TRGO ((uint32_t)( DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< TIM7 TRGO selected as external conversion trigger for DAC channel */
<> 149:156823d33999 136 #define DAC_TRIGGER_T9_TRGO ((uint32_t)( DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM9 TRGO selected as external conversion trigger for DAC channel */
<> 149:156823d33999 137 #define DAC_TRIGGER_T2_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TEN1)) /*!< TIM2 TRGO selected as external conversion trigger for DAC channel */
<> 149:156823d33999 138 #define DAC_TRIGGER_T4_TRGO ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_0 | DAC_CR_TEN1)) /*!< TIM4 TRGO selected as external conversion trigger for DAC channel */
<> 149:156823d33999 139 #define DAC_TRIGGER_EXT_IT9 ((uint32_t)(DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TEN1)) /*!< EXTI Line9 event selected as external conversion trigger for DAC channel */
<> 149:156823d33999 140 #define DAC_TRIGGER_SOFTWARE ((uint32_t)(DAC_CR_TSEL1 | DAC_CR_TEN1)) /*!< Conversion started by software trigger for DAC channel */
<> 149:156823d33999 141
<> 149:156823d33999 142 /**
<> 149:156823d33999 143 * @}
<> 149:156823d33999 144 */
<> 149:156823d33999 145
<> 149:156823d33999 146 /** @defgroup DAC_output_buffer DAC output buffer
<> 149:156823d33999 147 * @{
<> 149:156823d33999 148 */
<> 149:156823d33999 149 #define DAC_OUTPUTBUFFER_ENABLE ((uint32_t)0x00000000)
<> 149:156823d33999 150 #define DAC_OUTPUTBUFFER_DISABLE ((uint32_t)DAC_CR_BOFF1)
<> 149:156823d33999 151
<> 149:156823d33999 152 /**
<> 149:156823d33999 153 * @}
<> 149:156823d33999 154 */
<> 149:156823d33999 155
<> 149:156823d33999 156 /** @defgroup DAC_Channel_selection DAC Channel selection
<> 149:156823d33999 157 * @{
<> 149:156823d33999 158 */
<> 149:156823d33999 159 #define DAC_CHANNEL_1 ((uint32_t)0x00000000)
<> 149:156823d33999 160 #define DAC_CHANNEL_2 ((uint32_t)0x00000010)
<> 149:156823d33999 161
<> 149:156823d33999 162 /**
<> 149:156823d33999 163 * @}
<> 149:156823d33999 164 */
<> 149:156823d33999 165
<> 149:156823d33999 166 /** @defgroup DAC_data_alignement DAC data alignement
<> 149:156823d33999 167 * @{
<> 149:156823d33999 168 */
<> 149:156823d33999 169 #define DAC_ALIGN_12B_R ((uint32_t)0x00000000)
<> 149:156823d33999 170 #define DAC_ALIGN_12B_L ((uint32_t)0x00000004)
<> 149:156823d33999 171 #define DAC_ALIGN_8B_R ((uint32_t)0x00000008)
<> 149:156823d33999 172
<> 149:156823d33999 173 /**
<> 149:156823d33999 174 * @}
<> 149:156823d33999 175 */
<> 149:156823d33999 176
<> 149:156823d33999 177 /** @defgroup DAC_flags_definition DAC flags definition
<> 149:156823d33999 178 * @{
<> 149:156823d33999 179 */
<> 149:156823d33999 180 #define DAC_FLAG_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1)
<> 149:156823d33999 181 #define DAC_FLAG_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2)
<> 149:156823d33999 182
<> 149:156823d33999 183 /**
<> 149:156823d33999 184 * @}
<> 149:156823d33999 185 */
<> 149:156823d33999 186
<> 149:156823d33999 187 /** @defgroup DAC_IT_definition DAC IT definition
<> 149:156823d33999 188 * @{
<> 149:156823d33999 189 */
<> 149:156823d33999 190 #define DAC_IT_DMAUDR1 ((uint32_t)DAC_SR_DMAUDR1)
<> 149:156823d33999 191 #define DAC_IT_DMAUDR2 ((uint32_t)DAC_SR_DMAUDR2)
<> 149:156823d33999 192
<> 149:156823d33999 193 /**
<> 149:156823d33999 194 * @}
<> 149:156823d33999 195 */
<> 149:156823d33999 196
<> 149:156823d33999 197 /**
<> 149:156823d33999 198 * @}
<> 149:156823d33999 199 */
<> 149:156823d33999 200
<> 149:156823d33999 201 /* Exported macro ------------------------------------------------------------*/
<> 149:156823d33999 202
<> 149:156823d33999 203 /** @defgroup DAC_Exported_Macros DAC Exported Macros
<> 149:156823d33999 204 * @{
<> 149:156823d33999 205 */
<> 149:156823d33999 206
<> 149:156823d33999 207 /** @brief Reset DAC handle state
<> 149:156823d33999 208 * @param __HANDLE__: specifies the DAC handle.
<> 149:156823d33999 209 * @retval None
<> 149:156823d33999 210 */
<> 149:156823d33999 211 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET)
<> 149:156823d33999 212
<> 149:156823d33999 213 /** @brief Enable the DAC channel
<> 149:156823d33999 214 * @param __HANDLE__: specifies the DAC handle.
<> 149:156823d33999 215 * @param __DAC_Channel__: specifies the DAC channel
<> 149:156823d33999 216 * @retval None
<> 149:156823d33999 217 */
<> 149:156823d33999 218 #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \
<> 149:156823d33999 219 ((__HANDLE__)->Instance->CR |= (DAC_CR_EN1 << (__DAC_Channel__)))
<> 149:156823d33999 220
<> 149:156823d33999 221 /** @brief Disable the DAC channel
<> 149:156823d33999 222 * @param __HANDLE__: specifies the DAC handle
<> 149:156823d33999 223 * @param __DAC_Channel__: specifies the DAC channel.
<> 149:156823d33999 224 * @retval None
<> 149:156823d33999 225 */
<> 149:156823d33999 226 #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \
<> 149:156823d33999 227 ((__HANDLE__)->Instance->CR &= ~(DAC_CR_EN1 << (__DAC_Channel__)))
<> 149:156823d33999 228
<> 149:156823d33999 229
<> 149:156823d33999 230 /** @brief Enable the DAC interrupt
<> 149:156823d33999 231 * @param __HANDLE__: specifies the DAC handle
<> 149:156823d33999 232 * @param __INTERRUPT__: specifies the DAC interrupt.
<> 149:156823d33999 233 * This parameter can be any combination of the following values:
<> 149:156823d33999 234 * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
<> 149:156823d33999 235 * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt
<> 149:156823d33999 236 * @retval None
<> 149:156823d33999 237 */
<> 149:156823d33999 238 #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__))
<> 149:156823d33999 239
<> 149:156823d33999 240 /** @brief Disable the DAC interrupt
<> 149:156823d33999 241 * @param __HANDLE__: specifies the DAC handle
<> 149:156823d33999 242 * @param __INTERRUPT__: specifies the DAC interrupt.
<> 149:156823d33999 243 * This parameter can be any combination of the following values:
<> 149:156823d33999 244 * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
<> 149:156823d33999 245 * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt
<> 149:156823d33999 246 * @retval None
<> 149:156823d33999 247 */
<> 149:156823d33999 248 #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__))
<> 149:156823d33999 249
<> 149:156823d33999 250 /** @brief Checks if the specified DAC interrupt source is enabled or disabled.
<> 149:156823d33999 251 * @param __HANDLE__: DAC handle
<> 149:156823d33999 252 * @param __INTERRUPT__: DAC interrupt source to check
<> 149:156823d33999 253 * This parameter can be any combination of the following values:
<> 149:156823d33999 254 * @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
<> 149:156823d33999 255 * @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt
<> 149:156823d33999 256 * @retval State of interruption (SET or RESET)
<> 149:156823d33999 257 */
<> 149:156823d33999 258 #define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__))
<> 149:156823d33999 259
<> 149:156823d33999 260 /** @brief Get the selected DAC's flag status.
<> 149:156823d33999 261 * @param __HANDLE__: specifies the DAC handle.
<> 149:156823d33999 262 * @param __FLAG__: specifies the DAC flag to get.
<> 149:156823d33999 263 * This parameter can be any combination of the following values:
<> 149:156823d33999 264 * @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag
<> 149:156823d33999 265 * @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag
<> 149:156823d33999 266 * @retval None
<> 149:156823d33999 267 */
<> 149:156823d33999 268 #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
<> 149:156823d33999 269
<> 149:156823d33999 270 /** @brief Clear the DAC's flag.
<> 149:156823d33999 271 * @param __HANDLE__: specifies the DAC handle.
<> 149:156823d33999 272 * @param __FLAG__: specifies the DAC flag to clear.
<> 149:156823d33999 273 * This parameter can be any combination of the following values:
<> 149:156823d33999 274 * @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag
<> 149:156823d33999 275 * @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag
<> 149:156823d33999 276 * @retval None
<> 149:156823d33999 277 */
<> 149:156823d33999 278 #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__))
<> 149:156823d33999 279
<> 149:156823d33999 280 /**
<> 149:156823d33999 281 * @}
<> 149:156823d33999 282 */
<> 149:156823d33999 283
<> 149:156823d33999 284 /* Private macro -------------------------------------------------------------*/
<> 149:156823d33999 285
<> 149:156823d33999 286 /** @defgroup DAC_Private_Macros DAC Private Macros
<> 149:156823d33999 287 * @{
<> 149:156823d33999 288 */
<> 149:156823d33999 289 #define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \
<> 149:156823d33999 290 ((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \
<> 149:156823d33999 291 ((TRIGGER) == DAC_TRIGGER_T7_TRGO) || \
<> 149:156823d33999 292 ((TRIGGER) == DAC_TRIGGER_T9_TRGO) || \
<> 149:156823d33999 293 ((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \
<> 149:156823d33999 294 ((TRIGGER) == DAC_TRIGGER_T4_TRGO) || \
<> 149:156823d33999 295 ((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \
<> 149:156823d33999 296 ((TRIGGER) == DAC_TRIGGER_SOFTWARE))
<> 149:156823d33999 297
<> 149:156823d33999 298 #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \
<> 149:156823d33999 299 ((STATE) == DAC_OUTPUTBUFFER_DISABLE))
<> 149:156823d33999 300
<> 149:156823d33999 301 #define IS_DAC_CHANNEL(CHANNEL) (((CHANNEL) == DAC_CHANNEL_1) || \
<> 149:156823d33999 302 ((CHANNEL) == DAC_CHANNEL_2))
<> 149:156823d33999 303
<> 149:156823d33999 304 #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \
<> 149:156823d33999 305 ((ALIGN) == DAC_ALIGN_12B_L) || \
<> 149:156823d33999 306 ((ALIGN) == DAC_ALIGN_8B_R))
<> 149:156823d33999 307
<> 149:156823d33999 308 #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0)
<> 149:156823d33999 309
<> 149:156823d33999 310 #define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000008) + (__ALIGNMENT__))
<> 149:156823d33999 311
<> 149:156823d33999 312 #define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000014) + (__ALIGNMENT__))
<> 149:156823d33999 313
<> 149:156823d33999 314 #define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (((uint32_t)0x00000020) + (__ALIGNMENT__))
<> 149:156823d33999 315
<> 149:156823d33999 316 /**
<> 149:156823d33999 317 * @}
<> 149:156823d33999 318 */
<> 149:156823d33999 319
<> 149:156823d33999 320
<> 149:156823d33999 321 /* Include DAC HAL Extension module */
<> 149:156823d33999 322 #include "stm32l1xx_hal_dac_ex.h"
<> 149:156823d33999 323
<> 149:156823d33999 324 /* Exported functions --------------------------------------------------------*/
<> 149:156823d33999 325
<> 149:156823d33999 326 /** @addtogroup DAC_Exported_Functions
<> 149:156823d33999 327 * @{
<> 149:156823d33999 328 */
<> 149:156823d33999 329
<> 149:156823d33999 330 /** @addtogroup DAC_Exported_Functions_Group1
<> 149:156823d33999 331 * @{
<> 149:156823d33999 332 */
<> 149:156823d33999 333 /* Initialization and de-initialization functions *****************************/
<> 149:156823d33999 334 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef* hdac);
<> 149:156823d33999 335 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef* hdac);
<> 149:156823d33999 336 void HAL_DAC_MspInit(DAC_HandleTypeDef* hdac);
<> 149:156823d33999 337 void HAL_DAC_MspDeInit(DAC_HandleTypeDef* hdac);
<> 149:156823d33999 338
<> 149:156823d33999 339 /**
<> 149:156823d33999 340 * @}
<> 149:156823d33999 341 */
<> 149:156823d33999 342
<> 149:156823d33999 343 /** @addtogroup DAC_Exported_Functions_Group2
<> 149:156823d33999 344 * @{
<> 149:156823d33999 345 */
<> 149:156823d33999 346 /* IO operation functions *****************************************************/
<> 149:156823d33999 347 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef* hdac, uint32_t Channel);
<> 149:156823d33999 348 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef* hdac, uint32_t Channel);
<> 149:156823d33999 349 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t* pData, uint32_t Length, uint32_t Alignment);
<> 149:156823d33999 350 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef* hdac, uint32_t Channel);
<> 149:156823d33999 351 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data);
<> 149:156823d33999 352 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef* hdac, uint32_t Channel);
<> 149:156823d33999 353
<> 149:156823d33999 354 /**
<> 149:156823d33999 355 * @}
<> 149:156823d33999 356 */
<> 149:156823d33999 357
<> 149:156823d33999 358 /** @addtogroup DAC_Exported_Functions_Group2
<> 149:156823d33999 359 * @{
<> 149:156823d33999 360 */
<> 149:156823d33999 361 /* Peripheral Control functions ***********************************************/
<> 149:156823d33999 362 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel);
<> 149:156823d33999 363
<> 149:156823d33999 364 /**
<> 149:156823d33999 365 * @}
<> 149:156823d33999 366 */
<> 149:156823d33999 367
<> 149:156823d33999 368 /** @addtogroup DAC_Exported_Functions_Group2
<> 149:156823d33999 369 * @{
<> 149:156823d33999 370 */
<> 149:156823d33999 371 /* Peripheral State functions *************************************************/
<> 149:156823d33999 372 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef* hdac);
<> 149:156823d33999 373 void HAL_DAC_IRQHandler(DAC_HandleTypeDef* hdac);
<> 149:156823d33999 374 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac);
<> 149:156823d33999 375
<> 149:156823d33999 376 void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef* hdac);
<> 149:156823d33999 377 void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef* hdac);
<> 149:156823d33999 378 void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac);
<> 149:156823d33999 379 void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac);
<> 149:156823d33999 380
<> 149:156823d33999 381 /**
<> 149:156823d33999 382 * @}
<> 149:156823d33999 383 */
<> 149:156823d33999 384
<> 149:156823d33999 385 /**
<> 149:156823d33999 386 * @}
<> 149:156823d33999 387 */
<> 149:156823d33999 388
<> 149:156823d33999 389 /**
<> 149:156823d33999 390 * @}
<> 149:156823d33999 391 */
<> 149:156823d33999 392
<> 149:156823d33999 393 /**
<> 149:156823d33999 394 * @}
<> 149:156823d33999 395 */
<> 149:156823d33999 396
<> 149:156823d33999 397 #ifdef __cplusplus
<> 149:156823d33999 398 }
<> 149:156823d33999 399 #endif
<> 149:156823d33999 400
<> 149:156823d33999 401 #endif /*__STM32L1xx_HAL_DAC_H */
<> 149:156823d33999 402
<> 149:156823d33999 403 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
<> 149:156823d33999 404