mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_STM/TARGET_STM32F2/device/stm32f2xx_hal_usart.c@149:156823d33999, 2016-10-28 (annotated)

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
Parent:
targets/cmsis/TARGET_STM/TARGET_STM32F2/stm32f2xx_hal_usart.c@144:ef7eb2e8f9f7
Child:
167:e84263d55307
This updates the lib to the mbed lib v128



NOTE: This release includes a restructuring of the file and directory locations and thus some

include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /**
<> 144:ef7eb2e8f9f7 2 ******************************************************************************
<> 144:ef7eb2e8f9f7 3 * @file stm32f2xx_hal_usart.c
<> 144:ef7eb2e8f9f7 4 * @author MCD Application Team
<> 144:ef7eb2e8f9f7 5 * @version V1.1.3
<> 144:ef7eb2e8f9f7 6 * @date 29-June-2016
<> 144:ef7eb2e8f9f7 7 * @brief USART HAL module driver.
<> 144:ef7eb2e8f9f7 8 * This file provides firmware functions to manage the following
<> 144:ef7eb2e8f9f7 9 * functionalities of the Universal Synchronous Asynchronous Receiver Transmitter (USART) peripheral:
<> 144:ef7eb2e8f9f7 10 * + Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 11 * + IO operation functions
<> 144:ef7eb2e8f9f7 12 * + Peripheral Control functions
<> 144:ef7eb2e8f9f7 13 @verbatim
<> 144:ef7eb2e8f9f7 14 ==============================================================================
<> 144:ef7eb2e8f9f7 15 ##### How to use this driver #####
<> 144:ef7eb2e8f9f7 16 ==============================================================================
<> 144:ef7eb2e8f9f7 17 [..]
<> 144:ef7eb2e8f9f7 18 The USART HAL driver can be used as follows:
<> 144:ef7eb2e8f9f7 19
<> 144:ef7eb2e8f9f7 20 (#) Declare a USART_HandleTypeDef handle structure.
<> 144:ef7eb2e8f9f7 21 (#) Initialize the USART low level resources by implementing the HAL_USART_MspInit () API:
<> 144:ef7eb2e8f9f7 22 (##) Enable the USARTx interface clock.
<> 144:ef7eb2e8f9f7 23 (##) USART pins configuration:
<> 144:ef7eb2e8f9f7 24 (+++) Enable the clock for the USART GPIOs.
<> 144:ef7eb2e8f9f7 25 (+++) Configure these USART pins as alternate function pull-up.
<> 144:ef7eb2e8f9f7 26 (##) NVIC configuration if you need to use interrupt process (HAL_USART_Transmit_IT(),
<> 144:ef7eb2e8f9f7 27 HAL_USART_Receive_IT() and HAL_USART_TransmitReceive_IT() APIs):
<> 144:ef7eb2e8f9f7 28 (+++) Configure the USARTx interrupt priority.
<> 144:ef7eb2e8f9f7 29 (+++) Enable the NVIC USART IRQ handle.
<> 144:ef7eb2e8f9f7 30 (##) DMA Configuration if you need to use DMA process (HAL_USART_Transmit_DMA()
<> 144:ef7eb2e8f9f7 31 HAL_USART_Receive_IT() and HAL_USART_TransmitReceive_IT() APIs):
<> 144:ef7eb2e8f9f7 32 (+++) Declare a DMA handle structure for the Tx/Rx stream.
<> 144:ef7eb2e8f9f7 33 (+++) Enable the DMAx interface clock.
<> 144:ef7eb2e8f9f7 34 (+++) Configure the declared DMA handle structure with the required Tx/Rx parameters.
<> 144:ef7eb2e8f9f7 35 (+++) Configure the DMA Tx/Rx Stream.
<> 144:ef7eb2e8f9f7 36 (+++) Associate the initialized DMA handle to the USART DMA Tx/Rx handle.
<> 144:ef7eb2e8f9f7 37 (+++) Configure the priority and enable the NVIC for the transfer complete interrupt on the DMA Tx/Rx Stream.
<> 144:ef7eb2e8f9f7 38
<> 144:ef7eb2e8f9f7 39 (#) Program the Baud Rate, Word Length, Stop Bit, Parity, Hardware
<> 144:ef7eb2e8f9f7 40 flow control and Mode(Receiver/Transmitter) in the husart Init structure.
<> 144:ef7eb2e8f9f7 41
<> 144:ef7eb2e8f9f7 42 (#) Initialize the USART registers by calling the HAL_USART_Init() API:
<> 144:ef7eb2e8f9f7 43 (++) These APIs configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
<> 144:ef7eb2e8f9f7 44 by calling the customized HAL_USART_MspInit(&husart) API.
<> 144:ef7eb2e8f9f7 45
<> 144:ef7eb2e8f9f7 46 -@@- The specific USART interrupts (Transmission complete interrupt,
<> 144:ef7eb2e8f9f7 47 RXNE interrupt and Error Interrupts) will be managed using the macros
<> 144:ef7eb2e8f9f7 48 __HAL_USART_ENABLE_IT() and __HAL_USART_DISABLE_IT() inside the transmit and receive process.
<> 144:ef7eb2e8f9f7 49
<> 144:ef7eb2e8f9f7 50 (#) Three operation modes are available within this driver :
<> 144:ef7eb2e8f9f7 51
<> 144:ef7eb2e8f9f7 52 *** Polling mode IO operation ***
<> 144:ef7eb2e8f9f7 53 =================================
<> 144:ef7eb2e8f9f7 54 [..]
<> 144:ef7eb2e8f9f7 55 (+) Send an amount of data in blocking mode using HAL_USART_Transmit()
<> 144:ef7eb2e8f9f7 56 (+) Receive an amount of data in blocking mode using HAL_USART_Receive()
<> 144:ef7eb2e8f9f7 57
<> 144:ef7eb2e8f9f7 58 *** Interrupt mode IO operation ***
<> 144:ef7eb2e8f9f7 59 ===================================
<> 144:ef7eb2e8f9f7 60 [..]
<> 144:ef7eb2e8f9f7 61 (+) Send an amount of data in non blocking mode using HAL_USART_Transmit_IT()
<> 144:ef7eb2e8f9f7 62 (+) At transmission end of transfer HAL_USART_TxHalfCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 63 add his own code by customization of function pointer HAL_USART_TxCpltCallback
<> 144:ef7eb2e8f9f7 64 (+) Receive an amount of data in non blocking mode using HAL_USART_Receive_IT()
<> 144:ef7eb2e8f9f7 65 (+) At reception end of transfer HAL_USART_RxCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 66 add his own code by customization of function pointer HAL_USART_RxCpltCallback
<> 144:ef7eb2e8f9f7 67 (+) In case of transfer Error, HAL_USART_ErrorCallback() function is executed and user can
<> 144:ef7eb2e8f9f7 68 add his own code by customization of function pointer HAL_USART_ErrorCallback
<> 144:ef7eb2e8f9f7 69
<> 144:ef7eb2e8f9f7 70 *** DMA mode IO operation ***
<> 144:ef7eb2e8f9f7 71 ==============================
<> 144:ef7eb2e8f9f7 72 [..]
<> 144:ef7eb2e8f9f7 73 (+) Send an amount of data in non blocking mode (DMA) using HAL_USART_Transmit_DMA()
<> 144:ef7eb2e8f9f7 74 (+) At transmission end of half transfer HAL_USART_TxHalfCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 75 add his own code by customization of function pointer HAL_USART_TxHalfCpltCallback
<> 144:ef7eb2e8f9f7 76 (+) At transmission end of transfer HAL_USART_TxCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 77 add his own code by customization of function pointer HAL_USART_TxCpltCallback
<> 144:ef7eb2e8f9f7 78 (+) Receive an amount of data in non blocking mode (DMA) using HAL_USART_Receive_DMA()
<> 144:ef7eb2e8f9f7 79 (+) At reception end of half transfer HAL_USART_RxHalfCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 80 add his own code by customization of function pointer HAL_USART_RxHalfCpltCallback
<> 144:ef7eb2e8f9f7 81 (+) At reception end of transfer HAL_USART_RxCpltCallback is executed and user can
<> 144:ef7eb2e8f9f7 82 add his own code by customization of function pointer HAL_USART_RxCpltCallback
<> 144:ef7eb2e8f9f7 83 (+) In case of transfer Error, HAL_USART_ErrorCallback() function is executed and user can
<> 144:ef7eb2e8f9f7 84 add his own code by customization of function pointer HAL_USART_ErrorCallback
<> 144:ef7eb2e8f9f7 85 (+) Pause the DMA Transfer using HAL_USART_DMAPause()
<> 144:ef7eb2e8f9f7 86 (+) Resume the DMA Transfer using HAL_USART_DMAResume()
<> 144:ef7eb2e8f9f7 87 (+) Stop the DMA Transfer using HAL_USART_DMAStop()
<> 144:ef7eb2e8f9f7 88
<> 144:ef7eb2e8f9f7 89 *** USART HAL driver macros list ***
<> 144:ef7eb2e8f9f7 90 =============================================
<> 144:ef7eb2e8f9f7 91 [..]
<> 144:ef7eb2e8f9f7 92 Below the list of most used macros in USART HAL driver.
<> 144:ef7eb2e8f9f7 93
<> 144:ef7eb2e8f9f7 94 (+) __HAL_USART_ENABLE: Enable the USART peripheral
<> 144:ef7eb2e8f9f7 95 (+) __HAL_USART_DISABLE: Disable the USART peripheral
<> 144:ef7eb2e8f9f7 96 (+) __HAL_USART_GET_FLAG : Check whether the specified USART flag is set or not
<> 144:ef7eb2e8f9f7 97 (+) __HAL_USART_CLEAR_FLAG : Clear the specified USART pending flag
<> 144:ef7eb2e8f9f7 98 (+) __HAL_USART_ENABLE_IT: Enable the specified USART interrupt
<> 144:ef7eb2e8f9f7 99 (+) __HAL_USART_DISABLE_IT: Disable the specified USART interrupt
<> 144:ef7eb2e8f9f7 100
<> 144:ef7eb2e8f9f7 101 [..]
<> 144:ef7eb2e8f9f7 102 (@) You can refer to the USART HAL driver header file for more useful macros
<> 144:ef7eb2e8f9f7 103
<> 144:ef7eb2e8f9f7 104 @endverbatim
<> 144:ef7eb2e8f9f7 105 ******************************************************************************
<> 144:ef7eb2e8f9f7 106 * @attention
<> 144:ef7eb2e8f9f7 107 *
<> 144:ef7eb2e8f9f7 108 * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 109 *
<> 144:ef7eb2e8f9f7 110 * Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 111 * are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 112 * 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 113 * this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 114 * 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 115 * this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 116 * and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 117 * 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 118 * may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 119 * without specific prior written permission.
<> 144:ef7eb2e8f9f7 120 *
<> 144:ef7eb2e8f9f7 121 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 122 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 123 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 124 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 125 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 126 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 127 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 128 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 129 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 130 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 131 *
<> 144:ef7eb2e8f9f7 132 ******************************************************************************
<> 144:ef7eb2e8f9f7 133 */
<> 144:ef7eb2e8f9f7 134
<> 144:ef7eb2e8f9f7 135 /* Includes ------------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 136 #include "stm32f2xx_hal.h"
<> 144:ef7eb2e8f9f7 137
<> 144:ef7eb2e8f9f7 138 /** @addtogroup STM32F2xx_HAL_Driver
<> 144:ef7eb2e8f9f7 139 * @{
<> 144:ef7eb2e8f9f7 140 */
<> 144:ef7eb2e8f9f7 141
<> 144:ef7eb2e8f9f7 142 /** @defgroup USART USART
<> 144:ef7eb2e8f9f7 143 * @brief HAL USART Synchronous module driver
<> 144:ef7eb2e8f9f7 144 * @{
<> 144:ef7eb2e8f9f7 145 */
<> 144:ef7eb2e8f9f7 146 #ifdef HAL_USART_MODULE_ENABLED
<> 144:ef7eb2e8f9f7 147 /* Private typedef -----------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 148 /* Private define ------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 149 /** @addtogroup USART_Private_Constants
<> 144:ef7eb2e8f9f7 150 * @{
<> 144:ef7eb2e8f9f7 151 */
<> 144:ef7eb2e8f9f7 152 #define DUMMY_DATA 0xFFFFU
<> 144:ef7eb2e8f9f7 153 #define USART_TIMEOUT_VALUE 22000U
<> 144:ef7eb2e8f9f7 154 /**
<> 144:ef7eb2e8f9f7 155 * @}
<> 144:ef7eb2e8f9f7 156 */
<> 144:ef7eb2e8f9f7 157 /* Private macro -------------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 158 /* Private variables ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 159 /* Private function prototypes -----------------------------------------------*/
<> 144:ef7eb2e8f9f7 160 /* Private functions ---------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 161 /** @addtogroup USART_Private_Functions
<> 144:ef7eb2e8f9f7 162 * @{
<> 144:ef7eb2e8f9f7 163 */
<> 144:ef7eb2e8f9f7 164 static void USART_EndTxTransfer(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 165 static void USART_EndRxTransfer(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 166 static HAL_StatusTypeDef USART_Transmit_IT(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 167 static HAL_StatusTypeDef USART_EndTransmit_IT(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 168 static HAL_StatusTypeDef USART_Receive_IT(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 169 static HAL_StatusTypeDef USART_TransmitReceive_IT(USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 170 static void USART_SetConfig (USART_HandleTypeDef *husart);
<> 144:ef7eb2e8f9f7 171 static void USART_DMATransmitCplt(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 172 static void USART_DMATxHalfCplt(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 173 static void USART_DMAReceiveCplt(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 174 static void USART_DMARxHalfCplt(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 175 static void USART_DMAError(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 176 static void USART_DMAAbortOnError(DMA_HandleTypeDef *hdma);
<> 144:ef7eb2e8f9f7 177
<> 144:ef7eb2e8f9f7 178 static HAL_StatusTypeDef USART_WaitOnFlagUntilTimeout(USART_HandleTypeDef *husart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout);
<> 144:ef7eb2e8f9f7 179 /**
<> 144:ef7eb2e8f9f7 180 * @}
<> 144:ef7eb2e8f9f7 181 */
<> 144:ef7eb2e8f9f7 182
<> 144:ef7eb2e8f9f7 183 /* Exported functions --------------------------------------------------------*/
<> 144:ef7eb2e8f9f7 184 /** @defgroup USART_Exported_Functions USART Exported Functions
<> 144:ef7eb2e8f9f7 185 * @{
<> 144:ef7eb2e8f9f7 186 */
<> 144:ef7eb2e8f9f7 187
<> 144:ef7eb2e8f9f7 188 /** @defgroup USART_Exported_Functions_Group1 USART Initialization and de-initialization functions
<> 144:ef7eb2e8f9f7 189 * @brief Initialization and Configuration functions
<> 144:ef7eb2e8f9f7 190 *
<> 144:ef7eb2e8f9f7 191 @verbatim
<> 144:ef7eb2e8f9f7 192 ==============================================================================
<> 144:ef7eb2e8f9f7 193 ##### Initialization and Configuration functions #####
<> 144:ef7eb2e8f9f7 194 ==============================================================================
<> 144:ef7eb2e8f9f7 195 [..]
<> 144:ef7eb2e8f9f7 196 This subsection provides a set of functions allowing to initialize the USART
<> 144:ef7eb2e8f9f7 197 in asynchronous and in synchronous modes.
<> 144:ef7eb2e8f9f7 198 (+) For the asynchronous mode only these parameters can be configured:
<> 144:ef7eb2e8f9f7 199 (++) Baud Rate
<> 144:ef7eb2e8f9f7 200 (++) Word Length
<> 144:ef7eb2e8f9f7 201 (++) Stop Bit
<> 144:ef7eb2e8f9f7 202 (++) Parity: If the parity is enabled, then the MSB bit of the data written
<> 144:ef7eb2e8f9f7 203 in the data register is transmitted but is changed by the parity bit.
<> 144:ef7eb2e8f9f7 204 Depending on the frame length defined by the M bit (8-bits or 9-bits),
<> 144:ef7eb2e8f9f7 205 please refer to Reference manual for possible USART frame formats.
<> 144:ef7eb2e8f9f7 206 (++) USART polarity
<> 144:ef7eb2e8f9f7 207 (++) USART phase
<> 144:ef7eb2e8f9f7 208 (++) USART LastBit
<> 144:ef7eb2e8f9f7 209 (++) Receiver/transmitter modes
<> 144:ef7eb2e8f9f7 210
<> 144:ef7eb2e8f9f7 211 [..]
<> 144:ef7eb2e8f9f7 212 The HAL_USART_Init() function follows the USART synchronous configuration
<> 144:ef7eb2e8f9f7 213 procedure (details for the procedure are available in reference manual (RM0329)).
<> 144:ef7eb2e8f9f7 214
<> 144:ef7eb2e8f9f7 215 @endverbatim
<> 144:ef7eb2e8f9f7 216 * @{
<> 144:ef7eb2e8f9f7 217 */
<> 144:ef7eb2e8f9f7 218
<> 144:ef7eb2e8f9f7 219 /**
<> 144:ef7eb2e8f9f7 220 * @brief Initializes the USART mode according to the specified
<> 144:ef7eb2e8f9f7 221 * parameters in the USART_InitTypeDef and create the associated handle.
<> 144:ef7eb2e8f9f7 222 * @param husart: pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 223 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 224 * @retval HAL status
<> 144:ef7eb2e8f9f7 225 */
<> 144:ef7eb2e8f9f7 226 HAL_StatusTypeDef HAL_USART_Init(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 227 {
<> 144:ef7eb2e8f9f7 228 /* Check the USART handle allocation */
<> 144:ef7eb2e8f9f7 229 if(husart == NULL)
<> 144:ef7eb2e8f9f7 230 {
<> 144:ef7eb2e8f9f7 231 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 232 }
<> 144:ef7eb2e8f9f7 233
<> 144:ef7eb2e8f9f7 234 /* Check the parameters */
<> 144:ef7eb2e8f9f7 235 assert_param(IS_USART_INSTANCE(husart->Instance));
<> 144:ef7eb2e8f9f7 236
<> 144:ef7eb2e8f9f7 237 if(husart->State == HAL_USART_STATE_RESET)
<> 144:ef7eb2e8f9f7 238 {
<> 144:ef7eb2e8f9f7 239 /* Allocate lock resource and initialize it */
<> 144:ef7eb2e8f9f7 240 husart->Lock = HAL_UNLOCKED;
<> 144:ef7eb2e8f9f7 241 /* Init the low level hardware */
<> 144:ef7eb2e8f9f7 242 HAL_USART_MspInit(husart);
<> 144:ef7eb2e8f9f7 243 }
<> 144:ef7eb2e8f9f7 244
<> 144:ef7eb2e8f9f7 245 husart->State = HAL_USART_STATE_BUSY;
<> 144:ef7eb2e8f9f7 246
<> 144:ef7eb2e8f9f7 247 /* Set the USART Communication parameters */
<> 144:ef7eb2e8f9f7 248 USART_SetConfig(husart);
<> 144:ef7eb2e8f9f7 249
<> 144:ef7eb2e8f9f7 250 /* In USART mode, the following bits must be kept cleared:
<> 144:ef7eb2e8f9f7 251 - LINEN bit in the USART_CR2 register
<> 144:ef7eb2e8f9f7 252 - HDSEL, SCEN and IREN bits in the USART_CR3 register */
<> 144:ef7eb2e8f9f7 253 CLEAR_BIT(husart->Instance->CR2, USART_CR2_LINEN);
<> 144:ef7eb2e8f9f7 254 CLEAR_BIT(husart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN));
<> 144:ef7eb2e8f9f7 255
<> 144:ef7eb2e8f9f7 256 /* Enable the Peripheral */
<> 144:ef7eb2e8f9f7 257 __HAL_USART_ENABLE(husart);
<> 144:ef7eb2e8f9f7 258
<> 144:ef7eb2e8f9f7 259 /* Initialize the USART state */
<> 144:ef7eb2e8f9f7 260 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 261 husart->State= HAL_USART_STATE_READY;
<> 144:ef7eb2e8f9f7 262
<> 144:ef7eb2e8f9f7 263 return HAL_OK;
<> 144:ef7eb2e8f9f7 264 }
<> 144:ef7eb2e8f9f7 265
<> 144:ef7eb2e8f9f7 266 /**
<> 144:ef7eb2e8f9f7 267 * @brief DeInitializes the USART peripheral.
<> 144:ef7eb2e8f9f7 268 * @param husart: pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 269 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 270 * @retval HAL status
<> 144:ef7eb2e8f9f7 271 */
<> 144:ef7eb2e8f9f7 272 HAL_StatusTypeDef HAL_USART_DeInit(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 273 {
<> 144:ef7eb2e8f9f7 274 /* Check the USART handle allocation */
<> 144:ef7eb2e8f9f7 275 if(husart == NULL)
<> 144:ef7eb2e8f9f7 276 {
<> 144:ef7eb2e8f9f7 277 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 278 }
<> 144:ef7eb2e8f9f7 279
<> 144:ef7eb2e8f9f7 280 /* Check the parameters */
<> 144:ef7eb2e8f9f7 281 assert_param(IS_USART_INSTANCE(husart->Instance));
<> 144:ef7eb2e8f9f7 282
<> 144:ef7eb2e8f9f7 283 husart->State = HAL_USART_STATE_BUSY;
<> 144:ef7eb2e8f9f7 284
<> 144:ef7eb2e8f9f7 285 /* Disable the Peripheral */
<> 144:ef7eb2e8f9f7 286 __HAL_USART_DISABLE(husart);
<> 144:ef7eb2e8f9f7 287
<> 144:ef7eb2e8f9f7 288 /* DeInit the low level hardware */
<> 144:ef7eb2e8f9f7 289 HAL_USART_MspDeInit(husart);
<> 144:ef7eb2e8f9f7 290
<> 144:ef7eb2e8f9f7 291 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 292 husart->State = HAL_USART_STATE_RESET;
<> 144:ef7eb2e8f9f7 293
<> 144:ef7eb2e8f9f7 294 /* Release Lock */
<> 144:ef7eb2e8f9f7 295 __HAL_UNLOCK(husart);
<> 144:ef7eb2e8f9f7 296
<> 144:ef7eb2e8f9f7 297 return HAL_OK;
<> 144:ef7eb2e8f9f7 298 }
<> 144:ef7eb2e8f9f7 299
<> 144:ef7eb2e8f9f7 300 /**
<> 144:ef7eb2e8f9f7 301 * @brief USART MSP Init.
<> 144:ef7eb2e8f9f7 302 * @param husart: pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 303 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 304 * @retval None
<> 144:ef7eb2e8f9f7 305 */
<> 144:ef7eb2e8f9f7 306 __weak void HAL_USART_MspInit(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 307 {
<> 144:ef7eb2e8f9f7 308 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 309 UNUSED(husart);
<> 144:ef7eb2e8f9f7 310 /* NOTE: This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 311 the HAL_USART_MspInit could be implemented in the user file
<> 144:ef7eb2e8f9f7 312 */
<> 144:ef7eb2e8f9f7 313 }
<> 144:ef7eb2e8f9f7 314
<> 144:ef7eb2e8f9f7 315 /**
<> 144:ef7eb2e8f9f7 316 * @brief USART MSP DeInit.
<> 144:ef7eb2e8f9f7 317 * @param husart: pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 318 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 319 * @retval None
<> 144:ef7eb2e8f9f7 320 */
<> 144:ef7eb2e8f9f7 321 __weak void HAL_USART_MspDeInit(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 322 {
<> 144:ef7eb2e8f9f7 323 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 324 UNUSED(husart);
<> 144:ef7eb2e8f9f7 325 /* NOTE: This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 326 the HAL_USART_MspDeInit could be implemented in the user file
<> 144:ef7eb2e8f9f7 327 */
<> 144:ef7eb2e8f9f7 328 }
<> 144:ef7eb2e8f9f7 329
<> 144:ef7eb2e8f9f7 330 /**
<> 144:ef7eb2e8f9f7 331 * @}
<> 144:ef7eb2e8f9f7 332 */
<> 144:ef7eb2e8f9f7 333
<> 144:ef7eb2e8f9f7 334 /** @defgroup USART_Exported_Functions_Group2 IO operation functions
<> 144:ef7eb2e8f9f7 335 * @brief USART Transmit and Receive functions
<> 144:ef7eb2e8f9f7 336 *
<> 144:ef7eb2e8f9f7 337 @verbatim
<> 144:ef7eb2e8f9f7 338 ==============================================================================
<> 144:ef7eb2e8f9f7 339 ##### IO operation functions #####
<> 144:ef7eb2e8f9f7 340 ==============================================================================
<> 144:ef7eb2e8f9f7 341 [..]
<> 144:ef7eb2e8f9f7 342 This subsection provides a set of functions allowing to manage the USART synchronous
<> 144:ef7eb2e8f9f7 343 data transfers.
<> 144:ef7eb2e8f9f7 344
<> 144:ef7eb2e8f9f7 345 [..]
<> 144:ef7eb2e8f9f7 346 The USART supports master mode only: it cannot receive or send data related to an input
<> 144:ef7eb2e8f9f7 347 clock (SCLK is always an output).
<> 144:ef7eb2e8f9f7 348
<> 144:ef7eb2e8f9f7 349 (#) There are two modes of transfer:
<> 144:ef7eb2e8f9f7 350 (++) Blocking mode: The communication is performed in polling mode.
<> 144:ef7eb2e8f9f7 351 The HAL status of all data processing is returned by the same function
<> 144:ef7eb2e8f9f7 352 after finishing transfer.
<> 144:ef7eb2e8f9f7 353 (++) No-Blocking mode: The communication is performed using Interrupts
<> 144:ef7eb2e8f9f7 354 or DMA, These API's return the HAL status.
<> 144:ef7eb2e8f9f7 355 The end of the data processing will be indicated through the
<> 144:ef7eb2e8f9f7 356 dedicated USART IRQ when using Interrupt mode or the DMA IRQ when
<> 144:ef7eb2e8f9f7 357 using DMA mode.
<> 144:ef7eb2e8f9f7 358 The HAL_USART_TxCpltCallback(), HAL_USART_RxCpltCallback() and HAL_USART_TxRxCpltCallback()
<> 144:ef7eb2e8f9f7 359 user callbacks
<> 144:ef7eb2e8f9f7 360 will be executed respectively at the end of the transmit or Receive process
<> 144:ef7eb2e8f9f7 361 The HAL_USART_ErrorCallback() user callback will be executed when a communication
<> 144:ef7eb2e8f9f7 362 error is detected
<> 144:ef7eb2e8f9f7 363
<> 144:ef7eb2e8f9f7 364 (#) Blocking mode APIs are :
<> 144:ef7eb2e8f9f7 365 (++) HAL_USART_Transmit() in simplex mode
<> 144:ef7eb2e8f9f7 366 (++) HAL_USART_Receive() in full duplex receive only
<> 144:ef7eb2e8f9f7 367 (++) HAL_USART_TransmitReceive() in full duplex mode
<> 144:ef7eb2e8f9f7 368
<> 144:ef7eb2e8f9f7 369 (#) Non Blocking mode APIs with Interrupt are :
<> 144:ef7eb2e8f9f7 370 (++) HAL_USART_Transmit_IT()in simplex mode
<> 144:ef7eb2e8f9f7 371 (++) HAL_USART_Receive_IT() in full duplex receive only
<> 144:ef7eb2e8f9f7 372 (++) HAL_USART_TransmitReceive_IT() in full duplex mode
<> 144:ef7eb2e8f9f7 373 (++) HAL_USART_IRQHandler()
<> 144:ef7eb2e8f9f7 374
<> 144:ef7eb2e8f9f7 375 (#) Non Blocking mode functions with DMA are :
<> 144:ef7eb2e8f9f7 376 (++) HAL_USART_Transmit_DMA()in simplex mode
<> 144:ef7eb2e8f9f7 377 (++) HAL_USART_Receive_DMA() in full duplex receive only
<> 144:ef7eb2e8f9f7 378 (++) HAL_USART_TransmitReceie_DMA() in full duplex mode
<> 144:ef7eb2e8f9f7 379 (++) HAL_USART_DMAPause()
<> 144:ef7eb2e8f9f7 380 (++) HAL_USART_DMAResume()
<> 144:ef7eb2e8f9f7 381 (++) HAL_USART_DMAStop()
<> 144:ef7eb2e8f9f7 382
<> 144:ef7eb2e8f9f7 383 (#) A set of Transfer Complete Callbacks are provided in non Blocking mode:
<> 144:ef7eb2e8f9f7 384 (++) HAL_USART_TxHalfCpltCallback()
<> 144:ef7eb2e8f9f7 385 (++) HAL_USART_TxCpltCallback()
<> 144:ef7eb2e8f9f7 386 (++) HAL_USART_RxHalfCpltCallback()
<> 144:ef7eb2e8f9f7 387 (++) HAL_USART_RxCpltCallback()
<> 144:ef7eb2e8f9f7 388 (++) HAL_USART_ErrorCallback()
<> 144:ef7eb2e8f9f7 389 (++) HAL_USART_TxRxCpltCallback()
<> 144:ef7eb2e8f9f7 390
<> 144:ef7eb2e8f9f7 391 @endverbatim
<> 144:ef7eb2e8f9f7 392 * @{
<> 144:ef7eb2e8f9f7 393 */
<> 144:ef7eb2e8f9f7 394
<> 144:ef7eb2e8f9f7 395 /**
<> 144:ef7eb2e8f9f7 396 * @brief Simplex Send an amount of data in blocking mode.
<> 144:ef7eb2e8f9f7 397 * @param husart: pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 398 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 399 * @param pTxData: Pointer to data buffer
<> 144:ef7eb2e8f9f7 400 * @param Size: Amount of data to be sent
<> 144:ef7eb2e8f9f7 401 * @param Timeout: Timeout duration
<> 144:ef7eb2e8f9f7 402 * @retval HAL status
<> 144:ef7eb2e8f9f7 403 */
<> 144:ef7eb2e8f9f7 404 HAL_StatusTypeDef HAL_USART_Transmit(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 405 {
<> 144:ef7eb2e8f9f7 406 uint16_t* tmp;
<> 144:ef7eb2e8f9f7 407 uint32_t tickstart = 0U;
<> 144:ef7eb2e8f9f7 408
<> 144:ef7eb2e8f9f7 409 if(husart->State == HAL_USART_STATE_READY)
<> 144:ef7eb2e8f9f7 410 {
<> 144:ef7eb2e8f9f7 411 if((pTxData == NULL) || (Size == 0U))
<> 144:ef7eb2e8f9f7 412 {
<> 144:ef7eb2e8f9f7 413 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 414 }
<> 144:ef7eb2e8f9f7 415
<> 144:ef7eb2e8f9f7 416 /* Process Locked */
<> 144:ef7eb2e8f9f7 417 __HAL_LOCK(husart);
<> 144:ef7eb2e8f9f7 418
<> 144:ef7eb2e8f9f7 419 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 420 husart->State = HAL_USART_STATE_BUSY_TX;
<> 144:ef7eb2e8f9f7 421
<> 144:ef7eb2e8f9f7 422 /* Init tickstart for timeout managment */
<> 144:ef7eb2e8f9f7 423 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 424
<> 144:ef7eb2e8f9f7 425 husart->TxXferSize = Size;
<> 144:ef7eb2e8f9f7 426 husart->TxXferCount = Size;
<> 144:ef7eb2e8f9f7 427 while(husart->TxXferCount > 0U)
<> 144:ef7eb2e8f9f7 428 {
<> 144:ef7eb2e8f9f7 429 husart->TxXferCount--;
<> 144:ef7eb2e8f9f7 430 if(husart->Init.WordLength == USART_WORDLENGTH_9B)
<> 144:ef7eb2e8f9f7 431 {
<> 144:ef7eb2e8f9f7 432 /* Wait for TC flag in order to write data in DR */
<> 144:ef7eb2e8f9f7 433 if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 434 {
<> 144:ef7eb2e8f9f7 435 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 436 }
<> 144:ef7eb2e8f9f7 437 tmp = (uint16_t*) pTxData;
<> 144:ef7eb2e8f9f7 438 husart->Instance->DR = (*tmp & (uint16_t)0x01FFU);
<> 144:ef7eb2e8f9f7 439 if(husart->Init.Parity == USART_PARITY_NONE)
<> 144:ef7eb2e8f9f7 440 {
<> 144:ef7eb2e8f9f7 441 pTxData += 2U;
<> 144:ef7eb2e8f9f7 442 }
<> 144:ef7eb2e8f9f7 443 else
<> 144:ef7eb2e8f9f7 444 {
<> 144:ef7eb2e8f9f7 445 pTxData += 1U;
<> 144:ef7eb2e8f9f7 446 }
<> 144:ef7eb2e8f9f7 447 }
<> 144:ef7eb2e8f9f7 448 else
<> 144:ef7eb2e8f9f7 449 {
<> 144:ef7eb2e8f9f7 450 if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 451 {
<> 144:ef7eb2e8f9f7 452 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 453 }
<> 144:ef7eb2e8f9f7 454 husart->Instance->DR = (*pTxData++ & (uint8_t)0xFFU);
<> 144:ef7eb2e8f9f7 455 }
<> 144:ef7eb2e8f9f7 456 }
<> 144:ef7eb2e8f9f7 457
<> 144:ef7eb2e8f9f7 458 if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 459 {
<> 144:ef7eb2e8f9f7 460 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 461 }
<> 144:ef7eb2e8f9f7 462
<> 144:ef7eb2e8f9f7 463 husart->State = HAL_USART_STATE_READY;
<> 144:ef7eb2e8f9f7 464
<> 144:ef7eb2e8f9f7 465 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 466 __HAL_UNLOCK(husart);
<> 144:ef7eb2e8f9f7 467
<> 144:ef7eb2e8f9f7 468 return HAL_OK;
<> 144:ef7eb2e8f9f7 469 }
<> 144:ef7eb2e8f9f7 470 else
<> 144:ef7eb2e8f9f7 471 {
<> 144:ef7eb2e8f9f7 472 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 473 }
<> 144:ef7eb2e8f9f7 474 }
<> 144:ef7eb2e8f9f7 475
<> 144:ef7eb2e8f9f7 476 /**
<> 144:ef7eb2e8f9f7 477 * @brief Full-Duplex Receive an amount of data in blocking mode.
<> 144:ef7eb2e8f9f7 478 * @param husart: pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 479 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 480 * @param pRxData: Pointer to data buffer
<> 144:ef7eb2e8f9f7 481 * @param Size: Amount of data to be received
<> 144:ef7eb2e8f9f7 482 * @param Timeout: Timeout duration
<> 144:ef7eb2e8f9f7 483 * @retval HAL status
<> 144:ef7eb2e8f9f7 484 */
<> 144:ef7eb2e8f9f7 485 HAL_StatusTypeDef HAL_USART_Receive(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 486 {
<> 144:ef7eb2e8f9f7 487 uint16_t* tmp;
<> 144:ef7eb2e8f9f7 488 uint32_t tickstart = 0U;
<> 144:ef7eb2e8f9f7 489
<> 144:ef7eb2e8f9f7 490 if(husart->State == HAL_USART_STATE_READY)
<> 144:ef7eb2e8f9f7 491 {
<> 144:ef7eb2e8f9f7 492 if((pRxData == NULL) || (Size == 0U))
<> 144:ef7eb2e8f9f7 493 {
<> 144:ef7eb2e8f9f7 494 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 495 }
<> 144:ef7eb2e8f9f7 496 /* Process Locked */
<> 144:ef7eb2e8f9f7 497 __HAL_LOCK(husart);
<> 144:ef7eb2e8f9f7 498
<> 144:ef7eb2e8f9f7 499 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 500 husart->State = HAL_USART_STATE_BUSY_RX;
<> 144:ef7eb2e8f9f7 501
<> 144:ef7eb2e8f9f7 502 /* Init tickstart for timeout managment */
<> 144:ef7eb2e8f9f7 503 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 504
<> 144:ef7eb2e8f9f7 505 husart->RxXferSize = Size;
<> 144:ef7eb2e8f9f7 506 husart->RxXferCount = Size;
<> 144:ef7eb2e8f9f7 507 /* Check the remain data to be received */
<> 144:ef7eb2e8f9f7 508 while(husart->RxXferCount > 0U)
<> 144:ef7eb2e8f9f7 509 {
<> 144:ef7eb2e8f9f7 510 husart->RxXferCount--;
<> 144:ef7eb2e8f9f7 511 if(husart->Init.WordLength == USART_WORDLENGTH_9B)
<> 144:ef7eb2e8f9f7 512 {
<> 144:ef7eb2e8f9f7 513 /* Wait until TXE flag is set to send dummy byte in order to generate the clock for the slave to send data */
<> 144:ef7eb2e8f9f7 514 if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 515 {
<> 144:ef7eb2e8f9f7 516 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 517 }
<> 144:ef7eb2e8f9f7 518 /* Send dummy byte in order to generate clock */
<> 144:ef7eb2e8f9f7 519 husart->Instance->DR = (DUMMY_DATA & (uint16_t)0x01FFU);
<> 144:ef7eb2e8f9f7 520
<> 144:ef7eb2e8f9f7 521 /* Wait for RXNE Flag */
<> 144:ef7eb2e8f9f7 522 if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 523 {
<> 144:ef7eb2e8f9f7 524 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 525 }
<> 144:ef7eb2e8f9f7 526 tmp = (uint16_t*) pRxData ;
<> 144:ef7eb2e8f9f7 527 if(husart->Init.Parity == USART_PARITY_NONE)
<> 144:ef7eb2e8f9f7 528 {
<> 144:ef7eb2e8f9f7 529 *tmp = (uint16_t)(husart->Instance->DR & (uint16_t)0x01FFU);
<> 144:ef7eb2e8f9f7 530 pRxData +=2;
<> 144:ef7eb2e8f9f7 531 }
<> 144:ef7eb2e8f9f7 532 else
<> 144:ef7eb2e8f9f7 533 {
<> 144:ef7eb2e8f9f7 534 *tmp = (uint16_t)(husart->Instance->DR & (uint16_t)0x00FFU);
<> 144:ef7eb2e8f9f7 535 pRxData +=1;
<> 144:ef7eb2e8f9f7 536 }
<> 144:ef7eb2e8f9f7 537 }
<> 144:ef7eb2e8f9f7 538 else
<> 144:ef7eb2e8f9f7 539 {
<> 144:ef7eb2e8f9f7 540 /* Wait until TXE flag is set to send dummy byte in order to generate the clock for the slave to send data */
<> 144:ef7eb2e8f9f7 541 if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 542 {
<> 144:ef7eb2e8f9f7 543 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 544 }
<> 144:ef7eb2e8f9f7 545
<> 144:ef7eb2e8f9f7 546 /* Send Dummy Byte in order to generate clock */
<> 144:ef7eb2e8f9f7 547 husart->Instance->DR = (DUMMY_DATA & (uint16_t)0x00FFU);
<> 144:ef7eb2e8f9f7 548
<> 144:ef7eb2e8f9f7 549 /* Wait until RXNE flag is set to receive the byte */
<> 144:ef7eb2e8f9f7 550 if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 551 {
<> 144:ef7eb2e8f9f7 552 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 553 }
<> 144:ef7eb2e8f9f7 554 if(husart->Init.Parity == USART_PARITY_NONE)
<> 144:ef7eb2e8f9f7 555 {
<> 144:ef7eb2e8f9f7 556 /* Receive data */
<> 144:ef7eb2e8f9f7 557 *pRxData++ = (uint8_t)(husart->Instance->DR & (uint8_t)0x00FFU);
<> 144:ef7eb2e8f9f7 558 }
<> 144:ef7eb2e8f9f7 559 else
<> 144:ef7eb2e8f9f7 560 {
<> 144:ef7eb2e8f9f7 561 /* Receive data */
<> 144:ef7eb2e8f9f7 562 *pRxData++ = (uint8_t)(husart->Instance->DR & (uint8_t)0x007FU);
<> 144:ef7eb2e8f9f7 563 }
<> 144:ef7eb2e8f9f7 564
<> 144:ef7eb2e8f9f7 565 }
<> 144:ef7eb2e8f9f7 566 }
<> 144:ef7eb2e8f9f7 567
<> 144:ef7eb2e8f9f7 568 husart->State = HAL_USART_STATE_READY;
<> 144:ef7eb2e8f9f7 569
<> 144:ef7eb2e8f9f7 570 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 571 __HAL_UNLOCK(husart);
<> 144:ef7eb2e8f9f7 572
<> 144:ef7eb2e8f9f7 573 return HAL_OK;
<> 144:ef7eb2e8f9f7 574 }
<> 144:ef7eb2e8f9f7 575 else
<> 144:ef7eb2e8f9f7 576 {
<> 144:ef7eb2e8f9f7 577 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 578 }
<> 144:ef7eb2e8f9f7 579 }
<> 144:ef7eb2e8f9f7 580
<> 144:ef7eb2e8f9f7 581 /**
<> 144:ef7eb2e8f9f7 582 * @brief Full-Duplex Send receive an amount of data in full-duplex mode (blocking mode).
<> 144:ef7eb2e8f9f7 583 * @param husart: pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 584 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 585 * @param pTxData: Pointer to data transmitted buffer
<> 144:ef7eb2e8f9f7 586 * @param pRxData: Pointer to data received buffer
<> 144:ef7eb2e8f9f7 587 * @param Size: Amount of data to be sent
<> 144:ef7eb2e8f9f7 588 * @param Timeout: Timeout duration
<> 144:ef7eb2e8f9f7 589 * @retval HAL status
<> 144:ef7eb2e8f9f7 590 */
<> 144:ef7eb2e8f9f7 591 HAL_StatusTypeDef HAL_USART_TransmitReceive(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 592 {
<> 144:ef7eb2e8f9f7 593 uint16_t* tmp;
<> 144:ef7eb2e8f9f7 594 uint32_t tickstart = 0U;
<> 144:ef7eb2e8f9f7 595
<> 144:ef7eb2e8f9f7 596 if(husart->State == HAL_USART_STATE_READY)
<> 144:ef7eb2e8f9f7 597 {
<> 144:ef7eb2e8f9f7 598 if((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
<> 144:ef7eb2e8f9f7 599 {
<> 144:ef7eb2e8f9f7 600 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 601 }
<> 144:ef7eb2e8f9f7 602 /* Process Locked */
<> 144:ef7eb2e8f9f7 603 __HAL_LOCK(husart);
<> 144:ef7eb2e8f9f7 604
<> 144:ef7eb2e8f9f7 605 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 606 husart->State = HAL_USART_STATE_BUSY_RX;
<> 144:ef7eb2e8f9f7 607
<> 144:ef7eb2e8f9f7 608 /* Init tickstart for timeout managment */
<> 144:ef7eb2e8f9f7 609 tickstart = HAL_GetTick();
<> 144:ef7eb2e8f9f7 610
<> 144:ef7eb2e8f9f7 611 husart->RxXferSize = Size;
<> 144:ef7eb2e8f9f7 612 husart->TxXferSize = Size;
<> 144:ef7eb2e8f9f7 613 husart->TxXferCount = Size;
<> 144:ef7eb2e8f9f7 614 husart->RxXferCount = Size;
<> 144:ef7eb2e8f9f7 615
<> 144:ef7eb2e8f9f7 616 /* Check the remain data to be received */
<> 144:ef7eb2e8f9f7 617 while(husart->TxXferCount > 0U)
<> 144:ef7eb2e8f9f7 618 {
<> 144:ef7eb2e8f9f7 619 husart->TxXferCount--;
<> 144:ef7eb2e8f9f7 620 husart->RxXferCount--;
<> 144:ef7eb2e8f9f7 621 if(husart->Init.WordLength == USART_WORDLENGTH_9B)
<> 144:ef7eb2e8f9f7 622 {
<> 144:ef7eb2e8f9f7 623 /* Wait for TC flag in order to write data in DR */
<> 144:ef7eb2e8f9f7 624 if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 625 {
<> 144:ef7eb2e8f9f7 626 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 627 }
<> 144:ef7eb2e8f9f7 628 tmp = (uint16_t*) pTxData;
<> 144:ef7eb2e8f9f7 629 husart->Instance->DR = (*tmp & (uint16_t)0x01FFU);
<> 144:ef7eb2e8f9f7 630 if(husart->Init.Parity == USART_PARITY_NONE)
<> 144:ef7eb2e8f9f7 631 {
<> 144:ef7eb2e8f9f7 632 pTxData += 2U;
<> 144:ef7eb2e8f9f7 633 }
<> 144:ef7eb2e8f9f7 634 else
<> 144:ef7eb2e8f9f7 635 {
<> 144:ef7eb2e8f9f7 636 pTxData += 1U;
<> 144:ef7eb2e8f9f7 637 }
<> 144:ef7eb2e8f9f7 638
<> 144:ef7eb2e8f9f7 639 /* Wait for RXNE Flag */
<> 144:ef7eb2e8f9f7 640 if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 641 {
<> 144:ef7eb2e8f9f7 642 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 643 }
<> 144:ef7eb2e8f9f7 644 tmp = (uint16_t*) pRxData ;
<> 144:ef7eb2e8f9f7 645 if(husart->Init.Parity == USART_PARITY_NONE)
<> 144:ef7eb2e8f9f7 646 {
<> 144:ef7eb2e8f9f7 647 *tmp = (uint16_t)(husart->Instance->DR & (uint16_t)0x01FFU);
<> 144:ef7eb2e8f9f7 648 pRxData += 2U;
<> 144:ef7eb2e8f9f7 649 }
<> 144:ef7eb2e8f9f7 650 else
<> 144:ef7eb2e8f9f7 651 {
<> 144:ef7eb2e8f9f7 652 *tmp = (uint16_t)(husart->Instance->DR & (uint16_t)0x00FFU);
<> 144:ef7eb2e8f9f7 653 pRxData += 1U;
<> 144:ef7eb2e8f9f7 654 }
<> 144:ef7eb2e8f9f7 655 }
<> 144:ef7eb2e8f9f7 656 else
<> 144:ef7eb2e8f9f7 657 {
<> 144:ef7eb2e8f9f7 658 /* Wait for TC flag in order to write data in DR */
<> 144:ef7eb2e8f9f7 659 if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 660 {
<> 144:ef7eb2e8f9f7 661 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 662 }
<> 144:ef7eb2e8f9f7 663 husart->Instance->DR = (*pTxData++ & (uint8_t)0x00FFU);
<> 144:ef7eb2e8f9f7 664
<> 144:ef7eb2e8f9f7 665 /* Wait for RXNE Flag */
<> 144:ef7eb2e8f9f7 666 if(USART_WaitOnFlagUntilTimeout(husart, USART_FLAG_RXNE, RESET, tickstart, Timeout) != HAL_OK)
<> 144:ef7eb2e8f9f7 667 {
<> 144:ef7eb2e8f9f7 668 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 669 }
<> 144:ef7eb2e8f9f7 670 if(husart->Init.Parity == USART_PARITY_NONE)
<> 144:ef7eb2e8f9f7 671 {
<> 144:ef7eb2e8f9f7 672 /* Receive data */
<> 144:ef7eb2e8f9f7 673 *pRxData++ = (uint8_t)(husart->Instance->DR & (uint8_t)0x00FFU);
<> 144:ef7eb2e8f9f7 674 }
<> 144:ef7eb2e8f9f7 675 else
<> 144:ef7eb2e8f9f7 676 {
<> 144:ef7eb2e8f9f7 677 /* Receive data */
<> 144:ef7eb2e8f9f7 678 *pRxData++ = (uint8_t)(husart->Instance->DR & (uint8_t)0x007FU);
<> 144:ef7eb2e8f9f7 679 }
<> 144:ef7eb2e8f9f7 680 }
<> 144:ef7eb2e8f9f7 681 }
<> 144:ef7eb2e8f9f7 682
<> 144:ef7eb2e8f9f7 683 husart->State = HAL_USART_STATE_READY;
<> 144:ef7eb2e8f9f7 684
<> 144:ef7eb2e8f9f7 685 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 686 __HAL_UNLOCK(husart);
<> 144:ef7eb2e8f9f7 687
<> 144:ef7eb2e8f9f7 688 return HAL_OK;
<> 144:ef7eb2e8f9f7 689 }
<> 144:ef7eb2e8f9f7 690 else
<> 144:ef7eb2e8f9f7 691 {
<> 144:ef7eb2e8f9f7 692 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 693 }
<> 144:ef7eb2e8f9f7 694 }
<> 144:ef7eb2e8f9f7 695
<> 144:ef7eb2e8f9f7 696 /**
<> 144:ef7eb2e8f9f7 697 * @brief Simplex Send an amount of data in non-blocking mode.
<> 144:ef7eb2e8f9f7 698 * @param husart: pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 699 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 700 * @param pTxData: Pointer to data buffer
<> 144:ef7eb2e8f9f7 701 * @param Size: Amount of data to be sent
<> 144:ef7eb2e8f9f7 702 * @retval HAL status
<> 144:ef7eb2e8f9f7 703 * @note The USART errors are not managed to avoid the overrun error.
<> 144:ef7eb2e8f9f7 704 */
<> 144:ef7eb2e8f9f7 705 HAL_StatusTypeDef HAL_USART_Transmit_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size)
<> 144:ef7eb2e8f9f7 706 {
<> 144:ef7eb2e8f9f7 707 if(husart->State == HAL_USART_STATE_READY)
<> 144:ef7eb2e8f9f7 708 {
<> 144:ef7eb2e8f9f7 709 if((pTxData == NULL) || (Size == 0U))
<> 144:ef7eb2e8f9f7 710 {
<> 144:ef7eb2e8f9f7 711 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 712 }
<> 144:ef7eb2e8f9f7 713
<> 144:ef7eb2e8f9f7 714 /* Process Locked */
<> 144:ef7eb2e8f9f7 715 __HAL_LOCK(husart);
<> 144:ef7eb2e8f9f7 716
<> 144:ef7eb2e8f9f7 717 husart->pTxBuffPtr = pTxData;
<> 144:ef7eb2e8f9f7 718 husart->TxXferSize = Size;
<> 144:ef7eb2e8f9f7 719 husart->TxXferCount = Size;
<> 144:ef7eb2e8f9f7 720
<> 144:ef7eb2e8f9f7 721 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 722 husart->State = HAL_USART_STATE_BUSY_TX;
<> 144:ef7eb2e8f9f7 723
<> 144:ef7eb2e8f9f7 724 /* The USART Error Interrupts: (Frame error, Noise error, Overrun error)
<> 144:ef7eb2e8f9f7 725 are not managed by the USART transmit process to avoid the overrun interrupt
<> 144:ef7eb2e8f9f7 726 when the USART mode is configured for transmit and receive "USART_MODE_TX_RX"
<> 144:ef7eb2e8f9f7 727 to benefit for the frame error and noise interrupts the USART mode should be
<> 144:ef7eb2e8f9f7 728 configured only for transmit "USART_MODE_TX"
<> 144:ef7eb2e8f9f7 729 The __HAL_USART_ENABLE_IT(husart, USART_IT_ERR) can be used to enable the Frame error,
<> 144:ef7eb2e8f9f7 730 Noise error interrupt */
<> 144:ef7eb2e8f9f7 731
<> 144:ef7eb2e8f9f7 732 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 733 __HAL_UNLOCK(husart);
<> 144:ef7eb2e8f9f7 734
<> 144:ef7eb2e8f9f7 735 /* Enable the USART Transmit Data Register Empty Interrupt */
<> 144:ef7eb2e8f9f7 736 SET_BIT(husart->Instance->CR1, USART_CR1_TXEIE);
<> 144:ef7eb2e8f9f7 737
<> 144:ef7eb2e8f9f7 738 return HAL_OK;
<> 144:ef7eb2e8f9f7 739 }
<> 144:ef7eb2e8f9f7 740 else
<> 144:ef7eb2e8f9f7 741 {
<> 144:ef7eb2e8f9f7 742 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 743 }
<> 144:ef7eb2e8f9f7 744 }
<> 144:ef7eb2e8f9f7 745
<> 144:ef7eb2e8f9f7 746 /**
<> 144:ef7eb2e8f9f7 747 * @brief Simplex Receive an amount of data in non-blocking mode.
<> 144:ef7eb2e8f9f7 748 * @param husart: pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 749 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 750 * @param pRxData: Pointer to data buffer
<> 144:ef7eb2e8f9f7 751 * @param Size: Amount of data to be received
<> 144:ef7eb2e8f9f7 752 * @retval HAL status
<> 144:ef7eb2e8f9f7 753 */
<> 144:ef7eb2e8f9f7 754 HAL_StatusTypeDef HAL_USART_Receive_IT(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size)
<> 144:ef7eb2e8f9f7 755 {
<> 144:ef7eb2e8f9f7 756 if(husart->State == HAL_USART_STATE_READY)
<> 144:ef7eb2e8f9f7 757 {
<> 144:ef7eb2e8f9f7 758 if((pRxData == NULL) || (Size == 0U))
<> 144:ef7eb2e8f9f7 759 {
<> 144:ef7eb2e8f9f7 760 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 761 }
<> 144:ef7eb2e8f9f7 762 /* Process Locked */
<> 144:ef7eb2e8f9f7 763 __HAL_LOCK(husart);
<> 144:ef7eb2e8f9f7 764
<> 144:ef7eb2e8f9f7 765 husart->pRxBuffPtr = pRxData;
<> 144:ef7eb2e8f9f7 766 husart->RxXferSize = Size;
<> 144:ef7eb2e8f9f7 767 husart->RxXferCount = Size;
<> 144:ef7eb2e8f9f7 768
<> 144:ef7eb2e8f9f7 769 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 770 husart->State = HAL_USART_STATE_BUSY_RX;
<> 144:ef7eb2e8f9f7 771
<> 144:ef7eb2e8f9f7 772 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 773 __HAL_UNLOCK(husart);
<> 144:ef7eb2e8f9f7 774
<> 144:ef7eb2e8f9f7 775 /* Enable the USART Parity Error and Data Register not empty Interrupts */
<> 144:ef7eb2e8f9f7 776 SET_BIT(husart->Instance->CR1, USART_CR1_PEIE | USART_CR1_RXNEIE);
<> 144:ef7eb2e8f9f7 777
<> 144:ef7eb2e8f9f7 778 /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
<> 144:ef7eb2e8f9f7 779 SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
<> 144:ef7eb2e8f9f7 780
<> 144:ef7eb2e8f9f7 781 /* Send dummy byte in order to generate the clock for the slave to send data */
<> 144:ef7eb2e8f9f7 782 husart->Instance->DR = (DUMMY_DATA & (uint16_t)0x01FFU);
<> 144:ef7eb2e8f9f7 783
<> 144:ef7eb2e8f9f7 784 return HAL_OK;
<> 144:ef7eb2e8f9f7 785 }
<> 144:ef7eb2e8f9f7 786 else
<> 144:ef7eb2e8f9f7 787 {
<> 144:ef7eb2e8f9f7 788 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 789 }
<> 144:ef7eb2e8f9f7 790 }
<> 144:ef7eb2e8f9f7 791
<> 144:ef7eb2e8f9f7 792 /**
<> 144:ef7eb2e8f9f7 793 * @brief Full-Duplex Send receive an amount of data in full-duplex mode (non-blocking).
<> 144:ef7eb2e8f9f7 794 * @param husart: pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 795 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 796 * @param pTxData: Pointer to data transmitted buffer
<> 144:ef7eb2e8f9f7 797 * @param pRxData: Pointer to data received buffer
<> 144:ef7eb2e8f9f7 798 * @param Size: Amount of data to be received
<> 144:ef7eb2e8f9f7 799 * @retval HAL status
<> 144:ef7eb2e8f9f7 800 */
<> 144:ef7eb2e8f9f7 801 HAL_StatusTypeDef HAL_USART_TransmitReceive_IT(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
<> 144:ef7eb2e8f9f7 802 {
<> 144:ef7eb2e8f9f7 803 if(husart->State == HAL_USART_STATE_READY)
<> 144:ef7eb2e8f9f7 804 {
<> 144:ef7eb2e8f9f7 805 if((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
<> 144:ef7eb2e8f9f7 806 {
<> 144:ef7eb2e8f9f7 807 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 808 }
<> 144:ef7eb2e8f9f7 809 /* Process Locked */
<> 144:ef7eb2e8f9f7 810 __HAL_LOCK(husart);
<> 144:ef7eb2e8f9f7 811
<> 144:ef7eb2e8f9f7 812 husart->pRxBuffPtr = pRxData;
<> 144:ef7eb2e8f9f7 813 husart->RxXferSize = Size;
<> 144:ef7eb2e8f9f7 814 husart->RxXferCount = Size;
<> 144:ef7eb2e8f9f7 815 husart->pTxBuffPtr = pTxData;
<> 144:ef7eb2e8f9f7 816 husart->TxXferSize = Size;
<> 144:ef7eb2e8f9f7 817 husart->TxXferCount = Size;
<> 144:ef7eb2e8f9f7 818
<> 144:ef7eb2e8f9f7 819 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 820 husart->State = HAL_USART_STATE_BUSY_TX_RX;
<> 144:ef7eb2e8f9f7 821
<> 144:ef7eb2e8f9f7 822 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 823 __HAL_UNLOCK(husart);
<> 144:ef7eb2e8f9f7 824
<> 144:ef7eb2e8f9f7 825 /* Enable the USART Data Register not empty Interrupt */
<> 144:ef7eb2e8f9f7 826 SET_BIT(husart->Instance->CR1, USART_CR1_RXNEIE);
<> 144:ef7eb2e8f9f7 827
<> 144:ef7eb2e8f9f7 828 /* Enable the USART Parity Error Interrupt */
<> 144:ef7eb2e8f9f7 829 SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
<> 144:ef7eb2e8f9f7 830
<> 144:ef7eb2e8f9f7 831 /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
<> 144:ef7eb2e8f9f7 832 SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
<> 144:ef7eb2e8f9f7 833
<> 144:ef7eb2e8f9f7 834 /* Enable the USART Transmit Data Register Empty Interrupt */
<> 144:ef7eb2e8f9f7 835 SET_BIT(husart->Instance->CR1, USART_CR1_TXEIE);
<> 144:ef7eb2e8f9f7 836
<> 144:ef7eb2e8f9f7 837 return HAL_OK;
<> 144:ef7eb2e8f9f7 838 }
<> 144:ef7eb2e8f9f7 839 else
<> 144:ef7eb2e8f9f7 840 {
<> 144:ef7eb2e8f9f7 841 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 842 }
<> 144:ef7eb2e8f9f7 843 }
<> 144:ef7eb2e8f9f7 844
<> 144:ef7eb2e8f9f7 845 /**
<> 144:ef7eb2e8f9f7 846 * @brief Simplex Send an amount of data in non-blocking mode.
<> 144:ef7eb2e8f9f7 847 * @param husart: pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 848 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 849 * @param pTxData: Pointer to data buffer
<> 144:ef7eb2e8f9f7 850 * @param Size: Amount of data to be sent
<> 144:ef7eb2e8f9f7 851 * @retval HAL status
<> 144:ef7eb2e8f9f7 852 */
<> 144:ef7eb2e8f9f7 853 HAL_StatusTypeDef HAL_USART_Transmit_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint16_t Size)
<> 144:ef7eb2e8f9f7 854 {
<> 144:ef7eb2e8f9f7 855 uint32_t *tmp;
<> 144:ef7eb2e8f9f7 856
<> 144:ef7eb2e8f9f7 857 if(husart->State == HAL_USART_STATE_READY)
<> 144:ef7eb2e8f9f7 858 {
<> 144:ef7eb2e8f9f7 859 if((pTxData == NULL) || (Size == 0U))
<> 144:ef7eb2e8f9f7 860 {
<> 144:ef7eb2e8f9f7 861 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 862 }
<> 144:ef7eb2e8f9f7 863 /* Process Locked */
<> 144:ef7eb2e8f9f7 864 __HAL_LOCK(husart);
<> 144:ef7eb2e8f9f7 865
<> 144:ef7eb2e8f9f7 866 husart->pTxBuffPtr = pTxData;
<> 144:ef7eb2e8f9f7 867 husart->TxXferSize = Size;
<> 144:ef7eb2e8f9f7 868 husart->TxXferCount = Size;
<> 144:ef7eb2e8f9f7 869
<> 144:ef7eb2e8f9f7 870 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 871 husart->State = HAL_USART_STATE_BUSY_TX;
<> 144:ef7eb2e8f9f7 872
<> 144:ef7eb2e8f9f7 873 /* Set the USART DMA transfer complete callback */
<> 144:ef7eb2e8f9f7 874 husart->hdmatx->XferCpltCallback = USART_DMATransmitCplt;
<> 144:ef7eb2e8f9f7 875
<> 144:ef7eb2e8f9f7 876 /* Set the USART DMA Half transfer complete callback */
<> 144:ef7eb2e8f9f7 877 husart->hdmatx->XferHalfCpltCallback = USART_DMATxHalfCplt;
<> 144:ef7eb2e8f9f7 878
<> 144:ef7eb2e8f9f7 879 /* Set the DMA error callback */
<> 144:ef7eb2e8f9f7 880 husart->hdmatx->XferErrorCallback = USART_DMAError;
<> 144:ef7eb2e8f9f7 881
<> 144:ef7eb2e8f9f7 882 /* Set the DMA abort callback */
<> 144:ef7eb2e8f9f7 883 husart->hdmatx->XferAbortCallback = NULL;
<> 144:ef7eb2e8f9f7 884
<> 144:ef7eb2e8f9f7 885 /* Enable the USART transmit DMA Stream */
<> 144:ef7eb2e8f9f7 886 tmp = (uint32_t*)&pTxData;
<> 144:ef7eb2e8f9f7 887 HAL_DMA_Start_IT(husart->hdmatx, *(uint32_t*)tmp, (uint32_t)&husart->Instance->DR, Size);
<> 144:ef7eb2e8f9f7 888
<> 144:ef7eb2e8f9f7 889 /* Clear the TC flag in the SR register by writing 0 to it */
<> 144:ef7eb2e8f9f7 890 __HAL_USART_CLEAR_FLAG(husart, USART_FLAG_TC);
<> 144:ef7eb2e8f9f7 891
<> 144:ef7eb2e8f9f7 892 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 893 __HAL_UNLOCK(husart);
<> 144:ef7eb2e8f9f7 894
<> 144:ef7eb2e8f9f7 895 /* Enable the DMA transfer for transmit request by setting the DMAT bit
<> 144:ef7eb2e8f9f7 896 in the USART CR3 register */
<> 144:ef7eb2e8f9f7 897 SET_BIT(husart->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 898
<> 144:ef7eb2e8f9f7 899 return HAL_OK;
<> 144:ef7eb2e8f9f7 900 }
<> 144:ef7eb2e8f9f7 901 else
<> 144:ef7eb2e8f9f7 902 {
<> 144:ef7eb2e8f9f7 903 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 904 }
<> 144:ef7eb2e8f9f7 905 }
<> 144:ef7eb2e8f9f7 906
<> 144:ef7eb2e8f9f7 907 /**
<> 144:ef7eb2e8f9f7 908 * @brief Full-Duplex Receive an amount of data in non-blocking mode.
<> 144:ef7eb2e8f9f7 909 * @param husart: pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 910 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 911 * @param pRxData: Pointer to data buffer
<> 144:ef7eb2e8f9f7 912 * @param Size: Amount of data to be received
<> 144:ef7eb2e8f9f7 913 * @retval HAL status
<> 144:ef7eb2e8f9f7 914 * @note The USART DMA transmit stream must be configured in order to generate the clock for the slave.
<> 144:ef7eb2e8f9f7 915 * @note When the USART parity is enabled (PCE = 1) the data received contain the parity bit.
<> 144:ef7eb2e8f9f7 916 */
<> 144:ef7eb2e8f9f7 917 HAL_StatusTypeDef HAL_USART_Receive_DMA(USART_HandleTypeDef *husart, uint8_t *pRxData, uint16_t Size)
<> 144:ef7eb2e8f9f7 918 {
<> 144:ef7eb2e8f9f7 919 uint32_t *tmp;
<> 144:ef7eb2e8f9f7 920
<> 144:ef7eb2e8f9f7 921 if(husart->State == HAL_USART_STATE_READY)
<> 144:ef7eb2e8f9f7 922 {
<> 144:ef7eb2e8f9f7 923 if((pRxData == NULL) || (Size == 0U))
<> 144:ef7eb2e8f9f7 924 {
<> 144:ef7eb2e8f9f7 925 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 926 }
<> 144:ef7eb2e8f9f7 927
<> 144:ef7eb2e8f9f7 928 /* Process Locked */
<> 144:ef7eb2e8f9f7 929 __HAL_LOCK(husart);
<> 144:ef7eb2e8f9f7 930
<> 144:ef7eb2e8f9f7 931 husart->pRxBuffPtr = pRxData;
<> 144:ef7eb2e8f9f7 932 husart->RxXferSize = Size;
<> 144:ef7eb2e8f9f7 933 husart->pTxBuffPtr = pRxData;
<> 144:ef7eb2e8f9f7 934 husart->TxXferSize = Size;
<> 144:ef7eb2e8f9f7 935
<> 144:ef7eb2e8f9f7 936 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 937 husart->State = HAL_USART_STATE_BUSY_RX;
<> 144:ef7eb2e8f9f7 938
<> 144:ef7eb2e8f9f7 939 /* Set the USART DMA Rx transfer complete callback */
<> 144:ef7eb2e8f9f7 940 husart->hdmarx->XferCpltCallback = USART_DMAReceiveCplt;
<> 144:ef7eb2e8f9f7 941
<> 144:ef7eb2e8f9f7 942 /* Set the USART DMA Half transfer complete callback */
<> 144:ef7eb2e8f9f7 943 husart->hdmarx->XferHalfCpltCallback = USART_DMARxHalfCplt;
<> 144:ef7eb2e8f9f7 944
<> 144:ef7eb2e8f9f7 945 /* Set the USART DMA Rx transfer error callback */
<> 144:ef7eb2e8f9f7 946 husart->hdmarx->XferErrorCallback = USART_DMAError;
<> 144:ef7eb2e8f9f7 947
<> 144:ef7eb2e8f9f7 948 /* Set the DMA abort callback */
<> 144:ef7eb2e8f9f7 949 husart->hdmarx->XferAbortCallback = NULL;
<> 144:ef7eb2e8f9f7 950
<> 144:ef7eb2e8f9f7 951 /* Set the USART Tx DMA transfer complete callback as NULL because the communication closing
<> 144:ef7eb2e8f9f7 952 is performed in DMA reception complete callback */
<> 144:ef7eb2e8f9f7 953 husart->hdmatx->XferHalfCpltCallback = NULL;
<> 144:ef7eb2e8f9f7 954 husart->hdmatx->XferCpltCallback = NULL;
<> 144:ef7eb2e8f9f7 955
<> 144:ef7eb2e8f9f7 956 /* Set the DMA error callback */
<> 144:ef7eb2e8f9f7 957 husart->hdmatx->XferErrorCallback = USART_DMAError;
<> 144:ef7eb2e8f9f7 958
<> 144:ef7eb2e8f9f7 959 /* Set the DMA AbortCpltCallback */
<> 144:ef7eb2e8f9f7 960 husart->hdmatx->XferAbortCallback = NULL;
<> 144:ef7eb2e8f9f7 961
<> 144:ef7eb2e8f9f7 962 /* Enable the USART receive DMA Stream */
<> 144:ef7eb2e8f9f7 963 tmp = (uint32_t*)&pRxData;
<> 144:ef7eb2e8f9f7 964 HAL_DMA_Start_IT(husart->hdmarx, (uint32_t)&husart->Instance->DR, *(uint32_t*)tmp, Size);
<> 144:ef7eb2e8f9f7 965
<> 144:ef7eb2e8f9f7 966 /* Enable the USART transmit DMA Stream: the transmit stream is used in order
<> 144:ef7eb2e8f9f7 967 to generate in the non-blocking mode the clock to the slave device,
<> 144:ef7eb2e8f9f7 968 this mode isn't a simplex receive mode but a full-duplex receive one */
<> 144:ef7eb2e8f9f7 969 HAL_DMA_Start_IT(husart->hdmatx, *(uint32_t*)tmp, (uint32_t)&husart->Instance->DR, Size);
<> 144:ef7eb2e8f9f7 970
<> 144:ef7eb2e8f9f7 971 /* Clear the Overrun flag just before enabling the DMA Rx request: mandatory for the second transfer
<> 144:ef7eb2e8f9f7 972 when using the USART in circular mode */
<> 144:ef7eb2e8f9f7 973 __HAL_USART_CLEAR_OREFLAG(husart);
<> 144:ef7eb2e8f9f7 974
<> 144:ef7eb2e8f9f7 975 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 976 __HAL_UNLOCK(husart);
<> 144:ef7eb2e8f9f7 977
<> 144:ef7eb2e8f9f7 978 /* Enable the USART Parity Error Interrupt */
<> 144:ef7eb2e8f9f7 979 SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
<> 144:ef7eb2e8f9f7 980
<> 144:ef7eb2e8f9f7 981 /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
<> 144:ef7eb2e8f9f7 982 SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
<> 144:ef7eb2e8f9f7 983
<> 144:ef7eb2e8f9f7 984 /* Enable the DMA transfer for the receiver request by setting the DMAR bit
<> 144:ef7eb2e8f9f7 985 in the USART CR3 register */
<> 144:ef7eb2e8f9f7 986 SET_BIT(husart->Instance->CR3, USART_CR3_DMAR);
<> 144:ef7eb2e8f9f7 987
<> 144:ef7eb2e8f9f7 988 /* Enable the DMA transfer for transmit request by setting the DMAT bit
<> 144:ef7eb2e8f9f7 989 in the USART CR3 register */
<> 144:ef7eb2e8f9f7 990 SET_BIT(husart->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 991
<> 144:ef7eb2e8f9f7 992 return HAL_OK;
<> 144:ef7eb2e8f9f7 993 }
<> 144:ef7eb2e8f9f7 994 else
<> 144:ef7eb2e8f9f7 995 {
<> 144:ef7eb2e8f9f7 996 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 997 }
<> 144:ef7eb2e8f9f7 998 }
<> 144:ef7eb2e8f9f7 999
<> 144:ef7eb2e8f9f7 1000 /**
<> 144:ef7eb2e8f9f7 1001 * @brief Full-Duplex Transmit Receive an amount of data in non-blocking mode.
<> 144:ef7eb2e8f9f7 1002 * @param husart: pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1003 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 1004 * @param pTxData: Pointer to data transmitted buffer
<> 144:ef7eb2e8f9f7 1005 * @param pRxData: Pointer to data received buffer
<> 144:ef7eb2e8f9f7 1006 * @param Size: Amount of data to be received
<> 144:ef7eb2e8f9f7 1007 * @note When the USART parity is enabled (PCE = 1) the data received contain the parity bit.
<> 144:ef7eb2e8f9f7 1008 * @retval HAL status
<> 144:ef7eb2e8f9f7 1009 */
<> 144:ef7eb2e8f9f7 1010 HAL_StatusTypeDef HAL_USART_TransmitReceive_DMA(USART_HandleTypeDef *husart, uint8_t *pTxData, uint8_t *pRxData, uint16_t Size)
<> 144:ef7eb2e8f9f7 1011 {
<> 144:ef7eb2e8f9f7 1012 uint32_t *tmp;
<> 144:ef7eb2e8f9f7 1013
<> 144:ef7eb2e8f9f7 1014 if(husart->State == HAL_USART_STATE_READY)
<> 144:ef7eb2e8f9f7 1015 {
<> 144:ef7eb2e8f9f7 1016 if((pTxData == NULL) || (pRxData == NULL) || (Size == 0U))
<> 144:ef7eb2e8f9f7 1017 {
<> 144:ef7eb2e8f9f7 1018 return HAL_ERROR;
<> 144:ef7eb2e8f9f7 1019 }
<> 144:ef7eb2e8f9f7 1020 /* Process Locked */
<> 144:ef7eb2e8f9f7 1021 __HAL_LOCK(husart);
<> 144:ef7eb2e8f9f7 1022
<> 144:ef7eb2e8f9f7 1023 husart->pRxBuffPtr = pRxData;
<> 144:ef7eb2e8f9f7 1024 husart->RxXferSize = Size;
<> 144:ef7eb2e8f9f7 1025 husart->pTxBuffPtr = pTxData;
<> 144:ef7eb2e8f9f7 1026 husart->TxXferSize = Size;
<> 144:ef7eb2e8f9f7 1027
<> 144:ef7eb2e8f9f7 1028 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 1029 husart->State = HAL_USART_STATE_BUSY_TX_RX;
<> 144:ef7eb2e8f9f7 1030
<> 144:ef7eb2e8f9f7 1031 /* Set the USART DMA Rx transfer complete callback */
<> 144:ef7eb2e8f9f7 1032 husart->hdmarx->XferCpltCallback = USART_DMAReceiveCplt;
<> 144:ef7eb2e8f9f7 1033
<> 144:ef7eb2e8f9f7 1034 /* Set the USART DMA Half transfer complete callback */
<> 144:ef7eb2e8f9f7 1035 husart->hdmarx->XferHalfCpltCallback = USART_DMARxHalfCplt;
<> 144:ef7eb2e8f9f7 1036
<> 144:ef7eb2e8f9f7 1037 /* Set the USART DMA Tx transfer complete callback */
<> 144:ef7eb2e8f9f7 1038 husart->hdmatx->XferCpltCallback = USART_DMATransmitCplt;
<> 144:ef7eb2e8f9f7 1039
<> 144:ef7eb2e8f9f7 1040 /* Set the USART DMA Half transfer complete callback */
<> 144:ef7eb2e8f9f7 1041 husart->hdmatx->XferHalfCpltCallback = USART_DMATxHalfCplt;
<> 144:ef7eb2e8f9f7 1042
<> 144:ef7eb2e8f9f7 1043 /* Set the USART DMA Tx transfer error callback */
<> 144:ef7eb2e8f9f7 1044 husart->hdmatx->XferErrorCallback = USART_DMAError;
<> 144:ef7eb2e8f9f7 1045
<> 144:ef7eb2e8f9f7 1046 /* Set the USART DMA Rx transfer error callback */
<> 144:ef7eb2e8f9f7 1047 husart->hdmarx->XferErrorCallback = USART_DMAError;
<> 144:ef7eb2e8f9f7 1048
<> 144:ef7eb2e8f9f7 1049 /* Set the DMA abort callback */
<> 144:ef7eb2e8f9f7 1050 husart->hdmarx->XferAbortCallback = NULL;
<> 144:ef7eb2e8f9f7 1051
<> 144:ef7eb2e8f9f7 1052 /* Enable the USART receive DMA Stream */
<> 144:ef7eb2e8f9f7 1053 tmp = (uint32_t*)&pRxData;
<> 144:ef7eb2e8f9f7 1054 HAL_DMA_Start_IT(husart->hdmarx, (uint32_t)&husart->Instance->DR, *(uint32_t*)tmp, Size);
<> 144:ef7eb2e8f9f7 1055
<> 144:ef7eb2e8f9f7 1056 /* Enable the USART transmit DMA Stream */
<> 144:ef7eb2e8f9f7 1057 tmp = (uint32_t*)&pTxData;
<> 144:ef7eb2e8f9f7 1058 HAL_DMA_Start_IT(husart->hdmatx, *(uint32_t*)tmp, (uint32_t)&husart->Instance->DR, Size);
<> 144:ef7eb2e8f9f7 1059
<> 144:ef7eb2e8f9f7 1060 /* Clear the TC flag in the SR register by writing 0 to it */
<> 144:ef7eb2e8f9f7 1061 __HAL_USART_CLEAR_FLAG(husart, USART_FLAG_TC);
<> 144:ef7eb2e8f9f7 1062
<> 144:ef7eb2e8f9f7 1063 /* Clear the Overrun flag: mandatory for the second transfer in circular mode */
<> 144:ef7eb2e8f9f7 1064 __HAL_USART_CLEAR_OREFLAG(husart);
<> 144:ef7eb2e8f9f7 1065
<> 144:ef7eb2e8f9f7 1066 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1067 __HAL_UNLOCK(husart);
<> 144:ef7eb2e8f9f7 1068
<> 144:ef7eb2e8f9f7 1069 /* Enable the USART Parity Error Interrupt */
<> 144:ef7eb2e8f9f7 1070 SET_BIT(husart->Instance->CR1, USART_CR1_PEIE);
<> 144:ef7eb2e8f9f7 1071
<> 144:ef7eb2e8f9f7 1072 /* Enable the USART Error Interrupt: (Frame error, noise error, overrun error) */
<> 144:ef7eb2e8f9f7 1073 SET_BIT(husart->Instance->CR3, USART_CR3_EIE);
<> 144:ef7eb2e8f9f7 1074
<> 144:ef7eb2e8f9f7 1075 /* Enable the DMA transfer for the receiver request by setting the DMAR bit
<> 144:ef7eb2e8f9f7 1076 in the USART CR3 register */
<> 144:ef7eb2e8f9f7 1077 SET_BIT(husart->Instance->CR3, USART_CR3_DMAR);
<> 144:ef7eb2e8f9f7 1078
<> 144:ef7eb2e8f9f7 1079 /* Enable the DMA transfer for transmit request by setting the DMAT bit
<> 144:ef7eb2e8f9f7 1080 in the USART CR3 register */
<> 144:ef7eb2e8f9f7 1081 SET_BIT(husart->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 1082
<> 144:ef7eb2e8f9f7 1083 return HAL_OK;
<> 144:ef7eb2e8f9f7 1084 }
<> 144:ef7eb2e8f9f7 1085 else
<> 144:ef7eb2e8f9f7 1086 {
<> 144:ef7eb2e8f9f7 1087 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 1088 }
<> 144:ef7eb2e8f9f7 1089 }
<> 144:ef7eb2e8f9f7 1090
<> 144:ef7eb2e8f9f7 1091 /**
<> 144:ef7eb2e8f9f7 1092 * @brief Pauses the DMA Transfer.
<> 144:ef7eb2e8f9f7 1093 * @param husart: pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1094 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 1095 * @retval HAL status
<> 144:ef7eb2e8f9f7 1096 */
<> 144:ef7eb2e8f9f7 1097 HAL_StatusTypeDef HAL_USART_DMAPause(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1098 {
<> 144:ef7eb2e8f9f7 1099 /* Process Locked */
<> 144:ef7eb2e8f9f7 1100 __HAL_LOCK(husart);
<> 144:ef7eb2e8f9f7 1101
<> 144:ef7eb2e8f9f7 1102 /* Disable the USART DMA Tx request */
<> 144:ef7eb2e8f9f7 1103 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 1104
<> 144:ef7eb2e8f9f7 1105 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1106 __HAL_UNLOCK(husart);
<> 144:ef7eb2e8f9f7 1107
<> 144:ef7eb2e8f9f7 1108 return HAL_OK;
<> 144:ef7eb2e8f9f7 1109 }
<> 144:ef7eb2e8f9f7 1110
<> 144:ef7eb2e8f9f7 1111 /**
<> 144:ef7eb2e8f9f7 1112 * @brief Resumes the DMA Transfer.
<> 144:ef7eb2e8f9f7 1113 * @param husart: pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1114 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 1115 * @retval HAL status
<> 144:ef7eb2e8f9f7 1116 */
<> 144:ef7eb2e8f9f7 1117 HAL_StatusTypeDef HAL_USART_DMAResume(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1118 {
<> 144:ef7eb2e8f9f7 1119 /* Process Locked */
<> 144:ef7eb2e8f9f7 1120 __HAL_LOCK(husart);
<> 144:ef7eb2e8f9f7 1121
<> 144:ef7eb2e8f9f7 1122 /* Enable the USART DMA Tx request */
<> 144:ef7eb2e8f9f7 1123 SET_BIT(husart->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 1124
<> 144:ef7eb2e8f9f7 1125 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1126 __HAL_UNLOCK(husart);
<> 144:ef7eb2e8f9f7 1127
<> 144:ef7eb2e8f9f7 1128 return HAL_OK;
<> 144:ef7eb2e8f9f7 1129 }
<> 144:ef7eb2e8f9f7 1130
<> 144:ef7eb2e8f9f7 1131 /**
<> 144:ef7eb2e8f9f7 1132 * @brief Stops the DMA Transfer.
<> 144:ef7eb2e8f9f7 1133 * @param husart: pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1134 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 1135 * @retval HAL status
<> 144:ef7eb2e8f9f7 1136 */
<> 144:ef7eb2e8f9f7 1137 HAL_StatusTypeDef HAL_USART_DMAStop(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1138 {
<> 144:ef7eb2e8f9f7 1139 uint32_t dmarequest = 0x00U;
<> 144:ef7eb2e8f9f7 1140 /* The Lock is not implemented on this API to allow the user application
<> 144:ef7eb2e8f9f7 1141 to call the HAL USART API under callbacks HAL_USART_TxCpltCallback() / HAL_USART_RxCpltCallback():
<> 144:ef7eb2e8f9f7 1142 when calling HAL_DMA_Abort() API the DMA TX/RX Transfer complete interrupt is generated
<> 144:ef7eb2e8f9f7 1143 and the correspond call back is executed HAL_USART_TxCpltCallback() / HAL_USART_RxCpltCallback()
<> 144:ef7eb2e8f9f7 1144 */
<> 144:ef7eb2e8f9f7 1145
<> 144:ef7eb2e8f9f7 1146 /* Stop USART DMA Tx request if ongoing */
<> 144:ef7eb2e8f9f7 1147 dmarequest = HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 1148 if((husart->State == HAL_USART_STATE_BUSY_TX) && dmarequest)
<> 144:ef7eb2e8f9f7 1149 {
<> 144:ef7eb2e8f9f7 1150 USART_EndTxTransfer(husart);
<> 144:ef7eb2e8f9f7 1151
<> 144:ef7eb2e8f9f7 1152 /* Abort the USART DMA Tx channel */
<> 144:ef7eb2e8f9f7 1153 if(husart->hdmatx != NULL)
<> 144:ef7eb2e8f9f7 1154 {
<> 144:ef7eb2e8f9f7 1155 HAL_DMA_Abort(husart->hdmatx);
<> 144:ef7eb2e8f9f7 1156 }
<> 144:ef7eb2e8f9f7 1157
<> 144:ef7eb2e8f9f7 1158 /* Disable the USART Tx DMA request */
<> 144:ef7eb2e8f9f7 1159 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 1160 }
<> 144:ef7eb2e8f9f7 1161
<> 144:ef7eb2e8f9f7 1162 /* Stop USART DMA Rx request if ongoing */
<> 144:ef7eb2e8f9f7 1163 dmarequest = HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR);
<> 144:ef7eb2e8f9f7 1164 if((husart->State == HAL_USART_STATE_BUSY_RX) && dmarequest)
<> 144:ef7eb2e8f9f7 1165 {
<> 144:ef7eb2e8f9f7 1166 USART_EndRxTransfer(husart);
<> 144:ef7eb2e8f9f7 1167
<> 144:ef7eb2e8f9f7 1168 /* Abort the USART DMA Rx channel */
<> 144:ef7eb2e8f9f7 1169 if(husart->hdmarx != NULL)
<> 144:ef7eb2e8f9f7 1170 {
<> 144:ef7eb2e8f9f7 1171 HAL_DMA_Abort(husart->hdmarx);
<> 144:ef7eb2e8f9f7 1172 }
<> 144:ef7eb2e8f9f7 1173
<> 144:ef7eb2e8f9f7 1174 /* Disable the USART Rx DMA request */
<> 144:ef7eb2e8f9f7 1175 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
<> 144:ef7eb2e8f9f7 1176 }
<> 144:ef7eb2e8f9f7 1177
<> 144:ef7eb2e8f9f7 1178 return HAL_OK;
<> 144:ef7eb2e8f9f7 1179 }
<> 144:ef7eb2e8f9f7 1180
<> 144:ef7eb2e8f9f7 1181 /**
<> 144:ef7eb2e8f9f7 1182 * @brief This function handles USART interrupt request.
<> 144:ef7eb2e8f9f7 1183 * @param husart: pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1184 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 1185 * @retval None
<> 144:ef7eb2e8f9f7 1186 */
<> 144:ef7eb2e8f9f7 1187 void HAL_USART_IRQHandler(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1188 {
<> 144:ef7eb2e8f9f7 1189 uint32_t isrflags = READ_REG(husart->Instance->SR);
<> 144:ef7eb2e8f9f7 1190 uint32_t cr1its = READ_REG(husart->Instance->CR1);
<> 144:ef7eb2e8f9f7 1191 uint32_t cr3its = READ_REG(husart->Instance->CR3);
<> 144:ef7eb2e8f9f7 1192 uint32_t errorflags = 0x00U;
<> 144:ef7eb2e8f9f7 1193 uint32_t dmarequest = 0x00U;
<> 144:ef7eb2e8f9f7 1194
<> 144:ef7eb2e8f9f7 1195 /* If no error occurs */
<> 144:ef7eb2e8f9f7 1196 errorflags = (isrflags & (uint32_t)(USART_SR_PE | USART_SR_FE | USART_SR_ORE | USART_SR_NE));
<> 144:ef7eb2e8f9f7 1197 if(errorflags == RESET)
<> 144:ef7eb2e8f9f7 1198 {
<> 144:ef7eb2e8f9f7 1199 /* USART in mode Receiver -------------------------------------------------*/
<> 144:ef7eb2e8f9f7 1200 if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
<> 144:ef7eb2e8f9f7 1201 {
<> 144:ef7eb2e8f9f7 1202 if(husart->State == HAL_USART_STATE_BUSY_RX)
<> 144:ef7eb2e8f9f7 1203 {
<> 144:ef7eb2e8f9f7 1204 USART_Receive_IT(husart);
<> 144:ef7eb2e8f9f7 1205 }
<> 144:ef7eb2e8f9f7 1206 else
<> 144:ef7eb2e8f9f7 1207 {
<> 144:ef7eb2e8f9f7 1208 USART_TransmitReceive_IT(husart);
<> 144:ef7eb2e8f9f7 1209 }
<> 144:ef7eb2e8f9f7 1210 return;
<> 144:ef7eb2e8f9f7 1211 }
<> 144:ef7eb2e8f9f7 1212 }
<> 144:ef7eb2e8f9f7 1213 /* If some errors occur */
<> 144:ef7eb2e8f9f7 1214 if((errorflags != RESET) && (((cr3its & USART_CR3_EIE) != RESET) || ((cr1its & (USART_CR1_RXNEIE | USART_CR1_PEIE)) != RESET)))
<> 144:ef7eb2e8f9f7 1215 {
<> 144:ef7eb2e8f9f7 1216 /* USART parity error interrupt occurred ----------------------------------*/
<> 144:ef7eb2e8f9f7 1217 if(((isrflags & USART_SR_PE) != RESET) && ((cr1its & USART_CR1_PEIE) != RESET))
<> 144:ef7eb2e8f9f7 1218 {
<> 144:ef7eb2e8f9f7 1219 husart->ErrorCode |= HAL_USART_ERROR_PE;
<> 144:ef7eb2e8f9f7 1220 }
<> 144:ef7eb2e8f9f7 1221
<> 144:ef7eb2e8f9f7 1222 /* USART noise error interrupt occurred --------------------------------*/
<> 144:ef7eb2e8f9f7 1223 if(((isrflags & USART_SR_NE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
<> 144:ef7eb2e8f9f7 1224 {
<> 144:ef7eb2e8f9f7 1225 husart->ErrorCode |= HAL_USART_ERROR_NE;
<> 144:ef7eb2e8f9f7 1226 }
<> 144:ef7eb2e8f9f7 1227
<> 144:ef7eb2e8f9f7 1228 /* USART frame error interrupt occurred --------------------------------*/
<> 144:ef7eb2e8f9f7 1229 if(((isrflags & USART_SR_FE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
<> 144:ef7eb2e8f9f7 1230 {
<> 144:ef7eb2e8f9f7 1231 husart->ErrorCode |= HAL_USART_ERROR_FE;
<> 144:ef7eb2e8f9f7 1232 }
<> 144:ef7eb2e8f9f7 1233
<> 144:ef7eb2e8f9f7 1234 /* USART Over-Run interrupt occurred -----------------------------------*/
<> 144:ef7eb2e8f9f7 1235 if(((isrflags & USART_SR_ORE) != RESET) && ((cr3its & USART_CR3_EIE) != RESET))
<> 144:ef7eb2e8f9f7 1236 {
<> 144:ef7eb2e8f9f7 1237 husart->ErrorCode |= HAL_USART_ERROR_ORE;
<> 144:ef7eb2e8f9f7 1238 }
<> 144:ef7eb2e8f9f7 1239
<> 144:ef7eb2e8f9f7 1240 if(husart->ErrorCode != HAL_USART_ERROR_NONE)
<> 144:ef7eb2e8f9f7 1241 {
<> 144:ef7eb2e8f9f7 1242 /* USART in mode Receiver -----------------------------------------------*/
<> 144:ef7eb2e8f9f7 1243 if(((isrflags & USART_SR_RXNE) != RESET) && ((cr1its & USART_CR1_RXNEIE) != RESET))
<> 144:ef7eb2e8f9f7 1244 {
<> 144:ef7eb2e8f9f7 1245 if(husart->State == HAL_USART_STATE_BUSY_RX)
<> 144:ef7eb2e8f9f7 1246 {
<> 144:ef7eb2e8f9f7 1247 USART_Receive_IT(husart);
<> 144:ef7eb2e8f9f7 1248 }
<> 144:ef7eb2e8f9f7 1249 else
<> 144:ef7eb2e8f9f7 1250 {
<> 144:ef7eb2e8f9f7 1251 USART_TransmitReceive_IT(husart);
<> 144:ef7eb2e8f9f7 1252 }
<> 144:ef7eb2e8f9f7 1253 }
<> 144:ef7eb2e8f9f7 1254 /* If Overrun error occurs, or if any error occurs in DMA mode reception,
<> 144:ef7eb2e8f9f7 1255 consider error as blocking */
<> 144:ef7eb2e8f9f7 1256 dmarequest = HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR);
<> 144:ef7eb2e8f9f7 1257 if(((husart->ErrorCode & HAL_USART_ERROR_ORE) != RESET) || dmarequest)
<> 144:ef7eb2e8f9f7 1258 {
<> 144:ef7eb2e8f9f7 1259 /* Set the USART state ready to be able to start again the process,
<> 144:ef7eb2e8f9f7 1260 Disable Rx Interrupts, and disable Rx DMA request, if ongoing */
<> 144:ef7eb2e8f9f7 1261 USART_EndRxTransfer(husart);
<> 144:ef7eb2e8f9f7 1262
<> 144:ef7eb2e8f9f7 1263 /* Disable the USART DMA Rx request if enabled */
<> 144:ef7eb2e8f9f7 1264 if (HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR))
<> 144:ef7eb2e8f9f7 1265 {
<> 144:ef7eb2e8f9f7 1266 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
<> 144:ef7eb2e8f9f7 1267
<> 144:ef7eb2e8f9f7 1268 /* Abort the USART DMA Rx channel */
<> 144:ef7eb2e8f9f7 1269 if(husart->hdmarx != NULL)
<> 144:ef7eb2e8f9f7 1270 {
<> 144:ef7eb2e8f9f7 1271 /* Set the USART DMA Abort callback :
<> 144:ef7eb2e8f9f7 1272 will lead to call HAL_USART_ErrorCallback() at end of DMA abort procedure */
<> 144:ef7eb2e8f9f7 1273 husart->hdmarx->XferAbortCallback = USART_DMAAbortOnError;
<> 144:ef7eb2e8f9f7 1274
<> 144:ef7eb2e8f9f7 1275 if(HAL_DMA_Abort_IT(husart->hdmarx) != HAL_OK)
<> 144:ef7eb2e8f9f7 1276 {
<> 144:ef7eb2e8f9f7 1277 /* Call Directly XferAbortCallback function in case of error */
<> 144:ef7eb2e8f9f7 1278 husart->hdmarx->XferAbortCallback(husart->hdmarx);
<> 144:ef7eb2e8f9f7 1279 }
<> 144:ef7eb2e8f9f7 1280 }
<> 144:ef7eb2e8f9f7 1281 else
<> 144:ef7eb2e8f9f7 1282 {
<> 144:ef7eb2e8f9f7 1283 /* Call user error callback */
<> 144:ef7eb2e8f9f7 1284 HAL_USART_ErrorCallback(husart);
<> 144:ef7eb2e8f9f7 1285 }
<> 144:ef7eb2e8f9f7 1286 }
<> 144:ef7eb2e8f9f7 1287 else
<> 144:ef7eb2e8f9f7 1288 {
<> 144:ef7eb2e8f9f7 1289 /* Call user error callback */
<> 144:ef7eb2e8f9f7 1290 HAL_USART_ErrorCallback(husart);
<> 144:ef7eb2e8f9f7 1291 }
<> 144:ef7eb2e8f9f7 1292 }
<> 144:ef7eb2e8f9f7 1293 else
<> 144:ef7eb2e8f9f7 1294 {
<> 144:ef7eb2e8f9f7 1295 /* Call user error callback */
<> 144:ef7eb2e8f9f7 1296 HAL_USART_ErrorCallback(husart);
<> 144:ef7eb2e8f9f7 1297 husart->ErrorCode = HAL_USART_ERROR_NONE;
<> 144:ef7eb2e8f9f7 1298 }
<> 144:ef7eb2e8f9f7 1299 }
<> 144:ef7eb2e8f9f7 1300 return;
<> 144:ef7eb2e8f9f7 1301 }
<> 144:ef7eb2e8f9f7 1302
<> 144:ef7eb2e8f9f7 1303 /* USART in mode Transmitter -----------------------------------------------*/
<> 144:ef7eb2e8f9f7 1304 if(((isrflags & USART_SR_TXE) != RESET) && ((cr1its & USART_CR1_TXEIE) != RESET))
<> 144:ef7eb2e8f9f7 1305 {
<> 144:ef7eb2e8f9f7 1306 if(husart->State == HAL_USART_STATE_BUSY_TX)
<> 144:ef7eb2e8f9f7 1307 {
<> 144:ef7eb2e8f9f7 1308 USART_Transmit_IT(husart);
<> 144:ef7eb2e8f9f7 1309 }
<> 144:ef7eb2e8f9f7 1310 else
<> 144:ef7eb2e8f9f7 1311 {
<> 144:ef7eb2e8f9f7 1312 USART_TransmitReceive_IT(husart);
<> 144:ef7eb2e8f9f7 1313 }
<> 144:ef7eb2e8f9f7 1314 return;
<> 144:ef7eb2e8f9f7 1315 }
<> 144:ef7eb2e8f9f7 1316
<> 144:ef7eb2e8f9f7 1317 /* USART in mode Transmitter (transmission end) ----------------------------*/
<> 144:ef7eb2e8f9f7 1318 if(((isrflags & USART_SR_TC) != RESET) && ((cr1its & USART_CR1_TCIE) != RESET))
<> 144:ef7eb2e8f9f7 1319 {
<> 144:ef7eb2e8f9f7 1320 USART_EndTransmit_IT(husart);
<> 144:ef7eb2e8f9f7 1321 return;
<> 144:ef7eb2e8f9f7 1322 }
<> 144:ef7eb2e8f9f7 1323 }
<> 144:ef7eb2e8f9f7 1324
<> 144:ef7eb2e8f9f7 1325 /**
<> 144:ef7eb2e8f9f7 1326 * @brief Tx Transfer completed callbacks.
<> 144:ef7eb2e8f9f7 1327 * @param husart: pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1328 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 1329 * @retval None
<> 144:ef7eb2e8f9f7 1330 */
<> 144:ef7eb2e8f9f7 1331 __weak void HAL_USART_TxCpltCallback(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1332 {
<> 144:ef7eb2e8f9f7 1333 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1334 UNUSED(husart);
<> 144:ef7eb2e8f9f7 1335 /* NOTE: This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1336 the HAL_USART_TxCpltCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 1337 */
<> 144:ef7eb2e8f9f7 1338 }
<> 144:ef7eb2e8f9f7 1339
<> 144:ef7eb2e8f9f7 1340 /**
<> 144:ef7eb2e8f9f7 1341 * @brief Tx Half Transfer completed callbacks.
<> 144:ef7eb2e8f9f7 1342 * @param husart: pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1343 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 1344 * @retval None
<> 144:ef7eb2e8f9f7 1345 */
<> 144:ef7eb2e8f9f7 1346 __weak void HAL_USART_TxHalfCpltCallback(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1347 {
<> 144:ef7eb2e8f9f7 1348 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1349 UNUSED(husart);
<> 144:ef7eb2e8f9f7 1350 /* NOTE: This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1351 the HAL_USART_TxCpltCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 1352 */
<> 144:ef7eb2e8f9f7 1353 }
<> 144:ef7eb2e8f9f7 1354
<> 144:ef7eb2e8f9f7 1355 /**
<> 144:ef7eb2e8f9f7 1356 * @brief Rx Transfer completed callbacks.
<> 144:ef7eb2e8f9f7 1357 * @param husart: pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1358 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 1359 * @retval None
<> 144:ef7eb2e8f9f7 1360 */
<> 144:ef7eb2e8f9f7 1361 __weak void HAL_USART_RxCpltCallback(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1362 {
<> 144:ef7eb2e8f9f7 1363 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1364 UNUSED(husart);
<> 144:ef7eb2e8f9f7 1365 /* NOTE: This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1366 the HAL_USART_TxCpltCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 1367 */
<> 144:ef7eb2e8f9f7 1368 }
<> 144:ef7eb2e8f9f7 1369
<> 144:ef7eb2e8f9f7 1370 /**
<> 144:ef7eb2e8f9f7 1371 * @brief Rx Half Transfer completed callbacks.
<> 144:ef7eb2e8f9f7 1372 * @param husart: pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1373 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 1374 * @retval None
<> 144:ef7eb2e8f9f7 1375 */
<> 144:ef7eb2e8f9f7 1376 __weak void HAL_USART_RxHalfCpltCallback(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1377 {
<> 144:ef7eb2e8f9f7 1378 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1379 UNUSED(husart);
<> 144:ef7eb2e8f9f7 1380 /* NOTE: This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1381 the HAL_USART_TxCpltCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 1382 */
<> 144:ef7eb2e8f9f7 1383 }
<> 144:ef7eb2e8f9f7 1384
<> 144:ef7eb2e8f9f7 1385 /**
<> 144:ef7eb2e8f9f7 1386 * @brief Tx/Rx Transfers completed callback for the non-blocking process.
<> 144:ef7eb2e8f9f7 1387 * @param husart: pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1388 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 1389 * @retval None
<> 144:ef7eb2e8f9f7 1390 */
<> 144:ef7eb2e8f9f7 1391 __weak void HAL_USART_TxRxCpltCallback(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1392 {
<> 144:ef7eb2e8f9f7 1393 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1394 UNUSED(husart);
<> 144:ef7eb2e8f9f7 1395 /* NOTE: This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1396 the HAL_USART_TxCpltCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 1397 */
<> 144:ef7eb2e8f9f7 1398 }
<> 144:ef7eb2e8f9f7 1399
<> 144:ef7eb2e8f9f7 1400 /**
<> 144:ef7eb2e8f9f7 1401 * @brief USART error callbacks.
<> 144:ef7eb2e8f9f7 1402 * @param husart: pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1403 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 1404 * @retval None
<> 144:ef7eb2e8f9f7 1405 */
<> 144:ef7eb2e8f9f7 1406 __weak void HAL_USART_ErrorCallback(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1407 {
<> 144:ef7eb2e8f9f7 1408 /* Prevent unused argument(s) compilation warning */
<> 144:ef7eb2e8f9f7 1409 UNUSED(husart);
<> 144:ef7eb2e8f9f7 1410 /* NOTE: This function Should not be modified, when the callback is needed,
<> 144:ef7eb2e8f9f7 1411 the HAL_USART_ErrorCallback could be implemented in the user file
<> 144:ef7eb2e8f9f7 1412 */
<> 144:ef7eb2e8f9f7 1413 }
<> 144:ef7eb2e8f9f7 1414
<> 144:ef7eb2e8f9f7 1415 /**
<> 144:ef7eb2e8f9f7 1416 * @}
<> 144:ef7eb2e8f9f7 1417 */
<> 144:ef7eb2e8f9f7 1418
<> 144:ef7eb2e8f9f7 1419 /** @defgroup USART_Exported_Functions_Group3 Peripheral State and Errors functions
<> 144:ef7eb2e8f9f7 1420 * @brief USART State and Errors functions
<> 144:ef7eb2e8f9f7 1421 *
<> 144:ef7eb2e8f9f7 1422 @verbatim
<> 144:ef7eb2e8f9f7 1423 ==============================================================================
<> 144:ef7eb2e8f9f7 1424 ##### Peripheral State and Errors functions #####
<> 144:ef7eb2e8f9f7 1425 ==============================================================================
<> 144:ef7eb2e8f9f7 1426 [..]
<> 144:ef7eb2e8f9f7 1427 This subsection provides a set of functions allowing to return the State of
<> 144:ef7eb2e8f9f7 1428 USART communication
<> 144:ef7eb2e8f9f7 1429 process, return Peripheral Errors occurred during communication process
<> 144:ef7eb2e8f9f7 1430 (+) HAL_USART_GetState() API can be helpful to check in run-time the state
<> 144:ef7eb2e8f9f7 1431 of the USART peripheral.
<> 144:ef7eb2e8f9f7 1432 (+) HAL_USART_GetError() check in run-time errors that could be occurred during
<> 144:ef7eb2e8f9f7 1433 communication.
<> 144:ef7eb2e8f9f7 1434 @endverbatim
<> 144:ef7eb2e8f9f7 1435 * @{
<> 144:ef7eb2e8f9f7 1436 */
<> 144:ef7eb2e8f9f7 1437
<> 144:ef7eb2e8f9f7 1438 /**
<> 144:ef7eb2e8f9f7 1439 * @brief Returns the USART state.
<> 144:ef7eb2e8f9f7 1440 * @param husart: pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1441 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 1442 * @retval HAL state
<> 144:ef7eb2e8f9f7 1443 */
<> 144:ef7eb2e8f9f7 1444 HAL_USART_StateTypeDef HAL_USART_GetState(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1445 {
<> 144:ef7eb2e8f9f7 1446 return husart->State;
<> 144:ef7eb2e8f9f7 1447 }
<> 144:ef7eb2e8f9f7 1448
<> 144:ef7eb2e8f9f7 1449 /**
<> 144:ef7eb2e8f9f7 1450 * @brief Return the USART error code
<> 144:ef7eb2e8f9f7 1451 * @param husart : pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1452 * the configuration information for the specified USART.
<> 144:ef7eb2e8f9f7 1453 * @retval USART Error Code
<> 144:ef7eb2e8f9f7 1454 */
<> 144:ef7eb2e8f9f7 1455 uint32_t HAL_USART_GetError(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1456 {
<> 144:ef7eb2e8f9f7 1457 return husart->ErrorCode;
<> 144:ef7eb2e8f9f7 1458 }
<> 144:ef7eb2e8f9f7 1459
<> 144:ef7eb2e8f9f7 1460 /**
<> 144:ef7eb2e8f9f7 1461 * @}
<> 144:ef7eb2e8f9f7 1462 */
<> 144:ef7eb2e8f9f7 1463
<> 144:ef7eb2e8f9f7 1464 /**
<> 144:ef7eb2e8f9f7 1465 * @brief DMA USART transmit process complete callback.
<> 144:ef7eb2e8f9f7 1466 * @param hdma: DMA handle
<> 144:ef7eb2e8f9f7 1467 * @retval None
<> 144:ef7eb2e8f9f7 1468 */
<> 144:ef7eb2e8f9f7 1469 static void USART_DMATransmitCplt(DMA_HandleTypeDef *hdma)
<> 144:ef7eb2e8f9f7 1470 {
<> 144:ef7eb2e8f9f7 1471 USART_HandleTypeDef* husart = ( USART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
<> 144:ef7eb2e8f9f7 1472 /* DMA Normal mode */
<> 144:ef7eb2e8f9f7 1473 if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0U)
<> 144:ef7eb2e8f9f7 1474 {
<> 144:ef7eb2e8f9f7 1475 husart->TxXferCount = 0U;
<> 144:ef7eb2e8f9f7 1476 if(husart->State == HAL_USART_STATE_BUSY_TX)
<> 144:ef7eb2e8f9f7 1477 {
<> 144:ef7eb2e8f9f7 1478 /* Disable the DMA transfer for transmit request by resetting the DMAT bit
<> 144:ef7eb2e8f9f7 1479 in the USART CR3 register */
<> 144:ef7eb2e8f9f7 1480 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 1481
<> 144:ef7eb2e8f9f7 1482 /* Enable the USART Transmit Complete Interrupt */
<> 144:ef7eb2e8f9f7 1483 SET_BIT(husart->Instance->CR1, USART_CR1_TCIE);
<> 144:ef7eb2e8f9f7 1484 }
<> 144:ef7eb2e8f9f7 1485 }
<> 144:ef7eb2e8f9f7 1486 /* DMA Circular mode */
<> 144:ef7eb2e8f9f7 1487 else
<> 144:ef7eb2e8f9f7 1488 {
<> 144:ef7eb2e8f9f7 1489 if(husart->State == HAL_USART_STATE_BUSY_TX)
<> 144:ef7eb2e8f9f7 1490 {
<> 144:ef7eb2e8f9f7 1491 HAL_USART_TxCpltCallback(husart);
<> 144:ef7eb2e8f9f7 1492 }
<> 144:ef7eb2e8f9f7 1493 }
<> 144:ef7eb2e8f9f7 1494 }
<> 144:ef7eb2e8f9f7 1495
<> 144:ef7eb2e8f9f7 1496 /**
<> 144:ef7eb2e8f9f7 1497 * @brief DMA USART transmit process half complete callback
<> 144:ef7eb2e8f9f7 1498 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1499 * the configuration information for the specified DMA module.
<> 144:ef7eb2e8f9f7 1500 * @retval None
<> 144:ef7eb2e8f9f7 1501 */
<> 144:ef7eb2e8f9f7 1502 static void USART_DMATxHalfCplt(DMA_HandleTypeDef *hdma)
<> 144:ef7eb2e8f9f7 1503 {
<> 144:ef7eb2e8f9f7 1504 USART_HandleTypeDef* husart = (USART_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
<> 144:ef7eb2e8f9f7 1505
<> 144:ef7eb2e8f9f7 1506 HAL_USART_TxHalfCpltCallback(husart);
<> 144:ef7eb2e8f9f7 1507 }
<> 144:ef7eb2e8f9f7 1508
<> 144:ef7eb2e8f9f7 1509 /**
<> 144:ef7eb2e8f9f7 1510 * @brief DMA USART receive process complete callback.
<> 144:ef7eb2e8f9f7 1511 * @param hdma: DMA handle
<> 144:ef7eb2e8f9f7 1512 * @retval None
<> 144:ef7eb2e8f9f7 1513 */
<> 144:ef7eb2e8f9f7 1514 static void USART_DMAReceiveCplt(DMA_HandleTypeDef *hdma)
<> 144:ef7eb2e8f9f7 1515 {
<> 144:ef7eb2e8f9f7 1516 USART_HandleTypeDef* husart = ( USART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
<> 144:ef7eb2e8f9f7 1517 /* DMA Normal mode */
<> 144:ef7eb2e8f9f7 1518 if((hdma->Instance->CR & DMA_SxCR_CIRC) == 0U)
<> 144:ef7eb2e8f9f7 1519 {
<> 144:ef7eb2e8f9f7 1520 husart->RxXferCount = 0x00U;
<> 144:ef7eb2e8f9f7 1521
<> 144:ef7eb2e8f9f7 1522 /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */
<> 144:ef7eb2e8f9f7 1523 CLEAR_BIT(husart->Instance->CR1, USART_CR1_PEIE);
<> 144:ef7eb2e8f9f7 1524 CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
<> 144:ef7eb2e8f9f7 1525
<> 144:ef7eb2e8f9f7 1526 if(husart->State == HAL_USART_STATE_BUSY_RX)
<> 144:ef7eb2e8f9f7 1527 {
<> 144:ef7eb2e8f9f7 1528 /* Disable the DMA transfer for the Transmit/receiver requests by setting the DMAT/DMAR bit
<> 144:ef7eb2e8f9f7 1529 in the USART CR3 register */
<> 144:ef7eb2e8f9f7 1530 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
<> 144:ef7eb2e8f9f7 1531
<> 144:ef7eb2e8f9f7 1532 husart->State= HAL_USART_STATE_READY;
<> 144:ef7eb2e8f9f7 1533 HAL_USART_RxCpltCallback(husart);
<> 144:ef7eb2e8f9f7 1534 }
<> 144:ef7eb2e8f9f7 1535 /* The USART state is HAL_USART_STATE_BUSY_TX_RX */
<> 144:ef7eb2e8f9f7 1536 else
<> 144:ef7eb2e8f9f7 1537 {
<> 144:ef7eb2e8f9f7 1538 /* Disable the DMA transfer for the Transmit/receiver requests by setting the DMAT/DMAR bit
<> 144:ef7eb2e8f9f7 1539 in the USART CR3 register */
<> 144:ef7eb2e8f9f7 1540 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAR);
<> 144:ef7eb2e8f9f7 1541 CLEAR_BIT(husart->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 1542
<> 144:ef7eb2e8f9f7 1543 husart->State= HAL_USART_STATE_READY;
<> 144:ef7eb2e8f9f7 1544 HAL_USART_TxRxCpltCallback(husart);
<> 144:ef7eb2e8f9f7 1545 }
<> 144:ef7eb2e8f9f7 1546 }
<> 144:ef7eb2e8f9f7 1547 /* DMA circular mode */
<> 144:ef7eb2e8f9f7 1548 else
<> 144:ef7eb2e8f9f7 1549 {
<> 144:ef7eb2e8f9f7 1550 if(husart->State == HAL_USART_STATE_BUSY_RX)
<> 144:ef7eb2e8f9f7 1551 {
<> 144:ef7eb2e8f9f7 1552 HAL_USART_RxCpltCallback(husart);
<> 144:ef7eb2e8f9f7 1553 }
<> 144:ef7eb2e8f9f7 1554 /* The USART state is HAL_USART_STATE_BUSY_TX_RX */
<> 144:ef7eb2e8f9f7 1555 else
<> 144:ef7eb2e8f9f7 1556 {
<> 144:ef7eb2e8f9f7 1557 HAL_USART_TxRxCpltCallback(husart);
<> 144:ef7eb2e8f9f7 1558 }
<> 144:ef7eb2e8f9f7 1559 }
<> 144:ef7eb2e8f9f7 1560 }
<> 144:ef7eb2e8f9f7 1561
<> 144:ef7eb2e8f9f7 1562 /**
<> 144:ef7eb2e8f9f7 1563 * @brief DMA USART receive process half complete callback
<> 144:ef7eb2e8f9f7 1564 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1565 * the configuration information for the specified DMA module.
<> 144:ef7eb2e8f9f7 1566 * @retval None
<> 144:ef7eb2e8f9f7 1567 */
<> 144:ef7eb2e8f9f7 1568 static void USART_DMARxHalfCplt(DMA_HandleTypeDef *hdma)
<> 144:ef7eb2e8f9f7 1569 {
<> 144:ef7eb2e8f9f7 1570 USART_HandleTypeDef* husart = (USART_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
<> 144:ef7eb2e8f9f7 1571
<> 144:ef7eb2e8f9f7 1572 HAL_USART_RxHalfCpltCallback(husart);
<> 144:ef7eb2e8f9f7 1573 }
<> 144:ef7eb2e8f9f7 1574
<> 144:ef7eb2e8f9f7 1575 /**
<> 144:ef7eb2e8f9f7 1576 * @brief DMA USART communication error callback.
<> 144:ef7eb2e8f9f7 1577 * @param hdma: DMA handle
<> 144:ef7eb2e8f9f7 1578 * @retval None
<> 144:ef7eb2e8f9f7 1579 */
<> 144:ef7eb2e8f9f7 1580 static void USART_DMAError(DMA_HandleTypeDef *hdma)
<> 144:ef7eb2e8f9f7 1581 {
<> 144:ef7eb2e8f9f7 1582 uint32_t dmarequest = 0x00U;
<> 144:ef7eb2e8f9f7 1583 USART_HandleTypeDef* husart = ( USART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
<> 144:ef7eb2e8f9f7 1584 husart->RxXferCount = 0x00U;
<> 144:ef7eb2e8f9f7 1585 husart->TxXferCount = 0x00U;
<> 144:ef7eb2e8f9f7 1586
<> 144:ef7eb2e8f9f7 1587 /* Stop USART DMA Tx request if ongoing */
<> 144:ef7eb2e8f9f7 1588 dmarequest = HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAT);
<> 144:ef7eb2e8f9f7 1589 if((husart->State == HAL_USART_STATE_BUSY_TX) && dmarequest)
<> 144:ef7eb2e8f9f7 1590 {
<> 144:ef7eb2e8f9f7 1591 USART_EndTxTransfer(husart);
<> 144:ef7eb2e8f9f7 1592 }
<> 144:ef7eb2e8f9f7 1593
<> 144:ef7eb2e8f9f7 1594 /* Stop USART DMA Rx request if ongoing */
<> 144:ef7eb2e8f9f7 1595 dmarequest = HAL_IS_BIT_SET(husart->Instance->CR3, USART_CR3_DMAR);
<> 144:ef7eb2e8f9f7 1596 if((husart->State == HAL_USART_STATE_BUSY_RX) && dmarequest)
<> 144:ef7eb2e8f9f7 1597 {
<> 144:ef7eb2e8f9f7 1598 USART_EndRxTransfer(husart);
<> 144:ef7eb2e8f9f7 1599 }
<> 144:ef7eb2e8f9f7 1600
<> 144:ef7eb2e8f9f7 1601 husart->ErrorCode |= HAL_USART_ERROR_DMA;
<> 144:ef7eb2e8f9f7 1602 husart->State= HAL_USART_STATE_READY;
<> 144:ef7eb2e8f9f7 1603
<> 144:ef7eb2e8f9f7 1604 HAL_USART_ErrorCallback(husart);
<> 144:ef7eb2e8f9f7 1605 }
<> 144:ef7eb2e8f9f7 1606
<> 144:ef7eb2e8f9f7 1607 /**
<> 144:ef7eb2e8f9f7 1608 * @brief This function handles USART Communication Timeout.
<> 144:ef7eb2e8f9f7 1609 * @param husart: pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1610 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 1611 * @param Flag: specifies the USART flag to check.
<> 144:ef7eb2e8f9f7 1612 * @param Status: The new Flag status (SET or RESET).
<> 144:ef7eb2e8f9f7 1613 * @param Tickstart: Tick start value.
<> 144:ef7eb2e8f9f7 1614 * @param Timeout: Timeout duration.
<> 144:ef7eb2e8f9f7 1615 * @retval HAL status
<> 144:ef7eb2e8f9f7 1616 */
<> 144:ef7eb2e8f9f7 1617 static HAL_StatusTypeDef USART_WaitOnFlagUntilTimeout(USART_HandleTypeDef *husart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout)
<> 144:ef7eb2e8f9f7 1618 {
<> 144:ef7eb2e8f9f7 1619 /* Wait until flag is set */
<> 144:ef7eb2e8f9f7 1620 while((__HAL_USART_GET_FLAG(husart, Flag) ? SET : RESET) == Status)
<> 144:ef7eb2e8f9f7 1621 {
<> 144:ef7eb2e8f9f7 1622 /* Check for the Timeout */
<> 144:ef7eb2e8f9f7 1623 if(Timeout != HAL_MAX_DELAY)
<> 144:ef7eb2e8f9f7 1624 {
<> 144:ef7eb2e8f9f7 1625 if((Timeout == 0U)||((HAL_GetTick() - Tickstart ) > Timeout))
<> 144:ef7eb2e8f9f7 1626 {
<> 144:ef7eb2e8f9f7 1627 /* Disable the USART Transmit Complete Interrupt */
<> 144:ef7eb2e8f9f7 1628 CLEAR_BIT(husart->Instance->CR1, USART_CR1_TXEIE);
<> 144:ef7eb2e8f9f7 1629
<> 144:ef7eb2e8f9f7 1630 /* Disable the USART RXNE Interrupt */
<> 144:ef7eb2e8f9f7 1631 CLEAR_BIT(husart->Instance->CR1, USART_CR1_RXNEIE);
<> 144:ef7eb2e8f9f7 1632
<> 144:ef7eb2e8f9f7 1633 /* Disable the USART Parity Error Interrupt */
<> 144:ef7eb2e8f9f7 1634 CLEAR_BIT(husart->Instance->CR1, USART_CR1_PEIE);
<> 144:ef7eb2e8f9f7 1635
<> 144:ef7eb2e8f9f7 1636 /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */
<> 144:ef7eb2e8f9f7 1637 CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
<> 144:ef7eb2e8f9f7 1638
<> 144:ef7eb2e8f9f7 1639 husart->State= HAL_USART_STATE_READY;
<> 144:ef7eb2e8f9f7 1640
<> 144:ef7eb2e8f9f7 1641 /* Process Unlocked */
<> 144:ef7eb2e8f9f7 1642 __HAL_UNLOCK(husart);
<> 144:ef7eb2e8f9f7 1643
<> 144:ef7eb2e8f9f7 1644 return HAL_TIMEOUT;
<> 144:ef7eb2e8f9f7 1645 }
<> 144:ef7eb2e8f9f7 1646 }
<> 144:ef7eb2e8f9f7 1647 }
<> 144:ef7eb2e8f9f7 1648 return HAL_OK;
<> 144:ef7eb2e8f9f7 1649 }
<> 144:ef7eb2e8f9f7 1650
<> 144:ef7eb2e8f9f7 1651 /**
<> 144:ef7eb2e8f9f7 1652 * @brief End ongoing Tx transfer on USART peripheral (following error detection or Transmit completion).
<> 144:ef7eb2e8f9f7 1653 * @param husart: USART handle.
<> 144:ef7eb2e8f9f7 1654 * @retval None
<> 144:ef7eb2e8f9f7 1655 */
<> 144:ef7eb2e8f9f7 1656 static void USART_EndTxTransfer(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1657 {
<> 144:ef7eb2e8f9f7 1658 /* Disable TXEIE and TCIE interrupts */
<> 144:ef7eb2e8f9f7 1659 CLEAR_BIT(husart->Instance->CR1, (USART_CR1_TXEIE | USART_CR1_TCIE));
<> 144:ef7eb2e8f9f7 1660
<> 144:ef7eb2e8f9f7 1661 /* At end of Tx process, restore husart->State to Ready */
<> 144:ef7eb2e8f9f7 1662 husart->State = HAL_USART_STATE_READY;
<> 144:ef7eb2e8f9f7 1663 }
<> 144:ef7eb2e8f9f7 1664
<> 144:ef7eb2e8f9f7 1665 /**
<> 144:ef7eb2e8f9f7 1666 * @brief End ongoing Rx transfer on USART peripheral (following error detection or Reception completion).
<> 144:ef7eb2e8f9f7 1667 * @param husart: USART handle.
<> 144:ef7eb2e8f9f7 1668 * @retval None
<> 144:ef7eb2e8f9f7 1669 */
<> 144:ef7eb2e8f9f7 1670 static void USART_EndRxTransfer(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1671 {
<> 144:ef7eb2e8f9f7 1672 /* Disable RXNE, PE and ERR interrupts */
<> 144:ef7eb2e8f9f7 1673 CLEAR_BIT(husart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE));
<> 144:ef7eb2e8f9f7 1674 CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
<> 144:ef7eb2e8f9f7 1675
<> 144:ef7eb2e8f9f7 1676 /* At end of Rx process, restore husart->State to Ready */
<> 144:ef7eb2e8f9f7 1677 husart->State = HAL_USART_STATE_READY;
<> 144:ef7eb2e8f9f7 1678 }
<> 144:ef7eb2e8f9f7 1679
<> 144:ef7eb2e8f9f7 1680 /**
<> 144:ef7eb2e8f9f7 1681 * @brief DMA USART communication abort callback, when initiated by HAL services on Error
<> 144:ef7eb2e8f9f7 1682 * (To be called at end of DMA Abort procedure following error occurrence).
<> 144:ef7eb2e8f9f7 1683 * @param hdma DMA handle.
<> 144:ef7eb2e8f9f7 1684 * @retval None
<> 144:ef7eb2e8f9f7 1685 */
<> 144:ef7eb2e8f9f7 1686 static void USART_DMAAbortOnError(DMA_HandleTypeDef *hdma)
<> 144:ef7eb2e8f9f7 1687 {
<> 144:ef7eb2e8f9f7 1688 USART_HandleTypeDef* husart = ( USART_HandleTypeDef* )((DMA_HandleTypeDef* )hdma)->Parent;
<> 144:ef7eb2e8f9f7 1689 husart->RxXferCount = 0x00U;
<> 144:ef7eb2e8f9f7 1690 husart->TxXferCount = 0x00U;
<> 144:ef7eb2e8f9f7 1691
<> 144:ef7eb2e8f9f7 1692 HAL_USART_ErrorCallback(husart);
<> 144:ef7eb2e8f9f7 1693 }
<> 144:ef7eb2e8f9f7 1694
<> 144:ef7eb2e8f9f7 1695 /**
<> 144:ef7eb2e8f9f7 1696 * @brief Simplex Send an amount of data in non-blocking mode.
<> 144:ef7eb2e8f9f7 1697 * @param husart: pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1698 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 1699 * @retval HAL status
<> 144:ef7eb2e8f9f7 1700 * @note The USART errors are not managed to avoid the overrun error.
<> 144:ef7eb2e8f9f7 1701 */
<> 144:ef7eb2e8f9f7 1702 static HAL_StatusTypeDef USART_Transmit_IT(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1703 {
<> 144:ef7eb2e8f9f7 1704 uint16_t* tmp;
<> 144:ef7eb2e8f9f7 1705
<> 144:ef7eb2e8f9f7 1706 if(husart->State == HAL_USART_STATE_BUSY_TX)
<> 144:ef7eb2e8f9f7 1707 {
<> 144:ef7eb2e8f9f7 1708 if(husart->Init.WordLength == USART_WORDLENGTH_9B)
<> 144:ef7eb2e8f9f7 1709 {
<> 144:ef7eb2e8f9f7 1710 tmp = (uint16_t*) husart->pTxBuffPtr;
<> 144:ef7eb2e8f9f7 1711 husart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FFU);
<> 144:ef7eb2e8f9f7 1712 if(husart->Init.Parity == USART_PARITY_NONE)
<> 144:ef7eb2e8f9f7 1713 {
<> 144:ef7eb2e8f9f7 1714 husart->pTxBuffPtr += 2U;
<> 144:ef7eb2e8f9f7 1715 }
<> 144:ef7eb2e8f9f7 1716 else
<> 144:ef7eb2e8f9f7 1717 {
<> 144:ef7eb2e8f9f7 1718 husart->pTxBuffPtr += 1U;
<> 144:ef7eb2e8f9f7 1719 }
<> 144:ef7eb2e8f9f7 1720 }
<> 144:ef7eb2e8f9f7 1721 else
<> 144:ef7eb2e8f9f7 1722 {
<> 144:ef7eb2e8f9f7 1723 husart->Instance->DR = (uint8_t)(*husart->pTxBuffPtr++ & (uint8_t)0x00FFU);
<> 144:ef7eb2e8f9f7 1724 }
<> 144:ef7eb2e8f9f7 1725
<> 144:ef7eb2e8f9f7 1726 if(--husart->TxXferCount == 0U)
<> 144:ef7eb2e8f9f7 1727 {
<> 144:ef7eb2e8f9f7 1728 /* Disable the USART Transmit data register empty Interrupt */
<> 144:ef7eb2e8f9f7 1729 CLEAR_BIT(husart->Instance->CR1, USART_CR1_TXEIE);
<> 144:ef7eb2e8f9f7 1730
<> 144:ef7eb2e8f9f7 1731 /* Enable the USART Transmit Complete Interrupt */
<> 144:ef7eb2e8f9f7 1732 SET_BIT(husart->Instance->CR1, USART_CR1_TCIE);
<> 144:ef7eb2e8f9f7 1733 }
<> 144:ef7eb2e8f9f7 1734 return HAL_OK;
<> 144:ef7eb2e8f9f7 1735 }
<> 144:ef7eb2e8f9f7 1736 else
<> 144:ef7eb2e8f9f7 1737 {
<> 144:ef7eb2e8f9f7 1738 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 1739 }
<> 144:ef7eb2e8f9f7 1740 }
<> 144:ef7eb2e8f9f7 1741
<> 144:ef7eb2e8f9f7 1742 /**
<> 144:ef7eb2e8f9f7 1743 * @brief Wraps up transmission in non blocking mode.
<> 144:ef7eb2e8f9f7 1744 * @param husart: pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1745 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 1746 * @retval HAL status
<> 144:ef7eb2e8f9f7 1747 */
<> 144:ef7eb2e8f9f7 1748 static HAL_StatusTypeDef USART_EndTransmit_IT(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1749 {
<> 144:ef7eb2e8f9f7 1750 /* Disable the USART Transmit Complete Interrupt */
<> 144:ef7eb2e8f9f7 1751 CLEAR_BIT(husart->Instance->CR1, USART_CR1_TCIE);
<> 144:ef7eb2e8f9f7 1752
<> 144:ef7eb2e8f9f7 1753 /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */
<> 144:ef7eb2e8f9f7 1754 CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
<> 144:ef7eb2e8f9f7 1755
<> 144:ef7eb2e8f9f7 1756 husart->State = HAL_USART_STATE_READY;
<> 144:ef7eb2e8f9f7 1757
<> 144:ef7eb2e8f9f7 1758 HAL_USART_TxCpltCallback(husart);
<> 144:ef7eb2e8f9f7 1759
<> 144:ef7eb2e8f9f7 1760 return HAL_OK;
<> 144:ef7eb2e8f9f7 1761 }
<> 144:ef7eb2e8f9f7 1762
<> 144:ef7eb2e8f9f7 1763 /**
<> 144:ef7eb2e8f9f7 1764 * @brief Simplex Receive an amount of data in non-blocking mode.
<> 144:ef7eb2e8f9f7 1765 * @param husart: pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1766 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 1767 * @retval HAL status
<> 144:ef7eb2e8f9f7 1768 */
<> 144:ef7eb2e8f9f7 1769 static HAL_StatusTypeDef USART_Receive_IT(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1770 {
<> 144:ef7eb2e8f9f7 1771 uint16_t* tmp;
<> 144:ef7eb2e8f9f7 1772 if(husart->State == HAL_USART_STATE_BUSY_RX)
<> 144:ef7eb2e8f9f7 1773 {
<> 144:ef7eb2e8f9f7 1774 if(husart->Init.WordLength == USART_WORDLENGTH_9B)
<> 144:ef7eb2e8f9f7 1775 {
<> 144:ef7eb2e8f9f7 1776 tmp = (uint16_t*) husart->pRxBuffPtr;
<> 144:ef7eb2e8f9f7 1777 if(husart->Init.Parity == USART_PARITY_NONE)
<> 144:ef7eb2e8f9f7 1778 {
<> 144:ef7eb2e8f9f7 1779 *tmp = (uint16_t)(husart->Instance->DR & (uint16_t)0x01FFU);
<> 144:ef7eb2e8f9f7 1780 husart->pRxBuffPtr += 2U;
<> 144:ef7eb2e8f9f7 1781 }
<> 144:ef7eb2e8f9f7 1782 else
<> 144:ef7eb2e8f9f7 1783 {
<> 144:ef7eb2e8f9f7 1784 *tmp = (uint16_t)(husart->Instance->DR & (uint16_t)0x00FFU);
<> 144:ef7eb2e8f9f7 1785 husart->pRxBuffPtr += 1U;
<> 144:ef7eb2e8f9f7 1786 }
<> 144:ef7eb2e8f9f7 1787 if(--husart->RxXferCount != 0x00U)
<> 144:ef7eb2e8f9f7 1788 {
<> 144:ef7eb2e8f9f7 1789 /* Send dummy byte in order to generate the clock for the slave to send the next data */
<> 144:ef7eb2e8f9f7 1790 husart->Instance->DR = (DUMMY_DATA & (uint16_t)0x01FFU);
<> 144:ef7eb2e8f9f7 1791 }
<> 144:ef7eb2e8f9f7 1792 }
<> 144:ef7eb2e8f9f7 1793 else
<> 144:ef7eb2e8f9f7 1794 {
<> 144:ef7eb2e8f9f7 1795 if(husart->Init.Parity == USART_PARITY_NONE)
<> 144:ef7eb2e8f9f7 1796 {
<> 144:ef7eb2e8f9f7 1797 *husart->pRxBuffPtr++ = (uint8_t)(husart->Instance->DR & (uint8_t)0x00FFU);
<> 144:ef7eb2e8f9f7 1798 }
<> 144:ef7eb2e8f9f7 1799 else
<> 144:ef7eb2e8f9f7 1800 {
<> 144:ef7eb2e8f9f7 1801 *husart->pRxBuffPtr++ = (uint8_t)(husart->Instance->DR & (uint8_t)0x007FU);
<> 144:ef7eb2e8f9f7 1802 }
<> 144:ef7eb2e8f9f7 1803
<> 144:ef7eb2e8f9f7 1804 if(--husart->RxXferCount != 0x00U)
<> 144:ef7eb2e8f9f7 1805 {
<> 144:ef7eb2e8f9f7 1806 /* Send dummy byte in order to generate the clock for the slave to send the next data */
<> 144:ef7eb2e8f9f7 1807 husart->Instance->DR = (DUMMY_DATA & (uint16_t)0x00FFU);
<> 144:ef7eb2e8f9f7 1808 }
<> 144:ef7eb2e8f9f7 1809 }
<> 144:ef7eb2e8f9f7 1810
<> 144:ef7eb2e8f9f7 1811 if(husart->RxXferCount == 0U)
<> 144:ef7eb2e8f9f7 1812 {
<> 144:ef7eb2e8f9f7 1813 /* Disable the USART RXNE Interrupt */
<> 144:ef7eb2e8f9f7 1814 CLEAR_BIT(husart->Instance->CR1, USART_CR1_RXNEIE);
<> 144:ef7eb2e8f9f7 1815
<> 144:ef7eb2e8f9f7 1816 /* Disable the USART Parity Error Interrupt */
<> 144:ef7eb2e8f9f7 1817 CLEAR_BIT(husart->Instance->CR1, USART_CR1_PEIE);
<> 144:ef7eb2e8f9f7 1818
<> 144:ef7eb2e8f9f7 1819 /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */
<> 144:ef7eb2e8f9f7 1820 CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
<> 144:ef7eb2e8f9f7 1821
<> 144:ef7eb2e8f9f7 1822 husart->State = HAL_USART_STATE_READY;
<> 144:ef7eb2e8f9f7 1823 HAL_USART_RxCpltCallback(husart);
<> 144:ef7eb2e8f9f7 1824
<> 144:ef7eb2e8f9f7 1825 return HAL_OK;
<> 144:ef7eb2e8f9f7 1826 }
<> 144:ef7eb2e8f9f7 1827 return HAL_OK;
<> 144:ef7eb2e8f9f7 1828 }
<> 144:ef7eb2e8f9f7 1829 else
<> 144:ef7eb2e8f9f7 1830 {
<> 144:ef7eb2e8f9f7 1831 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 1832 }
<> 144:ef7eb2e8f9f7 1833 }
<> 144:ef7eb2e8f9f7 1834
<> 144:ef7eb2e8f9f7 1835 /**
<> 144:ef7eb2e8f9f7 1836 * @brief Full-Duplex Send receive an amount of data in full-duplex mode (non-blocking).
<> 144:ef7eb2e8f9f7 1837 * @param husart: pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1838 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 1839 * @retval HAL status
<> 144:ef7eb2e8f9f7 1840 */
<> 144:ef7eb2e8f9f7 1841 static HAL_StatusTypeDef USART_TransmitReceive_IT(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1842 {
<> 144:ef7eb2e8f9f7 1843 uint16_t* tmp;
<> 144:ef7eb2e8f9f7 1844
<> 144:ef7eb2e8f9f7 1845 if(husart->State == HAL_USART_STATE_BUSY_TX_RX)
<> 144:ef7eb2e8f9f7 1846 {
<> 144:ef7eb2e8f9f7 1847 if(husart->TxXferCount != 0x00U)
<> 144:ef7eb2e8f9f7 1848 {
<> 144:ef7eb2e8f9f7 1849 if(__HAL_USART_GET_FLAG(husart, USART_FLAG_TXE) != RESET)
<> 144:ef7eb2e8f9f7 1850 {
<> 144:ef7eb2e8f9f7 1851 if(husart->Init.WordLength == USART_WORDLENGTH_9B)
<> 144:ef7eb2e8f9f7 1852 {
<> 144:ef7eb2e8f9f7 1853 tmp = (uint16_t*) husart->pTxBuffPtr;
<> 144:ef7eb2e8f9f7 1854 husart->Instance->DR = (uint16_t)(*tmp & (uint16_t)0x01FFU);
<> 144:ef7eb2e8f9f7 1855 if(husart->Init.Parity == USART_PARITY_NONE)
<> 144:ef7eb2e8f9f7 1856 {
<> 144:ef7eb2e8f9f7 1857 husart->pTxBuffPtr += 2U;
<> 144:ef7eb2e8f9f7 1858 }
<> 144:ef7eb2e8f9f7 1859 else
<> 144:ef7eb2e8f9f7 1860 {
<> 144:ef7eb2e8f9f7 1861 husart->pTxBuffPtr += 1U;
<> 144:ef7eb2e8f9f7 1862 }
<> 144:ef7eb2e8f9f7 1863 }
<> 144:ef7eb2e8f9f7 1864 else
<> 144:ef7eb2e8f9f7 1865 {
<> 144:ef7eb2e8f9f7 1866 husart->Instance->DR = (uint8_t)(*husart->pTxBuffPtr++ & (uint8_t)0x00FFU);
<> 144:ef7eb2e8f9f7 1867 }
<> 144:ef7eb2e8f9f7 1868 husart->TxXferCount--;
<> 144:ef7eb2e8f9f7 1869
<> 144:ef7eb2e8f9f7 1870 /* Check the latest data transmitted */
<> 144:ef7eb2e8f9f7 1871 if(husart->TxXferCount == 0U)
<> 144:ef7eb2e8f9f7 1872 {
<> 144:ef7eb2e8f9f7 1873 CLEAR_BIT(husart->Instance->CR1, USART_CR1_TXEIE);
<> 144:ef7eb2e8f9f7 1874 }
<> 144:ef7eb2e8f9f7 1875 }
<> 144:ef7eb2e8f9f7 1876 }
<> 144:ef7eb2e8f9f7 1877
<> 144:ef7eb2e8f9f7 1878 if(husart->RxXferCount != 0x00U)
<> 144:ef7eb2e8f9f7 1879 {
<> 144:ef7eb2e8f9f7 1880 if(__HAL_USART_GET_FLAG(husart, USART_FLAG_RXNE) != RESET)
<> 144:ef7eb2e8f9f7 1881 {
<> 144:ef7eb2e8f9f7 1882 if(husart->Init.WordLength == USART_WORDLENGTH_9B)
<> 144:ef7eb2e8f9f7 1883 {
<> 144:ef7eb2e8f9f7 1884 tmp = (uint16_t*) husart->pRxBuffPtr;
<> 144:ef7eb2e8f9f7 1885 if(husart->Init.Parity == USART_PARITY_NONE)
<> 144:ef7eb2e8f9f7 1886 {
<> 144:ef7eb2e8f9f7 1887 *tmp = (uint16_t)(husart->Instance->DR & (uint16_t)0x01FFU);
<> 144:ef7eb2e8f9f7 1888 husart->pRxBuffPtr += 2U;
<> 144:ef7eb2e8f9f7 1889 }
<> 144:ef7eb2e8f9f7 1890 else
<> 144:ef7eb2e8f9f7 1891 {
<> 144:ef7eb2e8f9f7 1892 *tmp = (uint16_t)(husart->Instance->DR & (uint16_t)0x00FFU);
<> 144:ef7eb2e8f9f7 1893 husart->pRxBuffPtr += 1U;
<> 144:ef7eb2e8f9f7 1894 }
<> 144:ef7eb2e8f9f7 1895 }
<> 144:ef7eb2e8f9f7 1896 else
<> 144:ef7eb2e8f9f7 1897 {
<> 144:ef7eb2e8f9f7 1898 if(husart->Init.Parity == USART_PARITY_NONE)
<> 144:ef7eb2e8f9f7 1899 {
<> 144:ef7eb2e8f9f7 1900 *husart->pRxBuffPtr++ = (uint8_t)(husart->Instance->DR & (uint8_t)0x00FFU);
<> 144:ef7eb2e8f9f7 1901 }
<> 144:ef7eb2e8f9f7 1902 else
<> 144:ef7eb2e8f9f7 1903 {
<> 144:ef7eb2e8f9f7 1904 *husart->pRxBuffPtr++ = (uint8_t)(husart->Instance->DR & (uint8_t)0x007FU);
<> 144:ef7eb2e8f9f7 1905 }
<> 144:ef7eb2e8f9f7 1906 }
<> 144:ef7eb2e8f9f7 1907 husart->RxXferCount--;
<> 144:ef7eb2e8f9f7 1908 }
<> 144:ef7eb2e8f9f7 1909 }
<> 144:ef7eb2e8f9f7 1910
<> 144:ef7eb2e8f9f7 1911 /* Check the latest data received */
<> 144:ef7eb2e8f9f7 1912 if(husart->RxXferCount == 0U)
<> 144:ef7eb2e8f9f7 1913 {
<> 144:ef7eb2e8f9f7 1914 /* Disable the USART RXNE Interrupt */
<> 144:ef7eb2e8f9f7 1915 CLEAR_BIT(husart->Instance->CR1, USART_CR1_RXNEIE);
<> 144:ef7eb2e8f9f7 1916
<> 144:ef7eb2e8f9f7 1917 /* Disable the USART Parity Error Interrupt */
<> 144:ef7eb2e8f9f7 1918 CLEAR_BIT(husart->Instance->CR1, USART_CR1_PEIE);
<> 144:ef7eb2e8f9f7 1919
<> 144:ef7eb2e8f9f7 1920 /* Disable the USART Error Interrupt: (Frame error, noise error, overrun error) */
<> 144:ef7eb2e8f9f7 1921 CLEAR_BIT(husart->Instance->CR3, USART_CR3_EIE);
<> 144:ef7eb2e8f9f7 1922
<> 144:ef7eb2e8f9f7 1923 husart->State = HAL_USART_STATE_READY;
<> 144:ef7eb2e8f9f7 1924
<> 144:ef7eb2e8f9f7 1925 HAL_USART_TxRxCpltCallback(husart);
<> 144:ef7eb2e8f9f7 1926
<> 144:ef7eb2e8f9f7 1927 return HAL_OK;
<> 144:ef7eb2e8f9f7 1928 }
<> 144:ef7eb2e8f9f7 1929
<> 144:ef7eb2e8f9f7 1930 return HAL_OK;
<> 144:ef7eb2e8f9f7 1931 }
<> 144:ef7eb2e8f9f7 1932 else
<> 144:ef7eb2e8f9f7 1933 {
<> 144:ef7eb2e8f9f7 1934 return HAL_BUSY;
<> 144:ef7eb2e8f9f7 1935 }
<> 144:ef7eb2e8f9f7 1936 }
<> 144:ef7eb2e8f9f7 1937
<> 144:ef7eb2e8f9f7 1938 /**
<> 144:ef7eb2e8f9f7 1939 * @brief Configures the USART pferipheral.
<> 144:ef7eb2e8f9f7 1940 * @param husart: pointer to a USART_HandleTypeDef structure that contains
<> 144:ef7eb2e8f9f7 1941 * the configuration information for the specified USART module.
<> 144:ef7eb2e8f9f7 1942 * @retval None
<> 144:ef7eb2e8f9f7 1943 */
<> 144:ef7eb2e8f9f7 1944 static void USART_SetConfig(USART_HandleTypeDef *husart)
<> 144:ef7eb2e8f9f7 1945 {
<> 144:ef7eb2e8f9f7 1946 uint32_t tmpreg = 0x00U;
<> 144:ef7eb2e8f9f7 1947
<> 144:ef7eb2e8f9f7 1948 /* Check the parameters */
<> 144:ef7eb2e8f9f7 1949 assert_param(IS_USART_INSTANCE(husart->Instance));
<> 144:ef7eb2e8f9f7 1950 assert_param(IS_USART_POLARITY(husart->Init.CLKPolarity));
<> 144:ef7eb2e8f9f7 1951 assert_param(IS_USART_PHASE(husart->Init.CLKPhase));
<> 144:ef7eb2e8f9f7 1952 assert_param(IS_USART_LASTBIT(husart->Init.CLKLastBit));
<> 144:ef7eb2e8f9f7 1953 assert_param(IS_USART_BAUDRATE(husart->Init.BaudRate));
<> 144:ef7eb2e8f9f7 1954 assert_param(IS_USART_WORD_LENGTH(husart->Init.WordLength));
<> 144:ef7eb2e8f9f7 1955 assert_param(IS_USART_STOPBITS(husart->Init.StopBits));
<> 144:ef7eb2e8f9f7 1956 assert_param(IS_USART_PARITY(husart->Init.Parity));
<> 144:ef7eb2e8f9f7 1957 assert_param(IS_USART_MODE(husart->Init.Mode));
<> 144:ef7eb2e8f9f7 1958
<> 144:ef7eb2e8f9f7 1959 /* The LBCL, CPOL and CPHA bits have to be selected when both the transmitter and the
<> 144:ef7eb2e8f9f7 1960 receiver are disabled (TE=RE=0) to ensure that the clock pulses function correctly. */
<> 144:ef7eb2e8f9f7 1961 CLEAR_BIT(husart->Instance->CR1, (USART_CR1_TE | USART_CR1_RE));
<> 144:ef7eb2e8f9f7 1962
<> 144:ef7eb2e8f9f7 1963 /*---------------------------- USART CR2 Configuration ---------------------*/
<> 144:ef7eb2e8f9f7 1964 tmpreg = husart->Instance->CR2;
<> 144:ef7eb2e8f9f7 1965 /* Clear CLKEN, CPOL, CPHA and LBCL bits */
<> 144:ef7eb2e8f9f7 1966 tmpreg &= (uint32_t)~((uint32_t)(USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_CLKEN | USART_CR2_LBCL | USART_CR2_STOP));
<> 144:ef7eb2e8f9f7 1967 /* Configure the USART Clock, CPOL, CPHA and LastBit -----------------------*/
<> 144:ef7eb2e8f9f7 1968 /* Set CPOL bit according to husart->Init.CLKPolarity value */
<> 144:ef7eb2e8f9f7 1969 /* Set CPHA bit according to husart->Init.CLKPhase value */
<> 144:ef7eb2e8f9f7 1970 /* Set LBCL bit according to husart->Init.CLKLastBit value */
<> 144:ef7eb2e8f9f7 1971 /* Set Stop Bits: Set STOP[13:12] bits according to husart->Init.StopBits value */
<> 144:ef7eb2e8f9f7 1972 tmpreg |= (uint32_t)(USART_CLOCK_ENABLE| husart->Init.CLKPolarity |
<> 144:ef7eb2e8f9f7 1973 husart->Init.CLKPhase| husart->Init.CLKLastBit | husart->Init.StopBits);
<> 144:ef7eb2e8f9f7 1974 /* Write to USART CR2 */
<> 144:ef7eb2e8f9f7 1975 WRITE_REG(husart->Instance->CR2, (uint32_t)tmpreg);
<> 144:ef7eb2e8f9f7 1976
<> 144:ef7eb2e8f9f7 1977 /*-------------------------- USART CR1 Configuration -----------------------*/
<> 144:ef7eb2e8f9f7 1978 tmpreg = husart->Instance->CR1;
<> 144:ef7eb2e8f9f7 1979
<> 144:ef7eb2e8f9f7 1980 /* Clear M, PCE, PS, TE, RE and OVER8 bits */
<> 144:ef7eb2e8f9f7 1981 tmpreg &= (uint32_t)~((uint32_t)(USART_CR1_M | USART_CR1_PCE | USART_CR1_PS | USART_CR1_TE | \
<> 144:ef7eb2e8f9f7 1982 USART_CR1_RE | USART_CR1_OVER8));
<> 144:ef7eb2e8f9f7 1983
<> 144:ef7eb2e8f9f7 1984 /* Configure the USART Word Length, Parity and mode:
<> 144:ef7eb2e8f9f7 1985 Set the M bits according to husart->Init.WordLength value
<> 144:ef7eb2e8f9f7 1986 Set PCE and PS bits according to husart->Init.Parity value
<> 144:ef7eb2e8f9f7 1987 Set TE and RE bits according to husart->Init.Mode value
<> 144:ef7eb2e8f9f7 1988 Force OVER8 bit to 1 in order to reach the max USART frequencies */
<> 144:ef7eb2e8f9f7 1989 tmpreg |= (uint32_t)husart->Init.WordLength | husart->Init.Parity | husart->Init.Mode | USART_CR1_OVER8;
<> 144:ef7eb2e8f9f7 1990
<> 144:ef7eb2e8f9f7 1991 /* Write to USART CR1 */
<> 144:ef7eb2e8f9f7 1992 WRITE_REG(husart->Instance->CR1, (uint32_t)tmpreg);
<> 144:ef7eb2e8f9f7 1993
<> 144:ef7eb2e8f9f7 1994 /*-------------------------- USART CR3 Configuration -----------------------*/
<> 144:ef7eb2e8f9f7 1995 /* Clear CTSE and RTSE bits */
<> 144:ef7eb2e8f9f7 1996 CLEAR_BIT(husart->Instance->CR3, (USART_CR3_RTSE | USART_CR3_CTSE));
<> 144:ef7eb2e8f9f7 1997
<> 144:ef7eb2e8f9f7 1998 /*-------------------------- USART BRR Configuration -----------------------*/
<> 144:ef7eb2e8f9f7 1999 if((husart->Instance == USART1) || (husart->Instance == USART6))
<> 144:ef7eb2e8f9f7 2000 {
<> 144:ef7eb2e8f9f7 2001 husart->Instance->BRR = USART_BRR(HAL_RCC_GetPCLK2Freq(), husart->Init.BaudRate);
<> 144:ef7eb2e8f9f7 2002 }
<> 144:ef7eb2e8f9f7 2003 else
<> 144:ef7eb2e8f9f7 2004 {
<> 144:ef7eb2e8f9f7 2005 husart->Instance->BRR = USART_BRR(HAL_RCC_GetPCLK1Freq(), husart->Init.BaudRate);
<> 144:ef7eb2e8f9f7 2006 }
<> 144:ef7eb2e8f9f7 2007 }
<> 144:ef7eb2e8f9f7 2008
<> 144:ef7eb2e8f9f7 2009 /**
<> 144:ef7eb2e8f9f7 2010 * @}
<> 144:ef7eb2e8f9f7 2011 */
<> 144:ef7eb2e8f9f7 2012
<> 144:ef7eb2e8f9f7 2013 #endif /* HAL_USART_MODULE_ENABLED */
<> 144:ef7eb2e8f9f7 2014 /**
<> 144:ef7eb2e8f9f7 2015 * @}
<> 144:ef7eb2e8f9f7 2016 */
<> 144:ef7eb2e8f9f7 2017
<> 144:ef7eb2e8f9f7 2018 /**
<> 144:ef7eb2e8f9f7 2019 * @}
<> 144:ef7eb2e8f9f7 2020 */
<> 144:ef7eb2e8f9f7 2021
<> 144:ef7eb2e8f9f7 2022 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/