mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_STM/TARGET_STM32F0/device/stm32f0xx_hal_irda_ex.h@149:156823d33999, 2016-10-28 (annotated)
- Committer:
- <>
- Date:
- Fri Oct 28 11:17:30 2016 +0100
- Revision:
- 149:156823d33999
- Parent:
- targets/cmsis/TARGET_STM/TARGET_STM32F0/stm32f0xx_hal_irda_ex.h@144:ef7eb2e8f9f7
- Child:
- 156:95d6b41a828b
This updates the lib to the mbed lib v128
NOTE: This release includes a restructuring of the file and directory locations and thus some
include paths in your code may need updating accordingly.
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /** |
<> | 144:ef7eb2e8f9f7 | 2 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 3 | * @file stm32f0xx_hal_irda_ex.h |
<> | 144:ef7eb2e8f9f7 | 4 | * @author MCD Application Team |
<> | 144:ef7eb2e8f9f7 | 5 | * @version V1.4.0 |
<> | 144:ef7eb2e8f9f7 | 6 | * @date 27-May-2016 |
<> | 144:ef7eb2e8f9f7 | 7 | * @brief Header file of IRDA HAL Extension module. |
<> | 144:ef7eb2e8f9f7 | 8 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 9 | * @attention |
<> | 144:ef7eb2e8f9f7 | 10 | * |
<> | 144:ef7eb2e8f9f7 | 11 | * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2> |
<> | 144:ef7eb2e8f9f7 | 12 | * |
<> | 144:ef7eb2e8f9f7 | 13 | * Redistribution and use in source and binary forms, with or without modification, |
<> | 144:ef7eb2e8f9f7 | 14 | * are permitted provided that the following conditions are met: |
<> | 144:ef7eb2e8f9f7 | 15 | * 1. Redistributions of source code must retain the above copyright notice, |
<> | 144:ef7eb2e8f9f7 | 16 | * this list of conditions and the following disclaimer. |
<> | 144:ef7eb2e8f9f7 | 17 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
<> | 144:ef7eb2e8f9f7 | 18 | * this list of conditions and the following disclaimer in the documentation |
<> | 144:ef7eb2e8f9f7 | 19 | * and/or other materials provided with the distribution. |
<> | 144:ef7eb2e8f9f7 | 20 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
<> | 144:ef7eb2e8f9f7 | 21 | * may be used to endorse or promote products derived from this software |
<> | 144:ef7eb2e8f9f7 | 22 | * without specific prior written permission. |
<> | 144:ef7eb2e8f9f7 | 23 | * |
<> | 144:ef7eb2e8f9f7 | 24 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
<> | 144:ef7eb2e8f9f7 | 25 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
<> | 144:ef7eb2e8f9f7 | 26 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
<> | 144:ef7eb2e8f9f7 | 27 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
<> | 144:ef7eb2e8f9f7 | 28 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
<> | 144:ef7eb2e8f9f7 | 29 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
<> | 144:ef7eb2e8f9f7 | 30 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
<> | 144:ef7eb2e8f9f7 | 31 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
<> | 144:ef7eb2e8f9f7 | 32 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
<> | 144:ef7eb2e8f9f7 | 33 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
<> | 144:ef7eb2e8f9f7 | 34 | * |
<> | 144:ef7eb2e8f9f7 | 35 | ****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 36 | */ |
<> | 144:ef7eb2e8f9f7 | 37 | |
<> | 144:ef7eb2e8f9f7 | 38 | /* Define to prevent recursive inclusion -------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 39 | #ifndef __STM32F0xx_HAL_IRDA_EX_H |
<> | 144:ef7eb2e8f9f7 | 40 | #define __STM32F0xx_HAL_IRDA_EX_H |
<> | 144:ef7eb2e8f9f7 | 41 | |
<> | 144:ef7eb2e8f9f7 | 42 | #ifdef __cplusplus |
<> | 144:ef7eb2e8f9f7 | 43 | extern "C" { |
<> | 144:ef7eb2e8f9f7 | 44 | #endif |
<> | 144:ef7eb2e8f9f7 | 45 | |
<> | 144:ef7eb2e8f9f7 | 46 | #if !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) |
<> | 144:ef7eb2e8f9f7 | 47 | |
<> | 144:ef7eb2e8f9f7 | 48 | /* Includes ------------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 49 | #include "stm32f0xx_hal_def.h" |
<> | 144:ef7eb2e8f9f7 | 50 | |
<> | 144:ef7eb2e8f9f7 | 51 | /** @addtogroup STM32F0xx_HAL_Driver |
<> | 144:ef7eb2e8f9f7 | 52 | * @{ |
<> | 144:ef7eb2e8f9f7 | 53 | */ |
<> | 144:ef7eb2e8f9f7 | 54 | |
<> | 144:ef7eb2e8f9f7 | 55 | /** @addtogroup IRDAEx IRDAEx |
<> | 144:ef7eb2e8f9f7 | 56 | * @{ |
<> | 144:ef7eb2e8f9f7 | 57 | */ |
<> | 144:ef7eb2e8f9f7 | 58 | |
<> | 144:ef7eb2e8f9f7 | 59 | /* Exported types ------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 60 | /* Exported constants --------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 61 | /** @defgroup IRDAEx_Exported_Constants IRDAEx Exported Constants |
<> | 144:ef7eb2e8f9f7 | 62 | * @{ |
<> | 144:ef7eb2e8f9f7 | 63 | */ |
<> | 144:ef7eb2e8f9f7 | 64 | |
<> | 144:ef7eb2e8f9f7 | 65 | /** @defgroup IRDAEx_Word_Length IRDA Word Length |
<> | 144:ef7eb2e8f9f7 | 66 | * @{ |
<> | 144:ef7eb2e8f9f7 | 67 | */ |
<> | 144:ef7eb2e8f9f7 | 68 | #if defined (STM32F042x6) || defined (STM32F048xx) || \ |
<> | 144:ef7eb2e8f9f7 | 69 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ |
<> | 144:ef7eb2e8f9f7 | 70 | defined (STM32F091xC) || defined (STM32F098xx) |
<> | 144:ef7eb2e8f9f7 | 71 | #define IRDA_WORDLENGTH_7B ((uint32_t)USART_CR1_M1) /*!< 7-bit long frame */ |
<> | 144:ef7eb2e8f9f7 | 72 | #define IRDA_WORDLENGTH_8B ((uint32_t)0x00000000) /*!< 8-bit long frame */ |
<> | 144:ef7eb2e8f9f7 | 73 | #define IRDA_WORDLENGTH_9B ((uint32_t)USART_CR1_M0) /*!< 9-bit long frame */ |
<> | 144:ef7eb2e8f9f7 | 74 | #else |
<> | 144:ef7eb2e8f9f7 | 75 | #define IRDA_WORDLENGTH_8B ((uint32_t)0x00000000) /*!< 8-bit long frame */ |
<> | 144:ef7eb2e8f9f7 | 76 | #define IRDA_WORDLENGTH_9B ((uint32_t)USART_CR1_M) /*!< 9-bit long frame */ |
<> | 144:ef7eb2e8f9f7 | 77 | #endif /* defined (STM32F042x6) || defined (STM32F048xx) || \ |
<> | 144:ef7eb2e8f9f7 | 78 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ |
<> | 144:ef7eb2e8f9f7 | 79 | defined (STM32F091xC) || defined (STM32F098xx)*/ |
<> | 144:ef7eb2e8f9f7 | 80 | /** |
<> | 144:ef7eb2e8f9f7 | 81 | * @} |
<> | 144:ef7eb2e8f9f7 | 82 | */ |
<> | 144:ef7eb2e8f9f7 | 83 | |
<> | 144:ef7eb2e8f9f7 | 84 | /** |
<> | 144:ef7eb2e8f9f7 | 85 | * @} |
<> | 144:ef7eb2e8f9f7 | 86 | */ |
<> | 144:ef7eb2e8f9f7 | 87 | |
<> | 144:ef7eb2e8f9f7 | 88 | /* Exported macros -----------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 89 | /* Exported functions --------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 90 | |
<> | 144:ef7eb2e8f9f7 | 91 | /* Private macros ------------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 92 | |
<> | 144:ef7eb2e8f9f7 | 93 | /** @defgroup IRDAEx_Private_Macros IRDAEx Private Macros |
<> | 144:ef7eb2e8f9f7 | 94 | * @{ |
<> | 144:ef7eb2e8f9f7 | 95 | */ |
<> | 144:ef7eb2e8f9f7 | 96 | |
<> | 144:ef7eb2e8f9f7 | 97 | /** @brief Report the IRDA clock source. |
<> | 144:ef7eb2e8f9f7 | 98 | * @param __HANDLE__: specifies the IRDA Handle. |
<> | 144:ef7eb2e8f9f7 | 99 | * @param __CLOCKSOURCE__: output variable. |
<> | 144:ef7eb2e8f9f7 | 100 | * @retval IRDA clocking source, written in __CLOCKSOURCE__. |
<> | 144:ef7eb2e8f9f7 | 101 | */ |
<> | 144:ef7eb2e8f9f7 | 102 | |
<> | 144:ef7eb2e8f9f7 | 103 | #if defined(STM32F031x6) || defined(STM32F038xx) |
<> | 144:ef7eb2e8f9f7 | 104 | #define IRDA_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ |
<> | 144:ef7eb2e8f9f7 | 105 | do { \ |
<> | 144:ef7eb2e8f9f7 | 106 | switch(__HAL_RCC_GET_USART1_SOURCE()) \ |
<> | 144:ef7eb2e8f9f7 | 107 | { \ |
<> | 144:ef7eb2e8f9f7 | 108 | case RCC_USART1CLKSOURCE_PCLK1: \ |
<> | 144:ef7eb2e8f9f7 | 109 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \ |
<> | 144:ef7eb2e8f9f7 | 110 | break; \ |
<> | 144:ef7eb2e8f9f7 | 111 | case RCC_USART1CLKSOURCE_HSI: \ |
<> | 144:ef7eb2e8f9f7 | 112 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \ |
<> | 144:ef7eb2e8f9f7 | 113 | break; \ |
<> | 144:ef7eb2e8f9f7 | 114 | case RCC_USART1CLKSOURCE_SYSCLK: \ |
<> | 144:ef7eb2e8f9f7 | 115 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \ |
<> | 144:ef7eb2e8f9f7 | 116 | break; \ |
<> | 144:ef7eb2e8f9f7 | 117 | case RCC_USART1CLKSOURCE_LSE: \ |
<> | 144:ef7eb2e8f9f7 | 118 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \ |
<> | 144:ef7eb2e8f9f7 | 119 | break; \ |
<> | 144:ef7eb2e8f9f7 | 120 | default: \ |
<> | 144:ef7eb2e8f9f7 | 121 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \ |
<> | 144:ef7eb2e8f9f7 | 122 | break; \ |
<> | 144:ef7eb2e8f9f7 | 123 | } \ |
<> | 144:ef7eb2e8f9f7 | 124 | } while(0) |
<> | 144:ef7eb2e8f9f7 | 125 | #elif defined (STM32F042x6) || defined (STM32F048xx) || \ |
<> | 144:ef7eb2e8f9f7 | 126 | defined (STM32F051x8) || defined (STM32F058xx) |
<> | 144:ef7eb2e8f9f7 | 127 | #define IRDA_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ |
<> | 144:ef7eb2e8f9f7 | 128 | do { \ |
<> | 144:ef7eb2e8f9f7 | 129 | if((__HANDLE__)->Instance == USART1) \ |
<> | 144:ef7eb2e8f9f7 | 130 | { \ |
<> | 144:ef7eb2e8f9f7 | 131 | switch(__HAL_RCC_GET_USART1_SOURCE()) \ |
<> | 144:ef7eb2e8f9f7 | 132 | { \ |
<> | 144:ef7eb2e8f9f7 | 133 | case RCC_USART1CLKSOURCE_PCLK1: \ |
<> | 144:ef7eb2e8f9f7 | 134 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \ |
<> | 144:ef7eb2e8f9f7 | 135 | break; \ |
<> | 144:ef7eb2e8f9f7 | 136 | case RCC_USART1CLKSOURCE_HSI: \ |
<> | 144:ef7eb2e8f9f7 | 137 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \ |
<> | 144:ef7eb2e8f9f7 | 138 | break; \ |
<> | 144:ef7eb2e8f9f7 | 139 | case RCC_USART1CLKSOURCE_SYSCLK: \ |
<> | 144:ef7eb2e8f9f7 | 140 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \ |
<> | 144:ef7eb2e8f9f7 | 141 | break; \ |
<> | 144:ef7eb2e8f9f7 | 142 | case RCC_USART1CLKSOURCE_LSE: \ |
<> | 144:ef7eb2e8f9f7 | 143 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \ |
<> | 144:ef7eb2e8f9f7 | 144 | break; \ |
<> | 144:ef7eb2e8f9f7 | 145 | default: \ |
<> | 144:ef7eb2e8f9f7 | 146 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \ |
<> | 144:ef7eb2e8f9f7 | 147 | break; \ |
<> | 144:ef7eb2e8f9f7 | 148 | } \ |
<> | 144:ef7eb2e8f9f7 | 149 | } \ |
<> | 144:ef7eb2e8f9f7 | 150 | else if((__HANDLE__)->Instance == USART2) \ |
<> | 144:ef7eb2e8f9f7 | 151 | { \ |
<> | 144:ef7eb2e8f9f7 | 152 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \ |
<> | 144:ef7eb2e8f9f7 | 153 | } \ |
<> | 144:ef7eb2e8f9f7 | 154 | else \ |
<> | 144:ef7eb2e8f9f7 | 155 | { \ |
<> | 144:ef7eb2e8f9f7 | 156 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \ |
<> | 144:ef7eb2e8f9f7 | 157 | } \ |
<> | 144:ef7eb2e8f9f7 | 158 | } while(0) |
<> | 144:ef7eb2e8f9f7 | 159 | #elif defined(STM32F071xB) || defined(STM32F072xB) || defined(STM32F078xx) |
<> | 144:ef7eb2e8f9f7 | 160 | #define IRDA_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ |
<> | 144:ef7eb2e8f9f7 | 161 | do { \ |
<> | 144:ef7eb2e8f9f7 | 162 | if((__HANDLE__)->Instance == USART1) \ |
<> | 144:ef7eb2e8f9f7 | 163 | { \ |
<> | 144:ef7eb2e8f9f7 | 164 | switch(__HAL_RCC_GET_USART1_SOURCE()) \ |
<> | 144:ef7eb2e8f9f7 | 165 | { \ |
<> | 144:ef7eb2e8f9f7 | 166 | case RCC_USART1CLKSOURCE_PCLK1: \ |
<> | 144:ef7eb2e8f9f7 | 167 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \ |
<> | 144:ef7eb2e8f9f7 | 168 | break; \ |
<> | 144:ef7eb2e8f9f7 | 169 | case RCC_USART1CLKSOURCE_HSI: \ |
<> | 144:ef7eb2e8f9f7 | 170 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \ |
<> | 144:ef7eb2e8f9f7 | 171 | break; \ |
<> | 144:ef7eb2e8f9f7 | 172 | case RCC_USART1CLKSOURCE_SYSCLK: \ |
<> | 144:ef7eb2e8f9f7 | 173 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \ |
<> | 144:ef7eb2e8f9f7 | 174 | break; \ |
<> | 144:ef7eb2e8f9f7 | 175 | case RCC_USART1CLKSOURCE_LSE: \ |
<> | 144:ef7eb2e8f9f7 | 176 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \ |
<> | 144:ef7eb2e8f9f7 | 177 | break; \ |
<> | 144:ef7eb2e8f9f7 | 178 | default: \ |
<> | 144:ef7eb2e8f9f7 | 179 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \ |
<> | 144:ef7eb2e8f9f7 | 180 | break; \ |
<> | 144:ef7eb2e8f9f7 | 181 | } \ |
<> | 144:ef7eb2e8f9f7 | 182 | } \ |
<> | 144:ef7eb2e8f9f7 | 183 | else if((__HANDLE__)->Instance == USART2) \ |
<> | 144:ef7eb2e8f9f7 | 184 | { \ |
<> | 144:ef7eb2e8f9f7 | 185 | switch(__HAL_RCC_GET_USART2_SOURCE()) \ |
<> | 144:ef7eb2e8f9f7 | 186 | { \ |
<> | 144:ef7eb2e8f9f7 | 187 | case RCC_USART2CLKSOURCE_PCLK1: \ |
<> | 144:ef7eb2e8f9f7 | 188 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \ |
<> | 144:ef7eb2e8f9f7 | 189 | break; \ |
<> | 144:ef7eb2e8f9f7 | 190 | case RCC_USART2CLKSOURCE_HSI: \ |
<> | 144:ef7eb2e8f9f7 | 191 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \ |
<> | 144:ef7eb2e8f9f7 | 192 | break; \ |
<> | 144:ef7eb2e8f9f7 | 193 | case RCC_USART2CLKSOURCE_SYSCLK: \ |
<> | 144:ef7eb2e8f9f7 | 194 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \ |
<> | 144:ef7eb2e8f9f7 | 195 | break; \ |
<> | 144:ef7eb2e8f9f7 | 196 | case RCC_USART2CLKSOURCE_LSE: \ |
<> | 144:ef7eb2e8f9f7 | 197 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \ |
<> | 144:ef7eb2e8f9f7 | 198 | break; \ |
<> | 144:ef7eb2e8f9f7 | 199 | default: \ |
<> | 144:ef7eb2e8f9f7 | 200 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \ |
<> | 144:ef7eb2e8f9f7 | 201 | break; \ |
<> | 144:ef7eb2e8f9f7 | 202 | } \ |
<> | 144:ef7eb2e8f9f7 | 203 | } \ |
<> | 144:ef7eb2e8f9f7 | 204 | else if((__HANDLE__)->Instance == USART3) \ |
<> | 144:ef7eb2e8f9f7 | 205 | { \ |
<> | 144:ef7eb2e8f9f7 | 206 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \ |
<> | 144:ef7eb2e8f9f7 | 207 | } \ |
<> | 144:ef7eb2e8f9f7 | 208 | else if((__HANDLE__)->Instance == USART4) \ |
<> | 144:ef7eb2e8f9f7 | 209 | { \ |
<> | 144:ef7eb2e8f9f7 | 210 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \ |
<> | 144:ef7eb2e8f9f7 | 211 | } \ |
<> | 144:ef7eb2e8f9f7 | 212 | else \ |
<> | 144:ef7eb2e8f9f7 | 213 | { \ |
<> | 144:ef7eb2e8f9f7 | 214 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \ |
<> | 144:ef7eb2e8f9f7 | 215 | } \ |
<> | 144:ef7eb2e8f9f7 | 216 | } while(0) |
<> | 144:ef7eb2e8f9f7 | 217 | #elif defined(STM32F091xC) || defined(STM32F098xx) |
<> | 144:ef7eb2e8f9f7 | 218 | #define IRDA_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ |
<> | 144:ef7eb2e8f9f7 | 219 | do { \ |
<> | 144:ef7eb2e8f9f7 | 220 | if((__HANDLE__)->Instance == USART1) \ |
<> | 144:ef7eb2e8f9f7 | 221 | { \ |
<> | 144:ef7eb2e8f9f7 | 222 | switch(__HAL_RCC_GET_USART1_SOURCE()) \ |
<> | 144:ef7eb2e8f9f7 | 223 | { \ |
<> | 144:ef7eb2e8f9f7 | 224 | case RCC_USART1CLKSOURCE_PCLK1: \ |
<> | 144:ef7eb2e8f9f7 | 225 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \ |
<> | 144:ef7eb2e8f9f7 | 226 | break; \ |
<> | 144:ef7eb2e8f9f7 | 227 | case RCC_USART1CLKSOURCE_HSI: \ |
<> | 144:ef7eb2e8f9f7 | 228 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \ |
<> | 144:ef7eb2e8f9f7 | 229 | break; \ |
<> | 144:ef7eb2e8f9f7 | 230 | case RCC_USART1CLKSOURCE_SYSCLK: \ |
<> | 144:ef7eb2e8f9f7 | 231 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \ |
<> | 144:ef7eb2e8f9f7 | 232 | break; \ |
<> | 144:ef7eb2e8f9f7 | 233 | case RCC_USART1CLKSOURCE_LSE: \ |
<> | 144:ef7eb2e8f9f7 | 234 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \ |
<> | 144:ef7eb2e8f9f7 | 235 | break; \ |
<> | 144:ef7eb2e8f9f7 | 236 | default: \ |
<> | 144:ef7eb2e8f9f7 | 237 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \ |
<> | 144:ef7eb2e8f9f7 | 238 | break; \ |
<> | 144:ef7eb2e8f9f7 | 239 | } \ |
<> | 144:ef7eb2e8f9f7 | 240 | } \ |
<> | 144:ef7eb2e8f9f7 | 241 | else if((__HANDLE__)->Instance == USART2) \ |
<> | 144:ef7eb2e8f9f7 | 242 | { \ |
<> | 144:ef7eb2e8f9f7 | 243 | switch(__HAL_RCC_GET_USART2_SOURCE()) \ |
<> | 144:ef7eb2e8f9f7 | 244 | { \ |
<> | 144:ef7eb2e8f9f7 | 245 | case RCC_USART2CLKSOURCE_PCLK1: \ |
<> | 144:ef7eb2e8f9f7 | 246 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \ |
<> | 144:ef7eb2e8f9f7 | 247 | break; \ |
<> | 144:ef7eb2e8f9f7 | 248 | case RCC_USART2CLKSOURCE_HSI: \ |
<> | 144:ef7eb2e8f9f7 | 249 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \ |
<> | 144:ef7eb2e8f9f7 | 250 | break; \ |
<> | 144:ef7eb2e8f9f7 | 251 | case RCC_USART2CLKSOURCE_SYSCLK: \ |
<> | 144:ef7eb2e8f9f7 | 252 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \ |
<> | 144:ef7eb2e8f9f7 | 253 | break; \ |
<> | 144:ef7eb2e8f9f7 | 254 | case RCC_USART2CLKSOURCE_LSE: \ |
<> | 144:ef7eb2e8f9f7 | 255 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \ |
<> | 144:ef7eb2e8f9f7 | 256 | break; \ |
<> | 144:ef7eb2e8f9f7 | 257 | default: \ |
<> | 144:ef7eb2e8f9f7 | 258 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \ |
<> | 144:ef7eb2e8f9f7 | 259 | break; \ |
<> | 144:ef7eb2e8f9f7 | 260 | } \ |
<> | 144:ef7eb2e8f9f7 | 261 | } \ |
<> | 144:ef7eb2e8f9f7 | 262 | else if((__HANDLE__)->Instance == USART3) \ |
<> | 144:ef7eb2e8f9f7 | 263 | { \ |
<> | 144:ef7eb2e8f9f7 | 264 | switch(__HAL_RCC_GET_USART3_SOURCE()) \ |
<> | 144:ef7eb2e8f9f7 | 265 | { \ |
<> | 144:ef7eb2e8f9f7 | 266 | case RCC_USART3CLKSOURCE_PCLK1: \ |
<> | 144:ef7eb2e8f9f7 | 267 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \ |
<> | 144:ef7eb2e8f9f7 | 268 | break; \ |
<> | 144:ef7eb2e8f9f7 | 269 | case RCC_USART3CLKSOURCE_HSI: \ |
<> | 144:ef7eb2e8f9f7 | 270 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \ |
<> | 144:ef7eb2e8f9f7 | 271 | break; \ |
<> | 144:ef7eb2e8f9f7 | 272 | case RCC_USART3CLKSOURCE_SYSCLK: \ |
<> | 144:ef7eb2e8f9f7 | 273 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \ |
<> | 144:ef7eb2e8f9f7 | 274 | break; \ |
<> | 144:ef7eb2e8f9f7 | 275 | case RCC_USART3CLKSOURCE_LSE: \ |
<> | 144:ef7eb2e8f9f7 | 276 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \ |
<> | 144:ef7eb2e8f9f7 | 277 | break; \ |
<> | 144:ef7eb2e8f9f7 | 278 | default: \ |
<> | 144:ef7eb2e8f9f7 | 279 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \ |
<> | 144:ef7eb2e8f9f7 | 280 | break; \ |
<> | 144:ef7eb2e8f9f7 | 281 | } \ |
<> | 144:ef7eb2e8f9f7 | 282 | } \ |
<> | 144:ef7eb2e8f9f7 | 283 | else if((__HANDLE__)->Instance == USART4) \ |
<> | 144:ef7eb2e8f9f7 | 284 | { \ |
<> | 144:ef7eb2e8f9f7 | 285 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \ |
<> | 144:ef7eb2e8f9f7 | 286 | } \ |
<> | 144:ef7eb2e8f9f7 | 287 | else if((__HANDLE__)->Instance == USART5) \ |
<> | 144:ef7eb2e8f9f7 | 288 | { \ |
<> | 144:ef7eb2e8f9f7 | 289 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \ |
<> | 144:ef7eb2e8f9f7 | 290 | } \ |
<> | 144:ef7eb2e8f9f7 | 291 | else if((__HANDLE__)->Instance == USART6) \ |
<> | 144:ef7eb2e8f9f7 | 292 | { \ |
<> | 144:ef7eb2e8f9f7 | 293 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \ |
<> | 144:ef7eb2e8f9f7 | 294 | } \ |
<> | 144:ef7eb2e8f9f7 | 295 | else if((__HANDLE__)->Instance == USART7) \ |
<> | 144:ef7eb2e8f9f7 | 296 | { \ |
<> | 144:ef7eb2e8f9f7 | 297 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \ |
<> | 144:ef7eb2e8f9f7 | 298 | } \ |
<> | 144:ef7eb2e8f9f7 | 299 | else if((__HANDLE__)->Instance == USART8) \ |
<> | 144:ef7eb2e8f9f7 | 300 | { \ |
<> | 144:ef7eb2e8f9f7 | 301 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \ |
<> | 144:ef7eb2e8f9f7 | 302 | } \ |
<> | 144:ef7eb2e8f9f7 | 303 | else \ |
<> | 144:ef7eb2e8f9f7 | 304 | { \ |
<> | 144:ef7eb2e8f9f7 | 305 | (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \ |
<> | 144:ef7eb2e8f9f7 | 306 | } \ |
<> | 144:ef7eb2e8f9f7 | 307 | } while(0) |
<> | 144:ef7eb2e8f9f7 | 308 | |
<> | 144:ef7eb2e8f9f7 | 309 | #endif /* defined(STM32F031x6) || defined(STM32F038xx) */ |
<> | 144:ef7eb2e8f9f7 | 310 | |
<> | 144:ef7eb2e8f9f7 | 311 | |
<> | 144:ef7eb2e8f9f7 | 312 | /** @brief Compute the mask to apply to retrieve the received data |
<> | 144:ef7eb2e8f9f7 | 313 | * according to the word length and to the parity bits activation. |
<> | 144:ef7eb2e8f9f7 | 314 | * @note If PCE = 1, the parity bit is not included in the data extracted |
<> | 144:ef7eb2e8f9f7 | 315 | * by the reception API(). |
<> | 144:ef7eb2e8f9f7 | 316 | * This masking operation is not carried out in the case of |
<> | 144:ef7eb2e8f9f7 | 317 | * DMA transfers. |
<> | 144:ef7eb2e8f9f7 | 318 | * @param __HANDLE__: specifies the IRDA Handle |
<> | 144:ef7eb2e8f9f7 | 319 | * @retval None, the mask to apply to IRDA RDR register is stored in (__HANDLE__)->Mask field. |
<> | 144:ef7eb2e8f9f7 | 320 | */ |
<> | 144:ef7eb2e8f9f7 | 321 | #if defined (STM32F042x6) || defined (STM32F048xx) || \ |
<> | 144:ef7eb2e8f9f7 | 322 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ |
<> | 144:ef7eb2e8f9f7 | 323 | defined (STM32F091xC) || defined (STM32F098xx) |
<> | 144:ef7eb2e8f9f7 | 324 | #define IRDA_MASK_COMPUTATION(__HANDLE__) \ |
<> | 144:ef7eb2e8f9f7 | 325 | do { \ |
<> | 144:ef7eb2e8f9f7 | 326 | if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_9B) \ |
<> | 144:ef7eb2e8f9f7 | 327 | { \ |
<> | 144:ef7eb2e8f9f7 | 328 | if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE) \ |
<> | 144:ef7eb2e8f9f7 | 329 | { \ |
<> | 144:ef7eb2e8f9f7 | 330 | (__HANDLE__)->Mask = 0x01FF ; \ |
<> | 144:ef7eb2e8f9f7 | 331 | } \ |
<> | 144:ef7eb2e8f9f7 | 332 | else \ |
<> | 144:ef7eb2e8f9f7 | 333 | { \ |
<> | 144:ef7eb2e8f9f7 | 334 | (__HANDLE__)->Mask = 0x00FF ; \ |
<> | 144:ef7eb2e8f9f7 | 335 | } \ |
<> | 144:ef7eb2e8f9f7 | 336 | } \ |
<> | 144:ef7eb2e8f9f7 | 337 | else if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_8B) \ |
<> | 144:ef7eb2e8f9f7 | 338 | { \ |
<> | 144:ef7eb2e8f9f7 | 339 | if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE) \ |
<> | 144:ef7eb2e8f9f7 | 340 | { \ |
<> | 144:ef7eb2e8f9f7 | 341 | (__HANDLE__)->Mask = 0x00FF ; \ |
<> | 144:ef7eb2e8f9f7 | 342 | } \ |
<> | 144:ef7eb2e8f9f7 | 343 | else \ |
<> | 144:ef7eb2e8f9f7 | 344 | { \ |
<> | 144:ef7eb2e8f9f7 | 345 | (__HANDLE__)->Mask = 0x007F ; \ |
<> | 144:ef7eb2e8f9f7 | 346 | } \ |
<> | 144:ef7eb2e8f9f7 | 347 | } \ |
<> | 144:ef7eb2e8f9f7 | 348 | else if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_7B) \ |
<> | 144:ef7eb2e8f9f7 | 349 | { \ |
<> | 144:ef7eb2e8f9f7 | 350 | if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE) \ |
<> | 144:ef7eb2e8f9f7 | 351 | { \ |
<> | 144:ef7eb2e8f9f7 | 352 | (__HANDLE__)->Mask = 0x007F ; \ |
<> | 144:ef7eb2e8f9f7 | 353 | } \ |
<> | 144:ef7eb2e8f9f7 | 354 | else \ |
<> | 144:ef7eb2e8f9f7 | 355 | { \ |
<> | 144:ef7eb2e8f9f7 | 356 | (__HANDLE__)->Mask = 0x003F ; \ |
<> | 144:ef7eb2e8f9f7 | 357 | } \ |
<> | 144:ef7eb2e8f9f7 | 358 | } \ |
<> | 144:ef7eb2e8f9f7 | 359 | } while(0) |
<> | 144:ef7eb2e8f9f7 | 360 | #else |
<> | 144:ef7eb2e8f9f7 | 361 | #define IRDA_MASK_COMPUTATION(__HANDLE__) \ |
<> | 144:ef7eb2e8f9f7 | 362 | do { \ |
<> | 144:ef7eb2e8f9f7 | 363 | if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_9B) \ |
<> | 144:ef7eb2e8f9f7 | 364 | { \ |
<> | 144:ef7eb2e8f9f7 | 365 | if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE) \ |
<> | 144:ef7eb2e8f9f7 | 366 | { \ |
<> | 144:ef7eb2e8f9f7 | 367 | (__HANDLE__)->Mask = 0x01FF ; \ |
<> | 144:ef7eb2e8f9f7 | 368 | } \ |
<> | 144:ef7eb2e8f9f7 | 369 | else \ |
<> | 144:ef7eb2e8f9f7 | 370 | { \ |
<> | 144:ef7eb2e8f9f7 | 371 | (__HANDLE__)->Mask = 0x00FF ; \ |
<> | 144:ef7eb2e8f9f7 | 372 | } \ |
<> | 144:ef7eb2e8f9f7 | 373 | } \ |
<> | 144:ef7eb2e8f9f7 | 374 | else if ((__HANDLE__)->Init.WordLength == IRDA_WORDLENGTH_8B) \ |
<> | 144:ef7eb2e8f9f7 | 375 | { \ |
<> | 144:ef7eb2e8f9f7 | 376 | if ((__HANDLE__)->Init.Parity == IRDA_PARITY_NONE) \ |
<> | 144:ef7eb2e8f9f7 | 377 | { \ |
<> | 144:ef7eb2e8f9f7 | 378 | (__HANDLE__)->Mask = 0x00FF ; \ |
<> | 144:ef7eb2e8f9f7 | 379 | } \ |
<> | 144:ef7eb2e8f9f7 | 380 | else \ |
<> | 144:ef7eb2e8f9f7 | 381 | { \ |
<> | 144:ef7eb2e8f9f7 | 382 | (__HANDLE__)->Mask = 0x007F ; \ |
<> | 144:ef7eb2e8f9f7 | 383 | } \ |
<> | 144:ef7eb2e8f9f7 | 384 | } \ |
<> | 144:ef7eb2e8f9f7 | 385 | } while(0) |
<> | 144:ef7eb2e8f9f7 | 386 | #endif /* defined (STM32F042x6) || defined (STM32F048xx) || \ |
<> | 144:ef7eb2e8f9f7 | 387 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ |
<> | 144:ef7eb2e8f9f7 | 388 | defined (STM32F091xC) || defined(STM32F098xx) */ |
<> | 144:ef7eb2e8f9f7 | 389 | |
<> | 144:ef7eb2e8f9f7 | 390 | /** |
<> | 144:ef7eb2e8f9f7 | 391 | * @brief Ensure that IRDA frame length is valid. |
<> | 144:ef7eb2e8f9f7 | 392 | * @param __LENGTH__: IRDA frame length. |
<> | 144:ef7eb2e8f9f7 | 393 | * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) |
<> | 144:ef7eb2e8f9f7 | 394 | */ |
<> | 144:ef7eb2e8f9f7 | 395 | #if defined (STM32F042x6) || defined (STM32F048xx) || \ |
<> | 144:ef7eb2e8f9f7 | 396 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ |
<> | 144:ef7eb2e8f9f7 | 397 | defined (STM32F091xC) || defined (STM32F098xx) |
<> | 144:ef7eb2e8f9f7 | 398 | #define IS_IRDA_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == IRDA_WORDLENGTH_7B) || \ |
<> | 144:ef7eb2e8f9f7 | 399 | ((__LENGTH__) == IRDA_WORDLENGTH_8B) || \ |
<> | 144:ef7eb2e8f9f7 | 400 | ((__LENGTH__) == IRDA_WORDLENGTH_9B)) |
<> | 144:ef7eb2e8f9f7 | 401 | #else |
<> | 144:ef7eb2e8f9f7 | 402 | #define IS_IRDA_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == IRDA_WORDLENGTH_8B) || \ |
<> | 144:ef7eb2e8f9f7 | 403 | ((__LENGTH__) == IRDA_WORDLENGTH_9B)) |
<> | 144:ef7eb2e8f9f7 | 404 | #endif /* defined (STM32F042x6) || defined (STM32F048xx) || \ |
<> | 144:ef7eb2e8f9f7 | 405 | defined (STM32F071xB) || defined (STM32F072xB) || defined (STM32F078xx) || \ |
<> | 144:ef7eb2e8f9f7 | 406 | defined (STM32F091xC) || defined (STM32F098xx)*/ |
<> | 144:ef7eb2e8f9f7 | 407 | |
<> | 144:ef7eb2e8f9f7 | 408 | /** |
<> | 144:ef7eb2e8f9f7 | 409 | * @} |
<> | 144:ef7eb2e8f9f7 | 410 | */ |
<> | 144:ef7eb2e8f9f7 | 411 | |
<> | 144:ef7eb2e8f9f7 | 412 | /* Exported functions --------------------------------------------------------*/ |
<> | 144:ef7eb2e8f9f7 | 413 | |
<> | 144:ef7eb2e8f9f7 | 414 | /** |
<> | 144:ef7eb2e8f9f7 | 415 | * @} |
<> | 144:ef7eb2e8f9f7 | 416 | */ |
<> | 144:ef7eb2e8f9f7 | 417 | |
<> | 144:ef7eb2e8f9f7 | 418 | /** |
<> | 144:ef7eb2e8f9f7 | 419 | * @} |
<> | 144:ef7eb2e8f9f7 | 420 | */ |
<> | 144:ef7eb2e8f9f7 | 421 | |
<> | 144:ef7eb2e8f9f7 | 422 | #endif /* !defined(STM32F030x6) && !defined(STM32F030x8) && !defined(STM32F070x6) && !defined(STM32F070xB) && !defined(STM32F030xC) */ |
<> | 144:ef7eb2e8f9f7 | 423 | |
<> | 144:ef7eb2e8f9f7 | 424 | #ifdef __cplusplus |
<> | 144:ef7eb2e8f9f7 | 425 | } |
<> | 144:ef7eb2e8f9f7 | 426 | #endif |
<> | 144:ef7eb2e8f9f7 | 427 | |
<> | 144:ef7eb2e8f9f7 | 428 | #endif /* __STM32F0xx_HAL_IRDA_EX_H */ |
<> | 144:ef7eb2e8f9f7 | 429 | |
<> | 144:ef7eb2e8f9f7 | 430 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |
<> | 144:ef7eb2e8f9f7 | 431 |