mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device/TOOLCHAIN_IAR/startup_stm32f091xc.S@149:156823d33999, 2016-10-28 (annotated)

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
Parent:
targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/TOOLCHAIN_IAR/startup_stm32f091xc.S@144:ef7eb2e8f9f7
Child:
180:96ed750bd169
This updates the lib to the mbed lib v128



NOTE: This release includes a restructuring of the file and directory locations and thus some

include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 ;******************** (C) COPYRIGHT 2014 STMicroelectronics ********************
<> 144:ef7eb2e8f9f7 2 ;* File Name : startup_stm32f091xc.s
<> 144:ef7eb2e8f9f7 3 ;* Author : MCD Application Team
<> 144:ef7eb2e8f9f7 4 ;* Version : V2.1.0
<> 144:ef7eb2e8f9f7 5 ;* Date : 03-Oct-2014
<> 144:ef7eb2e8f9f7 6 ;* Description : STM32F091xc/STM32F098xc devices vector table for EWARM toolchain.
<> 144:ef7eb2e8f9f7 7 ;* This module performs:
<> 144:ef7eb2e8f9f7 8 ;* - Set the initial SP
<> 144:ef7eb2e8f9f7 9 ;* - Set the initial PC == __iar_program_start,
<> 144:ef7eb2e8f9f7 10 ;* - Set the vector table entries with the exceptions ISR
<> 144:ef7eb2e8f9f7 11 ;* address,
<> 144:ef7eb2e8f9f7 12 ;* - Branches to main in the C library (which eventually
<> 144:ef7eb2e8f9f7 13 ;* calls main()).
<> 144:ef7eb2e8f9f7 14 ;* After Reset the Cortex-M0 processor is in Thread mode,
<> 144:ef7eb2e8f9f7 15 ;* priority is Privileged, and the Stack is set to Main.
<> 144:ef7eb2e8f9f7 16 ;*******************************************************************************
<> 144:ef7eb2e8f9f7 17 ;*
<> 144:ef7eb2e8f9f7 18 ;* <h2><center>&copy; COPYRIGHT(c) 2014 STMicroelectronics</center></h2>
<> 144:ef7eb2e8f9f7 19 ;*
<> 144:ef7eb2e8f9f7 20 ;* Redistribution and use in source and binary forms, with or without modification,
<> 144:ef7eb2e8f9f7 21 ;* are permitted provided that the following conditions are met:
<> 144:ef7eb2e8f9f7 22 ;* 1. Redistributions of source code must retain the above copyright notice,
<> 144:ef7eb2e8f9f7 23 ;* this list of conditions and the following disclaimer.
<> 144:ef7eb2e8f9f7 24 ;* 2. Redistributions in binary form must reproduce the above copyright notice,
<> 144:ef7eb2e8f9f7 25 ;* this list of conditions and the following disclaimer in the documentation
<> 144:ef7eb2e8f9f7 26 ;* and/or other materials provided with the distribution.
<> 144:ef7eb2e8f9f7 27 ;* 3. Neither the name of STMicroelectronics nor the names of its contributors
<> 144:ef7eb2e8f9f7 28 ;* may be used to endorse or promote products derived from this software
<> 144:ef7eb2e8f9f7 29 ;* without specific prior written permission.
<> 144:ef7eb2e8f9f7 30 ;*
<> 144:ef7eb2e8f9f7 31 ;* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
<> 144:ef7eb2e8f9f7 32 ;* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
<> 144:ef7eb2e8f9f7 33 ;* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
<> 144:ef7eb2e8f9f7 34 ;* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
<> 144:ef7eb2e8f9f7 35 ;* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
<> 144:ef7eb2e8f9f7 36 ;* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
<> 144:ef7eb2e8f9f7 37 ;* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
<> 144:ef7eb2e8f9f7 38 ;* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
<> 144:ef7eb2e8f9f7 39 ;* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
<> 144:ef7eb2e8f9f7 40 ;* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
<> 144:ef7eb2e8f9f7 41 ;*
<> 144:ef7eb2e8f9f7 42 ;*******************************************************************************
<> 144:ef7eb2e8f9f7 43 ;
<> 144:ef7eb2e8f9f7 44 ;
<> 144:ef7eb2e8f9f7 45 ; The modules in this file are included in the libraries, and may be replaced
<> 144:ef7eb2e8f9f7 46 ; by any user-defined modules that define the PUBLIC symbol _program_start or
<> 144:ef7eb2e8f9f7 47 ; a user defined start symbol.
<> 144:ef7eb2e8f9f7 48 ; To override the cstartup defined in the library, simply add your modified
<> 144:ef7eb2e8f9f7 49 ; version to the workbench project.
<> 144:ef7eb2e8f9f7 50 ;
<> 144:ef7eb2e8f9f7 51 ; The vector table is normally located at address 0.
<> 144:ef7eb2e8f9f7 52 ; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
<> 144:ef7eb2e8f9f7 53 ; The name "__vector_table" has special meaning for C-SPY:
<> 144:ef7eb2e8f9f7 54 ; it is where the SP start value is found, and the NVIC vector
<> 144:ef7eb2e8f9f7 55 ; table register (VTOR) is initialized to this address if != 0.
<> 144:ef7eb2e8f9f7 56 ;
<> 144:ef7eb2e8f9f7 57 ; Cortex-M version
<> 144:ef7eb2e8f9f7 58 ;
<> 144:ef7eb2e8f9f7 59
<> 144:ef7eb2e8f9f7 60 MODULE ?cstartup
<> 144:ef7eb2e8f9f7 61
<> 144:ef7eb2e8f9f7 62 ;; Forward declaration of sections.
<> 144:ef7eb2e8f9f7 63 SECTION CSTACK:DATA:NOROOT(3)
<> 144:ef7eb2e8f9f7 64
<> 144:ef7eb2e8f9f7 65 SECTION .intvec:CODE:NOROOT(2)
<> 144:ef7eb2e8f9f7 66
<> 144:ef7eb2e8f9f7 67 EXTERN __iar_program_start
<> 144:ef7eb2e8f9f7 68 EXTERN SystemInit
<> 144:ef7eb2e8f9f7 69 PUBLIC __vector_table
<> 144:ef7eb2e8f9f7 70
<> 144:ef7eb2e8f9f7 71 DATA
<> 144:ef7eb2e8f9f7 72 __vector_table
<> 144:ef7eb2e8f9f7 73 DCD sfe(CSTACK)
<> 144:ef7eb2e8f9f7 74 DCD Reset_Handler ; Reset Handler
<> 144:ef7eb2e8f9f7 75
<> 144:ef7eb2e8f9f7 76 DCD NMI_Handler ; NMI Handler
<> 144:ef7eb2e8f9f7 77 DCD HardFault_Handler ; Hard Fault Handler
<> 144:ef7eb2e8f9f7 78 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 79 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 80 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 81 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 82 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 83 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 84 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 85 DCD SVC_Handler ; SVCall Handler
<> 144:ef7eb2e8f9f7 86 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 87 DCD 0 ; Reserved
<> 144:ef7eb2e8f9f7 88 DCD PendSV_Handler ; PendSV Handler
<> 144:ef7eb2e8f9f7 89 DCD SysTick_Handler ; SysTick Handler
<> 144:ef7eb2e8f9f7 90
<> 144:ef7eb2e8f9f7 91 ; External Interrupts
<> 144:ef7eb2e8f9f7 92 DCD WWDG_IRQHandler ; Window Watchdog
<> 144:ef7eb2e8f9f7 93 DCD PVD_VDDIO2_IRQHandler ; PVD and VDDIO2 through EXTI Line detect
<> 144:ef7eb2e8f9f7 94 DCD RTC_IRQHandler ; RTC through EXTI Line
<> 144:ef7eb2e8f9f7 95 DCD FLASH_IRQHandler ; FLASH
<> 144:ef7eb2e8f9f7 96 DCD RCC_CRS_IRQHandler ; RCC and CRS
<> 144:ef7eb2e8f9f7 97 DCD EXTI0_1_IRQHandler ; EXTI Line 0 and 1
<> 144:ef7eb2e8f9f7 98 DCD EXTI2_3_IRQHandler ; EXTI Line 2 and 3
<> 144:ef7eb2e8f9f7 99 DCD EXTI4_15_IRQHandler ; EXTI Line 4 to 15
<> 144:ef7eb2e8f9f7 100 DCD TSC_IRQHandler ; TS
<> 144:ef7eb2e8f9f7 101 DCD DMA1_Ch1_IRQHandler ; DMA1 Channel 1
<> 144:ef7eb2e8f9f7 102 DCD DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler ; DMA1 Channel 2 and 3 & DMA2 Channel 1 and 2
<> 144:ef7eb2e8f9f7 103 DCD DMA1_Ch4_7_DMA2_Ch3_5_IRQHandler ; DMA1 Channel 4 to 7 & DMA2 Channel 3 to 5
<> 144:ef7eb2e8f9f7 104 DCD ADC1_COMP_IRQHandler ; ADC1, COMP1 and COMP2
<> 144:ef7eb2e8f9f7 105 DCD TIM1_BRK_UP_TRG_COM_IRQHandler ; TIM1 Break, Update, Trigger and Commutation
<> 144:ef7eb2e8f9f7 106 DCD TIM1_CC_IRQHandler ; TIM1 Capture Compare
<> 144:ef7eb2e8f9f7 107 DCD TIM2_IRQHandler ; TIM2
<> 144:ef7eb2e8f9f7 108 DCD TIM3_IRQHandler ; TIM3
<> 144:ef7eb2e8f9f7 109 DCD TIM6_DAC_IRQHandler ; TIM6 and DAC
<> 144:ef7eb2e8f9f7 110 DCD TIM7_IRQHandler ; TIM7
<> 144:ef7eb2e8f9f7 111 DCD TIM14_IRQHandler ; TIM14
<> 144:ef7eb2e8f9f7 112 DCD TIM15_IRQHandler ; TIM15
<> 144:ef7eb2e8f9f7 113 DCD TIM16_IRQHandler ; TIM16
<> 144:ef7eb2e8f9f7 114 DCD TIM17_IRQHandler ; TIM17
<> 144:ef7eb2e8f9f7 115 DCD I2C1_IRQHandler ; I2C1
<> 144:ef7eb2e8f9f7 116 DCD I2C2_IRQHandler ; I2C2
<> 144:ef7eb2e8f9f7 117 DCD SPI1_IRQHandler ; SPI1
<> 144:ef7eb2e8f9f7 118 DCD SPI2_IRQHandler ; SPI2
<> 144:ef7eb2e8f9f7 119 DCD USART1_IRQHandler ; USART1
<> 144:ef7eb2e8f9f7 120 DCD USART2_IRQHandler ; USART2
<> 144:ef7eb2e8f9f7 121 DCD USART3_8_IRQHandler ; USART3, USART4, USART5, USART6, USART7, USART8
<> 144:ef7eb2e8f9f7 122 DCD CEC_CAN_IRQHandler ; CEC and CAN
<> 144:ef7eb2e8f9f7 123
<> 144:ef7eb2e8f9f7 124 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
<> 144:ef7eb2e8f9f7 125 ;;
<> 144:ef7eb2e8f9f7 126 ;; Default interrupt handlers.
<> 144:ef7eb2e8f9f7 127 ;;
<> 144:ef7eb2e8f9f7 128 THUMB
<> 144:ef7eb2e8f9f7 129
<> 144:ef7eb2e8f9f7 130 PUBWEAK Reset_Handler
<> 144:ef7eb2e8f9f7 131 SECTION .text:CODE:NOROOT:REORDER(2)
<> 144:ef7eb2e8f9f7 132 Reset_Handler
<> 144:ef7eb2e8f9f7 133 LDR R0, =SystemInit
<> 144:ef7eb2e8f9f7 134 BLX R0
<> 144:ef7eb2e8f9f7 135 LDR R0, =__iar_program_start
<> 144:ef7eb2e8f9f7 136 BX R0
<> 144:ef7eb2e8f9f7 137
<> 144:ef7eb2e8f9f7 138 PUBWEAK NMI_Handler
<> 144:ef7eb2e8f9f7 139 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 140 NMI_Handler
<> 144:ef7eb2e8f9f7 141 B NMI_Handler
<> 144:ef7eb2e8f9f7 142
<> 144:ef7eb2e8f9f7 143 PUBWEAK HardFault_Handler
<> 144:ef7eb2e8f9f7 144 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 145 HardFault_Handler
<> 144:ef7eb2e8f9f7 146 B HardFault_Handler
<> 144:ef7eb2e8f9f7 147
<> 144:ef7eb2e8f9f7 148 PUBWEAK SVC_Handler
<> 144:ef7eb2e8f9f7 149 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 150 SVC_Handler
<> 144:ef7eb2e8f9f7 151 B SVC_Handler
<> 144:ef7eb2e8f9f7 152
<> 144:ef7eb2e8f9f7 153 PUBWEAK PendSV_Handler
<> 144:ef7eb2e8f9f7 154 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 155 PendSV_Handler
<> 144:ef7eb2e8f9f7 156 B PendSV_Handler
<> 144:ef7eb2e8f9f7 157
<> 144:ef7eb2e8f9f7 158 PUBWEAK SysTick_Handler
<> 144:ef7eb2e8f9f7 159 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 160 SysTick_Handler
<> 144:ef7eb2e8f9f7 161 B SysTick_Handler
<> 144:ef7eb2e8f9f7 162
<> 144:ef7eb2e8f9f7 163 PUBWEAK WWDG_IRQHandler
<> 144:ef7eb2e8f9f7 164 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 165 WWDG_IRQHandler
<> 144:ef7eb2e8f9f7 166 B WWDG_IRQHandler
<> 144:ef7eb2e8f9f7 167
<> 144:ef7eb2e8f9f7 168 PUBWEAK PVD_VDDIO2_IRQHandler
<> 144:ef7eb2e8f9f7 169 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 170 PVD_VDDIO2_IRQHandler
<> 144:ef7eb2e8f9f7 171 B PVD_VDDIO2_IRQHandler
<> 144:ef7eb2e8f9f7 172
<> 144:ef7eb2e8f9f7 173 PUBWEAK RTC_IRQHandler
<> 144:ef7eb2e8f9f7 174 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 175 RTC_IRQHandler
<> 144:ef7eb2e8f9f7 176 B RTC_IRQHandler
<> 144:ef7eb2e8f9f7 177
<> 144:ef7eb2e8f9f7 178 PUBWEAK FLASH_IRQHandler
<> 144:ef7eb2e8f9f7 179 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 180 FLASH_IRQHandler
<> 144:ef7eb2e8f9f7 181 B FLASH_IRQHandler
<> 144:ef7eb2e8f9f7 182
<> 144:ef7eb2e8f9f7 183 PUBWEAK RCC_CRS_IRQHandler
<> 144:ef7eb2e8f9f7 184 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 185 RCC_CRS_IRQHandler
<> 144:ef7eb2e8f9f7 186 B RCC_CRS_IRQHandler
<> 144:ef7eb2e8f9f7 187
<> 144:ef7eb2e8f9f7 188 PUBWEAK EXTI0_1_IRQHandler
<> 144:ef7eb2e8f9f7 189 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 190 EXTI0_1_IRQHandler
<> 144:ef7eb2e8f9f7 191 B EXTI0_1_IRQHandler
<> 144:ef7eb2e8f9f7 192
<> 144:ef7eb2e8f9f7 193 PUBWEAK EXTI2_3_IRQHandler
<> 144:ef7eb2e8f9f7 194 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 195 EXTI2_3_IRQHandler
<> 144:ef7eb2e8f9f7 196 B EXTI2_3_IRQHandler
<> 144:ef7eb2e8f9f7 197
<> 144:ef7eb2e8f9f7 198 PUBWEAK EXTI4_15_IRQHandler
<> 144:ef7eb2e8f9f7 199 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 200 EXTI4_15_IRQHandler
<> 144:ef7eb2e8f9f7 201 B EXTI4_15_IRQHandler
<> 144:ef7eb2e8f9f7 202
<> 144:ef7eb2e8f9f7 203 PUBWEAK TSC_IRQHandler
<> 144:ef7eb2e8f9f7 204 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 205 TSC_IRQHandler
<> 144:ef7eb2e8f9f7 206 B TSC_IRQHandler
<> 144:ef7eb2e8f9f7 207
<> 144:ef7eb2e8f9f7 208 PUBWEAK DMA1_Ch1_IRQHandler
<> 144:ef7eb2e8f9f7 209 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 210 DMA1_Ch1_IRQHandler
<> 144:ef7eb2e8f9f7 211 B DMA1_Ch1_IRQHandler
<> 144:ef7eb2e8f9f7 212
<> 144:ef7eb2e8f9f7 213 PUBWEAK DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler
<> 144:ef7eb2e8f9f7 214 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 215 DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler
<> 144:ef7eb2e8f9f7 216 B DMA1_Ch2_3_DMA2_Ch1_2_IRQHandler
<> 144:ef7eb2e8f9f7 217
<> 144:ef7eb2e8f9f7 218 PUBWEAK DMA1_Ch4_7_DMA2_Ch3_5_IRQHandler
<> 144:ef7eb2e8f9f7 219 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 220 DMA1_Ch4_7_DMA2_Ch3_5_IRQHandler
<> 144:ef7eb2e8f9f7 221 B DMA1_Ch4_7_DMA2_Ch3_5_IRQHandler
<> 144:ef7eb2e8f9f7 222
<> 144:ef7eb2e8f9f7 223 PUBWEAK ADC1_COMP_IRQHandler
<> 144:ef7eb2e8f9f7 224 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 225 ADC1_COMP_IRQHandler
<> 144:ef7eb2e8f9f7 226 B ADC1_COMP_IRQHandler
<> 144:ef7eb2e8f9f7 227
<> 144:ef7eb2e8f9f7 228 PUBWEAK TIM1_BRK_UP_TRG_COM_IRQHandler
<> 144:ef7eb2e8f9f7 229 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 230 TIM1_BRK_UP_TRG_COM_IRQHandler
<> 144:ef7eb2e8f9f7 231 B TIM1_BRK_UP_TRG_COM_IRQHandler
<> 144:ef7eb2e8f9f7 232
<> 144:ef7eb2e8f9f7 233 PUBWEAK TIM1_CC_IRQHandler
<> 144:ef7eb2e8f9f7 234 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 235 TIM1_CC_IRQHandler
<> 144:ef7eb2e8f9f7 236 B TIM1_CC_IRQHandler
<> 144:ef7eb2e8f9f7 237
<> 144:ef7eb2e8f9f7 238 PUBWEAK TIM2_IRQHandler
<> 144:ef7eb2e8f9f7 239 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 240 TIM2_IRQHandler
<> 144:ef7eb2e8f9f7 241 B TIM2_IRQHandler
<> 144:ef7eb2e8f9f7 242
<> 144:ef7eb2e8f9f7 243 PUBWEAK TIM3_IRQHandler
<> 144:ef7eb2e8f9f7 244 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 245 TIM3_IRQHandler
<> 144:ef7eb2e8f9f7 246 B TIM3_IRQHandler
<> 144:ef7eb2e8f9f7 247
<> 144:ef7eb2e8f9f7 248 PUBWEAK TIM6_DAC_IRQHandler
<> 144:ef7eb2e8f9f7 249 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 250 TIM6_DAC_IRQHandler
<> 144:ef7eb2e8f9f7 251 B TIM6_DAC_IRQHandler
<> 144:ef7eb2e8f9f7 252
<> 144:ef7eb2e8f9f7 253 PUBWEAK TIM7_IRQHandler
<> 144:ef7eb2e8f9f7 254 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 255 TIM7_IRQHandler
<> 144:ef7eb2e8f9f7 256 B TIM7_IRQHandler
<> 144:ef7eb2e8f9f7 257
<> 144:ef7eb2e8f9f7 258 PUBWEAK TIM14_IRQHandler
<> 144:ef7eb2e8f9f7 259 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 260 TIM14_IRQHandler
<> 144:ef7eb2e8f9f7 261 B TIM14_IRQHandler
<> 144:ef7eb2e8f9f7 262
<> 144:ef7eb2e8f9f7 263 PUBWEAK TIM15_IRQHandler
<> 144:ef7eb2e8f9f7 264 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 265 TIM15_IRQHandler
<> 144:ef7eb2e8f9f7 266 B TIM15_IRQHandler
<> 144:ef7eb2e8f9f7 267
<> 144:ef7eb2e8f9f7 268 PUBWEAK TIM16_IRQHandler
<> 144:ef7eb2e8f9f7 269 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 270 TIM16_IRQHandler
<> 144:ef7eb2e8f9f7 271 B TIM16_IRQHandler
<> 144:ef7eb2e8f9f7 272
<> 144:ef7eb2e8f9f7 273 PUBWEAK TIM17_IRQHandler
<> 144:ef7eb2e8f9f7 274 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 275 TIM17_IRQHandler
<> 144:ef7eb2e8f9f7 276 B TIM17_IRQHandler
<> 144:ef7eb2e8f9f7 277
<> 144:ef7eb2e8f9f7 278 PUBWEAK I2C1_IRQHandler
<> 144:ef7eb2e8f9f7 279 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 280 I2C1_IRQHandler
<> 144:ef7eb2e8f9f7 281 B I2C1_IRQHandler
<> 144:ef7eb2e8f9f7 282
<> 144:ef7eb2e8f9f7 283 PUBWEAK I2C2_IRQHandler
<> 144:ef7eb2e8f9f7 284 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 285 I2C2_IRQHandler
<> 144:ef7eb2e8f9f7 286 B I2C2_IRQHandler
<> 144:ef7eb2e8f9f7 287
<> 144:ef7eb2e8f9f7 288 PUBWEAK SPI1_IRQHandler
<> 144:ef7eb2e8f9f7 289 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 290 SPI1_IRQHandler
<> 144:ef7eb2e8f9f7 291 B SPI1_IRQHandler
<> 144:ef7eb2e8f9f7 292
<> 144:ef7eb2e8f9f7 293 PUBWEAK SPI2_IRQHandler
<> 144:ef7eb2e8f9f7 294 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 295 SPI2_IRQHandler
<> 144:ef7eb2e8f9f7 296 B SPI2_IRQHandler
<> 144:ef7eb2e8f9f7 297
<> 144:ef7eb2e8f9f7 298 PUBWEAK USART1_IRQHandler
<> 144:ef7eb2e8f9f7 299 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 300 USART1_IRQHandler
<> 144:ef7eb2e8f9f7 301 B USART1_IRQHandler
<> 144:ef7eb2e8f9f7 302
<> 144:ef7eb2e8f9f7 303 PUBWEAK USART2_IRQHandler
<> 144:ef7eb2e8f9f7 304 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 305 USART2_IRQHandler
<> 144:ef7eb2e8f9f7 306 B USART2_IRQHandler
<> 144:ef7eb2e8f9f7 307
<> 144:ef7eb2e8f9f7 308 PUBWEAK USART3_8_IRQHandler
<> 144:ef7eb2e8f9f7 309 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 310 USART3_8_IRQHandler
<> 144:ef7eb2e8f9f7 311 B USART3_8_IRQHandler
<> 144:ef7eb2e8f9f7 312
<> 144:ef7eb2e8f9f7 313 PUBWEAK CEC_CAN_IRQHandler
<> 144:ef7eb2e8f9f7 314 SECTION .text:CODE:NOROOT:REORDER(1)
<> 144:ef7eb2e8f9f7 315 CEC_CAN_IRQHandler
<> 144:ef7eb2e8f9f7 316 B CEC_CAN_IRQHandler
<> 144:ef7eb2e8f9f7 317
<> 144:ef7eb2e8f9f7 318 END
<> 144:ef7eb2e8f9f7 319 ;************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE*****