mbed official / mbed-dev

mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

targets/TARGET_Maxim/TARGET_MAX32600/device/icc_regs.h@149:156823d33999, 2016-10-28 (annotated)

Committer:
<>
Date:
Fri Oct 28 11:17:30 2016 +0100
Revision:
149:156823d33999
Parent:
targets/cmsis/TARGET_Maxim/TARGET_MAX32610/icc_regs.h@144:ef7eb2e8f9f7 
This updates the lib to the mbed lib v128



NOTE: This release includes a restructuring of the file and directory locations and thus some

include paths in your code may need updating accordingly.

Who changed what in which revision?

UserRevisionLine numberNew contents of line
<> 144:ef7eb2e8f9f7 1 /*******************************************************************************
<> 144:ef7eb2e8f9f7 2 * Copyright (C) 2015 Maxim Integrated Products, Inc., All Rights Reserved.
<> 144:ef7eb2e8f9f7 3 *
<> 144:ef7eb2e8f9f7 4 * Permission is hereby granted, free of charge, to any person obtaining a
<> 144:ef7eb2e8f9f7 5 * copy of this software and associated documentation files (the "Software"),
<> 144:ef7eb2e8f9f7 6 * to deal in the Software without restriction, including without limitation
<> 144:ef7eb2e8f9f7 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
<> 144:ef7eb2e8f9f7 8 * and/or sell copies of the Software, and to permit persons to whom the
<> 144:ef7eb2e8f9f7 9 * Software is furnished to do so, subject to the following conditions:
<> 144:ef7eb2e8f9f7 10 *
<> 144:ef7eb2e8f9f7 11 * The above copyright notice and this permission notice shall be included
<> 144:ef7eb2e8f9f7 12 * in all copies or substantial portions of the Software.
<> 144:ef7eb2e8f9f7 13 *
<> 144:ef7eb2e8f9f7 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
<> 144:ef7eb2e8f9f7 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
<> 144:ef7eb2e8f9f7 16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
<> 144:ef7eb2e8f9f7 17 * IN NO EVENT SHALL MAXIM INTEGRATED BE LIABLE FOR ANY CLAIM, DAMAGES
<> 144:ef7eb2e8f9f7 18 * OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
<> 144:ef7eb2e8f9f7 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
<> 144:ef7eb2e8f9f7 20 * OTHER DEALINGS IN THE SOFTWARE.
<> 144:ef7eb2e8f9f7 21 *
<> 144:ef7eb2e8f9f7 22 * Except as contained in this notice, the name of Maxim Integrated
<> 144:ef7eb2e8f9f7 23 * Products, Inc. shall not be used except as stated in the Maxim Integrated
<> 144:ef7eb2e8f9f7 24 * Products, Inc. Branding Policy.
<> 144:ef7eb2e8f9f7 25 *
<> 144:ef7eb2e8f9f7 26 * The mere transfer of this software does not imply any licenses
<> 144:ef7eb2e8f9f7 27 * of trade secrets, proprietary technology, copyrights, patents,
<> 144:ef7eb2e8f9f7 28 * trademarks, maskwork rights, or any other form of intellectual
<> 144:ef7eb2e8f9f7 29 * property whatsoever. Maxim Integrated Products, Inc. retains all
<> 144:ef7eb2e8f9f7 30 * ownership rights.
<> 144:ef7eb2e8f9f7 31 *******************************************************************************
<> 144:ef7eb2e8f9f7 32 */
<> 144:ef7eb2e8f9f7 33
<> 144:ef7eb2e8f9f7 34 #ifndef _MXC_ICC_REGS_H_
<> 144:ef7eb2e8f9f7 35 #define _MXC_ICC_REGS_H_
<> 144:ef7eb2e8f9f7 36
<> 144:ef7eb2e8f9f7 37 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 38 extern "C" {
<> 144:ef7eb2e8f9f7 39 #endif
<> 144:ef7eb2e8f9f7 40
<> 144:ef7eb2e8f9f7 41 #include <stdint.h>
<> 144:ef7eb2e8f9f7 42
<> 144:ef7eb2e8f9f7 43 /**
<> 144:ef7eb2e8f9f7 44 * @file icc_regs.h
<> 144:ef7eb2e8f9f7 45 * @addtogroup icc ICC
<> 144:ef7eb2e8f9f7 46 * @{
<> 144:ef7eb2e8f9f7 47 */
<> 144:ef7eb2e8f9f7 48
<> 144:ef7eb2e8f9f7 49 /* Offset Register Description
<> 144:ef7eb2e8f9f7 50 ====== =================================================== */
<> 144:ef7eb2e8f9f7 51 typedef struct {
<> 144:ef7eb2e8f9f7 52 __IO uint32_t id; /* 0x0000 Device ID Register */
<> 144:ef7eb2e8f9f7 53 __IO uint32_t mem_cfg; /* 0x0004 Memory Configuration */
<> 144:ef7eb2e8f9f7 54 __I uint32_t rsv0008[62]; /* 0x0008 */
<> 144:ef7eb2e8f9f7 55 __IO uint32_t ctrl_stat; /* 0x0100 Control and Status */
<> 144:ef7eb2e8f9f7 56 __I uint32_t rsv0104[383]; /* 0x0104 */
<> 144:ef7eb2e8f9f7 57 __IO uint32_t invdt_all; /* 0x0700 Invalidate (Clear) Cache Control */
<> 144:ef7eb2e8f9f7 58 } mxc_icc_regs_t;
<> 144:ef7eb2e8f9f7 59
<> 144:ef7eb2e8f9f7 60 /*
<> 144:ef7eb2e8f9f7 61 Register offsets for module ICC.
<> 144:ef7eb2e8f9f7 62 */
<> 144:ef7eb2e8f9f7 63 #define MXC_R_ICC_OFFS_ID ((uint32_t)0x00000000UL)
<> 144:ef7eb2e8f9f7 64 #define MXC_R_ICC_OFFS_MEM_CFG ((uint32_t)0x00000004UL)
<> 144:ef7eb2e8f9f7 65 #define MXC_R_ICC_OFFS_CTRL_STAT ((uint32_t)0x00000100UL)
<> 144:ef7eb2e8f9f7 66 #define MXC_R_ICC_OFFS_INVDT_ALL ((uint32_t)0x00000700UL)
<> 144:ef7eb2e8f9f7 67
<> 144:ef7eb2e8f9f7 68 /*
<> 144:ef7eb2e8f9f7 69 Field positions and masks for module ICC.
<> 144:ef7eb2e8f9f7 70 */
<> 144:ef7eb2e8f9f7 71 #define MXC_F_ICC_ID_RTL_VERSION_POS 0
<> 144:ef7eb2e8f9f7 72 #define MXC_F_ICC_ID_RTL_VERSION ((uint32_t)(0x0000003FUL << MXC_F_ICC_ID_RTL_VERSION_POS))
<> 144:ef7eb2e8f9f7 73 #define MXC_F_ICC_ID_PART_NUM_POS 6
<> 144:ef7eb2e8f9f7 74 #define MXC_F_ICC_ID_PART_NUM ((uint32_t)(0x0000000FUL << MXC_F_ICC_ID_PART_NUM_POS))
<> 144:ef7eb2e8f9f7 75 #define MXC_F_ICC_ID_CACHE_ID_POS 10
<> 144:ef7eb2e8f9f7 76 #define MXC_F_ICC_ID_CACHE_ID ((uint32_t)(0x0000003FUL << MXC_F_ICC_ID_CACHE_ID_POS))
<> 144:ef7eb2e8f9f7 77
<> 144:ef7eb2e8f9f7 78 #define MXC_F_ICC_MEM_CFG_CACHE_SIZE_POS 0
<> 144:ef7eb2e8f9f7 79 #define MXC_F_ICC_MEM_CFG_CACHE_SIZE ((uint32_t)(0x0000FFFFUL << MXC_F_ICC_MEM_CFG_CACHE_SIZE_POS))
<> 144:ef7eb2e8f9f7 80 #define MXC_F_ICC_MEM_CFG_MAIN_MEMORY_SIZE_POS 16
<> 144:ef7eb2e8f9f7 81 #define MXC_F_ICC_MEM_CFG_MAIN_MEMORY_SIZE ((uint32_t)(0x0000FFFFUL << MXC_F_ICC_MEM_CFG_MAIN_MEMORY_SIZE_POS))
<> 144:ef7eb2e8f9f7 82
<> 144:ef7eb2e8f9f7 83 #define MXC_F_ICC_CTRL_STAT_ENABLE_POS 0
<> 144:ef7eb2e8f9f7 84 #define MXC_F_ICC_CTRL_STAT_ENABLE ((uint32_t)(0x00000001UL << MXC_F_ICC_CTRL_STAT_ENABLE_POS))
<> 144:ef7eb2e8f9f7 85 #define MXC_F_ICC_CTRL_STAT_READY_POS 16
<> 144:ef7eb2e8f9f7 86 #define MXC_F_ICC_CTRL_STAT_READY ((uint32_t)(0x00000001UL << MXC_F_ICC_CTRL_STAT_READY_POS))
<> 144:ef7eb2e8f9f7 87
<> 144:ef7eb2e8f9f7 88 #ifdef __cplusplus
<> 144:ef7eb2e8f9f7 89 }
<> 144:ef7eb2e8f9f7 90 #endif
<> 144:ef7eb2e8f9f7 91
<> 144:ef7eb2e8f9f7 92 /**
<> 144:ef7eb2e8f9f7 93 * @}
<> 144:ef7eb2e8f9f7 94 */
<> 144:ef7eb2e8f9f7 95
<> 144:ef7eb2e8f9f7 96 #endif /* _MXC_ICC_REGS_H_ */