mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_Silicon_Labs/TARGET_EFM32/serial_api.c@184:08ed48f1de7f, 2018-04-19 (annotated)
- Committer:
- AnnaBridge
- Date:
- Thu Apr 19 17:12:19 2018 +0100
- Revision:
- 184:08ed48f1de7f
- Parent:
- 180:96ed750bd169
mbed-dev library. Release version 161
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
<> | 144:ef7eb2e8f9f7 | 1 | /***************************************************************************//** |
<> | 144:ef7eb2e8f9f7 | 2 | * @file serial_api.c |
<> | 144:ef7eb2e8f9f7 | 3 | ******************************************************************************* |
<> | 144:ef7eb2e8f9f7 | 4 | * @section License |
<> | 144:ef7eb2e8f9f7 | 5 | * <b>(C) Copyright 2015 Silicon Labs, http://www.silabs.com</b> |
<> | 144:ef7eb2e8f9f7 | 6 | ******************************************************************************* |
<> | 144:ef7eb2e8f9f7 | 7 | * |
<> | 144:ef7eb2e8f9f7 | 8 | * SPDX-License-Identifier: Apache-2.0 |
<> | 144:ef7eb2e8f9f7 | 9 | * |
<> | 144:ef7eb2e8f9f7 | 10 | * Licensed under the Apache License, Version 2.0 (the "License"); you may |
<> | 144:ef7eb2e8f9f7 | 11 | * not use this file except in compliance with the License. |
<> | 144:ef7eb2e8f9f7 | 12 | * You may obtain a copy of the License at |
<> | 144:ef7eb2e8f9f7 | 13 | * |
<> | 144:ef7eb2e8f9f7 | 14 | * http://www.apache.org/licenses/LICENSE-2.0 |
<> | 144:ef7eb2e8f9f7 | 15 | * |
<> | 144:ef7eb2e8f9f7 | 16 | * Unless required by applicable law or agreed to in writing, software |
<> | 144:ef7eb2e8f9f7 | 17 | * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT |
<> | 144:ef7eb2e8f9f7 | 18 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
<> | 144:ef7eb2e8f9f7 | 19 | * See the License for the specific language governing permissions and |
<> | 144:ef7eb2e8f9f7 | 20 | * limitations under the License. |
<> | 144:ef7eb2e8f9f7 | 21 | * |
<> | 144:ef7eb2e8f9f7 | 22 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 23 | |
<> | 144:ef7eb2e8f9f7 | 24 | #include "device.h" |
<> | 144:ef7eb2e8f9f7 | 25 | #include "clocking.h" |
<> | 144:ef7eb2e8f9f7 | 26 | #if DEVICE_SERIAL |
<> | 144:ef7eb2e8f9f7 | 27 | |
<> | 144:ef7eb2e8f9f7 | 28 | #include "mbed_assert.h" |
AnnaBridge | 184:08ed48f1de7f | 29 | #include "mbed_power_mgmt.h" |
<> | 144:ef7eb2e8f9f7 | 30 | #include "serial_api.h" |
<> | 144:ef7eb2e8f9f7 | 31 | #include "serial_api_HAL.h" |
<> | 144:ef7eb2e8f9f7 | 32 | #include <string.h> |
<> | 144:ef7eb2e8f9f7 | 33 | #include <stdbool.h> |
<> | 144:ef7eb2e8f9f7 | 34 | |
<> | 144:ef7eb2e8f9f7 | 35 | #include "pinmap.h" |
<> | 144:ef7eb2e8f9f7 | 36 | #include "pinmap_function.h" |
<> | 144:ef7eb2e8f9f7 | 37 | #include "PeripheralPins.h" |
<> | 144:ef7eb2e8f9f7 | 38 | #include "PeripheralNames.h" |
<> | 144:ef7eb2e8f9f7 | 39 | |
<> | 144:ef7eb2e8f9f7 | 40 | #include "em_usart.h" |
<> | 144:ef7eb2e8f9f7 | 41 | #include "em_leuart.h" |
<> | 144:ef7eb2e8f9f7 | 42 | #include "em_cmu.h" |
<> | 144:ef7eb2e8f9f7 | 43 | #include "em_dma.h" |
<> | 144:ef7eb2e8f9f7 | 44 | #include "dma_api_HAL.h" |
<> | 144:ef7eb2e8f9f7 | 45 | #include "dma_api.h" |
<> | 144:ef7eb2e8f9f7 | 46 | #include "sleep_api.h" |
<> | 144:ef7eb2e8f9f7 | 47 | #include "buffer.h" |
<> | 144:ef7eb2e8f9f7 | 48 | |
<> | 144:ef7eb2e8f9f7 | 49 | /** Validation of LEUART register block pointer reference |
<> | 144:ef7eb2e8f9f7 | 50 | * for assert statements. */ |
<> | 144:ef7eb2e8f9f7 | 51 | #if !defined(LEUART_COUNT) |
<> | 144:ef7eb2e8f9f7 | 52 | #define LEUART_REF_VALID(ref) (0) |
<> | 144:ef7eb2e8f9f7 | 53 | #elif (LEUART_COUNT == 1) |
<> | 144:ef7eb2e8f9f7 | 54 | #define LEUART_REF_VALID(ref) ((ref) == LEUART0) |
<> | 144:ef7eb2e8f9f7 | 55 | #elif (LEUART_COUNT == 2) |
<> | 144:ef7eb2e8f9f7 | 56 | #define LEUART_REF_VALID(ref) (((ref) == LEUART0) || ((ref) == LEUART1)) |
<> | 144:ef7eb2e8f9f7 | 57 | #else |
<> | 144:ef7eb2e8f9f7 | 58 | #error Undefined number of low energy UARTs (LEUART). |
<> | 144:ef7eb2e8f9f7 | 59 | #endif |
<> | 144:ef7eb2e8f9f7 | 60 | |
<> | 150:02e0a0aed4ec | 61 | #ifndef UART_PRESENT |
<> | 150:02e0a0aed4ec | 62 | #define UART_COUNT (0) |
<> | 150:02e0a0aed4ec | 63 | #endif |
<> | 150:02e0a0aed4ec | 64 | #ifndef USART_PRESENT |
<> | 150:02e0a0aed4ec | 65 | #define USART_COUNT (0) |
<> | 150:02e0a0aed4ec | 66 | #endif |
<> | 150:02e0a0aed4ec | 67 | #ifndef LEUART_PRESENT |
<> | 150:02e0a0aed4ec | 68 | #define LEUART_COUNT (0) |
<> | 150:02e0a0aed4ec | 69 | #endif |
<> | 150:02e0a0aed4ec | 70 | |
<> | 150:02e0a0aed4ec | 71 | #define MODULES_SIZE_SERIAL (UART_COUNT + USART_COUNT + LEUART_COUNT) |
<> | 150:02e0a0aed4ec | 72 | |
<> | 144:ef7eb2e8f9f7 | 73 | /* Store IRQ id for each UART */ |
<> | 144:ef7eb2e8f9f7 | 74 | static uint32_t serial_irq_ids[MODULES_SIZE_SERIAL] = { 0 }; |
<> | 144:ef7eb2e8f9f7 | 75 | /* Interrupt handler from mbed common */ |
<> | 144:ef7eb2e8f9f7 | 76 | static uart_irq_handler irq_handler; |
<> | 144:ef7eb2e8f9f7 | 77 | /* Keep track of incoming DMA IRQ's */ |
AnnaBridge | 179:b0033dcd6934 | 78 | static bool serial_dma_irq_fired[DMA_CHAN_COUNT] = { false }; |
<> | 144:ef7eb2e8f9f7 | 79 | |
<> | 144:ef7eb2e8f9f7 | 80 | /* Serial interface on USBTX/USBRX retargets stdio */ |
<> | 144:ef7eb2e8f9f7 | 81 | int stdio_uart_inited = 0; |
<> | 144:ef7eb2e8f9f7 | 82 | serial_t stdio_uart; |
<> | 144:ef7eb2e8f9f7 | 83 | |
<> | 144:ef7eb2e8f9f7 | 84 | static void uart_irq(UARTName, SerialIrq); |
<> | 144:ef7eb2e8f9f7 | 85 | static uint8_t serial_get_index(serial_t *obj); |
<> | 144:ef7eb2e8f9f7 | 86 | static void serial_enable(serial_t *obj, uint8_t enable); |
<> | 144:ef7eb2e8f9f7 | 87 | static void serial_enable_pins(serial_t *obj, uint8_t enable); |
<> | 144:ef7eb2e8f9f7 | 88 | static void serial_set_route(serial_t *obj); |
<> | 144:ef7eb2e8f9f7 | 89 | static IRQn_Type serial_get_rx_irq_index(serial_t *obj); |
<> | 144:ef7eb2e8f9f7 | 90 | static IRQn_Type serial_get_tx_irq_index(serial_t *obj); |
<> | 144:ef7eb2e8f9f7 | 91 | static CMU_Clock_TypeDef serial_get_clock(serial_t *obj); |
<> | 144:ef7eb2e8f9f7 | 92 | static void serial_dmaSetupChannel(serial_t *obj, bool tx_nrx); |
<> | 144:ef7eb2e8f9f7 | 93 | static void serial_rx_abort_asynch_intern(serial_t *obj, int unblock_sleep); |
<> | 144:ef7eb2e8f9f7 | 94 | static void serial_tx_abort_asynch_intern(serial_t *obj, int unblock_sleep); |
<> | 144:ef7eb2e8f9f7 | 95 | static void serial_block_sleep(serial_t *obj); |
<> | 144:ef7eb2e8f9f7 | 96 | static void serial_unblock_sleep(serial_t *obj); |
<> | 144:ef7eb2e8f9f7 | 97 | static void serial_leuart_baud(serial_t *obj, int baudrate); |
<> | 144:ef7eb2e8f9f7 | 98 | |
<> | 144:ef7eb2e8f9f7 | 99 | /* ISRs for RX and TX events */ |
<> | 144:ef7eb2e8f9f7 | 100 | #ifdef UART0 |
<> | 144:ef7eb2e8f9f7 | 101 | static void uart0_rx_irq() { uart_irq(UART_0, RxIrq); } |
<> | 144:ef7eb2e8f9f7 | 102 | static void uart0_tx_irq() { uart_irq(UART_0, TxIrq); USART_IntClear((USART_TypeDef*)UART_0, USART_IFC_TXC);} |
<> | 144:ef7eb2e8f9f7 | 103 | #endif |
<> | 144:ef7eb2e8f9f7 | 104 | #ifdef UART1 |
<> | 144:ef7eb2e8f9f7 | 105 | static void uart1_rx_irq() { uart_irq(UART_1, RxIrq); } |
<> | 144:ef7eb2e8f9f7 | 106 | static void uart1_tx_irq() { uart_irq(UART_1, TxIrq); USART_IntClear((USART_TypeDef*)UART_1, USART_IFC_TXC);} |
<> | 144:ef7eb2e8f9f7 | 107 | #endif |
<> | 144:ef7eb2e8f9f7 | 108 | #ifdef USART0 |
<> | 144:ef7eb2e8f9f7 | 109 | static void usart0_rx_irq() { uart_irq(USART_0, RxIrq); } |
<> | 144:ef7eb2e8f9f7 | 110 | static void usart0_tx_irq() { uart_irq(USART_0, TxIrq); USART_IntClear((USART_TypeDef*)USART_0, USART_IFC_TXC);} |
<> | 144:ef7eb2e8f9f7 | 111 | #endif |
<> | 144:ef7eb2e8f9f7 | 112 | #ifdef USART1 |
<> | 144:ef7eb2e8f9f7 | 113 | static void usart1_rx_irq() { uart_irq(USART_1, RxIrq); } |
<> | 144:ef7eb2e8f9f7 | 114 | static void usart1_tx_irq() { uart_irq(USART_1, TxIrq); USART_IntClear((USART_TypeDef*)USART_1, USART_IFC_TXC);} |
<> | 144:ef7eb2e8f9f7 | 115 | #endif |
<> | 144:ef7eb2e8f9f7 | 116 | #ifdef USART2 |
<> | 144:ef7eb2e8f9f7 | 117 | static void usart2_rx_irq() { uart_irq(USART_2, RxIrq); } |
<> | 144:ef7eb2e8f9f7 | 118 | static void usart2_tx_irq() { uart_irq(USART_2, TxIrq); USART_IntClear((USART_TypeDef*)USART_2, USART_IFC_TXC);} |
<> | 144:ef7eb2e8f9f7 | 119 | #endif |
AnnaBridge | 179:b0033dcd6934 | 120 | #ifdef USART3 |
AnnaBridge | 179:b0033dcd6934 | 121 | static void usart3_rx_irq() { uart_irq(USART_3, RxIrq); } |
AnnaBridge | 179:b0033dcd6934 | 122 | static void usart3_tx_irq() { uart_irq(USART_3, TxIrq); USART_IntClear((USART_TypeDef*)USART_3, USART_IFC_TXC);} |
AnnaBridge | 179:b0033dcd6934 | 123 | #endif |
AnnaBridge | 179:b0033dcd6934 | 124 | #ifdef USART4 |
AnnaBridge | 179:b0033dcd6934 | 125 | static void usart4_rx_irq() { uart_irq(USART_4, RxIrq); } |
AnnaBridge | 179:b0033dcd6934 | 126 | static void usart4_tx_irq() { uart_irq(USART_4, TxIrq); USART_IntClear((USART_TypeDef*)USART_4, USART_IFC_TXC);} |
AnnaBridge | 179:b0033dcd6934 | 127 | #endif |
AnnaBridge | 179:b0033dcd6934 | 128 | #ifdef USART5 |
AnnaBridge | 179:b0033dcd6934 | 129 | static void usart5_rx_irq() { uart_irq(USART_5, RxIrq); } |
AnnaBridge | 179:b0033dcd6934 | 130 | static void usart5_tx_irq() { uart_irq(USART_5, TxIrq); USART_IntClear((USART_TypeDef*)USART_5, USART_IFC_TXC);} |
AnnaBridge | 179:b0033dcd6934 | 131 | #endif |
<> | 144:ef7eb2e8f9f7 | 132 | #ifdef LEUART0 |
<> | 144:ef7eb2e8f9f7 | 133 | static void leuart0_irq() |
<> | 144:ef7eb2e8f9f7 | 134 | { |
<> | 144:ef7eb2e8f9f7 | 135 | if(LEUART_IntGetEnabled(LEUART0) & (LEUART_IF_RXDATAV | LEUART_IF_FERR | LEUART_IF_PERR | LEUART_IF_RXOF)) { |
<> | 144:ef7eb2e8f9f7 | 136 | uart_irq(LEUART_0, RxIrq); |
<> | 144:ef7eb2e8f9f7 | 137 | } |
<> | 144:ef7eb2e8f9f7 | 138 | |
<> | 144:ef7eb2e8f9f7 | 139 | if(LEUART_IntGetEnabled(LEUART0) & (LEUART_IF_TXC | LEUART_IF_TXBL | LEUART_IF_TXOF)) { |
<> | 144:ef7eb2e8f9f7 | 140 | uart_irq(LEUART_0, TxIrq); |
<> | 144:ef7eb2e8f9f7 | 141 | LEUART_IntClear(LEUART0, LEUART_IFC_TXC); |
<> | 144:ef7eb2e8f9f7 | 142 | } |
<> | 144:ef7eb2e8f9f7 | 143 | } |
<> | 144:ef7eb2e8f9f7 | 144 | #endif |
<> | 144:ef7eb2e8f9f7 | 145 | #ifdef LEUART1 |
<> | 144:ef7eb2e8f9f7 | 146 | static void leuart1_irq() |
<> | 144:ef7eb2e8f9f7 | 147 | { |
<> | 144:ef7eb2e8f9f7 | 148 | if(LEUART_IntGetEnabled(LEUART1) & (LEUART_IF_RXDATAV | LEUART_IF_FERR | LEUART_IF_PERR | LEUART_IF_RXOF)) { |
<> | 144:ef7eb2e8f9f7 | 149 | uart_irq(LEUART_1, RxIrq); |
<> | 144:ef7eb2e8f9f7 | 150 | } |
<> | 144:ef7eb2e8f9f7 | 151 | |
<> | 144:ef7eb2e8f9f7 | 152 | if(LEUART_IntGetEnabled(LEUART1) & (LEUART_IF_TXC | LEUART_IF_TXBL | LEUART_IF_TXOF)) { |
<> | 144:ef7eb2e8f9f7 | 153 | uart_irq(LEUART_1, TxIrq); |
<> | 144:ef7eb2e8f9f7 | 154 | LEUART_IntClear(LEUART1, LEUART_IFC_TXC); |
<> | 144:ef7eb2e8f9f7 | 155 | } |
<> | 144:ef7eb2e8f9f7 | 156 | } |
<> | 144:ef7eb2e8f9f7 | 157 | #endif |
<> | 144:ef7eb2e8f9f7 | 158 | |
<> | 144:ef7eb2e8f9f7 | 159 | /** |
<> | 144:ef7eb2e8f9f7 | 160 | * Initialize the UART using default settings, overridden by settings from serial object |
<> | 144:ef7eb2e8f9f7 | 161 | * |
<> | 144:ef7eb2e8f9f7 | 162 | * @param obj pointer to serial object |
<> | 144:ef7eb2e8f9f7 | 163 | */ |
<> | 144:ef7eb2e8f9f7 | 164 | static void uart_init(serial_t *obj, uint32_t baudrate, SerialParity parity, int stop_bits) |
<> | 144:ef7eb2e8f9f7 | 165 | { |
<> | 144:ef7eb2e8f9f7 | 166 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 167 | LEUART_Init_TypeDef init = LEUART_INIT_DEFAULT; |
<> | 144:ef7eb2e8f9f7 | 168 | |
<> | 144:ef7eb2e8f9f7 | 169 | if (stop_bits == 2) { |
<> | 144:ef7eb2e8f9f7 | 170 | init.stopbits = leuartStopbits2; |
<> | 144:ef7eb2e8f9f7 | 171 | } else { |
<> | 144:ef7eb2e8f9f7 | 172 | init.stopbits = leuartStopbits1; |
<> | 144:ef7eb2e8f9f7 | 173 | } |
<> | 144:ef7eb2e8f9f7 | 174 | |
<> | 144:ef7eb2e8f9f7 | 175 | switch (parity) { |
<> | 144:ef7eb2e8f9f7 | 176 | case ParityOdd: |
<> | 144:ef7eb2e8f9f7 | 177 | case ParityForced0: |
<> | 144:ef7eb2e8f9f7 | 178 | init.parity = leuartOddParity; |
<> | 144:ef7eb2e8f9f7 | 179 | break; |
<> | 144:ef7eb2e8f9f7 | 180 | case ParityEven: |
<> | 144:ef7eb2e8f9f7 | 181 | case ParityForced1: |
<> | 144:ef7eb2e8f9f7 | 182 | init.parity = leuartEvenParity; |
<> | 144:ef7eb2e8f9f7 | 183 | break; |
<> | 144:ef7eb2e8f9f7 | 184 | default: /* ParityNone */ |
<> | 144:ef7eb2e8f9f7 | 185 | init.parity = leuartNoParity; |
<> | 144:ef7eb2e8f9f7 | 186 | break; |
<> | 144:ef7eb2e8f9f7 | 187 | } |
<> | 144:ef7eb2e8f9f7 | 188 | |
<> | 144:ef7eb2e8f9f7 | 189 | init.enable = leuartDisable; |
<> | 144:ef7eb2e8f9f7 | 190 | init.baudrate = 9600; |
<> | 144:ef7eb2e8f9f7 | 191 | init.databits = leuartDatabits8; |
<> | 144:ef7eb2e8f9f7 | 192 | #ifdef LEUART_USING_LFXO |
<> | 144:ef7eb2e8f9f7 | 193 | init.refFreq = LEUART_LF_REF_FREQ; |
<> | 144:ef7eb2e8f9f7 | 194 | #else |
<> | 144:ef7eb2e8f9f7 | 195 | init.refFreq = LEUART_REF_FREQ; |
<> | 144:ef7eb2e8f9f7 | 196 | #endif |
<> | 144:ef7eb2e8f9f7 | 197 | LEUART_Init(obj->serial.periph.leuart, &init); |
<> | 144:ef7eb2e8f9f7 | 198 | |
<> | 144:ef7eb2e8f9f7 | 199 | if (baudrate != 9600) { |
<> | 144:ef7eb2e8f9f7 | 200 | serial_baud(obj, baudrate); |
<> | 144:ef7eb2e8f9f7 | 201 | } |
<> | 144:ef7eb2e8f9f7 | 202 | } else { |
<> | 144:ef7eb2e8f9f7 | 203 | USART_InitAsync_TypeDef init = USART_INITASYNC_DEFAULT; |
<> | 144:ef7eb2e8f9f7 | 204 | |
<> | 144:ef7eb2e8f9f7 | 205 | if (stop_bits == 2) { |
<> | 144:ef7eb2e8f9f7 | 206 | init.stopbits = usartStopbits2; |
<> | 144:ef7eb2e8f9f7 | 207 | } else { |
<> | 144:ef7eb2e8f9f7 | 208 | init.stopbits = usartStopbits1; |
<> | 144:ef7eb2e8f9f7 | 209 | } |
<> | 144:ef7eb2e8f9f7 | 210 | switch (parity) { |
<> | 144:ef7eb2e8f9f7 | 211 | case ParityOdd: |
<> | 144:ef7eb2e8f9f7 | 212 | case ParityForced0: |
<> | 144:ef7eb2e8f9f7 | 213 | init.parity = usartOddParity; |
<> | 144:ef7eb2e8f9f7 | 214 | break; |
<> | 144:ef7eb2e8f9f7 | 215 | case ParityEven: |
<> | 144:ef7eb2e8f9f7 | 216 | case ParityForced1: |
<> | 144:ef7eb2e8f9f7 | 217 | init.parity = usartEvenParity; |
<> | 144:ef7eb2e8f9f7 | 218 | break; |
<> | 144:ef7eb2e8f9f7 | 219 | default: /* ParityNone */ |
<> | 144:ef7eb2e8f9f7 | 220 | init.parity = usartNoParity; |
<> | 144:ef7eb2e8f9f7 | 221 | break; |
<> | 144:ef7eb2e8f9f7 | 222 | } |
<> | 144:ef7eb2e8f9f7 | 223 | |
<> | 144:ef7eb2e8f9f7 | 224 | init.enable = usartDisable; |
<> | 144:ef7eb2e8f9f7 | 225 | init.baudrate = baudrate; |
<> | 144:ef7eb2e8f9f7 | 226 | init.oversampling = usartOVS16; |
<> | 144:ef7eb2e8f9f7 | 227 | init.databits = usartDatabits8; |
<> | 144:ef7eb2e8f9f7 | 228 | init.refFreq = REFERENCE_FREQUENCY; |
<> | 144:ef7eb2e8f9f7 | 229 | |
<> | 144:ef7eb2e8f9f7 | 230 | USART_InitAsync(obj->serial.periph.uart, &init); |
<> | 144:ef7eb2e8f9f7 | 231 | } |
<> | 144:ef7eb2e8f9f7 | 232 | } |
<> | 144:ef7eb2e8f9f7 | 233 | /** |
<> | 144:ef7eb2e8f9f7 | 234 | * Get index of serial object, relating it to the physical peripheral. |
<> | 144:ef7eb2e8f9f7 | 235 | * |
<> | 144:ef7eb2e8f9f7 | 236 | * @param obj pointer to serial peripheral (= base address of periph) |
<> | 144:ef7eb2e8f9f7 | 237 | * @return internal index of U(S)ART peripheral |
<> | 144:ef7eb2e8f9f7 | 238 | */ |
<> | 144:ef7eb2e8f9f7 | 239 | static inline uint8_t serial_pointer_get_index(uint32_t serial_ptr) |
<> | 144:ef7eb2e8f9f7 | 240 | { |
<> | 144:ef7eb2e8f9f7 | 241 | uint8_t index = 0; |
<> | 144:ef7eb2e8f9f7 | 242 | #ifdef UART0 |
<> | 144:ef7eb2e8f9f7 | 243 | if (serial_ptr == UART_0) return index; |
<> | 144:ef7eb2e8f9f7 | 244 | index++; |
<> | 144:ef7eb2e8f9f7 | 245 | #endif |
<> | 144:ef7eb2e8f9f7 | 246 | #ifdef UART1 |
<> | 144:ef7eb2e8f9f7 | 247 | if (serial_ptr == UART_1) return index; |
<> | 144:ef7eb2e8f9f7 | 248 | index++; |
<> | 144:ef7eb2e8f9f7 | 249 | #endif |
<> | 144:ef7eb2e8f9f7 | 250 | #ifdef USART0 |
<> | 144:ef7eb2e8f9f7 | 251 | if (serial_ptr == USART_0) return index; |
<> | 144:ef7eb2e8f9f7 | 252 | index++; |
<> | 144:ef7eb2e8f9f7 | 253 | #endif |
<> | 144:ef7eb2e8f9f7 | 254 | #ifdef USART1 |
<> | 144:ef7eb2e8f9f7 | 255 | if (serial_ptr == USART_1) return index; |
<> | 144:ef7eb2e8f9f7 | 256 | index++; |
<> | 144:ef7eb2e8f9f7 | 257 | #endif |
<> | 144:ef7eb2e8f9f7 | 258 | #ifdef USART2 |
<> | 144:ef7eb2e8f9f7 | 259 | if (serial_ptr == USART_2) return index; |
<> | 144:ef7eb2e8f9f7 | 260 | index++; |
<> | 144:ef7eb2e8f9f7 | 261 | #endif |
AnnaBridge | 179:b0033dcd6934 | 262 | #ifdef USART3 |
AnnaBridge | 179:b0033dcd6934 | 263 | if (serial_ptr == USART_3) return index; |
AnnaBridge | 179:b0033dcd6934 | 264 | index++; |
AnnaBridge | 179:b0033dcd6934 | 265 | #endif |
AnnaBridge | 179:b0033dcd6934 | 266 | #ifdef USART4 |
AnnaBridge | 179:b0033dcd6934 | 267 | if (serial_ptr == USART_4) return index; |
AnnaBridge | 179:b0033dcd6934 | 268 | index++; |
AnnaBridge | 179:b0033dcd6934 | 269 | #endif |
AnnaBridge | 179:b0033dcd6934 | 270 | #ifdef USART5 |
AnnaBridge | 179:b0033dcd6934 | 271 | if (serial_ptr == USART_5) return index; |
AnnaBridge | 179:b0033dcd6934 | 272 | index++; |
AnnaBridge | 179:b0033dcd6934 | 273 | #endif |
<> | 144:ef7eb2e8f9f7 | 274 | #ifdef LEUART0 |
<> | 144:ef7eb2e8f9f7 | 275 | if (serial_ptr == LEUART_0) return index; |
<> | 144:ef7eb2e8f9f7 | 276 | index++; |
<> | 144:ef7eb2e8f9f7 | 277 | #endif |
<> | 144:ef7eb2e8f9f7 | 278 | #ifdef LEUART1 |
<> | 144:ef7eb2e8f9f7 | 279 | if (serial_ptr == LEUART_1) return index; |
<> | 144:ef7eb2e8f9f7 | 280 | index++; |
<> | 144:ef7eb2e8f9f7 | 281 | #endif |
<> | 144:ef7eb2e8f9f7 | 282 | return 0; |
<> | 144:ef7eb2e8f9f7 | 283 | } |
<> | 144:ef7eb2e8f9f7 | 284 | |
<> | 144:ef7eb2e8f9f7 | 285 | /** |
<> | 144:ef7eb2e8f9f7 | 286 | * Get index of serial object, relating it to the physical peripheral. |
<> | 144:ef7eb2e8f9f7 | 287 | * |
<> | 144:ef7eb2e8f9f7 | 288 | * @param obj pointer to serial object (mbed object) |
<> | 144:ef7eb2e8f9f7 | 289 | * @return internal index of U(S)ART peripheral |
<> | 144:ef7eb2e8f9f7 | 290 | */ |
<> | 144:ef7eb2e8f9f7 | 291 | static inline uint8_t serial_get_index(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 292 | { |
<> | 144:ef7eb2e8f9f7 | 293 | return serial_pointer_get_index((uint32_t)obj->serial.periph.uart); |
<> | 144:ef7eb2e8f9f7 | 294 | } |
<> | 144:ef7eb2e8f9f7 | 295 | |
<> | 144:ef7eb2e8f9f7 | 296 | /** |
<> | 144:ef7eb2e8f9f7 | 297 | * Get index of serial object RX IRQ, relating it to the physical peripheral. |
<> | 144:ef7eb2e8f9f7 | 298 | * |
<> | 144:ef7eb2e8f9f7 | 299 | * @param obj pointer to serial object |
<> | 144:ef7eb2e8f9f7 | 300 | * @return internal NVIC RX IRQ index of U(S)ART peripheral |
<> | 144:ef7eb2e8f9f7 | 301 | */ |
<> | 144:ef7eb2e8f9f7 | 302 | static inline IRQn_Type serial_get_rx_irq_index(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 303 | { |
<> | 144:ef7eb2e8f9f7 | 304 | switch ((uint32_t)obj->serial.periph.uart) { |
<> | 144:ef7eb2e8f9f7 | 305 | #ifdef UART0 |
<> | 144:ef7eb2e8f9f7 | 306 | case UART_0: |
<> | 144:ef7eb2e8f9f7 | 307 | return UART0_RX_IRQn; |
<> | 144:ef7eb2e8f9f7 | 308 | #endif |
<> | 144:ef7eb2e8f9f7 | 309 | #ifdef UART1 |
<> | 144:ef7eb2e8f9f7 | 310 | case UART_1: |
<> | 144:ef7eb2e8f9f7 | 311 | return UART1_RX_IRQn; |
<> | 144:ef7eb2e8f9f7 | 312 | #endif |
<> | 144:ef7eb2e8f9f7 | 313 | #ifdef USART0 |
<> | 144:ef7eb2e8f9f7 | 314 | case USART_0: |
<> | 144:ef7eb2e8f9f7 | 315 | return USART0_RX_IRQn; |
<> | 144:ef7eb2e8f9f7 | 316 | #endif |
<> | 144:ef7eb2e8f9f7 | 317 | #ifdef USART1 |
<> | 144:ef7eb2e8f9f7 | 318 | case USART_1: |
<> | 144:ef7eb2e8f9f7 | 319 | return USART1_RX_IRQn; |
<> | 144:ef7eb2e8f9f7 | 320 | #endif |
<> | 144:ef7eb2e8f9f7 | 321 | #ifdef USART2 |
<> | 144:ef7eb2e8f9f7 | 322 | case USART_2: |
<> | 144:ef7eb2e8f9f7 | 323 | return USART2_RX_IRQn; |
<> | 144:ef7eb2e8f9f7 | 324 | #endif |
AnnaBridge | 179:b0033dcd6934 | 325 | #ifdef USART3 |
AnnaBridge | 179:b0033dcd6934 | 326 | case USART_3: |
AnnaBridge | 179:b0033dcd6934 | 327 | return USART3_RX_IRQn; |
AnnaBridge | 179:b0033dcd6934 | 328 | #endif |
AnnaBridge | 179:b0033dcd6934 | 329 | #ifdef USART4 |
AnnaBridge | 179:b0033dcd6934 | 330 | case USART_4: |
AnnaBridge | 179:b0033dcd6934 | 331 | return USART4_RX_IRQn; |
AnnaBridge | 179:b0033dcd6934 | 332 | #endif |
AnnaBridge | 179:b0033dcd6934 | 333 | #ifdef USART5 |
AnnaBridge | 179:b0033dcd6934 | 334 | case USART_5: |
AnnaBridge | 179:b0033dcd6934 | 335 | return USART5_RX_IRQn; |
AnnaBridge | 179:b0033dcd6934 | 336 | #endif |
<> | 144:ef7eb2e8f9f7 | 337 | #ifdef LEUART0 |
<> | 144:ef7eb2e8f9f7 | 338 | case LEUART_0: |
<> | 144:ef7eb2e8f9f7 | 339 | return LEUART0_IRQn; |
<> | 144:ef7eb2e8f9f7 | 340 | #endif |
<> | 144:ef7eb2e8f9f7 | 341 | #ifdef LEUART1 |
<> | 144:ef7eb2e8f9f7 | 342 | case LEUART_1: |
<> | 144:ef7eb2e8f9f7 | 343 | return LEUART1_IRQn; |
<> | 144:ef7eb2e8f9f7 | 344 | #endif |
<> | 144:ef7eb2e8f9f7 | 345 | default: |
<> | 144:ef7eb2e8f9f7 | 346 | MBED_ASSERT(0); |
<> | 144:ef7eb2e8f9f7 | 347 | } |
<> | 144:ef7eb2e8f9f7 | 348 | return (IRQn_Type)0; |
<> | 144:ef7eb2e8f9f7 | 349 | } |
<> | 144:ef7eb2e8f9f7 | 350 | |
<> | 144:ef7eb2e8f9f7 | 351 | /** |
<> | 144:ef7eb2e8f9f7 | 352 | * Get index of serial object TX IRQ, relating it to the physical peripheral. |
<> | 144:ef7eb2e8f9f7 | 353 | * |
<> | 144:ef7eb2e8f9f7 | 354 | * @param obj pointer to serial object |
<> | 144:ef7eb2e8f9f7 | 355 | * @return internal NVIC TX IRQ index of U(S)ART peripheral |
<> | 144:ef7eb2e8f9f7 | 356 | */ |
<> | 144:ef7eb2e8f9f7 | 357 | static inline IRQn_Type serial_get_tx_irq_index(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 358 | { |
<> | 144:ef7eb2e8f9f7 | 359 | switch ((uint32_t)obj->serial.periph.uart) { |
<> | 144:ef7eb2e8f9f7 | 360 | #ifdef UART0 |
<> | 144:ef7eb2e8f9f7 | 361 | case UART_0: |
<> | 144:ef7eb2e8f9f7 | 362 | return UART0_TX_IRQn; |
<> | 144:ef7eb2e8f9f7 | 363 | #endif |
<> | 144:ef7eb2e8f9f7 | 364 | #ifdef UART1 |
<> | 144:ef7eb2e8f9f7 | 365 | case UART_1: |
<> | 144:ef7eb2e8f9f7 | 366 | return UART1_TX_IRQn; |
<> | 144:ef7eb2e8f9f7 | 367 | #endif |
<> | 144:ef7eb2e8f9f7 | 368 | #ifdef USART0 |
<> | 144:ef7eb2e8f9f7 | 369 | case USART_0: |
<> | 144:ef7eb2e8f9f7 | 370 | return USART0_TX_IRQn; |
<> | 144:ef7eb2e8f9f7 | 371 | #endif |
<> | 144:ef7eb2e8f9f7 | 372 | #ifdef USART1 |
<> | 144:ef7eb2e8f9f7 | 373 | case USART_1: |
<> | 144:ef7eb2e8f9f7 | 374 | return USART1_TX_IRQn; |
<> | 144:ef7eb2e8f9f7 | 375 | #endif |
<> | 144:ef7eb2e8f9f7 | 376 | #ifdef USART2 |
<> | 144:ef7eb2e8f9f7 | 377 | case USART_2: |
<> | 144:ef7eb2e8f9f7 | 378 | return USART2_TX_IRQn; |
<> | 144:ef7eb2e8f9f7 | 379 | #endif |
AnnaBridge | 179:b0033dcd6934 | 380 | #ifdef USART3 |
AnnaBridge | 179:b0033dcd6934 | 381 | case USART_3: |
AnnaBridge | 179:b0033dcd6934 | 382 | return USART3_TX_IRQn; |
AnnaBridge | 179:b0033dcd6934 | 383 | #endif |
AnnaBridge | 179:b0033dcd6934 | 384 | #ifdef USART4 |
AnnaBridge | 179:b0033dcd6934 | 385 | case USART_4: |
AnnaBridge | 179:b0033dcd6934 | 386 | return USART4_TX_IRQn; |
AnnaBridge | 179:b0033dcd6934 | 387 | #endif |
AnnaBridge | 179:b0033dcd6934 | 388 | #ifdef USART5 |
AnnaBridge | 179:b0033dcd6934 | 389 | case USART_5: |
AnnaBridge | 179:b0033dcd6934 | 390 | return USART5_TX_IRQn; |
AnnaBridge | 179:b0033dcd6934 | 391 | #endif |
<> | 144:ef7eb2e8f9f7 | 392 | #ifdef LEUART0 |
<> | 144:ef7eb2e8f9f7 | 393 | case LEUART_0: |
<> | 144:ef7eb2e8f9f7 | 394 | return LEUART0_IRQn; |
<> | 144:ef7eb2e8f9f7 | 395 | #endif |
<> | 144:ef7eb2e8f9f7 | 396 | #ifdef LEUART1 |
<> | 144:ef7eb2e8f9f7 | 397 | case LEUART_1: |
<> | 144:ef7eb2e8f9f7 | 398 | return LEUART1_IRQn; |
<> | 144:ef7eb2e8f9f7 | 399 | #endif |
<> | 144:ef7eb2e8f9f7 | 400 | default: |
<> | 144:ef7eb2e8f9f7 | 401 | MBED_ASSERT(0); |
<> | 144:ef7eb2e8f9f7 | 402 | } |
<> | 144:ef7eb2e8f9f7 | 403 | return (IRQn_Type)0; |
<> | 144:ef7eb2e8f9f7 | 404 | } |
<> | 144:ef7eb2e8f9f7 | 405 | |
<> | 144:ef7eb2e8f9f7 | 406 | /** |
<> | 144:ef7eb2e8f9f7 | 407 | * Get clock tree for serial peripheral pointed to by obj. |
<> | 144:ef7eb2e8f9f7 | 408 | * |
<> | 144:ef7eb2e8f9f7 | 409 | * @param obj pointer to serial object |
<> | 144:ef7eb2e8f9f7 | 410 | * @return CMU_Clock_TypeDef for U(S)ART |
<> | 144:ef7eb2e8f9f7 | 411 | */ |
<> | 144:ef7eb2e8f9f7 | 412 | inline CMU_Clock_TypeDef serial_get_clock(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 413 | { |
<> | 144:ef7eb2e8f9f7 | 414 | switch ((uint32_t)obj->serial.periph.uart) { |
<> | 144:ef7eb2e8f9f7 | 415 | #ifdef UART0 |
<> | 144:ef7eb2e8f9f7 | 416 | case UART_0: |
<> | 144:ef7eb2e8f9f7 | 417 | return cmuClock_UART0; |
<> | 144:ef7eb2e8f9f7 | 418 | #endif |
<> | 144:ef7eb2e8f9f7 | 419 | #ifdef UART1 |
<> | 144:ef7eb2e8f9f7 | 420 | case UART_1: |
<> | 144:ef7eb2e8f9f7 | 421 | return cmuClock_UART1; |
<> | 144:ef7eb2e8f9f7 | 422 | #endif |
<> | 144:ef7eb2e8f9f7 | 423 | #ifdef USART0 |
<> | 144:ef7eb2e8f9f7 | 424 | case USART_0: |
<> | 144:ef7eb2e8f9f7 | 425 | return cmuClock_USART0; |
<> | 144:ef7eb2e8f9f7 | 426 | #endif |
<> | 144:ef7eb2e8f9f7 | 427 | #ifdef USART1 |
<> | 144:ef7eb2e8f9f7 | 428 | case USART_1: |
<> | 144:ef7eb2e8f9f7 | 429 | return cmuClock_USART1; |
<> | 144:ef7eb2e8f9f7 | 430 | #endif |
<> | 144:ef7eb2e8f9f7 | 431 | #ifdef USART2 |
<> | 144:ef7eb2e8f9f7 | 432 | case USART_2: |
<> | 144:ef7eb2e8f9f7 | 433 | return cmuClock_USART2; |
<> | 144:ef7eb2e8f9f7 | 434 | #endif |
AnnaBridge | 179:b0033dcd6934 | 435 | #ifdef USART3 |
AnnaBridge | 179:b0033dcd6934 | 436 | case USART_3: |
AnnaBridge | 179:b0033dcd6934 | 437 | return cmuClock_USART3; |
AnnaBridge | 179:b0033dcd6934 | 438 | #endif |
AnnaBridge | 179:b0033dcd6934 | 439 | #ifdef USART4 |
AnnaBridge | 179:b0033dcd6934 | 440 | case USART_4: |
AnnaBridge | 179:b0033dcd6934 | 441 | return cmuClock_USART4; |
AnnaBridge | 179:b0033dcd6934 | 442 | #endif |
AnnaBridge | 179:b0033dcd6934 | 443 | #ifdef USART5 |
AnnaBridge | 179:b0033dcd6934 | 444 | case USART_5: |
AnnaBridge | 179:b0033dcd6934 | 445 | return cmuClock_USART5; |
AnnaBridge | 179:b0033dcd6934 | 446 | #endif |
<> | 144:ef7eb2e8f9f7 | 447 | #ifdef LEUART0 |
<> | 144:ef7eb2e8f9f7 | 448 | case LEUART_0: |
<> | 144:ef7eb2e8f9f7 | 449 | return cmuClock_LEUART0; |
<> | 144:ef7eb2e8f9f7 | 450 | #endif |
<> | 144:ef7eb2e8f9f7 | 451 | #ifdef LEUART1 |
<> | 144:ef7eb2e8f9f7 | 452 | case LEUART_1: |
<> | 144:ef7eb2e8f9f7 | 453 | return cmuClock_LEUART1; |
<> | 144:ef7eb2e8f9f7 | 454 | #endif |
<> | 144:ef7eb2e8f9f7 | 455 | default: |
<> | 144:ef7eb2e8f9f7 | 456 | return cmuClock_HFPER; |
<> | 144:ef7eb2e8f9f7 | 457 | } |
<> | 144:ef7eb2e8f9f7 | 458 | } |
<> | 144:ef7eb2e8f9f7 | 459 | |
<> | 144:ef7eb2e8f9f7 | 460 | void serial_preinit(serial_t *obj, PinName tx, PinName rx) |
<> | 144:ef7eb2e8f9f7 | 461 | { |
<> | 144:ef7eb2e8f9f7 | 462 | /* Get UART object connected to the given pins */ |
<> | 144:ef7eb2e8f9f7 | 463 | UARTName uart_tx = (UARTName) pinmap_peripheral(tx, PinMap_UART_TX); |
<> | 144:ef7eb2e8f9f7 | 464 | UARTName uart_rx = (UARTName) pinmap_peripheral(rx, PinMap_UART_RX); |
<> | 144:ef7eb2e8f9f7 | 465 | /* Check that pins are connected to same UART */ |
<> | 144:ef7eb2e8f9f7 | 466 | UARTName uart = (UARTName) pinmap_merge(uart_tx, uart_rx); |
AnnaBridge | 179:b0033dcd6934 | 467 | MBED_ASSERT((unsigned int) uart != NC); |
<> | 144:ef7eb2e8f9f7 | 468 | |
<> | 144:ef7eb2e8f9f7 | 469 | obj->serial.periph.uart = (USART_TypeDef *) uart; |
<> | 144:ef7eb2e8f9f7 | 470 | |
<> | 144:ef7eb2e8f9f7 | 471 | /* Get location */ |
<> | 144:ef7eb2e8f9f7 | 472 | uint32_t uart_tx_loc = pin_location(tx, PinMap_UART_TX); |
<> | 144:ef7eb2e8f9f7 | 473 | uint32_t uart_rx_loc = pin_location(rx, PinMap_UART_RX); |
<> | 144:ef7eb2e8f9f7 | 474 | |
<> | 144:ef7eb2e8f9f7 | 475 | #if defined(_SILICON_LABS_32B_PLATFORM_1) |
<> | 144:ef7eb2e8f9f7 | 476 | /* Check that pins are used by same location for the given UART */ |
<> | 144:ef7eb2e8f9f7 | 477 | obj->serial.location = pinmap_merge(uart_tx_loc, uart_rx_loc); |
AnnaBridge | 179:b0033dcd6934 | 478 | MBED_ASSERT(obj->serial.location != NC); |
<> | 144:ef7eb2e8f9f7 | 479 | #else |
<> | 144:ef7eb2e8f9f7 | 480 | obj->serial.location_tx = uart_tx_loc; |
<> | 144:ef7eb2e8f9f7 | 481 | obj->serial.location_rx = uart_rx_loc; |
<> | 144:ef7eb2e8f9f7 | 482 | #endif |
<> | 144:ef7eb2e8f9f7 | 483 | |
<> | 144:ef7eb2e8f9f7 | 484 | /* Store pins in object for easy disabling in serial_free() */ |
<> | 144:ef7eb2e8f9f7 | 485 | //TODO: replace all usages with AF_USARTx_TX_PORT(location) macro to save 8 bytes from struct |
<> | 144:ef7eb2e8f9f7 | 486 | obj->serial.rx_pin = rx; |
<> | 144:ef7eb2e8f9f7 | 487 | obj->serial.tx_pin = tx; |
<> | 144:ef7eb2e8f9f7 | 488 | |
<> | 144:ef7eb2e8f9f7 | 489 | /* Select interrupt */ |
<> | 144:ef7eb2e8f9f7 | 490 | switch ((uint32_t)obj->serial.periph.uart) { |
<> | 144:ef7eb2e8f9f7 | 491 | #ifdef UART0 |
<> | 144:ef7eb2e8f9f7 | 492 | case UART_0: |
<> | 144:ef7eb2e8f9f7 | 493 | NVIC_SetVector(UART0_RX_IRQn, (uint32_t) &uart0_rx_irq); |
<> | 144:ef7eb2e8f9f7 | 494 | NVIC_SetVector(UART0_TX_IRQn, (uint32_t) &uart0_tx_irq); |
<> | 144:ef7eb2e8f9f7 | 495 | NVIC_SetPriority(UART0_TX_IRQn, 1); |
<> | 144:ef7eb2e8f9f7 | 496 | break; |
<> | 144:ef7eb2e8f9f7 | 497 | #endif |
<> | 144:ef7eb2e8f9f7 | 498 | #ifdef UART1 |
<> | 144:ef7eb2e8f9f7 | 499 | case UART_1: |
<> | 144:ef7eb2e8f9f7 | 500 | NVIC_SetVector(UART1_RX_IRQn, (uint32_t) &uart1_rx_irq); |
<> | 144:ef7eb2e8f9f7 | 501 | NVIC_SetVector(UART1_TX_IRQn, (uint32_t) &uart1_tx_irq); |
<> | 144:ef7eb2e8f9f7 | 502 | NVIC_SetPriority(UART1_TX_IRQn, 1); |
<> | 144:ef7eb2e8f9f7 | 503 | break; |
<> | 144:ef7eb2e8f9f7 | 504 | #endif |
<> | 144:ef7eb2e8f9f7 | 505 | #ifdef USART0 |
<> | 144:ef7eb2e8f9f7 | 506 | case USART_0: |
<> | 144:ef7eb2e8f9f7 | 507 | NVIC_SetVector(USART0_RX_IRQn, (uint32_t) &usart0_rx_irq); |
<> | 144:ef7eb2e8f9f7 | 508 | NVIC_SetVector(USART0_TX_IRQn, (uint32_t) &usart0_tx_irq); |
<> | 144:ef7eb2e8f9f7 | 509 | NVIC_SetPriority(USART0_TX_IRQn, 1); |
<> | 144:ef7eb2e8f9f7 | 510 | break; |
<> | 144:ef7eb2e8f9f7 | 511 | #endif |
<> | 144:ef7eb2e8f9f7 | 512 | #ifdef USART1 |
<> | 144:ef7eb2e8f9f7 | 513 | case USART_1: |
<> | 144:ef7eb2e8f9f7 | 514 | NVIC_SetVector(USART1_RX_IRQn, (uint32_t) &usart1_rx_irq); |
<> | 144:ef7eb2e8f9f7 | 515 | NVIC_SetVector(USART1_TX_IRQn, (uint32_t) &usart1_tx_irq); |
<> | 144:ef7eb2e8f9f7 | 516 | NVIC_SetPriority(USART1_TX_IRQn, 1); |
<> | 144:ef7eb2e8f9f7 | 517 | break; |
<> | 144:ef7eb2e8f9f7 | 518 | #endif |
<> | 144:ef7eb2e8f9f7 | 519 | #ifdef USART2 |
<> | 144:ef7eb2e8f9f7 | 520 | case USART_2: |
<> | 144:ef7eb2e8f9f7 | 521 | NVIC_SetVector(USART2_RX_IRQn, (uint32_t) &usart2_rx_irq); |
<> | 144:ef7eb2e8f9f7 | 522 | NVIC_SetVector(USART2_TX_IRQn, (uint32_t) &usart2_tx_irq); |
<> | 144:ef7eb2e8f9f7 | 523 | NVIC_SetPriority(USART2_TX_IRQn, 1); |
<> | 144:ef7eb2e8f9f7 | 524 | break; |
<> | 144:ef7eb2e8f9f7 | 525 | #endif |
AnnaBridge | 179:b0033dcd6934 | 526 | #ifdef USART3 |
AnnaBridge | 179:b0033dcd6934 | 527 | case USART_3: |
AnnaBridge | 179:b0033dcd6934 | 528 | NVIC_SetVector(USART3_RX_IRQn, (uint32_t) &usart3_rx_irq); |
AnnaBridge | 179:b0033dcd6934 | 529 | NVIC_SetVector(USART3_TX_IRQn, (uint32_t) &usart3_tx_irq); |
AnnaBridge | 179:b0033dcd6934 | 530 | NVIC_SetPriority(USART3_TX_IRQn, 1); |
AnnaBridge | 179:b0033dcd6934 | 531 | break; |
AnnaBridge | 179:b0033dcd6934 | 532 | #endif |
AnnaBridge | 179:b0033dcd6934 | 533 | #ifdef USART4 |
AnnaBridge | 179:b0033dcd6934 | 534 | case USART_4: |
AnnaBridge | 179:b0033dcd6934 | 535 | NVIC_SetVector(USART4_RX_IRQn, (uint32_t) &usart4_rx_irq); |
AnnaBridge | 179:b0033dcd6934 | 536 | NVIC_SetVector(USART4_TX_IRQn, (uint32_t) &usart4_tx_irq); |
AnnaBridge | 179:b0033dcd6934 | 537 | NVIC_SetPriority(USART4_TX_IRQn, 1); |
AnnaBridge | 179:b0033dcd6934 | 538 | break; |
AnnaBridge | 179:b0033dcd6934 | 539 | #endif |
AnnaBridge | 179:b0033dcd6934 | 540 | #ifdef USART5 |
AnnaBridge | 179:b0033dcd6934 | 541 | case USART_5: |
AnnaBridge | 179:b0033dcd6934 | 542 | NVIC_SetVector(USART5_RX_IRQn, (uint32_t) &usart5_rx_irq); |
AnnaBridge | 179:b0033dcd6934 | 543 | NVIC_SetVector(USART5_TX_IRQn, (uint32_t) &usart5_tx_irq); |
AnnaBridge | 179:b0033dcd6934 | 544 | NVIC_SetPriority(USART5_TX_IRQn, 1); |
AnnaBridge | 179:b0033dcd6934 | 545 | break; |
AnnaBridge | 179:b0033dcd6934 | 546 | #endif |
<> | 144:ef7eb2e8f9f7 | 547 | #ifdef LEUART0 |
<> | 144:ef7eb2e8f9f7 | 548 | case LEUART_0: |
<> | 144:ef7eb2e8f9f7 | 549 | NVIC_SetVector(LEUART0_IRQn, (uint32_t) &leuart0_irq); |
<> | 144:ef7eb2e8f9f7 | 550 | break; |
<> | 144:ef7eb2e8f9f7 | 551 | #endif |
<> | 144:ef7eb2e8f9f7 | 552 | #ifdef LEUART1 |
<> | 144:ef7eb2e8f9f7 | 553 | case LEUART_1: |
<> | 144:ef7eb2e8f9f7 | 554 | NVIC_SetVector(LEUART1_IRQn, (uint32_t) &leuart1_irq); |
<> | 144:ef7eb2e8f9f7 | 555 | break; |
<> | 144:ef7eb2e8f9f7 | 556 | #endif |
<> | 144:ef7eb2e8f9f7 | 557 | } |
<> | 144:ef7eb2e8f9f7 | 558 | } |
<> | 144:ef7eb2e8f9f7 | 559 | |
<> | 144:ef7eb2e8f9f7 | 560 | static void serial_enable_pins(serial_t *obj, uint8_t enable) |
<> | 144:ef7eb2e8f9f7 | 561 | { |
<> | 144:ef7eb2e8f9f7 | 562 | if (enable) { |
<> | 144:ef7eb2e8f9f7 | 563 | /* Configure GPIO pins*/ |
<> | 144:ef7eb2e8f9f7 | 564 | if(obj->serial.rx_pin != NC) { |
<> | 144:ef7eb2e8f9f7 | 565 | pin_mode(obj->serial.rx_pin, Input); |
<> | 144:ef7eb2e8f9f7 | 566 | } |
<> | 144:ef7eb2e8f9f7 | 567 | /* Set DOUT first to prevent glitches */ |
<> | 144:ef7eb2e8f9f7 | 568 | if(obj->serial.tx_pin != NC) { |
<> | 144:ef7eb2e8f9f7 | 569 | GPIO_PinOutSet((GPIO_Port_TypeDef)(obj->serial.tx_pin >> 4 & 0xF), obj->serial.tx_pin & 0xF); |
<> | 144:ef7eb2e8f9f7 | 570 | pin_mode(obj->serial.tx_pin, PushPull); |
<> | 144:ef7eb2e8f9f7 | 571 | } |
<> | 144:ef7eb2e8f9f7 | 572 | } else { |
<> | 144:ef7eb2e8f9f7 | 573 | if(obj->serial.rx_pin != NC) { |
<> | 144:ef7eb2e8f9f7 | 574 | pin_mode(obj->serial.rx_pin, Disabled); |
<> | 144:ef7eb2e8f9f7 | 575 | } |
<> | 144:ef7eb2e8f9f7 | 576 | if(obj->serial.tx_pin != NC) { |
<> | 144:ef7eb2e8f9f7 | 577 | pin_mode(obj->serial.tx_pin, Disabled); |
<> | 144:ef7eb2e8f9f7 | 578 | } |
<> | 144:ef7eb2e8f9f7 | 579 | } |
<> | 144:ef7eb2e8f9f7 | 580 | } |
<> | 144:ef7eb2e8f9f7 | 581 | |
<> | 144:ef7eb2e8f9f7 | 582 | static void serial_set_route(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 583 | { |
<> | 144:ef7eb2e8f9f7 | 584 | /* Enable pins for UART at correct location */ |
<> | 144:ef7eb2e8f9f7 | 585 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 586 | #ifdef _LEUART_ROUTE_LOCATION_SHIFT |
<> | 144:ef7eb2e8f9f7 | 587 | obj->serial.periph.leuart->ROUTE = (obj->serial.location << _LEUART_ROUTE_LOCATION_SHIFT); |
AnnaBridge | 179:b0033dcd6934 | 588 | if(obj->serial.tx_pin != NC) { |
<> | 144:ef7eb2e8f9f7 | 589 | obj->serial.periph.leuart->ROUTE |= LEUART_ROUTE_TXPEN; |
<> | 144:ef7eb2e8f9f7 | 590 | } else { |
<> | 144:ef7eb2e8f9f7 | 591 | obj->serial.periph.leuart->ROUTE &= ~LEUART_ROUTE_TXPEN; |
<> | 144:ef7eb2e8f9f7 | 592 | } |
AnnaBridge | 179:b0033dcd6934 | 593 | if(obj->serial.rx_pin != NC) { |
<> | 144:ef7eb2e8f9f7 | 594 | obj->serial.periph.leuart->ROUTE |= LEUART_ROUTE_RXPEN; |
<> | 144:ef7eb2e8f9f7 | 595 | } else { |
<> | 144:ef7eb2e8f9f7 | 596 | obj->serial.periph.leuart->CMD = LEUART_CMD_RXBLOCKEN; |
<> | 144:ef7eb2e8f9f7 | 597 | obj->serial.periph.leuart->ROUTE &= ~LEUART_ROUTE_RXPEN; |
<> | 144:ef7eb2e8f9f7 | 598 | } |
<> | 144:ef7eb2e8f9f7 | 599 | #else |
<> | 144:ef7eb2e8f9f7 | 600 | if(obj->serial.location_tx != NC) { |
<> | 144:ef7eb2e8f9f7 | 601 | obj->serial.periph.leuart->ROUTELOC0 = (obj->serial.periph.leuart->ROUTELOC0 & (~_LEUART_ROUTELOC0_TXLOC_MASK)) | (obj->serial.location_tx << _LEUART_ROUTELOC0_TXLOC_SHIFT); |
<> | 144:ef7eb2e8f9f7 | 602 | obj->serial.periph.leuart->ROUTEPEN = (obj->serial.periph.leuart->ROUTEPEN & (~_LEUART_ROUTEPEN_TXPEN_MASK)) | LEUART_ROUTEPEN_TXPEN; |
<> | 144:ef7eb2e8f9f7 | 603 | } else { |
<> | 144:ef7eb2e8f9f7 | 604 | obj->serial.periph.leuart->ROUTEPEN = (obj->serial.periph.leuart->ROUTEPEN & (~_LEUART_ROUTEPEN_TXPEN_MASK)); |
<> | 144:ef7eb2e8f9f7 | 605 | } |
<> | 144:ef7eb2e8f9f7 | 606 | if(obj->serial.location_rx != NC) { |
<> | 144:ef7eb2e8f9f7 | 607 | obj->serial.periph.leuart->ROUTELOC0 = (obj->serial.periph.leuart->ROUTELOC0 & (~_LEUART_ROUTELOC0_RXLOC_MASK)) | (obj->serial.location_rx << _LEUART_ROUTELOC0_RXLOC_SHIFT); |
<> | 144:ef7eb2e8f9f7 | 608 | obj->serial.periph.leuart->ROUTEPEN = (obj->serial.periph.leuart->ROUTEPEN & (~_LEUART_ROUTEPEN_RXPEN_MASK)) | LEUART_ROUTEPEN_RXPEN; |
<> | 144:ef7eb2e8f9f7 | 609 | } else { |
<> | 144:ef7eb2e8f9f7 | 610 | obj->serial.periph.leuart->CMD = LEUART_CMD_RXBLOCKEN; |
<> | 144:ef7eb2e8f9f7 | 611 | obj->serial.periph.leuart->ROUTEPEN = (obj->serial.periph.leuart->ROUTEPEN & (~_LEUART_ROUTEPEN_RXPEN_MASK)); |
<> | 144:ef7eb2e8f9f7 | 612 | } |
<> | 144:ef7eb2e8f9f7 | 613 | #endif |
<> | 144:ef7eb2e8f9f7 | 614 | } else { |
<> | 144:ef7eb2e8f9f7 | 615 | #ifdef _USART_ROUTE_LOCATION_SHIFT |
<> | 144:ef7eb2e8f9f7 | 616 | obj->serial.periph.uart->ROUTE = (obj->serial.location << _LEUART_ROUTE_LOCATION_SHIFT); |
AnnaBridge | 179:b0033dcd6934 | 617 | if(obj->serial.tx_pin != NC) { |
<> | 144:ef7eb2e8f9f7 | 618 | obj->serial.periph.uart->ROUTE |= USART_ROUTE_TXPEN; |
<> | 144:ef7eb2e8f9f7 | 619 | } else { |
<> | 144:ef7eb2e8f9f7 | 620 | obj->serial.periph.uart->ROUTE &= ~USART_ROUTE_TXPEN; |
<> | 144:ef7eb2e8f9f7 | 621 | } |
AnnaBridge | 179:b0033dcd6934 | 622 | if(obj->serial.rx_pin != NC) { |
<> | 144:ef7eb2e8f9f7 | 623 | obj->serial.periph.uart->ROUTE |= USART_ROUTE_RXPEN; |
<> | 144:ef7eb2e8f9f7 | 624 | } else { |
<> | 144:ef7eb2e8f9f7 | 625 | obj->serial.periph.uart->CMD = USART_CMD_RXBLOCKEN; |
<> | 144:ef7eb2e8f9f7 | 626 | obj->serial.periph.uart->ROUTE &= ~USART_ROUTE_RXPEN; |
<> | 144:ef7eb2e8f9f7 | 627 | } |
<> | 144:ef7eb2e8f9f7 | 628 | #else |
<> | 144:ef7eb2e8f9f7 | 629 | if(obj->serial.location_tx != NC) { |
<> | 144:ef7eb2e8f9f7 | 630 | obj->serial.periph.uart->ROUTELOC0 = (obj->serial.periph.uart->ROUTELOC0 & (~_USART_ROUTELOC0_TXLOC_MASK)) | (obj->serial.location_tx << _USART_ROUTELOC0_TXLOC_SHIFT); |
<> | 144:ef7eb2e8f9f7 | 631 | obj->serial.periph.uart->ROUTEPEN = (obj->serial.periph.uart->ROUTEPEN & (~_USART_ROUTEPEN_TXPEN_MASK)) | USART_ROUTEPEN_TXPEN; |
<> | 144:ef7eb2e8f9f7 | 632 | } else { |
<> | 144:ef7eb2e8f9f7 | 633 | obj->serial.periph.uart->ROUTEPEN = (obj->serial.periph.uart->ROUTEPEN & (~_USART_ROUTEPEN_TXPEN_MASK)); |
<> | 144:ef7eb2e8f9f7 | 634 | } |
<> | 144:ef7eb2e8f9f7 | 635 | if(obj->serial.location_rx != NC) { |
<> | 144:ef7eb2e8f9f7 | 636 | obj->serial.periph.uart->ROUTELOC0 = (obj->serial.periph.uart->ROUTELOC0 & (~_USART_ROUTELOC0_RXLOC_MASK)) | (obj->serial.location_rx << _USART_ROUTELOC0_RXLOC_SHIFT); |
<> | 144:ef7eb2e8f9f7 | 637 | obj->serial.periph.uart->ROUTEPEN = (obj->serial.periph.uart->ROUTEPEN & (~_USART_ROUTEPEN_RXPEN_MASK)) | USART_ROUTEPEN_RXPEN; |
<> | 144:ef7eb2e8f9f7 | 638 | } else { |
<> | 144:ef7eb2e8f9f7 | 639 | obj->serial.periph.uart->CMD = USART_CMD_RXBLOCKEN; |
<> | 144:ef7eb2e8f9f7 | 640 | obj->serial.periph.uart->ROUTEPEN = (obj->serial.periph.uart->ROUTEPEN & (~_USART_ROUTEPEN_RXPEN_MASK)); |
<> | 144:ef7eb2e8f9f7 | 641 | } |
<> | 144:ef7eb2e8f9f7 | 642 | #endif |
<> | 144:ef7eb2e8f9f7 | 643 | } |
<> | 144:ef7eb2e8f9f7 | 644 | } |
<> | 144:ef7eb2e8f9f7 | 645 | |
<> | 144:ef7eb2e8f9f7 | 646 | void serial_init(serial_t *obj, PinName tx, PinName rx) |
<> | 144:ef7eb2e8f9f7 | 647 | { |
<> | 144:ef7eb2e8f9f7 | 648 | serial_preinit(obj, tx, rx); |
<> | 144:ef7eb2e8f9f7 | 649 | |
<> | 144:ef7eb2e8f9f7 | 650 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 651 | // Set up LEUART clock tree |
<> | 144:ef7eb2e8f9f7 | 652 | #ifdef LEUART_USING_LFXO |
<> | 144:ef7eb2e8f9f7 | 653 | //set to use LFXO |
<> | 144:ef7eb2e8f9f7 | 654 | CMU_ClockEnable(cmuClock_CORELE, true); |
<> | 144:ef7eb2e8f9f7 | 655 | CMU_ClockSelectSet(cmuClock_LFB, cmuSelect_LFXO); |
<> | 144:ef7eb2e8f9f7 | 656 | #else |
<> | 144:ef7eb2e8f9f7 | 657 | //set to use high-speed clock |
<> | 144:ef7eb2e8f9f7 | 658 | #ifdef _SILICON_LABS_32B_PLATFORM_2 |
<> | 144:ef7eb2e8f9f7 | 659 | CMU_ClockSelectSet(cmuClock_LFB, cmuSelect_HFCLKLE); |
<> | 144:ef7eb2e8f9f7 | 660 | #else |
<> | 144:ef7eb2e8f9f7 | 661 | CMU_ClockSelectSet(cmuClock_LFB, cmuSelect_CORELEDIV2); |
<> | 144:ef7eb2e8f9f7 | 662 | #endif |
<> | 144:ef7eb2e8f9f7 | 663 | #endif |
<> | 144:ef7eb2e8f9f7 | 664 | } |
<> | 144:ef7eb2e8f9f7 | 665 | |
<> | 144:ef7eb2e8f9f7 | 666 | CMU_ClockEnable(serial_get_clock(obj), true); |
<> | 144:ef7eb2e8f9f7 | 667 | |
<> | 144:ef7eb2e8f9f7 | 668 | /* Configure UART for async operation */ |
<> | 150:02e0a0aed4ec | 669 | uart_init(obj, MBED_CONF_PLATFORM_DEFAULT_SERIAL_BAUD_RATE, ParityNone, 1); |
<> | 144:ef7eb2e8f9f7 | 670 | |
<> | 144:ef7eb2e8f9f7 | 671 | /* Enable pins for UART at correct location */ |
<> | 144:ef7eb2e8f9f7 | 672 | serial_set_route(obj); |
<> | 144:ef7eb2e8f9f7 | 673 | |
<> | 144:ef7eb2e8f9f7 | 674 | /* Reset interrupts */ |
<> | 144:ef7eb2e8f9f7 | 675 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 676 | obj->serial.periph.leuart->IFC = LEUART_IFC_TXC; |
<> | 144:ef7eb2e8f9f7 | 677 | obj->serial.periph.leuart->CTRL |= LEUART_CTRL_RXDMAWU | LEUART_CTRL_TXDMAWU; |
<> | 144:ef7eb2e8f9f7 | 678 | } else { |
<> | 144:ef7eb2e8f9f7 | 679 | obj->serial.periph.uart->IFC = USART_IFC_TXC; |
<> | 144:ef7eb2e8f9f7 | 680 | } |
<> | 144:ef7eb2e8f9f7 | 681 | |
<> | 144:ef7eb2e8f9f7 | 682 | /* If this is the UART to be used for stdio, copy it to the stdio_uart struct */ |
<> | 150:02e0a0aed4ec | 683 | if(obj == &stdio_uart) { |
<> | 144:ef7eb2e8f9f7 | 684 | stdio_uart_inited = 1; |
<> | 144:ef7eb2e8f9f7 | 685 | memcpy(&stdio_uart, obj, sizeof(serial_t)); |
<> | 144:ef7eb2e8f9f7 | 686 | } |
<> | 144:ef7eb2e8f9f7 | 687 | |
<> | 144:ef7eb2e8f9f7 | 688 | serial_enable_pins(obj, true); |
<> | 144:ef7eb2e8f9f7 | 689 | serial_enable(obj, true); |
<> | 144:ef7eb2e8f9f7 | 690 | |
<> | 144:ef7eb2e8f9f7 | 691 | obj->serial.dmaOptionsTX.dmaChannel = -1; |
<> | 144:ef7eb2e8f9f7 | 692 | obj->serial.dmaOptionsTX.dmaUsageState = DMA_USAGE_OPPORTUNISTIC; |
<> | 144:ef7eb2e8f9f7 | 693 | |
<> | 144:ef7eb2e8f9f7 | 694 | obj->serial.dmaOptionsRX.dmaChannel = -1; |
<> | 144:ef7eb2e8f9f7 | 695 | obj->serial.dmaOptionsRX.dmaUsageState = DMA_USAGE_OPPORTUNISTIC; |
<> | 144:ef7eb2e8f9f7 | 696 | |
<> | 144:ef7eb2e8f9f7 | 697 | } |
<> | 144:ef7eb2e8f9f7 | 698 | |
<> | 144:ef7eb2e8f9f7 | 699 | void serial_free(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 700 | { |
<> | 144:ef7eb2e8f9f7 | 701 | if( LEUART_REF_VALID(obj->serial.periph.leuart) ) { |
<> | 144:ef7eb2e8f9f7 | 702 | LEUART_Enable(obj->serial.periph.leuart, leuartDisable); |
<> | 144:ef7eb2e8f9f7 | 703 | } else { |
<> | 144:ef7eb2e8f9f7 | 704 | USART_Enable(obj->serial.periph.uart, usartDisable); |
<> | 144:ef7eb2e8f9f7 | 705 | } |
<> | 144:ef7eb2e8f9f7 | 706 | serial_enable_pins(obj, false); |
<> | 144:ef7eb2e8f9f7 | 707 | } |
<> | 144:ef7eb2e8f9f7 | 708 | |
<> | 144:ef7eb2e8f9f7 | 709 | static void serial_enable(serial_t *obj, uint8_t enable) |
<> | 144:ef7eb2e8f9f7 | 710 | { |
<> | 144:ef7eb2e8f9f7 | 711 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 712 | if (enable) { |
<> | 144:ef7eb2e8f9f7 | 713 | LEUART_Enable(obj->serial.periph.leuart, leuartEnable); |
<> | 144:ef7eb2e8f9f7 | 714 | } else { |
<> | 144:ef7eb2e8f9f7 | 715 | LEUART_Enable(obj->serial.periph.leuart, leuartDisable); |
<> | 144:ef7eb2e8f9f7 | 716 | } |
<> | 144:ef7eb2e8f9f7 | 717 | } else { |
<> | 144:ef7eb2e8f9f7 | 718 | if (enable) { |
<> | 144:ef7eb2e8f9f7 | 719 | USART_Enable(obj->serial.periph.uart, usartEnable); |
<> | 144:ef7eb2e8f9f7 | 720 | } else { |
<> | 144:ef7eb2e8f9f7 | 721 | USART_Enable(obj->serial.periph.uart, usartDisable); |
<> | 144:ef7eb2e8f9f7 | 722 | } |
<> | 144:ef7eb2e8f9f7 | 723 | } |
<> | 144:ef7eb2e8f9f7 | 724 | serial_irq_ids[serial_get_index(obj)] = 0; |
<> | 144:ef7eb2e8f9f7 | 725 | } |
<> | 144:ef7eb2e8f9f7 | 726 | |
<> | 144:ef7eb2e8f9f7 | 727 | /** |
<> | 144:ef7eb2e8f9f7 | 728 | * Set UART baud rate |
<> | 144:ef7eb2e8f9f7 | 729 | */ |
<> | 144:ef7eb2e8f9f7 | 730 | void serial_baud(serial_t *obj, int baudrate) |
<> | 144:ef7eb2e8f9f7 | 731 | { |
<> | 144:ef7eb2e8f9f7 | 732 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 733 | serial_leuart_baud(obj, baudrate); |
<> | 144:ef7eb2e8f9f7 | 734 | } else { |
<> | 144:ef7eb2e8f9f7 | 735 | USART_BaudrateAsyncSet(obj->serial.periph.uart, REFERENCE_FREQUENCY, (uint32_t)baudrate, usartOVS16); |
<> | 144:ef7eb2e8f9f7 | 736 | } |
<> | 144:ef7eb2e8f9f7 | 737 | } |
<> | 144:ef7eb2e8f9f7 | 738 | |
<> | 144:ef7eb2e8f9f7 | 739 | /** |
<> | 144:ef7eb2e8f9f7 | 740 | * Set LEUART baud rate |
<> | 144:ef7eb2e8f9f7 | 741 | * Calculate whether LF or HF clock should be used. |
<> | 144:ef7eb2e8f9f7 | 742 | */ |
<> | 144:ef7eb2e8f9f7 | 743 | static void serial_leuart_baud(serial_t *obj, int baudrate) |
<> | 144:ef7eb2e8f9f7 | 744 | { |
<> | 144:ef7eb2e8f9f7 | 745 | #ifdef LEUART_USING_LFXO |
<> | 144:ef7eb2e8f9f7 | 746 | /* check if baudrate is within allowed range */ |
<> | 144:ef7eb2e8f9f7 | 747 | #if defined(_SILICON_LABS_32B_PLATFORM_2) |
<> | 144:ef7eb2e8f9f7 | 748 | // P2 has 9 bits + 5 fractional bits in LEUART CLKDIV register |
<> | 144:ef7eb2e8f9f7 | 749 | MBED_ASSERT(baudrate >= (LEUART_LF_REF_FREQ >> 9)); |
<> | 144:ef7eb2e8f9f7 | 750 | #else |
<> | 144:ef7eb2e8f9f7 | 751 | // P1 has 7 bits + 5 fractional bits in LEUART CLKDIV register |
<> | 144:ef7eb2e8f9f7 | 752 | MBED_ASSERT(baudrate >= (LEUART_LF_REF_FREQ >> 7)); |
<> | 144:ef7eb2e8f9f7 | 753 | #endif |
<> | 144:ef7eb2e8f9f7 | 754 | |
<> | 144:ef7eb2e8f9f7 | 755 | if(baudrate > (LEUART_LF_REF_FREQ >> 1)){ |
<> | 144:ef7eb2e8f9f7 | 756 | // Baudrate is bigger than LFCLK/2 - we need to use the HF clock |
<> | 144:ef7eb2e8f9f7 | 757 | uint8_t divisor = 1; |
<> | 144:ef7eb2e8f9f7 | 758 | |
<> | 144:ef7eb2e8f9f7 | 759 | #if defined(_SILICON_LABS_32B_PLATFORM_2) |
<> | 144:ef7eb2e8f9f7 | 760 | /* Check if baudrate is within allowed range: (HFCLK/4096, HFCLK/2] */ |
<> | 144:ef7eb2e8f9f7 | 761 | MBED_ASSERT((baudrate <= (LEUART_HF_REF_FREQ >> 1)) && (baudrate > (LEUART_HF_REF_FREQ >> 12))); |
<> | 144:ef7eb2e8f9f7 | 762 | |
<> | 144:ef7eb2e8f9f7 | 763 | CMU_ClockSelectSet(cmuClock_LFB, cmuSelect_HFCLKLE); |
<> | 144:ef7eb2e8f9f7 | 764 | |
<> | 144:ef7eb2e8f9f7 | 765 | if(baudrate > (LEUART_HF_REF_FREQ >> 9)){ |
<> | 144:ef7eb2e8f9f7 | 766 | divisor = 1; |
<> | 144:ef7eb2e8f9f7 | 767 | }else if(baudrate > (LEUART_HF_REF_FREQ >> 10)){ |
<> | 144:ef7eb2e8f9f7 | 768 | divisor = 2; |
<> | 144:ef7eb2e8f9f7 | 769 | }else if(baudrate > (LEUART_HF_REF_FREQ >> 11)){ |
<> | 144:ef7eb2e8f9f7 | 770 | divisor = 4; |
<> | 144:ef7eb2e8f9f7 | 771 | }else{ |
<> | 144:ef7eb2e8f9f7 | 772 | divisor = 8; |
<> | 144:ef7eb2e8f9f7 | 773 | } |
<> | 144:ef7eb2e8f9f7 | 774 | #else // P1 |
<> | 144:ef7eb2e8f9f7 | 775 | /* Check if baudrate is within allowed range */ |
<> | 144:ef7eb2e8f9f7 | 776 | MBED_ASSERT((baudrate <= (LEUART_HF_REF_FREQ >> 1)) && (baudrate > (LEUART_HF_REF_FREQ >> 10))); |
<> | 144:ef7eb2e8f9f7 | 777 | |
<> | 144:ef7eb2e8f9f7 | 778 | CMU_ClockSelectSet(cmuClock_LFB, cmuSelect_CORELEDIV2); |
<> | 144:ef7eb2e8f9f7 | 779 | |
<> | 144:ef7eb2e8f9f7 | 780 | if(baudrate > (LEUART_HF_REF_FREQ >> 7)){ |
<> | 144:ef7eb2e8f9f7 | 781 | divisor = 1; |
<> | 144:ef7eb2e8f9f7 | 782 | }else if(baudrate > (LEUART_HF_REF_FREQ >> 8)){ |
<> | 144:ef7eb2e8f9f7 | 783 | divisor = 2; |
<> | 144:ef7eb2e8f9f7 | 784 | }else if(baudrate > (LEUART_HF_REF_FREQ >> 9)){ |
<> | 144:ef7eb2e8f9f7 | 785 | divisor = 4; |
<> | 144:ef7eb2e8f9f7 | 786 | }else{ |
<> | 144:ef7eb2e8f9f7 | 787 | divisor = 8; |
<> | 144:ef7eb2e8f9f7 | 788 | } |
<> | 144:ef7eb2e8f9f7 | 789 | #endif |
<> | 144:ef7eb2e8f9f7 | 790 | CMU_ClockDivSet(serial_get_clock(obj), divisor); |
<> | 144:ef7eb2e8f9f7 | 791 | LEUART_BaudrateSet(obj->serial.periph.leuart, LEUART_HF_REF_FREQ/divisor, (uint32_t)baudrate); |
<> | 144:ef7eb2e8f9f7 | 792 | }else{ |
<> | 144:ef7eb2e8f9f7 | 793 | CMU_ClockSelectSet(cmuClock_LFB, cmuSelect_LFXO); |
<> | 144:ef7eb2e8f9f7 | 794 | CMU_ClockDivSet(serial_get_clock(obj), 1); |
<> | 144:ef7eb2e8f9f7 | 795 | LEUART_BaudrateSet(obj->serial.periph.leuart, LEUART_LF_REF_FREQ, (uint32_t)baudrate); |
<> | 144:ef7eb2e8f9f7 | 796 | } |
<> | 144:ef7eb2e8f9f7 | 797 | #else |
<> | 144:ef7eb2e8f9f7 | 798 | /* check if baudrate is within allowed range */ |
<> | 144:ef7eb2e8f9f7 | 799 | MBED_ASSERT((baudrate > (LEUART_REF_FREQ >> 10)) && (baudrate <= (LEUART_REF_FREQ >> 1))); |
<> | 144:ef7eb2e8f9f7 | 800 | uint8_t divisor = 1; |
<> | 144:ef7eb2e8f9f7 | 801 | if(baudrate > (LEUART_REF_FREQ >> 7)){ |
<> | 144:ef7eb2e8f9f7 | 802 | divisor = 1; |
<> | 144:ef7eb2e8f9f7 | 803 | }else if(baudrate > (LEUART_REF_FREQ >> 8)){ |
<> | 144:ef7eb2e8f9f7 | 804 | divisor = 2; |
<> | 144:ef7eb2e8f9f7 | 805 | }else if(baudrate > (LEUART_REF_FREQ >> 9)){ |
<> | 144:ef7eb2e8f9f7 | 806 | divisor = 4; |
<> | 144:ef7eb2e8f9f7 | 807 | }else{ |
<> | 144:ef7eb2e8f9f7 | 808 | divisor = 8; |
<> | 144:ef7eb2e8f9f7 | 809 | } |
<> | 144:ef7eb2e8f9f7 | 810 | CMU_ClockDivSet(serial_get_clock(obj), divisor); |
<> | 144:ef7eb2e8f9f7 | 811 | LEUART_BaudrateSet(obj->serial.periph.leuart, LEUART_REF_FREQ/divisor, (uint32_t)baudrate); |
<> | 144:ef7eb2e8f9f7 | 812 | #endif |
<> | 144:ef7eb2e8f9f7 | 813 | } |
<> | 144:ef7eb2e8f9f7 | 814 | |
<> | 144:ef7eb2e8f9f7 | 815 | /** |
<> | 144:ef7eb2e8f9f7 | 816 | * Set UART format by re-initializing the peripheral. |
<> | 144:ef7eb2e8f9f7 | 817 | */ |
<> | 144:ef7eb2e8f9f7 | 818 | void serial_format(serial_t *obj, int data_bits, SerialParity parity, int stop_bits) |
<> | 144:ef7eb2e8f9f7 | 819 | { |
<> | 144:ef7eb2e8f9f7 | 820 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 821 | /* Save the serial state */ |
<> | 144:ef7eb2e8f9f7 | 822 | uint8_t was_enabled = LEUART_StatusGet(obj->serial.periph.leuart) & (LEUART_STATUS_TXENS | LEUART_STATUS_RXENS); |
<> | 144:ef7eb2e8f9f7 | 823 | uint32_t enabled_interrupts = obj->serial.periph.leuart->IEN; |
<> | 144:ef7eb2e8f9f7 | 824 | |
<> | 144:ef7eb2e8f9f7 | 825 | LEUART_Init_TypeDef init = LEUART_INIT_DEFAULT; |
<> | 144:ef7eb2e8f9f7 | 826 | |
<> | 144:ef7eb2e8f9f7 | 827 | /* We support 8 data bits ONLY on LEUART*/ |
<> | 144:ef7eb2e8f9f7 | 828 | MBED_ASSERT(data_bits == 8); |
<> | 144:ef7eb2e8f9f7 | 829 | |
<> | 144:ef7eb2e8f9f7 | 830 | /* Re-init the UART */ |
<> | 144:ef7eb2e8f9f7 | 831 | init.enable = (was_enabled == 0 ? leuartDisable : leuartEnable); |
<> | 144:ef7eb2e8f9f7 | 832 | init.baudrate = LEUART_BaudrateGet(obj->serial.periph.leuart); |
<> | 144:ef7eb2e8f9f7 | 833 | if (stop_bits == 2) { |
<> | 144:ef7eb2e8f9f7 | 834 | init.stopbits = leuartStopbits2; |
<> | 144:ef7eb2e8f9f7 | 835 | } else { |
<> | 144:ef7eb2e8f9f7 | 836 | init.stopbits = leuartStopbits1; |
<> | 144:ef7eb2e8f9f7 | 837 | } |
<> | 144:ef7eb2e8f9f7 | 838 | switch (parity) { |
<> | 144:ef7eb2e8f9f7 | 839 | case ParityOdd: |
<> | 144:ef7eb2e8f9f7 | 840 | case ParityForced0: |
<> | 144:ef7eb2e8f9f7 | 841 | init.parity = leuartOddParity; |
<> | 144:ef7eb2e8f9f7 | 842 | break; |
<> | 144:ef7eb2e8f9f7 | 843 | case ParityEven: |
<> | 144:ef7eb2e8f9f7 | 844 | case ParityForced1: |
<> | 144:ef7eb2e8f9f7 | 845 | init.parity = leuartEvenParity; |
<> | 144:ef7eb2e8f9f7 | 846 | break; |
<> | 144:ef7eb2e8f9f7 | 847 | default: /* ParityNone */ |
<> | 144:ef7eb2e8f9f7 | 848 | init.parity = leuartNoParity; |
<> | 144:ef7eb2e8f9f7 | 849 | break; |
<> | 144:ef7eb2e8f9f7 | 850 | } |
<> | 144:ef7eb2e8f9f7 | 851 | |
<> | 144:ef7eb2e8f9f7 | 852 | LEUART_Init(obj->serial.periph.leuart, &init); |
<> | 144:ef7eb2e8f9f7 | 853 | |
<> | 144:ef7eb2e8f9f7 | 854 | /* Re-enable pins for UART at correct location */ |
<> | 144:ef7eb2e8f9f7 | 855 | serial_set_route(obj); |
<> | 144:ef7eb2e8f9f7 | 856 | |
<> | 144:ef7eb2e8f9f7 | 857 | /* Re-enable interrupts */ |
<> | 144:ef7eb2e8f9f7 | 858 | if(was_enabled != 0) { |
<> | 144:ef7eb2e8f9f7 | 859 | obj->serial.periph.leuart->IFC = LEUART_IFC_TXC; |
<> | 144:ef7eb2e8f9f7 | 860 | obj->serial.periph.leuart->IEN = enabled_interrupts; |
<> | 144:ef7eb2e8f9f7 | 861 | } |
<> | 144:ef7eb2e8f9f7 | 862 | } else { |
<> | 144:ef7eb2e8f9f7 | 863 | /* Save the serial state */ |
<> | 144:ef7eb2e8f9f7 | 864 | uint8_t was_enabled = USART_StatusGet(obj->serial.periph.uart) & (USART_STATUS_TXENS | USART_STATUS_RXENS); |
<> | 144:ef7eb2e8f9f7 | 865 | uint32_t enabled_interrupts = obj->serial.periph.uart->IEN; |
<> | 144:ef7eb2e8f9f7 | 866 | |
<> | 144:ef7eb2e8f9f7 | 867 | |
<> | 144:ef7eb2e8f9f7 | 868 | USART_InitAsync_TypeDef init = USART_INITASYNC_DEFAULT; |
<> | 144:ef7eb2e8f9f7 | 869 | |
<> | 144:ef7eb2e8f9f7 | 870 | /* We support 4 to 8 data bits */ |
<> | 144:ef7eb2e8f9f7 | 871 | MBED_ASSERT(data_bits >= 4 && data_bits <= 8); |
<> | 144:ef7eb2e8f9f7 | 872 | |
<> | 144:ef7eb2e8f9f7 | 873 | /* Re-init the UART */ |
<> | 144:ef7eb2e8f9f7 | 874 | init.enable = (was_enabled == 0 ? usartDisable : usartEnable); |
<> | 144:ef7eb2e8f9f7 | 875 | init.baudrate = USART_BaudrateGet(obj->serial.periph.uart); |
<> | 144:ef7eb2e8f9f7 | 876 | init.oversampling = usartOVS16; |
<> | 144:ef7eb2e8f9f7 | 877 | init.databits = (USART_Databits_TypeDef)((data_bits - 3) << _USART_FRAME_DATABITS_SHIFT); |
<> | 144:ef7eb2e8f9f7 | 878 | if (stop_bits == 2) { |
<> | 144:ef7eb2e8f9f7 | 879 | init.stopbits = usartStopbits2; |
<> | 144:ef7eb2e8f9f7 | 880 | } else { |
<> | 144:ef7eb2e8f9f7 | 881 | init.stopbits = usartStopbits1; |
<> | 144:ef7eb2e8f9f7 | 882 | } |
<> | 144:ef7eb2e8f9f7 | 883 | switch (parity) { |
<> | 144:ef7eb2e8f9f7 | 884 | case ParityOdd: |
<> | 144:ef7eb2e8f9f7 | 885 | case ParityForced0: |
<> | 144:ef7eb2e8f9f7 | 886 | init.parity = usartOddParity; |
<> | 144:ef7eb2e8f9f7 | 887 | break; |
<> | 144:ef7eb2e8f9f7 | 888 | case ParityEven: |
<> | 144:ef7eb2e8f9f7 | 889 | case ParityForced1: |
<> | 144:ef7eb2e8f9f7 | 890 | init.parity = usartEvenParity; |
<> | 144:ef7eb2e8f9f7 | 891 | break; |
<> | 144:ef7eb2e8f9f7 | 892 | default: /* ParityNone */ |
<> | 144:ef7eb2e8f9f7 | 893 | init.parity = usartNoParity; |
<> | 144:ef7eb2e8f9f7 | 894 | break; |
<> | 144:ef7eb2e8f9f7 | 895 | } |
<> | 144:ef7eb2e8f9f7 | 896 | |
<> | 144:ef7eb2e8f9f7 | 897 | USART_InitAsync(obj->serial.periph.uart, &init); |
<> | 144:ef7eb2e8f9f7 | 898 | |
<> | 144:ef7eb2e8f9f7 | 899 | /* Re-enable pins for UART at correct location */ |
<> | 144:ef7eb2e8f9f7 | 900 | serial_set_route(obj); |
<> | 144:ef7eb2e8f9f7 | 901 | |
<> | 144:ef7eb2e8f9f7 | 902 | /* Re-enable interrupts */ |
<> | 144:ef7eb2e8f9f7 | 903 | if(was_enabled != 0) { |
<> | 144:ef7eb2e8f9f7 | 904 | obj->serial.periph.uart->IFC = USART_IFC_TXC; |
<> | 144:ef7eb2e8f9f7 | 905 | obj->serial.periph.uart->IEN = enabled_interrupts; |
<> | 144:ef7eb2e8f9f7 | 906 | } |
<> | 144:ef7eb2e8f9f7 | 907 | } |
<> | 144:ef7eb2e8f9f7 | 908 | } |
<> | 144:ef7eb2e8f9f7 | 909 | |
<> | 144:ef7eb2e8f9f7 | 910 | /****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 911 | * INTERRUPTS * |
<> | 144:ef7eb2e8f9f7 | 912 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 913 | uint8_t serial_tx_ready(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 914 | { |
<> | 144:ef7eb2e8f9f7 | 915 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 916 | return (obj->serial.periph.leuart->STATUS & LEUART_STATUS_TXBL) ? true : false; |
<> | 144:ef7eb2e8f9f7 | 917 | } else { |
<> | 144:ef7eb2e8f9f7 | 918 | return (obj->serial.periph.uart->STATUS & USART_STATUS_TXBL) ? true : false; |
<> | 144:ef7eb2e8f9f7 | 919 | } |
<> | 144:ef7eb2e8f9f7 | 920 | } |
<> | 144:ef7eb2e8f9f7 | 921 | |
<> | 144:ef7eb2e8f9f7 | 922 | uint8_t serial_rx_ready(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 923 | { |
<> | 144:ef7eb2e8f9f7 | 924 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 925 | return (obj->serial.periph.leuart->STATUS & LEUART_STATUS_RXDATAV) ? true : false; |
<> | 144:ef7eb2e8f9f7 | 926 | } else { |
<> | 144:ef7eb2e8f9f7 | 927 | return (obj->serial.periph.uart->STATUS & USART_STATUS_RXDATAV) ? true : false; |
<> | 144:ef7eb2e8f9f7 | 928 | } |
<> | 144:ef7eb2e8f9f7 | 929 | } |
<> | 144:ef7eb2e8f9f7 | 930 | |
<> | 144:ef7eb2e8f9f7 | 931 | void serial_write_asynch(serial_t *obj, int data) |
<> | 144:ef7eb2e8f9f7 | 932 | { |
<> | 144:ef7eb2e8f9f7 | 933 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 934 | obj->serial.periph.leuart->TXDATA = (uint32_t)data; |
<> | 144:ef7eb2e8f9f7 | 935 | } else { |
<> | 144:ef7eb2e8f9f7 | 936 | obj->serial.periph.uart->TXDATA = (uint32_t)data; |
<> | 144:ef7eb2e8f9f7 | 937 | } |
<> | 144:ef7eb2e8f9f7 | 938 | } |
<> | 144:ef7eb2e8f9f7 | 939 | |
<> | 144:ef7eb2e8f9f7 | 940 | int serial_read_asynch(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 941 | { |
<> | 144:ef7eb2e8f9f7 | 942 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 943 | return (int)obj->serial.periph.leuart->RXDATA; |
<> | 144:ef7eb2e8f9f7 | 944 | } else { |
<> | 144:ef7eb2e8f9f7 | 945 | return (int)obj->serial.periph.uart->RXDATA; |
<> | 144:ef7eb2e8f9f7 | 946 | } |
<> | 144:ef7eb2e8f9f7 | 947 | } |
<> | 144:ef7eb2e8f9f7 | 948 | |
<> | 144:ef7eb2e8f9f7 | 949 | uint8_t serial_tx_int_flag(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 950 | { |
<> | 144:ef7eb2e8f9f7 | 951 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 952 | return (obj->serial.periph.leuart->IF & LEUART_IF_TXBL) ? true : false; |
<> | 144:ef7eb2e8f9f7 | 953 | } else { |
<> | 144:ef7eb2e8f9f7 | 954 | return (obj->serial.periph.uart->IF & USART_IF_TXBL) ? true : false; |
<> | 144:ef7eb2e8f9f7 | 955 | } |
<> | 144:ef7eb2e8f9f7 | 956 | } |
<> | 144:ef7eb2e8f9f7 | 957 | |
<> | 144:ef7eb2e8f9f7 | 958 | uint8_t serial_rx_int_flag(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 959 | { |
<> | 144:ef7eb2e8f9f7 | 960 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 961 | return (obj->serial.periph.leuart->IF & LEUART_IF_RXDATAV) ? true : false; |
<> | 144:ef7eb2e8f9f7 | 962 | } else { |
<> | 144:ef7eb2e8f9f7 | 963 | return (obj->serial.periph.uart->IF & USART_IF_RXDATAV) ? true : false; |
<> | 144:ef7eb2e8f9f7 | 964 | } |
<> | 144:ef7eb2e8f9f7 | 965 | } |
<> | 144:ef7eb2e8f9f7 | 966 | |
<> | 144:ef7eb2e8f9f7 | 967 | void serial_read_asynch_complete(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 968 | { |
<> | 144:ef7eb2e8f9f7 | 969 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 970 | obj->serial.periph.leuart->IFC |= LEUART_IFC_RXOF; // in case it got full |
<> | 144:ef7eb2e8f9f7 | 971 | } else { |
<> | 144:ef7eb2e8f9f7 | 972 | obj->serial.periph.uart->IFC |= USART_IFC_RXFULL; // in case it got full |
<> | 144:ef7eb2e8f9f7 | 973 | } |
<> | 144:ef7eb2e8f9f7 | 974 | } |
<> | 144:ef7eb2e8f9f7 | 975 | |
<> | 144:ef7eb2e8f9f7 | 976 | void serial_write_asynch_complete(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 977 | { |
<> | 144:ef7eb2e8f9f7 | 978 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 979 | obj->serial.periph.leuart->IFC |= LEUART_IFC_TXC; |
<> | 144:ef7eb2e8f9f7 | 980 | } else { |
<> | 144:ef7eb2e8f9f7 | 981 | obj->serial.periph.uart->IFC |= USART_IFC_TXC; |
<> | 144:ef7eb2e8f9f7 | 982 | } |
<> | 144:ef7eb2e8f9f7 | 983 | } |
<> | 144:ef7eb2e8f9f7 | 984 | |
<> | 144:ef7eb2e8f9f7 | 985 | /** Enable and set the interrupt handler for write (TX) |
<> | 144:ef7eb2e8f9f7 | 986 | * |
<> | 144:ef7eb2e8f9f7 | 987 | * @param obj The serial object |
<> | 144:ef7eb2e8f9f7 | 988 | * @param address The address of TX handler |
<> | 144:ef7eb2e8f9f7 | 989 | * @param enable Set to non-zero to enable or zero to disable |
<> | 144:ef7eb2e8f9f7 | 990 | */ |
<> | 144:ef7eb2e8f9f7 | 991 | void serial_write_enable_interrupt(serial_t *obj, uint32_t address, uint8_t enable) |
<> | 144:ef7eb2e8f9f7 | 992 | { |
<> | 144:ef7eb2e8f9f7 | 993 | NVIC_SetVector(serial_get_tx_irq_index(obj), address); |
<> | 144:ef7eb2e8f9f7 | 994 | serial_irq_set(obj, (SerialIrq)1, enable); |
<> | 144:ef7eb2e8f9f7 | 995 | } |
<> | 144:ef7eb2e8f9f7 | 996 | |
<> | 144:ef7eb2e8f9f7 | 997 | /** Enable and set the interrupt handler for read (RX) |
<> | 144:ef7eb2e8f9f7 | 998 | * |
<> | 144:ef7eb2e8f9f7 | 999 | * @param obj The serial object |
<> | 144:ef7eb2e8f9f7 | 1000 | * @param address The address of RX handler |
<> | 144:ef7eb2e8f9f7 | 1001 | * @param enable Set to non-zero to enable or zero to disable |
<> | 144:ef7eb2e8f9f7 | 1002 | */ |
<> | 144:ef7eb2e8f9f7 | 1003 | void serial_read_enable_interrupt(serial_t *obj, uint32_t address, uint8_t enable) |
<> | 144:ef7eb2e8f9f7 | 1004 | { |
<> | 144:ef7eb2e8f9f7 | 1005 | NVIC_SetVector(serial_get_rx_irq_index(obj), address); |
<> | 144:ef7eb2e8f9f7 | 1006 | serial_irq_set(obj, (SerialIrq)0, enable); |
<> | 144:ef7eb2e8f9f7 | 1007 | } |
<> | 144:ef7eb2e8f9f7 | 1008 | |
<> | 144:ef7eb2e8f9f7 | 1009 | uint8_t serial_interrupt_enabled(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 1010 | { |
<> | 144:ef7eb2e8f9f7 | 1011 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 1012 | return (obj->serial.periph.leuart->IEN & (LEUART_IEN_RXDATAV | LEUART_IEN_TXBL)) ? true : false; |
<> | 144:ef7eb2e8f9f7 | 1013 | } else { |
<> | 144:ef7eb2e8f9f7 | 1014 | return (obj->serial.periph.uart->IEN & (USART_IEN_RXDATAV | USART_IEN_TXBL)) ? true : false; |
<> | 144:ef7eb2e8f9f7 | 1015 | } |
<> | 144:ef7eb2e8f9f7 | 1016 | } |
<> | 144:ef7eb2e8f9f7 | 1017 | |
<> | 144:ef7eb2e8f9f7 | 1018 | /** |
<> | 144:ef7eb2e8f9f7 | 1019 | * Set handler for all serial interrupts (is probably SerialBase::_handler()) |
<> | 144:ef7eb2e8f9f7 | 1020 | * and store IRQ ID to be returned to the handler upon interrupt. ID is |
<> | 144:ef7eb2e8f9f7 | 1021 | * probably a pointer to the calling Serial object. |
<> | 144:ef7eb2e8f9f7 | 1022 | */ |
<> | 144:ef7eb2e8f9f7 | 1023 | void serial_irq_handler(serial_t *obj, uart_irq_handler handler, uint32_t id) |
<> | 144:ef7eb2e8f9f7 | 1024 | { |
<> | 144:ef7eb2e8f9f7 | 1025 | irq_handler = handler; |
<> | 144:ef7eb2e8f9f7 | 1026 | serial_irq_ids[serial_get_index(obj)] = id; |
<> | 144:ef7eb2e8f9f7 | 1027 | } |
<> | 144:ef7eb2e8f9f7 | 1028 | |
<> | 144:ef7eb2e8f9f7 | 1029 | /** |
<> | 144:ef7eb2e8f9f7 | 1030 | * Generic ISR for all UARTs, both TX and RX |
<> | 144:ef7eb2e8f9f7 | 1031 | */ |
<> | 144:ef7eb2e8f9f7 | 1032 | static void uart_irq(UARTName name, SerialIrq irq) |
<> | 144:ef7eb2e8f9f7 | 1033 | { |
<> | 144:ef7eb2e8f9f7 | 1034 | uint8_t index = serial_pointer_get_index((uint32_t)name); |
<> | 144:ef7eb2e8f9f7 | 1035 | if (serial_irq_ids[index] != 0) { |
<> | 144:ef7eb2e8f9f7 | 1036 | /* Pass interrupt on to mbed common handler */ |
<> | 144:ef7eb2e8f9f7 | 1037 | irq_handler(serial_irq_ids[index], irq); |
<> | 144:ef7eb2e8f9f7 | 1038 | /* Clearing interrupt not necessary */ |
<> | 144:ef7eb2e8f9f7 | 1039 | } |
<> | 144:ef7eb2e8f9f7 | 1040 | } |
<> | 144:ef7eb2e8f9f7 | 1041 | |
<> | 144:ef7eb2e8f9f7 | 1042 | /** |
<> | 144:ef7eb2e8f9f7 | 1043 | * Set ISR for a given UART and interrupt event (TX or RX) |
<> | 144:ef7eb2e8f9f7 | 1044 | */ |
<> | 144:ef7eb2e8f9f7 | 1045 | void serial_irq_set(serial_t *obj, SerialIrq irq, uint32_t enable) |
<> | 144:ef7eb2e8f9f7 | 1046 | { |
<> | 144:ef7eb2e8f9f7 | 1047 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 1048 | /* Enable or disable interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1049 | if (enable) { |
<> | 144:ef7eb2e8f9f7 | 1050 | if (irq == RxIrq) { /* RX */ |
<> | 144:ef7eb2e8f9f7 | 1051 | obj->serial.periph.leuart->IEN |= LEUART_IEN_RXDATAV; |
<> | 144:ef7eb2e8f9f7 | 1052 | NVIC_ClearPendingIRQ(serial_get_rx_irq_index(obj)); |
<> | 144:ef7eb2e8f9f7 | 1053 | NVIC_EnableIRQ(serial_get_rx_irq_index(obj)); |
<> | 144:ef7eb2e8f9f7 | 1054 | } else { /* TX */ |
<> | 144:ef7eb2e8f9f7 | 1055 | obj->serial.periph.leuart->IEN |= LEUART_IEN_TXC; |
<> | 144:ef7eb2e8f9f7 | 1056 | NVIC_ClearPendingIRQ(serial_get_tx_irq_index(obj)); |
<> | 144:ef7eb2e8f9f7 | 1057 | NVIC_SetPriority(serial_get_tx_irq_index(obj), 1); |
<> | 144:ef7eb2e8f9f7 | 1058 | NVIC_EnableIRQ(serial_get_tx_irq_index(obj)); |
<> | 144:ef7eb2e8f9f7 | 1059 | } |
<> | 144:ef7eb2e8f9f7 | 1060 | } else { |
<> | 144:ef7eb2e8f9f7 | 1061 | if (irq == RxIrq) { /* RX */ |
<> | 144:ef7eb2e8f9f7 | 1062 | obj->serial.periph.leuart->IEN &= ~LEUART_IEN_RXDATAV; |
<> | 144:ef7eb2e8f9f7 | 1063 | NVIC_DisableIRQ(serial_get_rx_irq_index(obj)); |
<> | 144:ef7eb2e8f9f7 | 1064 | } else { /* TX */ |
<> | 144:ef7eb2e8f9f7 | 1065 | obj->serial.periph.leuart->IEN &= ~LEUART_IEN_TXC; |
<> | 144:ef7eb2e8f9f7 | 1066 | NVIC_DisableIRQ(serial_get_tx_irq_index(obj)); |
<> | 144:ef7eb2e8f9f7 | 1067 | } |
<> | 144:ef7eb2e8f9f7 | 1068 | } |
<> | 144:ef7eb2e8f9f7 | 1069 | } else { |
<> | 144:ef7eb2e8f9f7 | 1070 | /* Enable or disable interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1071 | if (enable) { |
<> | 144:ef7eb2e8f9f7 | 1072 | if (irq == RxIrq) { /* RX */ |
<> | 144:ef7eb2e8f9f7 | 1073 | obj->serial.periph.uart->IEN |= USART_IEN_RXDATAV; |
<> | 144:ef7eb2e8f9f7 | 1074 | NVIC_ClearPendingIRQ(serial_get_rx_irq_index(obj)); |
<> | 144:ef7eb2e8f9f7 | 1075 | NVIC_EnableIRQ(serial_get_rx_irq_index(obj)); |
<> | 144:ef7eb2e8f9f7 | 1076 | } else { /* TX */ |
<> | 144:ef7eb2e8f9f7 | 1077 | obj->serial.periph.uart->IEN |= USART_IEN_TXC; |
<> | 144:ef7eb2e8f9f7 | 1078 | NVIC_ClearPendingIRQ(serial_get_tx_irq_index(obj)); |
<> | 144:ef7eb2e8f9f7 | 1079 | NVIC_SetPriority(serial_get_tx_irq_index(obj), 1); |
<> | 144:ef7eb2e8f9f7 | 1080 | NVIC_EnableIRQ(serial_get_tx_irq_index(obj)); |
<> | 144:ef7eb2e8f9f7 | 1081 | } |
<> | 144:ef7eb2e8f9f7 | 1082 | } else { |
<> | 144:ef7eb2e8f9f7 | 1083 | if (irq == RxIrq) { /* RX */ |
<> | 144:ef7eb2e8f9f7 | 1084 | obj->serial.periph.uart->IEN &= ~USART_IEN_RXDATAV; |
<> | 144:ef7eb2e8f9f7 | 1085 | NVIC_DisableIRQ(serial_get_rx_irq_index(obj)); |
<> | 144:ef7eb2e8f9f7 | 1086 | } else { /* TX */ |
<> | 144:ef7eb2e8f9f7 | 1087 | obj->serial.periph.uart->IEN &= ~USART_IEN_TXC; |
<> | 144:ef7eb2e8f9f7 | 1088 | NVIC_DisableIRQ(serial_get_tx_irq_index(obj)); |
<> | 144:ef7eb2e8f9f7 | 1089 | } |
<> | 144:ef7eb2e8f9f7 | 1090 | } |
<> | 144:ef7eb2e8f9f7 | 1091 | } |
<> | 144:ef7eb2e8f9f7 | 1092 | } |
<> | 144:ef7eb2e8f9f7 | 1093 | |
<> | 144:ef7eb2e8f9f7 | 1094 | /****************************************************************************** |
<> | 144:ef7eb2e8f9f7 | 1095 | * READ/WRITE * |
<> | 144:ef7eb2e8f9f7 | 1096 | ******************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 1097 | |
<> | 144:ef7eb2e8f9f7 | 1098 | /** |
<> | 144:ef7eb2e8f9f7 | 1099 | * Get one char from serial link |
<> | 144:ef7eb2e8f9f7 | 1100 | */ |
<> | 144:ef7eb2e8f9f7 | 1101 | int serial_getc(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 1102 | { |
<> | 144:ef7eb2e8f9f7 | 1103 | /* Emlib USART_Rx blocks until data is available, so we don't need to use |
<> | 144:ef7eb2e8f9f7 | 1104 | * serial_readable(). Use USART_RxDataGet() to read register directly. */ |
<> | 144:ef7eb2e8f9f7 | 1105 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 1106 | return LEUART_Rx(obj->serial.periph.leuart); |
<> | 144:ef7eb2e8f9f7 | 1107 | } else { |
<> | 144:ef7eb2e8f9f7 | 1108 | return USART_Rx(obj->serial.periph.uart); |
<> | 144:ef7eb2e8f9f7 | 1109 | } |
<> | 144:ef7eb2e8f9f7 | 1110 | } |
<> | 144:ef7eb2e8f9f7 | 1111 | |
<> | 144:ef7eb2e8f9f7 | 1112 | /* |
<> | 144:ef7eb2e8f9f7 | 1113 | * Send one char over serial link |
<> | 144:ef7eb2e8f9f7 | 1114 | */ |
<> | 144:ef7eb2e8f9f7 | 1115 | void serial_putc(serial_t *obj, int c) |
<> | 144:ef7eb2e8f9f7 | 1116 | { |
<> | 144:ef7eb2e8f9f7 | 1117 | /* Emlib USART_Tx blocks until buffer is writable (non-full), so we don't |
<> | 144:ef7eb2e8f9f7 | 1118 | * need to use serial_writable(). */ |
<> | 144:ef7eb2e8f9f7 | 1119 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 1120 | LEUART_Tx(obj->serial.periph.leuart, (uint8_t)(c)); |
<> | 144:ef7eb2e8f9f7 | 1121 | while (!(obj->serial.periph.leuart->STATUS & LEUART_STATUS_TXC)); |
<> | 144:ef7eb2e8f9f7 | 1122 | } else { |
<> | 144:ef7eb2e8f9f7 | 1123 | USART_Tx(obj->serial.periph.uart, (uint8_t)(c)); |
<> | 144:ef7eb2e8f9f7 | 1124 | while (!(obj->serial.periph.uart->STATUS & USART_STATUS_TXC)); |
<> | 144:ef7eb2e8f9f7 | 1125 | } |
<> | 144:ef7eb2e8f9f7 | 1126 | } |
<> | 144:ef7eb2e8f9f7 | 1127 | |
<> | 144:ef7eb2e8f9f7 | 1128 | /** |
<> | 144:ef7eb2e8f9f7 | 1129 | * Check if data is available in RX data vector |
<> | 144:ef7eb2e8f9f7 | 1130 | */ |
<> | 144:ef7eb2e8f9f7 | 1131 | int serial_readable(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 1132 | { |
<> | 144:ef7eb2e8f9f7 | 1133 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 1134 | return obj->serial.periph.leuart->STATUS & LEUART_STATUS_RXDATAV; |
<> | 144:ef7eb2e8f9f7 | 1135 | } else { |
<> | 144:ef7eb2e8f9f7 | 1136 | return obj->serial.periph.uart->STATUS & USART_STATUS_RXDATAV; |
<> | 144:ef7eb2e8f9f7 | 1137 | } |
<> | 144:ef7eb2e8f9f7 | 1138 | } |
<> | 144:ef7eb2e8f9f7 | 1139 | |
<> | 144:ef7eb2e8f9f7 | 1140 | /** |
<> | 144:ef7eb2e8f9f7 | 1141 | * Check if TX buffer is empty |
<> | 144:ef7eb2e8f9f7 | 1142 | */ |
<> | 144:ef7eb2e8f9f7 | 1143 | int serial_writable(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 1144 | { |
<> | 144:ef7eb2e8f9f7 | 1145 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 1146 | return obj->serial.periph.leuart->STATUS & LEUART_STATUS_TXBL; |
<> | 144:ef7eb2e8f9f7 | 1147 | } else { |
<> | 144:ef7eb2e8f9f7 | 1148 | return obj->serial.periph.uart->STATUS & USART_STATUS_TXBL; |
<> | 144:ef7eb2e8f9f7 | 1149 | } |
<> | 144:ef7eb2e8f9f7 | 1150 | } |
<> | 144:ef7eb2e8f9f7 | 1151 | |
<> | 144:ef7eb2e8f9f7 | 1152 | /** |
<> | 144:ef7eb2e8f9f7 | 1153 | * Clear UART interrupts |
<> | 144:ef7eb2e8f9f7 | 1154 | */ |
<> | 144:ef7eb2e8f9f7 | 1155 | void serial_clear(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 1156 | { |
<> | 144:ef7eb2e8f9f7 | 1157 | /* Interrupts automatically clear when condition is not met anymore */ |
<> | 144:ef7eb2e8f9f7 | 1158 | } |
<> | 144:ef7eb2e8f9f7 | 1159 | |
<> | 144:ef7eb2e8f9f7 | 1160 | void serial_break_set(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 1161 | { |
<> | 144:ef7eb2e8f9f7 | 1162 | /* Send transmission break */ |
<> | 144:ef7eb2e8f9f7 | 1163 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 1164 | obj->serial.periph.leuart->TXDATAX = LEUART_TXDATAX_TXBREAK; |
<> | 144:ef7eb2e8f9f7 | 1165 | } else { |
<> | 144:ef7eb2e8f9f7 | 1166 | obj->serial.periph.uart->TXDATAX = USART_TXDATAX_TXBREAK; |
<> | 144:ef7eb2e8f9f7 | 1167 | } |
<> | 144:ef7eb2e8f9f7 | 1168 | } |
<> | 144:ef7eb2e8f9f7 | 1169 | |
<> | 144:ef7eb2e8f9f7 | 1170 | void serial_break_clear(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 1171 | { |
<> | 144:ef7eb2e8f9f7 | 1172 | /* No need to clear break, it is automatically cleared after one frame. |
<> | 144:ef7eb2e8f9f7 | 1173 | * From the reference manual: |
<> | 144:ef7eb2e8f9f7 | 1174 | * |
<> | 144:ef7eb2e8f9f7 | 1175 | * By setting TXBREAK, the output will be held low during the stop-bit |
<> | 144:ef7eb2e8f9f7 | 1176 | * period to generate a framing error. A receiver that supports break |
<> | 144:ef7eb2e8f9f7 | 1177 | * detection detects this state, allowing it to be used e.g. for framing |
<> | 144:ef7eb2e8f9f7 | 1178 | * of larger data packets. The line is driven high before the next frame |
<> | 144:ef7eb2e8f9f7 | 1179 | * is transmitted so the next start condition can be identified correctly |
<> | 144:ef7eb2e8f9f7 | 1180 | * by the recipient. Continuous breaks lasting longer than a USART frame |
<> | 144:ef7eb2e8f9f7 | 1181 | * are thus not supported by the USART. GPIO can be used for this. |
<> | 144:ef7eb2e8f9f7 | 1182 | */ |
<> | 144:ef7eb2e8f9f7 | 1183 | } |
<> | 144:ef7eb2e8f9f7 | 1184 | |
<> | 144:ef7eb2e8f9f7 | 1185 | void serial_pinout_tx(PinName tx) |
<> | 144:ef7eb2e8f9f7 | 1186 | { |
<> | 144:ef7eb2e8f9f7 | 1187 | /* 0x10 sets DOUT high. Prevents false start. */ |
<> | 144:ef7eb2e8f9f7 | 1188 | pin_mode(tx, PushPull | 0x10); |
<> | 144:ef7eb2e8f9f7 | 1189 | } |
<> | 144:ef7eb2e8f9f7 | 1190 | |
<> | 144:ef7eb2e8f9f7 | 1191 | /************************************************************************************ |
<> | 144:ef7eb2e8f9f7 | 1192 | * DMA helper functions * |
<> | 144:ef7eb2e8f9f7 | 1193 | ************************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 1194 | /****************************************** |
<> | 144:ef7eb2e8f9f7 | 1195 | * static void serial_dmaTransferComplete(uint channel, bool primary, void* user) |
<> | 144:ef7eb2e8f9f7 | 1196 | * |
<> | 144:ef7eb2e8f9f7 | 1197 | * Callback function which gets called upon DMA transfer completion |
<> | 144:ef7eb2e8f9f7 | 1198 | * the user-defined pointer is pointing to the CPP-land thunk |
<> | 144:ef7eb2e8f9f7 | 1199 | ******************************************/ |
<> | 144:ef7eb2e8f9f7 | 1200 | static void serial_dmaTransferComplete(unsigned int channel, bool primary, void *user) |
<> | 144:ef7eb2e8f9f7 | 1201 | { |
<> | 144:ef7eb2e8f9f7 | 1202 | /* Store information about which channel triggered because CPP doesn't take arguments */ |
<> | 144:ef7eb2e8f9f7 | 1203 | serial_dma_irq_fired[channel] = true; |
<> | 144:ef7eb2e8f9f7 | 1204 | |
<> | 144:ef7eb2e8f9f7 | 1205 | /* User pointer should be a thunk to CPP land */ |
<> | 144:ef7eb2e8f9f7 | 1206 | if (user != NULL) { |
<> | 144:ef7eb2e8f9f7 | 1207 | ((DMACallback)user)(); |
<> | 144:ef7eb2e8f9f7 | 1208 | } |
<> | 144:ef7eb2e8f9f7 | 1209 | } |
<> | 144:ef7eb2e8f9f7 | 1210 | |
<> | 144:ef7eb2e8f9f7 | 1211 | #ifndef LDMA_PRESENT |
<> | 144:ef7eb2e8f9f7 | 1212 | |
<> | 144:ef7eb2e8f9f7 | 1213 | /****************************************** |
<> | 144:ef7eb2e8f9f7 | 1214 | * static void serial_setupDmaChannel(serial_t *obj, bool tx_nrx) |
<> | 144:ef7eb2e8f9f7 | 1215 | * |
<> | 144:ef7eb2e8f9f7 | 1216 | * Sets up the DMA configuration block for the assigned channel |
<> | 144:ef7eb2e8f9f7 | 1217 | * tx_nrx: true if configuring TX, false if configuring RX. |
<> | 144:ef7eb2e8f9f7 | 1218 | ******************************************/ |
<> | 144:ef7eb2e8f9f7 | 1219 | static void serial_dmaSetupChannel(serial_t *obj, bool tx_nrx) |
<> | 144:ef7eb2e8f9f7 | 1220 | { |
<> | 144:ef7eb2e8f9f7 | 1221 | DMA_CfgChannel_TypeDef channelConfig; |
<> | 144:ef7eb2e8f9f7 | 1222 | |
<> | 144:ef7eb2e8f9f7 | 1223 | if(tx_nrx) { |
<> | 144:ef7eb2e8f9f7 | 1224 | //setup TX channel |
<> | 144:ef7eb2e8f9f7 | 1225 | channelConfig.highPri = false; |
<> | 144:ef7eb2e8f9f7 | 1226 | channelConfig.enableInt = true; |
<> | 144:ef7eb2e8f9f7 | 1227 | channelConfig.cb = &(obj->serial.dmaOptionsTX.dmaCallback); |
<> | 144:ef7eb2e8f9f7 | 1228 | |
<> | 144:ef7eb2e8f9f7 | 1229 | switch((uint32_t)(obj->serial.periph.uart)) { |
<> | 144:ef7eb2e8f9f7 | 1230 | #ifdef UART0 |
<> | 144:ef7eb2e8f9f7 | 1231 | case UART_0: |
<> | 144:ef7eb2e8f9f7 | 1232 | channelConfig.select = DMAREQ_UART0_TXBL; |
<> | 144:ef7eb2e8f9f7 | 1233 | break; |
<> | 144:ef7eb2e8f9f7 | 1234 | #endif |
<> | 144:ef7eb2e8f9f7 | 1235 | #ifdef UART1 |
<> | 144:ef7eb2e8f9f7 | 1236 | case UART_1: |
<> | 144:ef7eb2e8f9f7 | 1237 | channelConfig.select = DMAREQ_UART1_TXBL; |
<> | 144:ef7eb2e8f9f7 | 1238 | break; |
<> | 144:ef7eb2e8f9f7 | 1239 | #endif |
<> | 144:ef7eb2e8f9f7 | 1240 | #ifdef USART0 |
<> | 144:ef7eb2e8f9f7 | 1241 | case USART_0: |
<> | 144:ef7eb2e8f9f7 | 1242 | channelConfig.select = DMAREQ_USART0_TXBL; |
<> | 144:ef7eb2e8f9f7 | 1243 | break; |
<> | 144:ef7eb2e8f9f7 | 1244 | #endif |
<> | 144:ef7eb2e8f9f7 | 1245 | #ifdef USART1 |
<> | 144:ef7eb2e8f9f7 | 1246 | case USART_1: |
<> | 144:ef7eb2e8f9f7 | 1247 | channelConfig.select = DMAREQ_USART1_TXBL; |
<> | 144:ef7eb2e8f9f7 | 1248 | break; |
<> | 144:ef7eb2e8f9f7 | 1249 | #endif |
<> | 144:ef7eb2e8f9f7 | 1250 | #ifdef USART2 |
<> | 144:ef7eb2e8f9f7 | 1251 | case USART_2: |
<> | 144:ef7eb2e8f9f7 | 1252 | channelConfig.select = DMAREQ_USART2_TXBL; |
<> | 144:ef7eb2e8f9f7 | 1253 | break; |
<> | 144:ef7eb2e8f9f7 | 1254 | #endif |
AnnaBridge | 179:b0033dcd6934 | 1255 | #ifdef USART3 |
AnnaBridge | 179:b0033dcd6934 | 1256 | case USART_3: |
AnnaBridge | 179:b0033dcd6934 | 1257 | channelConfig.select = DMAREQ_USART3_TXBL; |
AnnaBridge | 179:b0033dcd6934 | 1258 | break; |
AnnaBridge | 179:b0033dcd6934 | 1259 | #endif |
AnnaBridge | 179:b0033dcd6934 | 1260 | #ifdef USART4 |
AnnaBridge | 179:b0033dcd6934 | 1261 | case USART_4: |
AnnaBridge | 179:b0033dcd6934 | 1262 | channelConfig.select = DMAREQ_USART4_TXBL; |
AnnaBridge | 179:b0033dcd6934 | 1263 | break; |
AnnaBridge | 179:b0033dcd6934 | 1264 | #endif |
AnnaBridge | 179:b0033dcd6934 | 1265 | #ifdef USART5 |
AnnaBridge | 179:b0033dcd6934 | 1266 | case USART_5: |
AnnaBridge | 179:b0033dcd6934 | 1267 | channelConfig.select = DMAREQ_USART5_TXBL; |
AnnaBridge | 179:b0033dcd6934 | 1268 | break; |
AnnaBridge | 179:b0033dcd6934 | 1269 | #endif |
<> | 144:ef7eb2e8f9f7 | 1270 | #ifdef LEUART0 |
<> | 144:ef7eb2e8f9f7 | 1271 | case LEUART_0: |
<> | 144:ef7eb2e8f9f7 | 1272 | channelConfig.select = DMAREQ_LEUART0_TXBL; |
<> | 144:ef7eb2e8f9f7 | 1273 | break; |
<> | 144:ef7eb2e8f9f7 | 1274 | #endif |
<> | 144:ef7eb2e8f9f7 | 1275 | #ifdef LEUART1 |
<> | 144:ef7eb2e8f9f7 | 1276 | case LEUART_1: |
<> | 144:ef7eb2e8f9f7 | 1277 | channelConfig.select = DMAREQ_LEUART1_TXBL; |
<> | 144:ef7eb2e8f9f7 | 1278 | break; |
<> | 144:ef7eb2e8f9f7 | 1279 | #endif |
<> | 144:ef7eb2e8f9f7 | 1280 | } |
<> | 144:ef7eb2e8f9f7 | 1281 | |
<> | 144:ef7eb2e8f9f7 | 1282 | DMA_CfgChannel(obj->serial.dmaOptionsTX.dmaChannel, &channelConfig); |
<> | 144:ef7eb2e8f9f7 | 1283 | } else { |
<> | 144:ef7eb2e8f9f7 | 1284 | //setup RX channel |
<> | 144:ef7eb2e8f9f7 | 1285 | channelConfig.highPri = true; |
<> | 144:ef7eb2e8f9f7 | 1286 | channelConfig.enableInt = true; |
<> | 144:ef7eb2e8f9f7 | 1287 | channelConfig.cb = &(obj->serial.dmaOptionsRX.dmaCallback); |
<> | 144:ef7eb2e8f9f7 | 1288 | |
<> | 144:ef7eb2e8f9f7 | 1289 | switch((uint32_t)(obj->serial.periph.uart)) { |
<> | 144:ef7eb2e8f9f7 | 1290 | #ifdef UART0 |
<> | 144:ef7eb2e8f9f7 | 1291 | case UART_0: |
<> | 144:ef7eb2e8f9f7 | 1292 | channelConfig.select = DMAREQ_UART0_RXDATAV; |
<> | 144:ef7eb2e8f9f7 | 1293 | break; |
<> | 144:ef7eb2e8f9f7 | 1294 | #endif |
<> | 144:ef7eb2e8f9f7 | 1295 | #ifdef UART1 |
<> | 144:ef7eb2e8f9f7 | 1296 | case UART_1: |
<> | 144:ef7eb2e8f9f7 | 1297 | channelConfig.select = DMAREQ_UART1_RXDATAV; |
<> | 144:ef7eb2e8f9f7 | 1298 | break; |
<> | 144:ef7eb2e8f9f7 | 1299 | #endif |
<> | 144:ef7eb2e8f9f7 | 1300 | #ifdef USART0 |
<> | 144:ef7eb2e8f9f7 | 1301 | case USART_0: |
<> | 144:ef7eb2e8f9f7 | 1302 | channelConfig.select = DMAREQ_USART0_RXDATAV; |
<> | 144:ef7eb2e8f9f7 | 1303 | break; |
<> | 144:ef7eb2e8f9f7 | 1304 | #endif |
<> | 144:ef7eb2e8f9f7 | 1305 | #ifdef USART1 |
<> | 144:ef7eb2e8f9f7 | 1306 | case USART_1: |
<> | 144:ef7eb2e8f9f7 | 1307 | channelConfig.select = DMAREQ_USART1_RXDATAV; |
<> | 144:ef7eb2e8f9f7 | 1308 | break; |
<> | 144:ef7eb2e8f9f7 | 1309 | #endif |
<> | 144:ef7eb2e8f9f7 | 1310 | #ifdef USART2 |
<> | 144:ef7eb2e8f9f7 | 1311 | case USART_2: |
<> | 144:ef7eb2e8f9f7 | 1312 | channelConfig.select = DMAREQ_USART2_RXDATAV; |
<> | 144:ef7eb2e8f9f7 | 1313 | break; |
<> | 144:ef7eb2e8f9f7 | 1314 | #endif |
AnnaBridge | 179:b0033dcd6934 | 1315 | #ifdef USART3 |
AnnaBridge | 179:b0033dcd6934 | 1316 | case USART_3: |
AnnaBridge | 179:b0033dcd6934 | 1317 | channelConfig.select = DMAREQ_USART3_RXDATAV; |
AnnaBridge | 179:b0033dcd6934 | 1318 | break; |
AnnaBridge | 179:b0033dcd6934 | 1319 | #endif |
AnnaBridge | 179:b0033dcd6934 | 1320 | #ifdef USART4 |
AnnaBridge | 179:b0033dcd6934 | 1321 | case USART_4: |
AnnaBridge | 179:b0033dcd6934 | 1322 | channelConfig.select = DMAREQ_USART4_RXDATAV; |
AnnaBridge | 179:b0033dcd6934 | 1323 | break; |
AnnaBridge | 179:b0033dcd6934 | 1324 | #endif |
AnnaBridge | 179:b0033dcd6934 | 1325 | #ifdef USART5 |
AnnaBridge | 179:b0033dcd6934 | 1326 | case USART_5: |
AnnaBridge | 179:b0033dcd6934 | 1327 | channelConfig.select = DMAREQ_USART5_RXDATAV; |
AnnaBridge | 179:b0033dcd6934 | 1328 | break; |
AnnaBridge | 179:b0033dcd6934 | 1329 | #endif |
<> | 144:ef7eb2e8f9f7 | 1330 | #ifdef LEUART0 |
<> | 144:ef7eb2e8f9f7 | 1331 | case LEUART_0: |
<> | 144:ef7eb2e8f9f7 | 1332 | channelConfig.select = DMAREQ_LEUART0_RXDATAV; |
<> | 144:ef7eb2e8f9f7 | 1333 | break; |
<> | 144:ef7eb2e8f9f7 | 1334 | #endif |
<> | 144:ef7eb2e8f9f7 | 1335 | #ifdef LEUART1 |
<> | 144:ef7eb2e8f9f7 | 1336 | case LEUART_1: |
<> | 144:ef7eb2e8f9f7 | 1337 | channelConfig.select = DMAREQ_LEUART1_RXDATAV; |
<> | 144:ef7eb2e8f9f7 | 1338 | break; |
<> | 144:ef7eb2e8f9f7 | 1339 | #endif |
<> | 144:ef7eb2e8f9f7 | 1340 | } |
<> | 144:ef7eb2e8f9f7 | 1341 | |
<> | 144:ef7eb2e8f9f7 | 1342 | DMA_CfgChannel(obj->serial.dmaOptionsRX.dmaChannel, &channelConfig); |
<> | 144:ef7eb2e8f9f7 | 1343 | } |
<> | 144:ef7eb2e8f9f7 | 1344 | } |
<> | 144:ef7eb2e8f9f7 | 1345 | |
<> | 144:ef7eb2e8f9f7 | 1346 | #endif /* LDMA_PRESENT */ |
<> | 144:ef7eb2e8f9f7 | 1347 | |
<> | 144:ef7eb2e8f9f7 | 1348 | /****************************************** |
<> | 144:ef7eb2e8f9f7 | 1349 | * static void serial_dmaTrySetState(DMA_OPTIONS_t *obj, DMAUsage requestedState) |
<> | 144:ef7eb2e8f9f7 | 1350 | * |
<> | 144:ef7eb2e8f9f7 | 1351 | * Tries to set the passed DMA state to the requested state. |
<> | 144:ef7eb2e8f9f7 | 1352 | * |
<> | 144:ef7eb2e8f9f7 | 1353 | * requested state possibilities: |
<> | 144:ef7eb2e8f9f7 | 1354 | * * NEVER: |
<> | 144:ef7eb2e8f9f7 | 1355 | * if the previous state was always, will deallocate the channel |
<> | 144:ef7eb2e8f9f7 | 1356 | * * OPPORTUNISTIC: |
<> | 144:ef7eb2e8f9f7 | 1357 | * If the previous state was always, will reuse that channel but free upon next completion. |
<> | 144:ef7eb2e8f9f7 | 1358 | * If not, will try to acquire a channel. |
<> | 144:ef7eb2e8f9f7 | 1359 | * When allocated, state changes to DMA_USAGE_TEMPORARY_ALLOCATED. |
<> | 144:ef7eb2e8f9f7 | 1360 | * * ALWAYS: |
<> | 144:ef7eb2e8f9f7 | 1361 | * Will try to allocate a channel and keep it. |
<> | 144:ef7eb2e8f9f7 | 1362 | * If succesfully allocated, state changes to DMA_USAGE_ALLOCATED. |
<> | 144:ef7eb2e8f9f7 | 1363 | ******************************************/ |
<> | 144:ef7eb2e8f9f7 | 1364 | static void serial_dmaTrySetState(DMA_OPTIONS_t *obj, DMAUsage requestedState, serial_t *serialPtr, bool tx_nrx) |
<> | 144:ef7eb2e8f9f7 | 1365 | { |
<> | 144:ef7eb2e8f9f7 | 1366 | DMAUsage currentState = obj->dmaUsageState; |
<> | 144:ef7eb2e8f9f7 | 1367 | int tempDMAChannel = -1; |
<> | 144:ef7eb2e8f9f7 | 1368 | |
<> | 144:ef7eb2e8f9f7 | 1369 | if ((requestedState == DMA_USAGE_ALWAYS) && (currentState != DMA_USAGE_ALLOCATED)) { |
<> | 144:ef7eb2e8f9f7 | 1370 | /* Try to allocate channel */ |
<> | 144:ef7eb2e8f9f7 | 1371 | tempDMAChannel = dma_channel_allocate(DMA_CAP_NONE); |
<> | 144:ef7eb2e8f9f7 | 1372 | if(tempDMAChannel >= 0) { |
<> | 144:ef7eb2e8f9f7 | 1373 | obj->dmaChannel = tempDMAChannel; |
<> | 144:ef7eb2e8f9f7 | 1374 | obj->dmaUsageState = DMA_USAGE_ALLOCATED; |
<> | 144:ef7eb2e8f9f7 | 1375 | dma_init(); |
<> | 144:ef7eb2e8f9f7 | 1376 | serial_dmaSetupChannel(serialPtr, tx_nrx); |
<> | 144:ef7eb2e8f9f7 | 1377 | } |
<> | 144:ef7eb2e8f9f7 | 1378 | } else if (requestedState == DMA_USAGE_OPPORTUNISTIC) { |
<> | 144:ef7eb2e8f9f7 | 1379 | if (currentState == DMA_USAGE_ALLOCATED) { |
<> | 144:ef7eb2e8f9f7 | 1380 | /* Channels have already been allocated previously by an ALWAYS state, so after this transfer, we will release them */ |
<> | 144:ef7eb2e8f9f7 | 1381 | obj->dmaUsageState = DMA_USAGE_TEMPORARY_ALLOCATED; |
<> | 144:ef7eb2e8f9f7 | 1382 | } else { |
<> | 144:ef7eb2e8f9f7 | 1383 | /* Try to allocate channel */ |
<> | 144:ef7eb2e8f9f7 | 1384 | tempDMAChannel = dma_channel_allocate(DMA_CAP_NONE); |
<> | 144:ef7eb2e8f9f7 | 1385 | if(tempDMAChannel >= 0) { |
<> | 144:ef7eb2e8f9f7 | 1386 | obj->dmaChannel = tempDMAChannel; |
<> | 144:ef7eb2e8f9f7 | 1387 | obj->dmaUsageState = DMA_USAGE_TEMPORARY_ALLOCATED; |
<> | 144:ef7eb2e8f9f7 | 1388 | dma_init(); |
<> | 144:ef7eb2e8f9f7 | 1389 | serial_dmaSetupChannel(serialPtr, tx_nrx); |
<> | 144:ef7eb2e8f9f7 | 1390 | } |
<> | 144:ef7eb2e8f9f7 | 1391 | } |
<> | 144:ef7eb2e8f9f7 | 1392 | } else if (requestedState == DMA_USAGE_NEVER) { |
<> | 144:ef7eb2e8f9f7 | 1393 | /* If channel is allocated, get rid of it */ |
<> | 144:ef7eb2e8f9f7 | 1394 | dma_channel_free(obj->dmaChannel); |
<> | 144:ef7eb2e8f9f7 | 1395 | obj->dmaChannel = -1; |
<> | 144:ef7eb2e8f9f7 | 1396 | obj->dmaUsageState = DMA_USAGE_NEVER; |
<> | 144:ef7eb2e8f9f7 | 1397 | } |
<> | 144:ef7eb2e8f9f7 | 1398 | } |
<> | 144:ef7eb2e8f9f7 | 1399 | |
<> | 144:ef7eb2e8f9f7 | 1400 | #ifndef LDMA_PRESENT |
<> | 144:ef7eb2e8f9f7 | 1401 | |
<> | 144:ef7eb2e8f9f7 | 1402 | static void serial_dmaActivate(serial_t *obj, void* cb, void* buffer, int length, bool tx_nrx) |
<> | 144:ef7eb2e8f9f7 | 1403 | { |
<> | 144:ef7eb2e8f9f7 | 1404 | DMA_CfgDescr_TypeDef channelConfig; |
<> | 144:ef7eb2e8f9f7 | 1405 | |
<> | 144:ef7eb2e8f9f7 | 1406 | if(tx_nrx) { |
<> | 144:ef7eb2e8f9f7 | 1407 | // Set DMA callback |
<> | 144:ef7eb2e8f9f7 | 1408 | obj->serial.dmaOptionsTX.dmaCallback.cbFunc = serial_dmaTransferComplete; |
<> | 144:ef7eb2e8f9f7 | 1409 | obj->serial.dmaOptionsTX.dmaCallback.userPtr = NULL; |
<> | 144:ef7eb2e8f9f7 | 1410 | |
<> | 144:ef7eb2e8f9f7 | 1411 | // Set up configuration structure |
<> | 144:ef7eb2e8f9f7 | 1412 | channelConfig.dstInc = dmaDataIncNone; |
<> | 144:ef7eb2e8f9f7 | 1413 | channelConfig.srcInc = dmaDataInc1; |
<> | 144:ef7eb2e8f9f7 | 1414 | channelConfig.size = dmaDataSize1; |
<> | 144:ef7eb2e8f9f7 | 1415 | channelConfig.arbRate = dmaArbitrate1; |
<> | 144:ef7eb2e8f9f7 | 1416 | channelConfig.hprot = 0; |
<> | 144:ef7eb2e8f9f7 | 1417 | |
<> | 144:ef7eb2e8f9f7 | 1418 | // Clear TXC |
<> | 144:ef7eb2e8f9f7 | 1419 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 1420 | LEUART_IntClear(obj->serial.periph.leuart, LEUART_IFC_TXC); |
<> | 144:ef7eb2e8f9f7 | 1421 | } else { |
<> | 144:ef7eb2e8f9f7 | 1422 | USART_IntClear(obj->serial.periph.uart, USART_IFC_TXC); |
<> | 144:ef7eb2e8f9f7 | 1423 | } |
<> | 144:ef7eb2e8f9f7 | 1424 | |
<> | 144:ef7eb2e8f9f7 | 1425 | // Set callback and enable TXC. This will fire once the |
<> | 144:ef7eb2e8f9f7 | 1426 | // serial transfer finishes |
<> | 144:ef7eb2e8f9f7 | 1427 | NVIC_SetVector(serial_get_tx_irq_index(obj), (uint32_t)cb); |
<> | 144:ef7eb2e8f9f7 | 1428 | serial_irq_set(obj, TxIrq, true); |
<> | 144:ef7eb2e8f9f7 | 1429 | |
<> | 144:ef7eb2e8f9f7 | 1430 | DMA_CfgDescr(obj->serial.dmaOptionsTX.dmaChannel, true, &channelConfig); |
<> | 144:ef7eb2e8f9f7 | 1431 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 1432 | // Activate TX and clear TX buffer (note that clear must be done |
<> | 144:ef7eb2e8f9f7 | 1433 | // separately and before TXEN or DMA will die on some platforms) |
<> | 144:ef7eb2e8f9f7 | 1434 | obj->serial.periph.leuart->CMD = LEUART_CMD_CLEARTX; |
<> | 144:ef7eb2e8f9f7 | 1435 | obj->serial.periph.leuart->CMD = LEUART_CMD_TXEN; |
<> | 144:ef7eb2e8f9f7 | 1436 | while(obj->serial.periph.leuart->SYNCBUSY & LEUART_SYNCBUSY_CMD); |
<> | 144:ef7eb2e8f9f7 | 1437 | |
<> | 144:ef7eb2e8f9f7 | 1438 | // Kick off TX DMA |
<> | 144:ef7eb2e8f9f7 | 1439 | DMA_ActivateBasic(obj->serial.dmaOptionsTX.dmaChannel, true, false, (void*) &(obj->serial.periph.leuart->TXDATA), buffer, length - 1); |
<> | 144:ef7eb2e8f9f7 | 1440 | } else { |
<> | 144:ef7eb2e8f9f7 | 1441 | // Activate TX amd clear TX buffer |
<> | 144:ef7eb2e8f9f7 | 1442 | obj->serial.periph.uart->CMD = USART_CMD_TXEN | USART_CMD_CLEARTX; |
<> | 144:ef7eb2e8f9f7 | 1443 | |
<> | 144:ef7eb2e8f9f7 | 1444 | // Kick off TX DMA |
<> | 144:ef7eb2e8f9f7 | 1445 | DMA_ActivateBasic(obj->serial.dmaOptionsTX.dmaChannel, true, false, (void*) &(obj->serial.periph.uart->TXDATA), buffer, length - 1); |
<> | 144:ef7eb2e8f9f7 | 1446 | } |
<> | 144:ef7eb2e8f9f7 | 1447 | |
<> | 144:ef7eb2e8f9f7 | 1448 | |
<> | 144:ef7eb2e8f9f7 | 1449 | } else { |
<> | 144:ef7eb2e8f9f7 | 1450 | // Set DMA callback |
<> | 144:ef7eb2e8f9f7 | 1451 | obj->serial.dmaOptionsRX.dmaCallback.cbFunc = serial_dmaTransferComplete; |
<> | 144:ef7eb2e8f9f7 | 1452 | obj->serial.dmaOptionsRX.dmaCallback.userPtr = cb; |
<> | 144:ef7eb2e8f9f7 | 1453 | |
<> | 144:ef7eb2e8f9f7 | 1454 | // Set up configuration structure |
<> | 144:ef7eb2e8f9f7 | 1455 | channelConfig.dstInc = dmaDataInc1; |
<> | 144:ef7eb2e8f9f7 | 1456 | channelConfig.srcInc = dmaDataIncNone; |
<> | 144:ef7eb2e8f9f7 | 1457 | channelConfig.size = dmaDataSize1; |
<> | 144:ef7eb2e8f9f7 | 1458 | channelConfig.arbRate = dmaArbitrate1; |
<> | 144:ef7eb2e8f9f7 | 1459 | channelConfig.hprot = 0; |
<> | 144:ef7eb2e8f9f7 | 1460 | |
<> | 144:ef7eb2e8f9f7 | 1461 | DMA_CfgDescr(obj->serial.dmaOptionsRX.dmaChannel, true, &channelConfig); |
<> | 144:ef7eb2e8f9f7 | 1462 | |
<> | 144:ef7eb2e8f9f7 | 1463 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 1464 | // Activate RX and clear RX buffer |
<> | 144:ef7eb2e8f9f7 | 1465 | obj->serial.periph.leuart->CMD = LEUART_CMD_CLEARRX; |
<> | 144:ef7eb2e8f9f7 | 1466 | obj->serial.periph.leuart->CMD = LEUART_CMD_RXEN; |
<> | 144:ef7eb2e8f9f7 | 1467 | while(obj->serial.periph.leuart->SYNCBUSY & LEUART_SYNCBUSY_CMD); |
<> | 144:ef7eb2e8f9f7 | 1468 | |
<> | 144:ef7eb2e8f9f7 | 1469 | // Kick off RX DMA |
<> | 144:ef7eb2e8f9f7 | 1470 | DMA_ActivateBasic(obj->serial.dmaOptionsRX.dmaChannel, true, false, buffer, (void*) &(obj->serial.periph.leuart->RXDATA), length - 1); |
<> | 144:ef7eb2e8f9f7 | 1471 | } else { |
<> | 144:ef7eb2e8f9f7 | 1472 | // Activate RX and clear RX buffer |
<> | 144:ef7eb2e8f9f7 | 1473 | obj->serial.periph.uart->CMD = USART_CMD_RXEN | USART_CMD_CLEARRX; |
<> | 144:ef7eb2e8f9f7 | 1474 | |
<> | 144:ef7eb2e8f9f7 | 1475 | // Kick off RX DMA |
<> | 144:ef7eb2e8f9f7 | 1476 | DMA_ActivateBasic(obj->serial.dmaOptionsRX.dmaChannel, true, false, buffer, (void*) &(obj->serial.periph.uart->RXDATA), length - 1); |
<> | 144:ef7eb2e8f9f7 | 1477 | } |
<> | 144:ef7eb2e8f9f7 | 1478 | } |
<> | 144:ef7eb2e8f9f7 | 1479 | } |
<> | 144:ef7eb2e8f9f7 | 1480 | |
<> | 144:ef7eb2e8f9f7 | 1481 | #endif |
<> | 144:ef7eb2e8f9f7 | 1482 | |
<> | 144:ef7eb2e8f9f7 | 1483 | |
<> | 144:ef7eb2e8f9f7 | 1484 | #ifdef LDMA_PRESENT |
<> | 144:ef7eb2e8f9f7 | 1485 | |
<> | 144:ef7eb2e8f9f7 | 1486 | static void serial_dmaSetupChannel(serial_t *obj, bool tx_nrx) |
<> | 144:ef7eb2e8f9f7 | 1487 | { |
<> | 144:ef7eb2e8f9f7 | 1488 | } |
<> | 144:ef7eb2e8f9f7 | 1489 | |
<> | 144:ef7eb2e8f9f7 | 1490 | static void serial_dmaActivate(serial_t *obj, void* cb, void* buffer, int length, bool tx_nrx) |
<> | 144:ef7eb2e8f9f7 | 1491 | { |
<> | 144:ef7eb2e8f9f7 | 1492 | LDMA_PeripheralSignal_t dma_periph; |
<> | 144:ef7eb2e8f9f7 | 1493 | |
<> | 144:ef7eb2e8f9f7 | 1494 | obj->serial.dmaOptionsRX.dmaCallback.userPtr = cb; |
<> | 144:ef7eb2e8f9f7 | 1495 | |
<> | 144:ef7eb2e8f9f7 | 1496 | if( tx_nrx ) { |
<> | 144:ef7eb2e8f9f7 | 1497 | volatile void *target_addr; |
<> | 144:ef7eb2e8f9f7 | 1498 | |
<> | 144:ef7eb2e8f9f7 | 1499 | // Clear TXC |
<> | 144:ef7eb2e8f9f7 | 1500 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 1501 | LEUART_IntClear(obj->serial.periph.leuart, LEUART_IFC_TXC); |
<> | 144:ef7eb2e8f9f7 | 1502 | } else { |
<> | 144:ef7eb2e8f9f7 | 1503 | USART_IntClear(obj->serial.periph.uart, USART_IFC_TXC); |
<> | 144:ef7eb2e8f9f7 | 1504 | } |
<> | 144:ef7eb2e8f9f7 | 1505 | |
<> | 144:ef7eb2e8f9f7 | 1506 | switch((uint32_t)(obj->serial.periph.uart)) { |
<> | 144:ef7eb2e8f9f7 | 1507 | #ifdef USART0 |
<> | 144:ef7eb2e8f9f7 | 1508 | case USART_0: |
<> | 144:ef7eb2e8f9f7 | 1509 | dma_periph = ldmaPeripheralSignal_USART0_TXBL; |
<> | 144:ef7eb2e8f9f7 | 1510 | target_addr = &USART0->TXDATA; |
<> | 144:ef7eb2e8f9f7 | 1511 | obj->serial.periph.uart->CMD = USART_CMD_TXEN | USART_CMD_CLEARTX; |
<> | 144:ef7eb2e8f9f7 | 1512 | break; |
<> | 144:ef7eb2e8f9f7 | 1513 | #endif |
<> | 144:ef7eb2e8f9f7 | 1514 | #ifdef USART1 |
<> | 144:ef7eb2e8f9f7 | 1515 | case USART_1: |
<> | 144:ef7eb2e8f9f7 | 1516 | dma_periph = ldmaPeripheralSignal_USART1_TXBL; |
<> | 144:ef7eb2e8f9f7 | 1517 | target_addr = &USART1->TXDATA; |
<> | 144:ef7eb2e8f9f7 | 1518 | obj->serial.periph.uart->CMD = USART_CMD_TXEN | USART_CMD_CLEARTX; |
<> | 144:ef7eb2e8f9f7 | 1519 | break; |
<> | 144:ef7eb2e8f9f7 | 1520 | #endif |
<> | 144:ef7eb2e8f9f7 | 1521 | #ifdef LEUART0 |
<> | 144:ef7eb2e8f9f7 | 1522 | case LEUART_0: |
<> | 144:ef7eb2e8f9f7 | 1523 | dma_periph = ldmaPeripheralSignal_LEUART0_TXBL; |
<> | 144:ef7eb2e8f9f7 | 1524 | target_addr = &LEUART0->TXDATA; |
<> | 144:ef7eb2e8f9f7 | 1525 | obj->serial.periph.leuart->CMD = LEUART_CMD_CLEARTX; |
<> | 144:ef7eb2e8f9f7 | 1526 | obj->serial.periph.leuart->CMD = LEUART_CMD_TXEN; |
<> | 144:ef7eb2e8f9f7 | 1527 | while(obj->serial.periph.leuart->SYNCBUSY & LEUART_SYNCBUSY_CMD); |
<> | 144:ef7eb2e8f9f7 | 1528 | break; |
<> | 144:ef7eb2e8f9f7 | 1529 | #endif |
<> | 144:ef7eb2e8f9f7 | 1530 | default: |
<> | 144:ef7eb2e8f9f7 | 1531 | MBED_ASSERT(0); |
<> | 144:ef7eb2e8f9f7 | 1532 | while(1); |
<> | 144:ef7eb2e8f9f7 | 1533 | break; |
<> | 144:ef7eb2e8f9f7 | 1534 | } |
<> | 144:ef7eb2e8f9f7 | 1535 | |
<> | 144:ef7eb2e8f9f7 | 1536 | // Set callback and enable TXC. This will fire once the |
<> | 144:ef7eb2e8f9f7 | 1537 | // serial transfer finishes |
<> | 144:ef7eb2e8f9f7 | 1538 | NVIC_SetVector(serial_get_tx_irq_index(obj), (uint32_t)cb); |
<> | 144:ef7eb2e8f9f7 | 1539 | serial_irq_set(obj, TxIrq, true); |
<> | 144:ef7eb2e8f9f7 | 1540 | |
<> | 144:ef7eb2e8f9f7 | 1541 | // Start DMA transfer |
<> | 144:ef7eb2e8f9f7 | 1542 | LDMA_TransferCfg_t xferConf = LDMA_TRANSFER_CFG_PERIPHERAL(dma_periph); |
<> | 144:ef7eb2e8f9f7 | 1543 | LDMA_Descriptor_t desc = LDMA_DESCRIPTOR_SINGLE_M2P_BYTE(buffer, target_addr, length); |
<> | 144:ef7eb2e8f9f7 | 1544 | LDMAx_StartTransfer(obj->serial.dmaOptionsTX.dmaChannel, &xferConf, &desc, serial_dmaTransferComplete, NULL); |
<> | 144:ef7eb2e8f9f7 | 1545 | |
<> | 144:ef7eb2e8f9f7 | 1546 | } else { |
<> | 144:ef7eb2e8f9f7 | 1547 | volatile const void *source_addr; |
<> | 144:ef7eb2e8f9f7 | 1548 | |
<> | 144:ef7eb2e8f9f7 | 1549 | switch((uint32_t)(obj->serial.periph.uart)) { |
<> | 144:ef7eb2e8f9f7 | 1550 | #ifdef USART0 |
<> | 144:ef7eb2e8f9f7 | 1551 | case USART_0: |
<> | 144:ef7eb2e8f9f7 | 1552 | dma_periph = ldmaPeripheralSignal_USART0_RXDATAV; |
<> | 144:ef7eb2e8f9f7 | 1553 | source_addr = &USART0->RXDATA; |
<> | 144:ef7eb2e8f9f7 | 1554 | obj->serial.periph.uart->CMD = USART_CMD_RXEN | USART_CMD_CLEARRX; |
<> | 144:ef7eb2e8f9f7 | 1555 | break; |
<> | 144:ef7eb2e8f9f7 | 1556 | #endif |
<> | 144:ef7eb2e8f9f7 | 1557 | #ifdef USART1 |
<> | 144:ef7eb2e8f9f7 | 1558 | case USART_1: |
<> | 144:ef7eb2e8f9f7 | 1559 | dma_periph = ldmaPeripheralSignal_USART1_RXDATAV; |
<> | 144:ef7eb2e8f9f7 | 1560 | source_addr = &USART1->RXDATA; |
<> | 144:ef7eb2e8f9f7 | 1561 | obj->serial.periph.uart->CMD = USART_CMD_RXEN | USART_CMD_CLEARRX; |
<> | 144:ef7eb2e8f9f7 | 1562 | break; |
<> | 144:ef7eb2e8f9f7 | 1563 | #endif |
AnnaBridge | 179:b0033dcd6934 | 1564 | #ifdef USART2 |
AnnaBridge | 179:b0033dcd6934 | 1565 | case USART_2: |
AnnaBridge | 179:b0033dcd6934 | 1566 | dma_periph = ldmaPeripheralSignal_USART2_RXDATAV; |
AnnaBridge | 179:b0033dcd6934 | 1567 | source_addr = &USART2->RXDATA; |
AnnaBridge | 179:b0033dcd6934 | 1568 | obj->serial.periph.uart->CMD = USART_CMD_RXEN | USART_CMD_CLEARRX; |
AnnaBridge | 179:b0033dcd6934 | 1569 | break; |
AnnaBridge | 179:b0033dcd6934 | 1570 | #endif |
AnnaBridge | 179:b0033dcd6934 | 1571 | #ifdef USART3 |
AnnaBridge | 179:b0033dcd6934 | 1572 | case USART_3: |
AnnaBridge | 179:b0033dcd6934 | 1573 | dma_periph = ldmaPeripheralSignal_USART3_RXDATAV; |
AnnaBridge | 179:b0033dcd6934 | 1574 | source_addr = &USART3->RXDATA; |
AnnaBridge | 179:b0033dcd6934 | 1575 | obj->serial.periph.uart->CMD = USART_CMD_RXEN | USART_CMD_CLEARRX; |
AnnaBridge | 179:b0033dcd6934 | 1576 | break; |
AnnaBridge | 179:b0033dcd6934 | 1577 | #endif |
AnnaBridge | 179:b0033dcd6934 | 1578 | #ifdef USART4 |
AnnaBridge | 179:b0033dcd6934 | 1579 | case USART_4: |
AnnaBridge | 179:b0033dcd6934 | 1580 | dma_periph = ldmaPeripheralSignal_USART4_RXDATAV; |
AnnaBridge | 179:b0033dcd6934 | 1581 | source_addr = &USART4->RXDATA; |
AnnaBridge | 179:b0033dcd6934 | 1582 | obj->serial.periph.uart->CMD = USART_CMD_RXEN | USART_CMD_CLEARRX; |
AnnaBridge | 179:b0033dcd6934 | 1583 | break; |
AnnaBridge | 179:b0033dcd6934 | 1584 | #endif |
AnnaBridge | 179:b0033dcd6934 | 1585 | #ifdef USART5 |
AnnaBridge | 179:b0033dcd6934 | 1586 | case USART_5: |
AnnaBridge | 179:b0033dcd6934 | 1587 | dma_periph = ldmaPeripheralSignal_USART5_RXDATAV; |
AnnaBridge | 179:b0033dcd6934 | 1588 | source_addr = &USART5->RXDATA; |
AnnaBridge | 179:b0033dcd6934 | 1589 | obj->serial.periph.uart->CMD = USART_CMD_RXEN | USART_CMD_CLEARRX; |
AnnaBridge | 179:b0033dcd6934 | 1590 | break; |
AnnaBridge | 179:b0033dcd6934 | 1591 | #endif |
<> | 144:ef7eb2e8f9f7 | 1592 | #ifdef LEUART0 |
<> | 144:ef7eb2e8f9f7 | 1593 | case LEUART_0: |
<> | 144:ef7eb2e8f9f7 | 1594 | dma_periph = ldmaPeripheralSignal_LEUART0_RXDATAV; |
<> | 144:ef7eb2e8f9f7 | 1595 | source_addr = &LEUART0->RXDATA; |
<> | 144:ef7eb2e8f9f7 | 1596 | obj->serial.periph.leuart->CMD = LEUART_CMD_CLEARRX; |
<> | 144:ef7eb2e8f9f7 | 1597 | obj->serial.periph.leuart->CMD = LEUART_CMD_RXEN; |
<> | 144:ef7eb2e8f9f7 | 1598 | while(obj->serial.periph.leuart->SYNCBUSY & LEUART_SYNCBUSY_CMD); |
<> | 144:ef7eb2e8f9f7 | 1599 | break; |
<> | 144:ef7eb2e8f9f7 | 1600 | #endif |
<> | 144:ef7eb2e8f9f7 | 1601 | default: |
<> | 144:ef7eb2e8f9f7 | 1602 | MBED_ASSERT(0); |
<> | 144:ef7eb2e8f9f7 | 1603 | while(1); |
<> | 144:ef7eb2e8f9f7 | 1604 | break; |
<> | 144:ef7eb2e8f9f7 | 1605 | } |
<> | 144:ef7eb2e8f9f7 | 1606 | |
<> | 144:ef7eb2e8f9f7 | 1607 | LDMA_TransferCfg_t xferConf = LDMA_TRANSFER_CFG_PERIPHERAL(dma_periph); |
<> | 144:ef7eb2e8f9f7 | 1608 | LDMA_Descriptor_t desc = LDMA_DESCRIPTOR_SINGLE_P2M_BYTE(source_addr, buffer, length); |
<> | 144:ef7eb2e8f9f7 | 1609 | LDMAx_StartTransfer(obj->serial.dmaOptionsRX.dmaChannel, &xferConf, &desc, serial_dmaTransferComplete, cb); |
<> | 144:ef7eb2e8f9f7 | 1610 | } |
<> | 144:ef7eb2e8f9f7 | 1611 | } |
<> | 144:ef7eb2e8f9f7 | 1612 | |
<> | 144:ef7eb2e8f9f7 | 1613 | #endif /* LDMA_PRESENT */ |
<> | 144:ef7eb2e8f9f7 | 1614 | |
<> | 144:ef7eb2e8f9f7 | 1615 | /************************************************************************************ |
<> | 144:ef7eb2e8f9f7 | 1616 | * ASYNCHRONOUS HAL * |
<> | 144:ef7eb2e8f9f7 | 1617 | ************************************************************************************/ |
<> | 144:ef7eb2e8f9f7 | 1618 | |
<> | 144:ef7eb2e8f9f7 | 1619 | #if DEVICE_SERIAL_ASYNCH |
<> | 144:ef7eb2e8f9f7 | 1620 | |
<> | 144:ef7eb2e8f9f7 | 1621 | /************************************ |
<> | 144:ef7eb2e8f9f7 | 1622 | * HELPER FUNCTIONS * |
<> | 144:ef7eb2e8f9f7 | 1623 | ***********************************/ |
<> | 144:ef7eb2e8f9f7 | 1624 | |
<> | 144:ef7eb2e8f9f7 | 1625 | /** Configure TX events |
<> | 144:ef7eb2e8f9f7 | 1626 | * |
<> | 144:ef7eb2e8f9f7 | 1627 | * @param obj The serial object |
<> | 144:ef7eb2e8f9f7 | 1628 | * @param event The logical OR of the TX events to configure |
<> | 144:ef7eb2e8f9f7 | 1629 | * @param enable Set to non-zero to enable events, or zero to disable them |
<> | 144:ef7eb2e8f9f7 | 1630 | */ |
<> | 144:ef7eb2e8f9f7 | 1631 | void serial_tx_enable_event(serial_t *obj, int event, uint8_t enable) |
<> | 144:ef7eb2e8f9f7 | 1632 | { |
<> | 144:ef7eb2e8f9f7 | 1633 | // Shouldn't have to enable TX interrupt here, just need to keep track of the requested events. |
<> | 144:ef7eb2e8f9f7 | 1634 | if(enable) obj->serial.events |= event; |
<> | 144:ef7eb2e8f9f7 | 1635 | else obj->serial.events &= ~event; |
<> | 144:ef7eb2e8f9f7 | 1636 | } |
<> | 144:ef7eb2e8f9f7 | 1637 | |
<> | 144:ef7eb2e8f9f7 | 1638 | /** |
<> | 144:ef7eb2e8f9f7 | 1639 | * @param obj The serial object. |
<> | 144:ef7eb2e8f9f7 | 1640 | * @param event The logical OR of the RX events to configure |
<> | 144:ef7eb2e8f9f7 | 1641 | * @param enable Set to non-zero to enable events, or zero to disable them |
<> | 144:ef7eb2e8f9f7 | 1642 | */ |
<> | 144:ef7eb2e8f9f7 | 1643 | void serial_rx_enable_event(serial_t *obj, int event, uint8_t enable) |
<> | 144:ef7eb2e8f9f7 | 1644 | { |
<> | 144:ef7eb2e8f9f7 | 1645 | if(enable) { |
<> | 144:ef7eb2e8f9f7 | 1646 | obj->serial.events |= event; |
<> | 144:ef7eb2e8f9f7 | 1647 | } else { |
<> | 144:ef7eb2e8f9f7 | 1648 | obj->serial.events &= ~event; |
<> | 144:ef7eb2e8f9f7 | 1649 | } |
<> | 144:ef7eb2e8f9f7 | 1650 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 1651 | if(event & SERIAL_EVENT_RX_FRAMING_ERROR) { |
<> | 144:ef7eb2e8f9f7 | 1652 | //FERR interrupt source |
<> | 144:ef7eb2e8f9f7 | 1653 | if(enable) obj->serial.periph.leuart->IEN |= LEUART_IEN_FERR; |
<> | 144:ef7eb2e8f9f7 | 1654 | else obj->serial.periph.leuart->IEN &= ~LEUART_IEN_FERR; |
<> | 144:ef7eb2e8f9f7 | 1655 | } |
<> | 144:ef7eb2e8f9f7 | 1656 | if(event & SERIAL_EVENT_RX_PARITY_ERROR) { |
<> | 144:ef7eb2e8f9f7 | 1657 | //PERR interrupt source |
<> | 144:ef7eb2e8f9f7 | 1658 | if(enable) obj->serial.periph.leuart->IEN |= LEUART_IEN_PERR; |
<> | 144:ef7eb2e8f9f7 | 1659 | else obj->serial.periph.leuart->IEN &= ~LEUART_IEN_PERR; |
<> | 144:ef7eb2e8f9f7 | 1660 | } |
<> | 144:ef7eb2e8f9f7 | 1661 | if(event & SERIAL_EVENT_RX_OVERFLOW) { |
<> | 144:ef7eb2e8f9f7 | 1662 | //RXOF interrupt source |
<> | 144:ef7eb2e8f9f7 | 1663 | if(enable) obj->serial.periph.leuart->IEN |= LEUART_IEN_RXOF; |
<> | 144:ef7eb2e8f9f7 | 1664 | else obj->serial.periph.leuart->IEN &= ~LEUART_IEN_RXOF; |
<> | 144:ef7eb2e8f9f7 | 1665 | } |
<> | 144:ef7eb2e8f9f7 | 1666 | } else { |
<> | 144:ef7eb2e8f9f7 | 1667 | if(event & SERIAL_EVENT_RX_FRAMING_ERROR) { |
<> | 144:ef7eb2e8f9f7 | 1668 | //FERR interrupt source |
<> | 144:ef7eb2e8f9f7 | 1669 | if(enable) obj->serial.periph.uart->IEN |= USART_IEN_FERR; |
<> | 144:ef7eb2e8f9f7 | 1670 | else obj->serial.periph.uart->IEN &= ~USART_IEN_FERR; |
<> | 144:ef7eb2e8f9f7 | 1671 | } |
<> | 144:ef7eb2e8f9f7 | 1672 | if(event & SERIAL_EVENT_RX_PARITY_ERROR) { |
<> | 144:ef7eb2e8f9f7 | 1673 | //PERR interrupt source |
<> | 144:ef7eb2e8f9f7 | 1674 | if(enable) obj->serial.periph.uart->IEN |= USART_IEN_PERR; |
<> | 144:ef7eb2e8f9f7 | 1675 | else obj->serial.periph.uart->IEN &= ~USART_IEN_PERR; |
<> | 144:ef7eb2e8f9f7 | 1676 | } |
<> | 144:ef7eb2e8f9f7 | 1677 | if(event & SERIAL_EVENT_RX_OVERFLOW) { |
<> | 144:ef7eb2e8f9f7 | 1678 | //RXOF interrupt source |
<> | 144:ef7eb2e8f9f7 | 1679 | if(enable) obj->serial.periph.uart->IEN |= USART_IEN_RXOF; |
<> | 144:ef7eb2e8f9f7 | 1680 | else obj->serial.periph.uart->IEN &= ~USART_IEN_RXOF; |
<> | 144:ef7eb2e8f9f7 | 1681 | } |
<> | 144:ef7eb2e8f9f7 | 1682 | } |
<> | 144:ef7eb2e8f9f7 | 1683 | } |
<> | 144:ef7eb2e8f9f7 | 1684 | |
<> | 144:ef7eb2e8f9f7 | 1685 | /** Configure the TX buffer for an asynchronous write serial transaction |
<> | 144:ef7eb2e8f9f7 | 1686 | * |
<> | 144:ef7eb2e8f9f7 | 1687 | * @param obj The serial object. |
<> | 144:ef7eb2e8f9f7 | 1688 | * @param tx The buffer for sending. |
<> | 144:ef7eb2e8f9f7 | 1689 | * @param tx_length The number of words to transmit. |
<> | 144:ef7eb2e8f9f7 | 1690 | */ |
<> | 144:ef7eb2e8f9f7 | 1691 | void serial_tx_buffer_set(serial_t *obj, void *tx, int tx_length, uint8_t width) |
<> | 144:ef7eb2e8f9f7 | 1692 | { |
<> | 144:ef7eb2e8f9f7 | 1693 | // We only support byte buffers for now |
<> | 144:ef7eb2e8f9f7 | 1694 | MBED_ASSERT(width == 8); |
<> | 144:ef7eb2e8f9f7 | 1695 | |
<> | 144:ef7eb2e8f9f7 | 1696 | if(serial_tx_active(obj)) return; |
<> | 144:ef7eb2e8f9f7 | 1697 | |
<> | 144:ef7eb2e8f9f7 | 1698 | obj->tx_buff.buffer = tx; |
<> | 144:ef7eb2e8f9f7 | 1699 | obj->tx_buff.length = tx_length; |
<> | 144:ef7eb2e8f9f7 | 1700 | obj->tx_buff.pos = 0; |
<> | 144:ef7eb2e8f9f7 | 1701 | |
<> | 144:ef7eb2e8f9f7 | 1702 | return; |
<> | 144:ef7eb2e8f9f7 | 1703 | } |
<> | 144:ef7eb2e8f9f7 | 1704 | |
<> | 144:ef7eb2e8f9f7 | 1705 | /** Configure the TX buffer for an asynchronous read serial transaction |
<> | 144:ef7eb2e8f9f7 | 1706 | * |
<> | 144:ef7eb2e8f9f7 | 1707 | * @param obj The serial object. |
<> | 144:ef7eb2e8f9f7 | 1708 | * @param rx The buffer for receiving. |
<> | 144:ef7eb2e8f9f7 | 1709 | * @param rx_length The number of words to read. |
<> | 144:ef7eb2e8f9f7 | 1710 | */ |
<> | 144:ef7eb2e8f9f7 | 1711 | void serial_rx_buffer_set(serial_t *obj, void *rx, int rx_length, uint8_t width) |
<> | 144:ef7eb2e8f9f7 | 1712 | { |
<> | 144:ef7eb2e8f9f7 | 1713 | // We only support byte buffers for now |
<> | 144:ef7eb2e8f9f7 | 1714 | MBED_ASSERT(width == 8); |
<> | 144:ef7eb2e8f9f7 | 1715 | |
<> | 144:ef7eb2e8f9f7 | 1716 | if(serial_rx_active(obj)) return; |
<> | 144:ef7eb2e8f9f7 | 1717 | |
<> | 144:ef7eb2e8f9f7 | 1718 | obj->rx_buff.buffer = rx; |
<> | 144:ef7eb2e8f9f7 | 1719 | obj->rx_buff.length = rx_length; |
<> | 144:ef7eb2e8f9f7 | 1720 | obj->rx_buff.pos = 0; |
<> | 144:ef7eb2e8f9f7 | 1721 | |
<> | 144:ef7eb2e8f9f7 | 1722 | return; |
<> | 144:ef7eb2e8f9f7 | 1723 | } |
<> | 144:ef7eb2e8f9f7 | 1724 | |
<> | 144:ef7eb2e8f9f7 | 1725 | /************************************ |
<> | 144:ef7eb2e8f9f7 | 1726 | * TRANSFER FUNCTIONS * |
<> | 144:ef7eb2e8f9f7 | 1727 | ***********************************/ |
<> | 144:ef7eb2e8f9f7 | 1728 | |
<> | 144:ef7eb2e8f9f7 | 1729 | /** Begin asynchronous TX transfer. The used buffer is specified in the serial object, |
<> | 144:ef7eb2e8f9f7 | 1730 | * tx_buff |
<> | 144:ef7eb2e8f9f7 | 1731 | * |
<> | 144:ef7eb2e8f9f7 | 1732 | * @param obj The serial object |
<> | 144:ef7eb2e8f9f7 | 1733 | * @param cb The function to call when an event occurs |
<> | 144:ef7eb2e8f9f7 | 1734 | * @param hint A suggestion for how to use DMA with this transfer |
<> | 144:ef7eb2e8f9f7 | 1735 | * @return Returns number of data transfered, or 0 otherwise |
<> | 144:ef7eb2e8f9f7 | 1736 | */ |
<> | 144:ef7eb2e8f9f7 | 1737 | int serial_tx_asynch(serial_t *obj, const void *tx, size_t tx_length, uint8_t tx_width, uint32_t handler, uint32_t event, DMAUsage hint) |
<> | 144:ef7eb2e8f9f7 | 1738 | { |
<> | 144:ef7eb2e8f9f7 | 1739 | // Check that a buffer has indeed been set up |
<> | 144:ef7eb2e8f9f7 | 1740 | MBED_ASSERT(tx != (void*)0); |
<> | 144:ef7eb2e8f9f7 | 1741 | if(tx_length == 0) return 0; |
<> | 144:ef7eb2e8f9f7 | 1742 | |
<> | 144:ef7eb2e8f9f7 | 1743 | // Set up buffer |
<> | 144:ef7eb2e8f9f7 | 1744 | serial_tx_buffer_set(obj, (void *)tx, tx_length, tx_width); |
<> | 144:ef7eb2e8f9f7 | 1745 | |
<> | 144:ef7eb2e8f9f7 | 1746 | // Set up events |
<> | 144:ef7eb2e8f9f7 | 1747 | serial_tx_enable_event(obj, SERIAL_EVENT_TX_ALL, false); |
<> | 144:ef7eb2e8f9f7 | 1748 | serial_tx_enable_event(obj, event, true); |
<> | 144:ef7eb2e8f9f7 | 1749 | |
<> | 144:ef7eb2e8f9f7 | 1750 | // Set up sleepmode |
<> | 144:ef7eb2e8f9f7 | 1751 | serial_block_sleep(obj); |
<> | 144:ef7eb2e8f9f7 | 1752 | |
<> | 144:ef7eb2e8f9f7 | 1753 | // Determine DMA strategy |
<> | 144:ef7eb2e8f9f7 | 1754 | serial_dmaTrySetState(&(obj->serial.dmaOptionsTX), hint, obj, true); |
<> | 144:ef7eb2e8f9f7 | 1755 | |
<> | 144:ef7eb2e8f9f7 | 1756 | // If DMA, kick off DMA transfer |
<> | 144:ef7eb2e8f9f7 | 1757 | if(obj->serial.dmaOptionsTX.dmaChannel >= 0) { |
<> | 144:ef7eb2e8f9f7 | 1758 | serial_dmaActivate(obj, (void*)handler, obj->tx_buff.buffer, obj->tx_buff.length, true); |
<> | 144:ef7eb2e8f9f7 | 1759 | } |
<> | 144:ef7eb2e8f9f7 | 1760 | // Else, activate interrupt. TXBL will take care of buffer filling through ISR. |
<> | 144:ef7eb2e8f9f7 | 1761 | else { |
<> | 144:ef7eb2e8f9f7 | 1762 | // Store callback |
<> | 144:ef7eb2e8f9f7 | 1763 | NVIC_ClearPendingIRQ(serial_get_tx_irq_index(obj)); |
<> | 144:ef7eb2e8f9f7 | 1764 | NVIC_DisableIRQ(serial_get_tx_irq_index(obj)); |
<> | 144:ef7eb2e8f9f7 | 1765 | NVIC_SetPriority(serial_get_tx_irq_index(obj), 1); |
<> | 144:ef7eb2e8f9f7 | 1766 | NVIC_SetVector(serial_get_tx_irq_index(obj), (uint32_t)handler); |
<> | 144:ef7eb2e8f9f7 | 1767 | NVIC_EnableIRQ(serial_get_tx_irq_index(obj)); |
<> | 144:ef7eb2e8f9f7 | 1768 | |
<> | 144:ef7eb2e8f9f7 | 1769 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 1770 | // Activate TX and clear TX buffer |
<> | 144:ef7eb2e8f9f7 | 1771 | obj->serial.periph.leuart->CMD = LEUART_CMD_CLEARTX; |
<> | 144:ef7eb2e8f9f7 | 1772 | obj->serial.periph.leuart->CMD = LEUART_CMD_TXEN; |
<> | 144:ef7eb2e8f9f7 | 1773 | while(obj->serial.periph.leuart->SYNCBUSY & LEUART_SYNCBUSY_CMD); |
<> | 144:ef7eb2e8f9f7 | 1774 | |
<> | 144:ef7eb2e8f9f7 | 1775 | // Enable interrupt |
<> | 144:ef7eb2e8f9f7 | 1776 | LEUART_IntEnable(obj->serial.periph.leuart, LEUART_IEN_TXBL); |
<> | 144:ef7eb2e8f9f7 | 1777 | } else { |
<> | 144:ef7eb2e8f9f7 | 1778 | // Activate TX and clear TX buffer |
<> | 144:ef7eb2e8f9f7 | 1779 | obj->serial.periph.uart->CMD = USART_CMD_TXEN | USART_CMD_CLEARTX; |
<> | 144:ef7eb2e8f9f7 | 1780 | |
<> | 144:ef7eb2e8f9f7 | 1781 | // Enable interrupt |
<> | 144:ef7eb2e8f9f7 | 1782 | USART_IntEnable(obj->serial.periph.uart, USART_IEN_TXBL); |
<> | 144:ef7eb2e8f9f7 | 1783 | } |
<> | 144:ef7eb2e8f9f7 | 1784 | } |
<> | 144:ef7eb2e8f9f7 | 1785 | |
<> | 144:ef7eb2e8f9f7 | 1786 | return 0; |
<> | 144:ef7eb2e8f9f7 | 1787 | } |
<> | 144:ef7eb2e8f9f7 | 1788 | |
<> | 144:ef7eb2e8f9f7 | 1789 | /** Begin asynchronous RX transfer (enable interrupt for data collecting) |
<> | 144:ef7eb2e8f9f7 | 1790 | * The used buffer is specified in the serial object - rx_buff |
<> | 144:ef7eb2e8f9f7 | 1791 | * |
<> | 144:ef7eb2e8f9f7 | 1792 | * @param obj The serial object |
<> | 144:ef7eb2e8f9f7 | 1793 | * @param cb The function to call when an event occurs |
<> | 144:ef7eb2e8f9f7 | 1794 | * @param hint A suggestion for how to use DMA with this transfer |
<> | 144:ef7eb2e8f9f7 | 1795 | */ |
<> | 144:ef7eb2e8f9f7 | 1796 | void serial_rx_asynch(serial_t *obj, void *rx, size_t rx_length, uint8_t rx_width, uint32_t handler, uint32_t event, uint8_t char_match, DMAUsage hint) |
<> | 144:ef7eb2e8f9f7 | 1797 | { |
<> | 144:ef7eb2e8f9f7 | 1798 | // Check that a buffer has indeed been set up |
<> | 144:ef7eb2e8f9f7 | 1799 | MBED_ASSERT(rx != (void*)0); |
<> | 144:ef7eb2e8f9f7 | 1800 | if(rx_length == 0) return; |
<> | 144:ef7eb2e8f9f7 | 1801 | |
<> | 144:ef7eb2e8f9f7 | 1802 | // Set up buffer |
<> | 144:ef7eb2e8f9f7 | 1803 | serial_rx_buffer_set(obj,(void*) rx, rx_length, rx_width); |
<> | 144:ef7eb2e8f9f7 | 1804 | |
<> | 144:ef7eb2e8f9f7 | 1805 | //disable character match if no character is specified |
<> | 144:ef7eb2e8f9f7 | 1806 | if(char_match == SERIAL_RESERVED_CHAR_MATCH){ |
<> | 144:ef7eb2e8f9f7 | 1807 | event &= ~SERIAL_EVENT_RX_CHARACTER_MATCH; |
<> | 144:ef7eb2e8f9f7 | 1808 | } |
<> | 144:ef7eb2e8f9f7 | 1809 | |
<> | 144:ef7eb2e8f9f7 | 1810 | /*clear all set interrupts*/ |
<> | 144:ef7eb2e8f9f7 | 1811 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 1812 | LEUART_IntClear(obj->serial.periph.leuart, LEUART_IFC_PERR | LEUART_IFC_FERR | LEUART_IFC_RXOF); |
<> | 144:ef7eb2e8f9f7 | 1813 | }else{ |
<> | 144:ef7eb2e8f9f7 | 1814 | USART_IntClear(obj->serial.periph.uart, USART_IFC_PERR | USART_IFC_FERR | USART_IFC_RXOF); |
<> | 144:ef7eb2e8f9f7 | 1815 | } |
<> | 144:ef7eb2e8f9f7 | 1816 | |
<> | 144:ef7eb2e8f9f7 | 1817 | // Set up events |
<> | 144:ef7eb2e8f9f7 | 1818 | serial_rx_enable_event(obj, SERIAL_EVENT_RX_ALL, false); |
<> | 144:ef7eb2e8f9f7 | 1819 | serial_rx_enable_event(obj, event, true); |
<> | 144:ef7eb2e8f9f7 | 1820 | obj->char_match = char_match; |
<> | 144:ef7eb2e8f9f7 | 1821 | |
<> | 144:ef7eb2e8f9f7 | 1822 | // Set up sleepmode |
<> | 144:ef7eb2e8f9f7 | 1823 | serial_block_sleep(obj); |
<> | 144:ef7eb2e8f9f7 | 1824 | |
<> | 144:ef7eb2e8f9f7 | 1825 | // Determine DMA strategy |
<> | 144:ef7eb2e8f9f7 | 1826 | // If character match is enabled, we can't use DMA, sadly. We could when using LEUART though, but that support is not in here yet. |
<> | 144:ef7eb2e8f9f7 | 1827 | // TODO: add DMA support for character matching with leuart |
<> | 144:ef7eb2e8f9f7 | 1828 | if(!(event & SERIAL_EVENT_RX_CHARACTER_MATCH)) { |
<> | 144:ef7eb2e8f9f7 | 1829 | serial_dmaTrySetState(&(obj->serial.dmaOptionsRX), hint, obj, false); |
<> | 144:ef7eb2e8f9f7 | 1830 | }else{ |
<> | 144:ef7eb2e8f9f7 | 1831 | serial_dmaTrySetState(&(obj->serial.dmaOptionsRX), DMA_USAGE_NEVER, obj, false); |
<> | 144:ef7eb2e8f9f7 | 1832 | } |
<> | 144:ef7eb2e8f9f7 | 1833 | |
<> | 144:ef7eb2e8f9f7 | 1834 | // If DMA, kick off DMA |
<> | 144:ef7eb2e8f9f7 | 1835 | if(obj->serial.dmaOptionsRX.dmaChannel >= 0) { |
<> | 144:ef7eb2e8f9f7 | 1836 | serial_dmaActivate(obj, (void*)handler, obj->rx_buff.buffer, obj->rx_buff.length, false); |
<> | 144:ef7eb2e8f9f7 | 1837 | } |
<> | 144:ef7eb2e8f9f7 | 1838 | // Else, activate interrupt. RXDATAV is responsible for incoming data notification. |
<> | 144:ef7eb2e8f9f7 | 1839 | else { |
<> | 144:ef7eb2e8f9f7 | 1840 | // Store callback |
<> | 144:ef7eb2e8f9f7 | 1841 | NVIC_ClearPendingIRQ(serial_get_rx_irq_index(obj)); |
<> | 144:ef7eb2e8f9f7 | 1842 | NVIC_SetVector(serial_get_rx_irq_index(obj), (uint32_t)handler); |
<> | 144:ef7eb2e8f9f7 | 1843 | NVIC_EnableIRQ(serial_get_rx_irq_index(obj)); |
<> | 144:ef7eb2e8f9f7 | 1844 | |
<> | 144:ef7eb2e8f9f7 | 1845 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 1846 | // Activate RX and clear RX buffer |
<> | 144:ef7eb2e8f9f7 | 1847 | obj->serial.periph.leuart->CMD = LEUART_CMD_CLEARRX; |
<> | 144:ef7eb2e8f9f7 | 1848 | obj->serial.periph.leuart->CMD = LEUART_CMD_RXEN; |
<> | 144:ef7eb2e8f9f7 | 1849 | while(obj->serial.periph.leuart->SYNCBUSY & LEUART_SYNCBUSY_CMD); |
<> | 144:ef7eb2e8f9f7 | 1850 | |
<> | 144:ef7eb2e8f9f7 | 1851 | // Enable interrupt |
<> | 144:ef7eb2e8f9f7 | 1852 | LEUART_IntEnable(obj->serial.periph.leuart, LEUART_IEN_RXDATAV); |
<> | 144:ef7eb2e8f9f7 | 1853 | } else { |
<> | 144:ef7eb2e8f9f7 | 1854 | // Activate RX and clear RX buffer |
<> | 144:ef7eb2e8f9f7 | 1855 | obj->serial.periph.uart->CMD = USART_CMD_RXEN | USART_CMD_CLEARRX; |
<> | 144:ef7eb2e8f9f7 | 1856 | |
<> | 144:ef7eb2e8f9f7 | 1857 | // Clear RXFULL |
<> | 144:ef7eb2e8f9f7 | 1858 | USART_IntClear(obj->serial.periph.uart, USART_IFC_RXFULL); |
<> | 144:ef7eb2e8f9f7 | 1859 | |
<> | 144:ef7eb2e8f9f7 | 1860 | // Enable interrupt |
<> | 144:ef7eb2e8f9f7 | 1861 | USART_IntEnable(obj->serial.periph.uart, USART_IEN_RXDATAV); |
<> | 144:ef7eb2e8f9f7 | 1862 | } |
<> | 144:ef7eb2e8f9f7 | 1863 | } |
<> | 144:ef7eb2e8f9f7 | 1864 | |
<> | 144:ef7eb2e8f9f7 | 1865 | return; |
<> | 144:ef7eb2e8f9f7 | 1866 | } |
<> | 144:ef7eb2e8f9f7 | 1867 | |
<> | 144:ef7eb2e8f9f7 | 1868 | /** Attempts to determine if the serial peripheral is already in use for TX |
<> | 144:ef7eb2e8f9f7 | 1869 | * |
<> | 144:ef7eb2e8f9f7 | 1870 | * @param obj The serial object |
<> | 144:ef7eb2e8f9f7 | 1871 | * @return Non-zero if the TX transaction is ongoing, 0 otherwise |
<> | 144:ef7eb2e8f9f7 | 1872 | */ |
<> | 144:ef7eb2e8f9f7 | 1873 | uint8_t serial_tx_active(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 1874 | { |
<> | 144:ef7eb2e8f9f7 | 1875 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 1876 | return (obj->serial.periph.leuart->IEN & (LEUART_IEN_TXBL|LEUART_IEN_TXC)) ? true : false; |
<> | 144:ef7eb2e8f9f7 | 1877 | } else { |
<> | 144:ef7eb2e8f9f7 | 1878 | return (obj->serial.periph.uart->IEN & (USART_IEN_TXBL|USART_IEN_TXC)) ? true : false; |
<> | 144:ef7eb2e8f9f7 | 1879 | } |
<> | 144:ef7eb2e8f9f7 | 1880 | } |
<> | 144:ef7eb2e8f9f7 | 1881 | |
<> | 144:ef7eb2e8f9f7 | 1882 | /** Attempts to determine if the serial peripheral is already in use for RX |
<> | 144:ef7eb2e8f9f7 | 1883 | * |
<> | 144:ef7eb2e8f9f7 | 1884 | * @param obj The serial object |
<> | 144:ef7eb2e8f9f7 | 1885 | * @return Non-zero if the RX transaction is ongoing, 0 otherwise |
<> | 144:ef7eb2e8f9f7 | 1886 | */ |
<> | 144:ef7eb2e8f9f7 | 1887 | uint8_t serial_rx_active(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 1888 | { |
<> | 144:ef7eb2e8f9f7 | 1889 | switch(obj->serial.dmaOptionsRX.dmaUsageState) { |
<> | 144:ef7eb2e8f9f7 | 1890 | case DMA_USAGE_TEMPORARY_ALLOCATED: |
<> | 144:ef7eb2e8f9f7 | 1891 | /* Temporary allocation always means its active, as this state gets cleared afterwards */ |
<> | 144:ef7eb2e8f9f7 | 1892 | return 1; |
<> | 144:ef7eb2e8f9f7 | 1893 | case DMA_USAGE_ALLOCATED: |
<> | 144:ef7eb2e8f9f7 | 1894 | /* Check whether the allocated DMA channel is active by checking the DMA transfer */ |
<> | 144:ef7eb2e8f9f7 | 1895 | #ifndef LDMA_PRESENT |
<> | 144:ef7eb2e8f9f7 | 1896 | return DMA_ChannelEnabled(obj->serial.dmaOptionsRX.dmaChannel); |
<> | 144:ef7eb2e8f9f7 | 1897 | #else |
<> | 144:ef7eb2e8f9f7 | 1898 | // LDMA_TransferDone does not work since the CHDONE bits get cleared, |
<> | 144:ef7eb2e8f9f7 | 1899 | // so just check if the channel is enabled |
<> | 144:ef7eb2e8f9f7 | 1900 | return LDMA->CHEN & (1 << obj->serial.dmaOptionsRX.dmaChannel); |
<> | 144:ef7eb2e8f9f7 | 1901 | #endif |
<> | 144:ef7eb2e8f9f7 | 1902 | default: |
<> | 144:ef7eb2e8f9f7 | 1903 | /* Check whether interrupt for serial TX is enabled */ |
<> | 144:ef7eb2e8f9f7 | 1904 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 1905 | return (obj->serial.periph.leuart->IEN & (LEUART_IEN_RXDATAV)) ? true : false; |
<> | 144:ef7eb2e8f9f7 | 1906 | } else { |
<> | 144:ef7eb2e8f9f7 | 1907 | return (obj->serial.periph.uart->IEN & (USART_IEN_RXDATAV)) ? true : false; |
<> | 144:ef7eb2e8f9f7 | 1908 | } |
<> | 144:ef7eb2e8f9f7 | 1909 | } |
<> | 144:ef7eb2e8f9f7 | 1910 | } |
<> | 144:ef7eb2e8f9f7 | 1911 | |
<> | 144:ef7eb2e8f9f7 | 1912 | /** The asynchronous TX handler. Writes to the TX FIFO and checks for events. |
<> | 144:ef7eb2e8f9f7 | 1913 | * If any TX event has occured, the TX abort function is called. |
<> | 144:ef7eb2e8f9f7 | 1914 | * |
<> | 144:ef7eb2e8f9f7 | 1915 | * @param obj The serial object |
<> | 144:ef7eb2e8f9f7 | 1916 | * @return Returns event flags if a TX transfer termination condition was met or 0 otherwise |
<> | 144:ef7eb2e8f9f7 | 1917 | */ |
<> | 144:ef7eb2e8f9f7 | 1918 | int serial_tx_irq_handler_asynch(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 1919 | { |
<> | 144:ef7eb2e8f9f7 | 1920 | /* This interrupt handler is called from USART irq */ |
<> | 144:ef7eb2e8f9f7 | 1921 | uint8_t *buf = obj->tx_buff.buffer; |
<> | 144:ef7eb2e8f9f7 | 1922 | |
<> | 144:ef7eb2e8f9f7 | 1923 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 1924 | if(obj->serial.periph.leuart->IEN & LEUART_IEN_TXBL){ |
<> | 144:ef7eb2e8f9f7 | 1925 | /* There is still data to send */ |
<> | 144:ef7eb2e8f9f7 | 1926 | while((LEUART_StatusGet(obj->serial.periph.leuart) & LEUART_STATUS_TXBL) && (obj->tx_buff.pos <= (obj->tx_buff.length - 1))) { |
<> | 144:ef7eb2e8f9f7 | 1927 | while (obj->serial.periph.leuart->SYNCBUSY); |
<> | 144:ef7eb2e8f9f7 | 1928 | LEUART_Tx(obj->serial.periph.leuart, buf[obj->tx_buff.pos]); |
<> | 144:ef7eb2e8f9f7 | 1929 | obj->tx_buff.pos++; |
<> | 144:ef7eb2e8f9f7 | 1930 | } |
<> | 144:ef7eb2e8f9f7 | 1931 | if(obj->tx_buff.pos >= obj->tx_buff.length){ |
<> | 144:ef7eb2e8f9f7 | 1932 | /* Last byte has been put in TX, set up TXC interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1933 | LEUART_IntDisable(obj->serial.periph.leuart, LEUART_IEN_TXBL); |
<> | 144:ef7eb2e8f9f7 | 1934 | LEUART_IntEnable(obj->serial.periph.leuart, LEUART_IEN_TXC); |
<> | 144:ef7eb2e8f9f7 | 1935 | while (obj->serial.periph.leuart->SYNCBUSY); |
<> | 144:ef7eb2e8f9f7 | 1936 | } |
<> | 144:ef7eb2e8f9f7 | 1937 | }else if (obj->serial.periph.leuart->IF & LEUART_IF_TXC){ |
<> | 144:ef7eb2e8f9f7 | 1938 | /* Last byte has been successfully transmitted. Stop the procedure */ |
<> | 144:ef7eb2e8f9f7 | 1939 | serial_tx_abort_asynch_intern(obj, 1); |
<> | 144:ef7eb2e8f9f7 | 1940 | return SERIAL_EVENT_TX_COMPLETE & obj->serial.events; |
<> | 144:ef7eb2e8f9f7 | 1941 | } |
<> | 144:ef7eb2e8f9f7 | 1942 | } else { |
<> | 144:ef7eb2e8f9f7 | 1943 | if(obj->serial.periph.uart->IEN & USART_IEN_TXBL){ |
<> | 144:ef7eb2e8f9f7 | 1944 | /* There is still data to send */ |
<> | 144:ef7eb2e8f9f7 | 1945 | while((USART_StatusGet(obj->serial.periph.uart) & USART_STATUS_TXBL) && (obj->tx_buff.pos <= (obj->tx_buff.length - 1))) { |
<> | 144:ef7eb2e8f9f7 | 1946 | USART_Tx(obj->serial.periph.uart, buf[obj->tx_buff.pos]); |
<> | 144:ef7eb2e8f9f7 | 1947 | obj->tx_buff.pos++; |
<> | 144:ef7eb2e8f9f7 | 1948 | } |
<> | 144:ef7eb2e8f9f7 | 1949 | if(obj->tx_buff.pos >= obj->tx_buff.length){ |
<> | 144:ef7eb2e8f9f7 | 1950 | /* Last byte has been put in TX, set up TXC interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1951 | USART_IntDisable(obj->serial.periph.uart, USART_IEN_TXBL); |
<> | 144:ef7eb2e8f9f7 | 1952 | USART_IntEnable(obj->serial.periph.uart, USART_IEN_TXC); |
<> | 144:ef7eb2e8f9f7 | 1953 | } |
<> | 144:ef7eb2e8f9f7 | 1954 | } else if (obj->serial.periph.uart->IF & USART_IF_TXC) { |
<> | 144:ef7eb2e8f9f7 | 1955 | /* Last byte has been successfully transmitted. Stop the procedure */ |
<> | 144:ef7eb2e8f9f7 | 1956 | serial_tx_abort_asynch_intern(obj, 1); |
<> | 144:ef7eb2e8f9f7 | 1957 | return SERIAL_EVENT_TX_COMPLETE & obj->serial.events; |
<> | 144:ef7eb2e8f9f7 | 1958 | } |
<> | 144:ef7eb2e8f9f7 | 1959 | } |
<> | 144:ef7eb2e8f9f7 | 1960 | return 0; |
<> | 144:ef7eb2e8f9f7 | 1961 | } |
<> | 144:ef7eb2e8f9f7 | 1962 | |
<> | 144:ef7eb2e8f9f7 | 1963 | /** The asynchronous RX handler. Reads from the RX FIFOF and checks for events. |
<> | 144:ef7eb2e8f9f7 | 1964 | * If any RX event has occured, the RX abort function is called. |
<> | 144:ef7eb2e8f9f7 | 1965 | * |
<> | 144:ef7eb2e8f9f7 | 1966 | * @param obj The serial object |
<> | 144:ef7eb2e8f9f7 | 1967 | * @return Returns event flags if a RX transfer termination condition was met or 0 otherwise |
<> | 144:ef7eb2e8f9f7 | 1968 | */ |
<> | 144:ef7eb2e8f9f7 | 1969 | int serial_rx_irq_handler_asynch(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 1970 | { |
<> | 144:ef7eb2e8f9f7 | 1971 | int event = 0; |
<> | 144:ef7eb2e8f9f7 | 1972 | |
<> | 144:ef7eb2e8f9f7 | 1973 | /* This interrupt handler is called from USART irq */ |
<> | 144:ef7eb2e8f9f7 | 1974 | uint8_t *buf = (uint8_t*)obj->rx_buff.buffer; |
<> | 144:ef7eb2e8f9f7 | 1975 | |
<> | 144:ef7eb2e8f9f7 | 1976 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 1977 | /* Determine the source of the interrupt */ |
<> | 144:ef7eb2e8f9f7 | 1978 | if(LEUART_IntGetEnabled(obj->serial.periph.leuart) & LEUART_IF_PERR) { |
<> | 144:ef7eb2e8f9f7 | 1979 | /* Parity error has occurred, and we are notifying. */ |
<> | 144:ef7eb2e8f9f7 | 1980 | LEUART_IntClear(obj->serial.periph.leuart, LEUART_IFC_PERR); |
<> | 144:ef7eb2e8f9f7 | 1981 | serial_rx_abort_asynch_intern(obj, 1); |
<> | 144:ef7eb2e8f9f7 | 1982 | return SERIAL_EVENT_RX_PARITY_ERROR; |
<> | 144:ef7eb2e8f9f7 | 1983 | } |
<> | 144:ef7eb2e8f9f7 | 1984 | |
<> | 144:ef7eb2e8f9f7 | 1985 | if(LEUART_IntGetEnabled(obj->serial.periph.leuart) & LEUART_IF_FERR) { |
<> | 144:ef7eb2e8f9f7 | 1986 | /* Framing error has occurred, and we are notifying */ |
<> | 144:ef7eb2e8f9f7 | 1987 | LEUART_IntClear(obj->serial.periph.leuart, LEUART_IFC_FERR); |
<> | 144:ef7eb2e8f9f7 | 1988 | serial_rx_abort_asynch_intern(obj, 1); |
<> | 144:ef7eb2e8f9f7 | 1989 | return SERIAL_EVENT_RX_FRAMING_ERROR; |
<> | 144:ef7eb2e8f9f7 | 1990 | } |
<> | 144:ef7eb2e8f9f7 | 1991 | |
<> | 144:ef7eb2e8f9f7 | 1992 | if(LEUART_IntGetEnabled(obj->serial.periph.leuart) & LEUART_IF_RXOF) { |
<> | 144:ef7eb2e8f9f7 | 1993 | /* RX buffer overflow has occurred, and we are notifying */ |
<> | 144:ef7eb2e8f9f7 | 1994 | LEUART_IntClear(obj->serial.periph.leuart, LEUART_IFC_RXOF); |
<> | 144:ef7eb2e8f9f7 | 1995 | serial_rx_abort_asynch_intern(obj, 1); |
<> | 144:ef7eb2e8f9f7 | 1996 | return SERIAL_EVENT_RX_OVERFLOW; |
<> | 144:ef7eb2e8f9f7 | 1997 | } |
<> | 144:ef7eb2e8f9f7 | 1998 | |
<> | 144:ef7eb2e8f9f7 | 1999 | if((LEUART_IntGetEnabled(obj->serial.periph.leuart) & LEUART_IF_RXDATAV) || (LEUART_StatusGet(obj->serial.periph.leuart) & LEUART_STATUS_RXDATAV)) { |
<> | 144:ef7eb2e8f9f7 | 2000 | /* Valid data in buffer. Determine course of action: continue receiving or interrupt */ |
<> | 144:ef7eb2e8f9f7 | 2001 | if(obj->rx_buff.pos >= (obj->rx_buff.length - 1)) { |
<> | 144:ef7eb2e8f9f7 | 2002 | /* Last char, transfer complete. Switch off interrupt and return event. */ |
<> | 144:ef7eb2e8f9f7 | 2003 | buf[obj->rx_buff.pos] = LEUART_RxDataGet(obj->serial.periph.leuart); |
<> | 144:ef7eb2e8f9f7 | 2004 | |
<> | 144:ef7eb2e8f9f7 | 2005 | event |= SERIAL_EVENT_RX_COMPLETE; |
<> | 144:ef7eb2e8f9f7 | 2006 | |
<> | 144:ef7eb2e8f9f7 | 2007 | if((buf[obj->rx_buff.pos] == obj->char_match) && (obj->serial.events & SERIAL_EVENT_RX_CHARACTER_MATCH)) event |= SERIAL_EVENT_RX_CHARACTER_MATCH; |
<> | 144:ef7eb2e8f9f7 | 2008 | |
<> | 144:ef7eb2e8f9f7 | 2009 | serial_rx_abort_asynch_intern(obj, 1); |
<> | 144:ef7eb2e8f9f7 | 2010 | return event & obj->serial.events; |
<> | 144:ef7eb2e8f9f7 | 2011 | } else { |
<> | 144:ef7eb2e8f9f7 | 2012 | /* There's still space in the receive buffer */ |
<> | 144:ef7eb2e8f9f7 | 2013 | while((LEUART_StatusGet(obj->serial.periph.leuart) & LEUART_STATUS_RXDATAV) && (obj->rx_buff.pos <= (obj->rx_buff.length - 1))) { |
<> | 144:ef7eb2e8f9f7 | 2014 | bool aborting = false; |
<> | 144:ef7eb2e8f9f7 | 2015 | buf[obj->rx_buff.pos] = LEUART_RxDataGet(obj->serial.periph.leuart); |
<> | 144:ef7eb2e8f9f7 | 2016 | obj->rx_buff.pos++; |
<> | 144:ef7eb2e8f9f7 | 2017 | |
<> | 144:ef7eb2e8f9f7 | 2018 | /* Check for character match event */ |
<> | 144:ef7eb2e8f9f7 | 2019 | if((buf[obj->rx_buff.pos - 1] == obj->char_match) && (obj->serial.events & SERIAL_EVENT_RX_CHARACTER_MATCH)) { |
<> | 144:ef7eb2e8f9f7 | 2020 | aborting = true; |
<> | 144:ef7eb2e8f9f7 | 2021 | event |= SERIAL_EVENT_RX_CHARACTER_MATCH; |
<> | 144:ef7eb2e8f9f7 | 2022 | } |
<> | 144:ef7eb2e8f9f7 | 2023 | |
<> | 144:ef7eb2e8f9f7 | 2024 | /* Check for final char event */ |
<> | 144:ef7eb2e8f9f7 | 2025 | if(obj->rx_buff.pos >= (obj->rx_buff.length)) { |
<> | 144:ef7eb2e8f9f7 | 2026 | aborting = true; |
<> | 144:ef7eb2e8f9f7 | 2027 | event |= SERIAL_EVENT_RX_COMPLETE & obj->serial.events; |
<> | 144:ef7eb2e8f9f7 | 2028 | } |
<> | 144:ef7eb2e8f9f7 | 2029 | |
<> | 144:ef7eb2e8f9f7 | 2030 | if(aborting) { |
<> | 144:ef7eb2e8f9f7 | 2031 | serial_rx_abort_asynch_intern(obj, 1); |
<> | 144:ef7eb2e8f9f7 | 2032 | return event & obj->serial.events; |
<> | 144:ef7eb2e8f9f7 | 2033 | } |
<> | 144:ef7eb2e8f9f7 | 2034 | } |
<> | 144:ef7eb2e8f9f7 | 2035 | } |
<> | 144:ef7eb2e8f9f7 | 2036 | } |
<> | 144:ef7eb2e8f9f7 | 2037 | } else { |
<> | 144:ef7eb2e8f9f7 | 2038 | /* Determine the source of the interrupt */ |
<> | 144:ef7eb2e8f9f7 | 2039 | if(USART_IntGetEnabled(obj->serial.periph.uart) & USART_IF_PERR) { |
<> | 144:ef7eb2e8f9f7 | 2040 | /* Parity error has occurred, and we are notifying. */ |
<> | 144:ef7eb2e8f9f7 | 2041 | USART_IntClear(obj->serial.periph.uart, USART_IFC_PERR); |
<> | 144:ef7eb2e8f9f7 | 2042 | serial_rx_abort_asynch_intern(obj, 1); |
<> | 144:ef7eb2e8f9f7 | 2043 | return SERIAL_EVENT_RX_PARITY_ERROR; |
<> | 144:ef7eb2e8f9f7 | 2044 | } |
<> | 144:ef7eb2e8f9f7 | 2045 | |
<> | 144:ef7eb2e8f9f7 | 2046 | if(USART_IntGetEnabled(obj->serial.periph.uart) & USART_IF_FERR) { |
<> | 144:ef7eb2e8f9f7 | 2047 | /* Framing error has occurred, and we are notifying */ |
<> | 144:ef7eb2e8f9f7 | 2048 | USART_IntClear(obj->serial.periph.uart, USART_IFC_FERR); |
<> | 144:ef7eb2e8f9f7 | 2049 | serial_rx_abort_asynch_intern(obj, 1); |
<> | 144:ef7eb2e8f9f7 | 2050 | return SERIAL_EVENT_RX_FRAMING_ERROR; |
<> | 144:ef7eb2e8f9f7 | 2051 | } |
<> | 144:ef7eb2e8f9f7 | 2052 | |
<> | 144:ef7eb2e8f9f7 | 2053 | if(USART_IntGetEnabled(obj->serial.periph.uart) & USART_IF_RXOF) { |
<> | 144:ef7eb2e8f9f7 | 2054 | /* RX buffer overflow has occurred, and we are notifying */ |
<> | 144:ef7eb2e8f9f7 | 2055 | USART_IntClear(obj->serial.periph.uart, USART_IFC_RXOF); |
<> | 144:ef7eb2e8f9f7 | 2056 | serial_rx_abort_asynch_intern(obj, 1); |
<> | 144:ef7eb2e8f9f7 | 2057 | return SERIAL_EVENT_RX_OVERFLOW; |
<> | 144:ef7eb2e8f9f7 | 2058 | } |
<> | 144:ef7eb2e8f9f7 | 2059 | |
<> | 144:ef7eb2e8f9f7 | 2060 | if((USART_IntGetEnabled(obj->serial.periph.uart) & USART_IF_RXDATAV) || (USART_StatusGet(obj->serial.periph.uart) & USART_STATUS_RXFULL)) { |
<> | 144:ef7eb2e8f9f7 | 2061 | /* Valid data in buffer. Determine course of action: continue receiving or interrupt */ |
<> | 144:ef7eb2e8f9f7 | 2062 | if(obj->rx_buff.pos >= (obj->rx_buff.length - 1)) { |
<> | 144:ef7eb2e8f9f7 | 2063 | /* Last char, transfer complete. Switch off interrupt and return event. */ |
<> | 144:ef7eb2e8f9f7 | 2064 | buf[obj->rx_buff.pos] = USART_RxDataGet(obj->serial.periph.uart); |
<> | 144:ef7eb2e8f9f7 | 2065 | |
<> | 144:ef7eb2e8f9f7 | 2066 | event |= SERIAL_EVENT_RX_COMPLETE; |
<> | 144:ef7eb2e8f9f7 | 2067 | |
<> | 144:ef7eb2e8f9f7 | 2068 | if((buf[obj->rx_buff.pos] == obj->char_match) && (obj->serial.events & SERIAL_EVENT_RX_CHARACTER_MATCH)) event |= SERIAL_EVENT_RX_CHARACTER_MATCH; |
<> | 144:ef7eb2e8f9f7 | 2069 | |
<> | 144:ef7eb2e8f9f7 | 2070 | serial_rx_abort_asynch_intern(obj, 1); |
<> | 144:ef7eb2e8f9f7 | 2071 | return event & obj->serial.events; |
<> | 144:ef7eb2e8f9f7 | 2072 | } else { |
<> | 144:ef7eb2e8f9f7 | 2073 | /* There's still space in the receive buffer */ |
<> | 144:ef7eb2e8f9f7 | 2074 | while(((USART_StatusGet(obj->serial.periph.uart) & USART_STATUS_RXDATAV) || (USART_StatusGet(obj->serial.periph.uart) & USART_IF_RXFULL)) && (obj->rx_buff.pos <= (obj->rx_buff.length - 1))) { |
<> | 144:ef7eb2e8f9f7 | 2075 | bool aborting = false; |
<> | 144:ef7eb2e8f9f7 | 2076 | buf[obj->rx_buff.pos] = USART_RxDataGet(obj->serial.periph.uart); |
<> | 144:ef7eb2e8f9f7 | 2077 | obj->rx_buff.pos++; |
<> | 144:ef7eb2e8f9f7 | 2078 | |
<> | 144:ef7eb2e8f9f7 | 2079 | /* Check for character match event */ |
<> | 144:ef7eb2e8f9f7 | 2080 | if((buf[obj->rx_buff.pos - 1] == obj->char_match) && (obj->serial.events & SERIAL_EVENT_RX_CHARACTER_MATCH)) { |
<> | 144:ef7eb2e8f9f7 | 2081 | aborting = true; |
<> | 144:ef7eb2e8f9f7 | 2082 | event |= SERIAL_EVENT_RX_CHARACTER_MATCH; |
<> | 144:ef7eb2e8f9f7 | 2083 | } |
<> | 144:ef7eb2e8f9f7 | 2084 | |
<> | 144:ef7eb2e8f9f7 | 2085 | /* Check for final char event */ |
<> | 144:ef7eb2e8f9f7 | 2086 | if(obj->rx_buff.pos >= (obj->rx_buff.length)) { |
<> | 144:ef7eb2e8f9f7 | 2087 | aborting = true; |
<> | 144:ef7eb2e8f9f7 | 2088 | event |= SERIAL_EVENT_RX_COMPLETE & obj->serial.events; |
<> | 144:ef7eb2e8f9f7 | 2089 | } |
<> | 144:ef7eb2e8f9f7 | 2090 | |
<> | 144:ef7eb2e8f9f7 | 2091 | if(aborting) { |
<> | 144:ef7eb2e8f9f7 | 2092 | serial_rx_abort_asynch_intern(obj, 1); |
<> | 144:ef7eb2e8f9f7 | 2093 | return event & obj->serial.events; |
<> | 144:ef7eb2e8f9f7 | 2094 | } |
<> | 144:ef7eb2e8f9f7 | 2095 | } |
<> | 144:ef7eb2e8f9f7 | 2096 | } |
<> | 144:ef7eb2e8f9f7 | 2097 | } |
<> | 144:ef7eb2e8f9f7 | 2098 | } |
<> | 144:ef7eb2e8f9f7 | 2099 | |
<> | 144:ef7eb2e8f9f7 | 2100 | /* All events should have generated a return, if no return has happened, no event has been caught */ |
<> | 144:ef7eb2e8f9f7 | 2101 | return 0; |
<> | 144:ef7eb2e8f9f7 | 2102 | } |
<> | 144:ef7eb2e8f9f7 | 2103 | |
<> | 144:ef7eb2e8f9f7 | 2104 | /** Unified IRQ handler. Determines the appropriate handler to execute and returns the flags. |
<> | 144:ef7eb2e8f9f7 | 2105 | * |
<> | 144:ef7eb2e8f9f7 | 2106 | * WARNING: this code should be stateless, as re-entrancy is very possible in interrupt-based mode. |
<> | 144:ef7eb2e8f9f7 | 2107 | */ |
<> | 144:ef7eb2e8f9f7 | 2108 | int serial_irq_handler_asynch(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 2109 | { |
<> | 144:ef7eb2e8f9f7 | 2110 | uint32_t txc_int; |
<> | 144:ef7eb2e8f9f7 | 2111 | |
<> | 144:ef7eb2e8f9f7 | 2112 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 2113 | txc_int = LEUART_IntGetEnabled(obj->serial.periph.leuart) & LEUART_IF_TXC; |
<> | 144:ef7eb2e8f9f7 | 2114 | } else { |
<> | 144:ef7eb2e8f9f7 | 2115 | txc_int = USART_IntGetEnabled(obj->serial.periph.uart) & USART_IF_TXC; |
<> | 144:ef7eb2e8f9f7 | 2116 | } |
<> | 144:ef7eb2e8f9f7 | 2117 | |
<> | 144:ef7eb2e8f9f7 | 2118 | /* First, check if we're running in DMA mode */ |
<> | 144:ef7eb2e8f9f7 | 2119 | if( (obj->serial.dmaOptionsRX.dmaChannel != -1) && |
<> | 144:ef7eb2e8f9f7 | 2120 | serial_dma_irq_fired[obj->serial.dmaOptionsRX.dmaChannel]) { |
<> | 144:ef7eb2e8f9f7 | 2121 | /* Clean up */ |
<> | 144:ef7eb2e8f9f7 | 2122 | serial_dma_irq_fired[obj->serial.dmaOptionsRX.dmaChannel] = false; |
<> | 144:ef7eb2e8f9f7 | 2123 | serial_rx_abort_asynch_intern(obj, 1); |
<> | 144:ef7eb2e8f9f7 | 2124 | |
<> | 144:ef7eb2e8f9f7 | 2125 | /* Notify CPP land of RX completion */ |
<> | 144:ef7eb2e8f9f7 | 2126 | return SERIAL_EVENT_RX_COMPLETE & obj->serial.events; |
<> | 144:ef7eb2e8f9f7 | 2127 | } else if (txc_int && (obj->serial.dmaOptionsTX.dmaChannel != -1) && |
<> | 144:ef7eb2e8f9f7 | 2128 | serial_dma_irq_fired[obj->serial.dmaOptionsTX.dmaChannel]) { |
<> | 144:ef7eb2e8f9f7 | 2129 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 2130 | /* Clean up */ |
<> | 144:ef7eb2e8f9f7 | 2131 | serial_dma_irq_fired[obj->serial.dmaOptionsTX.dmaChannel] = false; |
<> | 144:ef7eb2e8f9f7 | 2132 | serial_tx_abort_asynch_intern(obj, 1); |
<> | 144:ef7eb2e8f9f7 | 2133 | /* Notify CPP land of completion */ |
<> | 144:ef7eb2e8f9f7 | 2134 | return SERIAL_EVENT_TX_COMPLETE & obj->serial.events; |
<> | 144:ef7eb2e8f9f7 | 2135 | }else{ |
<> | 144:ef7eb2e8f9f7 | 2136 | /* Clean up */ |
<> | 144:ef7eb2e8f9f7 | 2137 | serial_dma_irq_fired[obj->serial.dmaOptionsTX.dmaChannel] = false; |
<> | 144:ef7eb2e8f9f7 | 2138 | serial_tx_abort_asynch_intern(obj, 1); |
<> | 144:ef7eb2e8f9f7 | 2139 | /* Notify CPP land of completion */ |
<> | 144:ef7eb2e8f9f7 | 2140 | return SERIAL_EVENT_TX_COMPLETE & obj->serial.events; |
<> | 144:ef7eb2e8f9f7 | 2141 | } |
<> | 144:ef7eb2e8f9f7 | 2142 | } else { |
<> | 144:ef7eb2e8f9f7 | 2143 | /* Check the NVIC to see which interrupt we're running from |
<> | 144:ef7eb2e8f9f7 | 2144 | * Also make sure to prioritize RX */ |
<> | 144:ef7eb2e8f9f7 | 2145 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 2146 | //Different method of checking tx vs rx for LEUART |
<> | 144:ef7eb2e8f9f7 | 2147 | if(LEUART_IntGetEnabled(obj->serial.periph.leuart) & (LEUART_IF_RXDATAV | LEUART_IF_FERR | LEUART_IF_PERR | LEUART_IF_RXOF)) { |
<> | 144:ef7eb2e8f9f7 | 2148 | return serial_rx_irq_handler_asynch(obj); |
<> | 144:ef7eb2e8f9f7 | 2149 | } else if(LEUART_StatusGet(obj->serial.periph.leuart) & (LEUART_STATUS_TXBL | LEUART_STATUS_TXC)) { |
<> | 144:ef7eb2e8f9f7 | 2150 | return serial_tx_irq_handler_asynch(obj); |
<> | 144:ef7eb2e8f9f7 | 2151 | } |
<> | 144:ef7eb2e8f9f7 | 2152 | } else { |
<> | 144:ef7eb2e8f9f7 | 2153 | if(USART_IntGetEnabled(obj->serial.periph.uart) & (USART_IF_RXDATAV | USART_IF_RXOF | USART_IF_PERR | USART_IF_FERR)) { |
<> | 144:ef7eb2e8f9f7 | 2154 | return serial_rx_irq_handler_asynch(obj); |
<> | 144:ef7eb2e8f9f7 | 2155 | } else if(USART_StatusGet(obj->serial.periph.uart) & (USART_STATUS_TXBL | USART_STATUS_TXC)){ |
<> | 144:ef7eb2e8f9f7 | 2156 | return serial_tx_irq_handler_asynch(obj); |
<> | 144:ef7eb2e8f9f7 | 2157 | } |
<> | 144:ef7eb2e8f9f7 | 2158 | } |
<> | 144:ef7eb2e8f9f7 | 2159 | } |
<> | 144:ef7eb2e8f9f7 | 2160 | |
<> | 144:ef7eb2e8f9f7 | 2161 | // All should be done now |
<> | 144:ef7eb2e8f9f7 | 2162 | return 0; |
<> | 144:ef7eb2e8f9f7 | 2163 | } |
<> | 144:ef7eb2e8f9f7 | 2164 | |
<> | 144:ef7eb2e8f9f7 | 2165 | /** Abort the ongoing TX transaction. It disables the enabled interupt for TX and |
<> | 144:ef7eb2e8f9f7 | 2166 | * flush TX hardware buffer if TX FIFO is used |
<> | 144:ef7eb2e8f9f7 | 2167 | * |
<> | 144:ef7eb2e8f9f7 | 2168 | * @param obj The serial object |
<> | 144:ef7eb2e8f9f7 | 2169 | */ |
<> | 144:ef7eb2e8f9f7 | 2170 | void serial_tx_abort_asynch(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 2171 | { |
<> | 144:ef7eb2e8f9f7 | 2172 | serial_tx_abort_asynch_intern(obj, 0); |
<> | 144:ef7eb2e8f9f7 | 2173 | } |
<> | 144:ef7eb2e8f9f7 | 2174 | |
<> | 144:ef7eb2e8f9f7 | 2175 | static void serial_tx_abort_asynch_intern(serial_t *obj, int unblock_sleep) |
<> | 144:ef7eb2e8f9f7 | 2176 | { |
<> | 144:ef7eb2e8f9f7 | 2177 | // Transmitter should be disabled here but there are multiple issues |
<> | 144:ef7eb2e8f9f7 | 2178 | // making that quite difficult. |
<> | 144:ef7eb2e8f9f7 | 2179 | // |
<> | 144:ef7eb2e8f9f7 | 2180 | // - Disabling the transmitter when using DMA on platforms prior to |
<> | 144:ef7eb2e8f9f7 | 2181 | // Pearl can cause the UART to leave the line low, generating a break |
<> | 144:ef7eb2e8f9f7 | 2182 | // condition until the next transmission begins. |
<> | 144:ef7eb2e8f9f7 | 2183 | // |
<> | 144:ef7eb2e8f9f7 | 2184 | // - On (at least) Pearl, once TXC interrupt has fired it will take some time |
<> | 144:ef7eb2e8f9f7 | 2185 | // (some tens of microsec) for TXC to be set in STATUS. If we turn off |
<> | 144:ef7eb2e8f9f7 | 2186 | // the transmitter before this, bad things will happen. |
<> | 144:ef7eb2e8f9f7 | 2187 | // |
<> | 144:ef7eb2e8f9f7 | 2188 | // - On (at least) Pearl, when using TX DMA it is possible for the USART |
<> | 144:ef7eb2e8f9f7 | 2189 | // status to be: TXENS TXBL TXIDLE = 1, TXBUFCNT = 0, but TXC = 0. |
<> | 144:ef7eb2e8f9f7 | 2190 | // |
<> | 144:ef7eb2e8f9f7 | 2191 | // All in all, the logic was so fragile it's best to leave it out. |
<> | 144:ef7eb2e8f9f7 | 2192 | |
<> | 144:ef7eb2e8f9f7 | 2193 | /* Clean up */ |
<> | 144:ef7eb2e8f9f7 | 2194 | switch(obj->serial.dmaOptionsTX.dmaUsageState) { |
<> | 144:ef7eb2e8f9f7 | 2195 | case DMA_USAGE_ALLOCATED: |
<> | 144:ef7eb2e8f9f7 | 2196 | /* stop DMA transfer */ |
<> | 144:ef7eb2e8f9f7 | 2197 | #ifndef LDMA_PRESENT |
<> | 144:ef7eb2e8f9f7 | 2198 | DMA_ChannelEnable(obj->serial.dmaOptionsTX.dmaChannel, false); |
<> | 144:ef7eb2e8f9f7 | 2199 | #else |
<> | 144:ef7eb2e8f9f7 | 2200 | LDMA_StopTransfer(obj->serial.dmaOptionsTX.dmaChannel); |
<> | 144:ef7eb2e8f9f7 | 2201 | #endif |
<> | 144:ef7eb2e8f9f7 | 2202 | break; |
<> | 144:ef7eb2e8f9f7 | 2203 | case DMA_USAGE_TEMPORARY_ALLOCATED: |
<> | 144:ef7eb2e8f9f7 | 2204 | /* stop DMA transfer and release channel */ |
<> | 144:ef7eb2e8f9f7 | 2205 | #ifndef LDMA_PRESENT |
<> | 144:ef7eb2e8f9f7 | 2206 | DMA_ChannelEnable(obj->serial.dmaOptionsTX.dmaChannel, false); |
<> | 144:ef7eb2e8f9f7 | 2207 | #else |
<> | 144:ef7eb2e8f9f7 | 2208 | LDMA_StopTransfer(obj->serial.dmaOptionsTX.dmaChannel); |
<> | 144:ef7eb2e8f9f7 | 2209 | #endif |
<> | 144:ef7eb2e8f9f7 | 2210 | dma_channel_free(obj->serial.dmaOptionsTX.dmaChannel); |
<> | 144:ef7eb2e8f9f7 | 2211 | obj->serial.dmaOptionsTX.dmaChannel = -1; |
<> | 144:ef7eb2e8f9f7 | 2212 | obj->serial.dmaOptionsTX.dmaUsageState = DMA_USAGE_OPPORTUNISTIC; |
<> | 144:ef7eb2e8f9f7 | 2213 | break; |
<> | 144:ef7eb2e8f9f7 | 2214 | default: |
<> | 144:ef7eb2e8f9f7 | 2215 | break; |
<> | 144:ef7eb2e8f9f7 | 2216 | } |
<> | 144:ef7eb2e8f9f7 | 2217 | |
<> | 144:ef7eb2e8f9f7 | 2218 | /* stop interrupting */ |
<> | 144:ef7eb2e8f9f7 | 2219 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 2220 | LEUART_IntDisable(obj->serial.periph.leuart, LEUART_IEN_TXBL); |
<> | 144:ef7eb2e8f9f7 | 2221 | LEUART_IntDisable(obj->serial.periph.leuart, LEUART_IEN_TXC); |
<> | 144:ef7eb2e8f9f7 | 2222 | LEUART_IntClear(obj->serial.periph.leuart, LEUART_IFC_TXC); |
<> | 144:ef7eb2e8f9f7 | 2223 | } else { |
<> | 144:ef7eb2e8f9f7 | 2224 | USART_IntDisable(obj->serial.periph.uart, USART_IEN_TXBL); |
<> | 144:ef7eb2e8f9f7 | 2225 | USART_IntDisable(obj->serial.periph.uart, USART_IEN_TXC); |
<> | 144:ef7eb2e8f9f7 | 2226 | USART_IntClear(obj->serial.periph.uart, USART_IFC_TXC); |
<> | 144:ef7eb2e8f9f7 | 2227 | } |
<> | 144:ef7eb2e8f9f7 | 2228 | |
<> | 144:ef7eb2e8f9f7 | 2229 | /* Say that we can stop using this emode */ |
<> | 144:ef7eb2e8f9f7 | 2230 | if(unblock_sleep) |
<> | 144:ef7eb2e8f9f7 | 2231 | serial_unblock_sleep(obj); |
<> | 144:ef7eb2e8f9f7 | 2232 | } |
<> | 144:ef7eb2e8f9f7 | 2233 | |
<> | 144:ef7eb2e8f9f7 | 2234 | |
<> | 144:ef7eb2e8f9f7 | 2235 | static void serial_unblock_sleep(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 2236 | { |
<> | 144:ef7eb2e8f9f7 | 2237 | if( obj->serial.sleep_blocked > 0 ) { |
<> | 144:ef7eb2e8f9f7 | 2238 | #ifdef LEUART_USING_LFXO |
Anna Bridge |
180:96ed750bd169 | 2239 | if(!LEUART_REF_VALID(obj->serial.periph.leuart) || (LEUART_BaudrateGet(obj->serial.periph.leuart) > (LEUART_LF_REF_FREQ/2))){ |
Anna Bridge |
180:96ed750bd169 | 2240 | sleep_manager_unlock_deep_sleep(); |
<> | 144:ef7eb2e8f9f7 | 2241 | } |
<> | 144:ef7eb2e8f9f7 | 2242 | #else |
Anna Bridge |
180:96ed750bd169 | 2243 | sleep_manager_unlock_deep_sleep(); |
<> | 144:ef7eb2e8f9f7 | 2244 | #endif |
<> | 144:ef7eb2e8f9f7 | 2245 | obj->serial.sleep_blocked--; |
<> | 144:ef7eb2e8f9f7 | 2246 | } |
<> | 144:ef7eb2e8f9f7 | 2247 | } |
<> | 144:ef7eb2e8f9f7 | 2248 | |
<> | 144:ef7eb2e8f9f7 | 2249 | static void serial_block_sleep(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 2250 | { |
<> | 144:ef7eb2e8f9f7 | 2251 | obj->serial.sleep_blocked++; |
<> | 144:ef7eb2e8f9f7 | 2252 | #ifdef LEUART_USING_LFXO |
Anna Bridge |
180:96ed750bd169 | 2253 | if(!LEUART_REF_VALID(obj->serial.periph.leuart) || (LEUART_BaudrateGet(obj->serial.periph.leuart) > (LEUART_LF_REF_FREQ/2))){ |
Anna Bridge |
180:96ed750bd169 | 2254 | /* LEUART configured to a baudrate triggering the use of HFCLK, so prevent HFCLK from getting turned off */ |
Anna Bridge |
180:96ed750bd169 | 2255 | sleep_manager_lock_deep_sleep(); |
<> | 144:ef7eb2e8f9f7 | 2256 | } |
<> | 144:ef7eb2e8f9f7 | 2257 | #else |
Anna Bridge |
180:96ed750bd169 | 2258 | /* HFCLK unavailable in deepsleep */ |
Anna Bridge |
180:96ed750bd169 | 2259 | sleep_manager_lock_deep_sleep(); |
<> | 144:ef7eb2e8f9f7 | 2260 | #endif |
<> | 144:ef7eb2e8f9f7 | 2261 | } |
<> | 144:ef7eb2e8f9f7 | 2262 | |
<> | 144:ef7eb2e8f9f7 | 2263 | /** Abort the ongoing RX transaction It disables the enabled interrupt for RX and |
<> | 144:ef7eb2e8f9f7 | 2264 | * flush RX hardware buffer if RX FIFO is used |
<> | 144:ef7eb2e8f9f7 | 2265 | * |
<> | 144:ef7eb2e8f9f7 | 2266 | * @param obj The serial object |
<> | 144:ef7eb2e8f9f7 | 2267 | */ |
<> | 144:ef7eb2e8f9f7 | 2268 | void serial_rx_abort_asynch(serial_t *obj) |
<> | 144:ef7eb2e8f9f7 | 2269 | { |
<> | 144:ef7eb2e8f9f7 | 2270 | serial_rx_abort_asynch_intern(obj, 0); |
<> | 144:ef7eb2e8f9f7 | 2271 | } |
<> | 144:ef7eb2e8f9f7 | 2272 | |
<> | 144:ef7eb2e8f9f7 | 2273 | static void serial_rx_abort_asynch_intern(serial_t *obj, int unblock_sleep) |
<> | 144:ef7eb2e8f9f7 | 2274 | { |
<> | 144:ef7eb2e8f9f7 | 2275 | /* Stop receiver */ |
<> | 144:ef7eb2e8f9f7 | 2276 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 2277 | obj->serial.periph.leuart->CMD = LEUART_CMD_RXDIS; |
<> | 144:ef7eb2e8f9f7 | 2278 | while(obj->serial.periph.leuart->SYNCBUSY & LEUART_SYNCBUSY_CMD); |
<> | 144:ef7eb2e8f9f7 | 2279 | } else { |
<> | 144:ef7eb2e8f9f7 | 2280 | obj->serial.periph.uart->CMD = USART_CMD_RXDIS; |
<> | 144:ef7eb2e8f9f7 | 2281 | } |
<> | 144:ef7eb2e8f9f7 | 2282 | |
<> | 144:ef7eb2e8f9f7 | 2283 | /* Clean up */ |
<> | 144:ef7eb2e8f9f7 | 2284 | switch(obj->serial.dmaOptionsRX.dmaUsageState) { |
<> | 144:ef7eb2e8f9f7 | 2285 | case DMA_USAGE_ALLOCATED: |
<> | 144:ef7eb2e8f9f7 | 2286 | /* stop DMA transfer */ |
<> | 144:ef7eb2e8f9f7 | 2287 | #ifndef LDMA_PRESENT |
<> | 144:ef7eb2e8f9f7 | 2288 | DMA_ChannelEnable(obj->serial.dmaOptionsRX.dmaChannel, false); |
<> | 144:ef7eb2e8f9f7 | 2289 | #else |
<> | 144:ef7eb2e8f9f7 | 2290 | LDMA_StopTransfer(obj->serial.dmaOptionsRX.dmaChannel); |
<> | 144:ef7eb2e8f9f7 | 2291 | #endif |
<> | 144:ef7eb2e8f9f7 | 2292 | break; |
<> | 144:ef7eb2e8f9f7 | 2293 | case DMA_USAGE_TEMPORARY_ALLOCATED: |
<> | 144:ef7eb2e8f9f7 | 2294 | /* stop DMA transfer and release channel */ |
<> | 144:ef7eb2e8f9f7 | 2295 | #ifndef LDMA_PRESENT |
<> | 144:ef7eb2e8f9f7 | 2296 | DMA_ChannelEnable(obj->serial.dmaOptionsRX.dmaChannel, false); |
<> | 144:ef7eb2e8f9f7 | 2297 | #else |
<> | 144:ef7eb2e8f9f7 | 2298 | LDMA_StopTransfer(obj->serial.dmaOptionsRX.dmaChannel); |
<> | 144:ef7eb2e8f9f7 | 2299 | #endif |
<> | 144:ef7eb2e8f9f7 | 2300 | dma_channel_free(obj->serial.dmaOptionsRX.dmaChannel); |
<> | 144:ef7eb2e8f9f7 | 2301 | obj->serial.dmaOptionsRX.dmaChannel = -1; |
<> | 144:ef7eb2e8f9f7 | 2302 | obj->serial.dmaOptionsRX.dmaUsageState = DMA_USAGE_OPPORTUNISTIC; |
<> | 144:ef7eb2e8f9f7 | 2303 | break; |
<> | 144:ef7eb2e8f9f7 | 2304 | default: |
<> | 144:ef7eb2e8f9f7 | 2305 | /* stop interrupting */ |
<> | 144:ef7eb2e8f9f7 | 2306 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 2307 | LEUART_IntDisable(obj->serial.periph.leuart, LEUART_IEN_RXDATAV | LEUART_IEN_PERR | LEUART_IEN_FERR | LEUART_IEN_RXOF); |
<> | 144:ef7eb2e8f9f7 | 2308 | } else { |
<> | 144:ef7eb2e8f9f7 | 2309 | USART_IntDisable(obj->serial.periph.uart, USART_IEN_RXDATAV | USART_IEN_PERR | USART_IEN_FERR | USART_IEN_RXOF); |
<> | 144:ef7eb2e8f9f7 | 2310 | } |
<> | 144:ef7eb2e8f9f7 | 2311 | break; |
<> | 144:ef7eb2e8f9f7 | 2312 | } |
<> | 144:ef7eb2e8f9f7 | 2313 | |
<> | 144:ef7eb2e8f9f7 | 2314 | /*clear all set interrupts*/ |
<> | 144:ef7eb2e8f9f7 | 2315 | if(LEUART_REF_VALID(obj->serial.periph.leuart)) { |
<> | 144:ef7eb2e8f9f7 | 2316 | LEUART_IntClear(obj->serial.periph.leuart, LEUART_IFC_PERR | LEUART_IFC_FERR | LEUART_IFC_RXOF); |
<> | 144:ef7eb2e8f9f7 | 2317 | }else{ |
<> | 144:ef7eb2e8f9f7 | 2318 | USART_IntClear(obj->serial.periph.uart, USART_IFC_PERR | USART_IFC_FERR | USART_IFC_RXOF); |
<> | 144:ef7eb2e8f9f7 | 2319 | } |
<> | 144:ef7eb2e8f9f7 | 2320 | |
<> | 144:ef7eb2e8f9f7 | 2321 | /* Say that we can stop using this emode */ |
<> | 144:ef7eb2e8f9f7 | 2322 | if( unblock_sleep ) |
<> | 144:ef7eb2e8f9f7 | 2323 | serial_unblock_sleep(obj); |
<> | 144:ef7eb2e8f9f7 | 2324 | } |
<> | 144:ef7eb2e8f9f7 | 2325 | |
<> | 144:ef7eb2e8f9f7 | 2326 | #endif //DEVICE_SERIAL_ASYNCH |
<> | 144:ef7eb2e8f9f7 | 2327 | #endif //DEVICE_SERIAL |