mbed library sources. Supersedes mbed-src.

Dependents:   Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more

Committer:
AnnaBridge
Date:
Thu Apr 19 17:12:19 2018 +0100
Revision:
184:08ed48f1de7f
Parent:
182:a56a73fd2a6f
Child:
186:707f6e361f3e
mbed-dev library. Release version 161

Who changed what in which revision?

UserRevisionLine numberNew contents of line
AnnaBridge 174:b96e65c34a4d 1 /* mbed Microcontroller Library
AnnaBridge 174:b96e65c34a4d 2 * Copyright (c) 2015-2017 Nuvoton
AnnaBridge 174:b96e65c34a4d 3 *
AnnaBridge 174:b96e65c34a4d 4 * Licensed under the Apache License, Version 2.0 (the "License");
AnnaBridge 174:b96e65c34a4d 5 * you may not use this file except in compliance with the License.
AnnaBridge 174:b96e65c34a4d 6 * You may obtain a copy of the License at
AnnaBridge 174:b96e65c34a4d 7 *
AnnaBridge 174:b96e65c34a4d 8 * http://www.apache.org/licenses/LICENSE-2.0
AnnaBridge 174:b96e65c34a4d 9 *
AnnaBridge 174:b96e65c34a4d 10 * Unless required by applicable law or agreed to in writing, software
AnnaBridge 174:b96e65c34a4d 11 * distributed under the License is distributed on an "AS IS" BASIS,
AnnaBridge 174:b96e65c34a4d 12 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
AnnaBridge 174:b96e65c34a4d 13 * See the License for the specific language governing permissions and
AnnaBridge 174:b96e65c34a4d 14 * limitations under the License.
AnnaBridge 174:b96e65c34a4d 15 */
AnnaBridge 182:a56a73fd2a6f 16
AnnaBridge 174:b96e65c34a4d 17 #include "lp_ticker_api.h"
AnnaBridge 174:b96e65c34a4d 18
AnnaBridge 174:b96e65c34a4d 19 #if DEVICE_LOWPOWERTIMER
AnnaBridge 174:b96e65c34a4d 20
AnnaBridge 174:b96e65c34a4d 21 #include "sleep_api.h"
AnnaBridge 182:a56a73fd2a6f 22 #include "mbed_wait_api.h"
AnnaBridge 182:a56a73fd2a6f 23 #include "mbed_assert.h"
AnnaBridge 174:b96e65c34a4d 24 #include "nu_modutil.h"
AnnaBridge 174:b96e65c34a4d 25 #include "nu_miscutil.h"
AnnaBridge 174:b96e65c34a4d 26
AnnaBridge 182:a56a73fd2a6f 27 /* Micro seconds per second */
AnnaBridge 182:a56a73fd2a6f 28 #define NU_US_PER_SEC 1000000
AnnaBridge 182:a56a73fd2a6f 29 /* Timer clock per lp_ticker tick */
AnnaBridge 182:a56a73fd2a6f 30 #define NU_TMRCLK_PER_TICK 1
AnnaBridge 182:a56a73fd2a6f 31 /* Timer clock per second */
AnnaBridge 182:a56a73fd2a6f 32 #define NU_TMRCLK_PER_SEC (__LXT)
AnnaBridge 182:a56a73fd2a6f 33 /* Timer max counter bit size */
AnnaBridge 182:a56a73fd2a6f 34 #define NU_TMR_MAXCNT_BITSIZE 24
AnnaBridge 182:a56a73fd2a6f 35 /* Timer max counter */
AnnaBridge 182:a56a73fd2a6f 36 #define NU_TMR_MAXCNT ((1 << NU_TMR_MAXCNT_BITSIZE) - 1)
AnnaBridge 174:b96e65c34a4d 37
AnnaBridge 182:a56a73fd2a6f 38 /* NOTE: Don't add static modifier here. These IRQ handler symbols are for linking.
AnnaBridge 182:a56a73fd2a6f 39 Vector table relocation is not actually supported for low-resource target. */
AnnaBridge 182:a56a73fd2a6f 40 void TMR1_IRQHandler(void);
AnnaBridge 174:b96e65c34a4d 41
AnnaBridge 182:a56a73fd2a6f 42 /* NOTE: To wake the system from power down mode, timer clock source must be ether LXT or LIRC. */
AnnaBridge 182:a56a73fd2a6f 43 static const struct nu_modinit_s timer1_modinit = {TIMER_1, TMR1_MODULE, CLK_CLKSEL1_TMR1_S_LXT, 0, TMR1_RST, TMR1_IRQn, (void *) TMR1_IRQHandler};
AnnaBridge 182:a56a73fd2a6f 44
AnnaBridge 182:a56a73fd2a6f 45 #define TIMER_MODINIT timer1_modinit
AnnaBridge 182:a56a73fd2a6f 46
AnnaBridge 182:a56a73fd2a6f 47 static int ticker_inited = 0;
AnnaBridge 174:b96e65c34a4d 48
AnnaBridge 174:b96e65c34a4d 49 #define TMR_CMP_MIN 2
AnnaBridge 174:b96e65c34a4d 50 #define TMR_CMP_MAX 0xFFFFFFu
AnnaBridge 174:b96e65c34a4d 51
AnnaBridge 184:08ed48f1de7f 52 /* NOTE: When system clock is higher than timer clock, we need to add 3 engine clock
AnnaBridge 184:08ed48f1de7f 53 * (recommended by designer) delay to wait for above timer control to take effect. */
AnnaBridge 184:08ed48f1de7f 54
AnnaBridge 174:b96e65c34a4d 55 void lp_ticker_init(void)
AnnaBridge 174:b96e65c34a4d 56 {
AnnaBridge 182:a56a73fd2a6f 57 if (ticker_inited) {
AnnaBridge 174:b96e65c34a4d 58 return;
AnnaBridge 174:b96e65c34a4d 59 }
AnnaBridge 182:a56a73fd2a6f 60 ticker_inited = 1;
AnnaBridge 174:b96e65c34a4d 61
AnnaBridge 174:b96e65c34a4d 62 // Reset module
AnnaBridge 182:a56a73fd2a6f 63 SYS_ResetModule(TIMER_MODINIT.rsetidx);
AnnaBridge 182:a56a73fd2a6f 64
AnnaBridge 174:b96e65c34a4d 65 // Select IP clock source
AnnaBridge 182:a56a73fd2a6f 66 CLK_SetModuleClock(TIMER_MODINIT.clkidx, TIMER_MODINIT.clksrc, TIMER_MODINIT.clkdiv);
AnnaBridge 182:a56a73fd2a6f 67
AnnaBridge 174:b96e65c34a4d 68 // Enable IP clock
AnnaBridge 182:a56a73fd2a6f 69 CLK_EnableModuleClock(TIMER_MODINIT.clkidx);
AnnaBridge 174:b96e65c34a4d 70
AnnaBridge 184:08ed48f1de7f 71 TIMER_T *timer_base = (TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname);
AnnaBridge 184:08ed48f1de7f 72
AnnaBridge 174:b96e65c34a4d 73 // Configure clock
AnnaBridge 184:08ed48f1de7f 74 uint32_t clk_timer = TIMER_GetModuleClock(timer_base);
AnnaBridge 182:a56a73fd2a6f 75 uint32_t prescale_timer = clk_timer / NU_TMRCLK_PER_SEC - 1;
AnnaBridge 182:a56a73fd2a6f 76 MBED_ASSERT((prescale_timer != (uint32_t) -1) && prescale_timer <= 127);
AnnaBridge 182:a56a73fd2a6f 77 MBED_ASSERT((clk_timer % NU_TMRCLK_PER_SEC) == 0);
AnnaBridge 182:a56a73fd2a6f 78 uint32_t cmp_timer = TMR_CMP_MAX;
AnnaBridge 182:a56a73fd2a6f 79 MBED_ASSERT(cmp_timer >= TMR_CMP_MIN && cmp_timer <= TMR_CMP_MAX);
AnnaBridge 174:b96e65c34a4d 80 // Continuous mode
AnnaBridge 184:08ed48f1de7f 81 timer_base->CTL = TIMER_CONTINUOUS_MODE;
AnnaBridge 184:08ed48f1de7f 82 wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3);
AnnaBridge 184:08ed48f1de7f 83
AnnaBridge 184:08ed48f1de7f 84 timer_base->PRECNT = prescale_timer;
AnnaBridge 184:08ed48f1de7f 85 wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3);
AnnaBridge 184:08ed48f1de7f 86
AnnaBridge 184:08ed48f1de7f 87 timer_base->CMPR = cmp_timer;
AnnaBridge 184:08ed48f1de7f 88 wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3);
AnnaBridge 182:a56a73fd2a6f 89
AnnaBridge 174:b96e65c34a4d 90 // Set vector
AnnaBridge 182:a56a73fd2a6f 91 NVIC_SetVector(TIMER_MODINIT.irq_n, (uint32_t) TIMER_MODINIT.var);
AnnaBridge 182:a56a73fd2a6f 92
AnnaBridge 182:a56a73fd2a6f 93 NVIC_EnableIRQ(TIMER_MODINIT.irq_n);
AnnaBridge 174:b96e65c34a4d 94
AnnaBridge 184:08ed48f1de7f 95 TIMER_EnableInt(timer_base);
AnnaBridge 184:08ed48f1de7f 96 wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3);
AnnaBridge 184:08ed48f1de7f 97
AnnaBridge 184:08ed48f1de7f 98 TIMER_EnableWakeup(timer_base);
AnnaBridge 182:a56a73fd2a6f 99 wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3);
AnnaBridge 184:08ed48f1de7f 100
AnnaBridge 184:08ed48f1de7f 101 TIMER_Start(timer_base);
AnnaBridge 184:08ed48f1de7f 102 wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3);
AnnaBridge 184:08ed48f1de7f 103
AnnaBridge 184:08ed48f1de7f 104 /* Wait for timer to start counting and raise active flag */
AnnaBridge 184:08ed48f1de7f 105 while(! (timer_base->CTL & TIMER_CTL_TMR_ACT_Msk));
AnnaBridge 174:b96e65c34a4d 106 }
AnnaBridge 174:b96e65c34a4d 107
AnnaBridge 174:b96e65c34a4d 108 timestamp_t lp_ticker_read()
AnnaBridge 182:a56a73fd2a6f 109 {
AnnaBridge 182:a56a73fd2a6f 110 if (! ticker_inited) {
AnnaBridge 174:b96e65c34a4d 111 lp_ticker_init();
AnnaBridge 174:b96e65c34a4d 112 }
AnnaBridge 174:b96e65c34a4d 113
AnnaBridge 184:08ed48f1de7f 114 TIMER_T *timer_base = (TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname);
AnnaBridge 182:a56a73fd2a6f 115
AnnaBridge 182:a56a73fd2a6f 116 return (TIMER_GetCounter(timer_base) / NU_TMRCLK_PER_TICK);
AnnaBridge 174:b96e65c34a4d 117 }
AnnaBridge 174:b96e65c34a4d 118
AnnaBridge 174:b96e65c34a4d 119 void lp_ticker_set_interrupt(timestamp_t timestamp)
AnnaBridge 174:b96e65c34a4d 120 {
AnnaBridge 182:a56a73fd2a6f 121 /* In continuous mode, counter will be reset to zero with the following sequence:
AnnaBridge 182:a56a73fd2a6f 122 * 1. Stop counting
AnnaBridge 182:a56a73fd2a6f 123 * 2. Configure new CMP value
AnnaBridge 182:a56a73fd2a6f 124 * 3. Restart counting
AnnaBridge 182:a56a73fd2a6f 125 *
AnnaBridge 182:a56a73fd2a6f 126 * This behavior is not what we want. To fix it, we could configure new CMP value
AnnaBridge 182:a56a73fd2a6f 127 * without stopping counting first.
AnnaBridge 182:a56a73fd2a6f 128 */
AnnaBridge 184:08ed48f1de7f 129 TIMER_T *timer_base = (TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname);
AnnaBridge 174:b96e65c34a4d 130
AnnaBridge 182:a56a73fd2a6f 131 /* NOTE: Because H/W timer requests min compare value, our implementation would have alarm delay of
AnnaBridge 182:a56a73fd2a6f 132 * (TMR_CMP_MIN - interval_clk) clocks when interval_clk is between [1, TMR_CMP_MIN). */
AnnaBridge 182:a56a73fd2a6f 133 uint32_t cmp_timer = timestamp * NU_TMRCLK_PER_TICK;
AnnaBridge 182:a56a73fd2a6f 134 cmp_timer = NU_CLAMP(cmp_timer, TMR_CMP_MIN, TMR_CMP_MAX);
AnnaBridge 184:08ed48f1de7f 135
AnnaBridge 182:a56a73fd2a6f 136 timer_base->CMPR = cmp_timer;
AnnaBridge 182:a56a73fd2a6f 137 wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3);
AnnaBridge 174:b96e65c34a4d 138 }
AnnaBridge 174:b96e65c34a4d 139
AnnaBridge 174:b96e65c34a4d 140 void lp_ticker_disable_interrupt(void)
AnnaBridge 174:b96e65c34a4d 141 {
AnnaBridge 182:a56a73fd2a6f 142 TIMER_DisableInt((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname));
AnnaBridge 184:08ed48f1de7f 143 wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3);
AnnaBridge 174:b96e65c34a4d 144 }
AnnaBridge 174:b96e65c34a4d 145
AnnaBridge 174:b96e65c34a4d 146 void lp_ticker_clear_interrupt(void)
AnnaBridge 174:b96e65c34a4d 147 {
AnnaBridge 182:a56a73fd2a6f 148 TIMER_ClearIntFlag((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname));
AnnaBridge 184:08ed48f1de7f 149 wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3);
AnnaBridge 174:b96e65c34a4d 150 }
AnnaBridge 174:b96e65c34a4d 151
AnnaBridge 182:a56a73fd2a6f 152 void lp_ticker_fire_interrupt(void)
AnnaBridge 174:b96e65c34a4d 153 {
AnnaBridge 182:a56a73fd2a6f 154 // NOTE: This event was in the past. Set the interrupt as pending, but don't process it here.
AnnaBridge 182:a56a73fd2a6f 155 // This prevents a recursive loop under heavy load which can lead to a stack overflow.
AnnaBridge 182:a56a73fd2a6f 156 NVIC_SetPendingIRQ(TIMER_MODINIT.irq_n);
AnnaBridge 174:b96e65c34a4d 157 }
AnnaBridge 174:b96e65c34a4d 158
AnnaBridge 182:a56a73fd2a6f 159 const ticker_info_t* lp_ticker_get_info()
AnnaBridge 174:b96e65c34a4d 160 {
AnnaBridge 182:a56a73fd2a6f 161 static const ticker_info_t info = {
AnnaBridge 182:a56a73fd2a6f 162 NU_TMRCLK_PER_SEC / NU_TMRCLK_PER_TICK,
AnnaBridge 182:a56a73fd2a6f 163 NU_TMR_MAXCNT_BITSIZE
AnnaBridge 182:a56a73fd2a6f 164 };
AnnaBridge 182:a56a73fd2a6f 165 return &info;
AnnaBridge 182:a56a73fd2a6f 166 }
AnnaBridge 182:a56a73fd2a6f 167
AnnaBridge 182:a56a73fd2a6f 168 void TMR1_IRQHandler(void)
AnnaBridge 182:a56a73fd2a6f 169 {
AnnaBridge 182:a56a73fd2a6f 170 TIMER_ClearIntFlag((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname));
AnnaBridge 184:08ed48f1de7f 171 wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3);
AnnaBridge 184:08ed48f1de7f 172
AnnaBridge 182:a56a73fd2a6f 173 TIMER_ClearWakeupFlag((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname));
AnnaBridge 184:08ed48f1de7f 174 wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3);
AnnaBridge 184:08ed48f1de7f 175
AnnaBridge 182:a56a73fd2a6f 176 // NOTE: lp_ticker_set_interrupt() may get called in lp_ticker_irq_handler();
AnnaBridge 182:a56a73fd2a6f 177 lp_ticker_irq_handler();
AnnaBridge 174:b96e65c34a4d 178 }
AnnaBridge 182:a56a73fd2a6f 179
AnnaBridge 174:b96e65c34a4d 180 #endif