mbed library sources. Supersedes mbed-src.
Dependents: Nucleo_Hello_Encoder BLE_iBeaconScan AM1805_DEMO DISCO-F429ZI_ExportTemplate1 ... more
targets/TARGET_NUVOTON/TARGET_M480/lp_ticker.c@187:0387e8f68319, 2018-09-06 (annotated)
- Committer:
- AnnaBridge
- Date:
- Thu Sep 06 13:40:20 2018 +0100
- Revision:
- 187:0387e8f68319
- Parent:
- 186:707f6e361f3e
- Child:
- 188:bcfe06ba3d64
mbed-dev library. Release version 163
Who changed what in which revision?
User | Revision | Line number | New contents of line |
---|---|---|---|
AnnaBridge | 172:7d866c31b3c5 | 1 | /* mbed Microcontroller Library |
AnnaBridge | 172:7d866c31b3c5 | 2 | * Copyright (c) 2015-2016 Nuvoton |
AnnaBridge | 172:7d866c31b3c5 | 3 | * |
AnnaBridge | 172:7d866c31b3c5 | 4 | * Licensed under the Apache License, Version 2.0 (the "License"); |
AnnaBridge | 172:7d866c31b3c5 | 5 | * you may not use this file except in compliance with the License. |
AnnaBridge | 172:7d866c31b3c5 | 6 | * You may obtain a copy of the License at |
AnnaBridge | 172:7d866c31b3c5 | 7 | * |
AnnaBridge | 172:7d866c31b3c5 | 8 | * http://www.apache.org/licenses/LICENSE-2.0 |
AnnaBridge | 172:7d866c31b3c5 | 9 | * |
AnnaBridge | 172:7d866c31b3c5 | 10 | * Unless required by applicable law or agreed to in writing, software |
AnnaBridge | 172:7d866c31b3c5 | 11 | * distributed under the License is distributed on an "AS IS" BASIS, |
AnnaBridge | 172:7d866c31b3c5 | 12 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
AnnaBridge | 172:7d866c31b3c5 | 13 | * See the License for the specific language governing permissions and |
AnnaBridge | 172:7d866c31b3c5 | 14 | * limitations under the License. |
AnnaBridge | 172:7d866c31b3c5 | 15 | */ |
AnnaBridge | 172:7d866c31b3c5 | 16 | |
AnnaBridge | 172:7d866c31b3c5 | 17 | #include "lp_ticker_api.h" |
AnnaBridge | 172:7d866c31b3c5 | 18 | |
Anna Bridge |
186:707f6e361f3e | 19 | #if DEVICE_LPTICKER |
AnnaBridge | 172:7d866c31b3c5 | 20 | |
AnnaBridge | 172:7d866c31b3c5 | 21 | #include "sleep_api.h" |
AnnaBridge | 182:a56a73fd2a6f | 22 | #include "mbed_wait_api.h" |
AnnaBridge | 182:a56a73fd2a6f | 23 | #include "mbed_assert.h" |
AnnaBridge | 172:7d866c31b3c5 | 24 | #include "nu_modutil.h" |
AnnaBridge | 172:7d866c31b3c5 | 25 | #include "nu_miscutil.h" |
AnnaBridge | 172:7d866c31b3c5 | 26 | |
AnnaBridge | 182:a56a73fd2a6f | 27 | /* Micro seconds per second */ |
AnnaBridge | 182:a56a73fd2a6f | 28 | #define NU_US_PER_SEC 1000000 |
AnnaBridge | 182:a56a73fd2a6f | 29 | /* Timer clock per lp_ticker tick */ |
AnnaBridge | 182:a56a73fd2a6f | 30 | #define NU_TMRCLK_PER_TICK 1 |
AnnaBridge | 182:a56a73fd2a6f | 31 | /* Timer clock per second */ |
AnnaBridge | 182:a56a73fd2a6f | 32 | #define NU_TMRCLK_PER_SEC (__LXT) |
AnnaBridge | 182:a56a73fd2a6f | 33 | /* Timer max counter bit size */ |
AnnaBridge | 182:a56a73fd2a6f | 34 | #define NU_TMR_MAXCNT_BITSIZE 24 |
AnnaBridge | 182:a56a73fd2a6f | 35 | /* Timer max counter */ |
AnnaBridge | 182:a56a73fd2a6f | 36 | #define NU_TMR_MAXCNT ((1 << NU_TMR_MAXCNT_BITSIZE) - 1) |
AnnaBridge | 172:7d866c31b3c5 | 37 | |
AnnaBridge | 182:a56a73fd2a6f | 38 | static void tmr1_vec(void); |
AnnaBridge | 172:7d866c31b3c5 | 39 | |
AnnaBridge | 182:a56a73fd2a6f | 40 | /* NOTE: To wake the system from power down mode, timer clock source must be ether LXT or LIRC. */ |
AnnaBridge | 182:a56a73fd2a6f | 41 | static const struct nu_modinit_s timer1_modinit = {TIMER_1, TMR1_MODULE, CLK_CLKSEL1_TMR1SEL_LXT, 0, TMR1_RST, TMR1_IRQn, (void *) tmr1_vec}; |
AnnaBridge | 182:a56a73fd2a6f | 42 | |
AnnaBridge | 182:a56a73fd2a6f | 43 | #define TIMER_MODINIT timer1_modinit |
AnnaBridge | 182:a56a73fd2a6f | 44 | |
AnnaBridge | 187:0387e8f68319 | 45 | /* Timer interrupt enable/disable |
AnnaBridge | 187:0387e8f68319 | 46 | * |
AnnaBridge | 187:0387e8f68319 | 47 | * Because Timer interrupt enable/disable (TIMER_EnableInt/TIMER_DisableInt) needs wait for lp_ticker, |
AnnaBridge | 187:0387e8f68319 | 48 | * we call NVIC_DisableIRQ/NVIC_EnableIRQ instead. |
AnnaBridge | 187:0387e8f68319 | 49 | */ |
AnnaBridge | 187:0387e8f68319 | 50 | |
AnnaBridge | 187:0387e8f68319 | 51 | /* Track ticker status */ |
AnnaBridge | 187:0387e8f68319 | 52 | static volatile uint16_t ticker_inited = 0; |
AnnaBridge | 172:7d866c31b3c5 | 53 | |
AnnaBridge | 172:7d866c31b3c5 | 54 | #define TMR_CMP_MIN 2 |
AnnaBridge | 172:7d866c31b3c5 | 55 | #define TMR_CMP_MAX 0xFFFFFFu |
AnnaBridge | 172:7d866c31b3c5 | 56 | |
AnnaBridge | 187:0387e8f68319 | 57 | /* Synchronization issue with LXT/LIRC-clocked Timer |
AnnaBridge | 187:0387e8f68319 | 58 | * |
AnnaBridge | 187:0387e8f68319 | 59 | * PCLK : typical HCLK/2 |
AnnaBridge | 187:0387e8f68319 | 60 | * ECLK (engine clock) : LXT/LIRC for Timer used to implement lp_ticker |
AnnaBridge | 187:0387e8f68319 | 61 | * |
AnnaBridge | 187:0387e8f68319 | 62 | * When system clock is higher than Timer clock (LXT/LIRC), we need to add delay for ECLK |
AnnaBridge | 187:0387e8f68319 | 63 | * domain to take effect: |
AnnaBridge | 187:0387e8f68319 | 64 | * 1. Write : typical 1PCLK + 2ECLK |
AnnaBridge | 187:0387e8f68319 | 65 | * Read-check doesn't work because it just checks PCLK domain and doesn't check into |
AnnaBridge | 187:0387e8f68319 | 66 | * ECLK domain. |
AnnaBridge | 187:0387e8f68319 | 67 | * 2. Clear interrupt flag : typical 2PCLK |
AnnaBridge | 187:0387e8f68319 | 68 | * It is very rare that we would meet dummy interrupt and get stuck in ISR until |
AnnaBridge | 187:0387e8f68319 | 69 | * 'clear interrupt flag' takes effect. The issue is ignorable because the pending |
AnnaBridge | 187:0387e8f68319 | 70 | * time is very short (at most 1 dummy interrupt). We won't take special handling for it. |
AnnaBridge | 187:0387e8f68319 | 71 | */ |
AnnaBridge | 184:08ed48f1de7f | 72 | |
AnnaBridge | 172:7d866c31b3c5 | 73 | void lp_ticker_init(void) |
AnnaBridge | 172:7d866c31b3c5 | 74 | { |
AnnaBridge | 182:a56a73fd2a6f | 75 | if (ticker_inited) { |
AnnaBridge | 187:0387e8f68319 | 76 | /* By HAL spec, ticker_init allows the ticker to keep counting and disables the |
AnnaBridge | 187:0387e8f68319 | 77 | * ticker interrupt. */ |
AnnaBridge | 187:0387e8f68319 | 78 | lp_ticker_disable_interrupt(); |
AnnaBridge | 187:0387e8f68319 | 79 | lp_ticker_clear_interrupt(); |
AnnaBridge | 187:0387e8f68319 | 80 | NVIC_ClearPendingIRQ(TIMER_MODINIT.irq_n); |
AnnaBridge | 172:7d866c31b3c5 | 81 | return; |
AnnaBridge | 172:7d866c31b3c5 | 82 | } |
AnnaBridge | 182:a56a73fd2a6f | 83 | ticker_inited = 1; |
AnnaBridge | 172:7d866c31b3c5 | 84 | |
AnnaBridge | 172:7d866c31b3c5 | 85 | // Reset module |
AnnaBridge | 182:a56a73fd2a6f | 86 | SYS_ResetModule(TIMER_MODINIT.rsetidx); |
AnnaBridge | 172:7d866c31b3c5 | 87 | |
AnnaBridge | 172:7d866c31b3c5 | 88 | // Select IP clock source |
AnnaBridge | 182:a56a73fd2a6f | 89 | CLK_SetModuleClock(TIMER_MODINIT.clkidx, TIMER_MODINIT.clksrc, TIMER_MODINIT.clkdiv); |
AnnaBridge | 182:a56a73fd2a6f | 90 | |
AnnaBridge | 172:7d866c31b3c5 | 91 | // Enable IP clock |
AnnaBridge | 182:a56a73fd2a6f | 92 | CLK_EnableModuleClock(TIMER_MODINIT.clkidx); |
AnnaBridge | 172:7d866c31b3c5 | 93 | |
AnnaBridge | 184:08ed48f1de7f | 94 | TIMER_T *timer_base = (TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname); |
AnnaBridge | 184:08ed48f1de7f | 95 | |
AnnaBridge | 172:7d866c31b3c5 | 96 | // Configure clock |
AnnaBridge | 184:08ed48f1de7f | 97 | uint32_t clk_timer = TIMER_GetModuleClock(timer_base); |
AnnaBridge | 182:a56a73fd2a6f | 98 | uint32_t prescale_timer = clk_timer / NU_TMRCLK_PER_SEC - 1; |
AnnaBridge | 182:a56a73fd2a6f | 99 | MBED_ASSERT((prescale_timer != (uint32_t) -1) && prescale_timer <= 127); |
AnnaBridge | 182:a56a73fd2a6f | 100 | MBED_ASSERT((clk_timer % NU_TMRCLK_PER_SEC) == 0); |
AnnaBridge | 182:a56a73fd2a6f | 101 | uint32_t cmp_timer = TMR_CMP_MAX; |
AnnaBridge | 182:a56a73fd2a6f | 102 | MBED_ASSERT(cmp_timer >= TMR_CMP_MIN && cmp_timer <= TMR_CMP_MAX); |
AnnaBridge | 172:7d866c31b3c5 | 103 | // Continuous mode |
AnnaBridge | 172:7d866c31b3c5 | 104 | // NOTE: TIMER_CTL_CNTDATEN_Msk exists in NUC472, but not in M451/M480. In M451/M480, TIMER_CNT is updated continuously by default. |
AnnaBridge | 184:08ed48f1de7f | 105 | timer_base->CTL = TIMER_CONTINUOUS_MODE | prescale_timer/* | TIMER_CTL_CNTDATEN_Msk*/; |
AnnaBridge | 184:08ed48f1de7f | 106 | wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3); |
AnnaBridge | 184:08ed48f1de7f | 107 | |
AnnaBridge | 184:08ed48f1de7f | 108 | timer_base->CMP = cmp_timer; |
AnnaBridge | 184:08ed48f1de7f | 109 | wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3); |
AnnaBridge | 172:7d866c31b3c5 | 110 | |
AnnaBridge | 172:7d866c31b3c5 | 111 | // Set vector |
AnnaBridge | 182:a56a73fd2a6f | 112 | NVIC_SetVector(TIMER_MODINIT.irq_n, (uint32_t) TIMER_MODINIT.var); |
AnnaBridge | 172:7d866c31b3c5 | 113 | |
AnnaBridge | 187:0387e8f68319 | 114 | NVIC_DisableIRQ(TIMER_MODINIT.irq_n); |
AnnaBridge | 172:7d866c31b3c5 | 115 | |
AnnaBridge | 184:08ed48f1de7f | 116 | TIMER_EnableInt(timer_base); |
AnnaBridge | 184:08ed48f1de7f | 117 | wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3); |
AnnaBridge | 184:08ed48f1de7f | 118 | |
AnnaBridge | 184:08ed48f1de7f | 119 | TIMER_EnableWakeup(timer_base); |
AnnaBridge | 182:a56a73fd2a6f | 120 | wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3); |
AnnaBridge | 184:08ed48f1de7f | 121 | |
AnnaBridge | 184:08ed48f1de7f | 122 | TIMER_Start(timer_base); |
AnnaBridge | 184:08ed48f1de7f | 123 | wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3); |
AnnaBridge | 184:08ed48f1de7f | 124 | |
AnnaBridge | 184:08ed48f1de7f | 125 | /* Wait for timer to start counting and raise active flag */ |
AnnaBridge | 184:08ed48f1de7f | 126 | while(! (timer_base->CTL & TIMER_CTL_ACTSTS_Msk)); |
AnnaBridge | 172:7d866c31b3c5 | 127 | } |
AnnaBridge | 172:7d866c31b3c5 | 128 | |
AnnaBridge | 187:0387e8f68319 | 129 | void lp_ticker_free(void) |
AnnaBridge | 187:0387e8f68319 | 130 | { |
AnnaBridge | 187:0387e8f68319 | 131 | TIMER_T *timer_base = (TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname); |
AnnaBridge | 187:0387e8f68319 | 132 | |
AnnaBridge | 187:0387e8f68319 | 133 | /* Stop counting */ |
AnnaBridge | 187:0387e8f68319 | 134 | TIMER_Stop(timer_base); |
AnnaBridge | 187:0387e8f68319 | 135 | wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3); |
AnnaBridge | 187:0387e8f68319 | 136 | |
AnnaBridge | 187:0387e8f68319 | 137 | /* Wait for timer to stop counting and unset active flag */ |
AnnaBridge | 187:0387e8f68319 | 138 | while((timer_base->CTL & TIMER_CTL_ACTSTS_Msk)); |
AnnaBridge | 187:0387e8f68319 | 139 | |
AnnaBridge | 187:0387e8f68319 | 140 | /* Disable wakeup */ |
AnnaBridge | 187:0387e8f68319 | 141 | TIMER_DisableWakeup(timer_base); |
AnnaBridge | 187:0387e8f68319 | 142 | wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3); |
AnnaBridge | 187:0387e8f68319 | 143 | |
AnnaBridge | 187:0387e8f68319 | 144 | /* Disable interrupt */ |
AnnaBridge | 187:0387e8f68319 | 145 | TIMER_DisableInt(timer_base); |
AnnaBridge | 187:0387e8f68319 | 146 | wait_us((NU_US_PER_SEC / NU_TMRCLK_PER_SEC) * 3); |
AnnaBridge | 187:0387e8f68319 | 147 | |
AnnaBridge | 187:0387e8f68319 | 148 | NVIC_DisableIRQ(TIMER_MODINIT.irq_n); |
AnnaBridge | 187:0387e8f68319 | 149 | |
AnnaBridge | 187:0387e8f68319 | 150 | /* Disable IP clock */ |
AnnaBridge | 187:0387e8f68319 | 151 | CLK_DisableModuleClock(TIMER_MODINIT.clkidx); |
AnnaBridge | 187:0387e8f68319 | 152 | |
AnnaBridge | 187:0387e8f68319 | 153 | ticker_inited = 0; |
AnnaBridge | 187:0387e8f68319 | 154 | } |
AnnaBridge | 187:0387e8f68319 | 155 | |
AnnaBridge | 172:7d866c31b3c5 | 156 | timestamp_t lp_ticker_read() |
AnnaBridge | 172:7d866c31b3c5 | 157 | { |
AnnaBridge | 182:a56a73fd2a6f | 158 | if (! ticker_inited) { |
AnnaBridge | 172:7d866c31b3c5 | 159 | lp_ticker_init(); |
AnnaBridge | 172:7d866c31b3c5 | 160 | } |
AnnaBridge | 172:7d866c31b3c5 | 161 | |
AnnaBridge | 184:08ed48f1de7f | 162 | TIMER_T *timer_base = (TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname); |
AnnaBridge | 172:7d866c31b3c5 | 163 | |
AnnaBridge | 182:a56a73fd2a6f | 164 | return (TIMER_GetCounter(timer_base) / NU_TMRCLK_PER_TICK); |
AnnaBridge | 172:7d866c31b3c5 | 165 | } |
AnnaBridge | 172:7d866c31b3c5 | 166 | |
AnnaBridge | 172:7d866c31b3c5 | 167 | void lp_ticker_set_interrupt(timestamp_t timestamp) |
AnnaBridge | 172:7d866c31b3c5 | 168 | { |
AnnaBridge | 182:a56a73fd2a6f | 169 | /* In continuous mode, counter will be reset to zero with the following sequence: |
AnnaBridge | 182:a56a73fd2a6f | 170 | * 1. Stop counting |
AnnaBridge | 182:a56a73fd2a6f | 171 | * 2. Configure new CMP value |
AnnaBridge | 182:a56a73fd2a6f | 172 | * 3. Restart counting |
AnnaBridge | 182:a56a73fd2a6f | 173 | * |
AnnaBridge | 182:a56a73fd2a6f | 174 | * This behavior is not what we want. To fix it, we could configure new CMP value |
AnnaBridge | 182:a56a73fd2a6f | 175 | * without stopping counting first. |
AnnaBridge | 182:a56a73fd2a6f | 176 | */ |
AnnaBridge | 184:08ed48f1de7f | 177 | TIMER_T *timer_base = (TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname); |
AnnaBridge | 172:7d866c31b3c5 | 178 | |
AnnaBridge | 182:a56a73fd2a6f | 179 | /* NOTE: Because H/W timer requests min compare value, our implementation would have alarm delay of |
AnnaBridge | 182:a56a73fd2a6f | 180 | * (TMR_CMP_MIN - interval_clk) clocks when interval_clk is between [1, TMR_CMP_MIN). */ |
AnnaBridge | 182:a56a73fd2a6f | 181 | uint32_t cmp_timer = timestamp * NU_TMRCLK_PER_TICK; |
AnnaBridge | 182:a56a73fd2a6f | 182 | cmp_timer = NU_CLAMP(cmp_timer, TMR_CMP_MIN, TMR_CMP_MAX); |
AnnaBridge | 184:08ed48f1de7f | 183 | |
AnnaBridge | 187:0387e8f68319 | 184 | /* NOTE: Rely on LPTICKER_DELAY_TICKS to be non-blocking. */ |
AnnaBridge | 182:a56a73fd2a6f | 185 | timer_base->CMP = cmp_timer; |
AnnaBridge | 187:0387e8f68319 | 186 | |
AnnaBridge | 187:0387e8f68319 | 187 | /* We can call ticker_irq_handler now. */ |
AnnaBridge | 187:0387e8f68319 | 188 | NVIC_EnableIRQ(TIMER_MODINIT.irq_n); |
AnnaBridge | 182:a56a73fd2a6f | 189 | } |
AnnaBridge | 182:a56a73fd2a6f | 190 | |
AnnaBridge | 182:a56a73fd2a6f | 191 | void lp_ticker_disable_interrupt(void) |
AnnaBridge | 182:a56a73fd2a6f | 192 | { |
AnnaBridge | 187:0387e8f68319 | 193 | /* We cannot call ticker_irq_handler now. */ |
AnnaBridge | 187:0387e8f68319 | 194 | NVIC_DisableIRQ(TIMER_MODINIT.irq_n); |
AnnaBridge | 182:a56a73fd2a6f | 195 | } |
AnnaBridge | 182:a56a73fd2a6f | 196 | |
AnnaBridge | 182:a56a73fd2a6f | 197 | void lp_ticker_clear_interrupt(void) |
AnnaBridge | 182:a56a73fd2a6f | 198 | { |
AnnaBridge | 187:0387e8f68319 | 199 | /* To avoid sync issue, we clear TIF/TWKF simultaneously rather than call separate |
AnnaBridge | 187:0387e8f68319 | 200 | * driver API: |
AnnaBridge | 187:0387e8f68319 | 201 | * |
AnnaBridge | 187:0387e8f68319 | 202 | * TIMER_ClearIntFlag((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname)); |
AnnaBridge | 187:0387e8f68319 | 203 | * TIMER_ClearWakeupFlag((TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname)); |
AnnaBridge | 187:0387e8f68319 | 204 | */ |
AnnaBridge | 187:0387e8f68319 | 205 | TIMER_T *timer_base = (TIMER_T *) NU_MODBASE(TIMER_MODINIT.modname); |
AnnaBridge | 187:0387e8f68319 | 206 | timer_base->INTSTS = TIMER_INTSTS_TIF_Msk | TIMER_INTSTS_TWKF_Msk; |
AnnaBridge | 172:7d866c31b3c5 | 207 | } |
AnnaBridge | 172:7d866c31b3c5 | 208 | |
AnnaBridge | 172:7d866c31b3c5 | 209 | void lp_ticker_fire_interrupt(void) |
AnnaBridge | 172:7d866c31b3c5 | 210 | { |
AnnaBridge | 172:7d866c31b3c5 | 211 | // NOTE: This event was in the past. Set the interrupt as pending, but don't process it here. |
AnnaBridge | 172:7d866c31b3c5 | 212 | // This prevents a recursive loop under heavy load which can lead to a stack overflow. |
AnnaBridge | 182:a56a73fd2a6f | 213 | NVIC_SetPendingIRQ(TIMER_MODINIT.irq_n); |
AnnaBridge | 187:0387e8f68319 | 214 | |
AnnaBridge | 187:0387e8f68319 | 215 | /* We can call ticker_irq_handler now. */ |
AnnaBridge | 187:0387e8f68319 | 216 | NVIC_EnableIRQ(TIMER_MODINIT.irq_n); |
AnnaBridge | 172:7d866c31b3c5 | 217 | } |
AnnaBridge | 172:7d866c31b3c5 | 218 | |
AnnaBridge | 182:a56a73fd2a6f | 219 | const ticker_info_t* lp_ticker_get_info() |
AnnaBridge | 172:7d866c31b3c5 | 220 | { |
AnnaBridge | 182:a56a73fd2a6f | 221 | static const ticker_info_t info = { |
AnnaBridge | 182:a56a73fd2a6f | 222 | NU_TMRCLK_PER_SEC / NU_TMRCLK_PER_TICK, |
AnnaBridge | 182:a56a73fd2a6f | 223 | NU_TMR_MAXCNT_BITSIZE |
AnnaBridge | 182:a56a73fd2a6f | 224 | }; |
AnnaBridge | 182:a56a73fd2a6f | 225 | return &info; |
AnnaBridge | 172:7d866c31b3c5 | 226 | } |
AnnaBridge | 172:7d866c31b3c5 | 227 | |
AnnaBridge | 182:a56a73fd2a6f | 228 | static void tmr1_vec(void) |
AnnaBridge | 172:7d866c31b3c5 | 229 | { |
AnnaBridge | 187:0387e8f68319 | 230 | lp_ticker_clear_interrupt(); |
AnnaBridge | 184:08ed48f1de7f | 231 | |
AnnaBridge | 182:a56a73fd2a6f | 232 | // NOTE: lp_ticker_set_interrupt() may get called in lp_ticker_irq_handler(); |
AnnaBridge | 182:a56a73fd2a6f | 233 | lp_ticker_irq_handler(); |
AnnaBridge | 182:a56a73fd2a6f | 234 | } |
AnnaBridge | 172:7d866c31b3c5 | 235 | |
AnnaBridge | 172:7d866c31b3c5 | 236 | #endif |