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Dependents: EthernetInterface EthernetInterface EthernetInterface_RSF EthernetInterface ... more
Revision 13:409b1b671df2, committed 2014-05-23
- Comitter:
- mbed_official
- Date:
- Fri May 23 05:45:26 2014 +0100
- Parent:
- 12:8722e4b223d8
- Child:
- 14:578727b0a909
- Commit message:
- Synchronized with git revision 62605dfaaae938eb02efb183021248270793666b
Full URL: https://github.com/mbedmicro/mbed/commit/62605dfaaae938eb02efb183021248270793666b/
Signed-off-by: Sergio Scaglia <sergio.scaglia@arm.com>
Changed in this revision
| arch/TARGET_K64F/fsl_enet_driver.c | Show annotated file Show diff for this revision Revisions of this file |
--- a/arch/TARGET_K64F/fsl_enet_driver.c Wed May 21 23:15:24 2014 +0100
+++ b/arch/TARGET_K64F/fsl_enet_driver.c Fri May 23 05:45:26 2014 +0100
@@ -264,6 +264,13 @@
{
return kStatus_ENET_InvalidInput;
}
+
+ /* Initialize values that will not be initialized later on */
+ rxFifo.rxEmpty = 0;
+ rxFifo.rxFull = 0;
+ txFifo.isStoreForwardEnabled = 0;
+ txFifo.txFifoWrite = 0;
+ txFifo.txEmpty = 0;
/* Configure tx/rx accelerator*/
if (enetIfPtr->macCfgPtr->isRxAccelEnabled)
@@ -290,6 +297,16 @@
txFifo.isStoreForwardEnabled = 1;
}
+
+ /* Set TFWR value if STRFWD is not being used */
+ if (txFifo.isStoreForwardEnabled == 1)
+ txFifo.txFifoWrite = 0;
+ else
+ /* TFWR value is a trade-off between transmit latency and risk of transmit FIFO underrun due to contention for the system bus
+ TFWR = 15 means transmission will begin once 960 bytes has been written to the Tx FIFO (for frames larger than 960 bytes)
+ See Section 45.4.18 - Transmit FIFO Watermark Register of the K64F Reference Manual for details */
+ txFifo.txFifoWrite = 15;
+
/* Configure tx/rx FIFO with default value*/
rxFifo.rxAlmostEmpty = 4;
rxFifo.rxAlmostFull = 4;
