Daniel Peter
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RtosTest
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device.h
00001 //****************************************************************************** 00002 //* 00003 //* FULLNAME: Single-Chip Microcontroller Real-Time Operating System 00004 //* 00005 //* NICKNAME: scmRTOS 00006 //* 00007 //* PROCESSOR: ARM Cortex-M3 00008 //* 00009 //* TOOLKIT: EWARM (IAR Systems) 00010 //* 00011 //* PURPOSE: Device Definitions 00012 //* 00013 //* Version: 3.10 00014 //* 00015 //* $Revision: 196 $ 00016 //* $Date:: 2008-06-19 #$ 00017 //* 00018 //* Copyright (c) 2003-2010, Harry E. Zhurov 00019 //* 00020 //* Permission is hereby granted, free of charge, to any person 00021 //* obtaining a copy of this software and associated documentation 00022 //* files (the "Software"), to deal in the Software without restriction, 00023 //* including without limitation the rights to use, copy, modify, merge, 00024 //* publish, distribute, sublicense, and/or sell copies of the Software, 00025 //* and to permit persons to whom the Software is furnished to do so, 00026 //* subject to the following conditions: 00027 //* 00028 //* The above copyright notice and this permission notice shall be included 00029 //* in all copies or substantial portions of the Software. 00030 //* 00031 //* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 00032 //* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 00033 //* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 00034 //* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY 00035 //* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 00036 //* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH 00037 //* THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 00038 //* 00039 //* ================================================================= 00040 //* See http://scmrtos.sourceforge.net for documentation, latest 00041 //* information, license and contact details. 00042 //* ================================================================= 00043 //* 00044 //****************************************************************************** 00045 //* Ported by Andrey Chuikin, Copyright (c) 2008-2010 00046 00047 #ifndef DEVICE_H 00048 #define DEVICE_H 00049 00050 #include <commdefs.h> 00051 00052 //------------------------------------------------------------------------------ 00053 // Definitions for some processor registers in order to not include specific 00054 // header file for various Cortex-M3 processor derivatives. 00055 #define CPU_ICSR ( ( sfr_dword *) 0xE000ED04 ) // Interrupt Control State Register 00056 #define CPU_SYSTICKCSR ( ( sfr_dword *) 0xE000E010 ) // SysTick Control and Status Register 00057 #define CPU_SYSTICKCSR_EINT 0x02 // Bit for enable/disable SysTick interrupt 00058 00059 00060 #endif /* DEVICE_H */
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