marcus chiou
mbed library sources
Fork of
mbed-src
by 
mbed official
targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sram.c@384:ef87175507f1, 2014-11-04 (annotated)
- Committer:
- mbed_official
- Date:
- Tue Nov 04 09:30:07 2014 +0000
- Revision:
- 384:ef87175507f1
- Parent:
- 380:510f0c3515e3
- Child:
- 532:fe11edbda85c
Synchronized with git revision 8f7778d898867246da01cfccb39396c2e419c1f6
Full URL: https://github.com/mbedmicro/mbed/commit/8f7778d898867246da01cfccb39396c2e419c1f6/
Targets: Nucleo F4xx - Reorder f4xx structure
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| mbed_official | 235:685d5f11838f | 1 | /** |
| mbed_official | 235:685d5f11838f | 2 | ****************************************************************************** |
| mbed_official | 235:685d5f11838f | 3 | * @file stm32f4xx_hal_sram.c |
| mbed_official | 235:685d5f11838f | 4 | * @author MCD Application Team |
| mbed_official | 235:685d5f11838f | 5 | * @version V1.1.0 |
| mbed_official | 235:685d5f11838f | 6 | * @date 19-June-2014 |
| mbed_official | 235:685d5f11838f | 7 | * @brief SRAM HAL module driver. |
| mbed_official | 235:685d5f11838f | 8 | * This file provides a generic firmware to drive SRAM memories |
| mbed_official | 235:685d5f11838f | 9 | * mounted as external device. |
| mbed_official | 235:685d5f11838f | 10 | * |
| mbed_official | 235:685d5f11838f | 11 | @verbatim |
| mbed_official | 235:685d5f11838f | 12 | ============================================================================== |
| mbed_official | 235:685d5f11838f | 13 | ##### How to use this driver ##### |
| mbed_official | 235:685d5f11838f | 14 | ============================================================================== |
| mbed_official | 235:685d5f11838f | 15 | [..] |
| mbed_official | 235:685d5f11838f | 16 | This driver is a generic layered driver which contains a set of APIs used to |
| mbed_official | 235:685d5f11838f | 17 | control SRAM memories. It uses the FMC layer functions to interface |
| mbed_official | 235:685d5f11838f | 18 | with SRAM devices. |
| mbed_official | 235:685d5f11838f | 19 | The following sequence should be followed to configure the FMC/FSMC to interface |
| mbed_official | 235:685d5f11838f | 20 | with SRAM/PSRAM memories: |
| mbed_official | 235:685d5f11838f | 21 | |
| mbed_official | 235:685d5f11838f | 22 | (#) Declare a SRAM_HandleTypeDef handle structure, for example: |
| mbed_official | 235:685d5f11838f | 23 | SRAM_HandleTypeDef hsram; and: |
| mbed_official | 235:685d5f11838f | 24 | |
| mbed_official | 235:685d5f11838f | 25 | (++) Fill the SRAM_HandleTypeDef handle "Init" field with the allowed |
| mbed_official | 235:685d5f11838f | 26 | values of the structure member. |
| mbed_official | 235:685d5f11838f | 27 | |
| mbed_official | 235:685d5f11838f | 28 | (++) Fill the SRAM_HandleTypeDef handle "Instance" field with a predefined |
| mbed_official | 235:685d5f11838f | 29 | base register instance for NOR or SRAM device |
| mbed_official | 235:685d5f11838f | 30 | |
| mbed_official | 235:685d5f11838f | 31 | (++) Fill the SRAM_HandleTypeDef handle "Extended" field with a predefined |
| mbed_official | 235:685d5f11838f | 32 | base register instance for NOR or SRAM extended mode |
| mbed_official | 235:685d5f11838f | 33 | |
| mbed_official | 235:685d5f11838f | 34 | (#) Declare two FMC_NORSRAM_TimingTypeDef structures, for both normal and extended |
| mbed_official | 235:685d5f11838f | 35 | mode timings; for example: |
| mbed_official | 235:685d5f11838f | 36 | FMC_NORSRAM_TimingTypeDef Timing and FMC_NORSRAM_TimingTypeDef ExTiming; |
| mbed_official | 235:685d5f11838f | 37 | and fill its fields with the allowed values of the structure member. |
| mbed_official | 235:685d5f11838f | 38 | |
| mbed_official | 235:685d5f11838f | 39 | (#) Initialize the SRAM Controller by calling the function HAL_SRAM_Init(). This function |
| mbed_official | 235:685d5f11838f | 40 | performs the following sequence: |
| mbed_official | 235:685d5f11838f | 41 | |
| mbed_official | 235:685d5f11838f | 42 | (##) MSP hardware layer configuration using the function HAL_SRAM_MspInit() |
| mbed_official | 235:685d5f11838f | 43 | (##) Control register configuration using the FMC NORSRAM interface function |
| mbed_official | 235:685d5f11838f | 44 | FMC_NORSRAM_Init() |
| mbed_official | 235:685d5f11838f | 45 | (##) Timing register configuration using the FMC NORSRAM interface function |
| mbed_official | 235:685d5f11838f | 46 | FMC_NORSRAM_Timing_Init() |
| mbed_official | 235:685d5f11838f | 47 | (##) Extended mode Timing register configuration using the FMC NORSRAM interface function |
| mbed_official | 235:685d5f11838f | 48 | FMC_NORSRAM_Extended_Timing_Init() |
| mbed_official | 235:685d5f11838f | 49 | (##) Enable the SRAM device using the macro __FMC_NORSRAM_ENABLE() |
| mbed_official | 235:685d5f11838f | 50 | |
| mbed_official | 235:685d5f11838f | 51 | (#) At this stage you can perform read/write accesses from/to the memory connected |
| mbed_official | 235:685d5f11838f | 52 | to the NOR/SRAM Bank. You can perform either polling or DMA transfer using the |
| mbed_official | 235:685d5f11838f | 53 | following APIs: |
| mbed_official | 235:685d5f11838f | 54 | (++) HAL_SRAM_Read()/HAL_SRAM_Write() for polling read/write access |
| mbed_official | 235:685d5f11838f | 55 | (++) HAL_SRAM_Read_DMA()/HAL_SRAM_Write_DMA() for DMA read/write transfer |
| mbed_official | 235:685d5f11838f | 56 | |
| mbed_official | 235:685d5f11838f | 57 | (#) You can also control the SRAM device by calling the control APIs HAL_SRAM_WriteOperation_Enable()/ |
| mbed_official | 235:685d5f11838f | 58 | HAL_SRAM_WriteOperation_Disable() to respectively enable/disable the SRAM write operation |
| mbed_official | 235:685d5f11838f | 59 | |
| mbed_official | 235:685d5f11838f | 60 | (#) You can continuously monitor the SRAM device HAL state by calling the function |
| mbed_official | 235:685d5f11838f | 61 | HAL_SRAM_GetState() |
| mbed_official | 235:685d5f11838f | 62 | |
| mbed_official | 235:685d5f11838f | 63 | @endverbatim |
| mbed_official | 235:685d5f11838f | 64 | ****************************************************************************** |
| mbed_official | 235:685d5f11838f | 65 | * @attention |
| mbed_official | 235:685d5f11838f | 66 | * |
| mbed_official | 235:685d5f11838f | 67 | * <h2><center>© COPYRIGHT(c) 2014 STMicroelectronics</center></h2> |
| mbed_official | 235:685d5f11838f | 68 | * |
| mbed_official | 235:685d5f11838f | 69 | * Redistribution and use in source and binary forms, with or without modification, |
| mbed_official | 235:685d5f11838f | 70 | * are permitted provided that the following conditions are met: |
| mbed_official | 235:685d5f11838f | 71 | * 1. Redistributions of source code must retain the above copyright notice, |
| mbed_official | 235:685d5f11838f | 72 | * this list of conditions and the following disclaimer. |
| mbed_official | 235:685d5f11838f | 73 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| mbed_official | 235:685d5f11838f | 74 | * this list of conditions and the following disclaimer in the documentation |
| mbed_official | 235:685d5f11838f | 75 | * and/or other materials provided with the distribution. |
| mbed_official | 235:685d5f11838f | 76 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| mbed_official | 235:685d5f11838f | 77 | * may be used to endorse or promote products derived from this software |
| mbed_official | 235:685d5f11838f | 78 | * without specific prior written permission. |
| mbed_official | 235:685d5f11838f | 79 | * |
| mbed_official | 235:685d5f11838f | 80 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| mbed_official | 235:685d5f11838f | 81 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| mbed_official | 235:685d5f11838f | 82 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| mbed_official | 235:685d5f11838f | 83 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| mbed_official | 235:685d5f11838f | 84 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| mbed_official | 235:685d5f11838f | 85 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| mbed_official | 235:685d5f11838f | 86 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| mbed_official | 235:685d5f11838f | 87 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| mbed_official | 235:685d5f11838f | 88 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| mbed_official | 235:685d5f11838f | 89 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| mbed_official | 235:685d5f11838f | 90 | * |
| mbed_official | 235:685d5f11838f | 91 | ****************************************************************************** |
| mbed_official | 235:685d5f11838f | 92 | */ |
| mbed_official | 235:685d5f11838f | 93 | |
| mbed_official | 235:685d5f11838f | 94 | /* Includes ------------------------------------------------------------------*/ |
| mbed_official | 235:685d5f11838f | 95 | #include "stm32f4xx_hal.h" |
| mbed_official | 235:685d5f11838f | 96 | |
| mbed_official | 235:685d5f11838f | 97 | /** @addtogroup STM32F4xx_HAL_Driver |
| mbed_official | 235:685d5f11838f | 98 | * @{ |
| mbed_official | 235:685d5f11838f | 99 | */ |
| mbed_official | 235:685d5f11838f | 100 | |
| mbed_official | 235:685d5f11838f | 101 | /** @defgroup SRAM |
| mbed_official | 235:685d5f11838f | 102 | * @brief SRAM driver modules |
| mbed_official | 235:685d5f11838f | 103 | * @{ |
| mbed_official | 235:685d5f11838f | 104 | */ |
| mbed_official | 235:685d5f11838f | 105 | #ifdef HAL_SRAM_MODULE_ENABLED |
| mbed_official | 235:685d5f11838f | 106 | |
| mbed_official | 235:685d5f11838f | 107 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) |
| mbed_official | 235:685d5f11838f | 108 | |
| mbed_official | 235:685d5f11838f | 109 | /* Private typedef -----------------------------------------------------------*/ |
| mbed_official | 235:685d5f11838f | 110 | /* Private define ------------------------------------------------------------*/ |
| mbed_official | 235:685d5f11838f | 111 | /* Private macro -------------------------------------------------------------*/ |
| mbed_official | 235:685d5f11838f | 112 | /* Private variables ---------------------------------------------------------*/ |
| mbed_official | 235:685d5f11838f | 113 | /* Private function prototypes -----------------------------------------------*/ |
| mbed_official | 235:685d5f11838f | 114 | |
| mbed_official | 235:685d5f11838f | 115 | /* Private functions ---------------------------------------------------------*/ |
| mbed_official | 235:685d5f11838f | 116 | |
| mbed_official | 235:685d5f11838f | 117 | /** @defgroup SRAM_Private_Functions |
| mbed_official | 235:685d5f11838f | 118 | * @{ |
| mbed_official | 235:685d5f11838f | 119 | */ |
| mbed_official | 235:685d5f11838f | 120 | |
| mbed_official | 235:685d5f11838f | 121 | /** @defgroup SRAM_Group1 Initialization and de-initialization functions |
| mbed_official | 235:685d5f11838f | 122 | * @brief Initialization and Configuration functions |
| mbed_official | 235:685d5f11838f | 123 | * |
| mbed_official | 235:685d5f11838f | 124 | @verbatim |
| mbed_official | 235:685d5f11838f | 125 | ============================================================================== |
| mbed_official | 235:685d5f11838f | 126 | ##### SRAM Initialization and de_initialization functions ##### |
| mbed_official | 235:685d5f11838f | 127 | ============================================================================== |
| mbed_official | 235:685d5f11838f | 128 | [..] This section provides functions allowing to initialize/de-initialize |
| mbed_official | 235:685d5f11838f | 129 | the SRAM memory |
| mbed_official | 235:685d5f11838f | 130 | |
| mbed_official | 235:685d5f11838f | 131 | @endverbatim |
| mbed_official | 235:685d5f11838f | 132 | * @{ |
| mbed_official | 235:685d5f11838f | 133 | */ |
| mbed_official | 235:685d5f11838f | 134 | |
| mbed_official | 235:685d5f11838f | 135 | /** |
| mbed_official | 235:685d5f11838f | 136 | * @brief Performs the SRAM device initialization sequence |
| mbed_official | 235:685d5f11838f | 137 | * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains |
| mbed_official | 235:685d5f11838f | 138 | * the configuration information for SRAM module. |
| mbed_official | 235:685d5f11838f | 139 | * @param Timing: Pointer to SRAM control timing structure |
| mbed_official | 235:685d5f11838f | 140 | * @param ExtTiming: Pointer to SRAM extended mode timing structure |
| mbed_official | 235:685d5f11838f | 141 | * @retval HAL status |
| mbed_official | 235:685d5f11838f | 142 | */ |
| mbed_official | 235:685d5f11838f | 143 | HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming) |
| mbed_official | 235:685d5f11838f | 144 | { |
| mbed_official | 235:685d5f11838f | 145 | /* Check the SRAM handle parameter */ |
| mbed_official | 384:ef87175507f1 | 146 | if(hsram == HAL_NULL) |
| mbed_official | 235:685d5f11838f | 147 | { |
| mbed_official | 235:685d5f11838f | 148 | return HAL_ERROR; |
| mbed_official | 235:685d5f11838f | 149 | } |
| mbed_official | 235:685d5f11838f | 150 | |
| mbed_official | 235:685d5f11838f | 151 | if(hsram->State == HAL_SRAM_STATE_RESET) |
| mbed_official | 235:685d5f11838f | 152 | { |
| mbed_official | 235:685d5f11838f | 153 | /* Initialize the low level hardware (MSP) */ |
| mbed_official | 235:685d5f11838f | 154 | HAL_SRAM_MspInit(hsram); |
| mbed_official | 235:685d5f11838f | 155 | } |
| mbed_official | 235:685d5f11838f | 156 | |
| mbed_official | 235:685d5f11838f | 157 | /* Initialize SRAM control Interface */ |
| mbed_official | 235:685d5f11838f | 158 | FMC_NORSRAM_Init(hsram->Instance, &(hsram->Init)); |
| mbed_official | 235:685d5f11838f | 159 | |
| mbed_official | 235:685d5f11838f | 160 | /* Initialize SRAM timing Interface */ |
| mbed_official | 235:685d5f11838f | 161 | FMC_NORSRAM_Timing_Init(hsram->Instance, Timing, hsram->Init.NSBank); |
| mbed_official | 235:685d5f11838f | 162 | |
| mbed_official | 235:685d5f11838f | 163 | /* Initialize SRAM extended mode timing Interface */ |
| mbed_official | 235:685d5f11838f | 164 | FMC_NORSRAM_Extended_Timing_Init(hsram->Extended, ExtTiming, hsram->Init.NSBank, hsram->Init.ExtendedMode); |
| mbed_official | 235:685d5f11838f | 165 | |
| mbed_official | 235:685d5f11838f | 166 | /* Enable the NORSRAM device */ |
| mbed_official | 235:685d5f11838f | 167 | __FMC_NORSRAM_ENABLE(hsram->Instance, hsram->Init.NSBank); |
| mbed_official | 235:685d5f11838f | 168 | |
| mbed_official | 235:685d5f11838f | 169 | return HAL_OK; |
| mbed_official | 235:685d5f11838f | 170 | } |
| mbed_official | 235:685d5f11838f | 171 | |
| mbed_official | 235:685d5f11838f | 172 | /** |
| mbed_official | 235:685d5f11838f | 173 | * @brief Performs the SRAM device De-initialization sequence. |
| mbed_official | 235:685d5f11838f | 174 | * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains |
| mbed_official | 235:685d5f11838f | 175 | * the configuration information for SRAM module. |
| mbed_official | 235:685d5f11838f | 176 | * @retval HAL status |
| mbed_official | 235:685d5f11838f | 177 | */ |
| mbed_official | 235:685d5f11838f | 178 | HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram) |
| mbed_official | 235:685d5f11838f | 179 | { |
| mbed_official | 235:685d5f11838f | 180 | /* De-Initialize the low level hardware (MSP) */ |
| mbed_official | 235:685d5f11838f | 181 | HAL_SRAM_MspDeInit(hsram); |
| mbed_official | 235:685d5f11838f | 182 | |
| mbed_official | 235:685d5f11838f | 183 | /* Configure the SRAM registers with their reset values */ |
| mbed_official | 235:685d5f11838f | 184 | FMC_NORSRAM_DeInit(hsram->Instance, hsram->Extended, hsram->Init.NSBank); |
| mbed_official | 235:685d5f11838f | 185 | |
| mbed_official | 235:685d5f11838f | 186 | hsram->State = HAL_SRAM_STATE_RESET; |
| mbed_official | 235:685d5f11838f | 187 | |
| mbed_official | 235:685d5f11838f | 188 | /* Release Lock */ |
| mbed_official | 235:685d5f11838f | 189 | __HAL_UNLOCK(hsram); |
| mbed_official | 235:685d5f11838f | 190 | |
| mbed_official | 235:685d5f11838f | 191 | return HAL_OK; |
| mbed_official | 235:685d5f11838f | 192 | } |
| mbed_official | 235:685d5f11838f | 193 | |
| mbed_official | 235:685d5f11838f | 194 | /** |
| mbed_official | 235:685d5f11838f | 195 | * @brief SRAM MSP Init. |
| mbed_official | 235:685d5f11838f | 196 | * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains |
| mbed_official | 235:685d5f11838f | 197 | * the configuration information for SRAM module. |
| mbed_official | 235:685d5f11838f | 198 | * @retval None |
| mbed_official | 235:685d5f11838f | 199 | */ |
| mbed_official | 235:685d5f11838f | 200 | __weak void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram) |
| mbed_official | 235:685d5f11838f | 201 | { |
| mbed_official | 235:685d5f11838f | 202 | /* NOTE : This function Should not be modified, when the callback is needed, |
| mbed_official | 235:685d5f11838f | 203 | the HAL_SRAM_MspInit could be implemented in the user file |
| mbed_official | 235:685d5f11838f | 204 | */ |
| mbed_official | 235:685d5f11838f | 205 | } |
| mbed_official | 235:685d5f11838f | 206 | |
| mbed_official | 235:685d5f11838f | 207 | /** |
| mbed_official | 235:685d5f11838f | 208 | * @brief SRAM MSP DeInit. |
| mbed_official | 235:685d5f11838f | 209 | * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains |
| mbed_official | 235:685d5f11838f | 210 | * the configuration information for SRAM module. |
| mbed_official | 235:685d5f11838f | 211 | * @retval None |
| mbed_official | 235:685d5f11838f | 212 | */ |
| mbed_official | 235:685d5f11838f | 213 | __weak void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram) |
| mbed_official | 235:685d5f11838f | 214 | { |
| mbed_official | 235:685d5f11838f | 215 | /* NOTE : This function Should not be modified, when the callback is needed, |
| mbed_official | 235:685d5f11838f | 216 | the HAL_SRAM_MspDeInit could be implemented in the user file |
| mbed_official | 235:685d5f11838f | 217 | */ |
| mbed_official | 235:685d5f11838f | 218 | } |
| mbed_official | 235:685d5f11838f | 219 | |
| mbed_official | 235:685d5f11838f | 220 | /** |
| mbed_official | 235:685d5f11838f | 221 | * @brief DMA transfer complete callback. |
| mbed_official | 235:685d5f11838f | 222 | * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains |
| mbed_official | 235:685d5f11838f | 223 | * the configuration information for SRAM module. |
| mbed_official | 235:685d5f11838f | 224 | * @retval None |
| mbed_official | 235:685d5f11838f | 225 | */ |
| mbed_official | 235:685d5f11838f | 226 | __weak void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma) |
| mbed_official | 235:685d5f11838f | 227 | { |
| mbed_official | 235:685d5f11838f | 228 | /* NOTE : This function Should not be modified, when the callback is needed, |
| mbed_official | 235:685d5f11838f | 229 | the HAL_SRAM_DMA_XferCpltCallback could be implemented in the user file |
| mbed_official | 235:685d5f11838f | 230 | */ |
| mbed_official | 235:685d5f11838f | 231 | } |
| mbed_official | 235:685d5f11838f | 232 | |
| mbed_official | 235:685d5f11838f | 233 | /** |
| mbed_official | 235:685d5f11838f | 234 | * @brief DMA transfer complete error callback. |
| mbed_official | 235:685d5f11838f | 235 | * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains |
| mbed_official | 235:685d5f11838f | 236 | * the configuration information for SRAM module. |
| mbed_official | 235:685d5f11838f | 237 | * @retval None |
| mbed_official | 235:685d5f11838f | 238 | */ |
| mbed_official | 235:685d5f11838f | 239 | __weak void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma) |
| mbed_official | 235:685d5f11838f | 240 | { |
| mbed_official | 235:685d5f11838f | 241 | /* NOTE : This function Should not be modified, when the callback is needed, |
| mbed_official | 235:685d5f11838f | 242 | the HAL_SRAM_DMA_XferErrorCallback could be implemented in the user file |
| mbed_official | 235:685d5f11838f | 243 | */ |
| mbed_official | 235:685d5f11838f | 244 | } |
| mbed_official | 235:685d5f11838f | 245 | |
| mbed_official | 235:685d5f11838f | 246 | /** |
| mbed_official | 235:685d5f11838f | 247 | * @} |
| mbed_official | 235:685d5f11838f | 248 | */ |
| mbed_official | 235:685d5f11838f | 249 | |
| mbed_official | 235:685d5f11838f | 250 | /** @defgroup SRAM_Group2 Input and Output functions |
| mbed_official | 235:685d5f11838f | 251 | * @brief Input Output and memory control functions |
| mbed_official | 235:685d5f11838f | 252 | * |
| mbed_official | 235:685d5f11838f | 253 | @verbatim |
| mbed_official | 235:685d5f11838f | 254 | ============================================================================== |
| mbed_official | 235:685d5f11838f | 255 | ##### SRAM Input and Output functions ##### |
| mbed_official | 235:685d5f11838f | 256 | ============================================================================== |
| mbed_official | 235:685d5f11838f | 257 | [..] |
| mbed_official | 235:685d5f11838f | 258 | This section provides functions allowing to use and control the SRAM memory |
| mbed_official | 235:685d5f11838f | 259 | |
| mbed_official | 235:685d5f11838f | 260 | @endverbatim |
| mbed_official | 235:685d5f11838f | 261 | * @{ |
| mbed_official | 235:685d5f11838f | 262 | */ |
| mbed_official | 235:685d5f11838f | 263 | |
| mbed_official | 235:685d5f11838f | 264 | /** |
| mbed_official | 235:685d5f11838f | 265 | * @brief Reads 8-bit buffer from SRAM memory. |
| mbed_official | 235:685d5f11838f | 266 | * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains |
| mbed_official | 235:685d5f11838f | 267 | * the configuration information for SRAM module. |
| mbed_official | 235:685d5f11838f | 268 | * @param pAddress: Pointer to read start address |
| mbed_official | 235:685d5f11838f | 269 | * @param pDstBuffer: Pointer to destination buffer |
| mbed_official | 235:685d5f11838f | 270 | * @param BufferSize: Size of the buffer to read from memory |
| mbed_official | 235:685d5f11838f | 271 | * @retval HAL status |
| mbed_official | 235:685d5f11838f | 272 | */ |
| mbed_official | 235:685d5f11838f | 273 | HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize) |
| mbed_official | 235:685d5f11838f | 274 | { |
| mbed_official | 235:685d5f11838f | 275 | __IO uint8_t * pSramAddress = (uint8_t *)pAddress; |
| mbed_official | 235:685d5f11838f | 276 | |
| mbed_official | 235:685d5f11838f | 277 | /* Process Locked */ |
| mbed_official | 235:685d5f11838f | 278 | __HAL_LOCK(hsram); |
| mbed_official | 235:685d5f11838f | 279 | |
| mbed_official | 235:685d5f11838f | 280 | /* Update the SRAM controller state */ |
| mbed_official | 235:685d5f11838f | 281 | hsram->State = HAL_SRAM_STATE_BUSY; |
| mbed_official | 235:685d5f11838f | 282 | |
| mbed_official | 235:685d5f11838f | 283 | /* Read data from memory */ |
| mbed_official | 235:685d5f11838f | 284 | for(; BufferSize != 0; BufferSize--) |
| mbed_official | 235:685d5f11838f | 285 | { |
| mbed_official | 235:685d5f11838f | 286 | *pDstBuffer = *(__IO uint8_t *)pSramAddress; |
| mbed_official | 235:685d5f11838f | 287 | pDstBuffer++; |
| mbed_official | 235:685d5f11838f | 288 | pSramAddress++; |
| mbed_official | 235:685d5f11838f | 289 | } |
| mbed_official | 235:685d5f11838f | 290 | |
| mbed_official | 235:685d5f11838f | 291 | /* Update the SRAM controller state */ |
| mbed_official | 235:685d5f11838f | 292 | hsram->State = HAL_SRAM_STATE_READY; |
| mbed_official | 235:685d5f11838f | 293 | |
| mbed_official | 235:685d5f11838f | 294 | /* Process unlocked */ |
| mbed_official | 235:685d5f11838f | 295 | __HAL_UNLOCK(hsram); |
| mbed_official | 235:685d5f11838f | 296 | |
| mbed_official | 235:685d5f11838f | 297 | return HAL_OK; |
| mbed_official | 235:685d5f11838f | 298 | } |
| mbed_official | 235:685d5f11838f | 299 | |
| mbed_official | 235:685d5f11838f | 300 | /** |
| mbed_official | 235:685d5f11838f | 301 | * @brief Writes 8-bit buffer to SRAM memory. |
| mbed_official | 235:685d5f11838f | 302 | * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains |
| mbed_official | 235:685d5f11838f | 303 | * the configuration information for SRAM module. |
| mbed_official | 235:685d5f11838f | 304 | * @param pAddress: Pointer to write start address |
| mbed_official | 235:685d5f11838f | 305 | * @param pSrcBuffer: Pointer to source buffer to write |
| mbed_official | 235:685d5f11838f | 306 | * @param BufferSize: Size of the buffer to write to memory |
| mbed_official | 235:685d5f11838f | 307 | * @retval HAL status |
| mbed_official | 235:685d5f11838f | 308 | */ |
| mbed_official | 235:685d5f11838f | 309 | HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize) |
| mbed_official | 235:685d5f11838f | 310 | { |
| mbed_official | 235:685d5f11838f | 311 | __IO uint8_t * pSramAddress = (uint8_t *)pAddress; |
| mbed_official | 235:685d5f11838f | 312 | |
| mbed_official | 235:685d5f11838f | 313 | /* Check the SRAM controller state */ |
| mbed_official | 235:685d5f11838f | 314 | if(hsram->State == HAL_SRAM_STATE_PROTECTED) |
| mbed_official | 235:685d5f11838f | 315 | { |
| mbed_official | 235:685d5f11838f | 316 | return HAL_ERROR; |
| mbed_official | 235:685d5f11838f | 317 | } |
| mbed_official | 235:685d5f11838f | 318 | |
| mbed_official | 235:685d5f11838f | 319 | /* Process Locked */ |
| mbed_official | 235:685d5f11838f | 320 | __HAL_LOCK(hsram); |
| mbed_official | 235:685d5f11838f | 321 | |
| mbed_official | 235:685d5f11838f | 322 | /* Update the SRAM controller state */ |
| mbed_official | 235:685d5f11838f | 323 | hsram->State = HAL_SRAM_STATE_BUSY; |
| mbed_official | 235:685d5f11838f | 324 | |
| mbed_official | 235:685d5f11838f | 325 | /* Write data to memory */ |
| mbed_official | 235:685d5f11838f | 326 | for(; BufferSize != 0; BufferSize--) |
| mbed_official | 235:685d5f11838f | 327 | { |
| mbed_official | 235:685d5f11838f | 328 | *(__IO uint8_t *)pSramAddress = *pSrcBuffer; |
| mbed_official | 235:685d5f11838f | 329 | pSrcBuffer++; |
| mbed_official | 235:685d5f11838f | 330 | pSramAddress++; |
| mbed_official | 235:685d5f11838f | 331 | } |
| mbed_official | 235:685d5f11838f | 332 | |
| mbed_official | 235:685d5f11838f | 333 | /* Update the SRAM controller state */ |
| mbed_official | 235:685d5f11838f | 334 | hsram->State = HAL_SRAM_STATE_READY; |
| mbed_official | 235:685d5f11838f | 335 | |
| mbed_official | 235:685d5f11838f | 336 | /* Process unlocked */ |
| mbed_official | 235:685d5f11838f | 337 | __HAL_UNLOCK(hsram); |
| mbed_official | 235:685d5f11838f | 338 | |
| mbed_official | 235:685d5f11838f | 339 | return HAL_OK; |
| mbed_official | 235:685d5f11838f | 340 | } |
| mbed_official | 235:685d5f11838f | 341 | |
| mbed_official | 235:685d5f11838f | 342 | /** |
| mbed_official | 235:685d5f11838f | 343 | * @brief Reads 16-bit buffer from SRAM memory. |
| mbed_official | 235:685d5f11838f | 344 | * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains |
| mbed_official | 235:685d5f11838f | 345 | * the configuration information for SRAM module. |
| mbed_official | 235:685d5f11838f | 346 | * @param pAddress: Pointer to read start address |
| mbed_official | 235:685d5f11838f | 347 | * @param pDstBuffer: Pointer to destination buffer |
| mbed_official | 235:685d5f11838f | 348 | * @param BufferSize: Size of the buffer to read from memory |
| mbed_official | 235:685d5f11838f | 349 | * @retval HAL status |
| mbed_official | 235:685d5f11838f | 350 | */ |
| mbed_official | 235:685d5f11838f | 351 | HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize) |
| mbed_official | 235:685d5f11838f | 352 | { |
| mbed_official | 235:685d5f11838f | 353 | __IO uint16_t * pSramAddress = (uint16_t *)pAddress; |
| mbed_official | 235:685d5f11838f | 354 | |
| mbed_official | 235:685d5f11838f | 355 | /* Process Locked */ |
| mbed_official | 235:685d5f11838f | 356 | __HAL_LOCK(hsram); |
| mbed_official | 235:685d5f11838f | 357 | |
| mbed_official | 235:685d5f11838f | 358 | /* Update the SRAM controller state */ |
| mbed_official | 235:685d5f11838f | 359 | hsram->State = HAL_SRAM_STATE_BUSY; |
| mbed_official | 235:685d5f11838f | 360 | |
| mbed_official | 235:685d5f11838f | 361 | /* Read data from memory */ |
| mbed_official | 235:685d5f11838f | 362 | for(; BufferSize != 0; BufferSize--) |
| mbed_official | 235:685d5f11838f | 363 | { |
| mbed_official | 235:685d5f11838f | 364 | *pDstBuffer = *(__IO uint16_t *)pSramAddress; |
| mbed_official | 235:685d5f11838f | 365 | pDstBuffer++; |
| mbed_official | 235:685d5f11838f | 366 | pSramAddress++; |
| mbed_official | 235:685d5f11838f | 367 | } |
| mbed_official | 235:685d5f11838f | 368 | |
| mbed_official | 235:685d5f11838f | 369 | /* Update the SRAM controller state */ |
| mbed_official | 235:685d5f11838f | 370 | hsram->State = HAL_SRAM_STATE_READY; |
| mbed_official | 235:685d5f11838f | 371 | |
| mbed_official | 235:685d5f11838f | 372 | /* Process unlocked */ |
| mbed_official | 235:685d5f11838f | 373 | __HAL_UNLOCK(hsram); |
| mbed_official | 235:685d5f11838f | 374 | |
| mbed_official | 235:685d5f11838f | 375 | return HAL_OK; |
| mbed_official | 235:685d5f11838f | 376 | } |
| mbed_official | 235:685d5f11838f | 377 | |
| mbed_official | 235:685d5f11838f | 378 | /** |
| mbed_official | 235:685d5f11838f | 379 | * @brief Writes 16-bit buffer to SRAM memory. |
| mbed_official | 235:685d5f11838f | 380 | * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains |
| mbed_official | 235:685d5f11838f | 381 | * the configuration information for SRAM module. |
| mbed_official | 235:685d5f11838f | 382 | * @param pAddress: Pointer to write start address |
| mbed_official | 235:685d5f11838f | 383 | * @param pSrcBuffer: Pointer to source buffer to write |
| mbed_official | 235:685d5f11838f | 384 | * @param BufferSize: Size of the buffer to write to memory |
| mbed_official | 235:685d5f11838f | 385 | * @retval HAL status |
| mbed_official | 235:685d5f11838f | 386 | */ |
| mbed_official | 235:685d5f11838f | 387 | HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize) |
| mbed_official | 235:685d5f11838f | 388 | { |
| mbed_official | 235:685d5f11838f | 389 | __IO uint16_t * pSramAddress = (uint16_t *)pAddress; |
| mbed_official | 235:685d5f11838f | 390 | |
| mbed_official | 235:685d5f11838f | 391 | /* Check the SRAM controller state */ |
| mbed_official | 235:685d5f11838f | 392 | if(hsram->State == HAL_SRAM_STATE_PROTECTED) |
| mbed_official | 235:685d5f11838f | 393 | { |
| mbed_official | 235:685d5f11838f | 394 | return HAL_ERROR; |
| mbed_official | 235:685d5f11838f | 395 | } |
| mbed_official | 235:685d5f11838f | 396 | |
| mbed_official | 235:685d5f11838f | 397 | /* Process Locked */ |
| mbed_official | 235:685d5f11838f | 398 | __HAL_LOCK(hsram); |
| mbed_official | 235:685d5f11838f | 399 | |
| mbed_official | 235:685d5f11838f | 400 | /* Update the SRAM controller state */ |
| mbed_official | 235:685d5f11838f | 401 | hsram->State = HAL_SRAM_STATE_BUSY; |
| mbed_official | 235:685d5f11838f | 402 | |
| mbed_official | 235:685d5f11838f | 403 | /* Write data to memory */ |
| mbed_official | 235:685d5f11838f | 404 | for(; BufferSize != 0; BufferSize--) |
| mbed_official | 235:685d5f11838f | 405 | { |
| mbed_official | 235:685d5f11838f | 406 | *(__IO uint16_t *)pSramAddress = *pSrcBuffer; |
| mbed_official | 235:685d5f11838f | 407 | pSrcBuffer++; |
| mbed_official | 235:685d5f11838f | 408 | pSramAddress++; |
| mbed_official | 235:685d5f11838f | 409 | } |
| mbed_official | 235:685d5f11838f | 410 | |
| mbed_official | 235:685d5f11838f | 411 | /* Update the SRAM controller state */ |
| mbed_official | 235:685d5f11838f | 412 | hsram->State = HAL_SRAM_STATE_READY; |
| mbed_official | 235:685d5f11838f | 413 | |
| mbed_official | 235:685d5f11838f | 414 | /* Process unlocked */ |
| mbed_official | 235:685d5f11838f | 415 | __HAL_UNLOCK(hsram); |
| mbed_official | 235:685d5f11838f | 416 | |
| mbed_official | 235:685d5f11838f | 417 | return HAL_OK; |
| mbed_official | 235:685d5f11838f | 418 | } |
| mbed_official | 235:685d5f11838f | 419 | |
| mbed_official | 235:685d5f11838f | 420 | /** |
| mbed_official | 235:685d5f11838f | 421 | * @brief Reads 32-bit buffer from SRAM memory. |
| mbed_official | 235:685d5f11838f | 422 | * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains |
| mbed_official | 235:685d5f11838f | 423 | * the configuration information for SRAM module. |
| mbed_official | 235:685d5f11838f | 424 | * @param pAddress: Pointer to read start address |
| mbed_official | 235:685d5f11838f | 425 | * @param pDstBuffer: Pointer to destination buffer |
| mbed_official | 235:685d5f11838f | 426 | * @param BufferSize: Size of the buffer to read from memory |
| mbed_official | 235:685d5f11838f | 427 | * @retval HAL status |
| mbed_official | 235:685d5f11838f | 428 | */ |
| mbed_official | 235:685d5f11838f | 429 | HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize) |
| mbed_official | 235:685d5f11838f | 430 | { |
| mbed_official | 235:685d5f11838f | 431 | /* Process Locked */ |
| mbed_official | 235:685d5f11838f | 432 | __HAL_LOCK(hsram); |
| mbed_official | 235:685d5f11838f | 433 | |
| mbed_official | 235:685d5f11838f | 434 | /* Update the SRAM controller state */ |
| mbed_official | 235:685d5f11838f | 435 | hsram->State = HAL_SRAM_STATE_BUSY; |
| mbed_official | 235:685d5f11838f | 436 | |
| mbed_official | 235:685d5f11838f | 437 | /* Read data from memory */ |
| mbed_official | 235:685d5f11838f | 438 | for(; BufferSize != 0; BufferSize--) |
| mbed_official | 235:685d5f11838f | 439 | { |
| mbed_official | 235:685d5f11838f | 440 | *pDstBuffer = *(__IO uint32_t *)pAddress; |
| mbed_official | 235:685d5f11838f | 441 | pDstBuffer++; |
| mbed_official | 235:685d5f11838f | 442 | pAddress++; |
| mbed_official | 235:685d5f11838f | 443 | } |
| mbed_official | 235:685d5f11838f | 444 | |
| mbed_official | 235:685d5f11838f | 445 | /* Update the SRAM controller state */ |
| mbed_official | 235:685d5f11838f | 446 | hsram->State = HAL_SRAM_STATE_READY; |
| mbed_official | 235:685d5f11838f | 447 | |
| mbed_official | 235:685d5f11838f | 448 | /* Process unlocked */ |
| mbed_official | 235:685d5f11838f | 449 | __HAL_UNLOCK(hsram); |
| mbed_official | 235:685d5f11838f | 450 | |
| mbed_official | 235:685d5f11838f | 451 | return HAL_OK; |
| mbed_official | 235:685d5f11838f | 452 | } |
| mbed_official | 235:685d5f11838f | 453 | |
| mbed_official | 235:685d5f11838f | 454 | /** |
| mbed_official | 235:685d5f11838f | 455 | * @brief Writes 32-bit buffer to SRAM memory. |
| mbed_official | 235:685d5f11838f | 456 | * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains |
| mbed_official | 235:685d5f11838f | 457 | * the configuration information for SRAM module. |
| mbed_official | 235:685d5f11838f | 458 | * @param pAddress: Pointer to write start address |
| mbed_official | 235:685d5f11838f | 459 | * @param pSrcBuffer: Pointer to source buffer to write |
| mbed_official | 235:685d5f11838f | 460 | * @param BufferSize: Size of the buffer to write to memory |
| mbed_official | 235:685d5f11838f | 461 | * @retval HAL status |
| mbed_official | 235:685d5f11838f | 462 | */ |
| mbed_official | 235:685d5f11838f | 463 | HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize) |
| mbed_official | 235:685d5f11838f | 464 | { |
| mbed_official | 235:685d5f11838f | 465 | /* Check the SRAM controller state */ |
| mbed_official | 235:685d5f11838f | 466 | if(hsram->State == HAL_SRAM_STATE_PROTECTED) |
| mbed_official | 235:685d5f11838f | 467 | { |
| mbed_official | 235:685d5f11838f | 468 | return HAL_ERROR; |
| mbed_official | 235:685d5f11838f | 469 | } |
| mbed_official | 235:685d5f11838f | 470 | |
| mbed_official | 235:685d5f11838f | 471 | /* Process Locked */ |
| mbed_official | 235:685d5f11838f | 472 | __HAL_LOCK(hsram); |
| mbed_official | 235:685d5f11838f | 473 | |
| mbed_official | 235:685d5f11838f | 474 | /* Update the SRAM controller state */ |
| mbed_official | 235:685d5f11838f | 475 | hsram->State = HAL_SRAM_STATE_BUSY; |
| mbed_official | 235:685d5f11838f | 476 | |
| mbed_official | 235:685d5f11838f | 477 | /* Write data to memory */ |
| mbed_official | 235:685d5f11838f | 478 | for(; BufferSize != 0; BufferSize--) |
| mbed_official | 235:685d5f11838f | 479 | { |
| mbed_official | 235:685d5f11838f | 480 | *(__IO uint32_t *)pAddress = *pSrcBuffer; |
| mbed_official | 235:685d5f11838f | 481 | pSrcBuffer++; |
| mbed_official | 235:685d5f11838f | 482 | pAddress++; |
| mbed_official | 235:685d5f11838f | 483 | } |
| mbed_official | 235:685d5f11838f | 484 | |
| mbed_official | 235:685d5f11838f | 485 | /* Update the SRAM controller state */ |
| mbed_official | 235:685d5f11838f | 486 | hsram->State = HAL_SRAM_STATE_READY; |
| mbed_official | 235:685d5f11838f | 487 | |
| mbed_official | 235:685d5f11838f | 488 | /* Process unlocked */ |
| mbed_official | 235:685d5f11838f | 489 | __HAL_UNLOCK(hsram); |
| mbed_official | 235:685d5f11838f | 490 | |
| mbed_official | 235:685d5f11838f | 491 | return HAL_OK; |
| mbed_official | 235:685d5f11838f | 492 | } |
| mbed_official | 235:685d5f11838f | 493 | |
| mbed_official | 235:685d5f11838f | 494 | /** |
| mbed_official | 235:685d5f11838f | 495 | * @brief Reads a Words data from the SRAM memory using DMA transfer. |
| mbed_official | 235:685d5f11838f | 496 | * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains |
| mbed_official | 235:685d5f11838f | 497 | * the configuration information for SRAM module. |
| mbed_official | 235:685d5f11838f | 498 | * @param pAddress: Pointer to read start address |
| mbed_official | 235:685d5f11838f | 499 | * @param pDstBuffer: Pointer to destination buffer |
| mbed_official | 235:685d5f11838f | 500 | * @param BufferSize: Size of the buffer to read from memory |
| mbed_official | 235:685d5f11838f | 501 | * @retval HAL status |
| mbed_official | 235:685d5f11838f | 502 | */ |
| mbed_official | 235:685d5f11838f | 503 | HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize) |
| mbed_official | 235:685d5f11838f | 504 | { |
| mbed_official | 235:685d5f11838f | 505 | /* Process Locked */ |
| mbed_official | 235:685d5f11838f | 506 | __HAL_LOCK(hsram); |
| mbed_official | 235:685d5f11838f | 507 | |
| mbed_official | 235:685d5f11838f | 508 | /* Update the SRAM controller state */ |
| mbed_official | 235:685d5f11838f | 509 | hsram->State = HAL_SRAM_STATE_BUSY; |
| mbed_official | 235:685d5f11838f | 510 | |
| mbed_official | 235:685d5f11838f | 511 | /* Configure DMA user callbacks */ |
| mbed_official | 235:685d5f11838f | 512 | hsram->hdma->XferCpltCallback = HAL_SRAM_DMA_XferCpltCallback; |
| mbed_official | 235:685d5f11838f | 513 | hsram->hdma->XferErrorCallback = HAL_SRAM_DMA_XferErrorCallback; |
| mbed_official | 235:685d5f11838f | 514 | |
| mbed_official | 235:685d5f11838f | 515 | /* Enable the DMA Stream */ |
| mbed_official | 235:685d5f11838f | 516 | HAL_DMA_Start_IT(hsram->hdma, (uint32_t)pAddress, (uint32_t)pDstBuffer, (uint32_t)BufferSize); |
| mbed_official | 235:685d5f11838f | 517 | |
| mbed_official | 235:685d5f11838f | 518 | /* Update the SRAM controller state */ |
| mbed_official | 235:685d5f11838f | 519 | hsram->State = HAL_SRAM_STATE_READY; |
| mbed_official | 235:685d5f11838f | 520 | |
| mbed_official | 235:685d5f11838f | 521 | /* Process unlocked */ |
| mbed_official | 235:685d5f11838f | 522 | __HAL_UNLOCK(hsram); |
| mbed_official | 235:685d5f11838f | 523 | |
| mbed_official | 235:685d5f11838f | 524 | return HAL_OK; |
| mbed_official | 235:685d5f11838f | 525 | } |
| mbed_official | 235:685d5f11838f | 526 | |
| mbed_official | 235:685d5f11838f | 527 | /** |
| mbed_official | 235:685d5f11838f | 528 | * @brief Writes a Words data buffer to SRAM memory using DMA transfer. |
| mbed_official | 235:685d5f11838f | 529 | * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains |
| mbed_official | 235:685d5f11838f | 530 | * the configuration information for SRAM module. |
| mbed_official | 235:685d5f11838f | 531 | * @param pAddress: Pointer to write start address |
| mbed_official | 235:685d5f11838f | 532 | * @param pSrcBuffer: Pointer to source buffer to write |
| mbed_official | 235:685d5f11838f | 533 | * @param BufferSize: Size of the buffer to write to memory |
| mbed_official | 235:685d5f11838f | 534 | * @retval HAL status |
| mbed_official | 235:685d5f11838f | 535 | */ |
| mbed_official | 235:685d5f11838f | 536 | HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize) |
| mbed_official | 235:685d5f11838f | 537 | { |
| mbed_official | 235:685d5f11838f | 538 | /* Check the SRAM controller state */ |
| mbed_official | 235:685d5f11838f | 539 | if(hsram->State == HAL_SRAM_STATE_PROTECTED) |
| mbed_official | 235:685d5f11838f | 540 | { |
| mbed_official | 235:685d5f11838f | 541 | return HAL_ERROR; |
| mbed_official | 235:685d5f11838f | 542 | } |
| mbed_official | 235:685d5f11838f | 543 | |
| mbed_official | 235:685d5f11838f | 544 | /* Process Locked */ |
| mbed_official | 235:685d5f11838f | 545 | __HAL_LOCK(hsram); |
| mbed_official | 235:685d5f11838f | 546 | |
| mbed_official | 235:685d5f11838f | 547 | /* Update the SRAM controller state */ |
| mbed_official | 235:685d5f11838f | 548 | hsram->State = HAL_SRAM_STATE_BUSY; |
| mbed_official | 235:685d5f11838f | 549 | |
| mbed_official | 235:685d5f11838f | 550 | /* Configure DMA user callbacks */ |
| mbed_official | 235:685d5f11838f | 551 | hsram->hdma->XferCpltCallback = HAL_SRAM_DMA_XferCpltCallback; |
| mbed_official | 235:685d5f11838f | 552 | hsram->hdma->XferErrorCallback = HAL_SRAM_DMA_XferErrorCallback; |
| mbed_official | 235:685d5f11838f | 553 | |
| mbed_official | 235:685d5f11838f | 554 | /* Enable the DMA Stream */ |
| mbed_official | 235:685d5f11838f | 555 | HAL_DMA_Start_IT(hsram->hdma, (uint32_t)pSrcBuffer, (uint32_t)pAddress, (uint32_t)BufferSize); |
| mbed_official | 235:685d5f11838f | 556 | |
| mbed_official | 235:685d5f11838f | 557 | /* Update the SRAM controller state */ |
| mbed_official | 235:685d5f11838f | 558 | hsram->State = HAL_SRAM_STATE_READY; |
| mbed_official | 235:685d5f11838f | 559 | |
| mbed_official | 235:685d5f11838f | 560 | /* Process unlocked */ |
| mbed_official | 235:685d5f11838f | 561 | __HAL_UNLOCK(hsram); |
| mbed_official | 235:685d5f11838f | 562 | |
| mbed_official | 235:685d5f11838f | 563 | return HAL_OK; |
| mbed_official | 235:685d5f11838f | 564 | } |
| mbed_official | 235:685d5f11838f | 565 | |
| mbed_official | 235:685d5f11838f | 566 | /** |
| mbed_official | 235:685d5f11838f | 567 | * @} |
| mbed_official | 235:685d5f11838f | 568 | */ |
| mbed_official | 235:685d5f11838f | 569 | |
| mbed_official | 235:685d5f11838f | 570 | /** @defgroup SRAM_Group3 Control functions |
| mbed_official | 235:685d5f11838f | 571 | * @brief management functions |
| mbed_official | 235:685d5f11838f | 572 | * |
| mbed_official | 235:685d5f11838f | 573 | @verbatim |
| mbed_official | 235:685d5f11838f | 574 | ============================================================================== |
| mbed_official | 235:685d5f11838f | 575 | ##### SRAM Control functions ##### |
| mbed_official | 235:685d5f11838f | 576 | ============================================================================== |
| mbed_official | 235:685d5f11838f | 577 | [..] |
| mbed_official | 235:685d5f11838f | 578 | This subsection provides a set of functions allowing to control dynamically |
| mbed_official | 235:685d5f11838f | 579 | the SRAM interface. |
| mbed_official | 235:685d5f11838f | 580 | |
| mbed_official | 235:685d5f11838f | 581 | @endverbatim |
| mbed_official | 235:685d5f11838f | 582 | * @{ |
| mbed_official | 235:685d5f11838f | 583 | */ |
| mbed_official | 235:685d5f11838f | 584 | |
| mbed_official | 235:685d5f11838f | 585 | /** |
| mbed_official | 235:685d5f11838f | 586 | * @brief Enables dynamically SRAM write operation. |
| mbed_official | 235:685d5f11838f | 587 | * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains |
| mbed_official | 235:685d5f11838f | 588 | * the configuration information for SRAM module. |
| mbed_official | 235:685d5f11838f | 589 | * @retval HAL status |
| mbed_official | 235:685d5f11838f | 590 | */ |
| mbed_official | 235:685d5f11838f | 591 | HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram) |
| mbed_official | 235:685d5f11838f | 592 | { |
| mbed_official | 235:685d5f11838f | 593 | /* Process Locked */ |
| mbed_official | 235:685d5f11838f | 594 | __HAL_LOCK(hsram); |
| mbed_official | 235:685d5f11838f | 595 | |
| mbed_official | 235:685d5f11838f | 596 | /* Enable write operation */ |
| mbed_official | 235:685d5f11838f | 597 | FMC_NORSRAM_WriteOperation_Enable(hsram->Instance, hsram->Init.NSBank); |
| mbed_official | 235:685d5f11838f | 598 | |
| mbed_official | 235:685d5f11838f | 599 | /* Update the SRAM controller state */ |
| mbed_official | 235:685d5f11838f | 600 | hsram->State = HAL_SRAM_STATE_READY; |
| mbed_official | 235:685d5f11838f | 601 | |
| mbed_official | 235:685d5f11838f | 602 | /* Process unlocked */ |
| mbed_official | 235:685d5f11838f | 603 | __HAL_UNLOCK(hsram); |
| mbed_official | 235:685d5f11838f | 604 | |
| mbed_official | 235:685d5f11838f | 605 | return HAL_OK; |
| mbed_official | 235:685d5f11838f | 606 | } |
| mbed_official | 235:685d5f11838f | 607 | |
| mbed_official | 235:685d5f11838f | 608 | /** |
| mbed_official | 235:685d5f11838f | 609 | * @brief Disables dynamically SRAM write operation. |
| mbed_official | 235:685d5f11838f | 610 | * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains |
| mbed_official | 235:685d5f11838f | 611 | * the configuration information for SRAM module. |
| mbed_official | 235:685d5f11838f | 612 | * @retval HAL status |
| mbed_official | 235:685d5f11838f | 613 | */ |
| mbed_official | 235:685d5f11838f | 614 | HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram) |
| mbed_official | 235:685d5f11838f | 615 | { |
| mbed_official | 235:685d5f11838f | 616 | /* Process Locked */ |
| mbed_official | 235:685d5f11838f | 617 | __HAL_LOCK(hsram); |
| mbed_official | 235:685d5f11838f | 618 | |
| mbed_official | 235:685d5f11838f | 619 | /* Update the SRAM controller state */ |
| mbed_official | 235:685d5f11838f | 620 | hsram->State = HAL_SRAM_STATE_BUSY; |
| mbed_official | 235:685d5f11838f | 621 | |
| mbed_official | 235:685d5f11838f | 622 | /* Disable write operation */ |
| mbed_official | 235:685d5f11838f | 623 | FMC_NORSRAM_WriteOperation_Disable(hsram->Instance, hsram->Init.NSBank); |
| mbed_official | 235:685d5f11838f | 624 | |
| mbed_official | 235:685d5f11838f | 625 | /* Update the SRAM controller state */ |
| mbed_official | 235:685d5f11838f | 626 | hsram->State = HAL_SRAM_STATE_PROTECTED; |
| mbed_official | 235:685d5f11838f | 627 | |
| mbed_official | 235:685d5f11838f | 628 | /* Process unlocked */ |
| mbed_official | 235:685d5f11838f | 629 | __HAL_UNLOCK(hsram); |
| mbed_official | 235:685d5f11838f | 630 | |
| mbed_official | 235:685d5f11838f | 631 | return HAL_OK; |
| mbed_official | 235:685d5f11838f | 632 | } |
| mbed_official | 235:685d5f11838f | 633 | |
| mbed_official | 235:685d5f11838f | 634 | /** |
| mbed_official | 235:685d5f11838f | 635 | * @} |
| mbed_official | 235:685d5f11838f | 636 | */ |
| mbed_official | 235:685d5f11838f | 637 | |
| mbed_official | 235:685d5f11838f | 638 | /** @defgroup SRAM_Group4 State functions |
| mbed_official | 235:685d5f11838f | 639 | * @brief Peripheral State functions |
| mbed_official | 235:685d5f11838f | 640 | * |
| mbed_official | 235:685d5f11838f | 641 | @verbatim |
| mbed_official | 235:685d5f11838f | 642 | ============================================================================== |
| mbed_official | 235:685d5f11838f | 643 | ##### SRAM State functions ##### |
| mbed_official | 235:685d5f11838f | 644 | ============================================================================== |
| mbed_official | 235:685d5f11838f | 645 | [..] |
| mbed_official | 235:685d5f11838f | 646 | This subsection permits to get in run-time the status of the SRAM controller |
| mbed_official | 235:685d5f11838f | 647 | and the data flow. |
| mbed_official | 235:685d5f11838f | 648 | |
| mbed_official | 235:685d5f11838f | 649 | @endverbatim |
| mbed_official | 235:685d5f11838f | 650 | * @{ |
| mbed_official | 235:685d5f11838f | 651 | */ |
| mbed_official | 235:685d5f11838f | 652 | |
| mbed_official | 235:685d5f11838f | 653 | /** |
| mbed_official | 235:685d5f11838f | 654 | * @brief Returns the SRAM controller state |
| mbed_official | 235:685d5f11838f | 655 | * @param hsram: pointer to a SRAM_HandleTypeDef structure that contains |
| mbed_official | 235:685d5f11838f | 656 | * the configuration information for SRAM module. |
| mbed_official | 235:685d5f11838f | 657 | * @retval HAL state |
| mbed_official | 235:685d5f11838f | 658 | */ |
| mbed_official | 235:685d5f11838f | 659 | HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram) |
| mbed_official | 235:685d5f11838f | 660 | { |
| mbed_official | 235:685d5f11838f | 661 | return hsram->State; |
| mbed_official | 235:685d5f11838f | 662 | } |
| mbed_official | 235:685d5f11838f | 663 | |
| mbed_official | 235:685d5f11838f | 664 | /** |
| mbed_official | 235:685d5f11838f | 665 | * @} |
| mbed_official | 235:685d5f11838f | 666 | */ |
| mbed_official | 235:685d5f11838f | 667 | |
| mbed_official | 235:685d5f11838f | 668 | /** |
| mbed_official | 235:685d5f11838f | 669 | * @} |
| mbed_official | 235:685d5f11838f | 670 | */ |
| mbed_official | 235:685d5f11838f | 671 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx */ |
| mbed_official | 235:685d5f11838f | 672 | #endif /* HAL_SRAM_MODULE_ENABLED */ |
| mbed_official | 235:685d5f11838f | 673 | /** |
| mbed_official | 235:685d5f11838f | 674 | * @} |
| mbed_official | 235:685d5f11838f | 675 | */ |
| mbed_official | 235:685d5f11838f | 676 | |
| mbed_official | 235:685d5f11838f | 677 | /** |
| mbed_official | 235:685d5f11838f | 678 | * @} |
| mbed_official | 235:685d5f11838f | 679 | */ |
| mbed_official | 235:685d5f11838f | 680 | |
| mbed_official | 235:685d5f11838f | 681 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |