marcus chiou / mbed-src

mbed library sources

Fork of mbed-src by mbed official

targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_sdram.c@613:bc40b8d2aec4, 2015-08-20 (annotated)

Committer:
mbed_official
Date:
Thu Aug 20 10:45:13 2015 +0100
Revision:
613:bc40b8d2aec4
Parent:
532:fe11edbda85c 
Synchronized with git revision 92ca8c7b60a283b6bb60eb65b183dac1599f0ade



Full URL: https://github.com/mbedmicro/mbed/commit/92ca8c7b60a283b6bb60eb65b183dac1599f0ade/



Nordic: update application start address in GCC linker script

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 87:085cde657901 1 /**
mbed_official 87:085cde657901 2 ******************************************************************************
mbed_official 87:085cde657901 3 * @file stm32f4xx_hal_sdram.c
mbed_official 87:085cde657901 4 * @author MCD Application Team
mbed_official 613:bc40b8d2aec4 5 * @version V1.3.2
mbed_official 613:bc40b8d2aec4 6 * @date 26-June-2015
mbed_official 87:085cde657901 7 * @brief SDRAM HAL module driver.
mbed_official 87:085cde657901 8 * This file provides a generic firmware to drive SDRAM memories mounted
mbed_official 87:085cde657901 9 * as external device.
mbed_official 87:085cde657901 10 *
mbed_official 87:085cde657901 11 @verbatim
mbed_official 87:085cde657901 12 ==============================================================================
mbed_official 87:085cde657901 13 ##### How to use this driver #####
mbed_official 87:085cde657901 14 ==============================================================================
mbed_official 87:085cde657901 15 [..]
mbed_official 87:085cde657901 16 This driver is a generic layered driver which contains a set of APIs used to
mbed_official 87:085cde657901 17 control SDRAM memories. It uses the FMC layer functions to interface
mbed_official 87:085cde657901 18 with SDRAM devices.
mbed_official 87:085cde657901 19 The following sequence should be followed to configure the FMC to interface
mbed_official 87:085cde657901 20 with SDRAM memories:
mbed_official 87:085cde657901 21
mbed_official 87:085cde657901 22 (#) Declare a SDRAM_HandleTypeDef handle structure, for example:
mbed_official 226:b062af740e40 23 SDRAM_HandleTypeDef hdsram
mbed_official 87:085cde657901 24
mbed_official 87:085cde657901 25 (++) Fill the SDRAM_HandleTypeDef handle "Init" field with the allowed
mbed_official 87:085cde657901 26 values of the structure member.
mbed_official 87:085cde657901 27
mbed_official 87:085cde657901 28 (++) Fill the SDRAM_HandleTypeDef handle "Instance" field with a predefined
mbed_official 87:085cde657901 29 base register instance for NOR or SDRAM device
mbed_official 87:085cde657901 30
mbed_official 87:085cde657901 31 (#) Declare a FMC_SDRAM_TimingTypeDef structure; for example:
mbed_official 87:085cde657901 32 FMC_SDRAM_TimingTypeDef Timing;
mbed_official 87:085cde657901 33 and fill its fields with the allowed values of the structure member.
mbed_official 87:085cde657901 34
mbed_official 87:085cde657901 35 (#) Initialize the SDRAM Controller by calling the function HAL_SDRAM_Init(). This function
mbed_official 87:085cde657901 36 performs the following sequence:
mbed_official 87:085cde657901 37
mbed_official 87:085cde657901 38 (##) MSP hardware layer configuration using the function HAL_SDRAM_MspInit()
mbed_official 87:085cde657901 39 (##) Control register configuration using the FMC SDRAM interface function
mbed_official 87:085cde657901 40 FMC_SDRAM_Init()
mbed_official 87:085cde657901 41 (##) Timing register configuration using the FMC SDRAM interface function
mbed_official 87:085cde657901 42 FMC_SDRAM_Timing_Init()
mbed_official 87:085cde657901 43 (##) Program the SDRAM external device by applying its initialization sequence
mbed_official 87:085cde657901 44 according to the device plugged in your hardware. This step is mandatory
mbed_official 87:085cde657901 45 for accessing the SDRAM device.
mbed_official 87:085cde657901 46
mbed_official 87:085cde657901 47 (#) At this stage you can perform read/write accesses from/to the memory connected
mbed_official 87:085cde657901 48 to the SDRAM Bank. You can perform either polling or DMA transfer using the
mbed_official 87:085cde657901 49 following APIs:
mbed_official 87:085cde657901 50 (++) HAL_SDRAM_Read()/HAL_SDRAM_Write() for polling read/write access
mbed_official 87:085cde657901 51 (++) HAL_SDRAM_Read_DMA()/HAL_SDRAM_Write_DMA() for DMA read/write transfer
mbed_official 87:085cde657901 52
mbed_official 87:085cde657901 53 (#) You can also control the SDRAM device by calling the control APIs HAL_SDRAM_WriteOperation_Enable()/
mbed_official 87:085cde657901 54 HAL_SDRAM_WriteOperation_Disable() to respectively enable/disable the SDRAM write operation or
mbed_official 87:085cde657901 55 the function HAL_SDRAM_SendCommand() to send a specified command to the SDRAM
mbed_official 87:085cde657901 56 device. The command to be sent must be configured with the FMC_SDRAM_CommandTypeDef
mbed_official 87:085cde657901 57 structure.
mbed_official 87:085cde657901 58
mbed_official 87:085cde657901 59 (#) You can continuously monitor the SDRAM device HAL state by calling the function
mbed_official 87:085cde657901 60 HAL_SDRAM_GetState()
mbed_official 87:085cde657901 61
mbed_official 87:085cde657901 62 @endverbatim
mbed_official 87:085cde657901 63 ******************************************************************************
mbed_official 87:085cde657901 64 * @attention
mbed_official 87:085cde657901 65 *
mbed_official 532:fe11edbda85c 66 * <h2><center>&copy; COPYRIGHT(c) 2015 STMicroelectronics</center></h2>
mbed_official 87:085cde657901 67 *
mbed_official 87:085cde657901 68 * Redistribution and use in source and binary forms, with or without modification,
mbed_official 87:085cde657901 69 * are permitted provided that the following conditions are met:
mbed_official 87:085cde657901 70 * 1. Redistributions of source code must retain the above copyright notice,
mbed_official 87:085cde657901 71 * this list of conditions and the following disclaimer.
mbed_official 87:085cde657901 72 * 2. Redistributions in binary form must reproduce the above copyright notice,
mbed_official 87:085cde657901 73 * this list of conditions and the following disclaimer in the documentation
mbed_official 87:085cde657901 74 * and/or other materials provided with the distribution.
mbed_official 87:085cde657901 75 * 3. Neither the name of STMicroelectronics nor the names of its contributors
mbed_official 87:085cde657901 76 * may be used to endorse or promote products derived from this software
mbed_official 87:085cde657901 77 * without specific prior written permission.
mbed_official 87:085cde657901 78 *
mbed_official 87:085cde657901 79 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
mbed_official 87:085cde657901 80 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
mbed_official 87:085cde657901 81 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
mbed_official 87:085cde657901 82 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
mbed_official 87:085cde657901 83 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
mbed_official 87:085cde657901 84 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
mbed_official 87:085cde657901 85 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
mbed_official 87:085cde657901 86 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
mbed_official 87:085cde657901 87 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
mbed_official 87:085cde657901 88 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
mbed_official 87:085cde657901 89 *
mbed_official 87:085cde657901 90 ******************************************************************************
mbed_official 87:085cde657901 91 */
mbed_official 87:085cde657901 92
mbed_official 87:085cde657901 93 /* Includes ------------------------------------------------------------------*/
mbed_official 87:085cde657901 94 #include "stm32f4xx_hal.h"
mbed_official 87:085cde657901 95
mbed_official 87:085cde657901 96 /** @addtogroup STM32F4xx_HAL_Driver
mbed_official 87:085cde657901 97 * @{
mbed_official 87:085cde657901 98 */
mbed_official 87:085cde657901 99
mbed_official 532:fe11edbda85c 100 /** @defgroup SDRAM SDRAM
mbed_official 87:085cde657901 101 * @brief SDRAM driver modules
mbed_official 87:085cde657901 102 * @{
mbed_official 87:085cde657901 103 */
mbed_official 87:085cde657901 104 #ifdef HAL_SDRAM_MODULE_ENABLED
mbed_official 532:fe11edbda85c 105 #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F446xx)
mbed_official 87:085cde657901 106
mbed_official 87:085cde657901 107 /* Private typedef -----------------------------------------------------------*/
mbed_official 87:085cde657901 108 /* Private define ------------------------------------------------------------*/
mbed_official 87:085cde657901 109 /* Private macro -------------------------------------------------------------*/
mbed_official 87:085cde657901 110 /* Private variables ---------------------------------------------------------*/
mbed_official 87:085cde657901 111 /* Private functions ---------------------------------------------------------*/
mbed_official 532:fe11edbda85c 112 /* Exported functions --------------------------------------------------------*/
mbed_official 532:fe11edbda85c 113 /** @defgroup SDRAM_Exported_Functions SDRAM Exported Functions
mbed_official 87:085cde657901 114 * @{
mbed_official 87:085cde657901 115 */
mbed_official 532:fe11edbda85c 116
mbed_official 532:fe11edbda85c 117 /** @defgroup SDRAM_Exported_Functions_Group1 Initialization and de-initialization functions
mbed_official 87:085cde657901 118 * @brief Initialization and Configuration functions
mbed_official 87:085cde657901 119 *
mbed_official 87:085cde657901 120 @verbatim
mbed_official 87:085cde657901 121 ==============================================================================
mbed_official 87:085cde657901 122 ##### SDRAM Initialization and de_initialization functions #####
mbed_official 87:085cde657901 123 ==============================================================================
mbed_official 87:085cde657901 124 [..]
mbed_official 87:085cde657901 125 This section provides functions allowing to initialize/de-initialize
mbed_official 87:085cde657901 126 the SDRAM memory
mbed_official 87:085cde657901 127
mbed_official 87:085cde657901 128 @endverbatim
mbed_official 87:085cde657901 129 * @{
mbed_official 87:085cde657901 130 */
mbed_official 87:085cde657901 131
mbed_official 87:085cde657901 132 /**
mbed_official 87:085cde657901 133 * @brief Performs the SDRAM device initialization sequence.
mbed_official 226:b062af740e40 134 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 135 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 136 * @param Timing: Pointer to SDRAM control timing structure
mbed_official 87:085cde657901 137 * @retval HAL status
mbed_official 87:085cde657901 138 */
mbed_official 87:085cde657901 139 HAL_StatusTypeDef HAL_SDRAM_Init(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_TimingTypeDef *Timing)
mbed_official 87:085cde657901 140 {
mbed_official 87:085cde657901 141 /* Check the SDRAM handle parameter */
mbed_official 613:bc40b8d2aec4 142 if(hsdram == NULL)
mbed_official 87:085cde657901 143 {
mbed_official 87:085cde657901 144 return HAL_ERROR;
mbed_official 87:085cde657901 145 }
mbed_official 87:085cde657901 146
mbed_official 87:085cde657901 147 if(hsdram->State == HAL_SDRAM_STATE_RESET)
mbed_official 87:085cde657901 148 {
mbed_official 532:fe11edbda85c 149 /* Allocate lock resource and initialize it */
mbed_official 532:fe11edbda85c 150 hsdram->Lock = HAL_UNLOCKED;
mbed_official 87:085cde657901 151 /* Initialize the low level hardware (MSP) */
mbed_official 87:085cde657901 152 HAL_SDRAM_MspInit(hsdram);
mbed_official 87:085cde657901 153 }
mbed_official 87:085cde657901 154
mbed_official 87:085cde657901 155 /* Initialize the SDRAM controller state */
mbed_official 87:085cde657901 156 hsdram->State = HAL_SDRAM_STATE_BUSY;
mbed_official 87:085cde657901 157
mbed_official 87:085cde657901 158 /* Initialize SDRAM control Interface */
mbed_official 87:085cde657901 159 FMC_SDRAM_Init(hsdram->Instance, &(hsdram->Init));
mbed_official 87:085cde657901 160
mbed_official 87:085cde657901 161 /* Initialize SDRAM timing Interface */
mbed_official 87:085cde657901 162 FMC_SDRAM_Timing_Init(hsdram->Instance, Timing, hsdram->Init.SDBank);
mbed_official 87:085cde657901 163
mbed_official 87:085cde657901 164 /* Update the SDRAM controller state */
mbed_official 87:085cde657901 165 hsdram->State = HAL_SDRAM_STATE_READY;
mbed_official 87:085cde657901 166
mbed_official 87:085cde657901 167 return HAL_OK;
mbed_official 87:085cde657901 168 }
mbed_official 87:085cde657901 169
mbed_official 87:085cde657901 170 /**
mbed_official 87:085cde657901 171 * @brief Perform the SDRAM device initialization sequence.
mbed_official 226:b062af740e40 172 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 173 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 174 * @retval HAL status
mbed_official 87:085cde657901 175 */
mbed_official 87:085cde657901 176 HAL_StatusTypeDef HAL_SDRAM_DeInit(SDRAM_HandleTypeDef *hsdram)
mbed_official 87:085cde657901 177 {
mbed_official 87:085cde657901 178 /* Initialize the low level hardware (MSP) */
mbed_official 87:085cde657901 179 HAL_SDRAM_MspDeInit(hsdram);
mbed_official 106:ced8cbb51063 180
mbed_official 87:085cde657901 181 /* Configure the SDRAM registers with their reset values */
mbed_official 87:085cde657901 182 FMC_SDRAM_DeInit(hsdram->Instance, hsdram->Init.SDBank);
mbed_official 106:ced8cbb51063 183
mbed_official 106:ced8cbb51063 184 /* Reset the SDRAM controller state */
mbed_official 106:ced8cbb51063 185 hsdram->State = HAL_SDRAM_STATE_RESET;
mbed_official 106:ced8cbb51063 186
mbed_official 106:ced8cbb51063 187 /* Release Lock */
mbed_official 106:ced8cbb51063 188 __HAL_UNLOCK(hsdram);
mbed_official 106:ced8cbb51063 189
mbed_official 87:085cde657901 190 return HAL_OK;
mbed_official 87:085cde657901 191 }
mbed_official 87:085cde657901 192
mbed_official 87:085cde657901 193 /**
mbed_official 87:085cde657901 194 * @brief SDRAM MSP Init.
mbed_official 226:b062af740e40 195 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 196 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 197 * @retval None
mbed_official 87:085cde657901 198 */
mbed_official 87:085cde657901 199 __weak void HAL_SDRAM_MspInit(SDRAM_HandleTypeDef *hsdram)
mbed_official 87:085cde657901 200 {
mbed_official 87:085cde657901 201 /* NOTE: This function Should not be modified, when the callback is needed,
mbed_official 87:085cde657901 202 the HAL_SDRAM_MspInit could be implemented in the user file
mbed_official 87:085cde657901 203 */
mbed_official 87:085cde657901 204 }
mbed_official 87:085cde657901 205
mbed_official 87:085cde657901 206 /**
mbed_official 87:085cde657901 207 * @brief SDRAM MSP DeInit.
mbed_official 226:b062af740e40 208 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 209 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 210 * @retval None
mbed_official 87:085cde657901 211 */
mbed_official 87:085cde657901 212 __weak void HAL_SDRAM_MspDeInit(SDRAM_HandleTypeDef *hsdram)
mbed_official 87:085cde657901 213 {
mbed_official 87:085cde657901 214 /* NOTE: This function Should not be modified, when the callback is needed,
mbed_official 87:085cde657901 215 the HAL_SDRAM_MspDeInit could be implemented in the user file
mbed_official 87:085cde657901 216 */
mbed_official 87:085cde657901 217 }
mbed_official 87:085cde657901 218
mbed_official 87:085cde657901 219 /**
mbed_official 87:085cde657901 220 * @brief This function handles SDRAM refresh error interrupt request.
mbed_official 226:b062af740e40 221 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 222 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 223 * @retval HAL status
mbed_official 87:085cde657901 224 */
mbed_official 87:085cde657901 225 void HAL_SDRAM_IRQHandler(SDRAM_HandleTypeDef *hsdram)
mbed_official 87:085cde657901 226 {
mbed_official 87:085cde657901 227 /* Check SDRAM interrupt Rising edge flag */
mbed_official 87:085cde657901 228 if(__FMC_SDRAM_GET_FLAG(hsdram->Instance, FMC_SDRAM_FLAG_REFRESH_IT))
mbed_official 87:085cde657901 229 {
mbed_official 87:085cde657901 230 /* SDRAM refresh error interrupt callback */
mbed_official 87:085cde657901 231 HAL_SDRAM_RefreshErrorCallback(hsdram);
mbed_official 87:085cde657901 232
mbed_official 87:085cde657901 233 /* Clear SDRAM refresh error interrupt pending bit */
mbed_official 87:085cde657901 234 __FMC_SDRAM_CLEAR_FLAG(hsdram->Instance, FMC_SDRAM_FLAG_REFRESH_ERROR);
mbed_official 87:085cde657901 235 }
mbed_official 87:085cde657901 236 }
mbed_official 87:085cde657901 237
mbed_official 87:085cde657901 238 /**
mbed_official 87:085cde657901 239 * @brief SDRAM Refresh error callback.
mbed_official 226:b062af740e40 240 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 241 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 242 * @retval None
mbed_official 87:085cde657901 243 */
mbed_official 87:085cde657901 244 __weak void HAL_SDRAM_RefreshErrorCallback(SDRAM_HandleTypeDef *hsdram)
mbed_official 87:085cde657901 245 {
mbed_official 87:085cde657901 246 /* NOTE: This function Should not be modified, when the callback is needed,
mbed_official 87:085cde657901 247 the HAL_SDRAM_RefreshErrorCallback could be implemented in the user file
mbed_official 87:085cde657901 248 */
mbed_official 87:085cde657901 249 }
mbed_official 87:085cde657901 250
mbed_official 87:085cde657901 251 /**
mbed_official 87:085cde657901 252 * @brief DMA transfer complete callback.
mbed_official 226:b062af740e40 253 * @param hdma: pointer to a DMA_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 254 * the configuration information for the specified DMA module.
mbed_official 87:085cde657901 255 * @retval None
mbed_official 87:085cde657901 256 */
mbed_official 87:085cde657901 257 __weak void HAL_SDRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma)
mbed_official 87:085cde657901 258 {
mbed_official 87:085cde657901 259 /* NOTE: This function Should not be modified, when the callback is needed,
mbed_official 87:085cde657901 260 the HAL_SDRAM_DMA_XferCpltCallback could be implemented in the user file
mbed_official 87:085cde657901 261 */
mbed_official 87:085cde657901 262 }
mbed_official 87:085cde657901 263
mbed_official 87:085cde657901 264 /**
mbed_official 87:085cde657901 265 * @brief DMA transfer complete error callback.
mbed_official 87:085cde657901 266 * @param hdma: DMA handle
mbed_official 87:085cde657901 267 * @retval None
mbed_official 87:085cde657901 268 */
mbed_official 87:085cde657901 269 __weak void HAL_SDRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma)
mbed_official 87:085cde657901 270 {
mbed_official 87:085cde657901 271 /* NOTE: This function Should not be modified, when the callback is needed,
mbed_official 87:085cde657901 272 the HAL_SDRAM_DMA_XferErrorCallback could be implemented in the user file
mbed_official 87:085cde657901 273 */
mbed_official 87:085cde657901 274 }
mbed_official 87:085cde657901 275 /**
mbed_official 87:085cde657901 276 * @}
mbed_official 87:085cde657901 277 */
mbed_official 87:085cde657901 278
mbed_official 532:fe11edbda85c 279 /** @defgroup SDRAM_Exported_Functions_Group2 Input and Output functions
mbed_official 87:085cde657901 280 * @brief Input Output and memory control functions
mbed_official 87:085cde657901 281 *
mbed_official 87:085cde657901 282 @verbatim
mbed_official 87:085cde657901 283 ==============================================================================
mbed_official 87:085cde657901 284 ##### SDRAM Input and Output functions #####
mbed_official 87:085cde657901 285 ==============================================================================
mbed_official 87:085cde657901 286 [..]
mbed_official 87:085cde657901 287 This section provides functions allowing to use and control the SDRAM memory
mbed_official 87:085cde657901 288
mbed_official 87:085cde657901 289 @endverbatim
mbed_official 87:085cde657901 290 * @{
mbed_official 87:085cde657901 291 */
mbed_official 87:085cde657901 292
mbed_official 87:085cde657901 293 /**
mbed_official 87:085cde657901 294 * @brief Reads 8-bit data buffer from the SDRAM memory.
mbed_official 226:b062af740e40 295 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 296 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 297 * @param pAddress: Pointer to read start address
mbed_official 87:085cde657901 298 * @param pDstBuffer: Pointer to destination buffer
mbed_official 87:085cde657901 299 * @param BufferSize: Size of the buffer to read from memory
mbed_official 87:085cde657901 300 * @retval HAL status
mbed_official 87:085cde657901 301 */
mbed_official 87:085cde657901 302 HAL_StatusTypeDef HAL_SDRAM_Read_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize)
mbed_official 87:085cde657901 303 {
mbed_official 87:085cde657901 304 __IO uint8_t *pSdramAddress = (uint8_t *)pAddress;
mbed_official 87:085cde657901 305
mbed_official 87:085cde657901 306 /* Process Locked */
mbed_official 87:085cde657901 307 __HAL_LOCK(hsdram);
mbed_official 87:085cde657901 308
mbed_official 87:085cde657901 309 /* Check the SDRAM controller state */
mbed_official 87:085cde657901 310 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
mbed_official 87:085cde657901 311 {
mbed_official 87:085cde657901 312 return HAL_BUSY;
mbed_official 87:085cde657901 313 }
mbed_official 87:085cde657901 314 else if(hsdram->State == HAL_SDRAM_STATE_PRECHARGED)
mbed_official 87:085cde657901 315 {
mbed_official 87:085cde657901 316 return HAL_ERROR;
mbed_official 87:085cde657901 317 }
mbed_official 87:085cde657901 318
mbed_official 87:085cde657901 319 /* Read data from source */
mbed_official 87:085cde657901 320 for(; BufferSize != 0; BufferSize--)
mbed_official 87:085cde657901 321 {
mbed_official 87:085cde657901 322 *pDstBuffer = *(__IO uint8_t *)pSdramAddress;
mbed_official 87:085cde657901 323 pDstBuffer++;
mbed_official 106:ced8cbb51063 324 pSdramAddress++;
mbed_official 87:085cde657901 325 }
mbed_official 87:085cde657901 326
mbed_official 87:085cde657901 327 /* Process Unlocked */
mbed_official 106:ced8cbb51063 328 __HAL_UNLOCK(hsdram);
mbed_official 87:085cde657901 329
mbed_official 87:085cde657901 330 return HAL_OK;
mbed_official 87:085cde657901 331 }
mbed_official 532:fe11edbda85c 332
mbed_official 87:085cde657901 333 /**
mbed_official 87:085cde657901 334 * @brief Writes 8-bit data buffer to SDRAM memory.
mbed_official 226:b062af740e40 335 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 336 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 337 * @param pAddress: Pointer to write start address
mbed_official 87:085cde657901 338 * @param pSrcBuffer: Pointer to source buffer to write
mbed_official 87:085cde657901 339 * @param BufferSize: Size of the buffer to write to memory
mbed_official 87:085cde657901 340 * @retval HAL status
mbed_official 87:085cde657901 341 */
mbed_official 87:085cde657901 342 HAL_StatusTypeDef HAL_SDRAM_Write_8b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize)
mbed_official 87:085cde657901 343 {
mbed_official 87:085cde657901 344 __IO uint8_t *pSdramAddress = (uint8_t *)pAddress;
mbed_official 87:085cde657901 345 uint32_t tmp = 0;
mbed_official 87:085cde657901 346
mbed_official 87:085cde657901 347 /* Process Locked */
mbed_official 87:085cde657901 348 __HAL_LOCK(hsdram);
mbed_official 87:085cde657901 349
mbed_official 87:085cde657901 350 /* Check the SDRAM controller state */
mbed_official 87:085cde657901 351 tmp = hsdram->State;
mbed_official 87:085cde657901 352
mbed_official 87:085cde657901 353 if(tmp == HAL_SDRAM_STATE_BUSY)
mbed_official 87:085cde657901 354 {
mbed_official 87:085cde657901 355 return HAL_BUSY;
mbed_official 87:085cde657901 356 }
mbed_official 87:085cde657901 357 else if((tmp == HAL_SDRAM_STATE_PRECHARGED) || (tmp == HAL_SDRAM_STATE_WRITE_PROTECTED))
mbed_official 87:085cde657901 358 {
mbed_official 87:085cde657901 359 return HAL_ERROR;
mbed_official 87:085cde657901 360 }
mbed_official 87:085cde657901 361
mbed_official 87:085cde657901 362 /* Write data to memory */
mbed_official 87:085cde657901 363 for(; BufferSize != 0; BufferSize--)
mbed_official 87:085cde657901 364 {
mbed_official 87:085cde657901 365 *(__IO uint8_t *)pSdramAddress = *pSrcBuffer;
mbed_official 87:085cde657901 366 pSrcBuffer++;
mbed_official 106:ced8cbb51063 367 pSdramAddress++;
mbed_official 87:085cde657901 368 }
mbed_official 87:085cde657901 369
mbed_official 87:085cde657901 370 /* Process Unlocked */
mbed_official 87:085cde657901 371 __HAL_UNLOCK(hsdram);
mbed_official 87:085cde657901 372
mbed_official 87:085cde657901 373 return HAL_OK;
mbed_official 87:085cde657901 374 }
mbed_official 87:085cde657901 375
mbed_official 87:085cde657901 376 /**
mbed_official 87:085cde657901 377 * @brief Reads 16-bit data buffer from the SDRAM memory.
mbed_official 226:b062af740e40 378 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 379 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 380 * @param pAddress: Pointer to read start address
mbed_official 87:085cde657901 381 * @param pDstBuffer: Pointer to destination buffer
mbed_official 87:085cde657901 382 * @param BufferSize: Size of the buffer to read from memory
mbed_official 87:085cde657901 383 * @retval HAL status
mbed_official 87:085cde657901 384 */
mbed_official 87:085cde657901 385 HAL_StatusTypeDef HAL_SDRAM_Read_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize)
mbed_official 87:085cde657901 386 {
mbed_official 87:085cde657901 387 __IO uint16_t *pSdramAddress = (uint16_t *)pAddress;
mbed_official 87:085cde657901 388
mbed_official 87:085cde657901 389 /* Process Locked */
mbed_official 87:085cde657901 390 __HAL_LOCK(hsdram);
mbed_official 87:085cde657901 391
mbed_official 87:085cde657901 392 /* Check the SDRAM controller state */
mbed_official 87:085cde657901 393 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
mbed_official 87:085cde657901 394 {
mbed_official 87:085cde657901 395 return HAL_BUSY;
mbed_official 87:085cde657901 396 }
mbed_official 87:085cde657901 397 else if(hsdram->State == HAL_SDRAM_STATE_PRECHARGED)
mbed_official 87:085cde657901 398 {
mbed_official 87:085cde657901 399 return HAL_ERROR;
mbed_official 87:085cde657901 400 }
mbed_official 87:085cde657901 401
mbed_official 87:085cde657901 402 /* Read data from source */
mbed_official 87:085cde657901 403 for(; BufferSize != 0; BufferSize--)
mbed_official 87:085cde657901 404 {
mbed_official 87:085cde657901 405 *pDstBuffer = *(__IO uint16_t *)pSdramAddress;
mbed_official 87:085cde657901 406 pDstBuffer++;
mbed_official 87:085cde657901 407 pSdramAddress++;
mbed_official 87:085cde657901 408 }
mbed_official 87:085cde657901 409
mbed_official 87:085cde657901 410 /* Process Unlocked */
mbed_official 87:085cde657901 411 __HAL_UNLOCK(hsdram);
mbed_official 87:085cde657901 412
mbed_official 87:085cde657901 413 return HAL_OK;
mbed_official 87:085cde657901 414 }
mbed_official 87:085cde657901 415
mbed_official 87:085cde657901 416 /**
mbed_official 87:085cde657901 417 * @brief Writes 16-bit data buffer to SDRAM memory.
mbed_official 226:b062af740e40 418 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 419 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 420 * @param pAddress: Pointer to write start address
mbed_official 87:085cde657901 421 * @param pSrcBuffer: Pointer to source buffer to write
mbed_official 87:085cde657901 422 * @param BufferSize: Size of the buffer to write to memory
mbed_official 87:085cde657901 423 * @retval HAL status
mbed_official 87:085cde657901 424 */
mbed_official 87:085cde657901 425 HAL_StatusTypeDef HAL_SDRAM_Write_16b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize)
mbed_official 87:085cde657901 426 {
mbed_official 87:085cde657901 427 __IO uint16_t *pSdramAddress = (uint16_t *)pAddress;
mbed_official 87:085cde657901 428 uint32_t tmp = 0;
mbed_official 87:085cde657901 429
mbed_official 87:085cde657901 430 /* Process Locked */
mbed_official 87:085cde657901 431 __HAL_LOCK(hsdram);
mbed_official 87:085cde657901 432
mbed_official 87:085cde657901 433 /* Check the SDRAM controller state */
mbed_official 87:085cde657901 434 tmp = hsdram->State;
mbed_official 87:085cde657901 435
mbed_official 87:085cde657901 436 if(tmp == HAL_SDRAM_STATE_BUSY)
mbed_official 87:085cde657901 437 {
mbed_official 87:085cde657901 438 return HAL_BUSY;
mbed_official 87:085cde657901 439 }
mbed_official 87:085cde657901 440 else if((tmp == HAL_SDRAM_STATE_PRECHARGED) || (tmp == HAL_SDRAM_STATE_WRITE_PROTECTED))
mbed_official 87:085cde657901 441 {
mbed_official 87:085cde657901 442 return HAL_ERROR;
mbed_official 87:085cde657901 443 }
mbed_official 87:085cde657901 444
mbed_official 87:085cde657901 445 /* Write data to memory */
mbed_official 87:085cde657901 446 for(; BufferSize != 0; BufferSize--)
mbed_official 87:085cde657901 447 {
mbed_official 87:085cde657901 448 *(__IO uint16_t *)pSdramAddress = *pSrcBuffer;
mbed_official 87:085cde657901 449 pSrcBuffer++;
mbed_official 87:085cde657901 450 pSdramAddress++;
mbed_official 87:085cde657901 451 }
mbed_official 87:085cde657901 452
mbed_official 87:085cde657901 453 /* Process Unlocked */
mbed_official 87:085cde657901 454 __HAL_UNLOCK(hsdram);
mbed_official 87:085cde657901 455
mbed_official 87:085cde657901 456 return HAL_OK;
mbed_official 87:085cde657901 457 }
mbed_official 87:085cde657901 458
mbed_official 87:085cde657901 459 /**
mbed_official 87:085cde657901 460 * @brief Reads 32-bit data buffer from the SDRAM memory.
mbed_official 226:b062af740e40 461 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 462 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 463 * @param pAddress: Pointer to read start address
mbed_official 87:085cde657901 464 * @param pDstBuffer: Pointer to destination buffer
mbed_official 87:085cde657901 465 * @param BufferSize: Size of the buffer to read from memory
mbed_official 87:085cde657901 466 * @retval HAL status
mbed_official 87:085cde657901 467 */
mbed_official 87:085cde657901 468 HAL_StatusTypeDef HAL_SDRAM_Read_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
mbed_official 87:085cde657901 469 {
mbed_official 87:085cde657901 470 __IO uint32_t *pSdramAddress = (uint32_t *)pAddress;
mbed_official 87:085cde657901 471
mbed_official 87:085cde657901 472 /* Process Locked */
mbed_official 87:085cde657901 473 __HAL_LOCK(hsdram);
mbed_official 87:085cde657901 474
mbed_official 87:085cde657901 475 /* Check the SDRAM controller state */
mbed_official 87:085cde657901 476 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
mbed_official 87:085cde657901 477 {
mbed_official 87:085cde657901 478 return HAL_BUSY;
mbed_official 87:085cde657901 479 }
mbed_official 87:085cde657901 480 else if(hsdram->State == HAL_SDRAM_STATE_PRECHARGED)
mbed_official 87:085cde657901 481 {
mbed_official 87:085cde657901 482 return HAL_ERROR;
mbed_official 87:085cde657901 483 }
mbed_official 87:085cde657901 484
mbed_official 87:085cde657901 485 /* Read data from source */
mbed_official 87:085cde657901 486 for(; BufferSize != 0; BufferSize--)
mbed_official 87:085cde657901 487 {
mbed_official 87:085cde657901 488 *pDstBuffer = *(__IO uint32_t *)pSdramAddress;
mbed_official 87:085cde657901 489 pDstBuffer++;
mbed_official 87:085cde657901 490 pSdramAddress++;
mbed_official 87:085cde657901 491 }
mbed_official 87:085cde657901 492
mbed_official 87:085cde657901 493 /* Process Unlocked */
mbed_official 87:085cde657901 494 __HAL_UNLOCK(hsdram);
mbed_official 87:085cde657901 495
mbed_official 87:085cde657901 496 return HAL_OK;
mbed_official 87:085cde657901 497 }
mbed_official 87:085cde657901 498
mbed_official 87:085cde657901 499 /**
mbed_official 87:085cde657901 500 * @brief Writes 32-bit data buffer to SDRAM memory.
mbed_official 226:b062af740e40 501 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 502 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 503 * @param pAddress: Pointer to write start address
mbed_official 87:085cde657901 504 * @param pSrcBuffer: Pointer to source buffer to write
mbed_official 87:085cde657901 505 * @param BufferSize: Size of the buffer to write to memory
mbed_official 87:085cde657901 506 * @retval HAL status
mbed_official 87:085cde657901 507 */
mbed_official 87:085cde657901 508 HAL_StatusTypeDef HAL_SDRAM_Write_32b(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
mbed_official 87:085cde657901 509 {
mbed_official 87:085cde657901 510 __IO uint32_t *pSdramAddress = (uint32_t *)pAddress;
mbed_official 87:085cde657901 511 uint32_t tmp = 0;
mbed_official 87:085cde657901 512
mbed_official 87:085cde657901 513 /* Process Locked */
mbed_official 87:085cde657901 514 __HAL_LOCK(hsdram);
mbed_official 87:085cde657901 515
mbed_official 87:085cde657901 516 /* Check the SDRAM controller state */
mbed_official 87:085cde657901 517 tmp = hsdram->State;
mbed_official 87:085cde657901 518
mbed_official 87:085cde657901 519 if(tmp == HAL_SDRAM_STATE_BUSY)
mbed_official 87:085cde657901 520 {
mbed_official 87:085cde657901 521 return HAL_BUSY;
mbed_official 87:085cde657901 522 }
mbed_official 87:085cde657901 523 else if((tmp == HAL_SDRAM_STATE_PRECHARGED) || (tmp == HAL_SDRAM_STATE_WRITE_PROTECTED))
mbed_official 87:085cde657901 524 {
mbed_official 87:085cde657901 525 return HAL_ERROR;
mbed_official 87:085cde657901 526 }
mbed_official 87:085cde657901 527
mbed_official 87:085cde657901 528 /* Write data to memory */
mbed_official 87:085cde657901 529 for(; BufferSize != 0; BufferSize--)
mbed_official 87:085cde657901 530 {
mbed_official 87:085cde657901 531 *(__IO uint32_t *)pSdramAddress = *pSrcBuffer;
mbed_official 87:085cde657901 532 pSrcBuffer++;
mbed_official 87:085cde657901 533 pSdramAddress++;
mbed_official 87:085cde657901 534 }
mbed_official 87:085cde657901 535
mbed_official 87:085cde657901 536 /* Process Unlocked */
mbed_official 87:085cde657901 537 __HAL_UNLOCK(hsdram);
mbed_official 87:085cde657901 538
mbed_official 87:085cde657901 539 return HAL_OK;
mbed_official 87:085cde657901 540 }
mbed_official 87:085cde657901 541
mbed_official 87:085cde657901 542 /**
mbed_official 87:085cde657901 543 * @brief Reads a Words data from the SDRAM memory using DMA transfer.
mbed_official 226:b062af740e40 544 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 545 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 546 * @param pAddress: Pointer to read start address
mbed_official 87:085cde657901 547 * @param pDstBuffer: Pointer to destination buffer
mbed_official 87:085cde657901 548 * @param BufferSize: Size of the buffer to read from memory
mbed_official 87:085cde657901 549 * @retval HAL status
mbed_official 87:085cde657901 550 */
mbed_official 87:085cde657901 551 HAL_StatusTypeDef HAL_SDRAM_Read_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize)
mbed_official 87:085cde657901 552 {
mbed_official 87:085cde657901 553 uint32_t tmp = 0;
mbed_official 87:085cde657901 554
mbed_official 87:085cde657901 555 /* Process Locked */
mbed_official 87:085cde657901 556 __HAL_LOCK(hsdram);
mbed_official 87:085cde657901 557
mbed_official 87:085cde657901 558 /* Check the SDRAM controller state */
mbed_official 87:085cde657901 559 tmp = hsdram->State;
mbed_official 87:085cde657901 560
mbed_official 87:085cde657901 561 if(tmp == HAL_SDRAM_STATE_BUSY)
mbed_official 87:085cde657901 562 {
mbed_official 87:085cde657901 563 return HAL_BUSY;
mbed_official 87:085cde657901 564 }
mbed_official 87:085cde657901 565 else if(tmp == HAL_SDRAM_STATE_PRECHARGED)
mbed_official 87:085cde657901 566 {
mbed_official 87:085cde657901 567 return HAL_ERROR;
mbed_official 87:085cde657901 568 }
mbed_official 87:085cde657901 569
mbed_official 87:085cde657901 570 /* Configure DMA user callbacks */
mbed_official 87:085cde657901 571 hsdram->hdma->XferCpltCallback = HAL_SDRAM_DMA_XferCpltCallback;
mbed_official 87:085cde657901 572 hsdram->hdma->XferErrorCallback = HAL_SDRAM_DMA_XferErrorCallback;
mbed_official 87:085cde657901 573
mbed_official 87:085cde657901 574 /* Enable the DMA Stream */
mbed_official 87:085cde657901 575 HAL_DMA_Start_IT(hsdram->hdma, (uint32_t)pAddress, (uint32_t)pDstBuffer, (uint32_t)BufferSize);
mbed_official 87:085cde657901 576
mbed_official 87:085cde657901 577 /* Process Unlocked */
mbed_official 87:085cde657901 578 __HAL_UNLOCK(hsdram);
mbed_official 87:085cde657901 579
mbed_official 87:085cde657901 580 return HAL_OK;
mbed_official 87:085cde657901 581 }
mbed_official 87:085cde657901 582
mbed_official 87:085cde657901 583 /**
mbed_official 87:085cde657901 584 * @brief Writes a Words data buffer to SDRAM memory using DMA transfer.
mbed_official 226:b062af740e40 585 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 586 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 587 * @param pAddress: Pointer to write start address
mbed_official 87:085cde657901 588 * @param pSrcBuffer: Pointer to source buffer to write
mbed_official 87:085cde657901 589 * @param BufferSize: Size of the buffer to write to memory
mbed_official 87:085cde657901 590 * @retval HAL status
mbed_official 87:085cde657901 591 */
mbed_official 87:085cde657901 592 HAL_StatusTypeDef HAL_SDRAM_Write_DMA(SDRAM_HandleTypeDef *hsdram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize)
mbed_official 87:085cde657901 593 {
mbed_official 87:085cde657901 594 uint32_t tmp = 0;
mbed_official 87:085cde657901 595
mbed_official 87:085cde657901 596 /* Process Locked */
mbed_official 87:085cde657901 597 __HAL_LOCK(hsdram);
mbed_official 87:085cde657901 598
mbed_official 87:085cde657901 599 /* Check the SDRAM controller state */
mbed_official 87:085cde657901 600 tmp = hsdram->State;
mbed_official 87:085cde657901 601
mbed_official 87:085cde657901 602 if(tmp == HAL_SDRAM_STATE_BUSY)
mbed_official 87:085cde657901 603 {
mbed_official 87:085cde657901 604 return HAL_BUSY;
mbed_official 87:085cde657901 605 }
mbed_official 87:085cde657901 606 else if((tmp == HAL_SDRAM_STATE_PRECHARGED) || (tmp == HAL_SDRAM_STATE_WRITE_PROTECTED))
mbed_official 87:085cde657901 607 {
mbed_official 87:085cde657901 608 return HAL_ERROR;
mbed_official 87:085cde657901 609 }
mbed_official 87:085cde657901 610
mbed_official 87:085cde657901 611 /* Configure DMA user callbacks */
mbed_official 87:085cde657901 612 hsdram->hdma->XferCpltCallback = HAL_SDRAM_DMA_XferCpltCallback;
mbed_official 87:085cde657901 613 hsdram->hdma->XferErrorCallback = HAL_SDRAM_DMA_XferErrorCallback;
mbed_official 87:085cde657901 614
mbed_official 87:085cde657901 615 /* Enable the DMA Stream */
mbed_official 87:085cde657901 616 HAL_DMA_Start_IT(hsdram->hdma, (uint32_t)pSrcBuffer, (uint32_t)pAddress, (uint32_t)BufferSize);
mbed_official 87:085cde657901 617
mbed_official 87:085cde657901 618 /* Process Unlocked */
mbed_official 87:085cde657901 619 __HAL_UNLOCK(hsdram);
mbed_official 87:085cde657901 620
mbed_official 87:085cde657901 621 return HAL_OK;
mbed_official 87:085cde657901 622 }
mbed_official 87:085cde657901 623 /**
mbed_official 87:085cde657901 624 * @}
mbed_official 87:085cde657901 625 */
mbed_official 87:085cde657901 626
mbed_official 532:fe11edbda85c 627 /** @defgroup SDRAM_Exported_Functions_Group3 Control functions
mbed_official 87:085cde657901 628 * @brief management functions
mbed_official 87:085cde657901 629 *
mbed_official 87:085cde657901 630 @verbatim
mbed_official 87:085cde657901 631 ==============================================================================
mbed_official 87:085cde657901 632 ##### SDRAM Control functions #####
mbed_official 87:085cde657901 633 ==============================================================================
mbed_official 87:085cde657901 634 [..]
mbed_official 87:085cde657901 635 This subsection provides a set of functions allowing to control dynamically
mbed_official 87:085cde657901 636 the SDRAM interface.
mbed_official 87:085cde657901 637
mbed_official 87:085cde657901 638 @endverbatim
mbed_official 87:085cde657901 639 * @{
mbed_official 87:085cde657901 640 */
mbed_official 87:085cde657901 641
mbed_official 87:085cde657901 642 /**
mbed_official 87:085cde657901 643 * @brief Enables dynamically SDRAM write protection.
mbed_official 226:b062af740e40 644 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 645 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 646 * @retval HAL status
mbed_official 87:085cde657901 647 */
mbed_official 87:085cde657901 648 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Enable(SDRAM_HandleTypeDef *hsdram)
mbed_official 87:085cde657901 649 {
mbed_official 87:085cde657901 650 /* Check the SDRAM controller state */
mbed_official 87:085cde657901 651 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
mbed_official 87:085cde657901 652 {
mbed_official 87:085cde657901 653 return HAL_BUSY;
mbed_official 87:085cde657901 654 }
mbed_official 87:085cde657901 655
mbed_official 87:085cde657901 656 /* Update the SDRAM state */
mbed_official 87:085cde657901 657 hsdram->State = HAL_SDRAM_STATE_BUSY;
mbed_official 87:085cde657901 658
mbed_official 87:085cde657901 659 /* Enable write protection */
mbed_official 87:085cde657901 660 FMC_SDRAM_WriteProtection_Enable(hsdram->Instance, hsdram->Init.SDBank);
mbed_official 87:085cde657901 661
mbed_official 87:085cde657901 662 /* Update the SDRAM state */
mbed_official 87:085cde657901 663 hsdram->State = HAL_SDRAM_STATE_WRITE_PROTECTED;
mbed_official 87:085cde657901 664
mbed_official 87:085cde657901 665 return HAL_OK;
mbed_official 87:085cde657901 666 }
mbed_official 87:085cde657901 667
mbed_official 87:085cde657901 668 /**
mbed_official 87:085cde657901 669 * @brief Disables dynamically SDRAM write protection.
mbed_official 226:b062af740e40 670 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 671 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 672 * @retval HAL status
mbed_official 87:085cde657901 673 */
mbed_official 87:085cde657901 674 HAL_StatusTypeDef HAL_SDRAM_WriteProtection_Disable(SDRAM_HandleTypeDef *hsdram)
mbed_official 87:085cde657901 675 {
mbed_official 87:085cde657901 676 /* Check the SDRAM controller state */
mbed_official 87:085cde657901 677 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
mbed_official 87:085cde657901 678 {
mbed_official 87:085cde657901 679 return HAL_BUSY;
mbed_official 87:085cde657901 680 }
mbed_official 87:085cde657901 681
mbed_official 87:085cde657901 682 /* Update the SDRAM state */
mbed_official 87:085cde657901 683 hsdram->State = HAL_SDRAM_STATE_BUSY;
mbed_official 87:085cde657901 684
mbed_official 87:085cde657901 685 /* Disable write protection */
mbed_official 87:085cde657901 686 FMC_SDRAM_WriteProtection_Disable(hsdram->Instance, hsdram->Init.SDBank);
mbed_official 87:085cde657901 687
mbed_official 87:085cde657901 688 /* Update the SDRAM state */
mbed_official 87:085cde657901 689 hsdram->State = HAL_SDRAM_STATE_READY;
mbed_official 87:085cde657901 690
mbed_official 87:085cde657901 691 return HAL_OK;
mbed_official 87:085cde657901 692 }
mbed_official 87:085cde657901 693
mbed_official 87:085cde657901 694 /**
mbed_official 87:085cde657901 695 * @brief Sends Command to the SDRAM bank.
mbed_official 226:b062af740e40 696 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 697 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 698 * @param Command: SDRAM command structure
mbed_official 87:085cde657901 699 * @param Timeout: Timeout duration
mbed_official 226:b062af740e40 700 * @retval HAL status
mbed_official 87:085cde657901 701 */
mbed_official 87:085cde657901 702 HAL_StatusTypeDef HAL_SDRAM_SendCommand(SDRAM_HandleTypeDef *hsdram, FMC_SDRAM_CommandTypeDef *Command, uint32_t Timeout)
mbed_official 87:085cde657901 703 {
mbed_official 87:085cde657901 704 /* Check the SDRAM controller state */
mbed_official 87:085cde657901 705 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
mbed_official 87:085cde657901 706 {
mbed_official 87:085cde657901 707 return HAL_BUSY;
mbed_official 87:085cde657901 708 }
mbed_official 87:085cde657901 709
mbed_official 87:085cde657901 710 /* Update the SDRAM state */
mbed_official 87:085cde657901 711 hsdram->State = HAL_SDRAM_STATE_BUSY;
mbed_official 87:085cde657901 712
mbed_official 87:085cde657901 713 /* Send SDRAM command */
mbed_official 87:085cde657901 714 FMC_SDRAM_SendCommand(hsdram->Instance, Command, Timeout);
mbed_official 87:085cde657901 715
mbed_official 532:fe11edbda85c 716 /* Update the SDRAM controller state */
mbed_official 87:085cde657901 717 if(Command->CommandMode == FMC_SDRAM_CMD_PALL)
mbed_official 87:085cde657901 718 {
mbed_official 87:085cde657901 719 hsdram->State = HAL_SDRAM_STATE_PRECHARGED;
mbed_official 87:085cde657901 720 }
mbed_official 87:085cde657901 721 else
mbed_official 87:085cde657901 722 {
mbed_official 87:085cde657901 723 hsdram->State = HAL_SDRAM_STATE_READY;
mbed_official 87:085cde657901 724 }
mbed_official 87:085cde657901 725
mbed_official 87:085cde657901 726 return HAL_OK;
mbed_official 87:085cde657901 727 }
mbed_official 87:085cde657901 728
mbed_official 87:085cde657901 729 /**
mbed_official 87:085cde657901 730 * @brief Programs the SDRAM Memory Refresh rate.
mbed_official 226:b062af740e40 731 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 732 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 733 * @param RefreshRate: The SDRAM refresh rate value
mbed_official 226:b062af740e40 734 * @retval HAL status
mbed_official 87:085cde657901 735 */
mbed_official 87:085cde657901 736 HAL_StatusTypeDef HAL_SDRAM_ProgramRefreshRate(SDRAM_HandleTypeDef *hsdram, uint32_t RefreshRate)
mbed_official 87:085cde657901 737 {
mbed_official 87:085cde657901 738 /* Check the SDRAM controller state */
mbed_official 87:085cde657901 739 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
mbed_official 87:085cde657901 740 {
mbed_official 87:085cde657901 741 return HAL_BUSY;
mbed_official 87:085cde657901 742 }
mbed_official 87:085cde657901 743
mbed_official 87:085cde657901 744 /* Update the SDRAM state */
mbed_official 87:085cde657901 745 hsdram->State = HAL_SDRAM_STATE_BUSY;
mbed_official 87:085cde657901 746
mbed_official 87:085cde657901 747 /* Program the refresh rate */
mbed_official 87:085cde657901 748 FMC_SDRAM_ProgramRefreshRate(hsdram->Instance ,RefreshRate);
mbed_official 87:085cde657901 749
mbed_official 87:085cde657901 750 /* Update the SDRAM state */
mbed_official 87:085cde657901 751 hsdram->State = HAL_SDRAM_STATE_READY;
mbed_official 87:085cde657901 752
mbed_official 87:085cde657901 753 return HAL_OK;
mbed_official 87:085cde657901 754 }
mbed_official 87:085cde657901 755
mbed_official 87:085cde657901 756 /**
mbed_official 87:085cde657901 757 * @brief Sets the Number of consecutive SDRAM Memory auto Refresh commands.
mbed_official 226:b062af740e40 758 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 759 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 760 * @param AutoRefreshNumber: The SDRAM auto Refresh number
mbed_official 226:b062af740e40 761 * @retval HAL status
mbed_official 87:085cde657901 762 */
mbed_official 87:085cde657901 763 HAL_StatusTypeDef HAL_SDRAM_SetAutoRefreshNumber(SDRAM_HandleTypeDef *hsdram, uint32_t AutoRefreshNumber)
mbed_official 87:085cde657901 764 {
mbed_official 87:085cde657901 765 /* Check the SDRAM controller state */
mbed_official 87:085cde657901 766 if(hsdram->State == HAL_SDRAM_STATE_BUSY)
mbed_official 87:085cde657901 767 {
mbed_official 87:085cde657901 768 return HAL_BUSY;
mbed_official 87:085cde657901 769 }
mbed_official 87:085cde657901 770
mbed_official 87:085cde657901 771 /* Update the SDRAM state */
mbed_official 87:085cde657901 772 hsdram->State = HAL_SDRAM_STATE_BUSY;
mbed_official 87:085cde657901 773
mbed_official 87:085cde657901 774 /* Set the Auto-Refresh number */
mbed_official 87:085cde657901 775 FMC_SDRAM_SetAutoRefreshNumber(hsdram->Instance ,AutoRefreshNumber);
mbed_official 87:085cde657901 776
mbed_official 87:085cde657901 777 /* Update the SDRAM state */
mbed_official 87:085cde657901 778 hsdram->State = HAL_SDRAM_STATE_READY;
mbed_official 87:085cde657901 779
mbed_official 87:085cde657901 780 return HAL_OK;
mbed_official 87:085cde657901 781 }
mbed_official 87:085cde657901 782
mbed_official 87:085cde657901 783 /**
mbed_official 87:085cde657901 784 * @brief Returns the SDRAM memory current mode.
mbed_official 226:b062af740e40 785 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 786 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 787 * @retval The SDRAM memory mode.
mbed_official 87:085cde657901 788 */
mbed_official 87:085cde657901 789 uint32_t HAL_SDRAM_GetModeStatus(SDRAM_HandleTypeDef *hsdram)
mbed_official 87:085cde657901 790 {
mbed_official 87:085cde657901 791 /* Return the SDRAM memory current mode */
mbed_official 87:085cde657901 792 return(FMC_SDRAM_GetModeStatus(hsdram->Instance, hsdram->Init.SDBank));
mbed_official 87:085cde657901 793 }
mbed_official 87:085cde657901 794
mbed_official 87:085cde657901 795 /**
mbed_official 87:085cde657901 796 * @}
mbed_official 87:085cde657901 797 */
mbed_official 87:085cde657901 798
mbed_official 532:fe11edbda85c 799 /** @defgroup SDRAM_Exported_Functions_Group4 State functions
mbed_official 87:085cde657901 800 * @brief Peripheral State functions
mbed_official 87:085cde657901 801 *
mbed_official 87:085cde657901 802 @verbatim
mbed_official 87:085cde657901 803 ==============================================================================
mbed_official 87:085cde657901 804 ##### SDRAM State functions #####
mbed_official 87:085cde657901 805 ==============================================================================
mbed_official 87:085cde657901 806 [..]
mbed_official 87:085cde657901 807 This subsection permits to get in run-time the status of the SDRAM controller
mbed_official 87:085cde657901 808 and the data flow.
mbed_official 87:085cde657901 809
mbed_official 87:085cde657901 810 @endverbatim
mbed_official 87:085cde657901 811 * @{
mbed_official 87:085cde657901 812 */
mbed_official 87:085cde657901 813
mbed_official 87:085cde657901 814 /**
mbed_official 87:085cde657901 815 * @brief Returns the SDRAM state.
mbed_official 226:b062af740e40 816 * @param hsdram: pointer to a SDRAM_HandleTypeDef structure that contains
mbed_official 226:b062af740e40 817 * the configuration information for SDRAM module.
mbed_official 87:085cde657901 818 * @retval HAL state
mbed_official 87:085cde657901 819 */
mbed_official 87:085cde657901 820 HAL_SDRAM_StateTypeDef HAL_SDRAM_GetState(SDRAM_HandleTypeDef *hsdram)
mbed_official 87:085cde657901 821 {
mbed_official 87:085cde657901 822 return hsdram->State;
mbed_official 87:085cde657901 823 }
mbed_official 87:085cde657901 824
mbed_official 87:085cde657901 825 /**
mbed_official 87:085cde657901 826 * @}
mbed_official 87:085cde657901 827 */
mbed_official 87:085cde657901 828
mbed_official 87:085cde657901 829 /**
mbed_official 87:085cde657901 830 * @}
mbed_official 87:085cde657901 831 */
mbed_official 532:fe11edbda85c 832 #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx */
mbed_official 87:085cde657901 833 #endif /* HAL_SDRAM_MODULE_ENABLED */
mbed_official 87:085cde657901 834 /**
mbed_official 87:085cde657901 835 * @}
mbed_official 87:085cde657901 836 */
mbed_official 87:085cde657901 837
mbed_official 87:085cde657901 838 /**
mbed_official 87:085cde657901 839 * @}
mbed_official 87:085cde657901 840 */
mbed_official 87:085cde657901 841
mbed_official 87:085cde657901 842 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/