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targets/cmsis/TARGET_STM/TARGET_STM32F4/stm32f4xx_hal_pwr_ex.c@613:bc40b8d2aec4, 2015-08-20 (annotated)
- Committer:
- mbed_official
- Date:
- Thu Aug 20 10:45:13 2015 +0100
- Revision:
- 613:bc40b8d2aec4
- Parent:
- 532:fe11edbda85c
Synchronized with git revision 92ca8c7b60a283b6bb60eb65b183dac1599f0ade
Full URL: https://github.com/mbedmicro/mbed/commit/92ca8c7b60a283b6bb60eb65b183dac1599f0ade/
Nordic: update application start address in GCC linker script
Who changed what in which revision?
| User | Revision | Line number | New contents of line |
|---|---|---|---|
| mbed_official | 235:685d5f11838f | 1 | /** |
| mbed_official | 235:685d5f11838f | 2 | ****************************************************************************** |
| mbed_official | 235:685d5f11838f | 3 | * @file stm32f4xx_hal_pwr_ex.c |
| mbed_official | 235:685d5f11838f | 4 | * @author MCD Application Team |
| mbed_official | 613:bc40b8d2aec4 | 5 | * @version V1.3.2 |
| mbed_official | 613:bc40b8d2aec4 | 6 | * @date 26-June-2015 |
| mbed_official | 235:685d5f11838f | 7 | * @brief Extended PWR HAL module driver. |
| mbed_official | 235:685d5f11838f | 8 | * This file provides firmware functions to manage the following |
| mbed_official | 235:685d5f11838f | 9 | * functionalities of PWR extension peripheral: |
| mbed_official | 235:685d5f11838f | 10 | * + Peripheral Extended features functions |
| mbed_official | 235:685d5f11838f | 11 | * |
| mbed_official | 235:685d5f11838f | 12 | ****************************************************************************** |
| mbed_official | 235:685d5f11838f | 13 | * @attention |
| mbed_official | 235:685d5f11838f | 14 | * |
| mbed_official | 532:fe11edbda85c | 15 | * <h2><center>© COPYRIGHT(c) 2015 STMicroelectronics</center></h2> |
| mbed_official | 235:685d5f11838f | 16 | * |
| mbed_official | 235:685d5f11838f | 17 | * Redistribution and use in source and binary forms, with or without modification, |
| mbed_official | 235:685d5f11838f | 18 | * are permitted provided that the following conditions are met: |
| mbed_official | 235:685d5f11838f | 19 | * 1. Redistributions of source code must retain the above copyright notice, |
| mbed_official | 235:685d5f11838f | 20 | * this list of conditions and the following disclaimer. |
| mbed_official | 235:685d5f11838f | 21 | * 2. Redistributions in binary form must reproduce the above copyright notice, |
| mbed_official | 235:685d5f11838f | 22 | * this list of conditions and the following disclaimer in the documentation |
| mbed_official | 235:685d5f11838f | 23 | * and/or other materials provided with the distribution. |
| mbed_official | 235:685d5f11838f | 24 | * 3. Neither the name of STMicroelectronics nor the names of its contributors |
| mbed_official | 235:685d5f11838f | 25 | * may be used to endorse or promote products derived from this software |
| mbed_official | 235:685d5f11838f | 26 | * without specific prior written permission. |
| mbed_official | 235:685d5f11838f | 27 | * |
| mbed_official | 235:685d5f11838f | 28 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| mbed_official | 235:685d5f11838f | 29 | * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| mbed_official | 235:685d5f11838f | 30 | * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE |
| mbed_official | 235:685d5f11838f | 31 | * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE |
| mbed_official | 235:685d5f11838f | 32 | * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL |
| mbed_official | 235:685d5f11838f | 33 | * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR |
| mbed_official | 235:685d5f11838f | 34 | * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER |
| mbed_official | 235:685d5f11838f | 35 | * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, |
| mbed_official | 235:685d5f11838f | 36 | * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE |
| mbed_official | 235:685d5f11838f | 37 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
| mbed_official | 235:685d5f11838f | 38 | * |
| mbed_official | 235:685d5f11838f | 39 | ****************************************************************************** |
| mbed_official | 235:685d5f11838f | 40 | */ |
| mbed_official | 235:685d5f11838f | 41 | |
| mbed_official | 235:685d5f11838f | 42 | /* Includes ------------------------------------------------------------------*/ |
| mbed_official | 235:685d5f11838f | 43 | #include "stm32f4xx_hal.h" |
| mbed_official | 235:685d5f11838f | 44 | |
| mbed_official | 235:685d5f11838f | 45 | /** @addtogroup STM32F4xx_HAL_Driver |
| mbed_official | 235:685d5f11838f | 46 | * @{ |
| mbed_official | 235:685d5f11838f | 47 | */ |
| mbed_official | 235:685d5f11838f | 48 | |
| mbed_official | 532:fe11edbda85c | 49 | /** @defgroup PWREx PWREx |
| mbed_official | 235:685d5f11838f | 50 | * @brief PWR HAL module driver |
| mbed_official | 235:685d5f11838f | 51 | * @{ |
| mbed_official | 235:685d5f11838f | 52 | */ |
| mbed_official | 235:685d5f11838f | 53 | |
| mbed_official | 235:685d5f11838f | 54 | #ifdef HAL_PWR_MODULE_ENABLED |
| mbed_official | 235:685d5f11838f | 55 | |
| mbed_official | 235:685d5f11838f | 56 | /* Private typedef -----------------------------------------------------------*/ |
| mbed_official | 235:685d5f11838f | 57 | /* Private define ------------------------------------------------------------*/ |
| mbed_official | 532:fe11edbda85c | 58 | /** @addtogroup PWREx_Private_Constants |
| mbed_official | 532:fe11edbda85c | 59 | * @{ |
| mbed_official | 532:fe11edbda85c | 60 | */ |
| mbed_official | 235:685d5f11838f | 61 | #define PWR_OVERDRIVE_TIMEOUT_VALUE 1000 |
| mbed_official | 235:685d5f11838f | 62 | #define PWR_UDERDRIVE_TIMEOUT_VALUE 1000 |
| mbed_official | 235:685d5f11838f | 63 | #define PWR_BKPREG_TIMEOUT_VALUE 1000 |
| mbed_official | 532:fe11edbda85c | 64 | #define PWR_VOSRDY_TIMEOUT_VALUE 1000 |
| mbed_official | 532:fe11edbda85c | 65 | /** |
| mbed_official | 532:fe11edbda85c | 66 | * @} |
| mbed_official | 532:fe11edbda85c | 67 | */ |
| mbed_official | 532:fe11edbda85c | 68 | |
| mbed_official | 532:fe11edbda85c | 69 | |
| mbed_official | 235:685d5f11838f | 70 | /* Private macro -------------------------------------------------------------*/ |
| mbed_official | 235:685d5f11838f | 71 | /* Private variables ---------------------------------------------------------*/ |
| mbed_official | 235:685d5f11838f | 72 | /* Private function prototypes -----------------------------------------------*/ |
| mbed_official | 235:685d5f11838f | 73 | /* Private functions ---------------------------------------------------------*/ |
| mbed_official | 532:fe11edbda85c | 74 | /** @defgroup PWREx_Exported_Functions PWREx Exported Functions |
| mbed_official | 532:fe11edbda85c | 75 | * @{ |
| mbed_official | 235:685d5f11838f | 76 | */ |
| mbed_official | 235:685d5f11838f | 77 | |
| mbed_official | 532:fe11edbda85c | 78 | /** @defgroup PWREx_Exported_Functions_Group1 Peripheral Extended features functions |
| mbed_official | 235:685d5f11838f | 79 | * @brief Peripheral Extended features functions |
| mbed_official | 235:685d5f11838f | 80 | * |
| mbed_official | 235:685d5f11838f | 81 | @verbatim |
| mbed_official | 235:685d5f11838f | 82 | |
| mbed_official | 235:685d5f11838f | 83 | =============================================================================== |
| mbed_official | 235:685d5f11838f | 84 | ##### Peripheral extended features functions ##### |
| mbed_official | 235:685d5f11838f | 85 | =============================================================================== |
| mbed_official | 235:685d5f11838f | 86 | |
| mbed_official | 235:685d5f11838f | 87 | *** Main and Backup Regulators configuration *** |
| mbed_official | 235:685d5f11838f | 88 | ================================================ |
| mbed_official | 235:685d5f11838f | 89 | [..] |
| mbed_official | 235:685d5f11838f | 90 | (+) The backup domain includes 4 Kbytes of backup SRAM accessible only from |
| mbed_official | 235:685d5f11838f | 91 | the CPU, and address in 32-bit, 16-bit or 8-bit mode. Its content is |
| mbed_official | 235:685d5f11838f | 92 | retained even in Standby or VBAT mode when the low power backup regulator |
| mbed_official | 235:685d5f11838f | 93 | is enabled. It can be considered as an internal EEPROM when VBAT is |
| mbed_official | 532:fe11edbda85c | 94 | always present. You can use the HAL_PWREx_EnableBkUpReg() function to |
| mbed_official | 235:685d5f11838f | 95 | enable the low power backup regulator. |
| mbed_official | 235:685d5f11838f | 96 | |
| mbed_official | 235:685d5f11838f | 97 | (+) When the backup domain is supplied by VDD (analog switch connected to VDD) |
| mbed_official | 235:685d5f11838f | 98 | the backup SRAM is powered from VDD which replaces the VBAT power supply to |
| mbed_official | 235:685d5f11838f | 99 | save battery life. |
| mbed_official | 235:685d5f11838f | 100 | |
| mbed_official | 235:685d5f11838f | 101 | (+) The backup SRAM is not mass erased by a tamper event. It is read |
| mbed_official | 235:685d5f11838f | 102 | protected to prevent confidential data, such as cryptographic private |
| mbed_official | 235:685d5f11838f | 103 | key, from being accessed. The backup SRAM can be erased only through |
| mbed_official | 235:685d5f11838f | 104 | the Flash interface when a protection level change from level 1 to |
| mbed_official | 235:685d5f11838f | 105 | level 0 is requested. |
| mbed_official | 235:685d5f11838f | 106 | -@- Refer to the description of Read protection (RDP) in the Flash |
| mbed_official | 235:685d5f11838f | 107 | programming manual. |
| mbed_official | 235:685d5f11838f | 108 | |
| mbed_official | 235:685d5f11838f | 109 | (+) The main internal regulator can be configured to have a tradeoff between |
| mbed_official | 235:685d5f11838f | 110 | performance and power consumption when the device does not operate at |
| mbed_official | 235:685d5f11838f | 111 | the maximum frequency. This is done through __HAL_PWR_MAINREGULATORMODE_CONFIG() |
| mbed_official | 235:685d5f11838f | 112 | macro which configure VOS bit in PWR_CR register |
| mbed_official | 235:685d5f11838f | 113 | |
| mbed_official | 235:685d5f11838f | 114 | Refer to the product datasheets for more details. |
| mbed_official | 235:685d5f11838f | 115 | |
| mbed_official | 235:685d5f11838f | 116 | *** FLASH Power Down configuration **** |
| mbed_official | 235:685d5f11838f | 117 | ======================================= |
| mbed_official | 235:685d5f11838f | 118 | [..] |
| mbed_official | 235:685d5f11838f | 119 | (+) By setting the FPDS bit in the PWR_CR register by using the |
| mbed_official | 532:fe11edbda85c | 120 | HAL_PWREx_EnableFlashPowerDown() function, the Flash memory also enters power |
| mbed_official | 235:685d5f11838f | 121 | down mode when the device enters Stop mode. When the Flash memory |
| mbed_official | 235:685d5f11838f | 122 | is in power down mode, an additional startup delay is incurred when |
| mbed_official | 235:685d5f11838f | 123 | waking up from Stop mode. |
| mbed_official | 235:685d5f11838f | 124 | |
| mbed_official | 235:685d5f11838f | 125 | (+) For STM32F42xxx/43xxx Devices, the scale can be modified only when the PLL |
| mbed_official | 235:685d5f11838f | 126 | is OFF and the HSI or HSE clock source is selected as system clock. |
| mbed_official | 235:685d5f11838f | 127 | The new value programmed is active only when the PLL is ON. |
| mbed_official | 235:685d5f11838f | 128 | When the PLL is OFF, the voltage scale 3 is automatically selected. |
| mbed_official | 235:685d5f11838f | 129 | Refer to the datasheets for more details. |
| mbed_official | 235:685d5f11838f | 130 | |
| mbed_official | 235:685d5f11838f | 131 | *** Over-Drive and Under-Drive configuration **** |
| mbed_official | 235:685d5f11838f | 132 | ================================================= |
| mbed_official | 235:685d5f11838f | 133 | [..] |
| mbed_official | 235:685d5f11838f | 134 | (+) For STM32F42xxx/43xxx Devices, in Run mode: the main regulator has |
| mbed_official | 235:685d5f11838f | 135 | 2 operating modes available: |
| mbed_official | 235:685d5f11838f | 136 | (++) Normal mode: The CPU and core logic operate at maximum frequency at a given |
| mbed_official | 235:685d5f11838f | 137 | voltage scaling (scale 1, scale 2 or scale 3) |
| mbed_official | 235:685d5f11838f | 138 | (++) Over-drive mode: This mode allows the CPU and the core logic to operate at a |
| mbed_official | 235:685d5f11838f | 139 | higher frequency than the normal mode for a given voltage scaling (scale 1, |
| mbed_official | 235:685d5f11838f | 140 | scale 2 or scale 3). This mode is enabled through HAL_PWREx_EnableOverDrive() function and |
| mbed_official | 235:685d5f11838f | 141 | disabled by HAL_PWREx_DisableOverDrive() function, to enter or exit from Over-drive mode please follow |
| mbed_official | 235:685d5f11838f | 142 | the sequence described in Reference manual. |
| mbed_official | 235:685d5f11838f | 143 | |
| mbed_official | 235:685d5f11838f | 144 | (+) For STM32F42xxx/43xxx Devices, in Stop mode: the main regulator or low power regulator |
| mbed_official | 235:685d5f11838f | 145 | supplies a low power voltage to the 1.2V domain, thus preserving the content of registers |
| mbed_official | 235:685d5f11838f | 146 | and internal SRAM. 2 operating modes are available: |
| mbed_official | 235:685d5f11838f | 147 | (++) Normal mode: the 1.2V domain is preserved in nominal leakage mode. This mode is only |
| mbed_official | 235:685d5f11838f | 148 | available when the main regulator or the low power regulator is used in Scale 3 or |
| mbed_official | 235:685d5f11838f | 149 | low voltage mode. |
| mbed_official | 235:685d5f11838f | 150 | (++) Under-drive mode: the 1.2V domain is preserved in reduced leakage mode. This mode is only |
| mbed_official | 235:685d5f11838f | 151 | available when the main regulator or the low power regulator is in low voltage mode. |
| mbed_official | 235:685d5f11838f | 152 | |
| mbed_official | 235:685d5f11838f | 153 | @endverbatim |
| mbed_official | 235:685d5f11838f | 154 | * @{ |
| mbed_official | 235:685d5f11838f | 155 | */ |
| mbed_official | 235:685d5f11838f | 156 | |
| mbed_official | 235:685d5f11838f | 157 | /** |
| mbed_official | 235:685d5f11838f | 158 | * @brief Enables the Backup Regulator. |
| mbed_official | 235:685d5f11838f | 159 | * @retval HAL status |
| mbed_official | 235:685d5f11838f | 160 | */ |
| mbed_official | 235:685d5f11838f | 161 | HAL_StatusTypeDef HAL_PWREx_EnableBkUpReg(void) |
| mbed_official | 235:685d5f11838f | 162 | { |
| mbed_official | 235:685d5f11838f | 163 | uint32_t tickstart = 0; |
| mbed_official | 235:685d5f11838f | 164 | |
| mbed_official | 235:685d5f11838f | 165 | *(__IO uint32_t *) CSR_BRE_BB = (uint32_t)ENABLE; |
| mbed_official | 235:685d5f11838f | 166 | |
| mbed_official | 235:685d5f11838f | 167 | /* Get tick */ |
| mbed_official | 235:685d5f11838f | 168 | tickstart = HAL_GetTick(); |
| mbed_official | 235:685d5f11838f | 169 | |
| mbed_official | 235:685d5f11838f | 170 | /* Wait till Backup regulator ready flag is set */ |
| mbed_official | 235:685d5f11838f | 171 | while(__HAL_PWR_GET_FLAG(PWR_FLAG_BRR) == RESET) |
| mbed_official | 235:685d5f11838f | 172 | { |
| mbed_official | 235:685d5f11838f | 173 | if((HAL_GetTick() - tickstart ) > PWR_BKPREG_TIMEOUT_VALUE) |
| mbed_official | 235:685d5f11838f | 174 | { |
| mbed_official | 235:685d5f11838f | 175 | return HAL_TIMEOUT; |
| mbed_official | 235:685d5f11838f | 176 | } |
| mbed_official | 235:685d5f11838f | 177 | } |
| mbed_official | 235:685d5f11838f | 178 | return HAL_OK; |
| mbed_official | 235:685d5f11838f | 179 | } |
| mbed_official | 235:685d5f11838f | 180 | |
| mbed_official | 235:685d5f11838f | 181 | /** |
| mbed_official | 235:685d5f11838f | 182 | * @brief Disables the Backup Regulator. |
| mbed_official | 235:685d5f11838f | 183 | * @retval HAL status |
| mbed_official | 235:685d5f11838f | 184 | */ |
| mbed_official | 235:685d5f11838f | 185 | HAL_StatusTypeDef HAL_PWREx_DisableBkUpReg(void) |
| mbed_official | 235:685d5f11838f | 186 | { |
| mbed_official | 235:685d5f11838f | 187 | uint32_t tickstart = 0; |
| mbed_official | 235:685d5f11838f | 188 | |
| mbed_official | 235:685d5f11838f | 189 | *(__IO uint32_t *) CSR_BRE_BB = (uint32_t)DISABLE; |
| mbed_official | 235:685d5f11838f | 190 | |
| mbed_official | 235:685d5f11838f | 191 | /* Get tick */ |
| mbed_official | 235:685d5f11838f | 192 | tickstart = HAL_GetTick(); |
| mbed_official | 235:685d5f11838f | 193 | |
| mbed_official | 235:685d5f11838f | 194 | /* Wait till Backup regulator ready flag is set */ |
| mbed_official | 235:685d5f11838f | 195 | while(__HAL_PWR_GET_FLAG(PWR_FLAG_BRR) != RESET) |
| mbed_official | 235:685d5f11838f | 196 | { |
| mbed_official | 235:685d5f11838f | 197 | if((HAL_GetTick() - tickstart ) > PWR_BKPREG_TIMEOUT_VALUE) |
| mbed_official | 235:685d5f11838f | 198 | { |
| mbed_official | 235:685d5f11838f | 199 | return HAL_TIMEOUT; |
| mbed_official | 235:685d5f11838f | 200 | } |
| mbed_official | 235:685d5f11838f | 201 | } |
| mbed_official | 235:685d5f11838f | 202 | return HAL_OK; |
| mbed_official | 235:685d5f11838f | 203 | } |
| mbed_official | 235:685d5f11838f | 204 | |
| mbed_official | 235:685d5f11838f | 205 | /** |
| mbed_official | 235:685d5f11838f | 206 | * @brief Enables the Flash Power Down in Stop mode. |
| mbed_official | 235:685d5f11838f | 207 | * @retval None |
| mbed_official | 235:685d5f11838f | 208 | */ |
| mbed_official | 235:685d5f11838f | 209 | void HAL_PWREx_EnableFlashPowerDown(void) |
| mbed_official | 235:685d5f11838f | 210 | { |
| mbed_official | 235:685d5f11838f | 211 | *(__IO uint32_t *) CR_FPDS_BB = (uint32_t)ENABLE; |
| mbed_official | 235:685d5f11838f | 212 | } |
| mbed_official | 235:685d5f11838f | 213 | |
| mbed_official | 235:685d5f11838f | 214 | /** |
| mbed_official | 235:685d5f11838f | 215 | * @brief Disables the Flash Power Down in Stop mode. |
| mbed_official | 235:685d5f11838f | 216 | * @retval None |
| mbed_official | 235:685d5f11838f | 217 | */ |
| mbed_official | 235:685d5f11838f | 218 | void HAL_PWREx_DisableFlashPowerDown(void) |
| mbed_official | 235:685d5f11838f | 219 | { |
| mbed_official | 235:685d5f11838f | 220 | *(__IO uint32_t *) CR_FPDS_BB = (uint32_t)DISABLE; |
| mbed_official | 235:685d5f11838f | 221 | } |
| mbed_official | 235:685d5f11838f | 222 | |
| mbed_official | 532:fe11edbda85c | 223 | /** |
| mbed_official | 532:fe11edbda85c | 224 | * @brief Return Voltage Scaling Range. |
| mbed_official | 532:fe11edbda85c | 225 | * @retval The configured scale for the regulator voltage(VOS bit field). |
| mbed_official | 532:fe11edbda85c | 226 | * The returned value can be one of the following: |
| mbed_official | 532:fe11edbda85c | 227 | * - @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output Scale 1 mode |
| mbed_official | 532:fe11edbda85c | 228 | * - @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output Scale 2 mode |
| mbed_official | 532:fe11edbda85c | 229 | * - @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output Scale 3 mode |
| mbed_official | 532:fe11edbda85c | 230 | */ |
| mbed_official | 532:fe11edbda85c | 231 | uint32_t HAL_PWREx_GetVoltageRange(void) |
| mbed_official | 532:fe11edbda85c | 232 | { |
| mbed_official | 532:fe11edbda85c | 233 | return (PWR->CR & PWR_CR_VOS); |
| mbed_official | 532:fe11edbda85c | 234 | } |
| mbed_official | 532:fe11edbda85c | 235 | |
| mbed_official | 532:fe11edbda85c | 236 | #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) |
| mbed_official | 532:fe11edbda85c | 237 | /** |
| mbed_official | 532:fe11edbda85c | 238 | * @brief Configures the main internal regulator output voltage. |
| mbed_official | 532:fe11edbda85c | 239 | * @param VoltageScaling: specifies the regulator output voltage to achieve |
| mbed_official | 532:fe11edbda85c | 240 | * a tradeoff between performance and power consumption. |
| mbed_official | 532:fe11edbda85c | 241 | * This parameter can be one of the following values: |
| mbed_official | 532:fe11edbda85c | 242 | * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output range 1 mode, |
| mbed_official | 532:fe11edbda85c | 243 | * the maximum value of fHCLK = 168 MHz. |
| mbed_official | 532:fe11edbda85c | 244 | * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output range 2 mode, |
| mbed_official | 532:fe11edbda85c | 245 | * the maximum value of fHCLK = 144 MHz. |
| mbed_official | 532:fe11edbda85c | 246 | * @note When moving from Range 1 to Range 2, the system frequency must be decreased to |
| mbed_official | 532:fe11edbda85c | 247 | * a value below 144 MHz before calling HAL_PWREx_ConfigVoltageScaling() API. |
| mbed_official | 532:fe11edbda85c | 248 | * When moving from Range 2 to Range 1, the system frequency can be increased to |
| mbed_official | 532:fe11edbda85c | 249 | * a value up to 168 MHz after calling HAL_PWREx_ConfigVoltageScaling() API. |
| mbed_official | 532:fe11edbda85c | 250 | * @retval HAL Status |
| mbed_official | 532:fe11edbda85c | 251 | */ |
| mbed_official | 532:fe11edbda85c | 252 | HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling) |
| mbed_official | 532:fe11edbda85c | 253 | { |
| mbed_official | 532:fe11edbda85c | 254 | uint32_t tickstart = 0; |
| mbed_official | 532:fe11edbda85c | 255 | |
| mbed_official | 532:fe11edbda85c | 256 | assert_param(IS_PWR_VOLTAGE_SCALING_RANGE(VoltageScaling)); |
| mbed_official | 532:fe11edbda85c | 257 | |
| mbed_official | 532:fe11edbda85c | 258 | /* Enable PWR RCC Clock Peripheral */ |
| mbed_official | 532:fe11edbda85c | 259 | __HAL_RCC_PWR_CLK_ENABLE(); |
| mbed_official | 532:fe11edbda85c | 260 | |
| mbed_official | 532:fe11edbda85c | 261 | /* Set Range */ |
| mbed_official | 532:fe11edbda85c | 262 | __HAL_PWR_VOLTAGESCALING_CONFIG(VoltageScaling); |
| mbed_official | 532:fe11edbda85c | 263 | |
| mbed_official | 532:fe11edbda85c | 264 | /* Get Start Tick*/ |
| mbed_official | 532:fe11edbda85c | 265 | tickstart = HAL_GetTick(); |
| mbed_official | 532:fe11edbda85c | 266 | while((__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY) == RESET)) |
| mbed_official | 532:fe11edbda85c | 267 | { |
| mbed_official | 532:fe11edbda85c | 268 | if((HAL_GetTick() - tickstart ) > PWR_VOSRDY_TIMEOUT_VALUE) |
| mbed_official | 532:fe11edbda85c | 269 | { |
| mbed_official | 532:fe11edbda85c | 270 | return HAL_TIMEOUT; |
| mbed_official | 532:fe11edbda85c | 271 | } |
| mbed_official | 532:fe11edbda85c | 272 | } |
| mbed_official | 532:fe11edbda85c | 273 | |
| mbed_official | 532:fe11edbda85c | 274 | return HAL_OK; |
| mbed_official | 532:fe11edbda85c | 275 | } |
| mbed_official | 532:fe11edbda85c | 276 | |
| mbed_official | 532:fe11edbda85c | 277 | #elif defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \ |
| mbed_official | 532:fe11edbda85c | 278 | defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) |
| mbed_official | 532:fe11edbda85c | 279 | /** |
| mbed_official | 532:fe11edbda85c | 280 | * @brief Configures the main internal regulator output voltage. |
| mbed_official | 532:fe11edbda85c | 281 | * @param VoltageScaling: specifies the regulator output voltage to achieve |
| mbed_official | 532:fe11edbda85c | 282 | * a tradeoff between performance and power consumption. |
| mbed_official | 532:fe11edbda85c | 283 | * This parameter can be one of the following values: |
| mbed_official | 532:fe11edbda85c | 284 | * @arg PWR_REGULATOR_VOLTAGE_SCALE1: Regulator voltage output range 1 mode, |
| mbed_official | 532:fe11edbda85c | 285 | * the maximum value of fHCLK is 168 MHz. It can be extended to |
| mbed_official | 532:fe11edbda85c | 286 | * 180 MHz by activating the over-drive mode. |
| mbed_official | 532:fe11edbda85c | 287 | * @arg PWR_REGULATOR_VOLTAGE_SCALE2: Regulator voltage output range 2 mode, |
| mbed_official | 532:fe11edbda85c | 288 | * the maximum value of fHCLK is 144 MHz. It can be extended to, |
| mbed_official | 532:fe11edbda85c | 289 | * 168 MHz by activating the over-drive mode. |
| mbed_official | 532:fe11edbda85c | 290 | * @arg PWR_REGULATOR_VOLTAGE_SCALE3: Regulator voltage output range 3 mode, |
| mbed_official | 532:fe11edbda85c | 291 | * the maximum value of fHCLK is 120 MHz. |
| mbed_official | 532:fe11edbda85c | 292 | * @note To update the system clock frequency(SYSCLK): |
| mbed_official | 532:fe11edbda85c | 293 | * - Set the HSI or HSE as system clock frequency using the HAL_RCC_ClockConfig(). |
| mbed_official | 532:fe11edbda85c | 294 | * - Call the HAL_RCC_OscConfig() to configure the PLL. |
| mbed_official | 532:fe11edbda85c | 295 | * - Call HAL_PWREx_ConfigVoltageScaling() API to adjust the voltage scale. |
| mbed_official | 532:fe11edbda85c | 296 | * - Set the new system clock frequency using the HAL_RCC_ClockConfig(). |
| mbed_official | 532:fe11edbda85c | 297 | * @note The scale can be modified only when the HSI or HSE clock source is selected |
| mbed_official | 532:fe11edbda85c | 298 | * as system clock source, otherwise the API returns HAL_ERROR. |
| mbed_official | 532:fe11edbda85c | 299 | * @note When the PLL is OFF, the voltage scale 3 is automatically selected and the VOS bits |
| mbed_official | 532:fe11edbda85c | 300 | * value in the PWR_CR1 register are not taken in account. |
| mbed_official | 532:fe11edbda85c | 301 | * @note This API forces the PLL state ON to allow the possibility to configure the voltage scale 1 or 2. |
| mbed_official | 532:fe11edbda85c | 302 | * @note The new voltage scale is active only when the PLL is ON. |
| mbed_official | 532:fe11edbda85c | 303 | * @retval HAL Status |
| mbed_official | 532:fe11edbda85c | 304 | */ |
| mbed_official | 532:fe11edbda85c | 305 | HAL_StatusTypeDef HAL_PWREx_ControlVoltageScaling(uint32_t VoltageScaling) |
| mbed_official | 532:fe11edbda85c | 306 | { |
| mbed_official | 532:fe11edbda85c | 307 | uint32_t tickstart = 0; |
| mbed_official | 532:fe11edbda85c | 308 | |
| mbed_official | 532:fe11edbda85c | 309 | assert_param(IS_PWR_VOLTAGE_SCALING_RANGE(VoltageScaling)); |
| mbed_official | 532:fe11edbda85c | 310 | |
| mbed_official | 532:fe11edbda85c | 311 | /* Enable PWR RCC Clock Peripheral */ |
| mbed_official | 532:fe11edbda85c | 312 | __HAL_RCC_PWR_CLK_ENABLE(); |
| mbed_official | 532:fe11edbda85c | 313 | |
| mbed_official | 532:fe11edbda85c | 314 | /* Check if the PLL is used as system clock or not */ |
| mbed_official | 532:fe11edbda85c | 315 | if(__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_CFGR_SWS_PLL) |
| mbed_official | 532:fe11edbda85c | 316 | { |
| mbed_official | 532:fe11edbda85c | 317 | /* Disable the main PLL */ |
| mbed_official | 532:fe11edbda85c | 318 | __HAL_RCC_PLL_DISABLE(); |
| mbed_official | 532:fe11edbda85c | 319 | |
| mbed_official | 532:fe11edbda85c | 320 | /* Get Start Tick */ |
| mbed_official | 532:fe11edbda85c | 321 | tickstart = HAL_GetTick(); |
| mbed_official | 532:fe11edbda85c | 322 | /* Wait till PLL is disabled */ |
| mbed_official | 532:fe11edbda85c | 323 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) |
| mbed_official | 532:fe11edbda85c | 324 | { |
| mbed_official | 532:fe11edbda85c | 325 | if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) |
| mbed_official | 532:fe11edbda85c | 326 | { |
| mbed_official | 532:fe11edbda85c | 327 | return HAL_TIMEOUT; |
| mbed_official | 532:fe11edbda85c | 328 | } |
| mbed_official | 532:fe11edbda85c | 329 | } |
| mbed_official | 532:fe11edbda85c | 330 | |
| mbed_official | 532:fe11edbda85c | 331 | /* Set Range */ |
| mbed_official | 532:fe11edbda85c | 332 | __HAL_PWR_VOLTAGESCALING_CONFIG(VoltageScaling); |
| mbed_official | 532:fe11edbda85c | 333 | |
| mbed_official | 532:fe11edbda85c | 334 | /* Enable the main PLL */ |
| mbed_official | 532:fe11edbda85c | 335 | __HAL_RCC_PLL_ENABLE(); |
| mbed_official | 532:fe11edbda85c | 336 | |
| mbed_official | 532:fe11edbda85c | 337 | /* Get Start Tick */ |
| mbed_official | 532:fe11edbda85c | 338 | tickstart = HAL_GetTick(); |
| mbed_official | 532:fe11edbda85c | 339 | /* Wait till PLL is ready */ |
| mbed_official | 532:fe11edbda85c | 340 | while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) |
| mbed_official | 532:fe11edbda85c | 341 | { |
| mbed_official | 532:fe11edbda85c | 342 | if((HAL_GetTick() - tickstart ) > PLL_TIMEOUT_VALUE) |
| mbed_official | 532:fe11edbda85c | 343 | { |
| mbed_official | 532:fe11edbda85c | 344 | return HAL_TIMEOUT; |
| mbed_official | 532:fe11edbda85c | 345 | } |
| mbed_official | 532:fe11edbda85c | 346 | } |
| mbed_official | 532:fe11edbda85c | 347 | |
| mbed_official | 532:fe11edbda85c | 348 | /* Get Start Tick */ |
| mbed_official | 532:fe11edbda85c | 349 | tickstart = HAL_GetTick(); |
| mbed_official | 532:fe11edbda85c | 350 | while((__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY) == RESET)) |
| mbed_official | 532:fe11edbda85c | 351 | { |
| mbed_official | 532:fe11edbda85c | 352 | if((HAL_GetTick() - tickstart ) > PWR_VOSRDY_TIMEOUT_VALUE) |
| mbed_official | 532:fe11edbda85c | 353 | { |
| mbed_official | 532:fe11edbda85c | 354 | return HAL_TIMEOUT; |
| mbed_official | 532:fe11edbda85c | 355 | } |
| mbed_official | 532:fe11edbda85c | 356 | } |
| mbed_official | 532:fe11edbda85c | 357 | } |
| mbed_official | 532:fe11edbda85c | 358 | else |
| mbed_official | 532:fe11edbda85c | 359 | { |
| mbed_official | 532:fe11edbda85c | 360 | return HAL_ERROR; |
| mbed_official | 532:fe11edbda85c | 361 | } |
| mbed_official | 532:fe11edbda85c | 362 | |
| mbed_official | 532:fe11edbda85c | 363 | return HAL_OK; |
| mbed_official | 532:fe11edbda85c | 364 | } |
| mbed_official | 532:fe11edbda85c | 365 | #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx */ |
| mbed_official | 532:fe11edbda85c | 366 | |
| mbed_official | 235:685d5f11838f | 367 | #if defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) |
| mbed_official | 235:685d5f11838f | 368 | /** |
| mbed_official | 235:685d5f11838f | 369 | * @brief Enables Main Regulator low voltage mode. |
| mbed_official | 235:685d5f11838f | 370 | * @note This mode is only available for STM32F401xx/STM32F411xx devices. |
| mbed_official | 235:685d5f11838f | 371 | * @retval None |
| mbed_official | 235:685d5f11838f | 372 | */ |
| mbed_official | 235:685d5f11838f | 373 | void HAL_PWREx_EnableMainRegulatorLowVoltage(void) |
| mbed_official | 235:685d5f11838f | 374 | { |
| mbed_official | 235:685d5f11838f | 375 | *(__IO uint32_t *) CR_MRLVDS_BB = (uint32_t)ENABLE; |
| mbed_official | 235:685d5f11838f | 376 | } |
| mbed_official | 235:685d5f11838f | 377 | |
| mbed_official | 235:685d5f11838f | 378 | /** |
| mbed_official | 235:685d5f11838f | 379 | * @brief Disables Main Regulator low voltage mode. |
| mbed_official | 235:685d5f11838f | 380 | * @note This mode is only available for STM32F401xx/STM32F411xx devices. |
| mbed_official | 235:685d5f11838f | 381 | * @retval None |
| mbed_official | 235:685d5f11838f | 382 | */ |
| mbed_official | 235:685d5f11838f | 383 | void HAL_PWREx_DisableMainRegulatorLowVoltage(void) |
| mbed_official | 235:685d5f11838f | 384 | { |
| mbed_official | 235:685d5f11838f | 385 | *(__IO uint32_t *) CR_MRLVDS_BB = (uint32_t)DISABLE; |
| mbed_official | 235:685d5f11838f | 386 | } |
| mbed_official | 235:685d5f11838f | 387 | |
| mbed_official | 235:685d5f11838f | 388 | /** |
| mbed_official | 235:685d5f11838f | 389 | * @brief Enables Low Power Regulator low voltage mode. |
| mbed_official | 235:685d5f11838f | 390 | * @note This mode is only available for STM32F401xx/STM32F411xx devices. |
| mbed_official | 235:685d5f11838f | 391 | * @retval None |
| mbed_official | 235:685d5f11838f | 392 | */ |
| mbed_official | 235:685d5f11838f | 393 | void HAL_PWREx_EnableLowRegulatorLowVoltage(void) |
| mbed_official | 235:685d5f11838f | 394 | { |
| mbed_official | 235:685d5f11838f | 395 | *(__IO uint32_t *) CR_LPLVDS_BB = (uint32_t)ENABLE; |
| mbed_official | 235:685d5f11838f | 396 | } |
| mbed_official | 235:685d5f11838f | 397 | |
| mbed_official | 235:685d5f11838f | 398 | /** |
| mbed_official | 235:685d5f11838f | 399 | * @brief Disables Low Power Regulator low voltage mode. |
| mbed_official | 235:685d5f11838f | 400 | * @note This mode is only available for STM32F401xx/STM32F411xx devices. |
| mbed_official | 235:685d5f11838f | 401 | * @retval None |
| mbed_official | 235:685d5f11838f | 402 | */ |
| mbed_official | 235:685d5f11838f | 403 | void HAL_PWREx_DisableLowRegulatorLowVoltage(void) |
| mbed_official | 235:685d5f11838f | 404 | { |
| mbed_official | 235:685d5f11838f | 405 | *(__IO uint32_t *) CR_LPLVDS_BB = (uint32_t)DISABLE; |
| mbed_official | 235:685d5f11838f | 406 | } |
| mbed_official | 235:685d5f11838f | 407 | |
| mbed_official | 235:685d5f11838f | 408 | #endif /* STM32F401xC || STM32F401xE || STM32F411xE */ |
| mbed_official | 235:685d5f11838f | 409 | |
| mbed_official | 532:fe11edbda85c | 410 | #if defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || defined(STM32F446xx) |
| mbed_official | 235:685d5f11838f | 411 | /** |
| mbed_official | 235:685d5f11838f | 412 | * @brief Activates the Over-Drive mode. |
| mbed_official | 235:685d5f11838f | 413 | * @note This function can be used only for STM32F42xx/STM32F43xx devices. |
| mbed_official | 235:685d5f11838f | 414 | * This mode allows the CPU and the core logic to operate at a higher frequency |
| mbed_official | 235:685d5f11838f | 415 | * than the normal mode for a given voltage scaling (scale 1, scale 2 or scale 3). |
| mbed_official | 235:685d5f11838f | 416 | * @note It is recommended to enter or exit Over-drive mode when the application is not running |
| mbed_official | 235:685d5f11838f | 417 | * critical tasks and when the system clock source is either HSI or HSE. |
| mbed_official | 235:685d5f11838f | 418 | * During the Over-drive switch activation, no peripheral clocks should be enabled. |
| mbed_official | 235:685d5f11838f | 419 | * The peripheral clocks must be enabled once the Over-drive mode is activated. |
| mbed_official | 235:685d5f11838f | 420 | * @retval HAL status |
| mbed_official | 235:685d5f11838f | 421 | */ |
| mbed_official | 532:fe11edbda85c | 422 | HAL_StatusTypeDef HAL_PWREx_EnableOverDrive(void) |
| mbed_official | 235:685d5f11838f | 423 | { |
| mbed_official | 235:685d5f11838f | 424 | uint32_t tickstart = 0; |
| mbed_official | 235:685d5f11838f | 425 | |
| mbed_official | 532:fe11edbda85c | 426 | __HAL_RCC_PWR_CLK_ENABLE(); |
| mbed_official | 235:685d5f11838f | 427 | |
| mbed_official | 235:685d5f11838f | 428 | /* Enable the Over-drive to extend the clock frequency to 180 Mhz */ |
| mbed_official | 235:685d5f11838f | 429 | __HAL_PWR_OVERDRIVE_ENABLE(); |
| mbed_official | 235:685d5f11838f | 430 | |
| mbed_official | 235:685d5f11838f | 431 | /* Get tick */ |
| mbed_official | 235:685d5f11838f | 432 | tickstart = HAL_GetTick(); |
| mbed_official | 235:685d5f11838f | 433 | |
| mbed_official | 235:685d5f11838f | 434 | while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODRDY)) |
| mbed_official | 235:685d5f11838f | 435 | { |
| mbed_official | 235:685d5f11838f | 436 | if((HAL_GetTick() - tickstart ) > PWR_OVERDRIVE_TIMEOUT_VALUE) |
| mbed_official | 235:685d5f11838f | 437 | { |
| mbed_official | 235:685d5f11838f | 438 | return HAL_TIMEOUT; |
| mbed_official | 235:685d5f11838f | 439 | } |
| mbed_official | 235:685d5f11838f | 440 | } |
| mbed_official | 235:685d5f11838f | 441 | |
| mbed_official | 235:685d5f11838f | 442 | /* Enable the Over-drive switch */ |
| mbed_official | 235:685d5f11838f | 443 | __HAL_PWR_OVERDRIVESWITCHING_ENABLE(); |
| mbed_official | 235:685d5f11838f | 444 | |
| mbed_official | 235:685d5f11838f | 445 | /* Get tick */ |
| mbed_official | 235:685d5f11838f | 446 | tickstart = HAL_GetTick(); |
| mbed_official | 235:685d5f11838f | 447 | |
| mbed_official | 235:685d5f11838f | 448 | while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODSWRDY)) |
| mbed_official | 235:685d5f11838f | 449 | { |
| mbed_official | 235:685d5f11838f | 450 | if((HAL_GetTick() - tickstart ) > PWR_OVERDRIVE_TIMEOUT_VALUE) |
| mbed_official | 235:685d5f11838f | 451 | { |
| mbed_official | 235:685d5f11838f | 452 | return HAL_TIMEOUT; |
| mbed_official | 235:685d5f11838f | 453 | } |
| mbed_official | 235:685d5f11838f | 454 | } |
| mbed_official | 235:685d5f11838f | 455 | return HAL_OK; |
| mbed_official | 235:685d5f11838f | 456 | } |
| mbed_official | 235:685d5f11838f | 457 | |
| mbed_official | 235:685d5f11838f | 458 | /** |
| mbed_official | 235:685d5f11838f | 459 | * @brief Deactivates the Over-Drive mode. |
| mbed_official | 235:685d5f11838f | 460 | * @note This function can be used only for STM32F42xx/STM32F43xx devices. |
| mbed_official | 235:685d5f11838f | 461 | * This mode allows the CPU and the core logic to operate at a higher frequency |
| mbed_official | 235:685d5f11838f | 462 | * than the normal mode for a given voltage scaling (scale 1, scale 2 or scale 3). |
| mbed_official | 235:685d5f11838f | 463 | * @note It is recommended to enter or exit Over-drive mode when the application is not running |
| mbed_official | 235:685d5f11838f | 464 | * critical tasks and when the system clock source is either HSI or HSE. |
| mbed_official | 235:685d5f11838f | 465 | * During the Over-drive switch activation, no peripheral clocks should be enabled. |
| mbed_official | 235:685d5f11838f | 466 | * The peripheral clocks must be enabled once the Over-drive mode is activated. |
| mbed_official | 235:685d5f11838f | 467 | * @retval HAL status |
| mbed_official | 235:685d5f11838f | 468 | */ |
| mbed_official | 532:fe11edbda85c | 469 | HAL_StatusTypeDef HAL_PWREx_DisableOverDrive(void) |
| mbed_official | 235:685d5f11838f | 470 | { |
| mbed_official | 235:685d5f11838f | 471 | uint32_t tickstart = 0; |
| mbed_official | 235:685d5f11838f | 472 | |
| mbed_official | 532:fe11edbda85c | 473 | __HAL_RCC_PWR_CLK_ENABLE(); |
| mbed_official | 235:685d5f11838f | 474 | |
| mbed_official | 235:685d5f11838f | 475 | /* Disable the Over-drive switch */ |
| mbed_official | 235:685d5f11838f | 476 | __HAL_PWR_OVERDRIVESWITCHING_DISABLE(); |
| mbed_official | 235:685d5f11838f | 477 | |
| mbed_official | 235:685d5f11838f | 478 | /* Get tick */ |
| mbed_official | 235:685d5f11838f | 479 | tickstart = HAL_GetTick(); |
| mbed_official | 235:685d5f11838f | 480 | |
| mbed_official | 235:685d5f11838f | 481 | while(__HAL_PWR_GET_FLAG(PWR_FLAG_ODSWRDY)) |
| mbed_official | 235:685d5f11838f | 482 | { |
| mbed_official | 235:685d5f11838f | 483 | if((HAL_GetTick() - tickstart ) > PWR_OVERDRIVE_TIMEOUT_VALUE) |
| mbed_official | 235:685d5f11838f | 484 | { |
| mbed_official | 235:685d5f11838f | 485 | return HAL_TIMEOUT; |
| mbed_official | 235:685d5f11838f | 486 | } |
| mbed_official | 235:685d5f11838f | 487 | } |
| mbed_official | 235:685d5f11838f | 488 | |
| mbed_official | 235:685d5f11838f | 489 | /* Disable the Over-drive */ |
| mbed_official | 235:685d5f11838f | 490 | __HAL_PWR_OVERDRIVE_DISABLE(); |
| mbed_official | 235:685d5f11838f | 491 | |
| mbed_official | 235:685d5f11838f | 492 | /* Get tick */ |
| mbed_official | 235:685d5f11838f | 493 | tickstart = HAL_GetTick(); |
| mbed_official | 235:685d5f11838f | 494 | |
| mbed_official | 235:685d5f11838f | 495 | while(__HAL_PWR_GET_FLAG(PWR_FLAG_ODRDY)) |
| mbed_official | 235:685d5f11838f | 496 | { |
| mbed_official | 235:685d5f11838f | 497 | if((HAL_GetTick() - tickstart ) > PWR_OVERDRIVE_TIMEOUT_VALUE) |
| mbed_official | 235:685d5f11838f | 498 | { |
| mbed_official | 235:685d5f11838f | 499 | return HAL_TIMEOUT; |
| mbed_official | 235:685d5f11838f | 500 | } |
| mbed_official | 235:685d5f11838f | 501 | } |
| mbed_official | 235:685d5f11838f | 502 | |
| mbed_official | 235:685d5f11838f | 503 | return HAL_OK; |
| mbed_official | 235:685d5f11838f | 504 | } |
| mbed_official | 235:685d5f11838f | 505 | |
| mbed_official | 235:685d5f11838f | 506 | /** |
| mbed_official | 235:685d5f11838f | 507 | * @brief Enters in Under-Drive STOP mode. |
| mbed_official | 235:685d5f11838f | 508 | * |
| mbed_official | 235:685d5f11838f | 509 | * @note This mode is only available for STM32F42xxx/STM324F3xxx devices. |
| mbed_official | 235:685d5f11838f | 510 | * |
| mbed_official | 235:685d5f11838f | 511 | * @note This mode can be selected only when the Under-Drive is already active |
| mbed_official | 235:685d5f11838f | 512 | * |
| mbed_official | 235:685d5f11838f | 513 | * @note This mode is enabled only with STOP low power mode. |
| mbed_official | 235:685d5f11838f | 514 | * In this mode, the 1.2V domain is preserved in reduced leakage mode. This |
| mbed_official | 235:685d5f11838f | 515 | * mode is only available when the main regulator or the low power regulator |
| mbed_official | 235:685d5f11838f | 516 | * is in low voltage mode |
| mbed_official | 235:685d5f11838f | 517 | * |
| mbed_official | 235:685d5f11838f | 518 | * @note If the Under-drive mode was enabled, it is automatically disabled after |
| mbed_official | 235:685d5f11838f | 519 | * exiting Stop mode. |
| mbed_official | 235:685d5f11838f | 520 | * When the voltage regulator operates in Under-drive mode, an additional |
| mbed_official | 235:685d5f11838f | 521 | * startup delay is induced when waking up from Stop mode. |
| mbed_official | 235:685d5f11838f | 522 | * |
| mbed_official | 235:685d5f11838f | 523 | * @note In Stop mode, all I/O pins keep the same state as in Run mode. |
| mbed_official | 235:685d5f11838f | 524 | * |
| mbed_official | 532:fe11edbda85c | 525 | * @note When exiting Stop mode by issuing an interrupt or a wake-up event, |
| mbed_official | 235:685d5f11838f | 526 | * the HSI RC oscillator is selected as system clock. |
| mbed_official | 235:685d5f11838f | 527 | * |
| mbed_official | 235:685d5f11838f | 528 | * @note When the voltage regulator operates in low power mode, an additional |
| mbed_official | 235:685d5f11838f | 529 | * startup delay is incurred when waking up from Stop mode. |
| mbed_official | 235:685d5f11838f | 530 | * By keeping the internal regulator ON during Stop mode, the consumption |
| mbed_official | 235:685d5f11838f | 531 | * is higher although the startup time is reduced. |
| mbed_official | 235:685d5f11838f | 532 | * |
| mbed_official | 235:685d5f11838f | 533 | * @param Regulator: specifies the regulator state in STOP mode. |
| mbed_official | 235:685d5f11838f | 534 | * This parameter can be one of the following values: |
| mbed_official | 235:685d5f11838f | 535 | * @arg PWR_MAINREGULATOR_UNDERDRIVE_ON: Main Regulator in under-drive mode |
| mbed_official | 235:685d5f11838f | 536 | * and Flash memory in power-down when the device is in Stop under-drive mode |
| mbed_official | 235:685d5f11838f | 537 | * @arg PWR_LOWPOWERREGULATOR_UNDERDRIVE_ON: Low Power Regulator in under-drive mode |
| mbed_official | 235:685d5f11838f | 538 | * and Flash memory in power-down when the device is in Stop under-drive mode |
| mbed_official | 235:685d5f11838f | 539 | * @param STOPEntry: specifies if STOP mode in entered with WFI or WFE instruction. |
| mbed_official | 235:685d5f11838f | 540 | * This parameter can be one of the following values: |
| mbed_official | 235:685d5f11838f | 541 | * @arg PWR_SLEEPENTRY_WFI: enter STOP mode with WFI instruction |
| mbed_official | 235:685d5f11838f | 542 | * @arg PWR_SLEEPENTRY_WFE: enter STOP mode with WFE instruction |
| mbed_official | 235:685d5f11838f | 543 | * @retval None |
| mbed_official | 235:685d5f11838f | 544 | */ |
| mbed_official | 235:685d5f11838f | 545 | HAL_StatusTypeDef HAL_PWREx_EnterUnderDriveSTOPMode(uint32_t Regulator, uint8_t STOPEntry) |
| mbed_official | 235:685d5f11838f | 546 | { |
| mbed_official | 532:fe11edbda85c | 547 | uint32_t tmpreg1 = 0; |
| mbed_official | 235:685d5f11838f | 548 | uint32_t tickstart = 0; |
| mbed_official | 235:685d5f11838f | 549 | |
| mbed_official | 235:685d5f11838f | 550 | /* Check the parameters */ |
| mbed_official | 235:685d5f11838f | 551 | assert_param(IS_PWR_REGULATOR_UNDERDRIVE(Regulator)); |
| mbed_official | 235:685d5f11838f | 552 | assert_param(IS_PWR_STOP_ENTRY(STOPEntry)); |
| mbed_official | 235:685d5f11838f | 553 | |
| mbed_official | 235:685d5f11838f | 554 | /* Enable Power ctrl clock */ |
| mbed_official | 532:fe11edbda85c | 555 | __HAL_RCC_PWR_CLK_ENABLE(); |
| mbed_official | 235:685d5f11838f | 556 | /* Enable the Under-drive Mode ---------------------------------------------*/ |
| mbed_official | 235:685d5f11838f | 557 | /* Clear Under-drive flag */ |
| mbed_official | 235:685d5f11838f | 558 | __HAL_PWR_CLEAR_ODRUDR_FLAG(); |
| mbed_official | 235:685d5f11838f | 559 | |
| mbed_official | 235:685d5f11838f | 560 | /* Enable the Under-drive */ |
| mbed_official | 235:685d5f11838f | 561 | __HAL_PWR_UNDERDRIVE_ENABLE(); |
| mbed_official | 235:685d5f11838f | 562 | |
| mbed_official | 235:685d5f11838f | 563 | /* Get tick */ |
| mbed_official | 235:685d5f11838f | 564 | tickstart = HAL_GetTick(); |
| mbed_official | 235:685d5f11838f | 565 | |
| mbed_official | 235:685d5f11838f | 566 | /* Wait for UnderDrive mode is ready */ |
| mbed_official | 235:685d5f11838f | 567 | while(__HAL_PWR_GET_FLAG(PWR_FLAG_UDRDY)) |
| mbed_official | 235:685d5f11838f | 568 | { |
| mbed_official | 235:685d5f11838f | 569 | if((HAL_GetTick() - tickstart ) > PWR_UDERDRIVE_TIMEOUT_VALUE) |
| mbed_official | 235:685d5f11838f | 570 | { |
| mbed_official | 235:685d5f11838f | 571 | return HAL_TIMEOUT; |
| mbed_official | 235:685d5f11838f | 572 | } |
| mbed_official | 235:685d5f11838f | 573 | } |
| mbed_official | 235:685d5f11838f | 574 | |
| mbed_official | 235:685d5f11838f | 575 | /* Select the regulator state in STOP mode ---------------------------------*/ |
| mbed_official | 532:fe11edbda85c | 576 | tmpreg1 = PWR->CR; |
| mbed_official | 235:685d5f11838f | 577 | /* Clear PDDS, LPDS, MRLUDS and LPLUDS bits */ |
| mbed_official | 532:fe11edbda85c | 578 | tmpreg1 &= (uint32_t)~(PWR_CR_PDDS | PWR_CR_LPDS | PWR_CR_LPUDS | PWR_CR_MRUDS); |
| mbed_official | 235:685d5f11838f | 579 | |
| mbed_official | 235:685d5f11838f | 580 | /* Set LPDS, MRLUDS and LPLUDS bits according to PWR_Regulator value */ |
| mbed_official | 532:fe11edbda85c | 581 | tmpreg1 |= Regulator; |
| mbed_official | 235:685d5f11838f | 582 | |
| mbed_official | 235:685d5f11838f | 583 | /* Store the new value */ |
| mbed_official | 532:fe11edbda85c | 584 | PWR->CR = tmpreg1; |
| mbed_official | 235:685d5f11838f | 585 | |
| mbed_official | 235:685d5f11838f | 586 | /* Set SLEEPDEEP bit of Cortex System Control Register */ |
| mbed_official | 235:685d5f11838f | 587 | SCB->SCR |= SCB_SCR_SLEEPDEEP_Msk; |
| mbed_official | 235:685d5f11838f | 588 | |
| mbed_official | 235:685d5f11838f | 589 | /* Select STOP mode entry --------------------------------------------------*/ |
| mbed_official | 235:685d5f11838f | 590 | if(STOPEntry == PWR_SLEEPENTRY_WFI) |
| mbed_official | 235:685d5f11838f | 591 | { |
| mbed_official | 235:685d5f11838f | 592 | /* Request Wait For Interrupt */ |
| mbed_official | 235:685d5f11838f | 593 | __WFI(); |
| mbed_official | 235:685d5f11838f | 594 | } |
| mbed_official | 235:685d5f11838f | 595 | else |
| mbed_official | 235:685d5f11838f | 596 | { |
| mbed_official | 235:685d5f11838f | 597 | /* Request Wait For Event */ |
| mbed_official | 235:685d5f11838f | 598 | __WFE(); |
| mbed_official | 235:685d5f11838f | 599 | } |
| mbed_official | 235:685d5f11838f | 600 | /* Reset SLEEPDEEP bit of Cortex System Control Register */ |
| mbed_official | 235:685d5f11838f | 601 | SCB->SCR &= (uint32_t)~((uint32_t)SCB_SCR_SLEEPDEEP_Msk); |
| mbed_official | 235:685d5f11838f | 602 | |
| mbed_official | 235:685d5f11838f | 603 | return HAL_OK; |
| mbed_official | 235:685d5f11838f | 604 | } |
| mbed_official | 235:685d5f11838f | 605 | |
| mbed_official | 532:fe11edbda85c | 606 | #endif /* STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx || STM32F446xx */ |
| mbed_official | 235:685d5f11838f | 607 | /** |
| mbed_official | 235:685d5f11838f | 608 | * @} |
| mbed_official | 235:685d5f11838f | 609 | */ |
| mbed_official | 235:685d5f11838f | 610 | |
| mbed_official | 235:685d5f11838f | 611 | /** |
| mbed_official | 235:685d5f11838f | 612 | * @} |
| mbed_official | 235:685d5f11838f | 613 | */ |
| mbed_official | 235:685d5f11838f | 614 | |
| mbed_official | 235:685d5f11838f | 615 | #endif /* HAL_PWR_MODULE_ENABLED */ |
| mbed_official | 235:685d5f11838f | 616 | /** |
| mbed_official | 235:685d5f11838f | 617 | * @} |
| mbed_official | 235:685d5f11838f | 618 | */ |
| mbed_official | 235:685d5f11838f | 619 | |
| mbed_official | 235:685d5f11838f | 620 | /** |
| mbed_official | 235:685d5f11838f | 621 | * @} |
| mbed_official | 235:685d5f11838f | 622 | */ |
| mbed_official | 235:685d5f11838f | 623 | |
| mbed_official | 235:685d5f11838f | 624 | /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ |