marcus chiou / mbed-src

mbed library sources

Fork of mbed-src by mbed official

targets/cmsis/TARGET_Atmel/TARGET_SAM21/utils/cmsis/samd21/include/instance/ins_wdt.h@592:a274ee790e56, 2015-07-17 (annotated)

Committer:
mbed_official
Date:
Fri Jul 17 09:15:10 2015 +0100
Revision:
592:a274ee790e56
Parent:
579:53297373a894 
Synchronized with git revision e7144f83a8d75df80c4877936b6ffe552b0be9e6



Full URL: https://github.com/mbedmicro/mbed/commit/e7144f83a8d75df80c4877936b6ffe552b0be9e6/



More API implementation for SAMR21

Who changed what in which revision?

UserRevisionLine numberNew contents of line
mbed_official 579:53297373a894 1 #ifndef _SAMD21_WDT_INSTANCE_
mbed_official 579:53297373a894 2 #define _SAMD21_WDT_INSTANCE_
mbed_official 579:53297373a894 3
mbed_official 579:53297373a894 4 /* ========== Register definition for WDT peripheral ========== */
mbed_official 579:53297373a894 5 #if (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
mbed_official 579:53297373a894 6 #define REG_WDT_CTRL (0x40001000U) /**< \brief (WDT) Control */
mbed_official 579:53297373a894 7 #define REG_WDT_CONFIG (0x40001001U) /**< \brief (WDT) Configuration */
mbed_official 579:53297373a894 8 #define REG_WDT_EWCTRL (0x40001002U) /**< \brief (WDT) Early Warning Interrupt Control */
mbed_official 579:53297373a894 9 #define REG_WDT_INTENCLR (0x40001004U) /**< \brief (WDT) Interrupt Enable Clear */
mbed_official 579:53297373a894 10 #define REG_WDT_INTENSET (0x40001005U) /**< \brief (WDT) Interrupt Enable Set */
mbed_official 579:53297373a894 11 #define REG_WDT_INTFLAG (0x40001006U) /**< \brief (WDT) Interrupt Flag Status and Clear */
mbed_official 579:53297373a894 12 #define REG_WDT_STATUS (0x40001007U) /**< \brief (WDT) Status */
mbed_official 579:53297373a894 13 #define REG_WDT_CLEAR (0x40001008U) /**< \brief (WDT) Clear */
mbed_official 579:53297373a894 14 #else
mbed_official 579:53297373a894 15 #define REG_WDT_CTRL (*(RwReg8 *)0x40001000U) /**< \brief (WDT) Control */
mbed_official 579:53297373a894 16 #define REG_WDT_CONFIG (*(RwReg8 *)0x40001001U) /**< \brief (WDT) Configuration */
mbed_official 579:53297373a894 17 #define REG_WDT_EWCTRL (*(RwReg8 *)0x40001002U) /**< \brief (WDT) Early Warning Interrupt Control */
mbed_official 579:53297373a894 18 #define REG_WDT_INTENCLR (*(RwReg8 *)0x40001004U) /**< \brief (WDT) Interrupt Enable Clear */
mbed_official 579:53297373a894 19 #define REG_WDT_INTENSET (*(RwReg8 *)0x40001005U) /**< \brief (WDT) Interrupt Enable Set */
mbed_official 579:53297373a894 20 #define REG_WDT_INTFLAG (*(RwReg8 *)0x40001006U) /**< \brief (WDT) Interrupt Flag Status and Clear */
mbed_official 579:53297373a894 21 #define REG_WDT_STATUS (*(RoReg8 *)0x40001007U) /**< \brief (WDT) Status */
mbed_official 579:53297373a894 22 #define REG_WDT_CLEAR (*(WoReg8 *)0x40001008U) /**< \brief (WDT) Clear */
mbed_official 579:53297373a894 23 #endif /* (defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
mbed_official 579:53297373a894 24
mbed_official 579:53297373a894 25 /* ========== Instance parameters for WDT peripheral ========== */
mbed_official 579:53297373a894 26 #define WDT_GCLK_ID 3 // Index of Generic Clock
mbed_official 579:53297373a894 27
mbed_official 579:53297373a894 28 #endif /* _SAMD21_WDT_INSTANCE_ */