Marek Trojan
/
mbed-dev
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mbed official
Revision 103:173fc4c67e73, committed 2016-04-01
- Comitter:
- mbed_official
- Date:
- Fri Apr 01 17:45:12 2016 +0100
- Parent:
- 102:5ce70d0cf6ae
- Child:
- 104:e48d70d14486
- Commit message:
- Synchronized with git revision 47c580be869fde4174bc01e0086d51df4bedd852
Full URL: https://github.com/mbedmicro/mbed/commit/47c580be869fde4174bc01e0086d51df4bedd852/
[XXX_F3XX] enhance RTC API
Changed in this revision
--- a/targets/cmsis/TARGET_STM/TARGET_STM32F0/stm32f0xx_hal_conf.h Wed Mar 30 13:00:10 2016 +0100 +++ b/targets/cmsis/TARGET_STM/TARGET_STM32F0/stm32f0xx_hal_conf.h Fri Apr 01 17:45:12 2016 +0100 @@ -147,7 +147,7 @@ #endif /* LSE_VALUE */ #if !defined (LSE_STARTUP_TIMEOUT) - #define LSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for LSE start up, in ms */ + #define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */ #endif /* HSE_STARTUP_TIMEOUT */
--- a/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_rcc.h Wed Mar 30 13:00:10 2016 +0100
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32F3/stm32f3xx_hal_rcc.h Fri Apr 01 17:45:12 2016 +0100
@@ -164,7 +164,7 @@
* @{
*/
/* LSE state change timeout */
-#define LSE_TIMEOUT_VALUE ((uint32_t)100) /* 5 s */
+#define LSE_TIMEOUT_VALUE ((uint32_t)5000) /* 5 s */
/* Disable Backup domain write protection state change timeout */
#define DBP_TIMEOUT_VALUE ((uint32_t)100) /* 100 ms */
--- a/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/stm32l1xx_hal_conf.h Wed Mar 30 13:00:10 2016 +0100
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/stm32l1xx_hal_conf.h Fri Apr 01 17:45:12 2016 +0100
@@ -122,7 +122,7 @@
#if !defined (LSE_STARTUP_TIMEOUT)
- #define LSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for LSE start up, in ms */
+ #define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */
#endif /* HSE_STARTUP_TIMEOUT */
--- a/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/stm32l1xx_hal_conf.h Wed Mar 30 13:00:10 2016 +0100
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/stm32l1xx_hal_conf.h Fri Apr 01 17:45:12 2016 +0100
@@ -122,7 +122,7 @@
#if !defined (LSE_STARTUP_TIMEOUT)
- #define LSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for LSE start up, in ms */
+ #define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */
#endif /* HSE_STARTUP_TIMEOUT */
--- a/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/stm32l1xx_hal_conf.h Wed Mar 30 13:00:10 2016 +0100
+++ b/targets/cmsis/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/stm32l1xx_hal_conf.h Fri Apr 01 17:45:12 2016 +0100
@@ -122,7 +122,7 @@
#if !defined (LSE_STARTUP_TIMEOUT)
- #define LSE_STARTUP_TIMEOUT ((uint32_t)100) /*!< Time out for LSE start up, in ms */
+ #define LSE_STARTUP_TIMEOUT ((uint32_t)5000) /*!< Time out for LSE start up, in ms */
#endif /* HSE_STARTUP_TIMEOUT */
--- a/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device.h Wed Mar 30 13:00:10 2016 +0100 +++ b/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/device.h Fri Apr 01 17:45:12 2016 +0100 @@ -48,6 +48,7 @@ #define DEVICE_SPISLAVE 1 #define DEVICE_RTC 1 +#define DEVICE_RTC_LSI 0 #define DEVICE_PWMOUT 1
--- a/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device.h Wed Mar 30 13:00:10 2016 +0100 +++ b/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/device.h Fri Apr 01 17:45:12 2016 +0100 @@ -48,6 +48,7 @@ #define DEVICE_SPISLAVE 1 #define DEVICE_RTC 1 +#define DEVICE_RTC_LSI 0 #define DEVICE_PWMOUT 1
--- a/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device.h Wed Mar 30 13:00:10 2016 +0100 +++ b/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F031K6/device.h Fri Apr 01 17:45:12 2016 +0100 @@ -48,6 +48,7 @@ #define DEVICE_SPISLAVE 1 #define DEVICE_RTC 1 +#define DEVICE_RTC_LSI 1 #define DEVICE_PWMOUT 1
--- a/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device.h Wed Mar 30 13:00:10 2016 +0100 +++ b/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F042K6/device.h Fri Apr 01 17:45:12 2016 +0100 @@ -48,6 +48,7 @@ #define DEVICE_SPISLAVE 1 #define DEVICE_RTC 1 +#define DEVICE_RTC_LSI 1 #define DEVICE_PWMOUT 1
--- a/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device.h Wed Mar 30 13:00:10 2016 +0100 +++ b/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F070RB/device.h Fri Apr 01 17:45:12 2016 +0100 @@ -48,6 +48,7 @@ #define DEVICE_SPISLAVE 1 #define DEVICE_RTC 1 +#define DEVICE_RTC_LSI 0 #define DEVICE_PWMOUT 1
--- a/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device.h Wed Mar 30 13:00:10 2016 +0100 +++ b/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F072RB/device.h Fri Apr 01 17:45:12 2016 +0100 @@ -48,6 +48,7 @@ #define DEVICE_SPISLAVE 1 #define DEVICE_RTC 1 +#define DEVICE_RTC_LSI 0 #define DEVICE_PWMOUT 1
--- a/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device.h Wed Mar 30 13:00:10 2016 +0100 +++ b/targets/hal/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F091RC/device.h Fri Apr 01 17:45:12 2016 +0100 @@ -48,6 +48,7 @@ #define DEVICE_SPISLAVE 1 #define DEVICE_RTC 1 +#define DEVICE_RTC_LSI 0 #define DEVICE_PWMOUT 1
--- a/targets/hal/TARGET_STM/TARGET_STM32F0/rtc_api.c Wed Mar 30 13:00:10 2016 +0100
+++ b/targets/hal/TARGET_STM/TARGET_STM32F0/rtc_api.c Fri Apr 01 17:45:12 2016 +0100
@@ -33,7 +33,9 @@
#include "mbed_error.h"
+#if DEVICE_RTC_LSI
static int rtc_inited = 0;
+#endif
static RTC_HandleTypeDef RtcHandle;
@@ -41,11 +43,27 @@
RCC_OscInitTypeDef RCC_OscInitStruct;
uint32_t rtc_freq = 0;
+#if DEVICE_RTC_LSI
if (rtc_inited) return;
rtc_inited = 1;
+#endif
RtcHandle.Instance = RTC;
+#if !DEVICE_RTC_LSI
+ // Enable LSE Oscillator
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // Mandatory, otherwise the PLL is reconfigured!
+ RCC_OscInitStruct.LSEState = RCC_LSE_ON; // External 32.768 kHz clock on OSC_IN/OSC_OUT
+ RCC_OscInitStruct.LSIState = RCC_LSI_OFF;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) { // Check if LSE has started correctly
+ // Connect LSE to RTC
+ __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSE);
+ rtc_freq = LSE_VALUE;
+ } else {
+ error("Cannot initialize RTC with LSE\n");
+ }
+#else
// Enable Power clock
__PWR_CLK_ENABLE();
@@ -55,32 +73,20 @@
// Reset Backup domain
__HAL_RCC_BACKUPRESET_FORCE();
__HAL_RCC_BACKUPRESET_RELEASE();
-
- // Enable LSE Oscillator
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // Mandatory, otherwise the PLL is reconfigured!
- RCC_OscInitStruct.LSEState = RCC_LSE_ON; // External 32.768 kHz clock on OSC_IN/OSC_OUT
- if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) {
- // Connect LSE to RTC
- __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSE);
- rtc_freq = LSE_VALUE;
- } else {
- // Enable LSI clock
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_LSE;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // Mandatory, otherwise the PLL is reconfigured!
- RCC_OscInitStruct.LSEState = RCC_LSE_OFF;
- RCC_OscInitStruct.LSIState = RCC_LSI_ON;
- if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
- error("RTC error: LSI clock initialization failed.");
- }
- // Connect LSI to RTC
- __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSI);
- // This value is LSI typical value. To be measured precisely using a timer input capture for example.
- rtc_freq = LSI_VALUE;
- }
-
- // Check if RTC is already initialized
- if ((RTC->ISR & RTC_ISR_INITS) == RTC_ISR_INITS) return;
+
+ // Enable LSI clock
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_LSE;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // Mandatory, otherwise the PLL is reconfigured!
+ RCC_OscInitStruct.LSEState = RCC_LSE_OFF;
+ RCC_OscInitStruct.LSIState = RCC_LSI_ON;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+ error("Cannot initialize RTC with LSI\n");
+ }
+ // Connect LSI to RTC
+ __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSI);
+ // This value is LSI typical value. To be measured precisely using a timer input capture for example.
+ rtc_freq = LSI_VALUE;
+#endif
// Enable RTC
__HAL_RCC_RTC_ENABLE();
@@ -98,6 +104,7 @@
}
void rtc_free(void) {
+#if DEVICE_RTC_LSI
// Enable Power clock
__PWR_CLK_ENABLE();
@@ -110,6 +117,7 @@
// Disable access to Backup domain
HAL_PWR_DisableBkUpAccess();
+#endif
// Disable LSI and LSE clocks
RCC_OscInitTypeDef RCC_OscInitStruct;
@@ -119,11 +127,21 @@
RCC_OscInitStruct.LSEState = RCC_LSE_OFF;
HAL_RCC_OscConfig(&RCC_OscInitStruct);
+#if DEVICE_RTC_LSI
rtc_inited = 0;
+#endif
}
int rtc_isenabled(void) {
- return rtc_inited;
+#if DEVICE_RTC_LSI
+ return rtc_inited;
+#else
+ if ((RTC->ISR & RTC_ISR_INITS) == RTC_ISR_INITS) {
+ return 1;
+ } else {
+ return 0;
+ }
+#endif
}
/*
--- a/targets/hal/TARGET_STM/TARGET_STM32F3/TARGET_DISCO_F303VC/device.h Wed Mar 30 13:00:10 2016 +0100 +++ b/targets/hal/TARGET_STM/TARGET_STM32F3/TARGET_DISCO_F303VC/device.h Fri Apr 01 17:45:12 2016 +0100 @@ -48,6 +48,7 @@ #define DEVICE_SPISLAVE 1 #define DEVICE_RTC 1 +#define DEVICE_RTC_LSI 1 #define DEVICE_PWMOUT 1
--- a/targets/hal/TARGET_STM/TARGET_STM32F3/TARGET_DISCO_F334C8/device.h Wed Mar 30 13:00:10 2016 +0100 +++ b/targets/hal/TARGET_STM/TARGET_STM32F3/TARGET_DISCO_F334C8/device.h Fri Apr 01 17:45:12 2016 +0100 @@ -48,6 +48,7 @@ #define DEVICE_SPISLAVE 1 #define DEVICE_RTC 1 +#define DEVICE_RTC_LSI 1 #define DEVICE_PWMOUT 1
--- a/targets/hal/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F302R8/device.h Wed Mar 30 13:00:10 2016 +0100 +++ b/targets/hal/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F302R8/device.h Fri Apr 01 17:45:12 2016 +0100 @@ -48,6 +48,7 @@ #define DEVICE_SPISLAVE 1 #define DEVICE_RTC 1 +#define DEVICE_RTC_LSI 0 #define DEVICE_PWMOUT 1
--- a/targets/hal/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/device.h Wed Mar 30 13:00:10 2016 +0100 +++ b/targets/hal/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303K8/device.h Fri Apr 01 17:45:12 2016 +0100 @@ -48,6 +48,7 @@ #define DEVICE_SPISLAVE 1 #define DEVICE_RTC 1 +#define DEVICE_RTC_LSI 0 #define DEVICE_PWMOUT 1
--- a/targets/hal/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303RE/device.h Wed Mar 30 13:00:10 2016 +0100 +++ b/targets/hal/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F303RE/device.h Fri Apr 01 17:45:12 2016 +0100 @@ -48,6 +48,7 @@ #define DEVICE_SPISLAVE 1 #define DEVICE_RTC 1 +#define DEVICE_RTC_LSI 0 #define DEVICE_PWMOUT 1
--- a/targets/hal/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F334R8/device.h Wed Mar 30 13:00:10 2016 +0100 +++ b/targets/hal/TARGET_STM/TARGET_STM32F3/TARGET_NUCLEO_F334R8/device.h Fri Apr 01 17:45:12 2016 +0100 @@ -48,6 +48,7 @@ #define DEVICE_SPISLAVE 1 #define DEVICE_RTC 1 +#define DEVICE_RTC_LSI 0 #define DEVICE_PWMOUT 1
--- a/targets/hal/TARGET_STM/TARGET_STM32F3/rtc_api.c Wed Mar 30 13:00:10 2016 +0100
+++ b/targets/hal/TARGET_STM/TARGET_STM32F3/rtc_api.c Fri Apr 01 17:45:12 2016 +0100
@@ -33,7 +33,9 @@
#include "mbed_error.h"
+#if DEVICE_RTC_LSI
static int rtc_inited = 0;
+#endif
static RTC_HandleTypeDef RtcHandle;
@@ -42,12 +44,27 @@
RCC_OscInitTypeDef RCC_OscInitStruct;
uint32_t rtc_freq = 0;
- if (rtc_inited) return;
+#if DEVICE_RTC_LSI
rtc_inited = 1;
+#endif
RtcHandle.Instance = RTC;
- // Enable Power clock
+#if !DEVICE_RTC_LSI
+ // Enable LSE Oscillator
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; /* Mandatory, otherwise the PLL is reconfigured! */
+ RCC_OscInitStruct.LSEState = RCC_LSE_ON; /* External 32.768 kHz clock on OSC_IN/OSC_OUT */
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) {
+ // Connect LSE to RTC
+ __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSE);
+ rtc_freq = LSE_VALUE;
+ }
+ else {
+ error("RTC error: LSE clock initialization failed.");
+ }
+#else
+ // Enable Power clock
__PWR_CLK_ENABLE();
// Enable access to Backup domain
@@ -56,32 +73,21 @@
// Reset Backup domain
__HAL_RCC_BACKUPRESET_FORCE();
__HAL_RCC_BACKUPRESET_RELEASE();
+
+ // Enable LSI clock
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_LSE;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // Mandatory, otherwise the PLL is reconfigured!
+ RCC_OscInitStruct.LSEState = RCC_LSE_OFF;
+ RCC_OscInitStruct.LSIState = RCC_LSI_ON;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+ error("RTC error: LSI clock initialization failed.");
+ }
+ // Connect LSI to RTC
+ __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSI);
+ // Note: The LSI clock can be measured precisely using a timer input capture.
+ rtc_freq = LSI_VALUE;
+#endif
- // Enable LSE Oscillator
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; /* Mandatory, otherwise the PLL is reconfigured! */
- RCC_OscInitStruct.LSEState = RCC_LSE_ON; /* External 32.768 kHz clock on OSC_IN/OSC_OUT */
- if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) {
- // Connect LSE to RTC
- __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSE);
- rtc_freq = LSE_VALUE;
- } else {
- // Enable LSI clock
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_LSE;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // Mandatory, otherwise the PLL is reconfigured!
- RCC_OscInitStruct.LSEState = RCC_LSE_OFF;
- RCC_OscInitStruct.LSIState = RCC_LSI_ON;
- if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
- error("RTC error: LSI clock initialization failed.");
- }
- // Connect LSI to RTC
- __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSI);
- // Note: The LSI clock can be measured precisely using a timer input capture.
- rtc_freq = LSI_VALUE;
- }
-
- // Check if RTC is already initialized
- if ((RTC->ISR & RTC_ISR_INITS) == RTC_ISR_INITS) return;
// Enable RTC
__HAL_RCC_RTC_ENABLE();
@@ -100,6 +106,7 @@
void rtc_free(void)
{
+#if DEVICE_RTC_LSI
// Enable Power clock
__PWR_CLK_ENABLE();
@@ -112,6 +119,7 @@
// Disable access to Backup domain
HAL_PWR_DisableBkUpAccess();
+#endif
// Disable LSI and LSE clocks
RCC_OscInitTypeDef RCC_OscInitStruct;
@@ -121,12 +129,19 @@
RCC_OscInitStruct.LSEState = RCC_LSE_OFF;
HAL_RCC_OscConfig(&RCC_OscInitStruct);
+#if DEVICE_RTC_LSI
rtc_inited = 0;
+#endif
}
int rtc_isenabled(void)
{
+#if DEVICE_RTC_LSI
return rtc_inited;
+#else
+ if ((RTC->ISR & RTC_ISR_INITS) == RTC_ISR_INITS) return 1;
+ else return 0;
+#endif
}
/*
--- a/targets/hal/TARGET_STM/TARGET_STM32F4/rtc_api.c Wed Mar 30 13:00:10 2016 +0100
+++ b/targets/hal/TARGET_STM/TARGET_STM32F4/rtc_api.c Fri Apr 01 17:45:12 2016 +0100
@@ -50,16 +50,6 @@
RtcHandle.Instance = RTC;
- // Enable Power clock
- __PWR_CLK_ENABLE();
-
- // Enable access to Backup domain
- HAL_PWR_EnableBkUpAccess();
-
- // Reset Backup domain
- __HAL_RCC_BACKUPRESET_FORCE();
- __HAL_RCC_BACKUPRESET_RELEASE();
-
#if !DEVICE_RTC_LSI
// Enable LSE Oscillator
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
@@ -75,19 +65,29 @@
error("RTC error: LSE clock initialization failed.");
}
#else
- // Enable LSI clock
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_LSE;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // Mandatory, otherwise the PLL is reconfigured!
- RCC_OscInitStruct.LSEState = RCC_LSE_OFF;
- RCC_OscInitStruct.LSIState = RCC_LSI_ON;
- if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
- error("RTC error: LSI clock initialization failed.");
- }
- // Connect LSI to RTC
- __HAL_RCC_RTC_CLKPRESCALER(RCC_RTCCLKSOURCE_LSI);
- __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSI);
- // [TODO] This value is LSI typical value. To be measured precisely using a timer input capture
- rtc_freq = LSI_VALUE;
+ // Enable Power clock
+ __PWR_CLK_ENABLE();
+
+ // Enable access to Backup domain
+ HAL_PWR_EnableBkUpAccess();
+
+ // Reset Backup domain
+ __HAL_RCC_BACKUPRESET_FORCE();
+ __HAL_RCC_BACKUPRESET_RELEASE();
+
+ // Enable LSI clock
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_LSE;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // Mandatory, otherwise the PLL is reconfigured!
+ RCC_OscInitStruct.LSEState = RCC_LSE_OFF;
+ RCC_OscInitStruct.LSIState = RCC_LSI_ON;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+ error("RTC error: LSI clock initialization failed.");
+ }
+ // Connect LSI to RTC
+ __HAL_RCC_RTC_CLKPRESCALER(RCC_RTCCLKSOURCE_LSI);
+ __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSI);
+ // [TODO] This value is LSI typical value. To be measured precisely using a timer input capture
+ rtc_freq = LSI_VALUE;
#endif
// Enable RTC
@@ -107,6 +107,7 @@
void rtc_free(void)
{
+#if DEVICE_RTC_LSI
// Enable Power clock
__PWR_CLK_ENABLE();
@@ -119,6 +120,7 @@
// Disable access to Backup domain
HAL_PWR_DisableBkUpAccess();
+#endif
// Disable LSI and LSE clocks
RCC_OscInitTypeDef RCC_OscInitStruct;
--- a/targets/hal/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F746NG/device.h Wed Mar 30 13:00:10 2016 +0100 +++ b/targets/hal/TARGET_STM/TARGET_STM32F7/TARGET_DISCO_F746NG/device.h Fri Apr 01 17:45:12 2016 +0100 @@ -48,6 +48,7 @@ #define DEVICE_SPISLAVE 1 #define DEVICE_RTC 1 +#define DEVICE_RTC_LSI 0 #define DEVICE_PWMOUT 1
--- a/targets/hal/TARGET_STM/TARGET_STM32F7/TARGET_NUCLEO_F746ZG/device.h Wed Mar 30 13:00:10 2016 +0100 +++ b/targets/hal/TARGET_STM/TARGET_STM32F7/TARGET_NUCLEO_F746ZG/device.h Fri Apr 01 17:45:12 2016 +0100 @@ -49,6 +49,7 @@ #define DEVICE_SPISLAVE 1 #define DEVICE_RTC 1 +#define DEVICE_RTC_LSI 0 #define DEVICE_PWMOUT 1
--- a/targets/hal/TARGET_STM/TARGET_STM32F7/rtc_api.c Wed Mar 30 13:00:10 2016 +0100
+++ b/targets/hal/TARGET_STM/TARGET_STM32F7/rtc_api.c Fri Apr 01 17:45:12 2016 +0100
@@ -33,6 +33,10 @@
#include "mbed_error.h"
+#if DEVICE_RTC_LSI
+static int rtc_inited = 0;
+#endif
+
static RTC_HandleTypeDef RtcHandle;
void rtc_init(void)
@@ -52,33 +56,35 @@
__HAL_RCC_BACKUPRESET_FORCE();
__HAL_RCC_BACKUPRESET_RELEASE();
+#if !DEVICE_RTC_LSI
// Enable LSE Oscillator
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // Mandatory, otherwise the PLL is reconfigured!
RCC_OscInitStruct.LSEState = RCC_LSE_ON; // External 32.768 kHz clock on OSC_IN/OSC_OUT
- if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) {
+ RCC_OscInitStruct.LSIState = RCC_LSI_OFF;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) { // Check if LSE has started correctly
// Connect LSE to RTC
__HAL_RCC_RTC_CLKPRESCALER(RCC_RTCCLKSOURCE_LSE);
__HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSE);
rtc_freq = LSE_VALUE;
} else {
- // Enable LSI clock
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_LSE;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // Mandatory, otherwise the PLL is reconfigured!
- RCC_OscInitStruct.LSEState = RCC_LSE_OFF;
- RCC_OscInitStruct.LSIState = RCC_LSI_ON;
- if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
- error("RTC error: LSI clock initialization failed.");
- }
- // Connect LSI to RTC
- __HAL_RCC_RTC_CLKPRESCALER(RCC_RTCCLKSOURCE_LSI);
- __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSI);
- // [TODO] This value is LSI typical value. To be measured precisely using a timer input capture
- rtc_freq = LSI_VALUE;
+ error("Cannot initialize RTC with LSE\n");
}
-
- // Check if RTC is already initialized
- if ((RTC->ISR & RTC_ISR_INITS) == RTC_ISR_INITS) return;
+#else
+ // Enable LSI clock
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_LSE;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // Mandatory, otherwise the PLL is reconfigured!
+ RCC_OscInitStruct.LSEState = RCC_LSE_OFF;
+ RCC_OscInitStruct.LSIState = RCC_LSI_ON;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+ error("Cannot initialize RTC with LSI\n");
+ }
+ // Connect LSI to RTC
+ __HAL_RCC_RTC_CLKPRESCALER(RCC_RTCCLKSOURCE_LSI);
+ __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSI);
+ // This value is LSI typical value. To be measured precisely using a timer input capture for example.
+ rtc_freq = LSI_VALUE;
+#endif
// Enable RTC
__HAL_RCC_RTC_ENABLE();
@@ -117,15 +123,23 @@
RCC_OscInitStruct.LSIState = RCC_LSI_OFF;
RCC_OscInitStruct.LSEState = RCC_LSE_OFF;
HAL_RCC_OscConfig(&RCC_OscInitStruct);
+
+#if DEVICE_RTC_LSI
+ rtc_inited = 0;
+#endif
}
int rtc_isenabled(void)
{
- if(RTC->ISR != 7) {
- return 1;
- } else {
- return 0;
- }
+#if DEVICE_RTC_LSI
+ return rtc_inited;
+#else
+ if ((RTC->ISR & RTC_ISR_INITS) == RTC_ISR_INITS) {
+ return 1;
+ } else {
+ return 0;
+ }
+#endif
}
/*
--- a/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device.h Wed Mar 30 13:00:10 2016 +0100 +++ b/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_MOTE_L152RC/device.h Fri Apr 01 17:45:12 2016 +0100 @@ -48,6 +48,7 @@ #define DEVICE_SPISLAVE 1 #define DEVICE_RTC 1 +#define DEVICE_RTC_LSI 1 #define DEVICE_PWMOUT 1
--- a/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device.h Wed Mar 30 13:00:10 2016 +0100 +++ b/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_NUCLEO_L152RE/device.h Fri Apr 01 17:45:12 2016 +0100 @@ -48,6 +48,7 @@ #define DEVICE_SPISLAVE 1 #define DEVICE_RTC 1 +#define DEVICE_RTC_LSI 0 #define DEVICE_PWMOUT 1
--- a/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/device.h Wed Mar 30 13:00:10 2016 +0100 +++ b/targets/hal/TARGET_STM/TARGET_STM32L1/TARGET_NZ32_SC151/device.h Fri Apr 01 17:45:12 2016 +0100 @@ -57,6 +57,7 @@ #define DEVICE_SPISLAVE 1 #define DEVICE_RTC 1 +#define DEVICE_RTC_LSI 1 #define DEVICE_PWMOUT 1
--- a/targets/hal/TARGET_STM/TARGET_STM32L1/rtc_api.c Wed Mar 30 13:00:10 2016 +0100
+++ b/targets/hal/TARGET_STM/TARGET_STM32L1/rtc_api.c Fri Apr 01 17:45:12 2016 +0100
@@ -33,7 +33,9 @@
#include "mbed_error.h"
+#if DEVICE_RTC_LSI
static int rtc_inited = 0;
+#endif
RTC_HandleTypeDef RtcHandle;
@@ -42,8 +44,10 @@
RCC_OscInitTypeDef RCC_OscInitStruct;
uint32_t rtc_freq = 0;
+#if DEVICE_RTC_LSI
if (rtc_inited) return;
rtc_inited = 1;
+#endif
RtcHandle.Instance = RTC;
@@ -57,33 +61,35 @@
__HAL_RCC_BACKUPRESET_FORCE();
__HAL_RCC_BACKUPRESET_RELEASE();
+#if !DEVICE_RTC_LSI
// Enable LSE Oscillator
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSE;
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_LSE;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // Mandatory, otherwise the PLL is reconfigured!
RCC_OscInitStruct.LSEState = RCC_LSE_ON; // External 32.768 kHz clock on OSC_IN/OSC_OUT
- if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) {
+ RCC_OscInitStruct.LSIState = RCC_LSI_OFF;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) == HAL_OK) { // Check if LSE has started correctly
// Connect LSE to RTC
__HAL_RCC_RTC_CLKPRESCALER(RCC_RTCCLKSOURCE_LSE);
__HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSE);
rtc_freq = LSE_VALUE;
} else {
- // Enable LSI clock
- RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_LSE;
- RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // Mandatory, otherwise the PLL is reconfigured!
- RCC_OscInitStruct.LSEState = RCC_LSE_OFF;
- RCC_OscInitStruct.LSIState = RCC_LSI_ON;
- if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
- error("RTC error: LSI clock initialization failed.");
- }
- // Connect LSI to RTC
- __HAL_RCC_RTC_CLKPRESCALER(RCC_RTCCLKSOURCE_LSI);
- __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSI);
- // This value is LSI typical value. To be measured precisely using a timer input capture for example.
- rtc_freq = 40000;
+ error("Cannot initialize RTC with LSE\n");
}
-
- // Check if RTC is already initialized
- if ((RTC->ISR & RTC_ISR_INITS) == RTC_ISR_INITS) return;
+#else
+ // Enable LSI clock
+ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_LSE;
+ RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // Mandatory, otherwise the PLL is reconfigured!
+ RCC_OscInitStruct.LSEState = RCC_LSE_OFF;
+ RCC_OscInitStruct.LSIState = RCC_LSI_ON;
+ if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+ error("Cannot initialize RTC with LSI\n");
+ }
+ // Connect LSI to RTC
+ __HAL_RCC_RTC_CLKPRESCALER(RCC_RTCCLKSOURCE_LSI);
+ __HAL_RCC_RTC_CONFIG(RCC_RTCCLKSOURCE_LSI);
+ // This value is LSI typical value. To be measured precisely using a timer input capture for example.
+ rtc_freq = 40000;
+#endif
// Enable RTC
__HAL_RCC_RTC_ENABLE();
@@ -129,12 +135,22 @@
RCC_OscInitStruct.LSEState = RCC_LSE_OFF;
HAL_RCC_OscConfig(&RCC_OscInitStruct);
+#if DEVICE_RTC_LSI
rtc_inited = 0;
+#endif
}
int rtc_isenabled(void)
{
- return rtc_inited;
+#if DEVICE_RTC_LSI
+ return rtc_inited;
+#else
+ if ((RTC->ISR & RTC_ISR_INITS) == RTC_ISR_INITS) {
+ return 1;
+ } else {
+ return 0;
+ }
+#endif
}
/*
--- a/targets/hal/TARGET_STM/TARGET_STM32L4/rtc_api.c Wed Mar 30 13:00:10 2016 +0100
+++ b/targets/hal/TARGET_STM/TARGET_STM32L4/rtc_api.c Fri Apr 01 17:45:12 2016 +0100
@@ -52,16 +52,6 @@
RtcHandle.Instance = RTC;
- // Enable Power clock
- __HAL_RCC_PWR_CLK_ENABLE();
-
- // Enable access to Backup domain
- HAL_PWR_EnableBkUpAccess();
-
- // Reset Backup domain
- __HAL_RCC_BACKUPRESET_FORCE();
- __HAL_RCC_BACKUPRESET_RELEASE();
-
#if !DEVICE_RTC_LSI
// Enable LSE Oscillator
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_LSE;
@@ -78,6 +68,16 @@
error("Cannot initialize RTC with LSE\n");
}
#else
+ // Enable Power clock
+ __HAL_RCC_PWR_CLK_ENABLE();
+
+ // Enable access to Backup domain
+ HAL_PWR_EnableBkUpAccess();
+
+ // Reset Backup domain
+ __HAL_RCC_BACKUPRESET_FORCE();
+ __HAL_RCC_BACKUPRESET_RELEASE();
+
// Enable LSI clock
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_LSI | RCC_OSCILLATORTYPE_LSE;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE; // Mandatory, otherwise the PLL is reconfigured!
@@ -116,6 +116,7 @@
void rtc_free(void)
{
+#if DEVICE_RTC_LSI
// Enable Power clock
__HAL_RCC_PWR_CLK_ENABLE();
@@ -128,6 +129,7 @@
// Disable access to Backup domain
HAL_PWR_DisableBkUpAccess();
+#endif
// Disable LSI and LSE clocks
RCC_OscInitTypeDef RCC_OscInitStruct;