Marco Zecchini / Mbed OS Example_RTOS
Committer:
marcozecchini
Date:
Sat Feb 23 12:13:36 2019 +0000
Revision:
0:9fca2b23d0ba
final commit

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marcozecchini 0:9fca2b23d0ba 1 /**
marcozecchini 0:9fca2b23d0ba 2 ******************************************************************************
marcozecchini 0:9fca2b23d0ba 3 * @file stm32f4xx_hal_gpio.c
marcozecchini 0:9fca2b23d0ba 4 * @author MCD Application Team
marcozecchini 0:9fca2b23d0ba 5 * @version V1.7.1
marcozecchini 0:9fca2b23d0ba 6 * @date 14-April-2017
marcozecchini 0:9fca2b23d0ba 7 * @brief GPIO HAL module driver.
marcozecchini 0:9fca2b23d0ba 8 * This file provides firmware functions to manage the following
marcozecchini 0:9fca2b23d0ba 9 * functionalities of the General Purpose Input/Output (GPIO) peripheral:
marcozecchini 0:9fca2b23d0ba 10 * + Initialization and de-initialization functions
marcozecchini 0:9fca2b23d0ba 11 * + IO operation functions
marcozecchini 0:9fca2b23d0ba 12 *
marcozecchini 0:9fca2b23d0ba 13 @verbatim
marcozecchini 0:9fca2b23d0ba 14 ==============================================================================
marcozecchini 0:9fca2b23d0ba 15 ##### GPIO Peripheral features #####
marcozecchini 0:9fca2b23d0ba 16 ==============================================================================
marcozecchini 0:9fca2b23d0ba 17 [..]
marcozecchini 0:9fca2b23d0ba 18 Subject to the specific hardware characteristics of each I/O port listed in the datasheet, each
marcozecchini 0:9fca2b23d0ba 19 port bit of the General Purpose IO (GPIO) Ports, can be individually configured by software
marcozecchini 0:9fca2b23d0ba 20 in several modes:
marcozecchini 0:9fca2b23d0ba 21 (+) Input mode
marcozecchini 0:9fca2b23d0ba 22 (+) Analog mode
marcozecchini 0:9fca2b23d0ba 23 (+) Output mode
marcozecchini 0:9fca2b23d0ba 24 (+) Alternate function mode
marcozecchini 0:9fca2b23d0ba 25 (+) External interrupt/event lines
marcozecchini 0:9fca2b23d0ba 26
marcozecchini 0:9fca2b23d0ba 27 [..]
marcozecchini 0:9fca2b23d0ba 28 During and just after reset, the alternate functions and external interrupt
marcozecchini 0:9fca2b23d0ba 29 lines are not active and the I/O ports are configured in input floating mode.
marcozecchini 0:9fca2b23d0ba 30
marcozecchini 0:9fca2b23d0ba 31 [..]
marcozecchini 0:9fca2b23d0ba 32 All GPIO pins have weak internal pull-up and pull-down resistors, which can be
marcozecchini 0:9fca2b23d0ba 33 activated or not.
marcozecchini 0:9fca2b23d0ba 34
marcozecchini 0:9fca2b23d0ba 35 [..]
marcozecchini 0:9fca2b23d0ba 36 In Output or Alternate mode, each IO can be configured on open-drain or push-pull
marcozecchini 0:9fca2b23d0ba 37 type and the IO speed can be selected depending on the VDD value.
marcozecchini 0:9fca2b23d0ba 38
marcozecchini 0:9fca2b23d0ba 39 [..]
marcozecchini 0:9fca2b23d0ba 40 All ports have external interrupt/event capability. To use external interrupt
marcozecchini 0:9fca2b23d0ba 41 lines, the port must be configured in input mode. All available GPIO pins are
marcozecchini 0:9fca2b23d0ba 42 connected to the 16 external interrupt/event lines from EXTI0 to EXTI15.
marcozecchini 0:9fca2b23d0ba 43
marcozecchini 0:9fca2b23d0ba 44 [..]
marcozecchini 0:9fca2b23d0ba 45 The external interrupt/event controller consists of up to 23 edge detectors
marcozecchini 0:9fca2b23d0ba 46 (16 lines are connected to GPIO) for generating event/interrupt requests (each
marcozecchini 0:9fca2b23d0ba 47 input line can be independently configured to select the type (interrupt or event)
marcozecchini 0:9fca2b23d0ba 48 and the corresponding trigger event (rising or falling or both). Each line can
marcozecchini 0:9fca2b23d0ba 49 also be masked independently.
marcozecchini 0:9fca2b23d0ba 50
marcozecchini 0:9fca2b23d0ba 51 ##### How to use this driver #####
marcozecchini 0:9fca2b23d0ba 52 ==============================================================================
marcozecchini 0:9fca2b23d0ba 53 [..]
marcozecchini 0:9fca2b23d0ba 54 (#) Enable the GPIO AHB clock using the following function: __HAL_RCC_GPIOx_CLK_ENABLE().
marcozecchini 0:9fca2b23d0ba 55
marcozecchini 0:9fca2b23d0ba 56 (#) Configure the GPIO pin(s) using HAL_GPIO_Init().
marcozecchini 0:9fca2b23d0ba 57 (++) Configure the IO mode using "Mode" member from GPIO_InitTypeDef structure
marcozecchini 0:9fca2b23d0ba 58 (++) Activate Pull-up, Pull-down resistor using "Pull" member from GPIO_InitTypeDef
marcozecchini 0:9fca2b23d0ba 59 structure.
marcozecchini 0:9fca2b23d0ba 60 (++) In case of Output or alternate function mode selection: the speed is
marcozecchini 0:9fca2b23d0ba 61 configured through "Speed" member from GPIO_InitTypeDef structure.
marcozecchini 0:9fca2b23d0ba 62 (++) In alternate mode is selection, the alternate function connected to the IO
marcozecchini 0:9fca2b23d0ba 63 is configured through "Alternate" member from GPIO_InitTypeDef structure.
marcozecchini 0:9fca2b23d0ba 64 (++) Analog mode is required when a pin is to be used as ADC channel
marcozecchini 0:9fca2b23d0ba 65 or DAC output.
marcozecchini 0:9fca2b23d0ba 66 (++) In case of external interrupt/event selection the "Mode" member from
marcozecchini 0:9fca2b23d0ba 67 GPIO_InitTypeDef structure select the type (interrupt or event) and
marcozecchini 0:9fca2b23d0ba 68 the corresponding trigger event (rising or falling or both).
marcozecchini 0:9fca2b23d0ba 69
marcozecchini 0:9fca2b23d0ba 70 (#) In case of external interrupt/event mode selection, configure NVIC IRQ priority
marcozecchini 0:9fca2b23d0ba 71 mapped to the EXTI line using HAL_NVIC_SetPriority() and enable it using
marcozecchini 0:9fca2b23d0ba 72 HAL_NVIC_EnableIRQ().
marcozecchini 0:9fca2b23d0ba 73
marcozecchini 0:9fca2b23d0ba 74 (#) To get the level of a pin configured in input mode use HAL_GPIO_ReadPin().
marcozecchini 0:9fca2b23d0ba 75
marcozecchini 0:9fca2b23d0ba 76 (#) To set/reset the level of a pin configured in output mode use
marcozecchini 0:9fca2b23d0ba 77 HAL_GPIO_WritePin()/HAL_GPIO_TogglePin().
marcozecchini 0:9fca2b23d0ba 78
marcozecchini 0:9fca2b23d0ba 79 (#) To lock pin configuration until next reset use HAL_GPIO_LockPin().
marcozecchini 0:9fca2b23d0ba 80
marcozecchini 0:9fca2b23d0ba 81
marcozecchini 0:9fca2b23d0ba 82 (#) During and just after reset, the alternate functions are not
marcozecchini 0:9fca2b23d0ba 83 active and the GPIO pins are configured in input floating mode (except JTAG
marcozecchini 0:9fca2b23d0ba 84 pins).
marcozecchini 0:9fca2b23d0ba 85
marcozecchini 0:9fca2b23d0ba 86 (#) The LSE oscillator pins OSC32_IN and OSC32_OUT can be used as general purpose
marcozecchini 0:9fca2b23d0ba 87 (PC14 and PC15, respectively) when the LSE oscillator is off. The LSE has
marcozecchini 0:9fca2b23d0ba 88 priority over the GPIO function.
marcozecchini 0:9fca2b23d0ba 89
marcozecchini 0:9fca2b23d0ba 90 (#) The HSE oscillator pins OSC_IN/OSC_OUT can be used as
marcozecchini 0:9fca2b23d0ba 91 general purpose PH0 and PH1, respectively, when the HSE oscillator is off.
marcozecchini 0:9fca2b23d0ba 92 The HSE has priority over the GPIO function.
marcozecchini 0:9fca2b23d0ba 93
marcozecchini 0:9fca2b23d0ba 94 @endverbatim
marcozecchini 0:9fca2b23d0ba 95 ******************************************************************************
marcozecchini 0:9fca2b23d0ba 96 * @attention
marcozecchini 0:9fca2b23d0ba 97 *
marcozecchini 0:9fca2b23d0ba 98 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
marcozecchini 0:9fca2b23d0ba 99 *
marcozecchini 0:9fca2b23d0ba 100 * Redistribution and use in source and binary forms, with or without modification,
marcozecchini 0:9fca2b23d0ba 101 * are permitted provided that the following conditions are met:
marcozecchini 0:9fca2b23d0ba 102 * 1. Redistributions of source code must retain the above copyright notice,
marcozecchini 0:9fca2b23d0ba 103 * this list of conditions and the following disclaimer.
marcozecchini 0:9fca2b23d0ba 104 * 2. Redistributions in binary form must reproduce the above copyright notice,
marcozecchini 0:9fca2b23d0ba 105 * this list of conditions and the following disclaimer in the documentation
marcozecchini 0:9fca2b23d0ba 106 * and/or other materials provided with the distribution.
marcozecchini 0:9fca2b23d0ba 107 * 3. Neither the name of STMicroelectronics nor the names of its contributors
marcozecchini 0:9fca2b23d0ba 108 * may be used to endorse or promote products derived from this software
marcozecchini 0:9fca2b23d0ba 109 * without specific prior written permission.
marcozecchini 0:9fca2b23d0ba 110 *
marcozecchini 0:9fca2b23d0ba 111 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
marcozecchini 0:9fca2b23d0ba 112 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
marcozecchini 0:9fca2b23d0ba 113 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
marcozecchini 0:9fca2b23d0ba 114 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
marcozecchini 0:9fca2b23d0ba 115 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
marcozecchini 0:9fca2b23d0ba 116 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
marcozecchini 0:9fca2b23d0ba 117 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
marcozecchini 0:9fca2b23d0ba 118 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
marcozecchini 0:9fca2b23d0ba 119 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
marcozecchini 0:9fca2b23d0ba 120 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
marcozecchini 0:9fca2b23d0ba 121 *
marcozecchini 0:9fca2b23d0ba 122 ******************************************************************************
marcozecchini 0:9fca2b23d0ba 123 */
marcozecchini 0:9fca2b23d0ba 124
marcozecchini 0:9fca2b23d0ba 125 /* Includes ------------------------------------------------------------------*/
marcozecchini 0:9fca2b23d0ba 126 #include "stm32f4xx_hal.h"
marcozecchini 0:9fca2b23d0ba 127
marcozecchini 0:9fca2b23d0ba 128 /** @addtogroup STM32F4xx_HAL_Driver
marcozecchini 0:9fca2b23d0ba 129 * @{
marcozecchini 0:9fca2b23d0ba 130 */
marcozecchini 0:9fca2b23d0ba 131
marcozecchini 0:9fca2b23d0ba 132 /** @defgroup GPIO GPIO
marcozecchini 0:9fca2b23d0ba 133 * @brief GPIO HAL module driver
marcozecchini 0:9fca2b23d0ba 134 * @{
marcozecchini 0:9fca2b23d0ba 135 */
marcozecchini 0:9fca2b23d0ba 136
marcozecchini 0:9fca2b23d0ba 137 #ifdef HAL_GPIO_MODULE_ENABLED
marcozecchini 0:9fca2b23d0ba 138
marcozecchini 0:9fca2b23d0ba 139 /* Private typedef -----------------------------------------------------------*/
marcozecchini 0:9fca2b23d0ba 140 /* Private define ------------------------------------------------------------*/
marcozecchini 0:9fca2b23d0ba 141 /** @addtogroup GPIO_Private_Constants GPIO Private Constants
marcozecchini 0:9fca2b23d0ba 142 * @{
marcozecchini 0:9fca2b23d0ba 143 */
marcozecchini 0:9fca2b23d0ba 144 #define GPIO_MODE 0x00000003U
marcozecchini 0:9fca2b23d0ba 145 #define EXTI_MODE 0x10000000U
marcozecchini 0:9fca2b23d0ba 146 #define GPIO_MODE_IT 0x00010000U
marcozecchini 0:9fca2b23d0ba 147 #define GPIO_MODE_EVT 0x00020000U
marcozecchini 0:9fca2b23d0ba 148 #define RISING_EDGE 0x00100000U
marcozecchini 0:9fca2b23d0ba 149 #define FALLING_EDGE 0x00200000U
marcozecchini 0:9fca2b23d0ba 150 #define GPIO_OUTPUT_TYPE 0x00000010U
marcozecchini 0:9fca2b23d0ba 151
marcozecchini 0:9fca2b23d0ba 152 #define GPIO_NUMBER 16U
marcozecchini 0:9fca2b23d0ba 153 /**
marcozecchini 0:9fca2b23d0ba 154 * @}
marcozecchini 0:9fca2b23d0ba 155 */
marcozecchini 0:9fca2b23d0ba 156 /* Private macro -------------------------------------------------------------*/
marcozecchini 0:9fca2b23d0ba 157 /* Private variables ---------------------------------------------------------*/
marcozecchini 0:9fca2b23d0ba 158 /* Private function prototypes -----------------------------------------------*/
marcozecchini 0:9fca2b23d0ba 159 /* Private functions ---------------------------------------------------------*/
marcozecchini 0:9fca2b23d0ba 160 /* Exported functions --------------------------------------------------------*/
marcozecchini 0:9fca2b23d0ba 161 /** @defgroup GPIO_Exported_Functions GPIO Exported Functions
marcozecchini 0:9fca2b23d0ba 162 * @{
marcozecchini 0:9fca2b23d0ba 163 */
marcozecchini 0:9fca2b23d0ba 164
marcozecchini 0:9fca2b23d0ba 165 /** @defgroup GPIO_Exported_Functions_Group1 Initialization and de-initialization functions
marcozecchini 0:9fca2b23d0ba 166 * @brief Initialization and Configuration functions
marcozecchini 0:9fca2b23d0ba 167 *
marcozecchini 0:9fca2b23d0ba 168 @verbatim
marcozecchini 0:9fca2b23d0ba 169 ===============================================================================
marcozecchini 0:9fca2b23d0ba 170 ##### Initialization and de-initialization functions #####
marcozecchini 0:9fca2b23d0ba 171 ===============================================================================
marcozecchini 0:9fca2b23d0ba 172 [..]
marcozecchini 0:9fca2b23d0ba 173 This section provides functions allowing to initialize and de-initialize the GPIOs
marcozecchini 0:9fca2b23d0ba 174 to be ready for use.
marcozecchini 0:9fca2b23d0ba 175
marcozecchini 0:9fca2b23d0ba 176 @endverbatim
marcozecchini 0:9fca2b23d0ba 177 * @{
marcozecchini 0:9fca2b23d0ba 178 */
marcozecchini 0:9fca2b23d0ba 179
marcozecchini 0:9fca2b23d0ba 180
marcozecchini 0:9fca2b23d0ba 181 /**
marcozecchini 0:9fca2b23d0ba 182 * @brief Initializes the GPIOx peripheral according to the specified parameters in the GPIO_Init.
marcozecchini 0:9fca2b23d0ba 183 * @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F429X device or
marcozecchini 0:9fca2b23d0ba 184 * x can be (A..I) to select the GPIO peripheral for STM32F40XX and STM32F427X devices.
marcozecchini 0:9fca2b23d0ba 185 * @param GPIO_Init: pointer to a GPIO_InitTypeDef structure that contains
marcozecchini 0:9fca2b23d0ba 186 * the configuration information for the specified GPIO peripheral.
marcozecchini 0:9fca2b23d0ba 187 * @retval None
marcozecchini 0:9fca2b23d0ba 188 */
marcozecchini 0:9fca2b23d0ba 189 void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init)
marcozecchini 0:9fca2b23d0ba 190 {
marcozecchini 0:9fca2b23d0ba 191 uint32_t position;
marcozecchini 0:9fca2b23d0ba 192 uint32_t ioposition = 0x00U;
marcozecchini 0:9fca2b23d0ba 193 uint32_t iocurrent = 0x00U;
marcozecchini 0:9fca2b23d0ba 194 uint32_t temp = 0x00U;
marcozecchini 0:9fca2b23d0ba 195
marcozecchini 0:9fca2b23d0ba 196 /* Check the parameters */
marcozecchini 0:9fca2b23d0ba 197 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
marcozecchini 0:9fca2b23d0ba 198 assert_param(IS_GPIO_PIN(GPIO_Init->Pin));
marcozecchini 0:9fca2b23d0ba 199 assert_param(IS_GPIO_MODE(GPIO_Init->Mode));
marcozecchini 0:9fca2b23d0ba 200 assert_param(IS_GPIO_PULL(GPIO_Init->Pull));
marcozecchini 0:9fca2b23d0ba 201
marcozecchini 0:9fca2b23d0ba 202 /* Configure the port pins */
marcozecchini 0:9fca2b23d0ba 203 for(position = 0U; position < GPIO_NUMBER; position++)
marcozecchini 0:9fca2b23d0ba 204 {
marcozecchini 0:9fca2b23d0ba 205 /* Get the IO position */
marcozecchini 0:9fca2b23d0ba 206 ioposition = 0x01U << position;
marcozecchini 0:9fca2b23d0ba 207 /* Get the current IO position */
marcozecchini 0:9fca2b23d0ba 208 iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition;
marcozecchini 0:9fca2b23d0ba 209
marcozecchini 0:9fca2b23d0ba 210 if(iocurrent == ioposition)
marcozecchini 0:9fca2b23d0ba 211 {
marcozecchini 0:9fca2b23d0ba 212 /*--------------------- GPIO Mode Configuration ------------------------*/
marcozecchini 0:9fca2b23d0ba 213 /* In case of Alternate function mode selection */
marcozecchini 0:9fca2b23d0ba 214 if((GPIO_Init->Mode == GPIO_MODE_AF_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
marcozecchini 0:9fca2b23d0ba 215 {
marcozecchini 0:9fca2b23d0ba 216 /* Check the Alternate function parameter */
marcozecchini 0:9fca2b23d0ba 217 assert_param(IS_GPIO_AF(GPIO_Init->Alternate));
marcozecchini 0:9fca2b23d0ba 218 /* Configure Alternate function mapped with the current IO */
marcozecchini 0:9fca2b23d0ba 219 temp = GPIOx->AFR[position >> 3U];
marcozecchini 0:9fca2b23d0ba 220 temp &= ~(0xFU << ((uint32_t)(position & 0x07U) * 4U)) ;
marcozecchini 0:9fca2b23d0ba 221 temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & 0x07U) * 4U));
marcozecchini 0:9fca2b23d0ba 222 GPIOx->AFR[position >> 3U] = temp;
marcozecchini 0:9fca2b23d0ba 223 }
marcozecchini 0:9fca2b23d0ba 224
marcozecchini 0:9fca2b23d0ba 225 /* Configure IO Direction mode (Input, Output, Alternate or Analog) */
marcozecchini 0:9fca2b23d0ba 226 temp = GPIOx->MODER;
marcozecchini 0:9fca2b23d0ba 227 temp &= ~(GPIO_MODER_MODER0 << (position * 2U));
marcozecchini 0:9fca2b23d0ba 228 temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2U));
marcozecchini 0:9fca2b23d0ba 229 GPIOx->MODER = temp;
marcozecchini 0:9fca2b23d0ba 230
marcozecchini 0:9fca2b23d0ba 231 /* In case of Output or Alternate function mode selection */
marcozecchini 0:9fca2b23d0ba 232 if((GPIO_Init->Mode == GPIO_MODE_OUTPUT_PP) || (GPIO_Init->Mode == GPIO_MODE_AF_PP) ||
marcozecchini 0:9fca2b23d0ba 233 (GPIO_Init->Mode == GPIO_MODE_OUTPUT_OD) || (GPIO_Init->Mode == GPIO_MODE_AF_OD))
marcozecchini 0:9fca2b23d0ba 234 {
marcozecchini 0:9fca2b23d0ba 235 /* Check the Speed parameter */
marcozecchini 0:9fca2b23d0ba 236 assert_param(IS_GPIO_SPEED(GPIO_Init->Speed));
marcozecchini 0:9fca2b23d0ba 237 /* Configure the IO Speed */
marcozecchini 0:9fca2b23d0ba 238 temp = GPIOx->OSPEEDR;
marcozecchini 0:9fca2b23d0ba 239 temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2U));
marcozecchini 0:9fca2b23d0ba 240 temp |= (GPIO_Init->Speed << (position * 2U));
marcozecchini 0:9fca2b23d0ba 241 GPIOx->OSPEEDR = temp;
marcozecchini 0:9fca2b23d0ba 242
marcozecchini 0:9fca2b23d0ba 243 /* Configure the IO Output Type */
marcozecchini 0:9fca2b23d0ba 244 temp = GPIOx->OTYPER;
marcozecchini 0:9fca2b23d0ba 245 temp &= ~(GPIO_OTYPER_OT_0 << position) ;
marcozecchini 0:9fca2b23d0ba 246 temp |= (((GPIO_Init->Mode & GPIO_OUTPUT_TYPE) >> 4U) << position);
marcozecchini 0:9fca2b23d0ba 247 GPIOx->OTYPER = temp;
marcozecchini 0:9fca2b23d0ba 248 }
marcozecchini 0:9fca2b23d0ba 249
marcozecchini 0:9fca2b23d0ba 250 /* Activate the Pull-up or Pull down resistor for the current IO */
marcozecchini 0:9fca2b23d0ba 251 temp = GPIOx->PUPDR;
marcozecchini 0:9fca2b23d0ba 252 temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2U));
marcozecchini 0:9fca2b23d0ba 253 temp |= ((GPIO_Init->Pull) << (position * 2U));
marcozecchini 0:9fca2b23d0ba 254 GPIOx->PUPDR = temp;
marcozecchini 0:9fca2b23d0ba 255
marcozecchini 0:9fca2b23d0ba 256 /*--------------------- EXTI Mode Configuration ------------------------*/
marcozecchini 0:9fca2b23d0ba 257 /* Configure the External Interrupt or event for the current IO */
marcozecchini 0:9fca2b23d0ba 258 if((GPIO_Init->Mode & EXTI_MODE) == EXTI_MODE)
marcozecchini 0:9fca2b23d0ba 259 {
marcozecchini 0:9fca2b23d0ba 260 /* Enable SYSCFG Clock */
marcozecchini 0:9fca2b23d0ba 261 __HAL_RCC_SYSCFG_CLK_ENABLE();
marcozecchini 0:9fca2b23d0ba 262
marcozecchini 0:9fca2b23d0ba 263 temp = SYSCFG->EXTICR[position >> 2U];
marcozecchini 0:9fca2b23d0ba 264 temp &= ~(0x0FU << (4U * (position & 0x03U)));
marcozecchini 0:9fca2b23d0ba 265 temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U)));
marcozecchini 0:9fca2b23d0ba 266 SYSCFG->EXTICR[position >> 2U] = temp;
marcozecchini 0:9fca2b23d0ba 267
marcozecchini 0:9fca2b23d0ba 268 /* Clear EXTI line configuration */
marcozecchini 0:9fca2b23d0ba 269 temp = EXTI->IMR;
marcozecchini 0:9fca2b23d0ba 270 temp &= ~((uint32_t)iocurrent);
marcozecchini 0:9fca2b23d0ba 271 if((GPIO_Init->Mode & GPIO_MODE_IT) == GPIO_MODE_IT)
marcozecchini 0:9fca2b23d0ba 272 {
marcozecchini 0:9fca2b23d0ba 273 temp |= iocurrent;
marcozecchini 0:9fca2b23d0ba 274 }
marcozecchini 0:9fca2b23d0ba 275 EXTI->IMR = temp;
marcozecchini 0:9fca2b23d0ba 276
marcozecchini 0:9fca2b23d0ba 277 temp = EXTI->EMR;
marcozecchini 0:9fca2b23d0ba 278 temp &= ~((uint32_t)iocurrent);
marcozecchini 0:9fca2b23d0ba 279 if((GPIO_Init->Mode & GPIO_MODE_EVT) == GPIO_MODE_EVT)
marcozecchini 0:9fca2b23d0ba 280 {
marcozecchini 0:9fca2b23d0ba 281 temp |= iocurrent;
marcozecchini 0:9fca2b23d0ba 282 }
marcozecchini 0:9fca2b23d0ba 283 EXTI->EMR = temp;
marcozecchini 0:9fca2b23d0ba 284
marcozecchini 0:9fca2b23d0ba 285 /* Clear Rising Falling edge configuration */
marcozecchini 0:9fca2b23d0ba 286 temp = EXTI->RTSR;
marcozecchini 0:9fca2b23d0ba 287 temp &= ~((uint32_t)iocurrent);
marcozecchini 0:9fca2b23d0ba 288 if((GPIO_Init->Mode & RISING_EDGE) == RISING_EDGE)
marcozecchini 0:9fca2b23d0ba 289 {
marcozecchini 0:9fca2b23d0ba 290 temp |= iocurrent;
marcozecchini 0:9fca2b23d0ba 291 }
marcozecchini 0:9fca2b23d0ba 292 EXTI->RTSR = temp;
marcozecchini 0:9fca2b23d0ba 293
marcozecchini 0:9fca2b23d0ba 294 temp = EXTI->FTSR;
marcozecchini 0:9fca2b23d0ba 295 temp &= ~((uint32_t)iocurrent);
marcozecchini 0:9fca2b23d0ba 296 if((GPIO_Init->Mode & FALLING_EDGE) == FALLING_EDGE)
marcozecchini 0:9fca2b23d0ba 297 {
marcozecchini 0:9fca2b23d0ba 298 temp |= iocurrent;
marcozecchini 0:9fca2b23d0ba 299 }
marcozecchini 0:9fca2b23d0ba 300 EXTI->FTSR = temp;
marcozecchini 0:9fca2b23d0ba 301 }
marcozecchini 0:9fca2b23d0ba 302 }
marcozecchini 0:9fca2b23d0ba 303 }
marcozecchini 0:9fca2b23d0ba 304 }
marcozecchini 0:9fca2b23d0ba 305
marcozecchini 0:9fca2b23d0ba 306 /**
marcozecchini 0:9fca2b23d0ba 307 * @brief De-initializes the GPIOx peripheral registers to their default reset values.
marcozecchini 0:9fca2b23d0ba 308 * @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F429X device or
marcozecchini 0:9fca2b23d0ba 309 * x can be (A..I) to select the GPIO peripheral for STM32F40XX and STM32F427X devices.
marcozecchini 0:9fca2b23d0ba 310 * @param GPIO_Pin: specifies the port bit to be written.
marcozecchini 0:9fca2b23d0ba 311 * This parameter can be one of GPIO_PIN_x where x can be (0..15).
marcozecchini 0:9fca2b23d0ba 312 * @retval None
marcozecchini 0:9fca2b23d0ba 313 */
marcozecchini 0:9fca2b23d0ba 314 void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin)
marcozecchini 0:9fca2b23d0ba 315 {
marcozecchini 0:9fca2b23d0ba 316 uint32_t position;
marcozecchini 0:9fca2b23d0ba 317 uint32_t ioposition = 0x00U;
marcozecchini 0:9fca2b23d0ba 318 uint32_t iocurrent = 0x00U;
marcozecchini 0:9fca2b23d0ba 319 uint32_t tmp = 0x00U;
marcozecchini 0:9fca2b23d0ba 320
marcozecchini 0:9fca2b23d0ba 321 /* Check the parameters */
marcozecchini 0:9fca2b23d0ba 322 assert_param(IS_GPIO_ALL_INSTANCE(GPIOx));
marcozecchini 0:9fca2b23d0ba 323
marcozecchini 0:9fca2b23d0ba 324 /* Configure the port pins */
marcozecchini 0:9fca2b23d0ba 325 for(position = 0U; position < GPIO_NUMBER; position++)
marcozecchini 0:9fca2b23d0ba 326 {
marcozecchini 0:9fca2b23d0ba 327 /* Get the IO position */
marcozecchini 0:9fca2b23d0ba 328 ioposition = 0x01U << position;
marcozecchini 0:9fca2b23d0ba 329 /* Get the current IO position */
marcozecchini 0:9fca2b23d0ba 330 iocurrent = (GPIO_Pin) & ioposition;
marcozecchini 0:9fca2b23d0ba 331
marcozecchini 0:9fca2b23d0ba 332 if(iocurrent == ioposition)
marcozecchini 0:9fca2b23d0ba 333 {
marcozecchini 0:9fca2b23d0ba 334 /*------------------------- GPIO Mode Configuration --------------------*/
marcozecchini 0:9fca2b23d0ba 335 /* Configure IO Direction in Input Floating Mode */
marcozecchini 0:9fca2b23d0ba 336 GPIOx->MODER &= ~(GPIO_MODER_MODER0 << (position * 2U));
marcozecchini 0:9fca2b23d0ba 337
marcozecchini 0:9fca2b23d0ba 338 /* Configure the default Alternate Function in current IO */
marcozecchini 0:9fca2b23d0ba 339 GPIOx->AFR[position >> 3U] &= ~(0xFU << ((uint32_t)(position & 0x07U) * 4U)) ;
marcozecchini 0:9fca2b23d0ba 340
marcozecchini 0:9fca2b23d0ba 341 /* Configure the default value for IO Speed */
marcozecchini 0:9fca2b23d0ba 342 GPIOx->OSPEEDR &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2U));
marcozecchini 0:9fca2b23d0ba 343
marcozecchini 0:9fca2b23d0ba 344 /* Configure the default value IO Output Type */
marcozecchini 0:9fca2b23d0ba 345 GPIOx->OTYPER &= ~(GPIO_OTYPER_OT_0 << position) ;
marcozecchini 0:9fca2b23d0ba 346
marcozecchini 0:9fca2b23d0ba 347 /* Deactivate the Pull-up and Pull-down resistor for the current IO */
marcozecchini 0:9fca2b23d0ba 348 GPIOx->PUPDR &= ~(GPIO_PUPDR_PUPDR0 << (position * 2U));
marcozecchini 0:9fca2b23d0ba 349
marcozecchini 0:9fca2b23d0ba 350 /*------------------------- EXTI Mode Configuration --------------------*/
marcozecchini 0:9fca2b23d0ba 351 tmp = SYSCFG->EXTICR[position >> 2U];
marcozecchini 0:9fca2b23d0ba 352 tmp &= (0x0FU << (4U * (position & 0x03U)));
marcozecchini 0:9fca2b23d0ba 353 if(tmp == ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4U * (position & 0x03U))))
marcozecchini 0:9fca2b23d0ba 354 {
marcozecchini 0:9fca2b23d0ba 355 /* Configure the External Interrupt or event for the current IO */
marcozecchini 0:9fca2b23d0ba 356 tmp = 0x0FU << (4U * (position & 0x03U));
marcozecchini 0:9fca2b23d0ba 357 SYSCFG->EXTICR[position >> 2U] &= ~tmp;
marcozecchini 0:9fca2b23d0ba 358
marcozecchini 0:9fca2b23d0ba 359 /* Clear EXTI line configuration */
marcozecchini 0:9fca2b23d0ba 360 EXTI->IMR &= ~((uint32_t)iocurrent);
marcozecchini 0:9fca2b23d0ba 361 EXTI->EMR &= ~((uint32_t)iocurrent);
marcozecchini 0:9fca2b23d0ba 362
marcozecchini 0:9fca2b23d0ba 363 /* Clear Rising Falling edge configuration */
marcozecchini 0:9fca2b23d0ba 364 EXTI->RTSR &= ~((uint32_t)iocurrent);
marcozecchini 0:9fca2b23d0ba 365 EXTI->FTSR &= ~((uint32_t)iocurrent);
marcozecchini 0:9fca2b23d0ba 366 }
marcozecchini 0:9fca2b23d0ba 367 }
marcozecchini 0:9fca2b23d0ba 368 }
marcozecchini 0:9fca2b23d0ba 369 }
marcozecchini 0:9fca2b23d0ba 370
marcozecchini 0:9fca2b23d0ba 371 /**
marcozecchini 0:9fca2b23d0ba 372 * @}
marcozecchini 0:9fca2b23d0ba 373 */
marcozecchini 0:9fca2b23d0ba 374
marcozecchini 0:9fca2b23d0ba 375 /** @defgroup GPIO_Exported_Functions_Group2 IO operation functions
marcozecchini 0:9fca2b23d0ba 376 * @brief GPIO Read and Write
marcozecchini 0:9fca2b23d0ba 377 *
marcozecchini 0:9fca2b23d0ba 378 @verbatim
marcozecchini 0:9fca2b23d0ba 379 ===============================================================================
marcozecchini 0:9fca2b23d0ba 380 ##### IO operation functions #####
marcozecchini 0:9fca2b23d0ba 381 ===============================================================================
marcozecchini 0:9fca2b23d0ba 382
marcozecchini 0:9fca2b23d0ba 383 @endverbatim
marcozecchini 0:9fca2b23d0ba 384 * @{
marcozecchini 0:9fca2b23d0ba 385 */
marcozecchini 0:9fca2b23d0ba 386
marcozecchini 0:9fca2b23d0ba 387 /**
marcozecchini 0:9fca2b23d0ba 388 * @brief Reads the specified input port pin.
marcozecchini 0:9fca2b23d0ba 389 * @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F429X device or
marcozecchini 0:9fca2b23d0ba 390 * x can be (A..I) to select the GPIO peripheral for STM32F40XX and STM32F427X devices.
marcozecchini 0:9fca2b23d0ba 391 * @param GPIO_Pin: specifies the port bit to read.
marcozecchini 0:9fca2b23d0ba 392 * This parameter can be GPIO_PIN_x where x can be (0..15).
marcozecchini 0:9fca2b23d0ba 393 * @retval The input port pin value.
marcozecchini 0:9fca2b23d0ba 394 */
marcozecchini 0:9fca2b23d0ba 395 GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
marcozecchini 0:9fca2b23d0ba 396 {
marcozecchini 0:9fca2b23d0ba 397 GPIO_PinState bitstatus;
marcozecchini 0:9fca2b23d0ba 398
marcozecchini 0:9fca2b23d0ba 399 /* Check the parameters */
marcozecchini 0:9fca2b23d0ba 400 assert_param(IS_GPIO_PIN(GPIO_Pin));
marcozecchini 0:9fca2b23d0ba 401
marcozecchini 0:9fca2b23d0ba 402 if((GPIOx->IDR & GPIO_Pin) != (uint32_t)GPIO_PIN_RESET)
marcozecchini 0:9fca2b23d0ba 403 {
marcozecchini 0:9fca2b23d0ba 404 bitstatus = GPIO_PIN_SET;
marcozecchini 0:9fca2b23d0ba 405 }
marcozecchini 0:9fca2b23d0ba 406 else
marcozecchini 0:9fca2b23d0ba 407 {
marcozecchini 0:9fca2b23d0ba 408 bitstatus = GPIO_PIN_RESET;
marcozecchini 0:9fca2b23d0ba 409 }
marcozecchini 0:9fca2b23d0ba 410 return bitstatus;
marcozecchini 0:9fca2b23d0ba 411 }
marcozecchini 0:9fca2b23d0ba 412
marcozecchini 0:9fca2b23d0ba 413 /**
marcozecchini 0:9fca2b23d0ba 414 * @brief Sets or clears the selected data port bit.
marcozecchini 0:9fca2b23d0ba 415 *
marcozecchini 0:9fca2b23d0ba 416 * @note This function uses GPIOx_BSRR register to allow atomic read/modify
marcozecchini 0:9fca2b23d0ba 417 * accesses. In this way, there is no risk of an IRQ occurring between
marcozecchini 0:9fca2b23d0ba 418 * the read and the modify access.
marcozecchini 0:9fca2b23d0ba 419 *
marcozecchini 0:9fca2b23d0ba 420 * @param GPIOx: where x can be (A..K) to select the GPIO peripheral for STM32F429X device or
marcozecchini 0:9fca2b23d0ba 421 * x can be (A..I) to select the GPIO peripheral for STM32F40XX and STM32F427X devices.
marcozecchini 0:9fca2b23d0ba 422 * @param GPIO_Pin: specifies the port bit to be written.
marcozecchini 0:9fca2b23d0ba 423 * This parameter can be one of GPIO_PIN_x where x can be (0..15).
marcozecchini 0:9fca2b23d0ba 424 * @param PinState: specifies the value to be written to the selected bit.
marcozecchini 0:9fca2b23d0ba 425 * This parameter can be one of the GPIO_PinState enum values:
marcozecchini 0:9fca2b23d0ba 426 * @arg GPIO_PIN_RESET: to clear the port pin
marcozecchini 0:9fca2b23d0ba 427 * @arg GPIO_PIN_SET: to set the port pin
marcozecchini 0:9fca2b23d0ba 428 * @retval None
marcozecchini 0:9fca2b23d0ba 429 */
marcozecchini 0:9fca2b23d0ba 430 void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState)
marcozecchini 0:9fca2b23d0ba 431 {
marcozecchini 0:9fca2b23d0ba 432 /* Check the parameters */
marcozecchini 0:9fca2b23d0ba 433 assert_param(IS_GPIO_PIN(GPIO_Pin));
marcozecchini 0:9fca2b23d0ba 434 assert_param(IS_GPIO_PIN_ACTION(PinState));
marcozecchini 0:9fca2b23d0ba 435
marcozecchini 0:9fca2b23d0ba 436 if(PinState != GPIO_PIN_RESET)
marcozecchini 0:9fca2b23d0ba 437 {
marcozecchini 0:9fca2b23d0ba 438 GPIOx->BSRR = GPIO_Pin;
marcozecchini 0:9fca2b23d0ba 439 }
marcozecchini 0:9fca2b23d0ba 440 else
marcozecchini 0:9fca2b23d0ba 441 {
marcozecchini 0:9fca2b23d0ba 442 GPIOx->BSRR = (uint32_t)GPIO_Pin << 16U;
marcozecchini 0:9fca2b23d0ba 443 }
marcozecchini 0:9fca2b23d0ba 444 }
marcozecchini 0:9fca2b23d0ba 445
marcozecchini 0:9fca2b23d0ba 446 /**
marcozecchini 0:9fca2b23d0ba 447 * @brief Toggles the specified GPIO pins.
marcozecchini 0:9fca2b23d0ba 448 * @param GPIOx: Where x can be (A..K) to select the GPIO peripheral for STM32F429X device or
marcozecchini 0:9fca2b23d0ba 449 * x can be (A..I) to select the GPIO peripheral for STM32F40XX and STM32F427X devices.
marcozecchini 0:9fca2b23d0ba 450 * @param GPIO_Pin: Specifies the pins to be toggled.
marcozecchini 0:9fca2b23d0ba 451 * @retval None
marcozecchini 0:9fca2b23d0ba 452 */
marcozecchini 0:9fca2b23d0ba 453 void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
marcozecchini 0:9fca2b23d0ba 454 {
marcozecchini 0:9fca2b23d0ba 455 /* Check the parameters */
marcozecchini 0:9fca2b23d0ba 456 assert_param(IS_GPIO_PIN(GPIO_Pin));
marcozecchini 0:9fca2b23d0ba 457
marcozecchini 0:9fca2b23d0ba 458 GPIOx->ODR ^= GPIO_Pin;
marcozecchini 0:9fca2b23d0ba 459 }
marcozecchini 0:9fca2b23d0ba 460
marcozecchini 0:9fca2b23d0ba 461 /**
marcozecchini 0:9fca2b23d0ba 462 * @brief Locks GPIO Pins configuration registers.
marcozecchini 0:9fca2b23d0ba 463 * @note The locked registers are GPIOx_MODER, GPIOx_OTYPER, GPIOx_OSPEEDR,
marcozecchini 0:9fca2b23d0ba 464 * GPIOx_PUPDR, GPIOx_AFRL and GPIOx_AFRH.
marcozecchini 0:9fca2b23d0ba 465 * @note The configuration of the locked GPIO pins can no longer be modified
marcozecchini 0:9fca2b23d0ba 466 * until the next reset.
marcozecchini 0:9fca2b23d0ba 467 * @param GPIOx: where x can be (A..F) to select the GPIO peripheral for STM32F4 family
marcozecchini 0:9fca2b23d0ba 468 * @param GPIO_Pin: specifies the port bit to be locked.
marcozecchini 0:9fca2b23d0ba 469 * This parameter can be any combination of GPIO_PIN_x where x can be (0..15).
marcozecchini 0:9fca2b23d0ba 470 * @retval None
marcozecchini 0:9fca2b23d0ba 471 */
marcozecchini 0:9fca2b23d0ba 472 HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin)
marcozecchini 0:9fca2b23d0ba 473 {
marcozecchini 0:9fca2b23d0ba 474 __IO uint32_t tmp = GPIO_LCKR_LCKK;
marcozecchini 0:9fca2b23d0ba 475
marcozecchini 0:9fca2b23d0ba 476 /* Check the parameters */
marcozecchini 0:9fca2b23d0ba 477 assert_param(IS_GPIO_PIN(GPIO_Pin));
marcozecchini 0:9fca2b23d0ba 478
marcozecchini 0:9fca2b23d0ba 479 /* Apply lock key write sequence */
marcozecchini 0:9fca2b23d0ba 480 tmp |= GPIO_Pin;
marcozecchini 0:9fca2b23d0ba 481 /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
marcozecchini 0:9fca2b23d0ba 482 GPIOx->LCKR = tmp;
marcozecchini 0:9fca2b23d0ba 483 /* Reset LCKx bit(s): LCKK='0' + LCK[15-0] */
marcozecchini 0:9fca2b23d0ba 484 GPIOx->LCKR = GPIO_Pin;
marcozecchini 0:9fca2b23d0ba 485 /* Set LCKx bit(s): LCKK='1' + LCK[15-0] */
marcozecchini 0:9fca2b23d0ba 486 GPIOx->LCKR = tmp;
marcozecchini 0:9fca2b23d0ba 487 /* Read LCKK bit*/
marcozecchini 0:9fca2b23d0ba 488 tmp = GPIOx->LCKR;
marcozecchini 0:9fca2b23d0ba 489
marcozecchini 0:9fca2b23d0ba 490 if((GPIOx->LCKR & GPIO_LCKR_LCKK) != RESET)
marcozecchini 0:9fca2b23d0ba 491 {
marcozecchini 0:9fca2b23d0ba 492 return HAL_OK;
marcozecchini 0:9fca2b23d0ba 493 }
marcozecchini 0:9fca2b23d0ba 494 else
marcozecchini 0:9fca2b23d0ba 495 {
marcozecchini 0:9fca2b23d0ba 496 return HAL_ERROR;
marcozecchini 0:9fca2b23d0ba 497 }
marcozecchini 0:9fca2b23d0ba 498 }
marcozecchini 0:9fca2b23d0ba 499
marcozecchini 0:9fca2b23d0ba 500 /**
marcozecchini 0:9fca2b23d0ba 501 * @brief This function handles EXTI interrupt request.
marcozecchini 0:9fca2b23d0ba 502 * @param GPIO_Pin: Specifies the pins connected EXTI line
marcozecchini 0:9fca2b23d0ba 503 * @retval None
marcozecchini 0:9fca2b23d0ba 504 */
marcozecchini 0:9fca2b23d0ba 505 void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin)
marcozecchini 0:9fca2b23d0ba 506 {
marcozecchini 0:9fca2b23d0ba 507 /* EXTI line interrupt detected */
marcozecchini 0:9fca2b23d0ba 508 if(__HAL_GPIO_EXTI_GET_IT(GPIO_Pin) != RESET)
marcozecchini 0:9fca2b23d0ba 509 {
marcozecchini 0:9fca2b23d0ba 510 __HAL_GPIO_EXTI_CLEAR_IT(GPIO_Pin);
marcozecchini 0:9fca2b23d0ba 511 HAL_GPIO_EXTI_Callback(GPIO_Pin);
marcozecchini 0:9fca2b23d0ba 512 }
marcozecchini 0:9fca2b23d0ba 513 }
marcozecchini 0:9fca2b23d0ba 514
marcozecchini 0:9fca2b23d0ba 515 /**
marcozecchini 0:9fca2b23d0ba 516 * @brief EXTI line detection callbacks.
marcozecchini 0:9fca2b23d0ba 517 * @param GPIO_Pin: Specifies the pins connected EXTI line
marcozecchini 0:9fca2b23d0ba 518 * @retval None
marcozecchini 0:9fca2b23d0ba 519 */
marcozecchini 0:9fca2b23d0ba 520 __weak void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin)
marcozecchini 0:9fca2b23d0ba 521 {
marcozecchini 0:9fca2b23d0ba 522 /* Prevent unused argument(s) compilation warning */
marcozecchini 0:9fca2b23d0ba 523 UNUSED(GPIO_Pin);
marcozecchini 0:9fca2b23d0ba 524 /* NOTE: This function Should not be modified, when the callback is needed,
marcozecchini 0:9fca2b23d0ba 525 the HAL_GPIO_EXTI_Callback could be implemented in the user file
marcozecchini 0:9fca2b23d0ba 526 */
marcozecchini 0:9fca2b23d0ba 527 }
marcozecchini 0:9fca2b23d0ba 528
marcozecchini 0:9fca2b23d0ba 529 /**
marcozecchini 0:9fca2b23d0ba 530 * @}
marcozecchini 0:9fca2b23d0ba 531 */
marcozecchini 0:9fca2b23d0ba 532
marcozecchini 0:9fca2b23d0ba 533
marcozecchini 0:9fca2b23d0ba 534 /**
marcozecchini 0:9fca2b23d0ba 535 * @}
marcozecchini 0:9fca2b23d0ba 536 */
marcozecchini 0:9fca2b23d0ba 537
marcozecchini 0:9fca2b23d0ba 538 #endif /* HAL_GPIO_MODULE_ENABLED */
marcozecchini 0:9fca2b23d0ba 539 /**
marcozecchini 0:9fca2b23d0ba 540 * @}
marcozecchini 0:9fca2b23d0ba 541 */
marcozecchini 0:9fca2b23d0ba 542
marcozecchini 0:9fca2b23d0ba 543 /**
marcozecchini 0:9fca2b23d0ba 544 * @}
marcozecchini 0:9fca2b23d0ba 545 */
marcozecchini 0:9fca2b23d0ba 546
marcozecchini 0:9fca2b23d0ba 547 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/